sim/testsuite/sh/fmac.s

   1 # sh testcase for fmac
   2 # mach: sh
   3 # as(sh):       -defsym sim_cpu=0
   4
   5         .include "testutils.inc"
   6
   7         start
   8 fmac_:
   9         set_grs_a5a5
  10         set_fprs_a5a5
  11         # 0.0 * x + y = y.
  12
  13         fldi0   fr0
  14         fldi1   fr1
  15         fldi1   fr2
  16         fmac    fr0, fr1, fr2
  17         # check result.
  18         fldi1   fr0
  19         fcmp/eq fr0, fr2
  20         bt      .L0
  21         fail
  22 .L0:
  23         # x * y + 0.0 = x * y.
  24
  25         fldi1   fr0
  26         fldi1   fr1
  27         fldi0   fr2
  28         # double it.
  29         fadd    fr1, fr2
  30         fmac    fr0, fr1, fr2
  31         # check result.
  32         fldi1   fr0
  33         fadd    fr0, fr0
  34         fcmp/eq fr0, fr2
  35         bt      .L1
  36         fail
  37 .L1:
  38         # x * 0.0 + y = y.
  39
  40         fldi1   fr0
  41         fldi0   fr1
  42         fldi1   fr2
  43         fadd    fr2, fr2
  44         fmac    fr0, fr1, fr2
  45         # check result.
  46         fldi1   fr0
  47         # double fr0.
  48         fadd    fr0, fr0
  49         fcmp/eq fr0, fr2
  50         bt      .L2
  51         fail
  52 .L2:
  53         # x * 0.0 + 0.0 = 0.0
  54
  55         fldi1   fr0
  56         fadd    fr0, fr0
  57         fldi0   fr1
  58         fldi0   fr2
  59         fmac    fr0, fr1, fr2
  60         # check result.
  61         fldi0   fr0
  62         fcmp/eq fr0, fr2
  63         bt      .L3
  64         fail
  65 .L3:
  66         # 0.0 * x + 0.0 = 0.0.
  67
  68         fldi0   fr0
  69         fldi1   fr1
  70         # double it.
  71         fadd    fr1, fr1
  72         fldi0   fr2
  73         fmac    fr0, fr1, fr2
  74         # check result.
  75         fldi0   fr0
  76         fcmp/eq fr0, fr2
  77         bt      .L4
  78         fail
  79 .L4:
  80         test_grs_a5a5
  81         assert_fpreg_i  0, fr0
  82         assert_fpreg_i  2, fr1
  83         assert_fpreg_i  0, fr2
  84         test_fpr_a5a5   fr3
  85         test_fpr_a5a5   fr4
  86         test_fpr_a5a5   fr5
  87         test_fpr_a5a5   fr6
  88         test_fpr_a5a5   fr7
  89         test_fpr_a5a5   fr8
  90         test_fpr_a5a5   fr9
  91         test_fpr_a5a5   fr10
  92         test_fpr_a5a5   fr11
  93         test_fpr_a5a5   fr12
  94         test_fpr_a5a5   fr13
  95         test_fpr_a5a5   fr14
  96         test_fpr_a5a5   fr15
  97         pass
  98         exit 0