sim/testsuite/sh/pabs.s

   1 # sh testcase for pabs
   2 # mach:  shdsp
   3 # as(shdsp):    -defsym sim_cpu=1 -dsp
   4
   5         # FIXME: opcode table ambiguity in ignored bits 4-7.
   6
   7         .include "testutils.inc"
   8
   9         start
  10         set_grs_a5a5
  11         lds     r0, a0
  12         pcopy   a0, a1
  13         lds     r0, x0
  14         lds     r0, x1
  15         lds     r0, y0
  16         lds     r0, y1
  17         pcopy   x0, m0
  18         pcopy   y1, m1
  19
  20         pabs    x0, x1
  21         pabs    y0, y1
  22         assert_sreg     0x5a5a5a5b, x1
  23         assert_sreg     0x5a5a5a5b, y1
  24         pabs    x1, x0
  25         pabs    y1, y0
  26         assert_sreg     0x5a5a5a5b, x0
  27         assert_sreg     0x5a5a5a5b, y0
  28
  29         set_dcfalse
  30         dct pabs a0, a0
  31         dct pabs m0, m0
  32         assert_sreg     0xa5a5a5a5, a0
  33         assert_sreg2    0xa5a5a5a5, m0
  34         set_dctrue
  35         dct pabs a0, a0
  36         dct pabs m0, m0
  37         assert_sreg     0x5a5a5a5b, a0
  38         assert_sreg2    0x5a5a5a5b, m0
  39
  40         set_dctrue
  41         dcf pabs a1, a1
  42         dcf pabs m1, m1
  43         assert_sreg2    0xa5a5a5a5, a1
  44         assert_sreg2    0xa5a5a5a5, m1
  45         set_dcfalse
  46         dcf pabs a1, a1
  47         dcf pabs m1, m1
  48         assert_sreg2    0x5a5a5a5b, a1
  49         assert_sreg2    0x5a5a5a5b, m1
  50
  51         test_grs_a5a5
  52
  53         pass
  54         exit 0