sim/testsuite/sim/h8300/tas.s

   1 # Hitachi H8 testcase 'tas'
   2 # mach(): h8300h h8300s h8sx
   3 # as(h8300):    --defsym sim_cpu=0
   4 # as(h8300h):   --defsym sim_cpu=1
   5 # as(h8300s):   --defsym sim_cpu=2
   6 # as(h8sx):     --defsym sim_cpu=3
   7 # ld(h8300h):   -m h8300helf
   8 # ld(h8300s):   -m h8300self
   9 # ld(h8sx):     -m h8300sxelf
  10
  11         .include "testutils.inc"
  12
  13         .data
  14 byte_dst:       .byte 0
  15
  16         start
  17
  18 tas_ind:                        ; test and set instruction
  19         set_grs_a5a5
  20         mov     #byte_dst, er4
  21         set_ccr_zero
  22         ;; tas @erd
  23         tas     @er4            ; should set zero flag
  24         test_carry_clear
  25         test_neg_clear
  26         test_ovf_clear
  27         test_zero_set
  28
  29         tas     @er4            ; should clear zero, set neg
  30         test_carry_clear
  31         test_neg_set
  32         test_ovf_clear
  33         test_zero_clear
  34
  35         test_gr_a5a5 0          ; general regs have not been modified
  36         test_gr_a5a5 1
  37         test_gr_a5a5 2
  38         test_gr_a5a5 3
  39         test_h_gr32  byte_dst, er4
  40         test_gr_a5a5 5
  41         test_gr_a5a5 6
  42         test_gr_a5a5 7
  43
  44         mov.b   @byte_dst, r0l  ; test variable has MSB set?
  45         test_h_gr8 0x80 r0l
  46
  47 .if (sim_cpu == h8sx)           ; h8sx can use any register for tas
  48 tas_h8sx:                       ; test and set instruction
  49         mov.b   #0, @byte_dst
  50         set_grs_a5a5
  51         mov     #byte_dst, er3
  52         set_ccr_zero
  53         ;; tas @erd
  54         tas     @er3            ; should set zero flag
  55         test_carry_clear
  56         test_neg_clear
  57         test_ovf_clear
  58         test_zero_set
  59
  60         tas     @er3            ; should clear zero, set neg
  61         test_carry_clear
  62         test_neg_set
  63         test_ovf_clear
  64         test_zero_clear
  65
  66         test_gr_a5a5 0          ; general regs have not been modified
  67         test_gr_a5a5 1
  68         test_gr_a5a5 2
  69         test_h_gr32  byte_dst, er3
  70         test_gr_a5a5 4
  71         test_gr_a5a5 5
  72         test_gr_a5a5 6
  73         test_gr_a5a5 7
  74
  75         mov.b   @byte_dst, r0l  ; test variable has MSB set?
  76         test_h_gr8 0x80 r0l
  77 .endif                          ; h8sx
  78
  79         pass
  80         exit 0