1 Fri May 9 15:47:36 1997 Mike Meissner <meissner@cygnus.com>
3 * insns (cmp_vals,do_cmp): Produce the correct bits as specified
6 Fri May 9 09:55:33 1997 Andrew Cagney <cagney@b1.cygnus.com>
8 * alu.h (long_immediate): Adjust the CIA delay-pointer as well as
9 the NIA when a 64bit insn.
11 Thu May 8 11:57:47 1997 Michael Meissner <meissner@cygnus.com>
13 * insns (jsr,bsr): For non-allulled calls, set r31 so that the
14 return address does not reexecute the instruction in the delay
16 (bbo,bbz): Complement bit number to reverse the one's complement
17 that the assembler is required to do.
19 * misc.c (tic80_trace_*): Change format slightly to accomidate
20 real large decimal values.
22 Thu May 8 14:07:16 1997 Andrew Cagney <cagney@b1.cygnus.com>
24 * sim-calls.c (sim_do_command): Implement.
25 (sim_store_register): Fix typo T2H v H2T.
27 Wed May 7 11:48:55 1997 Andrew Cagney <cagney@b1.cygnus.com>
29 * cpu.h (TRACE_FPU2, TRACE_FPU3, TRACE_FPU2I): Add.
30 * insn: Clean up fpu tracing.
32 * sim-calls.c (sim_create_inferior): Start out with interrupts
35 * cpu.h (TRACE_SINK3), misc.c (tic80_trace_sink3): Three argument
38 * insns (rdcr, swcr, wrcr, brcr, rmo, lmo): Implement.
40 * insns (do_*): Remove MY_INDEX/indx argument from support functions,
41 igen now handles this.
43 * cpu.h (CR): New macro - access TIc80 control registers.
46 (tic80_cr2index): New function, map control register opcode index
47 into the internal CR enum.
50 (tic80_trace_{alu{2,3},nop,sink{1,2},{,u}cond_br,ldst}): Move from
54 * Makefile.in (SIM_OBJS): Add misc.o.
56 Tue May 6 15:22:58 1997 Mike Meissner <meissner@cygnus.com>
58 * cpu.h ({,v}{S,D}P_FPR): Delete unused macros that won't work on
60 (tic80_trace_{alu{2,3},nop,sink{1,2},{,u}cond_br,ldst}): Declare
62 (TRACE_{ALU{2,3},NOP,SINK{1,2},{,U}COND_BR,LD,ST}): New macros to
63 trace various instruction types.
65 * insns: Modify all instructions to support semantic tracing.
67 * interp.c (toplevel): Include itable.h.
68 (tic80_trace_{alu{2,3},nop,sink{1,2},{,u}cond_br,ldst}): New
69 functions to provide semantic level tracing information.
71 Mon May 5 11:50:43 1997 Andrew Cagney <cagney@b1.cygnus.com>
73 * alu.h: Update usage of core object to reflect recent changes in
75 * sim-calls.c (sim_open): Ditto.
77 Mon May 5 14:10:17 1997 Andrew Cagney <cagney@b1.cygnus.com>
79 * insn (cmnd): No-op cache flushes.
81 * insns (do_trap): Allow writes to STDERR.
83 * Makefile.in (SIM_OBJS): Link in sim-fpu.o.
84 (SIM_EXTRA_LIBS): Link in the math library.
86 * alu.h: Add support for floating point unit using sim-alu.
88 * insns (fadd, fsub, fmpy, fdiv, fcmp, frnd*): Implement.
90 Fri May 2 14:57:14 1997 Andrew Cagney <cagney@b1.cygnus.com>
92 * sim-calls.c: Include sim-utils.h and sim-options.h.
94 * sim-main.h (sim_state): Drop sim_events and sim_core members,
95 moved to simulator base type.
97 * alu.h (IMEM, MEM, STORE): Update track changes in common
100 * insns: Drop cia argument from functions, igen now handles this.
102 * interp.c (engine_init): Include string.h/strings.h to define
105 * sim-main.h (sim_cia): Delcare, tracking common dir changes.
107 * cpu.h (sim_cpu): Update instruction_address with sim_cia.
109 Wed Apr 30 11:26:56 1997 Andrew Cagney <cagney@b1.cygnus.com>
111 * sim-main.h (signal.h): Include so that SIG* available to all
114 * insns (do_shift): New function, implement shift operations.
115 (do_trap): Add handler for trap 73 - SIGTRAP.
117 Tue Apr 29 10:58:48 1997 Andrew Cagney <cagney@b1.cygnus.com>
119 * alu.h (MEM, STORE): Force addresses to be correctly aligned.
121 * insns (do_jsr): Fix.
122 (do_st, do_ld): Handle 64bit transfers.
123 (do_trap): Match libgloss.
124 (rdcr): Implement nop - Dest == r0 - variant.
126 * sim-calls.c (sim_create_inferior): Initialize SP.
128 * Makefile.in (ENGINE_H): Everything now depends on sim-options.h.
129 (support.o): Depends on ENGINE_H.
131 * cpu.h: Four accumulators.
133 * Makefile.in (tmp-igen): Include line number information in
136 * insns (dld, dst): Fill in.
138 Mon Apr 28 13:02:26 1997 Andrew Cagney <cagney@b1.cygnus.com>
140 * insns (vld): Fix instruction format wrong.
142 Thu Apr 24 16:43:09 1997 Andrew Cagney <cagney@b1.cygnus.com>
144 * dc: Add additional rules so that minor opcode files are
146 * insns: Enable more instructions.
148 * sim-calls.c (sim_fetch_register,sim_store_register, sim_write):
151 Thu Apr 24 00:39:51 1997 Doug Evans <dje@canuck.cygnus.com>
153 * configure: Regenerated to track ../common/aclocal.m4 changes.
154 * Makefile.in (SIM_OBJS): Add sim-module.o, sim-profile.o.
155 * sim-calls.c (sim_open): Call sim_module_uninstall if argument
156 parsing fails. Call sim_post_argv_init.
157 (sim_close): Call sim_module_uninstall.
159 Wed Apr 23 20:05:33 1997 Andrew Cagney <cagney@b1.cygnus.com>
161 * insns (and, bbo, bcnd, bsr, dcache, jsr, or, xor, nor): Enable.
162 * ic: Add fields for enabled instructions.