sim/tic80/ChangeLog

   1 Thu May 29 14:02:40 1997  Andrew Cagney  <cagney@b1.cygnus.com>
   2
   3         * misc.c (tic80_trace_fpu3, tic80_trace_fpu2, tic80_trace_fpu1,
   4         tic80_trace_fpu2i): Pass in function prefix.
   5         (tic80_trace_ldst): Rewrite so it calls print_one_insn directly.
   6
   7         * Makefile.in (SIM_OBJS): Include sim-watch.o module.
   8
   9         * sim-main.h (WITH_WATCHPOINTS): Enable watchpoints.
  10
  11         * ic (bitnum): Compute bitnum from BITNUM.
  12         * insn (bbo, bbz): Use.
  13
  14         * insn: Convert long immediate instructions to igen long immediate
  15         form.
  16         * insn: Add disasembler information.
  17
  18 Thu May 29 12:09:13 1997  Andrew Cagney  <cagney@b2.cygnus.com>
  19
  20         * alu.h (IMEM_IMMED): New macro, fetch 32bit immediate operand N.
  21
  22         * insns (subu i): Immediate is signed not unsigned.
  23
  24 Tue May 27 13:22:13 1997  Andrew Cagney  <cagney@b1.cygnus.com>
  25
  26         * sim-calls.c (sim_read): Pass NULL cpu to sim_core_read_buffer.
  27         (sim_write): Ditto for write.
  28
  29 Tue May 20 09:33:31 1997  Andrew Cagney  <cagney@b1.cygnus.com>
  30
  31         * sim-calls.c (sim_load): Set STATE_LOADED_P.
  32
  33         * sim-main.h: Include <unistd.h>.
  34
  35         * sim-calls.c (sim_set_callback): Delete.
  36         (sim_open): Add/install callback argument.
  37         (sim_size): Delete.
  38
  39 Mon May 19 18:59:33 1997  Mike Meissner  <meissner@cygnus.com>
  40
  41         * configure.in: Check for getpid, kill functions.
  42         * config{.in,ure}: Regenerate.
  43
  44         * insns (do_trap): Add support for kill, getpid system calls.
  45
  46         * sim-main.h (errno.h): Include.
  47         (getpid,kill): Define as NOPs if the host doesn't have them.
  48
  49 Mon May 19 14:58:47 1997  Andrew Cagney  <cagney@b1.cygnus.com>
  50
  51         * sim-calls.c (sim_open): Set the simulator base magic number.
  52         (sim_load): Delete prototype of sim_load_file.
  53         (sim_open): Define sd to be &simulation.
  54
  55 Fri May 16 14:35:30 1997  Andrew Cagney  <cagney@b1.cygnus.com>
  56
  57         * insns (illegal, fp_unavailable): Halt instead of abort the
  58         simulator.
  59
  60         * insns: Replace calls to engine_error with sim_engine_abort.
  61         Ditto for engine_halt V sim_engine_halt.
  62
  63 Tue May 13 15:24:12 1997  Andrew Cagney  <cagney@b2.cygnus.com>
  64
  65         * interp.c (engine_run_until_stop): Delete. Moved to common.
  66         (engine_step): Ditto.
  67         (engine_step): Ditto.
  68         (engine_halt): Ditto.
  69         (engine_restart): Ditto.
  70         (engine_halt): Ditto.
  71         (engine_error): Ditto.
  72
  73         * sim-calls.c (sim_stop): Delete. Moved to common.
  74         (sim_stop_reason): Ditto.
  75         (sim_resume): Ditto.
  76
  77         * Makefile.in (SIM_OBJS): Link in generic sim-engine, sim-run,
  78         sim-resume, sim-reason, sim-stop modules.
  79
  80 Fri May 16 11:57:49 1997  Andrew Cagney  <cagney@b1.cygnus.com>
  81
  82         * ic (compute): Drop check for REG == 0, now always forced to
  83         zero.
  84
  85         * cpu.h (GPR_SET): New macro update the gpr.
  86         * insns (do_add): Use GPR_SET to update the GPR register.
  87
  88         * sim-calls.c (sim_fetch_register): Pretend that r0 is zero.
  89
  90         * Makefile.in (tmp-igen): Specify zero-r0 so that every
  91         instruction clears r0.
  92
  93         * interp.c (engine_run_until_stop): Igen now generates code to
  94         clear r0.
  95         (engine_step): Ditto.
  96
  97 Thu May 15 11:45:37 1997  Andrew Cagney  <cagney@b1.cygnus.com>
  98
  99         * insns (do_shift): When rot==0 and zero/sign merge treat it as
 100         32.
 101         (set_fp_reg): For interger conversion, use sim-fpu fpu2i
 102         functions.
 103         (do_fmpy): Perform iii and uuu using integer arithmetic.
 104
 105         * Makefile.in (ENGINE_H): Assume everything depends on the fpu.
 106
 107         * insns (get_fp_reg): Use sim_fpu_u32to to perform unsigned
 108         conversion.
 109         (do_fcmp): Update to use new fp compare functions. Make reg nr arg
 110         instead of reg.  Stops fp overflow.
 111         (get_fp_reg): Assume val is valid when reg == 0.
 112         (set_fp_reg): Fix double conversion.
 113
 114         * misc.c (tic80_trace_fpu1): New function, trace simple fp op.
 115
 116         * insns (do_frnd): Add tracing.
 117
 118         * cpu.h (TRACE_FPU1): Ditto.
 119
 120         * insns (do_trap): Printf formatting.
 121
 122 Wed May 14 18:05:50 1997  Mike Meissner  <meissner@cygnus.com>
 123
 124         * misc.c (tic80_trace_fpu{3,2,2i}): Align columns with other
 125         insns.  Use %g to print floating point instead of %f in case the
 126         numbers are real large.
 127
 128 Tue May 13 18:00:10 1997  Mike Meissner  <meissner@cygnus.com>
 129
 130         * insns (do_trap): For system calls that are defined, but not
 131         provided return EINVAL. Temporarily add traps 74-79 to just print
 132         the register state.
 133
 134         * interp.c (engine_{run_until_stop,step}): Before executing
 135         instructions, make sure r0 == 0.
 136
 137 Tue May 13 16:39:37 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 138
 139         * alu.h (IMEM): Take full cia not just IP as argument.
 140
 141         * interp.c (engine_run_until_stop): Delete handling of annuled
 142         instructions.
 143         (engine_step): Ditto.
 144
 145         * insn (do_branch): New function.
 146         (do_bbo, do_bbz, do_bcnd, do_bsr, do_jsr): Use do_branch to handle
 147         annuled branches.
 148
 149 Mon May 12 17:15:52 1997  Mike Meissner  <meissner@cygnus.com>
 150
 151         * insns (do_{ld,st}): Fix tracing for ld/st.
 152
 153 Mon May 12 11:12:24 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 154
 155         * sim-calls.c (sim_stop_reason): Restore keep_running after a
 156         CNTRL-C, don't re-clear it.
 157
 158         * interp.c (engine_error): stop rather than signal with SIGABRT
 159         when an error.
 160
 161         * insns (do_ld): For 64bit loads, always store LSW in rDest, MSW in
 162         rDest + 1. Also done by Michael Meissner  <meissner@cygnus.com>
 163         (do_st): Converse for store.
 164
 165         * misc.c (tic80_trace_fpu2i): Correct printf format for int type.
 166
 167 Sun May 11 11:02:57 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 168
 169         * sim-calls.c (sim_stop_reason): Return a SIGINT if keep_running
 170         was cleared.
 171
 172         * interp.c (engine_step): New function.  Single step the simulator
 173         taking care of cntrl-c during a step.
 174
 175         * sim-calls.c (sim_resume): Differentiate between stepping and
 176         running so that a cntrl-c during a step is reported.
 177
 178 Sun May 11 10:54:31 1997  Mark Alexander    <marka@cygnus.com>
 179
 180         * sim-calls.c (sim_fetch_register): Use correct reg base.
 181         (sim_store_register): Ditto.
 182
 183 Sun May 11 10:25:14 1997  Michael Meissner  <meissner@cygnus.com>
 184
 185         * cpu.h (tic80_trace_shift): Add declaration.
 186         (TRACE_SHIFT): New macro to trace shift instructions.
 187
 188         * misc.c (tic80_trace_alu2): Align spacing.
 189         (tic80_trace_shift): New function to trace shifts.
 190
 191         * insns (lmo): Add missing 0b prefix to bits.
 192         (do_shift): Use ~ (unsigned32)0, instead of -1.  Use TRACE_SHIFT
 193         instead of TRACE_ALU2.
 194         (sl r): Use EndMask as is, instead of using Source+1 register.
 195         (subu): Operands are unsigned, not signed.
 196         (do_{ld,st}): Fix endian problems with ld.d/st.d.
 197
 198 Sat May 10 12:35:47 1997  Michael Meissner  <meissner@cygnus.com>
 199
 200         * insns (and{.tt,.tf,.ft,.ff}): Immediate values are unsigned, not
 201         signed.
 202
 203 Fri May  9 15:47:36 1997  Mike Meissner  <meissner@cygnus.com>
 204
 205         * insns (cmp_vals,do_cmp): Produce the correct bits as specified
 206         by the architecture.
 207         (xor): Fix xor immediate patterns to use the correct bits.
 208
 209 Fri May  9 09:55:33 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 210
 211         * alu.h (long_immediate): Adjust the CIA delay-pointer as well as
 212         the NIA when a 64bit insn.
 213
 214 Thu May  8 11:57:47 1997  Michael Meissner  <meissner@cygnus.com>
 215
 216         * insns (jsr,bsr): For non-allulled calls, set r31 so that the
 217         return address does not reexecute the instruction in the delay
 218         slot.
 219         (bbo,bbz): Complement bit number to reverse the one's complement
 220         that the assembler is required to do.
 221
 222         * misc.c (tic80_trace_*): Change format slightly to accomidate
 223         real large decimal values.
 224
 225 Thu May  8 14:07:16 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 226
 227         * sim-calls.c (sim_do_command): Implement.
 228         (sim_store_register): Fix typo T2H v H2T.
 229
 230 Wed May  7 11:48:55 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 231
 232         * cpu.h (TRACE_FPU2, TRACE_FPU3, TRACE_FPU2I): Add.
 233         * insn: Clean up fpu tracing.
 234
 235         * sim-calls.c (sim_create_inferior): Start out with interrupts
 236         enabled.
 237
 238         * cpu.h (TRACE_SINK3), misc.c (tic80_trace_sink3): Three argument
 239         sink
 240
 241         * insns (rdcr, swcr, wrcr, brcr, rmo, lmo): Implement.
 242
 243         * insns (do_*): Remove MY_INDEX/indx argument from support functions,
 244         igen now handles this.
 245
 246         * cpu.h (CR): New macro - access TIc80 control registers.
 247
 248         * misc.c: New file.
 249         (tic80_cr2index): New function, map control register opcode index
 250         into the internal CR enum.
 251
 252         * interp.c
 253         (tic80_trace_{alu{2,3},nop,sink{1,2},{,u}cond_br,ldst}): Move from
 254         here
 255         * misc.c: to here.
 256
 257         * Makefile.in (SIM_OBJS): Add misc.o.
 258
 259 Tue May  6 15:22:58 1997  Mike Meissner  <meissner@cygnus.com>
 260
 261         * cpu.h ({,v}{S,D}P_FPR): Delete unused macros that won't work on
 262         big endian hosts.
 263         (tic80_trace_{alu{2,3},nop,sink{1,2},{,u}cond_br,ldst}): Declare
 264         new functions.
 265         (TRACE_{ALU{2,3},NOP,SINK{1,2},{,U}COND_BR,LD,ST}): New macros to
 266         trace various instruction types.
 267
 268         * insns: Modify all instructions to support semantic tracing.
 269
 270         * interp.c (toplevel): Include itable.h.
 271         (tic80_trace_{alu{2,3},nop,sink{1,2},{,u}cond_br,ldst}): New
 272         functions to provide semantic level tracing information.
 273
 274 Mon May  5 11:50:43 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 275
 276         * alu.h: Update usage of core object to reflect recent changes in
 277         ../common/sim-*core.
 278         * sim-calls.c (sim_open): Ditto.
 279
 280 Mon May  5 14:10:17 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 281
 282         * insn (cmnd): No-op cache flushes.
 283
 284         * insns (do_trap): Allow writes to STDERR.
 285
 286         * Makefile.in (SIM_OBJS): Link in sim-fpu.o.
 287         (SIM_EXTRA_LIBS): Link in the math library.
 288
 289         * alu.h: Add support for floating point unit using sim-alu.
 290
 291         * insns (fadd, fsub, fmpy, fdiv, fcmp, frnd*): Implement.
 292
 293 Fri May  2 14:57:14 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 294
 295         * sim-calls.c: Include sim-utils.h and sim-options.h.
 296
 297         * sim-main.h (sim_state): Drop sim_events and sim_core members,
 298         moved to simulator base type.
 299
 300         * alu.h (IMEM, MEM, STORE): Update track changes in common
 301         directory.
 302
 303         * insns: Drop cia argument from functions, igen now handles this.
 304
 305         * interp.c (engine_init): Include string.h/strings.h to define
 306         memset et.al.
 307
 308         * sim-main.h (sim_cia): Delcare, tracking common dir changes.
 309
 310         * cpu.h (sim_cpu): Update instruction_address with sim_cia.
 311
 312 Wed Apr 30 11:26:56 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 313
 314         * sim-main.h (signal.h): Include so that SIG* available to all
 315         callers of sig_halt.
 316
 317         * insns (do_shift): New function, implement shift operations.
 318         (do_trap): Add handler for trap 73 - SIGTRAP.
 319
 320 Tue Apr 29 10:58:48 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 321
 322         * alu.h (MEM, STORE): Force addresses to be correctly aligned.
 323
 324         * insns (do_jsr): Fix.
 325         (do_st, do_ld): Handle 64bit transfers.
 326         (do_trap): Match libgloss.
 327         (rdcr): Implement nop - Dest == r0 - variant.
 328
 329         * sim-calls.c (sim_create_inferior): Initialize SP.
 330
 331         * Makefile.in (ENGINE_H): Everything now depends on sim-options.h.
 332         (support.o): Depends on ENGINE_H.
 333
 334         * cpu.h: Four accumulators.
 335
 336         * Makefile.in (tmp-igen): Include line number information in
 337         generated files.
 338
 339         * insns (dld, dst): Fill in.
 340
 341 Mon Apr 28 13:02:26 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 342
 343         * insns (vld): Fix instruction format wrong.
 344
 345 Thu Apr 24 16:43:09 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 346
 347         * dc: Add additional rules so that minor opcode files are
 348         detected.
 349         * insns: Enable more instructions.
 350
 351         * sim-calls.c (sim_fetch_register,sim_store_register, sim_write):
 352         Implement.
 353
 354 Thu Apr 24 00:39:51 1997  Doug Evans  <dje@canuck.cygnus.com>
 355
 356         * configure: Regenerated to track ../common/aclocal.m4 changes.
 357         * Makefile.in (SIM_OBJS): Add sim-module.o, sim-profile.o.
 358         * sim-calls.c (sim_open): Call sim_module_uninstall if argument
 359         parsing fails.  Call sim_post_argv_init.
 360         (sim_close): Call sim_module_uninstall.
 361
 362 Wed Apr 23 20:05:33 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 363
 364         * insns (and, bbo, bcnd, bsr, dcache, jsr, or, xor, nor): Enable.
 365         * ic: Add fields for enabled instructions.
 366