sim/v850/ChangeLog

   1 Fri Dec 27 14:44:06 1996  Michael Meissner  <meissner@tiktok.cygnus.com>
   2
   3         * v850_sim.h (SIG_V850_EXIT): Define as -1.
   4
   5         * interp.c (sim_open): Cast calloc function.
   6         (sim_stop_reason): If signal is SIG_V850_EXIT, inform gdb the
   7         program exited with the appropriate exit code.
   8         (sim_set_interrupt): Declare buildargv.
   9
  10         * simops.c (OP_10007E0): Make exit signal normal exit.  Make time
  11         type correct and work on big endian systems.
  12
  13 Wed Nov 20 02:18:44 1996  Doug Evans  <dje@canuck.cygnus.com>
  14
  15         * Makefile.in: Delete stuff moved to ../common/Make-common.in.
  16         (SIM_OBJS,SIM_EXTRA_CFLAGS,SIM_EXTRA_CLEAN): Define.
  17         * configure.in: Simplify using macros in ../common/aclocal.m4.
  18         Call AC_CHECK_HEADERS(unistd.h).
  19         * configure: Regenerated.
  20         * config.in: New file.
  21         * simops.c: #include "config.h".  #include <unistd.h> if present.
  22
  23 Sun Nov  3 23:02:54 1996  Stan Shebs  <shebs@andros.cygnus.com>
  24
  25         * v850_sim.h (State): New slots dummy_mem, pending_nmi.
  26         (EIPC, etc): New macros for system registers.
  27         * simops.c, interp.c: Use everywhere.
  28
  29         * interp.c: Add support for interrupts issued by interrupt
  30         generators, either PC- or time-based.  Controlled by simulator
  31         command "sim interrupt".
  32
  33         * interp.c: Add support for variable-size allocation of memory,
  34         via simulator command "sim memory-map".
  35         (map): Issue SIGSEGV for references to invalid memory regions.
  36
  37 Thu Oct 31 14:44:10 1996  Gavin Koch  <gavin@cygnus.com>
  38
  39         * simops.c: Include <sys/time.h> for struct timeval and
  40         struct timezone.
  41
  42 Wed Oct 30 08:49:10 1996  Jeffrey A Law  (law@cygnus.com)
  43
  44         * simops.c (OP_10007E0): Handle SYS_times and SYS_gettimeofday.
  45
  46         * simops.c (OP_10007E0): Handle SYS_time.
  47
  48 Tue Oct 29 14:22:55 1996  Jeffrey A Law  (law@cygnus.com)
  49
  50         * simops.c: Include <sys/stat.h>.
  51         (OP_10007E0): Handle SYS_stat.
  52
  53 Thu Oct 24 12:26:35 1996  Jeffrey A Law  (law@cygnus.com)
  54
  55         * simops.c (OP_10007E0): Don't declare errno.
  56
  57         * simops.c (OP_500): Mask off low bit in displacement
  58         for sld.w.
  59         (OP_501): Similarly.
  60
  61         * simops.c (OP_500): Fix displacement handling for sld.w.
  62         (OP_501): Similarly for sst.w.
  63
  64         * simops.c (trace_input): Remove all references to SEXT7.
  65         (OP_300, OP_400, OP_500, OP_380, OP_480, OP_501): Displacement
  66         is zero extended for sst/sld instructions.
  67         * v850_sim.h (SEX7): Delete.  It's no longer needed (and it
  68         was incorrect anyway).
  69
  70 Thu Oct 24 10:33:33 1996  Stu Grossman  (grossman@critters.cygnus.com)
  71
  72         * Makefile.in:  Get rid of srcroot.  Set all INSTALL macros via
  73         autoconf.
  74         * gencode.c (write_opcodes):  Pad operands field to account for
  75         MSVC braindamage.
  76         * simops.c:  Include errno.h.  Exclude SYS_chown, since MSVC
  77         doesn't support it.  (Why is this here in the first place?!?)
  78         * v850_sim.h:  Get rid of 64 bit defs.  Also, get rid of #elif's.
  79         Change number of operands in struct simops from 9 to 6.  Define
  80         SIGTRAP and SIGQUIT for MSVC.
  81
  82 Tue Oct 15 16:19:51 1996  Stu Grossman  (grossman@critters.cygnus.com)
  83
  84         * interp.c (MEM_SIZE):  It's now bytes, not a power of 2.
  85         * (map):  Add support for external mem in the 1->2 meg range.
  86         Also, abort() when memory access is way out of bounds.  (Better to
  87         die than to give wrong result.  (This will be fixed later.))
  88         * (sim_size):  MEM_SIZE is now bytes, not shift factor.
  89
  90 Tue Oct  1 15:53:24 1996  Gavin Koch <gavin@cygnus.com>
  91
  92         * simops.c (trace_input): Swapped order of operands for output
  93         output of OP_IMM_REG.  Changed the fetching of the operands for
  94         OP_LOAD32, and OP_STORE32 to work like op-function.
  95
  96 Mon Sep 30 15:46:33 1996  Stu Grossman  (grossman@critters.cygnus.com)
  97
  98         * interp.c:  Move includes of remote-sim.h and callback.h to
  99         v850-sim.h.
 100         * (lookup_hash): Add PC to report of hash failure.
 101         * (map load_mem store_mem):  New memory subsystem.  Models V851
 102         memory system.
 103         * (sim_write sim_read):  Use new memory subsystem.
 104         * (sim_resume):  Don't load and save PC into EIPC anymore.  Needed
 105         to make user-defined traps work right.
 106         * simops.c (OP_*):  Use new memory subsystem.
 107         * (OP_14007E0 (reti)):  Implement reti.
 108         * (OP_14996E0 (trap)):  Implement user-defined traps.  Move I/O to
 109         trap 31.  Use new memory subsystem.
 110         * v850_sim.h:  Prototypes for load_mem, store_mem and map.  Use
 111         load_mem in RLW macro.
 112
 113 Fri Sep 27 18:34:09 1996  Stu Grossman  (grossman@critters.cygnus.com)
 114
 115         * gencode.c (write_opcodes):  Output hex values for opcode mask
 116         and patterns.
 117         * interp.c (sim_resume):  Save and restore PC from the appropriate
 118         register.
 119         * (sim_fetch_register sim_store_register):  Fix byte-order problem
 120         with reading and writing registers.
 121         * simops.c (OP_FFFF):  Implement pseudo-breakpoint insn.
 122
 123 Fri Sep 27 17:42:37 1996  Jeffrey A Law  (law@cygnus.com)
 124
 125         * simops.c (trace_input): Fix thinko.
 126
 127 Wed Sep 18 09:54:12 1996  Michael Meissner  <meissner@tiktok.cygnus.com>
 128
 129         * simops.c (exec_bfd): Rename from sim_bfd.
 130         (trace_input): Ditto.
 131
 132 Thu Sep 12 12:03:05 1996  Michael Meissner  <meissner@tiktok.cygnus.com>
 133
 134         * simops.c (trace_input): Use find_nearest_line to print line
 135         number, function name or file name of PC.
 136
 137 Wed Sep 11 16:44:37 1996  Michael Meissner  <meissner@tiktok.cygnus.com>
 138
 139         * simops.c: Add tracing support.  Use SEXTxx macros instead of
 140         doing hardwired shifts.
 141
 142         * configure.in (--enable-sim-cflags): Add switch to add additional
 143         flags to simulator buld.  If --enable-sim-cflags=trace, turn on
 144         tracing.
 145         * configure: Regenerate.
 146
 147         * Makefile.in: Don't require a VPATH capable make if configuring
 148         in the same directory.  Don't use CFLAGS for configuration flags.
 149         Add flags from --enable-sim-cflags.  Support canadian cross
 150         builds.  Rebuild whole simulator if include files change.
 151
 152         * interp.c (v850_debug): New global for debugging.
 153         (lookup_hash,sim_size,sim_set_profile): Use
 154         printf_filtered callback, instead of calling printf directly.
 155         (sim_{open,trace}): Enable tracing if -t and compiled for tracing.
 156
 157         * v850_sim.h: Use limits.h to set the various sized types.
 158         (SEXT{5,7,16,22}): New macros.
 159
 160 Mon Sep  9 20:50:46 1996  Jeffrey A Law  (law@cygnus.com)
 161
 162         * interp.c (hash): Make this an inline function
 163         when compiling with GCC.  Simplify.
 164         * simpos.c: Explicitly include "sys/syscall.h".  Remove
 165         some #if 0'd code.  Enable more emulated syscalls.
 166
 167 Wed Sep  4 01:48:55 1996  Jeffrey A Law  (law@cygnus.com)
 168
 169         * interp.c: Fix sign bit handling for add and sub instructions.
 170
 171 Tue Sep  3 10:20:30 1996  Jeffrey A Law  (law@cygnus.com)
 172
 173         * gencode.c: Fix various indention & style problems.
 174         Remove test code.  Remove #if 0 code.
 175         * interp.c: Provide prototypes for all static functions.
 176         Fix minor indention problems.
 177         (sim_open, sim_resume): Remove unused variables.
 178         (sim_read): Return type is "int".
 179         * simops.c: Remove unused variables.
 180         (divh): Make result of divide-by-zero zero.
 181         (setf): Initialize result to keep compiler quiet.
 182         (sar instructions): These just clear the overflow bit.
 183         * v850_sim.h: Provide prototypes for put_byte, put_half
 184         and put_word.
 185
 186         * interp.c: OP should be an array of 32bit operands!
 187         (v850_callback): Declare.
 188         (do_format_5): Fix extraction of OP[0].
 189         (sim_size): Remove debugging printf.
 190         (sim_set_callbacks): Do something useful.
 191         (sim_stop_reason): Gross hacks to get c-torture running.
 192         * simops.c: Simplify code for computing targets of bCC
 193         insns.   Invert 's' bit if 'ov' bit is set for some
 194         instructions.  Fix 'cy' bit handling for numerous
 195         instructions.  Make the simulator stop when a halt
 196         instruction is encountered.  Very crude support for
 197         emulated syscalls (trap 0).
 198         * v850_sim.h: Include "callback.h" and declare
 199         v850_callback.  Items in the operand array are 32bits.
 200
 201 Sun Sep  1 22:35:35 1996  Jeffrey A Law  (law@cygnus.com)
 202
 203         * interp.c (sim_resume): Fix code to check for a format 3
 204         opcode.
 205         * simops.c: bCC insns only argument is a constant, not a
 206         register value (duh...)
 207
 208 Fri Aug 30 10:33:49 1996  Jeffrey A Law  (law@cygnus.com)
 209
 210         * simops.c: Fix "not1" and "set1".
 211
 212         * simops.c: Don't forget to initialize temp for
 213         "ld.h" and "ld.w"
 214
 215         * interp.c: Remove various debugging printfs.
 216
 217         * simops.c: Fix satadd, satsub boundary case handling.
 218
 219         * interp.c (hash): Fix.
 220         * interp.c (do_format_8): Get operands correctly and
 221         call the target function.
 222         * simops.c: Rough cut at "clr1", "not1", "set1", and "tst1".
 223
 224 Thu Aug 29 13:53:29 1996  Jeffrey A Law  (law@cygnus.com)
 225
 226         * interp.c (do_format_4): Get operands correctly and
 227         call the target function.
 228         * simops.c: Rough cut at "sld.b", "sld.h", "sld.w", "sst.b",
 229         "sst.h", and "sst.w".
 230
 231         * v850_sim.h: The V850 doesn't have split I&D spaces.  Change
 232         accordingly.  Remove many unused definitions.
 233         * interp.c: The V850 doesn't have split I&D spaces.  Change
 234         accordingly.
 235         (get_longlong, get_longword, get_word): Deleted.
 236         (write_longlong, write_longword, write_word): Deleted.
 237         (get_operands): Deleted.
 238         (get_byte, get_half, get_word): New functions.
 239         (put_byte, put_half, put_word): New functions.
 240         * simops.c: Remove unused functions.  Rough cut at
 241         "ld.b", "ld.h", "ld.w", "st.b", "st.h", "st.w" insns.
 242
 243         * v850_sim.h (struct _state): Remove "psw" field.  Add
 244         "sregs" field.
 245         (PSW): Remove bogus definition.
 246         * simops.c: Change condition code handling to use the psw
 247         register within the sregs array.  Handle "ldsr" and "stsr".
 248
 249         * simops.c: Handle "satadd", "satsub", "satsubi", "satsubr".
 250
 251         * interp.c (do_format_5): Get operands correctly and
 252         call the target function.
 253         (sim_resume): Don't do a PC update for format 5 instructions.
 254         * simops.c: Handle "jarl" and "jmp" instructions.
 255
 256         * simops.c: Fix minor typos.  Handle "cmp", "setf", "tst"
 257         "di", and "ei" instructions correctly.
 258
 259         * interp.c (do_format_3): Get operands correctly and call
 260         the target function.
 261         * simops.c: Handle bCC instructions.
 262
 263         * simops.c: Add condition code handling to shift insns.
 264         Fix minor typos in condition code handling for other insns.
 265
 266         * Makefile.in: Fix typo.
 267         * simops.c: Add condition code handling to "sub" "subr" and
 268         "divh" instructions.
 269
 270         * interp.c (hash): Update to be more accurate.
 271         (lookup_hash): Call hash rather than computing the hash
 272         code here.
 273         (do_format_1_2): Handle format 1 and format 2 instructions.
 274         Get operands correctly and call the target function.
 275         (do_format_6): Get operands correctly and call the target
 276         function.
 277         (do_formats_9_10): Rough cut so shift ops will work.
 278         (sim_resume): Tweak to deal with format 1 and format 2
 279         handling in a single funtion.  Don't update the PC
 280         for format 3 insns.  Fix typos.
 281         * simops.c: Slightly reorganize.  Add condition code handling
 282         to "add", "addi", "and", "andi", "or", "ori", "xor", "xori"
 283         and "not" instructions.
 284         * v850_sim.h (reg_t): Registers are 32bits.
 285         (_state): The V850 has 32 general registers.  Add a 32bit
 286         psw and pc register too.  Add accessor macros
 287
 288         * Makefile.in, interp.c, v850_sim.h: Bring over endianness
 289         changes from the d10v simulator.
 290
 291         * simops.c: Add shift support.
 292
 293         * simops.c: Add multiply & divide support.  Abort for system
 294         instructions.
 295
 296         * simops.c: Add logicals, mov, movhi, movea, add, addi, sub
 297         and subr.  No condition codes yet.
 298
 299 Wed Aug 28 13:53:22 1996  Jeffrey A Law  (law@cygnus.com)
 300
 301         * ChangeLog, Makefile.in, configure, configure.in, v850_sim.h,
 302         gencode.c, interp.c, simops.c: Created.
 303