* Makefile.in (SIM_OBJS): Add sim-load.o.
[binutils-gdb.git] / sim / v850 / ChangeLog
1 Thu Apr 17 03:53:18 1997 Doug Evans <dje@canuck.cygnus.com>
2
3 * Makefile.in (SIM_OBJS): Add sim-load.o.
4 * interp.c (sim_kind, myname): New static locals.
5 (sim_open): Set sim_kind, myname. Ignore -E arg.
6 (sim_load): Return SIM_RC. New arg abfd. Call sim_load_file to
7 load file into simulator. Set start address from bfd.
8 (sim_create_inferior): Return SIM_RC. Delete arg start_address.
9
10 Wed Apr 16 19:53:55 1997 Andrew Cagney <cagney@b1.cygnus.com>
11
12 * simops.c (OP_10007E0): Only provide system calls SYS_execv,
13 SYS_wait, SYS_wait, SYS_utime, SYS_time if defined by the host.
14
15 Mon Apr 7 15:45:02 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
16
17 * configure: Regenerated to track ../common/aclocal.m4 changes.
18 * config.in: Ditto.
19
20 Wed Apr 2 15:06:28 1997 Doug Evans <dje@canuck.cygnus.com>
21
22 * interp.c (sim_open): New arg `kind'.
23
24 * configure: Regenerated to track ../common/aclocal.m4 changes.
25
26 Wed Apr 2 14:34:19 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
27
28 * configure: Regenerated to track ../common/aclocal.m4 changes.
29
30 Wed Mar 19 01:14:00 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
31
32 * configure: Regenerated to track ../common/aclocal.m4 changes.
33
34 Mon Mar 17 15:10:07 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
35
36 * configure: Re-generate.
37
38 Fri Mar 14 10:34:11 1997 Michael Meissner <meissner@cygnus.com>
39
40 * configure: Regenerate to track ../common/aclocal.m4 changes.
41
42 Thu Mar 13 13:00:54 1997 Doug Evans <dje@canuck.cygnus.com>
43
44 * interp.c (sim_open): New SIM_DESC result. Argument is now
45 in argv form.
46 (other sim_*): New SIM_DESC argument.
47
48 Tue Feb 4 13:33:30 1997 Doug Evans <dje@canuck.cygnus.com>
49
50 * Makefile.in (@COMMON_MAKEFILE_FRAG): Use
51 COMMON_{PRE,POST}_CONFIG_FRAG instead.
52 * configure.in: sinclude ../common/aclocal.m4.
53 * configure: Regenerated.
54
55 Thu Jan 23 11:46:23 1997 Stu Grossman (grossman@critters.cygnus.com)
56
57 * configure configure.in Makefile.in: Update to new configure
58 scheme which is more compatible with WinGDB builds.
59 * configure.in: Improve comment on how to run autoconf.
60 * configure: Re-run autoconf to get new ../common/aclocal.m4.
61 * Makefile.in: Use autoconf substitution to install common
62 makefile fragment.
63
64 Mon Jan 20 16:05:34 1997 Michael Meissner <meissner@tiktok.cygnus.com>
65
66 * simops.c (OP_{E0,2E0,6E0}): The multiply operations sign extend,
67 not zero extend.
68
69 Tue Jan 14 17:06:03 1997 Stu Grossman (grossman@critters.cygnus.com)
70
71 * simops.c: Put ifdefs around things to make MSVC happy. Get rid
72 of unistd.h. Disable SYS_stat, SYS_chown, SYS_time, SYS_times,
73 SYS_gettimeofday and SYS_utime from MSVC.
74
75 Tue Dec 31 18:11:13 1996 Michael Meissner <meissner@tiktok.cygnus.com>
76
77 * simops.c (OP_10007E0): Know that kill encodes the signal number
78 via: 0xdead0000 | signal and turn it back into a signal.
79
80 Fri Dec 27 14:44:06 1996 Michael Meissner <meissner@tiktok.cygnus.com>
81
82 * v850_sim.h (SIG_V850_EXIT): Define as -1.
83
84 * interp.c (sim_open): Cast calloc function.
85 (sim_stop_reason): If signal is SIG_V850_EXIT, inform gdb the
86 program exited with the appropriate exit code.
87 (sim_set_interrupt): Declare buildargv.
88
89 * simops.c (OP_10007E0): Make exit signal normal exit. Make time
90 type correct and work on big endian systems.
91
92 Wed Nov 20 02:18:44 1996 Doug Evans <dje@canuck.cygnus.com>
93
94 * Makefile.in: Delete stuff moved to ../common/Make-common.in.
95 (SIM_OBJS,SIM_EXTRA_CFLAGS,SIM_EXTRA_CLEAN): Define.
96 * configure.in: Simplify using macros in ../common/aclocal.m4.
97 Call AC_CHECK_HEADERS(unistd.h).
98 * configure: Regenerated.
99 * config.in: New file.
100 * simops.c: #include "config.h". #include <unistd.h> if present.
101
102 Sun Nov 3 23:02:54 1996 Stan Shebs <shebs@andros.cygnus.com>
103
104 * v850_sim.h (State): New slots dummy_mem, pending_nmi.
105 (EIPC, etc): New macros for system registers.
106 * simops.c, interp.c: Use everywhere.
107
108 * interp.c: Add support for interrupts issued by interrupt
109 generators, either PC- or time-based. Controlled by simulator
110 command "sim interrupt".
111
112 * interp.c: Add support for variable-size allocation of memory,
113 via simulator command "sim memory-map".
114 (map): Issue SIGSEGV for references to invalid memory regions.
115
116 Thu Oct 31 14:44:10 1996 Gavin Koch <gavin@cygnus.com>
117
118 * simops.c: Include <sys/time.h> for struct timeval and
119 struct timezone.
120
121 Wed Oct 30 08:49:10 1996 Jeffrey A Law (law@cygnus.com)
122
123 * simops.c (OP_10007E0): Handle SYS_times and SYS_gettimeofday.
124
125 * simops.c (OP_10007E0): Handle SYS_time.
126
127 Tue Oct 29 14:22:55 1996 Jeffrey A Law (law@cygnus.com)
128
129 * simops.c: Include <sys/stat.h>.
130 (OP_10007E0): Handle SYS_stat.
131
132 Thu Oct 24 12:26:35 1996 Jeffrey A Law (law@cygnus.com)
133
134 * simops.c (OP_10007E0): Don't declare errno.
135
136 * simops.c (OP_500): Mask off low bit in displacement
137 for sld.w.
138 (OP_501): Similarly.
139
140 * simops.c (OP_500): Fix displacement handling for sld.w.
141 (OP_501): Similarly for sst.w.
142
143 * simops.c (trace_input): Remove all references to SEXT7.
144 (OP_300, OP_400, OP_500, OP_380, OP_480, OP_501): Displacement
145 is zero extended for sst/sld instructions.
146 * v850_sim.h (SEX7): Delete. It's no longer needed (and it
147 was incorrect anyway).
148
149 Thu Oct 24 10:33:33 1996 Stu Grossman (grossman@critters.cygnus.com)
150
151 * Makefile.in: Get rid of srcroot. Set all INSTALL macros via
152 autoconf.
153 * gencode.c (write_opcodes): Pad operands field to account for
154 MSVC braindamage.
155 * simops.c: Include errno.h. Exclude SYS_chown, since MSVC
156 doesn't support it. (Why is this here in the first place?!?)
157 * v850_sim.h: Get rid of 64 bit defs. Also, get rid of #elif's.
158 Change number of operands in struct simops from 9 to 6. Define
159 SIGTRAP and SIGQUIT for MSVC.
160
161 Tue Oct 15 16:19:51 1996 Stu Grossman (grossman@critters.cygnus.com)
162
163 * interp.c (MEM_SIZE): It's now bytes, not a power of 2.
164 * (map): Add support for external mem in the 1->2 meg range.
165 Also, abort() when memory access is way out of bounds. (Better to
166 die than to give wrong result. (This will be fixed later.))
167 * (sim_size): MEM_SIZE is now bytes, not shift factor.
168
169 Tue Oct 1 15:53:24 1996 Gavin Koch <gavin@cygnus.com>
170
171 * simops.c (trace_input): Swapped order of operands for output
172 output of OP_IMM_REG. Changed the fetching of the operands for
173 OP_LOAD32, and OP_STORE32 to work like op-function.
174
175 Mon Sep 30 15:46:33 1996 Stu Grossman (grossman@critters.cygnus.com)
176
177 * interp.c: Move includes of remote-sim.h and callback.h to
178 v850-sim.h.
179 * (lookup_hash): Add PC to report of hash failure.
180 * (map load_mem store_mem): New memory subsystem. Models V851
181 memory system.
182 * (sim_write sim_read): Use new memory subsystem.
183 * (sim_resume): Don't load and save PC into EIPC anymore. Needed
184 to make user-defined traps work right.
185 * simops.c (OP_*): Use new memory subsystem.
186 * (OP_14007E0 (reti)): Implement reti.
187 * (OP_14996E0 (trap)): Implement user-defined traps. Move I/O to
188 trap 31. Use new memory subsystem.
189 * v850_sim.h: Prototypes for load_mem, store_mem and map. Use
190 load_mem in RLW macro.
191
192 Fri Sep 27 18:34:09 1996 Stu Grossman (grossman@critters.cygnus.com)
193
194 * gencode.c (write_opcodes): Output hex values for opcode mask
195 and patterns.
196 * interp.c (sim_resume): Save and restore PC from the appropriate
197 register.
198 * (sim_fetch_register sim_store_register): Fix byte-order problem
199 with reading and writing registers.
200 * simops.c (OP_FFFF): Implement pseudo-breakpoint insn.
201
202 Fri Sep 27 17:42:37 1996 Jeffrey A Law (law@cygnus.com)
203
204 * simops.c (trace_input): Fix thinko.
205
206 Wed Sep 18 09:54:12 1996 Michael Meissner <meissner@tiktok.cygnus.com>
207
208 * simops.c (exec_bfd): Rename from sim_bfd.
209 (trace_input): Ditto.
210
211 Thu Sep 12 12:03:05 1996 Michael Meissner <meissner@tiktok.cygnus.com>
212
213 * simops.c (trace_input): Use find_nearest_line to print line
214 number, function name or file name of PC.
215
216 Wed Sep 11 16:44:37 1996 Michael Meissner <meissner@tiktok.cygnus.com>
217
218 * simops.c: Add tracing support. Use SEXTxx macros instead of
219 doing hardwired shifts.
220
221 * configure.in (--enable-sim-cflags): Add switch to add additional
222 flags to simulator buld. If --enable-sim-cflags=trace, turn on
223 tracing.
224 * configure: Regenerate.
225
226 * Makefile.in: Don't require a VPATH capable make if configuring
227 in the same directory. Don't use CFLAGS for configuration flags.
228 Add flags from --enable-sim-cflags. Support canadian cross
229 builds. Rebuild whole simulator if include files change.
230
231 * interp.c (v850_debug): New global for debugging.
232 (lookup_hash,sim_size,sim_set_profile): Use
233 printf_filtered callback, instead of calling printf directly.
234 (sim_{open,trace}): Enable tracing if -t and compiled for tracing.
235
236 * v850_sim.h: Use limits.h to set the various sized types.
237 (SEXT{5,7,16,22}): New macros.
238
239 Mon Sep 9 20:50:46 1996 Jeffrey A Law (law@cygnus.com)
240
241 * interp.c (hash): Make this an inline function
242 when compiling with GCC. Simplify.
243 * simpos.c: Explicitly include "sys/syscall.h". Remove
244 some #if 0'd code. Enable more emulated syscalls.
245
246 Wed Sep 4 01:48:55 1996 Jeffrey A Law (law@cygnus.com)
247
248 * interp.c: Fix sign bit handling for add and sub instructions.
249
250 Tue Sep 3 10:20:30 1996 Jeffrey A Law (law@cygnus.com)
251
252 * gencode.c: Fix various indention & style problems.
253 Remove test code. Remove #if 0 code.
254 * interp.c: Provide prototypes for all static functions.
255 Fix minor indention problems.
256 (sim_open, sim_resume): Remove unused variables.
257 (sim_read): Return type is "int".
258 * simops.c: Remove unused variables.
259 (divh): Make result of divide-by-zero zero.
260 (setf): Initialize result to keep compiler quiet.
261 (sar instructions): These just clear the overflow bit.
262 * v850_sim.h: Provide prototypes for put_byte, put_half
263 and put_word.
264
265 * interp.c: OP should be an array of 32bit operands!
266 (v850_callback): Declare.
267 (do_format_5): Fix extraction of OP[0].
268 (sim_size): Remove debugging printf.
269 (sim_set_callbacks): Do something useful.
270 (sim_stop_reason): Gross hacks to get c-torture running.
271 * simops.c: Simplify code for computing targets of bCC
272 insns. Invert 's' bit if 'ov' bit is set for some
273 instructions. Fix 'cy' bit handling for numerous
274 instructions. Make the simulator stop when a halt
275 instruction is encountered. Very crude support for
276 emulated syscalls (trap 0).
277 * v850_sim.h: Include "callback.h" and declare
278 v850_callback. Items in the operand array are 32bits.
279
280 Sun Sep 1 22:35:35 1996 Jeffrey A Law (law@cygnus.com)
281
282 * interp.c (sim_resume): Fix code to check for a format 3
283 opcode.
284 * simops.c: bCC insns only argument is a constant, not a
285 register value (duh...)
286
287 Fri Aug 30 10:33:49 1996 Jeffrey A Law (law@cygnus.com)
288
289 * simops.c: Fix "not1" and "set1".
290
291 * simops.c: Don't forget to initialize temp for
292 "ld.h" and "ld.w"
293
294 * interp.c: Remove various debugging printfs.
295
296 * simops.c: Fix satadd, satsub boundary case handling.
297
298 * interp.c (hash): Fix.
299 * interp.c (do_format_8): Get operands correctly and
300 call the target function.
301 * simops.c: Rough cut at "clr1", "not1", "set1", and "tst1".
302
303 Thu Aug 29 13:53:29 1996 Jeffrey A Law (law@cygnus.com)
304
305 * interp.c (do_format_4): Get operands correctly and
306 call the target function.
307 * simops.c: Rough cut at "sld.b", "sld.h", "sld.w", "sst.b",
308 "sst.h", and "sst.w".
309
310 * v850_sim.h: The V850 doesn't have split I&D spaces. Change
311 accordingly. Remove many unused definitions.
312 * interp.c: The V850 doesn't have split I&D spaces. Change
313 accordingly.
314 (get_longlong, get_longword, get_word): Deleted.
315 (write_longlong, write_longword, write_word): Deleted.
316 (get_operands): Deleted.
317 (get_byte, get_half, get_word): New functions.
318 (put_byte, put_half, put_word): New functions.
319 * simops.c: Remove unused functions. Rough cut at
320 "ld.b", "ld.h", "ld.w", "st.b", "st.h", "st.w" insns.
321
322 * v850_sim.h (struct _state): Remove "psw" field. Add
323 "sregs" field.
324 (PSW): Remove bogus definition.
325 * simops.c: Change condition code handling to use the psw
326 register within the sregs array. Handle "ldsr" and "stsr".
327
328 * simops.c: Handle "satadd", "satsub", "satsubi", "satsubr".
329
330 * interp.c (do_format_5): Get operands correctly and
331 call the target function.
332 (sim_resume): Don't do a PC update for format 5 instructions.
333 * simops.c: Handle "jarl" and "jmp" instructions.
334
335 * simops.c: Fix minor typos. Handle "cmp", "setf", "tst"
336 "di", and "ei" instructions correctly.
337
338 * interp.c (do_format_3): Get operands correctly and call
339 the target function.
340 * simops.c: Handle bCC instructions.
341
342 * simops.c: Add condition code handling to shift insns.
343 Fix minor typos in condition code handling for other insns.
344
345 * Makefile.in: Fix typo.
346 * simops.c: Add condition code handling to "sub" "subr" and
347 "divh" instructions.
348
349 * interp.c (hash): Update to be more accurate.
350 (lookup_hash): Call hash rather than computing the hash
351 code here.
352 (do_format_1_2): Handle format 1 and format 2 instructions.
353 Get operands correctly and call the target function.
354 (do_format_6): Get operands correctly and call the target
355 function.
356 (do_formats_9_10): Rough cut so shift ops will work.
357 (sim_resume): Tweak to deal with format 1 and format 2
358 handling in a single funtion. Don't update the PC
359 for format 3 insns. Fix typos.
360 * simops.c: Slightly reorganize. Add condition code handling
361 to "add", "addi", "and", "andi", "or", "ori", "xor", "xori"
362 and "not" instructions.
363 * v850_sim.h (reg_t): Registers are 32bits.
364 (_state): The V850 has 32 general registers. Add a 32bit
365 psw and pc register too. Add accessor macros
366
367 * Makefile.in, interp.c, v850_sim.h: Bring over endianness
368 changes from the d10v simulator.
369
370 * simops.c: Add shift support.
371
372 * simops.c: Add multiply & divide support. Abort for system
373 instructions.
374
375 * simops.c: Add logicals, mov, movhi, movea, add, addi, sub
376 and subr. No condition codes yet.
377
378 Wed Aug 28 13:53:22 1996 Jeffrey A Law (law@cygnus.com)
379
380 * ChangeLog, Makefile.in, configure, configure.in, v850_sim.h,
381 gencode.c, interp.c, simops.c: Created.
382