sim/v850/ChangeLog

   1 Mon Jan 20 16:05:34 1997  Michael Meissner  <meissner@tiktok.cygnus.com>
   2
   3         * simops.c (OP_{E0,2E0,6E0}): The multiply operations sign extend,
   4         not zero extend.
   5
   6 Tue Jan 14 17:06:03 1997  Stu Grossman  (grossman@critters.cygnus.com)
   7
   8         * simops.c:  Put ifdefs around things to make MSVC happy.  Get rid
   9         of unistd.h.  Disable SYS_stat, SYS_chown, SYS_time, SYS_times,
  10         SYS_gettimeofday and SYS_utime from MSVC.
  11
  12 Tue Dec 31 18:11:13 1996  Michael Meissner  <meissner@tiktok.cygnus.com>
  13
  14         * simops.c (OP_10007E0): Know that kill encodes the signal number
  15         via: 0xdead0000 | signal and turn it back into a signal.
  16
  17 Fri Dec 27 14:44:06 1996  Michael Meissner  <meissner@tiktok.cygnus.com>
  18
  19         * v850_sim.h (SIG_V850_EXIT): Define as -1.
  20
  21         * interp.c (sim_open): Cast calloc function.
  22         (sim_stop_reason): If signal is SIG_V850_EXIT, inform gdb the
  23         program exited with the appropriate exit code.
  24         (sim_set_interrupt): Declare buildargv.
  25
  26         * simops.c (OP_10007E0): Make exit signal normal exit.  Make time
  27         type correct and work on big endian systems.
  28
  29 Wed Nov 20 02:18:44 1996  Doug Evans  <dje@canuck.cygnus.com>
  30
  31         * Makefile.in: Delete stuff moved to ../common/Make-common.in.
  32         (SIM_OBJS,SIM_EXTRA_CFLAGS,SIM_EXTRA_CLEAN): Define.
  33         * configure.in: Simplify using macros in ../common/aclocal.m4.
  34         Call AC_CHECK_HEADERS(unistd.h).
  35         * configure: Regenerated.
  36         * config.in: New file.
  37         * simops.c: #include "config.h".  #include <unistd.h> if present.
  38
  39 Sun Nov  3 23:02:54 1996  Stan Shebs  <shebs@andros.cygnus.com>
  40
  41         * v850_sim.h (State): New slots dummy_mem, pending_nmi.
  42         (EIPC, etc): New macros for system registers.
  43         * simops.c, interp.c: Use everywhere.
  44
  45         * interp.c: Add support for interrupts issued by interrupt
  46         generators, either PC- or time-based.  Controlled by simulator
  47         command "sim interrupt".
  48
  49         * interp.c: Add support for variable-size allocation of memory,
  50         via simulator command "sim memory-map".
  51         (map): Issue SIGSEGV for references to invalid memory regions.
  52
  53 Thu Oct 31 14:44:10 1996  Gavin Koch  <gavin@cygnus.com>
  54
  55         * simops.c: Include <sys/time.h> for struct timeval and
  56         struct timezone.
  57
  58 Wed Oct 30 08:49:10 1996  Jeffrey A Law  (law@cygnus.com)
  59
  60         * simops.c (OP_10007E0): Handle SYS_times and SYS_gettimeofday.
  61
  62         * simops.c (OP_10007E0): Handle SYS_time.
  63
  64 Tue Oct 29 14:22:55 1996  Jeffrey A Law  (law@cygnus.com)
  65
  66         * simops.c: Include <sys/stat.h>.
  67         (OP_10007E0): Handle SYS_stat.
  68
  69 Thu Oct 24 12:26:35 1996  Jeffrey A Law  (law@cygnus.com)
  70
  71         * simops.c (OP_10007E0): Don't declare errno.
  72
  73         * simops.c (OP_500): Mask off low bit in displacement
  74         for sld.w.
  75         (OP_501): Similarly.
  76
  77         * simops.c (OP_500): Fix displacement handling for sld.w.
  78         (OP_501): Similarly for sst.w.
  79
  80         * simops.c (trace_input): Remove all references to SEXT7.
  81         (OP_300, OP_400, OP_500, OP_380, OP_480, OP_501): Displacement
  82         is zero extended for sst/sld instructions.
  83         * v850_sim.h (SEX7): Delete.  It's no longer needed (and it
  84         was incorrect anyway).
  85
  86 Thu Oct 24 10:33:33 1996  Stu Grossman  (grossman@critters.cygnus.com)
  87
  88         * Makefile.in:  Get rid of srcroot.  Set all INSTALL macros via
  89         autoconf.
  90         * gencode.c (write_opcodes):  Pad operands field to account for
  91         MSVC braindamage.
  92         * simops.c:  Include errno.h.  Exclude SYS_chown, since MSVC
  93         doesn't support it.  (Why is this here in the first place?!?)
  94         * v850_sim.h:  Get rid of 64 bit defs.  Also, get rid of #elif's.
  95         Change number of operands in struct simops from 9 to 6.  Define
  96         SIGTRAP and SIGQUIT for MSVC.
  97
  98 Tue Oct 15 16:19:51 1996  Stu Grossman  (grossman@critters.cygnus.com)
  99
 100         * interp.c (MEM_SIZE):  It's now bytes, not a power of 2.
 101         * (map):  Add support for external mem in the 1->2 meg range.
 102         Also, abort() when memory access is way out of bounds.  (Better to
 103         die than to give wrong result.  (This will be fixed later.))
 104         * (sim_size):  MEM_SIZE is now bytes, not shift factor.
 105
 106 Tue Oct  1 15:53:24 1996  Gavin Koch <gavin@cygnus.com>
 107
 108         * simops.c (trace_input): Swapped order of operands for output
 109         output of OP_IMM_REG.  Changed the fetching of the operands for
 110         OP_LOAD32, and OP_STORE32 to work like op-function.
 111
 112 Mon Sep 30 15:46:33 1996  Stu Grossman  (grossman@critters.cygnus.com)
 113
 114         * interp.c:  Move includes of remote-sim.h and callback.h to
 115         v850-sim.h.
 116         * (lookup_hash): Add PC to report of hash failure.
 117         * (map load_mem store_mem):  New memory subsystem.  Models V851
 118         memory system.
 119         * (sim_write sim_read):  Use new memory subsystem.
 120         * (sim_resume):  Don't load and save PC into EIPC anymore.  Needed
 121         to make user-defined traps work right.
 122         * simops.c (OP_*):  Use new memory subsystem.
 123         * (OP_14007E0 (reti)):  Implement reti.
 124         * (OP_14996E0 (trap)):  Implement user-defined traps.  Move I/O to
 125         trap 31.  Use new memory subsystem.
 126         * v850_sim.h:  Prototypes for load_mem, store_mem and map.  Use
 127         load_mem in RLW macro.
 128
 129 Fri Sep 27 18:34:09 1996  Stu Grossman  (grossman@critters.cygnus.com)
 130
 131         * gencode.c (write_opcodes):  Output hex values for opcode mask
 132         and patterns.
 133         * interp.c (sim_resume):  Save and restore PC from the appropriate
 134         register.
 135         * (sim_fetch_register sim_store_register):  Fix byte-order problem
 136         with reading and writing registers.
 137         * simops.c (OP_FFFF):  Implement pseudo-breakpoint insn.
 138
 139 Fri Sep 27 17:42:37 1996  Jeffrey A Law  (law@cygnus.com)
 140
 141         * simops.c (trace_input): Fix thinko.
 142
 143 Wed Sep 18 09:54:12 1996  Michael Meissner  <meissner@tiktok.cygnus.com>
 144
 145         * simops.c (exec_bfd): Rename from sim_bfd.
 146         (trace_input): Ditto.
 147
 148 Thu Sep 12 12:03:05 1996  Michael Meissner  <meissner@tiktok.cygnus.com>
 149
 150         * simops.c (trace_input): Use find_nearest_line to print line
 151         number, function name or file name of PC.
 152
 153 Wed Sep 11 16:44:37 1996  Michael Meissner  <meissner@tiktok.cygnus.com>
 154
 155         * simops.c: Add tracing support.  Use SEXTxx macros instead of
 156         doing hardwired shifts.
 157
 158         * configure.in (--enable-sim-cflags): Add switch to add additional
 159         flags to simulator buld.  If --enable-sim-cflags=trace, turn on
 160         tracing.
 161         * configure: Regenerate.
 162
 163         * Makefile.in: Don't require a VPATH capable make if configuring
 164         in the same directory.  Don't use CFLAGS for configuration flags.
 165         Add flags from --enable-sim-cflags.  Support canadian cross
 166         builds.  Rebuild whole simulator if include files change.
 167
 168         * interp.c (v850_debug): New global for debugging.
 169         (lookup_hash,sim_size,sim_set_profile): Use
 170         printf_filtered callback, instead of calling printf directly.
 171         (sim_{open,trace}): Enable tracing if -t and compiled for tracing.
 172
 173         * v850_sim.h: Use limits.h to set the various sized types.
 174         (SEXT{5,7,16,22}): New macros.
 175
 176 Mon Sep  9 20:50:46 1996  Jeffrey A Law  (law@cygnus.com)
 177
 178         * interp.c (hash): Make this an inline function
 179         when compiling with GCC.  Simplify.
 180         * simpos.c: Explicitly include "sys/syscall.h".  Remove
 181         some #if 0'd code.  Enable more emulated syscalls.
 182
 183 Wed Sep  4 01:48:55 1996  Jeffrey A Law  (law@cygnus.com)
 184
 185         * interp.c: Fix sign bit handling for add and sub instructions.
 186
 187 Tue Sep  3 10:20:30 1996  Jeffrey A Law  (law@cygnus.com)
 188
 189         * gencode.c: Fix various indention & style problems.
 190         Remove test code.  Remove #if 0 code.
 191         * interp.c: Provide prototypes for all static functions.
 192         Fix minor indention problems.
 193         (sim_open, sim_resume): Remove unused variables.
 194         (sim_read): Return type is "int".
 195         * simops.c: Remove unused variables.
 196         (divh): Make result of divide-by-zero zero.
 197         (setf): Initialize result to keep compiler quiet.
 198         (sar instructions): These just clear the overflow bit.
 199         * v850_sim.h: Provide prototypes for put_byte, put_half
 200         and put_word.
 201
 202         * interp.c: OP should be an array of 32bit operands!
 203         (v850_callback): Declare.
 204         (do_format_5): Fix extraction of OP[0].
 205         (sim_size): Remove debugging printf.
 206         (sim_set_callbacks): Do something useful.
 207         (sim_stop_reason): Gross hacks to get c-torture running.
 208         * simops.c: Simplify code for computing targets of bCC
 209         insns.   Invert 's' bit if 'ov' bit is set for some
 210         instructions.  Fix 'cy' bit handling for numerous
 211         instructions.  Make the simulator stop when a halt
 212         instruction is encountered.  Very crude support for
 213         emulated syscalls (trap 0).
 214         * v850_sim.h: Include "callback.h" and declare
 215         v850_callback.  Items in the operand array are 32bits.
 216
 217 Sun Sep  1 22:35:35 1996  Jeffrey A Law  (law@cygnus.com)
 218
 219         * interp.c (sim_resume): Fix code to check for a format 3
 220         opcode.
 221         * simops.c: bCC insns only argument is a constant, not a
 222         register value (duh...)
 223
 224 Fri Aug 30 10:33:49 1996  Jeffrey A Law  (law@cygnus.com)
 225
 226         * simops.c: Fix "not1" and "set1".
 227
 228         * simops.c: Don't forget to initialize temp for
 229         "ld.h" and "ld.w"
 230
 231         * interp.c: Remove various debugging printfs.
 232
 233         * simops.c: Fix satadd, satsub boundary case handling.
 234
 235         * interp.c (hash): Fix.
 236         * interp.c (do_format_8): Get operands correctly and
 237         call the target function.
 238         * simops.c: Rough cut at "clr1", "not1", "set1", and "tst1".
 239
 240 Thu Aug 29 13:53:29 1996  Jeffrey A Law  (law@cygnus.com)
 241
 242         * interp.c (do_format_4): Get operands correctly and
 243         call the target function.
 244         * simops.c: Rough cut at "sld.b", "sld.h", "sld.w", "sst.b",
 245         "sst.h", and "sst.w".
 246
 247         * v850_sim.h: The V850 doesn't have split I&D spaces.  Change
 248         accordingly.  Remove many unused definitions.
 249         * interp.c: The V850 doesn't have split I&D spaces.  Change
 250         accordingly.
 251         (get_longlong, get_longword, get_word): Deleted.
 252         (write_longlong, write_longword, write_word): Deleted.
 253         (get_operands): Deleted.
 254         (get_byte, get_half, get_word): New functions.
 255         (put_byte, put_half, put_word): New functions.
 256         * simops.c: Remove unused functions.  Rough cut at
 257         "ld.b", "ld.h", "ld.w", "st.b", "st.h", "st.w" insns.
 258
 259         * v850_sim.h (struct _state): Remove "psw" field.  Add
 260         "sregs" field.
 261         (PSW): Remove bogus definition.
 262         * simops.c: Change condition code handling to use the psw
 263         register within the sregs array.  Handle "ldsr" and "stsr".
 264
 265         * simops.c: Handle "satadd", "satsub", "satsubi", "satsubr".
 266
 267         * interp.c (do_format_5): Get operands correctly and
 268         call the target function.
 269         (sim_resume): Don't do a PC update for format 5 instructions.
 270         * simops.c: Handle "jarl" and "jmp" instructions.
 271
 272         * simops.c: Fix minor typos.  Handle "cmp", "setf", "tst"
 273         "di", and "ei" instructions correctly.
 274
 275         * interp.c (do_format_3): Get operands correctly and call
 276         the target function.
 277         * simops.c: Handle bCC instructions.
 278
 279         * simops.c: Add condition code handling to shift insns.
 280         Fix minor typos in condition code handling for other insns.
 281
 282         * Makefile.in: Fix typo.
 283         * simops.c: Add condition code handling to "sub" "subr" and
 284         "divh" instructions.
 285
 286         * interp.c (hash): Update to be more accurate.
 287         (lookup_hash): Call hash rather than computing the hash
 288         code here.
 289         (do_format_1_2): Handle format 1 and format 2 instructions.
 290         Get operands correctly and call the target function.
 291         (do_format_6): Get operands correctly and call the target
 292         function.
 293         (do_formats_9_10): Rough cut so shift ops will work.
 294         (sim_resume): Tweak to deal with format 1 and format 2
 295         handling in a single funtion.  Don't update the PC
 296         for format 3 insns.  Fix typos.
 297         * simops.c: Slightly reorganize.  Add condition code handling
 298         to "add", "addi", "and", "andi", "or", "ori", "xor", "xori"
 299         and "not" instructions.
 300         * v850_sim.h (reg_t): Registers are 32bits.
 301         (_state): The V850 has 32 general registers.  Add a 32bit
 302         psw and pc register too.  Add accessor macros
 303
 304         * Makefile.in, interp.c, v850_sim.h: Bring over endianness
 305         changes from the d10v simulator.
 306
 307         * simops.c: Add shift support.
 308
 309         * simops.c: Add multiply & divide support.  Abort for system
 310         instructions.
 311
 312         * simops.c: Add logicals, mov, movhi, movea, add, addi, sub
 313         and subr.  No condition codes yet.
 314
 315 Wed Aug 28 13:53:22 1996  Jeffrey A Law  (law@cygnus.com)
 316
 317         * ChangeLog, Makefile.in, configure, configure.in, v850_sim.h,
 318         gencode.c, interp.c, simops.c: Created.
 319