sim/v850/ChangeLog

   1 Thu Oct 31 14:44:10 1996  Gavin Koch  <gavin@cygnus.com>
   2
   3         * simops.c: Include <sys/time.h> for struct timeval and
   4         struct timezone.
   5
   6 Wed Oct 30 08:49:10 1996  Jeffrey A Law  (law@cygnus.com)
   7
   8         * simops.c (OP_10007E0): Handle SYS_times and SYS_gettimeofday.
   9
  10         * simops.c (OP_10007E0): Handle SYS_time.
  11
  12 Tue Oct 29 14:22:55 1996  Jeffrey A Law  (law@cygnus.com)
  13
  14         * simops.c: Include <sys/stat.h>.
  15         (OP_10007E0): Handle SYS_stat.
  16
  17 Thu Oct 24 12:26:35 1996  Jeffrey A Law  (law@cygnus.com)
  18
  19         * simops.c (OP_10007E0): Don't declare errno.
  20
  21         * simops.c (OP_500): Mask off low bit in displacement
  22         for sld.w.
  23         (OP_501): Similarly.
  24
  25         * simops.c (OP_500): Fix displacement handling for sld.w.
  26         (OP_501): Similarly for sst.w.
  27
  28         * simops.c (trace_input): Remove all references to SEXT7.
  29         (OP_300, OP_400, OP_500, OP_380, OP_480, OP_501): Displacement
  30         is zero extended for sst/sld instructions.
  31         * v850_sim.h (SEX7): Delete.  It's no longer needed (and it
  32         was incorrect anyway).
  33
  34 Thu Oct 24 10:33:33 1996  Stu Grossman  (grossman@critters.cygnus.com)
  35
  36         * Makefile.in:  Get rid of srcroot.  Set all INSTALL macros via
  37         autoconf.
  38         * gencode.c (write_opcodes):  Pad operands field to account for
  39         MSVC braindamage.
  40         * simops.c:  Include errno.h.  Exclude SYS_chown, since MSVC
  41         doesn't support it.  (Why is this here in the first place?!?)
  42         * v850_sim.h:  Get rid of 64 bit defs.  Also, get rid of #elif's.
  43         Change number of operands in struct simops from 9 to 6.  Define
  44         SIGTRAP and SIGQUIT for MSVC.
  45
  46 Tue Oct 15 16:19:51 1996  Stu Grossman  (grossman@critters.cygnus.com)
  47
  48         * interp.c (MEM_SIZE):  It's now bytes, not a power of 2.
  49         * (map):  Add support for external mem in the 1->2 meg range.
  50         Also, abort() when memory access is way out of bounds.  (Better to
  51         die than to give wrong result.  (This will be fixed later.))
  52         * (sim_size):  MEM_SIZE is now bytes, not shift factor.
  53
  54 Tue Oct  1 15:53:24 1996  Gavin Koch <gavin@cygnus.com>
  55
  56         * simops.c (trace_input): Swapped order of operands for output
  57         output of OP_IMM_REG.  Changed the fetching of the operands for
  58         OP_LOAD32, and OP_STORE32 to work like op-function.
  59
  60 Mon Sep 30 15:46:33 1996  Stu Grossman  (grossman@critters.cygnus.com)
  61
  62         * interp.c:  Move includes of remote-sim.h and callback.h to
  63         v850-sim.h.
  64         * (lookup_hash): Add PC to report of hash failure.
  65         * (map load_mem store_mem):  New memory subsystem.  Models V851
  66         memory system.
  67         * (sim_write sim_read):  Use new memory subsystem.
  68         * (sim_resume):  Don't load and save PC into EIPC anymore.  Needed
  69         to make user-defined traps work right.
  70         * simops.c (OP_*):  Use new memory subsystem.
  71         * (OP_14007E0 (reti)):  Implement reti.
  72         * (OP_14996E0 (trap)):  Implement user-defined traps.  Move I/O to
  73         trap 31.  Use new memory subsystem.
  74         * v850_sim.h:  Prototypes for load_mem, store_mem and map.  Use
  75         load_mem in RLW macro.
  76
  77 Fri Sep 27 18:34:09 1996  Stu Grossman  (grossman@critters.cygnus.com)
  78
  79         * gencode.c (write_opcodes):  Output hex values for opcode mask
  80         and patterns.
  81         * interp.c (sim_resume):  Save and restore PC from the appropriate
  82         register.
  83         * (sim_fetch_register sim_store_register):  Fix byte-order problem
  84         with reading and writing registers.
  85         * simops.c (OP_FFFF):  Implement pseudo-breakpoint insn.
  86
  87 Fri Sep 27 17:42:37 1996  Jeffrey A Law  (law@cygnus.com)
  88
  89         * simops.c (trace_input): Fix thinko.
  90
  91 Wed Sep 18 09:54:12 1996  Michael Meissner  <meissner@tiktok.cygnus.com>
  92
  93         * simops.c (exec_bfd): Rename from sim_bfd.
  94         (trace_input): Ditto.
  95
  96 Thu Sep 12 12:03:05 1996  Michael Meissner  <meissner@tiktok.cygnus.com>
  97
  98         * simops.c (trace_input): Use find_nearest_line to print line
  99         number, function name or file name of PC.
 100
 101 Wed Sep 11 16:44:37 1996  Michael Meissner  <meissner@tiktok.cygnus.com>
 102
 103         * simops.c: Add tracing support.  Use SEXTxx macros instead of
 104         doing hardwired shifts.
 105
 106         * configure.in (--enable-sim-cflags): Add switch to add additional
 107         flags to simulator buld.  If --enable-sim-cflags=trace, turn on
 108         tracing.
 109         * configure: Regenerate.
 110
 111         * Makefile.in: Don't require a VPATH capable make if configuring
 112         in the same directory.  Don't use CFLAGS for configuration flags.
 113         Add flags from --enable-sim-cflags.  Support canadian cross
 114         builds.  Rebuild whole simulator if include files change.
 115
 116         * interp.c (v850_debug): New global for debugging.
 117         (lookup_hash,sim_size,sim_set_profile): Use
 118         printf_filtered callback, instead of calling printf directly.
 119         (sim_{open,trace}): Enable tracing if -t and compiled for tracing.
 120
 121         * v850_sim.h: Use limits.h to set the various sized types.
 122         (SEXT{5,7,16,22}): New macros.
 123
 124 Mon Sep  9 20:50:46 1996  Jeffrey A Law  (law@cygnus.com)
 125
 126         * interp.c (hash): Make this an inline function
 127         when compiling with GCC.  Simplify.
 128         * simpos.c: Explicitly include "sys/syscall.h".  Remove
 129         some #if 0'd code.  Enable more emulated syscalls.
 130
 131 Wed Sep  4 01:48:55 1996  Jeffrey A Law  (law@cygnus.com)
 132
 133         * interp.c: Fix sign bit handling for add and sub instructions.
 134
 135 Tue Sep  3 10:20:30 1996  Jeffrey A Law  (law@cygnus.com)
 136
 137         * gencode.c: Fix various indention & style problems.
 138         Remove test code.  Remove #if 0 code.
 139         * interp.c: Provide prototypes for all static functions.
 140         Fix minor indention problems.
 141         (sim_open, sim_resume): Remove unused variables.
 142         (sim_read): Return type is "int".
 143         * simops.c: Remove unused variables.
 144         (divh): Make result of divide-by-zero zero.
 145         (setf): Initialize result to keep compiler quiet.
 146         (sar instructions): These just clear the overflow bit.
 147         * v850_sim.h: Provide prototypes for put_byte, put_half
 148         and put_word.
 149
 150         * interp.c: OP should be an array of 32bit operands!
 151         (v850_callback): Declare.
 152         (do_format_5): Fix extraction of OP[0].
 153         (sim_size): Remove debugging printf.
 154         (sim_set_callbacks): Do something useful.
 155         (sim_stop_reason): Gross hacks to get c-torture running.
 156         * simops.c: Simplify code for computing targets of bCC
 157         insns.   Invert 's' bit if 'ov' bit is set for some
 158         instructions.  Fix 'cy' bit handling for numerous
 159         instructions.  Make the simulator stop when a halt
 160         instruction is encountered.  Very crude support for
 161         emulated syscalls (trap 0).
 162         * v850_sim.h: Include "callback.h" and declare
 163         v850_callback.  Items in the operand array are 32bits.
 164
 165 Sun Sep  1 22:35:35 1996  Jeffrey A Law  (law@cygnus.com)
 166
 167         * interp.c (sim_resume): Fix code to check for a format 3
 168         opcode.
 169         * simops.c: bCC insns only argument is a constant, not a
 170         register value (duh...)
 171
 172 Fri Aug 30 10:33:49 1996  Jeffrey A Law  (law@cygnus.com)
 173
 174         * simops.c: Fix "not1" and "set1".
 175
 176         * simops.c: Don't forget to initialize temp for
 177         "ld.h" and "ld.w"
 178
 179         * interp.c: Remove various debugging printfs.
 180
 181         * simops.c: Fix satadd, satsub boundary case handling.
 182
 183         * interp.c (hash): Fix.
 184         * interp.c (do_format_8): Get operands correctly and
 185         call the target function.
 186         * simops.c: Rough cut at "clr1", "not1", "set1", and "tst1".
 187
 188 Thu Aug 29 13:53:29 1996  Jeffrey A Law  (law@cygnus.com)
 189
 190         * interp.c (do_format_4): Get operands correctly and
 191         call the target function.
 192         * simops.c: Rough cut at "sld.b", "sld.h", "sld.w", "sst.b",
 193         "sst.h", and "sst.w".
 194
 195         * v850_sim.h: The V850 doesn't have split I&D spaces.  Change
 196         accordingly.  Remove many unused definitions.
 197         * interp.c: The V850 doesn't have split I&D spaces.  Change
 198         accordingly.
 199         (get_longlong, get_longword, get_word): Deleted.
 200         (write_longlong, write_longword, write_word): Deleted.
 201         (get_operands): Deleted.
 202         (get_byte, get_half, get_word): New functions.
 203         (put_byte, put_half, put_word): New functions.
 204         * simops.c: Remove unused functions.  Rough cut at
 205         "ld.b", "ld.h", "ld.w", "st.b", "st.h", "st.w" insns.
 206
 207         * v850_sim.h (struct _state): Remove "psw" field.  Add
 208         "sregs" field.
 209         (PSW): Remove bogus definition.
 210         * simops.c: Change condition code handling to use the psw
 211         register within the sregs array.  Handle "ldsr" and "stsr".
 212
 213         * simops.c: Handle "satadd", "satsub", "satsubi", "satsubr".
 214
 215         * interp.c (do_format_5): Get operands correctly and
 216         call the target function.
 217         (sim_resume): Don't do a PC update for format 5 instructions.
 218         * simops.c: Handle "jarl" and "jmp" instructions.
 219
 220         * simops.c: Fix minor typos.  Handle "cmp", "setf", "tst"
 221         "di", and "ei" instructions correctly.
 222
 223         * interp.c (do_format_3): Get operands correctly and call
 224         the target function.
 225         * simops.c: Handle bCC instructions.
 226
 227         * simops.c: Add condition code handling to shift insns.
 228         Fix minor typos in condition code handling for other insns.
 229
 230         * Makefile.in: Fix typo.
 231         * simops.c: Add condition code handling to "sub" "subr" and
 232         "divh" instructions.
 233
 234         * interp.c (hash): Update to be more accurate.
 235         (lookup_hash): Call hash rather than computing the hash
 236         code here.
 237         (do_format_1_2): Handle format 1 and format 2 instructions.
 238         Get operands correctly and call the target function.
 239         (do_format_6): Get operands correctly and call the target
 240         function.
 241         (do_formats_9_10): Rough cut so shift ops will work.
 242         (sim_resume): Tweak to deal with format 1 and format 2
 243         handling in a single funtion.  Don't update the PC
 244         for format 3 insns.  Fix typos.
 245         * simops.c: Slightly reorganize.  Add condition code handling
 246         to "add", "addi", "and", "andi", "or", "ori", "xor", "xori"
 247         and "not" instructions.
 248         * v850_sim.h (reg_t): Registers are 32bits.
 249         (_state): The V850 has 32 general registers.  Add a 32bit
 250         psw and pc register too.  Add accessor macros
 251
 252         * Makefile.in, interp.c, v850_sim.h: Bring over endianness
 253         changes from the d10v simulator.
 254
 255         * simops.c: Add shift support.
 256
 257         * simops.c: Add multiply & divide support.  Abort for system
 258         instructions.
 259
 260         * simops.c: Add logicals, mov, movhi, movea, add, addi, sub
 261         and subr.  No condition codes yet.
 262
 263 Wed Aug 28 13:53:22 1996  Jeffrey A Law  (law@cygnus.com)
 264
 265         * ChangeLog, Makefile.in, configure, configure.in, v850_sim.h,
 266         gencode.c, interp.c, simops.c: Created.
 267