Ref gdb/11763 - can't stop a running simulator:
[binutils-gdb.git] / sim / v850 / ChangeLog
1 Fri Apr 18 14:17:12 1997 Andrew Cagney <cagney@b1.cygnus.com>
2
3 * interp.c (sim_stop): Stub function.
4
5 Thu Apr 17 03:53:18 1997 Doug Evans <dje@canuck.cygnus.com>
6
7 * Makefile.in (SIM_OBJS): Add sim-load.o.
8 * interp.c (sim_kind, myname): New static locals.
9 (sim_open): Set sim_kind, myname. Ignore -E arg.
10 (sim_load): Return SIM_RC. New arg abfd. Call sim_load_file to
11 load file into simulator. Set start address from bfd.
12 (sim_create_inferior): Return SIM_RC. Delete arg start_address.
13
14 Wed Apr 16 19:53:55 1997 Andrew Cagney <cagney@b1.cygnus.com>
15
16 * simops.c (OP_10007E0): Only provide system calls SYS_execv,
17 SYS_wait, SYS_wait, SYS_utime, SYS_time if defined by the host.
18
19 Mon Apr 7 15:45:02 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
20
21 * configure: Regenerated to track ../common/aclocal.m4 changes.
22 * config.in: Ditto.
23
24 Wed Apr 2 15:06:28 1997 Doug Evans <dje@canuck.cygnus.com>
25
26 * interp.c (sim_open): New arg `kind'.
27
28 * configure: Regenerated to track ../common/aclocal.m4 changes.
29
30 Wed Apr 2 14:34:19 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
31
32 * configure: Regenerated to track ../common/aclocal.m4 changes.
33
34 Wed Mar 19 01:14:00 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
35
36 * configure: Regenerated to track ../common/aclocal.m4 changes.
37
38 Mon Mar 17 15:10:07 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
39
40 * configure: Re-generate.
41
42 Fri Mar 14 10:34:11 1997 Michael Meissner <meissner@cygnus.com>
43
44 * configure: Regenerate to track ../common/aclocal.m4 changes.
45
46 Thu Mar 13 13:00:54 1997 Doug Evans <dje@canuck.cygnus.com>
47
48 * interp.c (sim_open): New SIM_DESC result. Argument is now
49 in argv form.
50 (other sim_*): New SIM_DESC argument.
51
52 Tue Feb 4 13:33:30 1997 Doug Evans <dje@canuck.cygnus.com>
53
54 * Makefile.in (@COMMON_MAKEFILE_FRAG): Use
55 COMMON_{PRE,POST}_CONFIG_FRAG instead.
56 * configure.in: sinclude ../common/aclocal.m4.
57 * configure: Regenerated.
58
59 Thu Jan 23 11:46:23 1997 Stu Grossman (grossman@critters.cygnus.com)
60
61 * configure configure.in Makefile.in: Update to new configure
62 scheme which is more compatible with WinGDB builds.
63 * configure.in: Improve comment on how to run autoconf.
64 * configure: Re-run autoconf to get new ../common/aclocal.m4.
65 * Makefile.in: Use autoconf substitution to install common
66 makefile fragment.
67
68 Mon Jan 20 16:05:34 1997 Michael Meissner <meissner@tiktok.cygnus.com>
69
70 * simops.c (OP_{E0,2E0,6E0}): The multiply operations sign extend,
71 not zero extend.
72
73 Tue Jan 14 17:06:03 1997 Stu Grossman (grossman@critters.cygnus.com)
74
75 * simops.c: Put ifdefs around things to make MSVC happy. Get rid
76 of unistd.h. Disable SYS_stat, SYS_chown, SYS_time, SYS_times,
77 SYS_gettimeofday and SYS_utime from MSVC.
78
79 Tue Dec 31 18:11:13 1996 Michael Meissner <meissner@tiktok.cygnus.com>
80
81 * simops.c (OP_10007E0): Know that kill encodes the signal number
82 via: 0xdead0000 | signal and turn it back into a signal.
83
84 Fri Dec 27 14:44:06 1996 Michael Meissner <meissner@tiktok.cygnus.com>
85
86 * v850_sim.h (SIG_V850_EXIT): Define as -1.
87
88 * interp.c (sim_open): Cast calloc function.
89 (sim_stop_reason): If signal is SIG_V850_EXIT, inform gdb the
90 program exited with the appropriate exit code.
91 (sim_set_interrupt): Declare buildargv.
92
93 * simops.c (OP_10007E0): Make exit signal normal exit. Make time
94 type correct and work on big endian systems.
95
96 Wed Nov 20 02:18:44 1996 Doug Evans <dje@canuck.cygnus.com>
97
98 * Makefile.in: Delete stuff moved to ../common/Make-common.in.
99 (SIM_OBJS,SIM_EXTRA_CFLAGS,SIM_EXTRA_CLEAN): Define.
100 * configure.in: Simplify using macros in ../common/aclocal.m4.
101 Call AC_CHECK_HEADERS(unistd.h).
102 * configure: Regenerated.
103 * config.in: New file.
104 * simops.c: #include "config.h". #include <unistd.h> if present.
105
106 Sun Nov 3 23:02:54 1996 Stan Shebs <shebs@andros.cygnus.com>
107
108 * v850_sim.h (State): New slots dummy_mem, pending_nmi.
109 (EIPC, etc): New macros for system registers.
110 * simops.c, interp.c: Use everywhere.
111
112 * interp.c: Add support for interrupts issued by interrupt
113 generators, either PC- or time-based. Controlled by simulator
114 command "sim interrupt".
115
116 * interp.c: Add support for variable-size allocation of memory,
117 via simulator command "sim memory-map".
118 (map): Issue SIGSEGV for references to invalid memory regions.
119
120 Thu Oct 31 14:44:10 1996 Gavin Koch <gavin@cygnus.com>
121
122 * simops.c: Include <sys/time.h> for struct timeval and
123 struct timezone.
124
125 Wed Oct 30 08:49:10 1996 Jeffrey A Law (law@cygnus.com)
126
127 * simops.c (OP_10007E0): Handle SYS_times and SYS_gettimeofday.
128
129 * simops.c (OP_10007E0): Handle SYS_time.
130
131 Tue Oct 29 14:22:55 1996 Jeffrey A Law (law@cygnus.com)
132
133 * simops.c: Include <sys/stat.h>.
134 (OP_10007E0): Handle SYS_stat.
135
136 Thu Oct 24 12:26:35 1996 Jeffrey A Law (law@cygnus.com)
137
138 * simops.c (OP_10007E0): Don't declare errno.
139
140 * simops.c (OP_500): Mask off low bit in displacement
141 for sld.w.
142 (OP_501): Similarly.
143
144 * simops.c (OP_500): Fix displacement handling for sld.w.
145 (OP_501): Similarly for sst.w.
146
147 * simops.c (trace_input): Remove all references to SEXT7.
148 (OP_300, OP_400, OP_500, OP_380, OP_480, OP_501): Displacement
149 is zero extended for sst/sld instructions.
150 * v850_sim.h (SEX7): Delete. It's no longer needed (and it
151 was incorrect anyway).
152
153 Thu Oct 24 10:33:33 1996 Stu Grossman (grossman@critters.cygnus.com)
154
155 * Makefile.in: Get rid of srcroot. Set all INSTALL macros via
156 autoconf.
157 * gencode.c (write_opcodes): Pad operands field to account for
158 MSVC braindamage.
159 * simops.c: Include errno.h. Exclude SYS_chown, since MSVC
160 doesn't support it. (Why is this here in the first place?!?)
161 * v850_sim.h: Get rid of 64 bit defs. Also, get rid of #elif's.
162 Change number of operands in struct simops from 9 to 6. Define
163 SIGTRAP and SIGQUIT for MSVC.
164
165 Tue Oct 15 16:19:51 1996 Stu Grossman (grossman@critters.cygnus.com)
166
167 * interp.c (MEM_SIZE): It's now bytes, not a power of 2.
168 * (map): Add support for external mem in the 1->2 meg range.
169 Also, abort() when memory access is way out of bounds. (Better to
170 die than to give wrong result. (This will be fixed later.))
171 * (sim_size): MEM_SIZE is now bytes, not shift factor.
172
173 Tue Oct 1 15:53:24 1996 Gavin Koch <gavin@cygnus.com>
174
175 * simops.c (trace_input): Swapped order of operands for output
176 output of OP_IMM_REG. Changed the fetching of the operands for
177 OP_LOAD32, and OP_STORE32 to work like op-function.
178
179 Mon Sep 30 15:46:33 1996 Stu Grossman (grossman@critters.cygnus.com)
180
181 * interp.c: Move includes of remote-sim.h and callback.h to
182 v850-sim.h.
183 * (lookup_hash): Add PC to report of hash failure.
184 * (map load_mem store_mem): New memory subsystem. Models V851
185 memory system.
186 * (sim_write sim_read): Use new memory subsystem.
187 * (sim_resume): Don't load and save PC into EIPC anymore. Needed
188 to make user-defined traps work right.
189 * simops.c (OP_*): Use new memory subsystem.
190 * (OP_14007E0 (reti)): Implement reti.
191 * (OP_14996E0 (trap)): Implement user-defined traps. Move I/O to
192 trap 31. Use new memory subsystem.
193 * v850_sim.h: Prototypes for load_mem, store_mem and map. Use
194 load_mem in RLW macro.
195
196 Fri Sep 27 18:34:09 1996 Stu Grossman (grossman@critters.cygnus.com)
197
198 * gencode.c (write_opcodes): Output hex values for opcode mask
199 and patterns.
200 * interp.c (sim_resume): Save and restore PC from the appropriate
201 register.
202 * (sim_fetch_register sim_store_register): Fix byte-order problem
203 with reading and writing registers.
204 * simops.c (OP_FFFF): Implement pseudo-breakpoint insn.
205
206 Fri Sep 27 17:42:37 1996 Jeffrey A Law (law@cygnus.com)
207
208 * simops.c (trace_input): Fix thinko.
209
210 Wed Sep 18 09:54:12 1996 Michael Meissner <meissner@tiktok.cygnus.com>
211
212 * simops.c (exec_bfd): Rename from sim_bfd.
213 (trace_input): Ditto.
214
215 Thu Sep 12 12:03:05 1996 Michael Meissner <meissner@tiktok.cygnus.com>
216
217 * simops.c (trace_input): Use find_nearest_line to print line
218 number, function name or file name of PC.
219
220 Wed Sep 11 16:44:37 1996 Michael Meissner <meissner@tiktok.cygnus.com>
221
222 * simops.c: Add tracing support. Use SEXTxx macros instead of
223 doing hardwired shifts.
224
225 * configure.in (--enable-sim-cflags): Add switch to add additional
226 flags to simulator buld. If --enable-sim-cflags=trace, turn on
227 tracing.
228 * configure: Regenerate.
229
230 * Makefile.in: Don't require a VPATH capable make if configuring
231 in the same directory. Don't use CFLAGS for configuration flags.
232 Add flags from --enable-sim-cflags. Support canadian cross
233 builds. Rebuild whole simulator if include files change.
234
235 * interp.c (v850_debug): New global for debugging.
236 (lookup_hash,sim_size,sim_set_profile): Use
237 printf_filtered callback, instead of calling printf directly.
238 (sim_{open,trace}): Enable tracing if -t and compiled for tracing.
239
240 * v850_sim.h: Use limits.h to set the various sized types.
241 (SEXT{5,7,16,22}): New macros.
242
243 Mon Sep 9 20:50:46 1996 Jeffrey A Law (law@cygnus.com)
244
245 * interp.c (hash): Make this an inline function
246 when compiling with GCC. Simplify.
247 * simpos.c: Explicitly include "sys/syscall.h". Remove
248 some #if 0'd code. Enable more emulated syscalls.
249
250 Wed Sep 4 01:48:55 1996 Jeffrey A Law (law@cygnus.com)
251
252 * interp.c: Fix sign bit handling for add and sub instructions.
253
254 Tue Sep 3 10:20:30 1996 Jeffrey A Law (law@cygnus.com)
255
256 * gencode.c: Fix various indention & style problems.
257 Remove test code. Remove #if 0 code.
258 * interp.c: Provide prototypes for all static functions.
259 Fix minor indention problems.
260 (sim_open, sim_resume): Remove unused variables.
261 (sim_read): Return type is "int".
262 * simops.c: Remove unused variables.
263 (divh): Make result of divide-by-zero zero.
264 (setf): Initialize result to keep compiler quiet.
265 (sar instructions): These just clear the overflow bit.
266 * v850_sim.h: Provide prototypes for put_byte, put_half
267 and put_word.
268
269 * interp.c: OP should be an array of 32bit operands!
270 (v850_callback): Declare.
271 (do_format_5): Fix extraction of OP[0].
272 (sim_size): Remove debugging printf.
273 (sim_set_callbacks): Do something useful.
274 (sim_stop_reason): Gross hacks to get c-torture running.
275 * simops.c: Simplify code for computing targets of bCC
276 insns. Invert 's' bit if 'ov' bit is set for some
277 instructions. Fix 'cy' bit handling for numerous
278 instructions. Make the simulator stop when a halt
279 instruction is encountered. Very crude support for
280 emulated syscalls (trap 0).
281 * v850_sim.h: Include "callback.h" and declare
282 v850_callback. Items in the operand array are 32bits.
283
284 Sun Sep 1 22:35:35 1996 Jeffrey A Law (law@cygnus.com)
285
286 * interp.c (sim_resume): Fix code to check for a format 3
287 opcode.
288 * simops.c: bCC insns only argument is a constant, not a
289 register value (duh...)
290
291 Fri Aug 30 10:33:49 1996 Jeffrey A Law (law@cygnus.com)
292
293 * simops.c: Fix "not1" and "set1".
294
295 * simops.c: Don't forget to initialize temp for
296 "ld.h" and "ld.w"
297
298 * interp.c: Remove various debugging printfs.
299
300 * simops.c: Fix satadd, satsub boundary case handling.
301
302 * interp.c (hash): Fix.
303 * interp.c (do_format_8): Get operands correctly and
304 call the target function.
305 * simops.c: Rough cut at "clr1", "not1", "set1", and "tst1".
306
307 Thu Aug 29 13:53:29 1996 Jeffrey A Law (law@cygnus.com)
308
309 * interp.c (do_format_4): Get operands correctly and
310 call the target function.
311 * simops.c: Rough cut at "sld.b", "sld.h", "sld.w", "sst.b",
312 "sst.h", and "sst.w".
313
314 * v850_sim.h: The V850 doesn't have split I&D spaces. Change
315 accordingly. Remove many unused definitions.
316 * interp.c: The V850 doesn't have split I&D spaces. Change
317 accordingly.
318 (get_longlong, get_longword, get_word): Deleted.
319 (write_longlong, write_longword, write_word): Deleted.
320 (get_operands): Deleted.
321 (get_byte, get_half, get_word): New functions.
322 (put_byte, put_half, put_word): New functions.
323 * simops.c: Remove unused functions. Rough cut at
324 "ld.b", "ld.h", "ld.w", "st.b", "st.h", "st.w" insns.
325
326 * v850_sim.h (struct _state): Remove "psw" field. Add
327 "sregs" field.
328 (PSW): Remove bogus definition.
329 * simops.c: Change condition code handling to use the psw
330 register within the sregs array. Handle "ldsr" and "stsr".
331
332 * simops.c: Handle "satadd", "satsub", "satsubi", "satsubr".
333
334 * interp.c (do_format_5): Get operands correctly and
335 call the target function.
336 (sim_resume): Don't do a PC update for format 5 instructions.
337 * simops.c: Handle "jarl" and "jmp" instructions.
338
339 * simops.c: Fix minor typos. Handle "cmp", "setf", "tst"
340 "di", and "ei" instructions correctly.
341
342 * interp.c (do_format_3): Get operands correctly and call
343 the target function.
344 * simops.c: Handle bCC instructions.
345
346 * simops.c: Add condition code handling to shift insns.
347 Fix minor typos in condition code handling for other insns.
348
349 * Makefile.in: Fix typo.
350 * simops.c: Add condition code handling to "sub" "subr" and
351 "divh" instructions.
352
353 * interp.c (hash): Update to be more accurate.
354 (lookup_hash): Call hash rather than computing the hash
355 code here.
356 (do_format_1_2): Handle format 1 and format 2 instructions.
357 Get operands correctly and call the target function.
358 (do_format_6): Get operands correctly and call the target
359 function.
360 (do_formats_9_10): Rough cut so shift ops will work.
361 (sim_resume): Tweak to deal with format 1 and format 2
362 handling in a single funtion. Don't update the PC
363 for format 3 insns. Fix typos.
364 * simops.c: Slightly reorganize. Add condition code handling
365 to "add", "addi", "and", "andi", "or", "ori", "xor", "xori"
366 and "not" instructions.
367 * v850_sim.h (reg_t): Registers are 32bits.
368 (_state): The V850 has 32 general registers. Add a 32bit
369 psw and pc register too. Add accessor macros
370
371 * Makefile.in, interp.c, v850_sim.h: Bring over endianness
372 changes from the d10v simulator.
373
374 * simops.c: Add shift support.
375
376 * simops.c: Add multiply & divide support. Abort for system
377 instructions.
378
379 * simops.c: Add logicals, mov, movhi, movea, add, addi, sub
380 and subr. No condition codes yet.
381
382 Wed Aug 28 13:53:22 1996 Jeffrey A Law (law@cygnus.com)
383
384 * ChangeLog, Makefile.in, configure, configure.in, v850_sim.h,
385 gencode.c, interp.c, simops.c: Created.
386