sim/v850/ChangeLog

   1 Fri Aug 30 10:33:49 1996  Jeffrey A Law  (law@cygnus.com)
   2
   3         * interp.c: Remove various debugging printfs.
   4
   5         * simops.c: Fix satadd, satsub boundary case handling.
   6
   7         * interp.c (hash): Fix.
   8         * interp.c (do_format_8): Get operands correctly and
   9         call the target function.
  10         * simops.c: Rough cut at "clr1", "not1", "set1", and "tst1".
  11
  12 Thu Aug 29 13:53:29 1996  Jeffrey A Law  (law@cygnus.com)
  13
  14         * interp.c (do_format_4): Get operands correctly and
  15         call the target function.
  16         * simops.c: Rough cut at "sld.b", "sld.h", "sld.w", "sst.b",
  17         "sst.h", and "sst.w".
  18
  19         * v850_sim.h: The V850 doesn't have split I&D spaces.  Change
  20         accordingly.  Remove many unused definitions.
  21         * interp.c: The V850 doesn't have split I&D spaces.  Change
  22         accordingly.
  23         (get_longlong, get_longword, get_word): Deleted.
  24         (write_longlong, write_longword, write_word): Deleted.
  25         (get_operands): Deleted.
  26         (get_byte, get_half, get_word): New functions.
  27         (put_byte, put_half, put_word): New functions.
  28         * simops.c: Remove unused functions.  Rough cut at
  29         "ld.b", "ld.h", "ld.w", "st.b", "st.h", "st.w" insns.
  30
  31         * v850_sim.h (struct _state): Remove "psw" field.  Add
  32         "sregs" field.
  33         (PSW): Remove bogus definition.
  34         * simops.c: Change condition code handling to use the psw
  35         register within the sregs array.  Handle "ldsr" and "stsr".
  36
  37         * simops.c: Handle "satadd", "satsub", "satsubi", "satsubr".
  38
  39         * interp.c (do_format_5): Get operands correctly and
  40         call the target function.
  41         (sim_resume): Don't do a PC update for format 5 instructions.
  42         * simops.c: Handle "jarl" and "jmp" instructions.
  43
  44         * simops.c: Fix minor typos.  Handle "cmp", "setf", "tst"
  45         "di", and "ei" instructions correctly.
  46
  47         * interp.c (do_format_3): Get operands correctly and call
  48         the target function.
  49         * simops.c: Handle bCC instructions.
  50
  51         * simops.c: Add condition code handling to shift insns.
  52         Fix minor typos in condition code handling for other insns.
  53
  54         * Makefile.in: Fix typo.
  55         * simops.c: Add condition code handling to "sub" "subr" and
  56         "divh" instructions.
  57
  58         * interp.c (hash): Update to be more accurate.
  59         (lookup_hash): Call hash rather than computing the hash
  60         code here.
  61         (do_format_1_2): Handle format 1 and format 2 instructions.
  62         Get operands correctly and call the target function.
  63         (do_format_6): Get operands correctly and call the target
  64         function.
  65         (do_formats_9_10): Rough cut so shift ops will work.
  66         (sim_resume): Tweak to deal with format 1 and format 2
  67         handling in a single funtion.  Don't update the PC
  68         for format 3 insns.  Fix typos.
  69         * simops.c: Slightly reorganize.  Add condition code handling
  70         to "add", "addi", "and", "andi", "or", "ori", "xor", "xori"
  71         and "not" instructions.
  72         * v850_sim.h (reg_t): Registers are 32bits.
  73         (_state): The V850 has 32 general registers.  Add a 32bit
  74         psw and pc register too.  Add accessor macros
  75
  76         * Makefile.in, interp.c, v850_sim.h: Bring over endianness
  77         changes from the d10v simulator.
  78
  79         * simops.c: Add shift support.
  80
  81         * simops.c: Add multiply & divide support.  Abort for system
  82         instructions.
  83
  84         * simops.c: Add logicals, mov, movhi, movea, add, addi, sub
  85         and subr.  No condition codes yet.
  86
  87 Wed Aug 28 13:53:22 1996  Jeffrey A Law  (law@cygnus.com)
  88
  89         * ChangeLog, Makefile.in, configure, configure.in, v850_sim.h,
  90         gencode.c, interp.c, simops.c: Created.
  91