sim/v850/ChangeLog

   1 Fri Sep 27 17:42:37 1996  Jeffrey A Law  (law@cygnus.com)
   2
   3         * simops.c (trace_input): Fix thinko.
   4
   5 Wed Sep 18 09:54:12 1996  Michael Meissner  <meissner@tiktok.cygnus.com>
   6
   7         * simops.c (exec_bfd): Rename from sim_bfd.
   8         (trace_input): Ditto.
   9
  10 Thu Sep 12 12:03:05 1996  Michael Meissner  <meissner@tiktok.cygnus.com>
  11
  12         * simops.c (trace_input): Use find_nearest_line to print line
  13         number, function name or file name of PC.
  14
  15 Wed Sep 11 16:44:37 1996  Michael Meissner  <meissner@tiktok.cygnus.com>
  16
  17         * simops.c: Add tracing support.  Use SEXTxx macros instead of
  18         doing hardwired shifts.
  19
  20         * configure.in (--enable-sim-cflags): Add switch to add additional
  21         flags to simulator buld.  If --enable-sim-cflags=trace, turn on
  22         tracing.
  23         * configure: Regenerate.
  24
  25         * Makefile.in: Don't require a VPATH capable make if configuring
  26         in the same directory.  Don't use CFLAGS for configuration flags.
  27         Add flags from --enable-sim-cflags.  Support canadian cross
  28         builds.  Rebuild whole simulator if include files change.
  29
  30         * interp.c (v850_debug): New global for debugging.
  31         (lookup_hash,sim_size,sim_set_profile): Use
  32         printf_filtered callback, instead of calling printf directly.
  33         (sim_{open,trace}): Enable tracing if -t and compiled for tracing.
  34
  35         * v850_sim.h: Use limits.h to set the various sized types.
  36         (SEXT{5,7,16,22}): New macros.
  37
  38 Mon Sep  9 20:50:46 1996  Jeffrey A Law  (law@cygnus.com)
  39
  40         * interp.c (hash): Make this an inline function
  41         when compiling with GCC.  Simplify.
  42         * simpos.c: Explicitly include "sys/syscall.h".  Remove
  43         some #if 0'd code.  Enable more emulated syscalls.
  44
  45 Wed Sep  4 01:48:55 1996  Jeffrey A Law  (law@cygnus.com)
  46
  47         * interp.c: Fix sign bit handling for add and sub instructions.
  48
  49 Tue Sep  3 10:20:30 1996  Jeffrey A Law  (law@cygnus.com)
  50
  51         * gencode.c: Fix various indention & style problems.
  52         Remove test code.  Remove #if 0 code.
  53         * interp.c: Provide prototypes for all static functions.
  54         Fix minor indention problems.
  55         (sim_open, sim_resume): Remove unused variables.
  56         (sim_read): Return type is "int".
  57         * simops.c: Remove unused variables.
  58         (divh): Make result of divide-by-zero zero.
  59         (setf): Initialize result to keep compiler quiet.
  60         (sar instructions): These just clear the overflow bit.
  61         * v850_sim.h: Provide prototypes for put_byte, put_half
  62         and put_word.
  63
  64         * interp.c: OP should be an array of 32bit operands!
  65         (v850_callback): Declare.
  66         (do_format_5): Fix extraction of OP[0].
  67         (sim_size): Remove debugging printf.
  68         (sim_set_callbacks): Do something useful.
  69         (sim_stop_reason): Gross hacks to get c-torture running.
  70         * simops.c: Simplify code for computing targets of bCC
  71         insns.   Invert 's' bit if 'ov' bit is set for some
  72         instructions.  Fix 'cy' bit handling for numerous
  73         instructions.  Make the simulator stop when a halt
  74         instruction is encountered.  Very crude support for
  75         emulated syscalls (trap 0).
  76         * v850_sim.h: Include "callback.h" and declare
  77         v850_callback.  Items in the operand array are 32bits.
  78
  79 Sun Sep  1 22:35:35 1996  Jeffrey A Law  (law@cygnus.com)
  80
  81         * interp.c (sim_resume): Fix code to check for a format 3
  82         opcode.
  83         * simops.c: bCC insns only argument is a constant, not a
  84         register value (duh...)
  85
  86 Fri Aug 30 10:33:49 1996  Jeffrey A Law  (law@cygnus.com)
  87
  88         * simops.c: Fix "not1" and "set1".
  89
  90         * simops.c: Don't forget to initialize temp for
  91         "ld.h" and "ld.w"
  92
  93         * interp.c: Remove various debugging printfs.
  94
  95         * simops.c: Fix satadd, satsub boundary case handling.
  96
  97         * interp.c (hash): Fix.
  98         * interp.c (do_format_8): Get operands correctly and
  99         call the target function.
 100         * simops.c: Rough cut at "clr1", "not1", "set1", and "tst1".
 101
 102 Thu Aug 29 13:53:29 1996  Jeffrey A Law  (law@cygnus.com)
 103
 104         * interp.c (do_format_4): Get operands correctly and
 105         call the target function.
 106         * simops.c: Rough cut at "sld.b", "sld.h", "sld.w", "sst.b",
 107         "sst.h", and "sst.w".
 108
 109         * v850_sim.h: The V850 doesn't have split I&D spaces.  Change
 110         accordingly.  Remove many unused definitions.
 111         * interp.c: The V850 doesn't have split I&D spaces.  Change
 112         accordingly.
 113         (get_longlong, get_longword, get_word): Deleted.
 114         (write_longlong, write_longword, write_word): Deleted.
 115         (get_operands): Deleted.
 116         (get_byte, get_half, get_word): New functions.
 117         (put_byte, put_half, put_word): New functions.
 118         * simops.c: Remove unused functions.  Rough cut at
 119         "ld.b", "ld.h", "ld.w", "st.b", "st.h", "st.w" insns.
 120
 121         * v850_sim.h (struct _state): Remove "psw" field.  Add
 122         "sregs" field.
 123         (PSW): Remove bogus definition.
 124         * simops.c: Change condition code handling to use the psw
 125         register within the sregs array.  Handle "ldsr" and "stsr".
 126
 127         * simops.c: Handle "satadd", "satsub", "satsubi", "satsubr".
 128
 129         * interp.c (do_format_5): Get operands correctly and
 130         call the target function.
 131         (sim_resume): Don't do a PC update for format 5 instructions.
 132         * simops.c: Handle "jarl" and "jmp" instructions.
 133
 134         * simops.c: Fix minor typos.  Handle "cmp", "setf", "tst"
 135         "di", and "ei" instructions correctly.
 136
 137         * interp.c (do_format_3): Get operands correctly and call
 138         the target function.
 139         * simops.c: Handle bCC instructions.
 140
 141         * simops.c: Add condition code handling to shift insns.
 142         Fix minor typos in condition code handling for other insns.
 143
 144         * Makefile.in: Fix typo.
 145         * simops.c: Add condition code handling to "sub" "subr" and
 146         "divh" instructions.
 147
 148         * interp.c (hash): Update to be more accurate.
 149         (lookup_hash): Call hash rather than computing the hash
 150         code here.
 151         (do_format_1_2): Handle format 1 and format 2 instructions.
 152         Get operands correctly and call the target function.
 153         (do_format_6): Get operands correctly and call the target
 154         function.
 155         (do_formats_9_10): Rough cut so shift ops will work.
 156         (sim_resume): Tweak to deal with format 1 and format 2
 157         handling in a single funtion.  Don't update the PC
 158         for format 3 insns.  Fix typos.
 159         * simops.c: Slightly reorganize.  Add condition code handling
 160         to "add", "addi", "and", "andi", "or", "ori", "xor", "xori"
 161         and "not" instructions.
 162         * v850_sim.h (reg_t): Registers are 32bits.
 163         (_state): The V850 has 32 general registers.  Add a 32bit
 164         psw and pc register too.  Add accessor macros
 165
 166         * Makefile.in, interp.c, v850_sim.h: Bring over endianness
 167         changes from the d10v simulator.
 168
 169         * simops.c: Add shift support.
 170
 171         * simops.c: Add multiply & divide support.  Abort for system
 172         instructions.
 173
 174         * simops.c: Add logicals, mov, movhi, movea, add, addi, sub
 175         and subr.  No condition codes yet.
 176
 177 Wed Aug 28 13:53:22 1996  Jeffrey A Law  (law@cygnus.com)
 178
 179         * ChangeLog, Makefile.in, configure, configure.in, v850_sim.h,
 180         gencode.c, interp.c, simops.c: Created.
 181