2 #include "sim-options.h"
4 #include "sim-assert.h"
29 static const char * get_insn_name (sim_cpu
*, int);
31 /* For compatibility. */
34 /* V850 interrupt model. */
49 const char *interrupt_names
[] =
63 do_interrupt (SIM_DESC sd
, void *data
)
65 const char **interrupt_name
= (const char**)data
;
66 enum interrupt_type inttype
;
67 inttype
= (interrupt_name
- STATE_WATCHPOINTS (sd
)->interrupt_names
);
69 /* For a hardware reset, drop everything and jump to the start
71 if (inttype
== int_reset
)
76 sim_engine_restart (sd
, NULL
, NULL
, NULL_CIA
);
79 /* Deliver an NMI when allowed */
80 if (inttype
== int_nmi
)
84 /* We're already working on an NMI, so this one must wait
85 around until the previous one is done. The processor
86 ignores subsequent NMIs, so we don't need to count them.
87 Just keep re-scheduling a single NMI until it manages to
89 if (STATE_CPU (sd
, 0)->pending_nmi
!= NULL
)
90 sim_events_deschedule (sd
, STATE_CPU (sd
, 0)->pending_nmi
);
91 STATE_CPU (sd
, 0)->pending_nmi
=
92 sim_events_schedule (sd
, 1, do_interrupt
, data
);
97 /* NMI can be delivered. Do not deschedule pending_nmi as
98 that, if still in the event queue, is a second NMI that
99 needs to be delivered later. */
102 /* Set the FECC part of the ECR. */
109 sim_engine_restart (sd
, NULL
, NULL
, NULL_CIA
);
113 /* deliver maskable interrupt when allowed */
114 if (inttype
> int_nmi
&& inttype
< num_int_types
)
116 if ((PSW
& PSW_NP
) || (PSW
& PSW_ID
))
118 /* Can't deliver this interrupt, reschedule it for later */
119 sim_events_schedule (sd
, 1, do_interrupt
, data
);
127 /* Disable further interrupts. */
129 /* Indicate that we're doing interrupt not exception processing. */
131 /* Clear the EICC part of the ECR, will set below. */
160 /* Should never be possible. */
161 sim_engine_abort (sd
, NULL
, NULL_CIA
,
162 "do_interrupt - internal error - bad switch");
166 sim_engine_restart (sd
, NULL
, NULL
, NULL_CIA
);
169 /* some other interrupt? */
170 sim_engine_abort (sd
, NULL
, NULL_CIA
,
171 "do_interrupt - internal error - interrupt %d unknown",
175 /* Return name of an insn, used by insn profiling. */
178 get_insn_name (sim_cpu
*cpu
, int i
)
180 return itable
[i
].name
;
183 /* These default values correspond to expected usage for the chip. */
188 v850_pc_get (sim_cpu
*cpu
)
194 v850_pc_set (sim_cpu
*cpu
, sim_cia pc
)
200 sim_open (SIM_OPEN_KIND kind
,
206 SIM_DESC sd
= sim_state_alloc (kind
, cb
);
209 SIM_ASSERT (STATE_MAGIC (sd
) == SIM_MAGIC_NUMBER
);
211 /* The cpu data is kept in a separately allocated chunk of memory. */
212 if (sim_cpu_alloc_all (sd
, 1, /*cgen_cpu_max_extra_bytes ()*/0) != SIM_RC_OK
)
215 /* for compatibility */
218 /* FIXME: should be better way of setting up interrupts */
219 STATE_WATCHPOINTS (sd
)->pc
= &(PC
);
220 STATE_WATCHPOINTS (sd
)->sizeof_pc
= sizeof (PC
);
221 STATE_WATCHPOINTS (sd
)->interrupt_handler
= do_interrupt
;
222 STATE_WATCHPOINTS (sd
)->interrupt_names
= interrupt_names
;
224 /* Initialize the mechanism for doing insn profiling. */
225 CPU_INSN_NAME (STATE_CPU (sd
, 0)) = get_insn_name
;
226 CPU_MAX_INSNS (STATE_CPU (sd
, 0)) = nr_itable_entries
;
228 if (sim_pre_argv_init (sd
, argv
[0]) != SIM_RC_OK
)
231 /* Allocate core managed memory */
233 /* "Mirror" the ROM addresses below 1MB. */
234 sim_do_commandf (sd
, "memory region 0,0x100000,0x%lx", V850_ROM_SIZE
);
235 /* Chunk of ram adjacent to rom */
236 sim_do_commandf (sd
, "memory region 0x100000,0x%lx", V850_LOW_END
-0x100000);
237 /* peripheral I/O region - mirror 1K across 4k (0x1000) */
238 sim_do_command (sd
, "memory region 0xfff000,0x1000,1024");
239 /* similarly if in the internal RAM region */
240 sim_do_command (sd
, "memory region 0xffe000,0x1000,1024");
242 /* getopt will print the error message so we just have to exit if this fails.
243 FIXME: Hmmm... in the case of gdb we need getopt to call
245 if (sim_parse_args (sd
, argv
) != SIM_RC_OK
)
247 /* Uninstall the modules to avoid memory leaks,
248 file descriptor leaks, etc. */
249 sim_module_uninstall (sd
);
253 /* check for/establish the a reference program image */
254 if (sim_analyze_program (sd
,
255 (STATE_PROG_ARGV (sd
) != NULL
256 ? *STATE_PROG_ARGV (sd
)
260 sim_module_uninstall (sd
);
264 /* establish any remaining configuration options */
265 if (sim_config (sd
) != SIM_RC_OK
)
267 sim_module_uninstall (sd
);
271 if (sim_post_argv_init (sd
) != SIM_RC_OK
)
273 /* Uninstall the modules to avoid memory leaks,
274 file descriptor leaks, etc. */
275 sim_module_uninstall (sd
);
280 /* determine the machine type */
281 if (STATE_ARCHITECTURE (sd
) != NULL
282 && (STATE_ARCHITECTURE (sd
)->arch
== bfd_arch_v850
283 || STATE_ARCHITECTURE (sd
)->arch
== bfd_arch_v850_rh850
))
284 mach
= STATE_ARCHITECTURE (sd
)->mach
;
286 mach
= bfd_mach_v850
; /* default */
288 /* set machine specific configuration */
293 case bfd_mach_v850e1
:
294 case bfd_mach_v850e2
:
295 case bfd_mach_v850e2v3
:
296 case bfd_mach_v850e3v5
:
297 STATE_CPU (sd
, 0)->psw_mask
= (PSW_NP
| PSW_EP
| PSW_ID
| PSW_SAT
298 | PSW_CY
| PSW_OV
| PSW_S
| PSW_Z
);
302 /* CPU specific initialization. */
303 for (i
= 0; i
< MAX_NR_PROCESSORS
; ++i
)
305 SIM_CPU
*cpu
= STATE_CPU (sd
, i
);
307 CPU_PC_FETCH (cpu
) = v850_pc_get
;
308 CPU_PC_STORE (cpu
) = v850_pc_set
;
316 sim_close (SIM_DESC sd
, int quitting
)
318 sim_module_uninstall (sd
);
322 sim_create_inferior (SIM_DESC sd
,
323 struct bfd
* prog_bfd
,
327 memset (&State
, 0, sizeof (State
));
328 if (prog_bfd
!= NULL
)
329 PC
= bfd_get_start_address (prog_bfd
);
334 sim_fetch_register (SIM_DESC sd
,
336 unsigned char * memory
,
339 *(unsigned32
*)memory
= H2T_4 (State
.regs
[rn
]);
344 sim_store_register (SIM_DESC sd
,
346 unsigned char * memory
,
349 State
.regs
[rn
] = T2H_4 (*(unsigned32
*) memory
);