bcbb98239d17ad3aaef7462ba91f971c41615949
4 #include "remote-sim.h"
9 #define IMEM_SIZE 18 /* V850 instruction memory size is 18 bits */
10 #define DMEM_SIZE 16 /* Data memory */
14 static struct hash_entry
*lookup_hash
PARAMS ((uint32 ins
));
19 struct hash_entry
*next
;
25 struct hash_entry hash_table
[MAX_HASH
+1];
31 if ((insn
& 0x30) == 0
32 || (insn
& 0x38) == 0x10)
33 return (insn
& 0x07e0) >> 5;
34 if ((insn
& 0x3c) == 0x18
35 || (insn
& 0x3c) == 0x1c
36 || (insn
& 0x3c) == 0x20
37 || (insn
& 0x3c) == 0x24
38 || (insn
& 0x3c) == 0x28
39 || (insn
& 0x3c) == 0x23)
40 return (insn
& 0x07c0) >> 6;
41 if ((insn
& 0x38) == 0x30)
42 return (insn
& 0x07e0) >> 5;
43 /* What about sub-op field? XXX */
44 if ((insn
& 0x38) == 0x38)
45 return (insn
& 0x07e0) >> 5;
46 if ((insn
& 0x3e) == 0x3c)
47 return (insn
& 0x07c0) >> 6;
48 if ((insn
& 0x3f) == 0x3e)
49 return (insn
& 0xc7e0) >> 5;
50 /* Not really correct. XXX */
51 return insn
& 0xffffffff;
55 static struct hash_entry
*
61 h
= &hash_table
[hash(ins
)];
63 while ( (ins
& h
->mask
) != h
->opcode
)
67 printf ("ERROR looking up hash for %x\n",ins
);
80 return (a
[3]<<24) + (a
[2]<<16) + (a
[1]<<8) + (a
[0]);
88 return ((int64
)a
[0]<<56) + ((int64
)a
[1]<<48) + ((int64
)a
[2]<<40) + ((int64
)a
[3]<<32) +
89 ((int64
)a
[4]<< 24) + ((int64
)a
[5]<<16) + ((int64
)a
[6]<<8) + (int64
)a
[7];
97 return ((uint16
)a
[0]<<8) + a
[1];
102 write_word (addr
, data
)
112 write_longword (addr
, data
)
116 addr
[0] = (data
>> 24) & 0xff;
117 addr
[1] = (data
>> 16) & 0xff;
118 addr
[2] = (data
>> 8) & 0xff;
119 addr
[3] = data
& 0xff;
123 write_longlong (addr
, data
)
129 a
[1] = (data
>> 48) & 0xff;
130 a
[2] = (data
>> 40) & 0xff;
131 a
[3] = (data
>> 32) & 0xff;
132 a
[4] = (data
>> 24) & 0xff;
133 a
[5] = (data
>> 16) & 0xff;
134 a
[6] = (data
>> 8) & 0xff;
139 get_operands (struct simops
*s
, uint32 ins
)
141 int i
, shift
, bits
, flags
;
143 for (i
=0; i
< s
->numops
; i
++)
145 shift
= s
->operands
[3*i
];
146 bits
= s
->operands
[3*i
+1];
147 flags
= s
->operands
[3*i
+2];
148 mask
= 0x7FFFFFFF >> (31 - bits
);
149 OP
[i
] = (ins
>> shift
) & mask
;
157 struct hash_entry
*h
;
158 printf("format 1 or 2 0x%x\n", insn
);
160 h
= lookup_hash (insn
);
162 OP
[1] = (insn
>> 11) & 0x1f;
170 printf("format 3 0x%x\n", insn
);
177 printf("format 4 0x%x\n", insn
);
184 printf("format 5 0x%x\n", insn
);
191 struct hash_entry
*h
;
192 printf("format 6 0x%x\n", insn
);
194 h
= lookup_hash (insn
);
195 OP
[0] = (insn
>> 16) & 0xffff;
197 OP
[2] = (insn
>> 11) & 0x1f;
205 printf("format 7 0x%x\n", insn
);
212 printf("format 8 0x%x\n", insn
);
216 do_formats_9_10 (insn
)
219 struct hash_entry
*h
;
220 printf("formats 9 and 10 0x%x\n", insn
);
222 h
= lookup_hash (insn
);
224 OP
[1] = (insn
>> 11) & 0x1f;
239 State
.imem
= (uint8
*)calloc(1,1<<IMEM_SIZE
);
240 State
.dmem
= (uint8
*)calloc(1,1<<DMEM_SIZE
);
241 if (!State
.imem
|| !State
.dmem
)
243 fprintf (stderr
,"Memory allocation failed.\n");
246 printf ("Allocated %d bytes instruction memory and\n",1<<IMEM_SIZE
);
247 printf (" %d bytes data memory.\n",1<<DMEM_SIZE
);
258 sim_write (addr
, buffer
, size
)
260 unsigned char *buffer
;
266 /* printf ("sim_write %d bytes to 0x%x\n",size,addr); */
267 for (i
= 0; i
< size
; i
++)
269 State
.imem
[i
+addr
] = buffer
[i
];
279 struct hash_entry
*h
, *prev
;
281 printf ("sim_open %s\n",args
);
283 /* put all the opcodes in the hash table */
284 for (s
= Simops
; s
->func
; s
++)
286 h
= &hash_table
[hash(s
->opcode
)];
288 /* go to the last entry in the chain */
294 h
->next
= calloc(1,sizeof(struct hash_entry
));
299 h
->opcode
= s
->opcode
;
315 printf ("sim_set_profile %d\n",n
);
319 sim_set_profile_size (n
)
322 printf ("sim_set_profile_size %d\n",n
);
326 sim_resume (step
, siggnal
)
333 /* printf ("sim_resume (%d,%d) PC=0x%x\n",step,siggnal,PC); */
336 State
.exception
= SIGTRAP
;
344 opcode
= (inst
& 0x07e0) >> 5;
345 if ((opcode
& 0x30) == 0
346 || (opcode
& 0x38) == 0x10)
348 do_format_1_2 (inst
& 0xffff);
351 else if ((opcode
& 0x3C) == 0x18
352 || (opcode
& 0x3C) == 0x1C
353 || (opcode
& 0x3C) == 0x20
354 || (opcode
& 0x3C) == 0x24
355 || (opcode
& 0x3C) == 0x28)
357 do_format_4 (inst
& 0xffff);
360 else if ((opcode
& 0x3C) == 0x23)
362 do_format_3 (inst
& 0xffff);
363 /* No PC update, it's done in the instruction. */
365 else if ((opcode
& 0x38) == 0x30)
370 else if ((opcode
& 0x3C) == 0x38)
375 else if ((opcode
& 0x3E) == 0x3C)
380 else if ((opcode
& 0x3F) == 0x3E)
387 do_formats_9_10 (inst
);
391 while (!State
.exception
);
397 printf ("sim_trace\n");
405 printf ("sim_info\n");
409 sim_create_inferior (start_address
, argv
, env
)
410 SIM_ADDR start_address
;
414 printf ("sim_create_inferior: PC=0x%x\n",start_address
);
429 printf ("sim_set_callbacks\n");
434 sim_stop_reason (reason
, sigrc
)
435 enum sim_stop
*reason
;
438 /* printf ("sim_stop_reason: PC=0x%x\n",PC); */
440 if (State
.exception
== SIGQUIT
)
442 *reason
= sim_exited
;
443 *sigrc
= State
.exception
;
447 *reason
= sim_stopped
;
448 *sigrc
= State
.exception
;
453 sim_fetch_register (rn
, memory
)
455 unsigned char *memory
;
457 *(uint32
*)memory
= State
.regs
[rn
];
458 /* printf ("sim_fetch_register %d 0x%x\n",rn,State.regs[rn]); */
462 sim_store_register (rn
, memory
)
464 unsigned char *memory
;
466 State
.regs
[rn
]= *(uint32
*)memory
;
467 /* printf ("store: r%d=0x%x\n",rn,State.regs[rn]); */
470 sim_read (addr
, buffer
, size
)
472 unsigned char *buffer
;
476 for (i
= 0; i
< size
; i
++)
478 buffer
[i
] = State
.imem
[addr
+ i
];
487 printf("sim_do_command: %s\n",cmd
);
491 sim_load (prog
, from_tty
)
495 /* Return nonzero so GDB will handle it. */