133 XXX condition codes. */
137 State
.regs
[OP
[1]] += State
.regs
[OP
[0]];
140 /* add sign_extend(imm5), reg
142 XXX condition codes. */
148 value
= (value
<< 27) >> 27;
150 State
.regs
[OP
[1]] += value
;
153 /* addi sign_extend(imm16), reg, reg
155 XXX condition codes. */
161 value
= (value
<< 16) >> 16;
163 State
.regs
[OP
[2]] = State
.regs
[OP
[1]] + value
;
168 XXX condition codes */
172 State
.regs
[OP
[1]] -= State
.regs
[OP
[0]];
177 XXX condition codes */
181 State
.regs
[OP
[1]] = State
.regs
[OP
[0]] - State
.regs
[OP
[1]];
186 XXX condition codes */
190 State
.regs
[OP
[1]] = ((State
.regs
[OP
[1]] & 0xffff)
191 * (State
.regs
[OP
[0]] & 0xffff));
194 /* mulh sign_extend(imm5), reg2
202 value
= (value
<< 27) >> 27;
204 State
.regs
[OP
[1]] = (State
.regs
[OP
[1]] & 0xffff) * value
;
207 /* mulhi imm16, reg1, reg2
209 XXX condition codes */
215 value
= value
& 0xffff;
217 State
.regs
[OP
[2]] = (State
.regs
[OP
[1]] & 0xffff) * value
;
223 XXX Is this signed or unsigned? */
227 State
.regs
[OP
[1]] /= (State
.regs
[OP
[0]] & 0xffff);
279 State
.regs
[OP
[1]] = State
.regs
[OP
[0]];
282 /* mov sign_extend(imm5), reg */
288 value
= (value
<< 27) >> 27;
289 State
.regs
[OP
[1]] = value
;
292 /* movea sign_extend(imm16), reg, reg */
299 value
= (value
<< 16) >> 16;
301 State
.regs
[OP
[2]] = State
.regs
[OP
[1]] + value
;
304 /* movhi imm16, reg, reg */
310 value
= (value
& 0xffff) << 16;
312 State
.regs
[OP
[2]] = State
.regs
[OP
[1]] + value
;
352 XXX condition codes */
356 State
.regs
[OP
[1]] = ~State
.regs
[OP
[0]];
386 XXX condition codes. */
390 State
.regs
[OP
[1]] |= State
.regs
[OP
[0]];
393 /* ori zero_extend(imm16), reg, reg
395 XXX condition codes */
403 State
.regs
[OP
[2]] = State
.regs
[OP
[1]] | value
;
408 XXX condition codes. */
412 State
.regs
[OP
[1]] &= State
.regs
[OP
[0]];
415 /* andi zero_extend(imm16), reg, reg
417 XXX condition codes. */
425 State
.regs
[OP
[2]] = State
.regs
[OP
[1]] & value
;
430 XXX condition codes. */
434 State
.regs
[OP
[1]] ^= State
.regs
[OP
[0]];
437 /* xori zero_extend(imm16), reg, reg
439 XXX condition codes. */
447 State
.regs
[OP
[2]] = State
.regs
[OP
[1]] ^ value
;
470 /* di, not supported */
477 /* ei, not supported */
484 /* halt, not supported */
491 /* reti, not supported */
498 /* trap, not supportd */
505 /* ldsr, not supported */
512 /* stsr, not supported */