simple_ram_behavioural_tb.vhdl

   1 library ieee;
   2 use ieee.std_logic_1164.all;
   3 use ieee.numeric_std.all;
   4
   5 library work;
   6 use work.wishbone_types.all;
   7
   8 entity simple_ram_behavioural_tb is
   9 end simple_ram_behavioural_tb;
  10
  11 architecture behave of simple_ram_behavioural_tb is
  12     signal clk          : std_ulogic;
  13     signal rst          : std_ulogic := '1';
  14
  15     constant clk_period : time := 10 ns;
  16
  17     signal w_in         : wishbone_slave_out;
  18     signal w_out        : wishbone_master_out;
  19 begin
  20     simple_ram_0: entity work.mw_soc_memory
  21         generic map (
  22             RAM_INIT_FILE => "simple_ram_behavioural_tb.bin",
  23             MEMORY_SIZE => 16
  24             )
  25         port map (
  26             clk => clk,
  27             rst => rst,
  28             wishbone_out => w_in,
  29             wishbone_in => w_out
  30             );
  31
  32     clock: process
  33     begin
  34         clk <= '1';
  35         wait for clk_period / 2;
  36         clk <= '0';
  37         wait for clk_period / 2;
  38     end process clock;
  39
  40     stim: process
  41     begin
  42         w_out.adr <= (others => '0');
  43         w_out.dat <= (others => '0');
  44         w_out.cyc <= '0';
  45         w_out.stb <= '0';
  46         w_out.sel <= (others => '0');
  47         w_out.we  <= '0';
  48
  49         wait for clk_period;
  50         rst <= '0';
  51
  52         wait for clk_period;
  53
  54         w_out.cyc <= '1';
  55
  56         -- test various read lengths and alignments
  57         w_out.stb <= '1';
  58         w_out.sel <= "00000001";
  59         w_out.adr <= x"0000000000000000";
  60         assert w_in.ack = '0';
  61         wait for clk_period;
  62         assert w_in.ack = '1';
  63         assert w_in.dat(7 downto 0) = x"00" report to_hstring(w_in.dat);
  64         w_out.stb <= '0';
  65         wait for clk_period;
  66         assert w_in.ack = '0';
  67
  68         w_out.stb <= '1';
  69         w_out.sel <= "00000001";
  70         w_out.adr <= x"0000000000000001";
  71         assert w_in.ack = '0';
  72         wait for clk_period;
  73         assert w_in.ack = '1';
  74         assert w_in.dat(7 downto 0) = x"01" report to_hstring(w_in.dat);
  75         w_out.stb <= '0';
  76         wait for clk_period;
  77         assert w_in.ack = '0';
  78
  79         w_out.stb <= '1';
  80         w_out.sel <= "00000001";
  81         w_out.adr <= x"0000000000000007";
  82         assert w_in.ack = '0';
  83         wait for clk_period;
  84         assert w_in.ack = '1';
  85         assert w_in.dat(7 downto 0) = x"07" report to_hstring(w_in.dat);
  86         w_out.stb <= '0';
  87         wait for clk_period;
  88         assert w_in.ack = '0';
  89
  90         w_out.stb <= '1';
  91         w_out.sel <= "00000011";
  92         w_out.adr <= x"0000000000000000";
  93         assert w_in.ack = '0';
  94         wait for clk_period;
  95         assert w_in.ack = '1';
  96         assert w_in.dat(15 downto 0) = x"0100" report to_hstring(w_in.dat);
  97         w_out.stb <= '0';
  98         wait for clk_period;
  99         assert w_in.ack = '0';
 100
 101         w_out.stb <= '1';
 102         w_out.sel <= "00000011";
 103         w_out.adr <= x"0000000000000001";
 104         assert w_in.ack = '0';
 105         wait for clk_period;
 106         assert w_in.ack = '1';
 107         assert w_in.dat(15 downto 0) = x"0201" report to_hstring(w_in.dat);
 108         w_out.stb <= '0';
 109         wait for clk_period;
 110         assert w_in.ack = '0';
 111
 112         w_out.stb <= '1';
 113         w_out.sel <= "00000011";
 114         w_out.adr <= x"0000000000000007";
 115         assert w_in.ack = '0';
 116         wait for clk_period;
 117         assert w_in.ack = '1';
 118         assert w_in.dat(15 downto 0) = x"0807" report to_hstring(w_in.dat);
 119         w_out.stb <= '0';
 120         wait for clk_period;
 121         assert w_in.ack = '0';
 122
 123         w_out.stb <= '1';
 124         w_out.sel <= "00001111";
 125         w_out.adr <= x"0000000000000000";
 126         assert w_in.ack = '0';
 127         wait for clk_period;
 128         assert w_in.ack = '1';
 129         assert w_in.dat(31 downto 0) = x"03020100" report to_hstring(w_in.dat);
 130         w_out.stb <= '0';
 131         wait for clk_period;
 132         assert w_in.ack = '0';
 133
 134         w_out.stb <= '1';
 135         w_out.sel <= "00001111";
 136         w_out.adr <= x"0000000000000001";
 137         assert w_in.ack = '0';
 138         wait for clk_period;
 139         assert w_in.ack = '1';
 140         assert w_in.dat(31 downto 0) = x"04030201" report to_hstring(w_in.dat);
 141         w_out.stb <= '0';
 142         wait for clk_period;
 143         assert w_in.ack = '0';
 144
 145         w_out.stb <= '1';
 146         w_out.sel <= "00001111";
 147         w_out.adr <= x"0000000000000007";
 148         assert w_in.ack = '0';
 149         wait for clk_period;
 150         assert w_in.ack = '1';
 151         assert w_in.dat(31 downto 0) = x"0A090807" report to_hstring(w_in.dat);
 152         w_out.stb <= '0';
 153         wait for clk_period;
 154         assert w_in.ack = '0';
 155
 156         w_out.stb <= '1';
 157         w_out.sel <= "11111111";
 158         w_out.adr <= x"0000000000000000";
 159         assert w_in.ack = '0';
 160         wait for clk_period;
 161         assert w_in.ack = '1';
 162         assert w_in.dat(63 downto 0) = x"0706050403020100" report to_hstring(w_in.dat);
 163         w_out.stb <= '0';
 164         wait for clk_period;
 165         assert w_in.ack = '0';
 166
 167         w_out.stb <= '1';
 168         w_out.sel <= "11111111";
 169         w_out.adr <= x"0000000000000001";
 170         assert w_in.ack = '0';
 171         wait for clk_period;
 172         assert w_in.ack = '1';
 173         assert w_in.dat(63 downto 0) = x"0807060504030201" report to_hstring(w_in.dat);
 174         w_out.stb <= '0';
 175         wait for clk_period;
 176         assert w_in.ack = '0';
 177
 178         w_out.stb <= '1';
 179         w_out.sel <= "11111111";
 180         w_out.adr <= x"0000000000000007";
 181         assert w_in.ack = '0';
 182         wait for clk_period;
 183         assert w_in.ack = '1';
 184         assert w_in.dat(63 downto 0) = x"0E0D0C0B0A090807" report to_hstring(w_in.dat);
 185         w_out.stb <= '0';
 186         wait for clk_period;
 187         assert w_in.ack = '0';
 188
 189         -- test various write lengths and alignments
 190         w_out.stb <= '1';
 191         w_out.sel <= "00000001";
 192         w_out.adr <= x"0000000000000000";
 193         w_out.we <= '1';
 194         w_out.dat(7 downto 0) <= x"0F";
 195         assert w_in.ack = '0';
 196         wait for clk_period;
 197         assert w_in.ack = '1';
 198         w_out.stb <= '0';
 199         wait for clk_period;
 200         assert w_in.ack = '0';
 201
 202         w_out.stb <= '1';
 203         w_out.sel <= "00000001";
 204         w_out.adr <= x"0000000000000000";
 205         w_out.we <= '0';
 206         assert w_in.ack = '0';
 207         wait for clk_period;
 208         assert w_in.ack = '1';
 209         assert w_in.dat(7 downto 0) = x"0F" report to_hstring(w_in.dat);
 210         w_out.stb <= '0';
 211         wait for clk_period;
 212         assert w_in.ack = '0';
 213
 214         w_out.stb <= '1';
 215         w_out.sel <= "11111111";
 216         w_out.adr <= x"0000000000000007";
 217         w_out.we <= '1';
 218         w_out.dat <= x"BADC0FFEBADC0FFE";
 219         assert w_in.ack = '0';
 220         wait for clk_period;
 221         assert w_in.ack = '1';
 222         w_out.stb <= '0';
 223         wait for clk_period;
 224         assert w_in.ack = '0';
 225
 226         w_out.stb <= '1';
 227         w_out.sel <= "11111111";
 228         w_out.adr <= x"0000000000000007";
 229         w_out.we <= '0';
 230         assert w_in.ack = '0';
 231         wait for clk_period;
 232         assert w_in.ack = '1';
 233         assert w_in.dat = x"BADC0FFEBADC0FFE" report to_hstring(w_in.dat);
 234         w_out.stb <= '0';
 235         wait for clk_period;
 236         assert w_in.ack = '0';
 237
 238         assert false report "end of test" severity failure;
 239         wait;
 240     end process;
 241 end behave;