software/include/hw/dvisampler.h

   1 #ifndef __HW_DVISAMPLER_H
   2 #define __HW_DVISAMPLER_H
   3
   4 #include <hw/common.h>
   5 #include <csrbase.h>
   6
   7 #define DVISAMPLER0_CSR(x)              MMPTR(DVISAMPLER0_BASE+(x))
   8
   9 #define CSR_DVISAMPLER0_PLL_RESET       DVISAMPLER0_CSR(0x00)
  10 #define CSR_DVISAMPLER0_PLL_LOCKED      DVISAMPLER0_CSR(0x04)
  11
  12 #define CSR_DVISAMPLER0_D0_DELAY_CTL    DVISAMPLER0_CSR(0x08)
  13 #define CSR_DVISAMPLER0_D0_DELAY_BUSY   DVISAMPLER0_CSR(0x0C)
  14 #define CSR_DVISAMPLER0_D0_PHASE        DVISAMPLER0_CSR(0x10)
  15 #define CSR_DVISAMPLER0_D0_PHASE_RESET  DVISAMPLER0_CSR(0x14)
  16 #define CSR_DVISAMPLER0_D0_CHAR_SYNCED  DVISAMPLER0_CSR(0x18)
  17 #define CSR_DVISAMPLER0_D0_CTL_POS      DVISAMPLER0_CSR(0x1C)
  18
  19 #define CSR_DVISAMPLER0_D1_DELAY_CTL    DVISAMPLER0_CSR(0x20)
  20 #define CSR_DVISAMPLER0_D1_DELAY_BUSY   DVISAMPLER0_CSR(0x24)
  21 #define CSR_DVISAMPLER0_D1_PHASE        DVISAMPLER0_CSR(0x28)
  22 #define CSR_DVISAMPLER0_D1_PHASE_RESET  DVISAMPLER0_CSR(0x2C)
  23 #define CSR_DVISAMPLER0_D1_CHAR_SYNCED  DVISAMPLER0_CSR(0x30)
  24 #define CSR_DVISAMPLER0_D1_CTL_POS      DVISAMPLER0_CSR(0x34)
  25
  26 #define CSR_DVISAMPLER0_D2_DELAY_CTL    DVISAMPLER0_CSR(0x38)
  27 #define CSR_DVISAMPLER0_D2_DELAY_BUSY   DVISAMPLER0_CSR(0x3C)
  28 #define CSR_DVISAMPLER0_D2_PHASE        DVISAMPLER0_CSR(0x40)
  29 #define CSR_DVISAMPLER0_D2_PHASE_RESET  DVISAMPLER0_CSR(0x44)
  30 #define CSR_DVISAMPLER0_D2_CHAR_SYNCED  DVISAMPLER0_CSR(0x48)
  31 #define CSR_DVISAMPLER0_D2_CTL_POS      DVISAMPLER0_CSR(0x4C)
  32
  33 #define CSR_DVISAMPLER0_CHAN_SYNCED     DVISAMPLER0_CSR(0x50)
  34
  35 #define CSR_DVISAMPLER0_HRESH           DVISAMPLER0_CSR(0x54)
  36 #define CSR_DVISAMPLER0_HRESL           DVISAMPLER0_CSR(0x58)
  37 #define CSR_DVISAMPLER0_VRESH           DVISAMPLER0_CSR(0x5C)
  38 #define CSR_DVISAMPLER0_VRESL           DVISAMPLER0_CSR(0x60)
  39 #define CSR_DVISAMPLER0_DECNT2          DVISAMPLER0_CSR(0x64)
  40 #define CSR_DVISAMPLER0_DECNT1          DVISAMPLER0_CSR(0x68)
  41 #define CSR_DVISAMPLER0_DECNT0          DVISAMPLER0_CSR(0x6C)
  42
  43 #define DVISAMPLER_DELAY_CAL            0x01
  44 #define DVISAMPLER_DELAY_RST            0x02
  45 #define DVISAMPLER_DELAY_INC            0x04
  46 #define DVISAMPLER_DELAY_DEC            0x08
  47
  48 #define DVISAMPLER_TOO_LATE             0x01
  49 #define DVISAMPLER_TOO_EARLY            0x02
  50
  51 #endif /* __HW_DVISAMPLER_H */