amdgpu/addrlib: Add a new tile mode ADDR_TM_UNKNOWN
[mesa.git] / src / amd / addrlib / addrinterface.h
1 /*
2 * Copyright © 2014 Advanced Micro Devices, Inc.
3 * All Rights Reserved.
4 *
5 * Permission is hereby granted, free of charge, to any person obtaining
6 * a copy of this software and associated documentation files (the
7 * "Software"), to deal in the Software without restriction, including
8 * without limitation the rights to use, copy, modify, merge, publish,
9 * distribute, sub license, and/or sell copies of the Software, and to
10 * permit persons to whom the Software is furnished to do so, subject to
11 * the following conditions:
12 *
13 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
14 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
15 * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
16 * NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS, AUTHORS
17 * AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
18 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
20 * USE OR OTHER DEALINGS IN THE SOFTWARE.
21 *
22 * The above copyright notice and this permission notice (including the
23 * next paragraph) shall be included in all copies or substantial portions
24 * of the Software.
25 */
26
27 /**
28 ***************************************************************************************************
29 * @file addrinterface.h
30 * @brief Contains the addrlib interfaces declaration and parameter defines
31 ***************************************************************************************************
32 */
33 #ifndef __ADDR_INTERFACE_H__
34 #define __ADDR_INTERFACE_H__
35
36 #include "addrtypes.h"
37
38 #if defined(__cplusplus)
39 extern "C"
40 {
41 #endif
42
43 #define ADDRLIB_VERSION_MAJOR 5
44 #define ADDRLIB_VERSION_MINOR 25
45 #define ADDRLIB_VERSION ((ADDRLIB_VERSION_MAJOR << 16) | ADDRLIB_VERSION_MINOR)
46
47 /// Virtually all interface functions need ADDR_HANDLE as first parameter
48 typedef VOID* ADDR_HANDLE;
49
50 /// Client handle used in callbacks
51 typedef VOID* ADDR_CLIENT_HANDLE;
52
53 /**
54 * /////////////////////////////////////////////////////////////////////////////////////////////////
55 * // Callback functions
56 * /////////////////////////////////////////////////////////////////////////////////////////////////
57 * typedef VOID* (ADDR_API* ADDR_ALLOCSYSMEM)(
58 * const ADDR_ALLOCSYSMEM_INPUT* pInput);
59 * typedef ADDR_E_RETURNCODE (ADDR_API* ADDR_FREESYSMEM)(
60 * VOID* pVirtAddr);
61 * typedef ADDR_E_RETURNCODE (ADDR_API* ADDR_DEBUGPRINT)(
62 * const ADDR_DEBUGPRINT_INPUT* pInput);
63 *
64 * /////////////////////////////////////////////////////////////////////////////////////////////////
65 * // Create/Destroy/Config functions
66 * /////////////////////////////////////////////////////////////////////////////////////////////////
67 * AddrCreate()
68 * AddrDestroy()
69 *
70 * /////////////////////////////////////////////////////////////////////////////////////////////////
71 * // Surface functions
72 * /////////////////////////////////////////////////////////////////////////////////////////////////
73 * AddrComputeSurfaceInfo()
74 * AddrComputeSurfaceAddrFromCoord()
75 * AddrComputeSurfaceCoordFromAddr()
76 *
77 * /////////////////////////////////////////////////////////////////////////////////////////////////
78 * // HTile functions
79 * /////////////////////////////////////////////////////////////////////////////////////////////////
80 * AddrComputeHtileInfo()
81 * AddrComputeHtileAddrFromCoord()
82 * AddrComputeHtileCoordFromAddr()
83 *
84 * /////////////////////////////////////////////////////////////////////////////////////////////////
85 * // C-mask functions
86 * /////////////////////////////////////////////////////////////////////////////////////////////////
87 * AddrComputeCmaskInfo()
88 * AddrComputeCmaskAddrFromCoord()
89 * AddrComputeCmaskCoordFromAddr()
90 *
91 * /////////////////////////////////////////////////////////////////////////////////////////////////
92 * // F-mask functions
93 * /////////////////////////////////////////////////////////////////////////////////////////////////
94 * AddrComputeFmaskInfo()
95 * AddrComputeFmaskAddrFromCoord()
96 * AddrComputeFmaskCoordFromAddr()
97 *
98 * /////////////////////////////////////////////////////////////////////////////////////////////////
99 * // Element/Utility functions
100 * /////////////////////////////////////////////////////////////////////////////////////////////////
101 * ElemFlt32ToDepthPixel()
102 * ElemFlt32ToColorPixel()
103 * AddrExtractBankPipeSwizzle()
104 * AddrCombineBankPipeSwizzle()
105 * AddrComputeSliceSwizzle()
106 * AddrConvertTileInfoToHW()
107 * AddrConvertTileIndex()
108 * AddrConvertTileIndex1()
109 * AddrGetTileIndex()
110 * AddrComputeBaseSwizzle()
111 * AddrUseTileIndex()
112 * AddrUseCombinedSwizzle()
113 *
114 **/
115
116 ///////////////////////////////////////////////////////////////////////////////////////////////////
117 // Callback functions
118 ///////////////////////////////////////////////////////////////////////////////////////////////////
119
120 /**
121 ***************************************************************************************************
122 * @brief channel setting structure
123 ***************************************************************************************************
124 */
125 typedef union _ADDR_CHANNEL_SETTING
126 {
127 struct
128 {
129 UINT_8 valid : 1; ///< Indicate whehter this channel setting is valid
130 UINT_8 channel : 2; ///< 0 for x channel, 1 for y channel, 2 for z channel
131 UINT_8 index : 5; ///< Channel index
132 };
133 UINT_8 value; ///< Value
134 } ADDR_CHANNEL_SETTING;
135
136 /**
137 ***************************************************************************************************
138 * @brief address equation key structure
139 ***************************************************************************************************
140 */
141 typedef union _ADDR_EQUATION_KEY
142 {
143 struct
144 {
145 UINT_32 log2ElementBytes : 3; ///< Log2 of Bytes per pixel
146 UINT_32 tileMode : 5; ///< Tile mode
147 UINT_32 microTileType : 3; ///< Micro tile type
148 UINT_32 pipeConfig : 5; ///< pipe config
149 UINT_32 numBanks : 5; ///< Number of banks
150 UINT_32 bankWidth : 4; ///< Bank width
151 UINT_32 bankHeight : 4; ///< Bank height
152 UINT_32 macroAspectRatio : 3; ///< Macro tile aspect ratio
153 } fields;
154 UINT_32 value;
155 } ADDR_EQUATION_KEY;
156
157 /**
158 ***************************************************************************************************
159 * @brief address equation structure
160 ***************************************************************************************************
161 */
162 #define ADDR_MAX_EQUATION_BIT 20u
163
164 // Invalid equation index
165 #define ADDR_INVALID_EQUATION_INDEX 0xFFFFFFFF
166
167 typedef struct _ADDR_EQUATION
168 {
169 ADDR_CHANNEL_SETTING addr[ADDR_MAX_EQUATION_BIT]; ///< addr setting
170 ///< each bit is result of addr ^ xor ^ xor2
171 ADDR_CHANNEL_SETTING xor1[ADDR_MAX_EQUATION_BIT]; ///< xor setting
172 ADDR_CHANNEL_SETTING xor2[ADDR_MAX_EQUATION_BIT]; ///< xor2 setting
173 UINT_32 numBits; ///< The number of bits in equation
174 BOOL_32 stackedDepthSlices; ///< TRUE if depth slices are treated as being
175 ///< stacked vertically prior to swizzling
176 } ADDR_EQUATION;
177
178
179 /**
180 ***************************************************************************************************
181 * @brief Alloc system memory flags.
182 * @note These flags are reserved for future use and if flags are added will minimize the impact
183 * of the client.
184 ***************************************************************************************************
185 */
186 typedef union _ADDR_ALLOCSYSMEM_FLAGS
187 {
188 struct
189 {
190 UINT_32 reserved : 32; ///< Reserved for future use.
191 } fields;
192 UINT_32 value;
193
194 } ADDR_ALLOCSYSMEM_FLAGS;
195
196 /**
197 ***************************************************************************************************
198 * @brief Alloc system memory input structure
199 ***************************************************************************************************
200 */
201 typedef struct _ADDR_ALLOCSYSMEM_INPUT
202 {
203 UINT_32 size; ///< Size of this structure in bytes
204
205 ADDR_ALLOCSYSMEM_FLAGS flags; ///< System memory flags.
206 UINT_32 sizeInBytes; ///< System memory allocation size in bytes.
207 ADDR_CLIENT_HANDLE hClient; ///< Client handle
208 } ADDR_ALLOCSYSMEM_INPUT;
209
210 /**
211 ***************************************************************************************************
212 * ADDR_ALLOCSYSMEM
213 * @brief
214 * Allocate system memory callback function. Returns valid pointer on success.
215 ***************************************************************************************************
216 */
217 typedef VOID* (ADDR_API* ADDR_ALLOCSYSMEM)(
218 const ADDR_ALLOCSYSMEM_INPUT* pInput);
219
220 /**
221 ***************************************************************************************************
222 * @brief Free system memory input structure
223 ***************************************************************************************************
224 */
225 typedef struct _ADDR_FREESYSMEM_INPUT
226 {
227 UINT_32 size; ///< Size of this structure in bytes
228
229 VOID* pVirtAddr; ///< Virtual address
230 ADDR_CLIENT_HANDLE hClient; ///< Client handle
231 } ADDR_FREESYSMEM_INPUT;
232
233 /**
234 ***************************************************************************************************
235 * ADDR_FREESYSMEM
236 * @brief
237 * Free system memory callback function.
238 * Returns ADDR_OK on success.
239 ***************************************************************************************************
240 */
241 typedef ADDR_E_RETURNCODE (ADDR_API* ADDR_FREESYSMEM)(
242 const ADDR_FREESYSMEM_INPUT* pInput);
243
244 /**
245 ***************************************************************************************************
246 * @brief Print debug message input structure
247 ***************************************************************************************************
248 */
249 typedef struct _ADDR_DEBUGPRINT_INPUT
250 {
251 UINT_32 size; ///< Size of this structure in bytes
252
253 CHAR* pDebugString; ///< Debug print string
254 va_list ap; ///< Variable argument list
255 ADDR_CLIENT_HANDLE hClient; ///< Client handle
256 } ADDR_DEBUGPRINT_INPUT;
257
258 /**
259 ***************************************************************************************************
260 * ADDR_DEBUGPRINT
261 * @brief
262 * Print debug message callback function.
263 * Returns ADDR_OK on success.
264 ***************************************************************************************************
265 */
266 typedef ADDR_E_RETURNCODE (ADDR_API* ADDR_DEBUGPRINT)(
267 const ADDR_DEBUGPRINT_INPUT* pInput);
268
269 /**
270 ***************************************************************************************************
271 * ADDR_CALLBACKS
272 *
273 * @brief
274 * Address Library needs client to provide system memory alloc/free routines.
275 ***************************************************************************************************
276 */
277 typedef struct _ADDR_CALLBACKS
278 {
279 ADDR_ALLOCSYSMEM allocSysMem; ///< Routine to allocate system memory
280 ADDR_FREESYSMEM freeSysMem; ///< Routine to free system memory
281 ADDR_DEBUGPRINT debugPrint; ///< Routine to print debug message
282 } ADDR_CALLBACKS;
283
284 ///////////////////////////////////////////////////////////////////////////////////////////////////
285 // Create/Destroy functions
286 ///////////////////////////////////////////////////////////////////////////////////////////////////
287
288 /**
289 ***************************************************************************************************
290 * ADDR_CREATE_FLAGS
291 *
292 * @brief
293 * This structure is used to pass some setup in creation of AddrLib
294 * @note
295 ***************************************************************************************************
296 */
297 typedef union _ADDR_CREATE_FLAGS
298 {
299 struct
300 {
301 UINT_32 noCubeMipSlicesPad : 1; ///< Turn cubemap faces padding off
302 UINT_32 fillSizeFields : 1; ///< If clients fill size fields in all input and
303 /// output structure
304 UINT_32 useTileIndex : 1; ///< Make tileIndex field in input valid
305 UINT_32 useCombinedSwizzle : 1; ///< Use combined tile swizzle
306 UINT_32 checkLast2DLevel : 1; ///< Check the last 2D mip sub level
307 UINT_32 useHtileSliceAlign : 1; ///< Do htile single slice alignment
308 UINT_32 allowLargeThickTile : 1; ///< Allow 64*thickness*bytesPerPixel > rowSize
309 UINT_32 reserved : 25; ///< Reserved bits for future use
310 };
311
312 UINT_32 value;
313 } ADDR_CREATE_FLAGS;
314
315 /**
316 ***************************************************************************************************
317 * ADDR_REGISTER_VALUE
318 *
319 * @brief
320 * Data from registers to setup AddrLib global data, used in AddrCreate
321 ***************************************************************************************************
322 */
323 typedef struct _ADDR_REGISTER_VALUE
324 {
325 UINT_32 gbAddrConfig; ///< For R8xx, use GB_ADDR_CONFIG register value.
326 /// For R6xx/R7xx, use GB_TILING_CONFIG.
327 /// But they can be treated as the same.
328 /// if this value is 0, use chip to set default value
329 UINT_32 backendDisables; ///< 1 bit per backend, starting with LSB. 1=disabled,0=enabled.
330 /// Register value of CC_RB_BACKEND_DISABLE.BACKEND_DISABLE
331
332 /// R800 registers-----------------------------------------------
333 UINT_32 noOfBanks; ///< Number of h/w ram banks - For r800: MC_ARB_RAMCFG.NOOFBANK
334 /// No enums for this value in h/w header files
335 /// 0: 4
336 /// 1: 8
337 /// 2: 16
338 UINT_32 noOfRanks; /// MC_ARB_RAMCFG.NOOFRANK
339 /// 0: 1
340 /// 1: 2
341 /// SI (R1000) registers-----------------------------------------
342 const UINT_32* pTileConfig; ///< Global tile setting tables
343 UINT_32 noOfEntries; ///< Number of entries in pTileConfig
344
345 ///< CI registers-------------------------------------------------
346 const UINT_32* pMacroTileConfig; ///< Global macro tile mode table
347 UINT_32 noOfMacroEntries; ///< Number of entries in pMacroTileConfig
348 } ADDR_REGISTER_VALUE;
349
350 /**
351 ***************************************************************************************************
352 * ADDR_CREATE_INPUT
353 *
354 * @brief
355 * Parameters use to create an AddrLib Object. Caller must provide all fields.
356 *
357 ***************************************************************************************************
358 */
359 typedef struct _ADDR_CREATE_INPUT
360 {
361 UINT_32 size; ///< Size of this structure in bytes
362
363 UINT_32 chipEngine; ///< Chip Engine
364 UINT_32 chipFamily; ///< Chip Family
365 UINT_32 chipRevision; ///< Chip Revision
366 ADDR_CALLBACKS callbacks; ///< Callbacks for sysmem alloc/free/print
367 ADDR_CREATE_FLAGS createFlags; ///< Flags to setup AddrLib
368 ADDR_REGISTER_VALUE regValue; ///< Data from registers to setup AddrLib global data
369 ADDR_CLIENT_HANDLE hClient; ///< Client handle
370 UINT_32 minPitchAlignPixels; ///< Minimum pitch alignment in pixels
371 } ADDR_CREATE_INPUT;
372
373 /**
374 ***************************************************************************************************
375 * ADDR_CREATEINFO_OUTPUT
376 *
377 * @brief
378 * Return AddrLib handle to client driver
379 *
380 ***************************************************************************************************
381 */
382 typedef struct _ADDR_CREATE_OUTPUT
383 {
384 UINT_32 size; ///< Size of this structure in bytes
385
386 ADDR_HANDLE hLib; ///< Address lib handle
387
388 UINT_32 numEquations; ///< Number of equations in the table
389 const ADDR_EQUATION* pEquationTable; ///< Pointer to the equation table
390 } ADDR_CREATE_OUTPUT;
391
392 /**
393 ***************************************************************************************************
394 * AddrCreate
395 *
396 * @brief
397 * Create AddrLib object, must be called before any interface calls
398 *
399 * @return
400 * ADDR_OK if successful
401 ***************************************************************************************************
402 */
403 ADDR_E_RETURNCODE ADDR_API AddrCreate(
404 const ADDR_CREATE_INPUT* pAddrCreateIn,
405 ADDR_CREATE_OUTPUT* pAddrCreateOut);
406
407
408
409 /**
410 ***************************************************************************************************
411 * AddrDestroy
412 *
413 * @brief
414 * Destroy AddrLib object, must be called to free internally allocated resources.
415 *
416 * @return
417 * ADDR_OK if successful
418 ***************************************************************************************************
419 */
420 ADDR_E_RETURNCODE ADDR_API AddrDestroy(
421 ADDR_HANDLE hLib);
422
423
424
425 ///////////////////////////////////////////////////////////////////////////////////////////////////
426 // Surface functions
427 ///////////////////////////////////////////////////////////////////////////////////////////////////
428
429 /**
430 ***************************************************************************************************
431 * @brief
432 * Bank/tiling parameters. On function input, these can be set as desired or
433 * left 0 for AddrLib to calculate/default. On function output, these are the actual
434 * parameters used.
435 * @note
436 * Valid bankWidth/bankHeight value:
437 * 1,2,4,8. They are factors instead of pixels or bytes.
438 *
439 * The bank number remains constant across each row of the
440 * macro tile as each pipe is selected, so the number of
441 * tiles in the x direction with the same bank number will
442 * be bank_width * num_pipes.
443 ***************************************************************************************************
444 */
445 typedef struct _ADDR_TILEINFO
446 {
447 /// Any of these parameters can be set to 0 to use the HW default.
448 UINT_32 banks; ///< Number of banks, numerical value
449 UINT_32 bankWidth; ///< Number of tiles in the X direction in the same bank
450 UINT_32 bankHeight; ///< Number of tiles in the Y direction in the same bank
451 UINT_32 macroAspectRatio; ///< Macro tile aspect ratio. 1-1:1, 2-4:1, 4-16:1, 8-64:1
452 UINT_32 tileSplitBytes; ///< Tile split size, in bytes
453 AddrPipeCfg pipeConfig; ///< Pipe Config = HW enum + 1
454 } ADDR_TILEINFO;
455
456 // Create a define to avoid client change. The removal of R800 is because we plan to implement SI
457 // within 800 HWL - An AddrPipeCfg is added in above data structure
458 typedef ADDR_TILEINFO ADDR_R800_TILEINFO;
459
460 /**
461 ***************************************************************************************************
462 * @brief
463 * Information needed by quad buffer stereo support
464 ***************************************************************************************************
465 */
466 typedef struct _ADDR_QBSTEREOINFO
467 {
468 UINT_32 eyeHeight; ///< Height (in pixel rows) to right eye
469 UINT_32 rightOffset; ///< Offset (in bytes) to right eye
470 UINT_32 rightSwizzle; ///< TileSwizzle for right eyes
471 } ADDR_QBSTEREOINFO;
472
473 /**
474 ***************************************************************************************************
475 * ADDR_SURFACE_FLAGS
476 *
477 * @brief
478 * Surface flags
479 ***************************************************************************************************
480 */
481 typedef union _ADDR_SURFACE_FLAGS
482 {
483 struct
484 {
485 UINT_32 color : 1; ///< Flag indicates this is a color buffer
486 UINT_32 depth : 1; ///< Flag indicates this is a depth/stencil buffer
487 UINT_32 stencil : 1; ///< Flag indicates this is a stencil buffer
488 UINT_32 texture : 1; ///< Flag indicates this is a texture
489 UINT_32 cube : 1; ///< Flag indicates this is a cubemap
490 UINT_32 volume : 1; ///< Flag indicates this is a volume texture
491 UINT_32 fmask : 1; ///< Flag indicates this is an fmask
492 UINT_32 cubeAsArray : 1; ///< Flag indicates if treat cubemap as arrays
493 UINT_32 compressZ : 1; ///< Flag indicates z buffer is compressed
494 UINT_32 overlay : 1; ///< Flag indicates this is an overlay surface
495 UINT_32 noStencil : 1; ///< Flag indicates this depth has no separate stencil
496 UINT_32 display : 1; ///< Flag indicates this should match display controller req.
497 UINT_32 opt4Space : 1; ///< Flag indicates this surface should be optimized for space
498 /// i.e. save some memory but may lose performance
499 UINT_32 prt : 1; ///< Flag for partially resident texture
500 UINT_32 qbStereo : 1; ///< Quad buffer stereo surface
501 UINT_32 pow2Pad : 1; ///< SI: Pad to pow2, must set for mipmap (include level0)
502 UINT_32 interleaved : 1; ///< Special flag for interleaved YUV surface padding
503 UINT_32 tcCompatible : 1; ///< Flag indicates surface needs to be shader readable
504 UINT_32 dispTileType : 1; ///< NI: force display Tiling for 128 bit shared resoruce
505 UINT_32 dccCompatible : 1; ///< VI: whether to support dcc fast clear
506 UINT_32 czDispCompatible : 1; ///< SI+: CZ family has a HW bug needs special alignment.
507 /// This flag indicates we need to follow the
508 /// alignment with CZ families or other ASICs under
509 /// PX configuration + CZ.
510 UINT_32 nonSplit : 1; ///< CI: depth texture should not be split
511 UINT_32 disableLinearOpt : 1; ///< Disable tile mode optimization to linear
512 UINT_32 needEquation : 1; ///< Make the surface tile setting equation compatible.
513 /// This flag indicates we need to override tile
514 /// mode to PRT_* tile mode to disable slice rotation,
515 /// which is needed by swizzle pattern equation.
516 UINT_32 skipIndicesOutput : 1; ///< Skipping indices in output.
517 UINT_32 rotateDisplay : 1; ///< Rotate micro tile type
518 UINT_32 reserved : 6; ///< Reserved bits
519 };
520
521 UINT_32 value;
522 } ADDR_SURFACE_FLAGS;
523
524 /**
525 ***************************************************************************************************
526 * ADDR_COMPUTE_SURFACE_INFO_INPUT
527 *
528 * @brief
529 * Input structure for AddrComputeSurfaceInfo
530 ***************************************************************************************************
531 */
532 typedef struct _ADDR_COMPUTE_SURFACE_INFO_INPUT
533 {
534 UINT_32 size; ///< Size of this structure in bytes
535
536 AddrTileMode tileMode; ///< Tile mode
537 AddrFormat format; ///< If format is set to valid one, bpp/width/height
538 /// might be overwritten
539 UINT_32 bpp; ///< Bits per pixel
540 UINT_32 numSamples; ///< Number of samples
541 UINT_32 width; ///< Width, in pixels
542 UINT_32 height; ///< Height, in pixels
543 UINT_32 numSlices; ///< Number of surface slices or depth
544 UINT_32 slice; ///< Slice index
545 UINT_32 mipLevel; ///< Current mipmap level
546 UINT_32 numMipLevels; ///< Number of mips in mip chain
547 ADDR_SURFACE_FLAGS flags; ///< Surface type flags
548 UINT_32 numFrags; ///< Number of fragments, leave it zero or the same as
549 /// number of samples for normal AA; Set it to the
550 /// number of fragments for EQAA
551 /// r800 and later HWL parameters
552 // Needed by 2D tiling, for linear and 1D tiling, just keep them 0's
553 ADDR_TILEINFO* pTileInfo; ///< 2D tile parameters. Set to 0 to default/calculate
554 AddrTileType tileType; ///< Micro tiling type, not needed when tileIndex != -1
555 INT_32 tileIndex; ///< Tile index, MUST be -1 if you don't want to use it
556 /// while the global useTileIndex is set to 1
557 UINT_32 basePitch; ///< Base level pitch in pixels, 0 means ignored, is a
558 /// must for mip levels from SI+.
559 /// Don't use pitch in blocks for compressed formats!
560 } ADDR_COMPUTE_SURFACE_INFO_INPUT;
561
562 /**
563 ***************************************************************************************************
564 * ADDR_COMPUTE_SURFACE_INFO_OUTPUT
565 *
566 * @brief
567 * Output structure for AddrComputeSurfInfo
568 * @note
569 Element: AddrLib unit for computing. e.g. BCn: 4x4 blocks; R32B32B32: 32bit with 3x pitch
570 Pixel: Original pixel
571 ***************************************************************************************************
572 */
573 typedef struct _ADDR_COMPUTE_SURFACE_INFO_OUTPUT
574 {
575 UINT_32 size; ///< Size of this structure in bytes
576
577 UINT_32 pitch; ///< Pitch in elements (in blocks for compressed formats)
578 UINT_32 height; ///< Height in elements (in blocks for compressed formats)
579 UINT_32 depth; ///< Number of slice/depth
580 UINT_64 surfSize; ///< Surface size in bytes
581 AddrTileMode tileMode; ///< Actual tile mode. May differ from that in input
582 UINT_32 baseAlign; ///< Base address alignment
583 UINT_32 pitchAlign; ///< Pitch alignment, in elements
584 UINT_32 heightAlign; ///< Height alignment, in elements
585 UINT_32 depthAlign; ///< Depth alignment, aligned to thickness, for 3d texture
586 UINT_32 bpp; ///< Bits per elements (e.g. blocks for BCn, 1/3 for 96bit)
587 UINT_32 pixelPitch; ///< Pitch in original pixels
588 UINT_32 pixelHeight; ///< Height in original pixels
589 UINT_32 pixelBits; ///< Original bits per pixel, passed from input
590 UINT_64 sliceSize; ///< Size of slice specified by input's slice
591 /// The result is controlled by surface flags & createFlags
592 /// By default this value equals to surfSize for volume
593 UINT_32 pitchTileMax; ///< PITCH_TILE_MAX value for h/w register
594 UINT_32 heightTileMax; ///< HEIGHT_TILE_MAX value for h/w register
595 UINT_32 sliceTileMax; ///< SLICE_TILE_MAX value for h/w register
596
597 UINT_32 numSamples; ///< Pass the effective numSamples processed in this call
598
599 /// r800 and later HWL parameters
600 ADDR_TILEINFO* pTileInfo; ///< Tile parameters used. Filled in if 0 on input
601 AddrTileType tileType; ///< Micro tiling type, only valid when tileIndex != -1
602 INT_32 tileIndex; ///< Tile index, MAY be "downgraded"
603
604 INT_32 macroModeIndex; ///< Index in macro tile mode table if there is one (CI)
605 /// Output flags
606 struct
607 {
608 /// Special information to work around SI mipmap swizzle bug UBTS #317508
609 UINT_32 last2DLevel : 1; ///< TRUE if this is the last 2D(3D) tiled
610 ///< Only meaningful when create flag checkLast2DLevel is set
611 UINT_32 tcCompatible : 1; ///< If the surface can be shader compatible
612 UINT_32 reserved :30; ///< Reserved bits
613 };
614
615 UINT_32 equationIndex; ///< Equation index in the equation table;
616
617 UINT_32 blockWidth; ///< Width in element inside one block(1D->Micro, 2D->Macro)
618 UINT_32 blockHeight; ///< Height in element inside one block(1D->Micro, 2D->Macro)
619 UINT_32 blockSlices; ///< Slice number inside one block(1D->Micro, 2D->Macro)
620
621 /// Stereo info
622 ADDR_QBSTEREOINFO* pStereoInfo;///< Stereo information, needed when .qbStereo flag is TRUE
623 } ADDR_COMPUTE_SURFACE_INFO_OUTPUT;
624
625 /**
626 ***************************************************************************************************
627 * AddrComputeSurfaceInfo
628 *
629 * @brief
630 * Compute surface width/height/depth/alignments and suitable tiling mode
631 ***************************************************************************************************
632 */
633 ADDR_E_RETURNCODE ADDR_API AddrComputeSurfaceInfo(
634 ADDR_HANDLE hLib,
635 const ADDR_COMPUTE_SURFACE_INFO_INPUT* pIn,
636 ADDR_COMPUTE_SURFACE_INFO_OUTPUT* pOut);
637
638
639
640 /**
641 ***************************************************************************************************
642 * ADDR_COMPUTE_SURFACE_ADDRFROMCOORD_INPUT
643 *
644 * @brief
645 * Input structure for AddrComputeSurfaceAddrFromCoord
646 ***************************************************************************************************
647 */
648 typedef struct _ADDR_COMPUTE_SURFACE_ADDRFROMCOORD_INPUT
649 {
650 UINT_32 size; ///< Size of this structure in bytes
651
652 UINT_32 x; ///< X coordinate
653 UINT_32 y; ///< Y coordinate
654 UINT_32 slice; ///< Slice index
655 UINT_32 sample; ///< Sample index, use fragment index for EQAA
656
657 UINT_32 bpp; ///< Bits per pixel
658 UINT_32 pitch; ///< Surface pitch, in pixels
659 UINT_32 height; ///< Surface height, in pixels
660 UINT_32 numSlices; ///< Surface depth
661 UINT_32 numSamples; ///< Number of samples
662
663 AddrTileMode tileMode; ///< Tile mode
664 BOOL_32 isDepth; ///< TRUE if the surface uses depth sample ordering within
665 /// micro tile. Textures can also choose depth sample order
666 UINT_32 tileBase; ///< Base offset (in bits) inside micro tile which handles
667 /// the case that components are stored separately
668 UINT_32 compBits; ///< The component bits actually needed(for planar surface)
669
670 UINT_32 numFrags; ///< Number of fragments, leave it zero or the same as
671 /// number of samples for normal AA; Set it to the
672 /// number of fragments for EQAA
673 /// r800 and later HWL parameters
674 // Used for 1D tiling above
675 AddrTileType tileType; ///< See defintion of AddrTileType
676 struct
677 {
678 UINT_32 ignoreSE : 1; ///< TRUE if shader engines are ignored. This is texture
679 /// only flag. Only non-RT texture can set this to TRUE
680 UINT_32 reserved :31; ///< Reserved for future use.
681 };
682 // 2D tiling needs following structure
683 ADDR_TILEINFO* pTileInfo; ///< 2D tile parameters. Client must provide all data
684 INT_32 tileIndex; ///< Tile index, MUST be -1 if you don't want to use it
685 /// while the global useTileIndex is set to 1
686 union
687 {
688 struct
689 {
690 UINT_32 bankSwizzle; ///< Bank swizzle
691 UINT_32 pipeSwizzle; ///< Pipe swizzle
692 };
693 UINT_32 tileSwizzle; ///< Combined swizzle, if useCombinedSwizzle is TRUE
694 };
695
696 #if ADDR_AM_BUILD // These two fields are not valid in SW blt since no HTILE access
697 UINT_32 addr5Swizzle; ///< ADDR5_SWIZZLE_MASK of DB_DEPTH_INFO
698 BOOL_32 is32ByteTile; ///< Caller must have access to HTILE buffer and know if
699 /// this tile is compressed to 32B
700 #endif
701 } ADDR_COMPUTE_SURFACE_ADDRFROMCOORD_INPUT;
702
703 /**
704 ***************************************************************************************************
705 * ADDR_COMPUTE_SURFACE_ADDRFROMCOORD_OUTPUT
706 *
707 * @brief
708 * Output structure for AddrComputeSurfaceAddrFromCoord
709 ***************************************************************************************************
710 */
711 typedef struct _ADDR_COMPUTE_SURFACE_ADDRFROMCOORD_OUTPUT
712 {
713 UINT_32 size; ///< Size of this structure in bytes
714
715 UINT_64 addr; ///< Byte address
716 UINT_32 bitPosition; ///< Bit position within surfaceAddr, 0-7.
717 /// For surface bpp < 8, e.g. FMT_1.
718 UINT_32 prtBlockIndex; ///< Index of a PRT tile (64K block)
719 } ADDR_COMPUTE_SURFACE_ADDRFROMCOORD_OUTPUT;
720
721 /**
722 ***************************************************************************************************
723 * AddrComputeSurfaceAddrFromCoord
724 *
725 * @brief
726 * Compute surface address from a given coordinate.
727 ***************************************************************************************************
728 */
729 ADDR_E_RETURNCODE ADDR_API AddrComputeSurfaceAddrFromCoord(
730 ADDR_HANDLE hLib,
731 const ADDR_COMPUTE_SURFACE_ADDRFROMCOORD_INPUT* pIn,
732 ADDR_COMPUTE_SURFACE_ADDRFROMCOORD_OUTPUT* pOut);
733
734
735
736 /**
737 ***************************************************************************************************
738 * ADDR_COMPUTE_SURFACE_COORDFROMADDR_INPUT
739 *
740 * @brief
741 * Input structure for AddrComputeSurfaceCoordFromAddr
742 ***************************************************************************************************
743 */
744 typedef struct _ADDR_COMPUTE_SURFACE_COORDFROMADDR_INPUT
745 {
746 UINT_32 size; ///< Size of this structure in bytes
747
748 UINT_64 addr; ///< Address in bytes
749 UINT_32 bitPosition; ///< Bit position in addr. 0-7. for surface bpp < 8,
750 /// e.g. FMT_1;
751 UINT_32 bpp; ///< Bits per pixel
752 UINT_32 pitch; ///< Pitch, in pixels
753 UINT_32 height; ///< Height in pixels
754 UINT_32 numSlices; ///< Surface depth
755 UINT_32 numSamples; ///< Number of samples
756
757 AddrTileMode tileMode; ///< Tile mode
758 BOOL_32 isDepth; ///< Surface uses depth sample ordering within micro tile.
759 /// Note: Textures can choose depth sample order as well.
760 UINT_32 tileBase; ///< Base offset (in bits) inside micro tile which handles
761 /// the case that components are stored separately
762 UINT_32 compBits; ///< The component bits actually needed(for planar surface)
763
764 UINT_32 numFrags; ///< Number of fragments, leave it zero or the same as
765 /// number of samples for normal AA; Set it to the
766 /// number of fragments for EQAA
767 /// r800 and later HWL parameters
768 // Used for 1D tiling above
769 AddrTileType tileType; ///< See defintion of AddrTileType
770 struct
771 {
772 UINT_32 ignoreSE : 1; ///< TRUE if shader engines are ignored. This is texture
773 /// only flag. Only non-RT texture can set this to TRUE
774 UINT_32 reserved :31; ///< Reserved for future use.
775 };
776 // 2D tiling needs following structure
777 ADDR_TILEINFO* pTileInfo; ///< 2D tile parameters. Client must provide all data
778 INT_32 tileIndex; ///< Tile index, MUST be -1 if you don't want to use it
779 /// while the global useTileIndex is set to 1
780 union
781 {
782 struct
783 {
784 UINT_32 bankSwizzle; ///< Bank swizzle
785 UINT_32 pipeSwizzle; ///< Pipe swizzle
786 };
787 UINT_32 tileSwizzle; ///< Combined swizzle, if useCombinedSwizzle is TRUE
788 };
789 } ADDR_COMPUTE_SURFACE_COORDFROMADDR_INPUT;
790
791 /**
792 ***************************************************************************************************
793 * ADDR_COMPUTE_SURFACE_COORDFROMADDR_OUTPUT
794 *
795 * @brief
796 * Output structure for AddrComputeSurfaceCoordFromAddr
797 ***************************************************************************************************
798 */
799 typedef struct _ADDR_COMPUTE_SURFACE_COORDFROMADDR_OUTPUT
800 {
801 UINT_32 size; ///< Size of this structure in bytes
802
803 UINT_32 x; ///< X coordinate
804 UINT_32 y; ///< Y coordinate
805 UINT_32 slice; ///< Index of slices
806 UINT_32 sample; ///< Index of samples, means fragment index for EQAA
807 } ADDR_COMPUTE_SURFACE_COORDFROMADDR_OUTPUT;
808
809 /**
810 ***************************************************************************************************
811 * AddrComputeSurfaceCoordFromAddr
812 *
813 * @brief
814 * Compute coordinate from a given surface address
815 ***************************************************************************************************
816 */
817 ADDR_E_RETURNCODE ADDR_API AddrComputeSurfaceCoordFromAddr(
818 ADDR_HANDLE hLib,
819 const ADDR_COMPUTE_SURFACE_COORDFROMADDR_INPUT* pIn,
820 ADDR_COMPUTE_SURFACE_COORDFROMADDR_OUTPUT* pOut);
821
822 ///////////////////////////////////////////////////////////////////////////////////////////////////
823 // HTile functions
824 ///////////////////////////////////////////////////////////////////////////////////////////////////
825
826 /**
827 ***************************************************************************************************
828 * ADDR_HTILE_FLAGS
829 *
830 * @brief
831 * HTILE flags
832 ***************************************************************************************************
833 */
834 typedef union _ADDR_HTILE_FLAGS
835 {
836 struct
837 {
838 UINT_32 tcCompatible : 1; ///< Flag indicates surface needs to be shader readable
839 UINT_32 reserved :31; ///< Reserved bits
840 };
841
842 UINT_32 value;
843 } ADDR_HTILE_FLAGS;
844
845 /**
846 ***************************************************************************************************
847 * ADDR_COMPUTE_HTILE_INFO_INPUT
848 *
849 * @brief
850 * Input structure of AddrComputeHtileInfo
851 ***************************************************************************************************
852 */
853 typedef struct _ADDR_COMPUTE_HTILE_INFO_INPUT
854 {
855 UINT_32 size; ///< Size of this structure in bytes
856
857 ADDR_HTILE_FLAGS flags; ///< HTILE flags
858 UINT_32 pitch; ///< Surface pitch, in pixels
859 UINT_32 height; ///< Surface height, in pixels
860 UINT_32 numSlices; ///< Number of slices
861 BOOL_32 isLinear; ///< Linear or tiled HTILE layout
862 AddrHtileBlockSize blockWidth; ///< 4 or 8. EG above only support 8
863 AddrHtileBlockSize blockHeight; ///< 4 or 8. EG above only support 8
864 ADDR_TILEINFO* pTileInfo; ///< Tile info
865
866 INT_32 tileIndex; ///< Tile index, MUST be -1 if you don't want to use it
867 /// while the global useTileIndex is set to 1
868 INT_32 macroModeIndex; ///< Index in macro tile mode table if there is one (CI)
869 ///< README: When tileIndex is not -1, this must be valid
870 } ADDR_COMPUTE_HTILE_INFO_INPUT;
871
872 /**
873 ***************************************************************************************************
874 * ADDR_COMPUTE_HTILE_INFO_OUTPUT
875 *
876 * @brief
877 * Output structure of AddrComputeHtileInfo
878 ***************************************************************************************************
879 */
880 typedef struct _ADDR_COMPUTE_HTILE_INFO_OUTPUT
881 {
882 UINT_32 size; ///< Size of this structure in bytes
883
884 UINT_32 pitch; ///< Pitch in pixels of depth buffer represented in this
885 /// HTile buffer. This might be larger than original depth
886 /// buffer pitch when called with an unaligned pitch.
887 UINT_32 height; ///< Height in pixels, as above
888 UINT_64 htileBytes; ///< Size of HTILE buffer, in bytes
889 UINT_32 baseAlign; ///< Base alignment
890 UINT_32 bpp; ///< Bits per pixel for HTILE is how many bits for an 8x8 block!
891 UINT_32 macroWidth; ///< Macro width in pixels, actually squared cache shape
892 UINT_32 macroHeight; ///< Macro height in pixels
893 UINT_64 sliceSize; ///< Slice size, in bytes.
894 } ADDR_COMPUTE_HTILE_INFO_OUTPUT;
895
896 /**
897 ***************************************************************************************************
898 * AddrComputeHtileInfo
899 *
900 * @brief
901 * Compute Htile pitch, height, base alignment and size in bytes
902 ***************************************************************************************************
903 */
904 ADDR_E_RETURNCODE ADDR_API AddrComputeHtileInfo(
905 ADDR_HANDLE hLib,
906 const ADDR_COMPUTE_HTILE_INFO_INPUT* pIn,
907 ADDR_COMPUTE_HTILE_INFO_OUTPUT* pOut);
908
909
910
911 /**
912 ***************************************************************************************************
913 * ADDR_COMPUTE_HTILE_ADDRFROMCOORD_INPUT
914 *
915 * @brief
916 * Input structure for AddrComputeHtileAddrFromCoord
917 ***************************************************************************************************
918 */
919 typedef struct _ADDR_COMPUTE_HTILE_ADDRFROMCOORD_INPUT
920 {
921 UINT_32 size; ///< Size of this structure in bytes
922
923 UINT_32 pitch; ///< Pitch, in pixels
924 UINT_32 height; ///< Height in pixels
925 UINT_32 x; ///< X coordinate
926 UINT_32 y; ///< Y coordinate
927 UINT_32 slice; ///< Index of slice
928 UINT_32 numSlices; ///< Number of slices
929 BOOL_32 isLinear; ///< Linear or tiled HTILE layout
930 ADDR_HTILE_FLAGS flags; ///< htile flags
931 AddrHtileBlockSize blockWidth; ///< 4 or 8. 1 means 8, 0 means 4. EG above only support 8
932 AddrHtileBlockSize blockHeight; ///< 4 or 8. 1 means 8, 0 means 4. EG above only support 8
933 ADDR_TILEINFO* pTileInfo; ///< Tile info
934
935 INT_32 tileIndex; ///< Tile index, MUST be -1 if you don't want to use it
936 /// while the global useTileIndex is set to 1
937 INT_32 macroModeIndex; ///< Index in macro tile mode table if there is one (CI)
938 ///< README: When tileIndex is not -1, this must be valid
939 UINT_32 bpp; ///< depth/stencil buffer bit per pixel size
940 UINT_32 zStencilAddr; ///< tcCompatible Z/Stencil surface address
941 } ADDR_COMPUTE_HTILE_ADDRFROMCOORD_INPUT;
942
943 /**
944 ***************************************************************************************************
945 * ADDR_COMPUTE_HTILE_ADDRFROMCOORD_OUTPUT
946 *
947 * @brief
948 * Output structure for AddrComputeHtileAddrFromCoord
949 ***************************************************************************************************
950 */
951 typedef struct _ADDR_COMPUTE_HTILE_ADDRFROMCOORD_OUTPUT
952 {
953 UINT_32 size; ///< Size of this structure in bytes
954
955 UINT_64 addr; ///< Address in bytes
956 UINT_32 bitPosition; ///< Bit position, 0 or 4. CMASK and HTILE shares some lib method.
957 /// So we keep bitPosition for HTILE as well
958 } ADDR_COMPUTE_HTILE_ADDRFROMCOORD_OUTPUT;
959
960 /**
961 ***************************************************************************************************
962 * AddrComputeHtileAddrFromCoord
963 *
964 * @brief
965 * Compute Htile address according to coordinates (of depth buffer)
966 ***************************************************************************************************
967 */
968 ADDR_E_RETURNCODE ADDR_API AddrComputeHtileAddrFromCoord(
969 ADDR_HANDLE hLib,
970 const ADDR_COMPUTE_HTILE_ADDRFROMCOORD_INPUT* pIn,
971 ADDR_COMPUTE_HTILE_ADDRFROMCOORD_OUTPUT* pOut);
972
973
974
975 /**
976 ***************************************************************************************************
977 * ADDR_COMPUTE_HTILE_COORDFROMADDR_INPUT
978 *
979 * @brief
980 * Input structure for AddrComputeHtileCoordFromAddr
981 ***************************************************************************************************
982 */
983 typedef struct _ADDR_COMPUTE_HTILE_COORDFROMADDR_INPUT
984 {
985 UINT_32 size; ///< Size of this structure in bytes
986
987 UINT_64 addr; ///< Address
988 UINT_32 bitPosition; ///< Bit position 0 or 4. CMASK and HTILE share some methods
989 /// so we keep bitPosition for HTILE as well
990 UINT_32 pitch; ///< Pitch, in pixels
991 UINT_32 height; ///< Height, in pixels
992 UINT_32 numSlices; ///< Number of slices
993 BOOL_32 isLinear; ///< Linear or tiled HTILE layout
994 AddrHtileBlockSize blockWidth; ///< 4 or 8. 1 means 8, 0 means 4. R8xx/R9xx only support 8
995 AddrHtileBlockSize blockHeight; ///< 4 or 8. 1 means 8, 0 means 4. R8xx/R9xx only support 8
996 ADDR_TILEINFO* pTileInfo; ///< Tile info
997
998 INT_32 tileIndex; ///< Tile index, MUST be -1 if you don't want to use it
999 /// while the global useTileIndex is set to 1
1000 INT_32 macroModeIndex; ///< Index in macro tile mode table if there is one (CI)
1001 ///< README: When tileIndex is not -1, this must be valid
1002 } ADDR_COMPUTE_HTILE_COORDFROMADDR_INPUT;
1003
1004 /**
1005 ***************************************************************************************************
1006 * ADDR_COMPUTE_HTILE_COORDFROMADDR_OUTPUT
1007 *
1008 * @brief
1009 * Output structure for AddrComputeHtileCoordFromAddr
1010 ***************************************************************************************************
1011 */
1012 typedef struct _ADDR_COMPUTE_HTILE_COORDFROMADDR_OUTPUT
1013 {
1014 UINT_32 size; ///< Size of this structure in bytes
1015
1016 UINT_32 x; ///< X coordinate
1017 UINT_32 y; ///< Y coordinate
1018 UINT_32 slice; ///< Slice index
1019 } ADDR_COMPUTE_HTILE_COORDFROMADDR_OUTPUT;
1020
1021 /**
1022 ***************************************************************************************************
1023 * AddrComputeHtileCoordFromAddr
1024 *
1025 * @brief
1026 * Compute coordinates within depth buffer (1st pixel of a micro tile) according to
1027 * Htile address
1028 ***************************************************************************************************
1029 */
1030 ADDR_E_RETURNCODE ADDR_API AddrComputeHtileCoordFromAddr(
1031 ADDR_HANDLE hLib,
1032 const ADDR_COMPUTE_HTILE_COORDFROMADDR_INPUT* pIn,
1033 ADDR_COMPUTE_HTILE_COORDFROMADDR_OUTPUT* pOut);
1034
1035
1036
1037 ///////////////////////////////////////////////////////////////////////////////////////////////////
1038 // C-mask functions
1039 ///////////////////////////////////////////////////////////////////////////////////////////////////
1040
1041 /**
1042 ***************************************************************************************************
1043 * ADDR_CMASK_FLAGS
1044 *
1045 * @brief
1046 * CMASK flags
1047 ***************************************************************************************************
1048 */
1049 typedef union _ADDR_CMASK_FLAGS
1050 {
1051 struct
1052 {
1053 UINT_32 tcCompatible : 1; ///< Flag indicates surface needs to be shader readable
1054 UINT_32 reserved :31; ///< Reserved bits
1055 };
1056
1057 UINT_32 value;
1058 } ADDR_CMASK_FLAGS;
1059
1060 /**
1061 ***************************************************************************************************
1062 * ADDR_COMPUTE_CMASK_INFO_INPUT
1063 *
1064 * @brief
1065 * Input structure of AddrComputeCmaskInfo
1066 ***************************************************************************************************
1067 */
1068 typedef struct _ADDR_COMPUTE_CMASKINFO_INPUT
1069 {
1070 UINT_32 size; ///< Size of this structure in bytes
1071
1072 ADDR_CMASK_FLAGS flags; ///< CMASK flags
1073 UINT_32 pitch; ///< Pitch, in pixels, of color buffer
1074 UINT_32 height; ///< Height, in pixels, of color buffer
1075 UINT_32 numSlices; ///< Number of slices, of color buffer
1076 BOOL_32 isLinear; ///< Linear or tiled layout, Only SI can be linear
1077 ADDR_TILEINFO* pTileInfo; ///< Tile info
1078
1079 INT_32 tileIndex; ///< Tile index, MUST be -1 if you don't want to use it
1080 /// while the global useTileIndex is set to 1
1081 INT_32 macroModeIndex; ///< Index in macro tile mode table if there is one (CI)
1082 ///< README: When tileIndex is not -1, this must be valid
1083 } ADDR_COMPUTE_CMASK_INFO_INPUT;
1084
1085 /**
1086 ***************************************************************************************************
1087 * ADDR_COMPUTE_CMASK_INFO_OUTPUT
1088 *
1089 * @brief
1090 * Output structure of AddrComputeCmaskInfo
1091 ***************************************************************************************************
1092 */
1093 typedef struct _ADDR_COMPUTE_CMASK_INFO_OUTPUT
1094 {
1095 UINT_32 size; ///< Size of this structure in bytes
1096
1097 UINT_32 pitch; ///< Pitch in pixels of color buffer which
1098 /// this Cmask matches. The size might be larger than
1099 /// original color buffer pitch when called with
1100 /// an unaligned pitch.
1101 UINT_32 height; ///< Height in pixels, as above
1102 UINT_64 cmaskBytes; ///< Size in bytes of CMask buffer
1103 UINT_32 baseAlign; ///< Base alignment
1104 UINT_32 blockMax; ///< Cmask block size. Need this to set CB_COLORn_MASK register
1105 UINT_32 macroWidth; ///< Macro width in pixels, actually squared cache shape
1106 UINT_32 macroHeight; ///< Macro height in pixels
1107 UINT_64 sliceSize; ///< Slice size, in bytes.
1108 } ADDR_COMPUTE_CMASK_INFO_OUTPUT;
1109
1110 /**
1111 ***************************************************************************************************
1112 * AddrComputeCmaskInfo
1113 *
1114 * @brief
1115 * Compute Cmask pitch, height, base alignment and size in bytes from color buffer
1116 * info
1117 ***************************************************************************************************
1118 */
1119 ADDR_E_RETURNCODE ADDR_API AddrComputeCmaskInfo(
1120 ADDR_HANDLE hLib,
1121 const ADDR_COMPUTE_CMASK_INFO_INPUT* pIn,
1122 ADDR_COMPUTE_CMASK_INFO_OUTPUT* pOut);
1123
1124
1125
1126 /**
1127 ***************************************************************************************************
1128 * ADDR_COMPUTE_CMASK_ADDRFROMCOORD_INPUT
1129 *
1130 * @brief
1131 * Input structure for AddrComputeCmaskAddrFromCoord
1132 *
1133 ***************************************************************************************************
1134 */
1135 typedef struct _ADDR_COMPUTE_CMASK_ADDRFROMCOORD_INPUT
1136 {
1137 UINT_32 size; ///< Size of this structure in bytes
1138 UINT_32 x; ///< X coordinate
1139 UINT_32 y; ///< Y coordinate
1140 UINT_64 fmaskAddr; ///< Fmask addr for tc compatible Cmask
1141 UINT_32 slice; ///< Slice index
1142 UINT_32 pitch; ///< Pitch in pixels, of color buffer
1143 UINT_32 height; ///< Height in pixels, of color buffer
1144 UINT_32 numSlices; ///< Number of slices
1145 UINT_32 bpp;
1146 BOOL_32 isLinear; ///< Linear or tiled layout, Only SI can be linear
1147 ADDR_CMASK_FLAGS flags; ///< CMASK flags
1148 ADDR_TILEINFO* pTileInfo; ///< Tile info
1149
1150 INT_32 tileIndex; ///< Tile index, MUST be -1 if you don't want to use it
1151 ///< while the global useTileIndex is set to 1
1152 INT_32 macroModeIndex; ///< Index in macro tile mode table if there is one (CI)
1153 ///< README: When tileIndex is not -1, this must be valid
1154 } ADDR_COMPUTE_CMASK_ADDRFROMCOORD_INPUT;
1155
1156 /**
1157 ***************************************************************************************************
1158 * ADDR_COMPUTE_CMASK_ADDRFROMCOORD_OUTPUT
1159 *
1160 * @brief
1161 * Output structure for AddrComputeCmaskAddrFromCoord
1162 ***************************************************************************************************
1163 */
1164 typedef struct _ADDR_COMPUTE_CMASK_ADDRFROMCOORD_OUTPUT
1165 {
1166 UINT_32 size; ///< Size of this structure in bytes
1167
1168 UINT_64 addr; ///< CMASK address in bytes
1169 UINT_32 bitPosition; ///< Bit position within addr, 0-7. CMASK is 4 bpp,
1170 /// so the address may be located in bit 0 (0) or 4 (4)
1171 } ADDR_COMPUTE_CMASK_ADDRFROMCOORD_OUTPUT;
1172
1173 /**
1174 ***************************************************************************************************
1175 * AddrComputeCmaskAddrFromCoord
1176 *
1177 * @brief
1178 * Compute Cmask address according to coordinates (of MSAA color buffer)
1179 ***************************************************************************************************
1180 */
1181 ADDR_E_RETURNCODE ADDR_API AddrComputeCmaskAddrFromCoord(
1182 ADDR_HANDLE hLib,
1183 const ADDR_COMPUTE_CMASK_ADDRFROMCOORD_INPUT* pIn,
1184 ADDR_COMPUTE_CMASK_ADDRFROMCOORD_OUTPUT* pOut);
1185
1186
1187
1188 /**
1189 ***************************************************************************************************
1190 * ADDR_COMPUTE_CMASK_COORDFROMADDR_INPUT
1191 *
1192 * @brief
1193 * Input structure for AddrComputeCmaskCoordFromAddr
1194 ***************************************************************************************************
1195 */
1196 typedef struct _ADDR_COMPUTE_CMASK_COORDFROMADDR_INPUT
1197 {
1198 UINT_32 size; ///< Size of this structure in bytes
1199
1200 UINT_64 addr; ///< CMASK address in bytes
1201 UINT_32 bitPosition; ///< Bit position within addr, 0-7. CMASK is 4 bpp,
1202 /// so the address may be located in bit 0 (0) or 4 (4)
1203 UINT_32 pitch; ///< Pitch, in pixels
1204 UINT_32 height; ///< Height in pixels
1205 UINT_32 numSlices; ///< Number of slices
1206 BOOL_32 isLinear; ///< Linear or tiled layout, Only SI can be linear
1207 ADDR_TILEINFO* pTileInfo; ///< Tile info
1208
1209 INT_32 tileIndex; ///< Tile index, MUST be -1 if you don't want to use it
1210 /// while the global useTileIndex is set to 1
1211 INT_32 macroModeIndex; ///< Index in macro tile mode table if there is one (CI)
1212 ///< README: When tileIndex is not -1, this must be valid
1213 } ADDR_COMPUTE_CMASK_COORDFROMADDR_INPUT;
1214
1215 /**
1216 ***************************************************************************************************
1217 * ADDR_COMPUTE_CMASK_COORDFROMADDR_OUTPUT
1218 *
1219 * @brief
1220 * Output structure for AddrComputeCmaskCoordFromAddr
1221 ***************************************************************************************************
1222 */
1223 typedef struct _ADDR_COMPUTE_CMASK_COORDFROMADDR_OUTPUT
1224 {
1225 UINT_32 size; ///< Size of this structure in bytes
1226
1227 UINT_32 x; ///< X coordinate
1228 UINT_32 y; ///< Y coordinate
1229 UINT_32 slice; ///< Slice index
1230 } ADDR_COMPUTE_CMASK_COORDFROMADDR_OUTPUT;
1231
1232 /**
1233 ***************************************************************************************************
1234 * AddrComputeCmaskCoordFromAddr
1235 *
1236 * @brief
1237 * Compute coordinates within color buffer (1st pixel of a micro tile) according to
1238 * Cmask address
1239 ***************************************************************************************************
1240 */
1241 ADDR_E_RETURNCODE ADDR_API AddrComputeCmaskCoordFromAddr(
1242 ADDR_HANDLE hLib,
1243 const ADDR_COMPUTE_CMASK_COORDFROMADDR_INPUT* pIn,
1244 ADDR_COMPUTE_CMASK_COORDFROMADDR_OUTPUT* pOut);
1245
1246
1247
1248 ///////////////////////////////////////////////////////////////////////////////////////////////////
1249 // F-mask functions
1250 ///////////////////////////////////////////////////////////////////////////////////////////////////
1251
1252 /**
1253 ***************************************************************************************************
1254 * ADDR_COMPUTE_FMASK_INFO_INPUT
1255 *
1256 * @brief
1257 * Input structure for AddrComputeFmaskInfo
1258 ***************************************************************************************************
1259 */
1260 typedef struct _ADDR_COMPUTE_FMASK_INFO_INPUT
1261 {
1262 UINT_32 size; ///< Size of this structure in bytes
1263
1264 AddrTileMode tileMode; ///< Tile mode
1265 UINT_32 pitch; ///< Surface pitch, in pixels
1266 UINT_32 height; ///< Surface height, in pixels
1267 UINT_32 numSlices; ///< Number of slice/depth
1268 UINT_32 numSamples; ///< Number of samples
1269 UINT_32 numFrags; ///< Number of fragments, leave it zero or the same as
1270 /// number of samples for normal AA; Set it to the
1271 /// number of fragments for EQAA
1272 /// r800 and later HWL parameters
1273 struct
1274 {
1275 UINT_32 resolved: 1; ///< TRUE if the surface is for resolved fmask, only used
1276 /// by H/W clients. S/W should always set it to FALSE.
1277 UINT_32 reserved: 31; ///< Reserved for future use.
1278 };
1279 ADDR_TILEINFO* pTileInfo; ///< 2D tiling parameters. Clients must give valid data
1280 INT_32 tileIndex; ///< Tile index, MUST be -1 if you don't want to use it
1281 /// while the global useTileIndex is set to 1
1282 } ADDR_COMPUTE_FMASK_INFO_INPUT;
1283
1284 /**
1285 ***************************************************************************************************
1286 * ADDR_COMPUTE_FMASK_INFO_OUTPUT
1287 *
1288 * @brief
1289 * Output structure for AddrComputeFmaskInfo
1290 ***************************************************************************************************
1291 */
1292 typedef struct _ADDR_COMPUTE_FMASK_INFO_OUTPUT
1293 {
1294 UINT_32 size; ///< Size of this structure in bytes
1295
1296 UINT_32 pitch; ///< Pitch of fmask in pixels
1297 UINT_32 height; ///< Height of fmask in pixels
1298 UINT_32 numSlices; ///< Slices of fmask
1299 UINT_64 fmaskBytes; ///< Size of fmask in bytes
1300 UINT_32 baseAlign; ///< Base address alignment
1301 UINT_32 pitchAlign; ///< Pitch alignment
1302 UINT_32 heightAlign; ///< Height alignment
1303 UINT_32 bpp; ///< Bits per pixel of FMASK is: number of bit planes
1304 UINT_32 numSamples; ///< Number of samples, used for dump, export this since input
1305 /// may be changed in 9xx and above
1306 /// r800 and later HWL parameters
1307 ADDR_TILEINFO* pTileInfo; ///< Tile parameters used. Fmask can have different
1308 /// bank_height from color buffer
1309 INT_32 tileIndex; ///< Tile index, MUST be -1 if you don't want to use it
1310 /// while the global useTileIndex is set to 1
1311 INT_32 macroModeIndex; ///< Index in macro tile mode table if there is one (CI)
1312 UINT_64 sliceSize; ///< Size of slice in bytes
1313 } ADDR_COMPUTE_FMASK_INFO_OUTPUT;
1314
1315 /**
1316 ***************************************************************************************************
1317 * AddrComputeFmaskInfo
1318 *
1319 * @brief
1320 * Compute Fmask pitch/height/depth/alignments and size in bytes
1321 ***************************************************************************************************
1322 */
1323 ADDR_E_RETURNCODE ADDR_API AddrComputeFmaskInfo(
1324 ADDR_HANDLE hLib,
1325 const ADDR_COMPUTE_FMASK_INFO_INPUT* pIn,
1326 ADDR_COMPUTE_FMASK_INFO_OUTPUT* pOut);
1327
1328
1329
1330 /**
1331 ***************************************************************************************************
1332 * ADDR_COMPUTE_FMASK_ADDRFROMCOORD_INPUT
1333 *
1334 * @brief
1335 * Input structure for AddrComputeFmaskAddrFromCoord
1336 ***************************************************************************************************
1337 */
1338 typedef struct _ADDR_COMPUTE_FMASK_ADDRFROMCOORD_INPUT
1339 {
1340 UINT_32 size; ///< Size of this structure in bytes
1341
1342 UINT_32 x; ///< X coordinate
1343 UINT_32 y; ///< Y coordinate
1344 UINT_32 slice; ///< Slice index
1345 UINT_32 plane; ///< Plane number
1346 UINT_32 sample; ///< Sample index (fragment index for EQAA)
1347
1348 UINT_32 pitch; ///< Surface pitch, in pixels
1349 UINT_32 height; ///< Surface height, in pixels
1350 UINT_32 numSamples; ///< Number of samples
1351 UINT_32 numFrags; ///< Number of fragments, leave it zero or the same as
1352 /// number of samples for normal AA; Set it to the
1353 /// number of fragments for EQAA
1354
1355 AddrTileMode tileMode; ///< Tile mode
1356 union
1357 {
1358 struct
1359 {
1360 UINT_32 bankSwizzle; ///< Bank swizzle
1361 UINT_32 pipeSwizzle; ///< Pipe swizzle
1362 };
1363 UINT_32 tileSwizzle; ///< Combined swizzle, if useCombinedSwizzle is TRUE
1364 };
1365
1366 /// r800 and later HWL parameters
1367 struct
1368 {
1369 UINT_32 resolved: 1; ///< TRUE if this is a resolved fmask, used by H/W clients
1370 UINT_32 ignoreSE: 1; ///< TRUE if shader engines are ignored.
1371 UINT_32 reserved: 30; ///< Reserved for future use.
1372 };
1373 ADDR_TILEINFO* pTileInfo; ///< 2D tiling parameters. Client must provide all data
1374
1375 } ADDR_COMPUTE_FMASK_ADDRFROMCOORD_INPUT;
1376
1377 /**
1378 ***************************************************************************************************
1379 * ADDR_COMPUTE_FMASK_ADDRFROMCOORD_OUTPUT
1380 *
1381 * @brief
1382 * Output structure for AddrComputeFmaskAddrFromCoord
1383 ***************************************************************************************************
1384 */
1385 typedef struct _ADDR_COMPUTE_FMASK_ADDRFROMCOORD_OUTPUT
1386 {
1387 UINT_32 size; ///< Size of this structure in bytes
1388
1389 UINT_64 addr; ///< Fmask address
1390 UINT_32 bitPosition; ///< Bit position within fmaskAddr, 0-7.
1391 } ADDR_COMPUTE_FMASK_ADDRFROMCOORD_OUTPUT;
1392
1393 /**
1394 ***************************************************************************************************
1395 * AddrComputeFmaskAddrFromCoord
1396 *
1397 * @brief
1398 * Compute Fmask address according to coordinates (x,y,slice,sample,plane)
1399 ***************************************************************************************************
1400 */
1401 ADDR_E_RETURNCODE ADDR_API AddrComputeFmaskAddrFromCoord(
1402 ADDR_HANDLE hLib,
1403 const ADDR_COMPUTE_FMASK_ADDRFROMCOORD_INPUT* pIn,
1404 ADDR_COMPUTE_FMASK_ADDRFROMCOORD_OUTPUT* pOut);
1405
1406
1407
1408 /**
1409 ***************************************************************************************************
1410 * ADDR_COMPUTE_FMASK_COORDFROMADDR_INPUT
1411 *
1412 * @brief
1413 * Input structure for AddrComputeFmaskCoordFromAddr
1414 ***************************************************************************************************
1415 */
1416 typedef struct _ADDR_COMPUTE_FMASK_COORDFROMADDR_INPUT
1417 {
1418 UINT_32 size; ///< Size of this structure in bytes
1419
1420 UINT_64 addr; ///< Address
1421 UINT_32 bitPosition; ///< Bit position within addr, 0-7.
1422
1423 UINT_32 pitch; ///< Pitch, in pixels
1424 UINT_32 height; ///< Height in pixels
1425 UINT_32 numSamples; ///< Number of samples
1426 UINT_32 numFrags; ///< Number of fragments
1427 AddrTileMode tileMode; ///< Tile mode
1428 union
1429 {
1430 struct
1431 {
1432 UINT_32 bankSwizzle; ///< Bank swizzle
1433 UINT_32 pipeSwizzle; ///< Pipe swizzle
1434 };
1435 UINT_32 tileSwizzle; ///< Combined swizzle, if useCombinedSwizzle is TRUE
1436 };
1437
1438 /// r800 and later HWL parameters
1439 struct
1440 {
1441 UINT_32 resolved: 1; ///< TRUE if this is a resolved fmask, used by HW components
1442 UINT_32 ignoreSE: 1; ///< TRUE if shader engines are ignored.
1443 UINT_32 reserved: 30; ///< Reserved for future use.
1444 };
1445 ADDR_TILEINFO* pTileInfo; ///< 2D tile parameters. Client must provide all data
1446
1447 } ADDR_COMPUTE_FMASK_COORDFROMADDR_INPUT;
1448
1449 /**
1450 ***************************************************************************************************
1451 * ADDR_COMPUTE_FMASK_COORDFROMADDR_OUTPUT
1452 *
1453 * @brief
1454 * Output structure for AddrComputeFmaskCoordFromAddr
1455 ***************************************************************************************************
1456 */
1457 typedef struct _ADDR_COMPUTE_FMASK_COORDFROMADDR_OUTPUT
1458 {
1459 UINT_32 size; ///< Size of this structure in bytes
1460
1461 UINT_32 x; ///< X coordinate
1462 UINT_32 y; ///< Y coordinate
1463 UINT_32 slice; ///< Slice index
1464 UINT_32 plane; ///< Plane number
1465 UINT_32 sample; ///< Sample index (fragment index for EQAA)
1466 } ADDR_COMPUTE_FMASK_COORDFROMADDR_OUTPUT;
1467
1468 /**
1469 ***************************************************************************************************
1470 * AddrComputeFmaskCoordFromAddr
1471 *
1472 * @brief
1473 * Compute FMASK coordinate from an given address
1474 ***************************************************************************************************
1475 */
1476 ADDR_E_RETURNCODE ADDR_API AddrComputeFmaskCoordFromAddr(
1477 ADDR_HANDLE hLib,
1478 const ADDR_COMPUTE_FMASK_COORDFROMADDR_INPUT* pIn,
1479 ADDR_COMPUTE_FMASK_COORDFROMADDR_OUTPUT* pOut);
1480
1481
1482
1483 ///////////////////////////////////////////////////////////////////////////////////////////////////
1484 // Element/utility functions
1485 ///////////////////////////////////////////////////////////////////////////////////////////////////
1486
1487 /**
1488 ***************************************************************************************************
1489 * AddrGetVersion
1490 *
1491 * @brief
1492 * Get AddrLib version number
1493 ***************************************************************************************************
1494 */
1495 UINT_32 ADDR_API AddrGetVersion(ADDR_HANDLE hLib);
1496
1497 /**
1498 ***************************************************************************************************
1499 * AddrUseTileIndex
1500 *
1501 * @brief
1502 * Return TRUE if tileIndex is enabled in this address library
1503 ***************************************************************************************************
1504 */
1505 BOOL_32 ADDR_API AddrUseTileIndex(ADDR_HANDLE hLib);
1506
1507 /**
1508 ***************************************************************************************************
1509 * AddrUseCombinedSwizzle
1510 *
1511 * @brief
1512 * Return TRUE if combined swizzle is enabled in this address library
1513 ***************************************************************************************************
1514 */
1515 BOOL_32 ADDR_API AddrUseCombinedSwizzle(ADDR_HANDLE hLib);
1516
1517 /**
1518 ***************************************************************************************************
1519 * ADDR_EXTRACT_BANKPIPE_SWIZZLE_INPUT
1520 *
1521 * @brief
1522 * Input structure of AddrExtractBankPipeSwizzle
1523 ***************************************************************************************************
1524 */
1525 typedef struct _ADDR_EXTRACT_BANKPIPE_SWIZZLE_INPUT
1526 {
1527 UINT_32 size; ///< Size of this structure in bytes
1528
1529 UINT_32 base256b; ///< Base256b value
1530
1531 /// r800 and later HWL parameters
1532 ADDR_TILEINFO* pTileInfo; ///< 2D tile parameters. Client must provide all data
1533
1534 INT_32 tileIndex; ///< Tile index, MUST be -1 if you don't want to use it
1535 /// while the global useTileIndex is set to 1
1536 INT_32 macroModeIndex; ///< Index in macro tile mode table if there is one (CI)
1537 ///< README: When tileIndex is not -1, this must be valid
1538 } ADDR_EXTRACT_BANKPIPE_SWIZZLE_INPUT;
1539
1540 /**
1541 ***************************************************************************************************
1542 * ADDR_EXTRACT_BANKPIPE_SWIZZLE_OUTPUT
1543 *
1544 * @brief
1545 * Output structure of AddrExtractBankPipeSwizzle
1546 ***************************************************************************************************
1547 */
1548 typedef struct _ADDR_EXTRACT_BANKPIPE_SWIZZLE_OUTPUT
1549 {
1550 UINT_32 size; ///< Size of this structure in bytes
1551
1552 UINT_32 bankSwizzle; ///< Bank swizzle
1553 UINT_32 pipeSwizzle; ///< Pipe swizzle
1554 } ADDR_EXTRACT_BANKPIPE_SWIZZLE_OUTPUT;
1555
1556 /**
1557 ***************************************************************************************************
1558 * AddrExtractBankPipeSwizzle
1559 *
1560 * @brief
1561 * Extract Bank and Pipe swizzle from base256b
1562 * @return
1563 * ADDR_OK if no error
1564 ***************************************************************************************************
1565 */
1566 ADDR_E_RETURNCODE ADDR_API AddrExtractBankPipeSwizzle(
1567 ADDR_HANDLE hLib,
1568 const ADDR_EXTRACT_BANKPIPE_SWIZZLE_INPUT* pIn,
1569 ADDR_EXTRACT_BANKPIPE_SWIZZLE_OUTPUT* pOut);
1570
1571
1572 /**
1573 ***************************************************************************************************
1574 * ADDR_COMBINE_BANKPIPE_SWIZZLE_INPUT
1575 *
1576 * @brief
1577 * Input structure of AddrCombineBankPipeSwizzle
1578 ***************************************************************************************************
1579 */
1580 typedef struct _ADDR_COMBINE_BANKPIPE_SWIZZLE_INPUT
1581 {
1582 UINT_32 size; ///< Size of this structure in bytes
1583
1584 UINT_32 bankSwizzle; ///< Bank swizzle
1585 UINT_32 pipeSwizzle; ///< Pipe swizzle
1586 UINT_64 baseAddr; ///< Base address (leave it zero for driver clients)
1587
1588 /// r800 and later HWL parameters
1589 ADDR_TILEINFO* pTileInfo; ///< 2D tile parameters. Client must provide all data
1590
1591 INT_32 tileIndex; ///< Tile index, MUST be -1 if you don't want to use it
1592 /// while the global useTileIndex is set to 1
1593 INT_32 macroModeIndex; ///< Index in macro tile mode table if there is one (CI)
1594 ///< README: When tileIndex is not -1, this must be valid
1595 } ADDR_COMBINE_BANKPIPE_SWIZZLE_INPUT;
1596
1597 /**
1598 ***************************************************************************************************
1599 * ADDR_COMBINE_BANKPIPE_SWIZZLE_OUTPUT
1600 *
1601 * @brief
1602 * Output structure of AddrCombineBankPipeSwizzle
1603 ***************************************************************************************************
1604 */
1605 typedef struct _ADDR_COMBINE_BANKPIPE_SWIZZLE_OUTPUT
1606 {
1607 UINT_32 size; ///< Size of this structure in bytes
1608
1609 UINT_32 tileSwizzle; ///< Combined swizzle
1610 } ADDR_COMBINE_BANKPIPE_SWIZZLE_OUTPUT;
1611
1612 /**
1613 ***************************************************************************************************
1614 * AddrCombineBankPipeSwizzle
1615 *
1616 * @brief
1617 * Combine Bank and Pipe swizzle
1618 * @return
1619 * ADDR_OK if no error
1620 * @note
1621 * baseAddr here is full MCAddress instead of base256b
1622 ***************************************************************************************************
1623 */
1624 ADDR_E_RETURNCODE ADDR_API AddrCombineBankPipeSwizzle(
1625 ADDR_HANDLE hLib,
1626 const ADDR_COMBINE_BANKPIPE_SWIZZLE_INPUT* pIn,
1627 ADDR_COMBINE_BANKPIPE_SWIZZLE_OUTPUT* pOut);
1628
1629
1630
1631 /**
1632 ***************************************************************************************************
1633 * ADDR_COMPUTE_SLICESWIZZLE_INPUT
1634 *
1635 * @brief
1636 * Input structure of AddrComputeSliceSwizzle
1637 ***************************************************************************************************
1638 */
1639 typedef struct _ADDR_COMPUTE_SLICESWIZZLE_INPUT
1640 {
1641 UINT_32 size; ///< Size of this structure in bytes
1642
1643 AddrTileMode tileMode; ///< Tile Mode
1644 UINT_32 baseSwizzle; ///< Base tile swizzle
1645 UINT_32 slice; ///< Slice index
1646 UINT_64 baseAddr; ///< Base address, driver should leave it 0 in most cases
1647
1648 /// r800 and later HWL parameters
1649 ADDR_TILEINFO* pTileInfo; ///< 2D tile parameters. Actually banks needed here!
1650
1651 INT_32 tileIndex; ///< Tile index, MUST be -1 if you don't want to use it
1652 /// while the global useTileIndex is set to 1
1653 INT_32 macroModeIndex; ///< Index in macro tile mode table if there is one (CI)
1654 ///< README: When tileIndex is not -1, this must be valid
1655 } ADDR_COMPUTE_SLICESWIZZLE_INPUT;
1656
1657
1658
1659 /**
1660 ***************************************************************************************************
1661 * ADDR_COMPUTE_SLICESWIZZLE_OUTPUT
1662 *
1663 * @brief
1664 * Output structure of AddrComputeSliceSwizzle
1665 ***************************************************************************************************
1666 */
1667 typedef struct _ADDR_COMPUTE_SLICESWIZZLE_OUTPUT
1668 {
1669 UINT_32 size; ///< Size of this structure in bytes
1670
1671 UINT_32 tileSwizzle; ///< Recalculated tileSwizzle value
1672 } ADDR_COMPUTE_SLICESWIZZLE_OUTPUT;
1673
1674 /**
1675 ***************************************************************************************************
1676 * AddrComputeSliceSwizzle
1677 *
1678 * @brief
1679 * Extract Bank and Pipe swizzle from base256b
1680 * @return
1681 * ADDR_OK if no error
1682 ***************************************************************************************************
1683 */
1684 ADDR_E_RETURNCODE ADDR_API AddrComputeSliceSwizzle(
1685 ADDR_HANDLE hLib,
1686 const ADDR_COMPUTE_SLICESWIZZLE_INPUT* pIn,
1687 ADDR_COMPUTE_SLICESWIZZLE_OUTPUT* pOut);
1688
1689
1690 /**
1691 ***************************************************************************************************
1692 * AddrSwizzleGenOption
1693 *
1694 * @brief
1695 * Which swizzle generating options: legacy or linear
1696 ***************************************************************************************************
1697 */
1698 typedef enum _AddrSwizzleGenOption
1699 {
1700 ADDR_SWIZZLE_GEN_DEFAULT = 0, ///< As is in client driver implemention for swizzle
1701 ADDR_SWIZZLE_GEN_LINEAR = 1, ///< Using a linear increment of swizzle
1702 } AddrSwizzleGenOption;
1703
1704 /**
1705 ***************************************************************************************************
1706 * AddrSwizzleOption
1707 *
1708 * @brief
1709 * Controls how swizzle is generated
1710 ***************************************************************************************************
1711 */
1712 typedef union _ADDR_SWIZZLE_OPTION
1713 {
1714 struct
1715 {
1716 UINT_32 genOption : 1; ///< The way swizzle is generated, see AddrSwizzleGenOption
1717 UINT_32 reduceBankBit : 1; ///< TRUE if we need reduce swizzle bits
1718 UINT_32 reserved :30; ///< Reserved bits
1719 };
1720
1721 UINT_32 value;
1722
1723 } ADDR_SWIZZLE_OPTION;
1724
1725 /**
1726 ***************************************************************************************************
1727 * ADDR_COMPUTE_BASE_SWIZZLE_INPUT
1728 *
1729 * @brief
1730 * Input structure of AddrComputeBaseSwizzle
1731 ***************************************************************************************************
1732 */
1733 typedef struct _ADDR_COMPUTE_BASE_SWIZZLE_INPUT
1734 {
1735 UINT_32 size; ///< Size of this structure in bytes
1736
1737 ADDR_SWIZZLE_OPTION option; ///< Swizzle option
1738 UINT_32 surfIndex; ///< Index of this surface type
1739 AddrTileMode tileMode; ///< Tile Mode
1740
1741 /// r800 and later HWL parameters
1742 ADDR_TILEINFO* pTileInfo; ///< 2D tile parameters. Actually banks needed here!
1743
1744 INT_32 tileIndex; ///< Tile index, MUST be -1 if you don't want to use it
1745 /// while the global useTileIndex is set to 1
1746 INT_32 macroModeIndex; ///< Index in macro tile mode table if there is one (CI)
1747 ///< README: When tileIndex is not -1, this must be valid
1748 } ADDR_COMPUTE_BASE_SWIZZLE_INPUT;
1749
1750 /**
1751 ***************************************************************************************************
1752 * ADDR_COMPUTE_BASE_SWIZZLE_OUTPUT
1753 *
1754 * @brief
1755 * Output structure of AddrComputeBaseSwizzle
1756 ***************************************************************************************************
1757 */
1758 typedef struct _ADDR_COMPUTE_BASE_SWIZZLE_OUTPUT
1759 {
1760 UINT_32 size; ///< Size of this structure in bytes
1761
1762 UINT_32 tileSwizzle; ///< Combined swizzle
1763 } ADDR_COMPUTE_BASE_SWIZZLE_OUTPUT;
1764
1765 /**
1766 ***************************************************************************************************
1767 * AddrComputeBaseSwizzle
1768 *
1769 * @brief
1770 * Return a Combined Bank and Pipe swizzle base on surface based on surface type/index
1771 * @return
1772 * ADDR_OK if no error
1773 ***************************************************************************************************
1774 */
1775 ADDR_E_RETURNCODE ADDR_API AddrComputeBaseSwizzle(
1776 ADDR_HANDLE hLib,
1777 const ADDR_COMPUTE_BASE_SWIZZLE_INPUT* pIn,
1778 ADDR_COMPUTE_BASE_SWIZZLE_OUTPUT* pOut);
1779
1780
1781
1782 /**
1783 ***************************************************************************************************
1784 * ELEM_GETEXPORTNORM_INPUT
1785 *
1786 * @brief
1787 * Input structure for ElemGetExportNorm
1788 *
1789 ***************************************************************************************************
1790 */
1791 typedef struct _ELEM_GETEXPORTNORM_INPUT
1792 {
1793 UINT_32 size; ///< Size of this structure in bytes
1794
1795 AddrColorFormat format; ///< Color buffer format; Client should use ColorFormat
1796 AddrSurfaceNumber num; ///< Surface number type; Client should use NumberType
1797 AddrSurfaceSwap swap; ///< Surface swap byte swap; Client should use SurfaceSwap
1798 UINT_32 numSamples; ///< Number of samples
1799 } ELEM_GETEXPORTNORM_INPUT;
1800
1801 /**
1802 ***************************************************************************************************
1803 * ElemGetExportNorm
1804 *
1805 * @brief
1806 * Helper function to check one format can be EXPORT_NUM, which is a register
1807 * CB_COLOR_INFO.SURFACE_FORMAT. FP16 can be reported as EXPORT_NORM for rv770 in r600
1808 * family
1809 * @note
1810 * The implementation is only for r600.
1811 * 00 - EXPORT_FULL: PS exports are 4 pixels with 4 components with 32-bits-per-component. (two
1812 * clocks per export)
1813 * 01 - EXPORT_NORM: PS exports are 4 pixels with 4 components with 16-bits-per-component. (one
1814 * clock per export)
1815 *
1816 ***************************************************************************************************
1817 */
1818 BOOL_32 ADDR_API ElemGetExportNorm(
1819 ADDR_HANDLE hLib,
1820 const ELEM_GETEXPORTNORM_INPUT* pIn);
1821
1822
1823
1824 /**
1825 ***************************************************************************************************
1826 * ELEM_FLT32TODEPTHPIXEL_INPUT
1827 *
1828 * @brief
1829 * Input structure for addrFlt32ToDepthPixel
1830 *
1831 ***************************************************************************************************
1832 */
1833 typedef struct _ELEM_FLT32TODEPTHPIXEL_INPUT
1834 {
1835 UINT_32 size; ///< Size of this structure in bytes
1836
1837 AddrDepthFormat format; ///< Depth buffer format
1838 ADDR_FLT_32 comps[2]; ///< Component values (Z/stencil)
1839 } ELEM_FLT32TODEPTHPIXEL_INPUT;
1840
1841 /**
1842 ***************************************************************************************************
1843 * ELEM_FLT32TODEPTHPIXEL_INPUT
1844 *
1845 * @brief
1846 * Output structure for ElemFlt32ToDepthPixel
1847 *
1848 ***************************************************************************************************
1849 */
1850 typedef struct _ELEM_FLT32TODEPTHPIXEL_OUTPUT
1851 {
1852 UINT_32 size; ///< Size of this structure in bytes
1853
1854 UINT_8* pPixel; ///< Real depth value. Same data type as depth buffer.
1855 /// Client must provide enough storage for this type.
1856 UINT_32 depthBase; ///< Tile base in bits for depth bits
1857 UINT_32 stencilBase; ///< Tile base in bits for stencil bits
1858 UINT_32 depthBits; ///< Bits for depth
1859 UINT_32 stencilBits; ///< Bits for stencil
1860 } ELEM_FLT32TODEPTHPIXEL_OUTPUT;
1861
1862 /**
1863 ***************************************************************************************************
1864 * ElemFlt32ToDepthPixel
1865 *
1866 * @brief
1867 * Convert a FLT_32 value to a depth/stencil pixel value
1868 *
1869 * @return
1870 * Return code
1871 *
1872 ***************************************************************************************************
1873 */
1874 ADDR_E_RETURNCODE ADDR_API ElemFlt32ToDepthPixel(
1875 ADDR_HANDLE hLib,
1876 const ELEM_FLT32TODEPTHPIXEL_INPUT* pIn,
1877 ELEM_FLT32TODEPTHPIXEL_OUTPUT* pOut);
1878
1879
1880
1881 /**
1882 ***************************************************************************************************
1883 * ELEM_FLT32TOCOLORPIXEL_INPUT
1884 *
1885 * @brief
1886 * Input structure for addrFlt32ToColorPixel
1887 *
1888 ***************************************************************************************************
1889 */
1890 typedef struct _ELEM_FLT32TOCOLORPIXEL_INPUT
1891 {
1892 UINT_32 size; ///< Size of this structure in bytes
1893
1894 AddrColorFormat format; ///< Color buffer format
1895 AddrSurfaceNumber surfNum; ///< Surface number
1896 AddrSurfaceSwap surfSwap; ///< Surface swap
1897 ADDR_FLT_32 comps[4]; ///< Component values (r/g/b/a)
1898 } ELEM_FLT32TOCOLORPIXEL_INPUT;
1899
1900 /**
1901 ***************************************************************************************************
1902 * ELEM_FLT32TOCOLORPIXEL_INPUT
1903 *
1904 * @brief
1905 * Output structure for ElemFlt32ToColorPixel
1906 *
1907 ***************************************************************************************************
1908 */
1909 typedef struct _ELEM_FLT32TOCOLORPIXEL_OUTPUT
1910 {
1911 UINT_32 size; ///< Size of this structure in bytes
1912
1913 UINT_8* pPixel; ///< Real color value. Same data type as color buffer.
1914 /// Client must provide enough storage for this type.
1915 } ELEM_FLT32TOCOLORPIXEL_OUTPUT;
1916
1917 /**
1918 ***************************************************************************************************
1919 * ElemFlt32ToColorPixel
1920 *
1921 * @brief
1922 * Convert a FLT_32 value to a red/green/blue/alpha pixel value
1923 *
1924 * @return
1925 * Return code
1926 *
1927 ***************************************************************************************************
1928 */
1929 ADDR_E_RETURNCODE ADDR_API ElemFlt32ToColorPixel(
1930 ADDR_HANDLE hLib,
1931 const ELEM_FLT32TOCOLORPIXEL_INPUT* pIn,
1932 ELEM_FLT32TOCOLORPIXEL_OUTPUT* pOut);
1933
1934
1935 /**
1936 ***************************************************************************************************
1937 * ADDR_CONVERT_TILEINFOTOHW_INPUT
1938 *
1939 * @brief
1940 * Input structure for AddrConvertTileInfoToHW
1941 * @note
1942 * When reverse is TRUE, indices are igonred
1943 ***************************************************************************************************
1944 */
1945 typedef struct _ADDR_CONVERT_TILEINFOTOHW_INPUT
1946 {
1947 UINT_32 size; ///< Size of this structure in bytes
1948 BOOL_32 reverse; ///< Convert control flag.
1949 /// FALSE: convert from real value to HW value;
1950 /// TRUE: convert from HW value to real value.
1951
1952 /// r800 and later HWL parameters
1953 ADDR_TILEINFO* pTileInfo; ///< Tile parameters with real value
1954
1955 INT_32 tileIndex; ///< Tile index, MUST be -1 if you don't want to use it
1956 /// while the global useTileIndex is set to 1
1957 INT_32 macroModeIndex; ///< Index in macro tile mode table if there is one (CI)
1958 ///< README: When tileIndex is not -1, this must be valid
1959 UINT_32 bpp; ///< Bits per pixel
1960 } ADDR_CONVERT_TILEINFOTOHW_INPUT;
1961
1962 /**
1963 ***************************************************************************************************
1964 * ADDR_CONVERT_TILEINFOTOHW_OUTPUT
1965 *
1966 * @brief
1967 * Output structure for AddrConvertTileInfoToHW
1968 ***************************************************************************************************
1969 */
1970 typedef struct _ADDR_CONVERT_TILEINFOTOHW_OUTPUT
1971 {
1972 UINT_32 size; ///< Size of this structure in bytes
1973
1974 /// r800 and later HWL parameters
1975 ADDR_TILEINFO* pTileInfo; ///< Tile parameters with hardware register value
1976
1977 } ADDR_CONVERT_TILEINFOTOHW_OUTPUT;
1978
1979 /**
1980 ***************************************************************************************************
1981 * AddrConvertTileInfoToHW
1982 *
1983 * @brief
1984 * Convert tile info from real value to hardware register value
1985 ***************************************************************************************************
1986 */
1987 ADDR_E_RETURNCODE ADDR_API AddrConvertTileInfoToHW(
1988 ADDR_HANDLE hLib,
1989 const ADDR_CONVERT_TILEINFOTOHW_INPUT* pIn,
1990 ADDR_CONVERT_TILEINFOTOHW_OUTPUT* pOut);
1991
1992
1993
1994 /**
1995 ***************************************************************************************************
1996 * ADDR_CONVERT_TILEINDEX_INPUT
1997 *
1998 * @brief
1999 * Input structure for AddrConvertTileIndex
2000 ***************************************************************************************************
2001 */
2002 typedef struct _ADDR_CONVERT_TILEINDEX_INPUT
2003 {
2004 UINT_32 size; ///< Size of this structure in bytes
2005
2006 INT_32 tileIndex; ///< Tile index
2007 INT_32 macroModeIndex; ///< Index in macro tile mode table if there is one (CI)
2008 UINT_32 bpp; ///< Bits per pixel
2009 BOOL_32 tileInfoHw; ///< Set to TRUE if client wants HW enum, otherwise actual
2010 } ADDR_CONVERT_TILEINDEX_INPUT;
2011
2012 /**
2013 ***************************************************************************************************
2014 * ADDR_CONVERT_TILEINDEX_OUTPUT
2015 *
2016 * @brief
2017 * Output structure for AddrConvertTileIndex
2018 ***************************************************************************************************
2019 */
2020 typedef struct _ADDR_CONVERT_TILEINDEX_OUTPUT
2021 {
2022 UINT_32 size; ///< Size of this structure in bytes
2023
2024 AddrTileMode tileMode; ///< Tile mode
2025 AddrTileType tileType; ///< Tile type
2026 ADDR_TILEINFO* pTileInfo; ///< Tile info
2027
2028 } ADDR_CONVERT_TILEINDEX_OUTPUT;
2029
2030 /**
2031 ***************************************************************************************************
2032 * AddrConvertTileIndex
2033 *
2034 * @brief
2035 * Convert tile index to tile mode/type/info
2036 ***************************************************************************************************
2037 */
2038 ADDR_E_RETURNCODE ADDR_API AddrConvertTileIndex(
2039 ADDR_HANDLE hLib,
2040 const ADDR_CONVERT_TILEINDEX_INPUT* pIn,
2041 ADDR_CONVERT_TILEINDEX_OUTPUT* pOut);
2042
2043 /**
2044 ***************************************************************************************************
2045 * ADDR_GET_MACROMODEINDEX_INPUT
2046 *
2047 * @brief
2048 * Input structure for AddrGetMacroModeIndex
2049 ***************************************************************************************************
2050 */
2051 typedef struct _ADDR_GET_MACROMODEINDEX_INPUT
2052 {
2053 UINT_32 size; ///< Size of this structure in bytes
2054 ADDR_SURFACE_FLAGS flags; ///< Surface flag
2055 INT_32 tileIndex; ///< Tile index
2056 UINT_32 bpp; ///< Bits per pixel
2057 UINT_32 numFrags; ///< Number of color fragments
2058 } ADDR_GET_MACROMODEINDEX_INPUT;
2059
2060 /**
2061 ***************************************************************************************************
2062 * ADDR_GET_MACROMODEINDEX_OUTPUT
2063 *
2064 * @brief
2065 * Output structure for AddrGetMacroModeIndex
2066 ***************************************************************************************************
2067 */
2068 typedef struct _ADDR_GET_MACROMODEINDEX_OUTPUT
2069 {
2070 UINT_32 size; ///< Size of this structure in bytes
2071 INT_32 macroModeIndex; ///< Index in macro tile mode table if there is one (CI)
2072 } ADDR_GET_MACROMODEINDEX_OUTPUT;
2073
2074 /**
2075 ***************************************************************************************************
2076 * AddrGetMacroModeIndex
2077 *
2078 * @brief
2079 * Get macro mode index based on input parameters
2080 ***************************************************************************************************
2081 */
2082 ADDR_E_RETURNCODE ADDR_API AddrGetMacroModeIndex(
2083 ADDR_HANDLE hLib,
2084 const ADDR_GET_MACROMODEINDEX_INPUT* pIn,
2085 ADDR_GET_MACROMODEINDEX_OUTPUT* pOut);
2086
2087 /**
2088 ***************************************************************************************************
2089 * ADDR_CONVERT_TILEINDEX1_INPUT
2090 *
2091 * @brief
2092 * Input structure for AddrConvertTileIndex1 (without macro mode index)
2093 ***************************************************************************************************
2094 */
2095 typedef struct _ADDR_CONVERT_TILEINDEX1_INPUT
2096 {
2097 UINT_32 size; ///< Size of this structure in bytes
2098
2099 INT_32 tileIndex; ///< Tile index
2100 UINT_32 bpp; ///< Bits per pixel
2101 UINT_32 numSamples; ///< Number of samples
2102 BOOL_32 tileInfoHw; ///< Set to TRUE if client wants HW enum, otherwise actual
2103 } ADDR_CONVERT_TILEINDEX1_INPUT;
2104
2105 /**
2106 ***************************************************************************************************
2107 * AddrConvertTileIndex1
2108 *
2109 * @brief
2110 * Convert tile index to tile mode/type/info
2111 ***************************************************************************************************
2112 */
2113 ADDR_E_RETURNCODE ADDR_API AddrConvertTileIndex1(
2114 ADDR_HANDLE hLib,
2115 const ADDR_CONVERT_TILEINDEX1_INPUT* pIn,
2116 ADDR_CONVERT_TILEINDEX_OUTPUT* pOut);
2117
2118
2119
2120 /**
2121 ***************************************************************************************************
2122 * ADDR_GET_TILEINDEX_INPUT
2123 *
2124 * @brief
2125 * Input structure for AddrGetTileIndex
2126 ***************************************************************************************************
2127 */
2128 typedef struct _ADDR_GET_TILEINDEX_INPUT
2129 {
2130 UINT_32 size; ///< Size of this structure in bytes
2131
2132 AddrTileMode tileMode; ///< Tile mode
2133 AddrTileType tileType; ///< Tile-type: disp/non-disp/...
2134 ADDR_TILEINFO* pTileInfo; ///< Pointer to tile-info structure, can be NULL for linear/1D
2135 } ADDR_GET_TILEINDEX_INPUT;
2136
2137 /**
2138 ***************************************************************************************************
2139 * ADDR_GET_TILEINDEX_OUTPUT
2140 *
2141 * @brief
2142 * Output structure for AddrGetTileIndex
2143 ***************************************************************************************************
2144 */
2145 typedef struct _ADDR_GET_TILEINDEX_OUTPUT
2146 {
2147 UINT_32 size; ///< Size of this structure in bytes
2148
2149 INT_32 index; ///< index in table
2150 } ADDR_GET_TILEINDEX_OUTPUT;
2151
2152 /**
2153 ***************************************************************************************************
2154 * AddrGetTileIndex
2155 *
2156 * @brief
2157 * Get the tiling mode index in table
2158 ***************************************************************************************************
2159 */
2160 ADDR_E_RETURNCODE ADDR_API AddrGetTileIndex(
2161 ADDR_HANDLE hLib,
2162 const ADDR_GET_TILEINDEX_INPUT* pIn,
2163 ADDR_GET_TILEINDEX_OUTPUT* pOut);
2164
2165
2166
2167
2168 /**
2169 ***************************************************************************************************
2170 * ADDR_PRT_INFO_INPUT
2171 *
2172 * @brief
2173 * Input structure for AddrComputePrtInfo
2174 ***************************************************************************************************
2175 */
2176 typedef struct _ADDR_PRT_INFO_INPUT
2177 {
2178 AddrFormat format; ///< Surface format
2179 UINT_32 baseMipWidth; ///< Base mipmap width
2180 UINT_32 baseMipHeight; ///< Base mipmap height
2181 UINT_32 baseMipDepth; ///< Base mipmap depth
2182 UINT_32 numFrags; ///< Number of fragments,
2183 } ADDR_PRT_INFO_INPUT;
2184
2185 /**
2186 ***************************************************************************************************
2187 * ADDR_PRT_INFO_OUTPUT
2188 *
2189 * @brief
2190 * Input structure for AddrComputePrtInfo
2191 ***************************************************************************************************
2192 */
2193 typedef struct _ADDR_PRT_INFO_OUTPUT
2194 {
2195 UINT_32 prtTileWidth;
2196 UINT_32 prtTileHeight;
2197 } ADDR_PRT_INFO_OUTPUT;
2198
2199 /**
2200 ***************************************************************************************************
2201 * AddrComputePrtInfo
2202 *
2203 * @brief
2204 * Compute prt surface related information
2205 ***************************************************************************************************
2206 */
2207 ADDR_E_RETURNCODE ADDR_API AddrComputePrtInfo(
2208 ADDR_HANDLE hLib,
2209 const ADDR_PRT_INFO_INPUT* pIn,
2210 ADDR_PRT_INFO_OUTPUT* pOut);
2211
2212 ///////////////////////////////////////////////////////////////////////////////////////////////////
2213 // DCC key functions
2214 ///////////////////////////////////////////////////////////////////////////////////////////////////
2215
2216 /**
2217 ***************************************************************************************************
2218 * _ADDR_COMPUTE_DCCINFO_INPUT
2219 *
2220 * @brief
2221 * Input structure of AddrComputeDccInfo
2222 ***************************************************************************************************
2223 */
2224 typedef struct _ADDR_COMPUTE_DCCINFO_INPUT
2225 {
2226 UINT_32 size; ///< Size of this structure in bytes
2227 UINT_32 bpp; ///< BitPP of color surface
2228 UINT_32 numSamples; ///< Sample number of color surface
2229 UINT_64 colorSurfSize; ///< Size of color surface to which dcc key is bound
2230 AddrTileMode tileMode; ///< Tile mode of color surface
2231 ADDR_TILEINFO tileInfo; ///< Tile info of color surface
2232 UINT_32 tileSwizzle; ///< Tile swizzle
2233 INT_32 tileIndex; ///< Tile index of color surface,
2234 ///< MUST be -1 if you don't want to use it
2235 ///< while the global useTileIndex is set to 1
2236 INT_32 macroModeIndex; ///< Index in macro tile mode table if there is one (CI)
2237 ///< README: When tileIndex is not -1, this must be valid
2238 } ADDR_COMPUTE_DCCINFO_INPUT;
2239
2240 /**
2241 ***************************************************************************************************
2242 * ADDR_COMPUTE_DCCINFO_OUTPUT
2243 *
2244 * @brief
2245 * Output structure of AddrComputeDccInfo
2246 ***************************************************************************************************
2247 */
2248 typedef struct _ADDR_COMPUTE_DCCINFO_OUTPUT
2249 {
2250 UINT_32 size; ///< Size of this structure in bytes
2251 UINT_64 dccRamBaseAlign; ///< Base alignment of dcc key
2252 UINT_64 dccRamSize; ///< Size of dcc key
2253 UINT_64 dccFastClearSize; ///< Size of dcc key portion that can be fast cleared
2254 BOOL_32 subLvlCompressible; ///< Whether sub resource is compressiable
2255 BOOL_32 dccRamSizeAligned; ///< Whether the dcc key size is aligned
2256 } ADDR_COMPUTE_DCCINFO_OUTPUT;
2257
2258 /**
2259 ***************************************************************************************************
2260 * AddrComputeDccInfo
2261 *
2262 * @brief
2263 * Compute DCC key size, base alignment
2264 * info
2265 ***************************************************************************************************
2266 */
2267 ADDR_E_RETURNCODE ADDR_API AddrComputeDccInfo(
2268 ADDR_HANDLE hLib,
2269 const ADDR_COMPUTE_DCCINFO_INPUT* pIn,
2270 ADDR_COMPUTE_DCCINFO_OUTPUT* pOut);
2271
2272 /**
2273 ***************************************************************************************************
2274 * ADDR_GET_MAX_ALINGMENTS_OUTPUT
2275 *
2276 * @brief
2277 * Output structure of AddrGetMaxAlignments
2278 ***************************************************************************************************
2279 */
2280 typedef struct _ADDR_GET_MAX_ALINGMENTS_OUTPUT
2281 {
2282 UINT_32 size; ///< Size of this structure in bytes
2283 UINT_64 baseAlign; ///< Maximum base alignment in bytes
2284 } ADDR_GET_MAX_ALINGMENTS_OUTPUT;
2285
2286 /**
2287 ***************************************************************************************************
2288 * AddrGetMaxAlignments
2289 *
2290 * @brief
2291 * Gets maximnum alignments
2292 ***************************************************************************************************
2293 */
2294 ADDR_E_RETURNCODE ADDR_API AddrGetMaxAlignments(
2295 ADDR_HANDLE hLib,
2296 ADDR_GET_MAX_ALINGMENTS_OUTPUT* pOut);
2297
2298 #if defined(__cplusplus)
2299 }
2300 #endif
2301
2302 #endif // __ADDR_INTERFACE_H__
2303
2304