amdgpu/addrlib: Bump version to 6.01
[mesa.git] / src / amd / addrlib / addrinterface.h
1 /*
2 * Copyright © 2014 Advanced Micro Devices, Inc.
3 * All Rights Reserved.
4 *
5 * Permission is hereby granted, free of charge, to any person obtaining
6 * a copy of this software and associated documentation files (the
7 * "Software"), to deal in the Software without restriction, including
8 * without limitation the rights to use, copy, modify, merge, publish,
9 * distribute, sub license, and/or sell copies of the Software, and to
10 * permit persons to whom the Software is furnished to do so, subject to
11 * the following conditions:
12 *
13 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
14 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
15 * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
16 * NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS, AUTHORS
17 * AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
18 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
20 * USE OR OTHER DEALINGS IN THE SOFTWARE.
21 *
22 * The above copyright notice and this permission notice (including the
23 * next paragraph) shall be included in all copies or substantial portions
24 * of the Software.
25 */
26
27 /**
28 ****************************************************************************************************
29 * @file addrinterface.h
30 * @brief Contains the addrlib interfaces declaration and parameter defines
31 ****************************************************************************************************
32 */
33 #ifndef __ADDR_INTERFACE_H__
34 #define __ADDR_INTERFACE_H__
35
36 #include "addrtypes.h"
37
38 #if defined(__cplusplus)
39 extern "C"
40 {
41 #endif
42
43 #define ADDRLIB_VERSION_MAJOR 6
44 #define ADDRLIB_VERSION_MINOR 1
45 #define ADDRLIB_VERSION ((ADDRLIB_VERSION_MAJOR << 16) | ADDRLIB_VERSION_MINOR)
46
47 /// Virtually all interface functions need ADDR_HANDLE as first parameter
48 typedef VOID* ADDR_HANDLE;
49
50 /// Client handle used in callbacks
51 typedef VOID* ADDR_CLIENT_HANDLE;
52
53 /**
54 * /////////////////////////////////////////////////////////////////////////////////////////////////
55 * // Callback functions
56 * /////////////////////////////////////////////////////////////////////////////////////////////////
57 * typedef VOID* (ADDR_API* ADDR_ALLOCSYSMEM)(
58 * const ADDR_ALLOCSYSMEM_INPUT* pInput);
59 * typedef ADDR_E_RETURNCODE (ADDR_API* ADDR_FREESYSMEM)(
60 * VOID* pVirtAddr);
61 * typedef ADDR_E_RETURNCODE (ADDR_API* ADDR_DEBUGPRINT)(
62 * const ADDR_DEBUGPRINT_INPUT* pInput);
63 *
64 * /////////////////////////////////////////////////////////////////////////////////////////////////
65 * // Create/Destroy/Config functions
66 * /////////////////////////////////////////////////////////////////////////////////////////////////
67 * AddrCreate()
68 * AddrDestroy()
69 *
70 * /////////////////////////////////////////////////////////////////////////////////////////////////
71 * // Surface functions
72 * /////////////////////////////////////////////////////////////////////////////////////////////////
73 * AddrComputeSurfaceInfo()
74 * AddrComputeSurfaceAddrFromCoord()
75 * AddrComputeSurfaceCoordFromAddr()
76 *
77 * /////////////////////////////////////////////////////////////////////////////////////////////////
78 * // HTile functions
79 * /////////////////////////////////////////////////////////////////////////////////////////////////
80 * AddrComputeHtileInfo()
81 * AddrComputeHtileAddrFromCoord()
82 * AddrComputeHtileCoordFromAddr()
83 *
84 * /////////////////////////////////////////////////////////////////////////////////////////////////
85 * // C-mask functions
86 * /////////////////////////////////////////////////////////////////////////////////////////////////
87 * AddrComputeCmaskInfo()
88 * AddrComputeCmaskAddrFromCoord()
89 * AddrComputeCmaskCoordFromAddr()
90 *
91 * /////////////////////////////////////////////////////////////////////////////////////////////////
92 * // F-mask functions
93 * /////////////////////////////////////////////////////////////////////////////////////////////////
94 * AddrComputeFmaskInfo()
95 * AddrComputeFmaskAddrFromCoord()
96 * AddrComputeFmaskCoordFromAddr()
97 *
98 * /////////////////////////////////////////////////////////////////////////////////////////////////
99 * // Element/Utility functions
100 * /////////////////////////////////////////////////////////////////////////////////////////////////
101 * ElemFlt32ToDepthPixel()
102 * ElemFlt32ToColorPixel()
103 * AddrExtractBankPipeSwizzle()
104 * AddrCombineBankPipeSwizzle()
105 * AddrComputeSliceSwizzle()
106 * AddrConvertTileInfoToHW()
107 * AddrConvertTileIndex()
108 * AddrConvertTileIndex1()
109 * AddrGetTileIndex()
110 * AddrComputeBaseSwizzle()
111 * AddrUseTileIndex()
112 * AddrUseCombinedSwizzle()
113 *
114 **/
115
116 ////////////////////////////////////////////////////////////////////////////////////////////////////
117 // Callback functions
118 ////////////////////////////////////////////////////////////////////////////////////////////////////
119
120 /**
121 ****************************************************************************************************
122 * @brief channel setting structure
123 ****************************************************************************************************
124 */
125 typedef union _ADDR_CHANNEL_SETTING
126 {
127 struct
128 {
129 UINT_8 valid : 1; ///< Indicate whehter this channel setting is valid
130 UINT_8 channel : 2; ///< 0 for x channel, 1 for y channel, 2 for z channel
131 UINT_8 index : 5; ///< Channel index
132 };
133 UINT_8 value; ///< Value
134 } ADDR_CHANNEL_SETTING;
135
136 /**
137 ****************************************************************************************************
138 * @brief address equation key structure
139 ****************************************************************************************************
140 */
141 typedef union _ADDR_EQUATION_KEY
142 {
143 struct
144 {
145 UINT_32 log2ElementBytes : 3; ///< Log2 of Bytes per pixel
146 UINT_32 tileMode : 5; ///< Tile mode
147 UINT_32 microTileType : 3; ///< Micro tile type
148 UINT_32 pipeConfig : 5; ///< pipe config
149 UINT_32 numBanksLog2 : 3; ///< Number of banks log2
150 UINT_32 bankWidth : 4; ///< Bank width
151 UINT_32 bankHeight : 4; ///< Bank height
152 UINT_32 macroAspectRatio : 3; ///< Macro tile aspect ratio
153 UINT_32 prt : 1; ///< SI only, indicate whether this equation is for prt
154 UINT_32 reserved : 1; ///< Reserved bit
155 } fields;
156 UINT_32 value;
157 } ADDR_EQUATION_KEY;
158
159 /**
160 ****************************************************************************************************
161 * @brief address equation structure
162 ****************************************************************************************************
163 */
164 #define ADDR_MAX_EQUATION_BIT 20u
165
166 // Invalid equation index
167 #define ADDR_INVALID_EQUATION_INDEX 0xFFFFFFFF
168
169 typedef struct _ADDR_EQUATION
170 {
171 ADDR_CHANNEL_SETTING addr[ADDR_MAX_EQUATION_BIT]; ///< addr setting
172 ///< each bit is result of addr ^ xor ^ xor2
173 ADDR_CHANNEL_SETTING xor1[ADDR_MAX_EQUATION_BIT]; ///< xor setting
174 ADDR_CHANNEL_SETTING xor2[ADDR_MAX_EQUATION_BIT]; ///< xor2 setting
175 UINT_32 numBits; ///< The number of bits in equation
176 BOOL_32 stackedDepthSlices; ///< TRUE if depth slices are treated as being
177 ///< stacked vertically prior to swizzling
178 } ADDR_EQUATION;
179
180
181 /**
182 ****************************************************************************************************
183 * @brief Alloc system memory flags.
184 * @note These flags are reserved for future use and if flags are added will minimize the impact
185 * of the client.
186 ****************************************************************************************************
187 */
188 typedef union _ADDR_ALLOCSYSMEM_FLAGS
189 {
190 struct
191 {
192 UINT_32 reserved : 32; ///< Reserved for future use.
193 } fields;
194 UINT_32 value;
195
196 } ADDR_ALLOCSYSMEM_FLAGS;
197
198 /**
199 ****************************************************************************************************
200 * @brief Alloc system memory input structure
201 ****************************************************************************************************
202 */
203 typedef struct _ADDR_ALLOCSYSMEM_INPUT
204 {
205 UINT_32 size; ///< Size of this structure in bytes
206
207 ADDR_ALLOCSYSMEM_FLAGS flags; ///< System memory flags.
208 UINT_32 sizeInBytes; ///< System memory allocation size in bytes.
209 ADDR_CLIENT_HANDLE hClient; ///< Client handle
210 } ADDR_ALLOCSYSMEM_INPUT;
211
212 /**
213 ****************************************************************************************************
214 * ADDR_ALLOCSYSMEM
215 * @brief
216 * Allocate system memory callback function. Returns valid pointer on success.
217 ****************************************************************************************************
218 */
219 typedef VOID* (ADDR_API* ADDR_ALLOCSYSMEM)(
220 const ADDR_ALLOCSYSMEM_INPUT* pInput);
221
222 /**
223 ****************************************************************************************************
224 * @brief Free system memory input structure
225 ****************************************************************************************************
226 */
227 typedef struct _ADDR_FREESYSMEM_INPUT
228 {
229 UINT_32 size; ///< Size of this structure in bytes
230
231 VOID* pVirtAddr; ///< Virtual address
232 ADDR_CLIENT_HANDLE hClient; ///< Client handle
233 } ADDR_FREESYSMEM_INPUT;
234
235 /**
236 ****************************************************************************************************
237 * ADDR_FREESYSMEM
238 * @brief
239 * Free system memory callback function.
240 * Returns ADDR_OK on success.
241 ****************************************************************************************************
242 */
243 typedef ADDR_E_RETURNCODE (ADDR_API* ADDR_FREESYSMEM)(
244 const ADDR_FREESYSMEM_INPUT* pInput);
245
246 /**
247 ****************************************************************************************************
248 * @brief Print debug message input structure
249 ****************************************************************************************************
250 */
251 typedef struct _ADDR_DEBUGPRINT_INPUT
252 {
253 UINT_32 size; ///< Size of this structure in bytes
254
255 CHAR* pDebugString; ///< Debug print string
256 va_list ap; ///< Variable argument list
257 ADDR_CLIENT_HANDLE hClient; ///< Client handle
258 } ADDR_DEBUGPRINT_INPUT;
259
260 /**
261 ****************************************************************************************************
262 * ADDR_DEBUGPRINT
263 * @brief
264 * Print debug message callback function.
265 * Returns ADDR_OK on success.
266 ****************************************************************************************************
267 */
268 typedef ADDR_E_RETURNCODE (ADDR_API* ADDR_DEBUGPRINT)(
269 const ADDR_DEBUGPRINT_INPUT* pInput);
270
271 /**
272 ****************************************************************************************************
273 * ADDR_CALLBACKS
274 *
275 * @brief
276 * Address Library needs client to provide system memory alloc/free routines.
277 ****************************************************************************************************
278 */
279 typedef struct _ADDR_CALLBACKS
280 {
281 ADDR_ALLOCSYSMEM allocSysMem; ///< Routine to allocate system memory
282 ADDR_FREESYSMEM freeSysMem; ///< Routine to free system memory
283 ADDR_DEBUGPRINT debugPrint; ///< Routine to print debug message
284 } ADDR_CALLBACKS;
285
286 ////////////////////////////////////////////////////////////////////////////////////////////////////
287 // Create/Destroy functions
288 ////////////////////////////////////////////////////////////////////////////////////////////////////
289
290 /**
291 ****************************************************************************************************
292 * ADDR_CREATE_FLAGS
293 *
294 * @brief
295 * This structure is used to pass some setup in creation of AddrLib
296 * @note
297 ****************************************************************************************************
298 */
299 typedef union _ADDR_CREATE_FLAGS
300 {
301 struct
302 {
303 UINT_32 noCubeMipSlicesPad : 1; ///< Turn cubemap faces padding off
304 UINT_32 fillSizeFields : 1; ///< If clients fill size fields in all input and
305 /// output structure
306 UINT_32 useTileIndex : 1; ///< Make tileIndex field in input valid
307 UINT_32 useCombinedSwizzle : 1; ///< Use combined tile swizzle
308 UINT_32 checkLast2DLevel : 1; ///< Check the last 2D mip sub level
309 UINT_32 useHtileSliceAlign : 1; ///< Do htile single slice alignment
310 UINT_32 allowLargeThickTile : 1; ///< Allow 64*thickness*bytesPerPixel > rowSize
311 UINT_32 reserved : 25; ///< Reserved bits for future use
312 };
313
314 UINT_32 value;
315 } ADDR_CREATE_FLAGS;
316
317 /**
318 ****************************************************************************************************
319 * ADDR_REGISTER_VALUE
320 *
321 * @brief
322 * Data from registers to setup AddrLib global data, used in AddrCreate
323 ****************************************************************************************************
324 */
325 typedef struct _ADDR_REGISTER_VALUE
326 {
327 UINT_32 gbAddrConfig; ///< For R8xx, use GB_ADDR_CONFIG register value.
328 /// For R6xx/R7xx, use GB_TILING_CONFIG.
329 /// But they can be treated as the same.
330 /// if this value is 0, use chip to set default value
331 UINT_32 backendDisables; ///< 1 bit per backend, starting with LSB. 1=disabled,0=enabled.
332 /// Register value of CC_RB_BACKEND_DISABLE.BACKEND_DISABLE
333
334 /// R800 registers-----------------------------------------------
335 UINT_32 noOfBanks; ///< Number of h/w ram banks - For r800: MC_ARB_RAMCFG.NOOFBANK
336 /// No enums for this value in h/w header files
337 /// 0: 4
338 /// 1: 8
339 /// 2: 16
340 UINT_32 noOfRanks; /// MC_ARB_RAMCFG.NOOFRANK
341 /// 0: 1
342 /// 1: 2
343 /// SI (R1000) registers-----------------------------------------
344 const UINT_32* pTileConfig; ///< Global tile setting tables
345 UINT_32 noOfEntries; ///< Number of entries in pTileConfig
346
347 ///< CI registers-------------------------------------------------
348 const UINT_32* pMacroTileConfig; ///< Global macro tile mode table
349 UINT_32 noOfMacroEntries; ///< Number of entries in pMacroTileConfig
350 } ADDR_REGISTER_VALUE;
351
352 /**
353 ****************************************************************************************************
354 * ADDR_CREATE_INPUT
355 *
356 * @brief
357 * Parameters use to create an AddrLib Object. Caller must provide all fields.
358 *
359 ****************************************************************************************************
360 */
361 typedef struct _ADDR_CREATE_INPUT
362 {
363 UINT_32 size; ///< Size of this structure in bytes
364
365 UINT_32 chipEngine; ///< Chip Engine
366 UINT_32 chipFamily; ///< Chip Family
367 UINT_32 chipRevision; ///< Chip Revision
368 ADDR_CALLBACKS callbacks; ///< Callbacks for sysmem alloc/free/print
369 ADDR_CREATE_FLAGS createFlags; ///< Flags to setup AddrLib
370 ADDR_REGISTER_VALUE regValue; ///< Data from registers to setup AddrLib global data
371 ADDR_CLIENT_HANDLE hClient; ///< Client handle
372 UINT_32 minPitchAlignPixels; ///< Minimum pitch alignment in pixels
373 } ADDR_CREATE_INPUT;
374
375 /**
376 ****************************************************************************************************
377 * ADDR_CREATEINFO_OUTPUT
378 *
379 * @brief
380 * Return AddrLib handle to client driver
381 *
382 ****************************************************************************************************
383 */
384 typedef struct _ADDR_CREATE_OUTPUT
385 {
386 UINT_32 size; ///< Size of this structure in bytes
387
388 ADDR_HANDLE hLib; ///< Address lib handle
389
390 UINT_32 numEquations; ///< Number of equations in the table
391 const ADDR_EQUATION* pEquationTable; ///< Pointer to the equation table
392 } ADDR_CREATE_OUTPUT;
393
394 /**
395 ****************************************************************************************************
396 * AddrCreate
397 *
398 * @brief
399 * Create AddrLib object, must be called before any interface calls
400 *
401 * @return
402 * ADDR_OK if successful
403 ****************************************************************************************************
404 */
405 ADDR_E_RETURNCODE ADDR_API AddrCreate(
406 const ADDR_CREATE_INPUT* pAddrCreateIn,
407 ADDR_CREATE_OUTPUT* pAddrCreateOut);
408
409
410
411 /**
412 ****************************************************************************************************
413 * AddrDestroy
414 *
415 * @brief
416 * Destroy AddrLib object, must be called to free internally allocated resources.
417 *
418 * @return
419 * ADDR_OK if successful
420 ****************************************************************************************************
421 */
422 ADDR_E_RETURNCODE ADDR_API AddrDestroy(
423 ADDR_HANDLE hLib);
424
425
426
427 ////////////////////////////////////////////////////////////////////////////////////////////////////
428 // Surface functions
429 ////////////////////////////////////////////////////////////////////////////////////////////////////
430
431 /**
432 ****************************************************************************************************
433 * @brief
434 * Bank/tiling parameters. On function input, these can be set as desired or
435 * left 0 for AddrLib to calculate/default. On function output, these are the actual
436 * parameters used.
437 * @note
438 * Valid bankWidth/bankHeight value:
439 * 1,2,4,8. They are factors instead of pixels or bytes.
440 *
441 * The bank number remains constant across each row of the
442 * macro tile as each pipe is selected, so the number of
443 * tiles in the x direction with the same bank number will
444 * be bank_width * num_pipes.
445 ****************************************************************************************************
446 */
447 typedef struct _ADDR_TILEINFO
448 {
449 /// Any of these parameters can be set to 0 to use the HW default.
450 UINT_32 banks; ///< Number of banks, numerical value
451 UINT_32 bankWidth; ///< Number of tiles in the X direction in the same bank
452 UINT_32 bankHeight; ///< Number of tiles in the Y direction in the same bank
453 UINT_32 macroAspectRatio; ///< Macro tile aspect ratio. 1-1:1, 2-4:1, 4-16:1, 8-64:1
454 UINT_32 tileSplitBytes; ///< Tile split size, in bytes
455 AddrPipeCfg pipeConfig; ///< Pipe Config = HW enum + 1
456 } ADDR_TILEINFO;
457
458 // Create a define to avoid client change. The removal of R800 is because we plan to implement SI
459 // within 800 HWL - An AddrPipeCfg is added in above data structure
460 typedef ADDR_TILEINFO ADDR_R800_TILEINFO;
461
462 /**
463 ****************************************************************************************************
464 * @brief
465 * Information needed by quad buffer stereo support
466 ****************************************************************************************************
467 */
468 typedef struct _ADDR_QBSTEREOINFO
469 {
470 UINT_32 eyeHeight; ///< Height (in pixel rows) to right eye
471 UINT_32 rightOffset; ///< Offset (in bytes) to right eye
472 UINT_32 rightSwizzle; ///< TileSwizzle for right eyes
473 } ADDR_QBSTEREOINFO;
474
475 /**
476 ****************************************************************************************************
477 * ADDR_SURFACE_FLAGS
478 *
479 * @brief
480 * Surface flags
481 ****************************************************************************************************
482 */
483 typedef union _ADDR_SURFACE_FLAGS
484 {
485 struct
486 {
487 UINT_32 color : 1; ///< Flag indicates this is a color buffer
488 UINT_32 depth : 1; ///< Flag indicates this is a depth/stencil buffer
489 UINT_32 stencil : 1; ///< Flag indicates this is a stencil buffer
490 UINT_32 texture : 1; ///< Flag indicates this is a texture
491 UINT_32 cube : 1; ///< Flag indicates this is a cubemap
492 UINT_32 volume : 1; ///< Flag indicates this is a volume texture
493 UINT_32 fmask : 1; ///< Flag indicates this is an fmask
494 UINT_32 cubeAsArray : 1; ///< Flag indicates if treat cubemap as arrays
495 UINT_32 compressZ : 1; ///< Flag indicates z buffer is compressed
496 UINT_32 overlay : 1; ///< Flag indicates this is an overlay surface
497 UINT_32 noStencil : 1; ///< Flag indicates this depth has no separate stencil
498 UINT_32 display : 1; ///< Flag indicates this should match display controller req.
499 UINT_32 opt4Space : 1; ///< Flag indicates this surface should be optimized for space
500 /// i.e. save some memory but may lose performance
501 UINT_32 prt : 1; ///< Flag for partially resident texture
502 UINT_32 qbStereo : 1; ///< Quad buffer stereo surface
503 UINT_32 pow2Pad : 1; ///< SI: Pad to pow2, must set for mipmap (include level0)
504 UINT_32 interleaved : 1; ///< Special flag for interleaved YUV surface padding
505 UINT_32 tcCompatible : 1; ///< Flag indicates surface needs to be shader readable
506 UINT_32 dispTileType : 1; ///< NI: force display Tiling for 128 bit shared resoruce
507 UINT_32 dccCompatible : 1; ///< VI: whether to make MSAA surface support dcc fast clear
508 UINT_32 dccPipeWorkaround : 1; ///< VI: whether to workaround the HW limit that
509 /// dcc can't be enabled if pipe config of tile mode
510 /// is different from that of ASIC, this flag
511 /// is address lib internal flag, client should ignore it
512 UINT_32 czDispCompatible : 1; ///< SI+: CZ family has a HW bug needs special alignment.
513 /// This flag indicates we need to follow the
514 /// alignment with CZ families or other ASICs under
515 /// PX configuration + CZ.
516 UINT_32 nonSplit : 1; ///< CI: depth texture should not be split
517 UINT_32 disableLinearOpt : 1; ///< Disable tile mode optimization to linear
518 UINT_32 needEquation : 1; ///< Make the surface tile setting equation compatible.
519 /// This flag indicates we need to override tile
520 /// mode to PRT_* tile mode to disable slice rotation,
521 /// which is needed by swizzle pattern equation.
522 UINT_32 skipIndicesOutput : 1; ///< Skipping indices in output.
523 UINT_32 rotateDisplay : 1; ///< Rotate micro tile type
524 UINT_32 minimizeAlignment : 1; ///< Minimize alignment
525 UINT_32 preferEquation : 1; ///< Return equation index without adjusting tile mode
526 UINT_32 matchStencilTileCfg : 1; ///< Select tile index of stencil as well as depth surface
527 /// to make sure they share same tile config parameters
528 UINT_32 reserved : 3; ///< Reserved bits
529 };
530
531 UINT_32 value;
532 } ADDR_SURFACE_FLAGS;
533
534 /**
535 ****************************************************************************************************
536 * ADDR_COMPUTE_SURFACE_INFO_INPUT
537 *
538 * @brief
539 * Input structure for AddrComputeSurfaceInfo
540 ****************************************************************************************************
541 */
542 typedef struct _ADDR_COMPUTE_SURFACE_INFO_INPUT
543 {
544 UINT_32 size; ///< Size of this structure in bytes
545
546 AddrTileMode tileMode; ///< Tile mode
547 AddrFormat format; ///< If format is set to valid one, bpp/width/height
548 /// might be overwritten
549 UINT_32 bpp; ///< Bits per pixel
550 UINT_32 numSamples; ///< Number of samples
551 UINT_32 width; ///< Width, in pixels
552 UINT_32 height; ///< Height, in pixels
553 UINT_32 numSlices; ///< Number of surface slices or depth
554 UINT_32 slice; ///< Slice index
555 UINT_32 mipLevel; ///< Current mipmap level
556 UINT_32 numMipLevels; ///< Number of mips in mip chain
557 ADDR_SURFACE_FLAGS flags; ///< Surface type flags
558 UINT_32 numFrags; ///< Number of fragments, leave it zero or the same as
559 /// number of samples for normal AA; Set it to the
560 /// number of fragments for EQAA
561 /// r800 and later HWL parameters
562 // Needed by 2D tiling, for linear and 1D tiling, just keep them 0's
563 ADDR_TILEINFO* pTileInfo; ///< 2D tile parameters. Set to 0 to default/calculate
564 AddrTileType tileType; ///< Micro tiling type, not needed when tileIndex != -1
565 INT_32 tileIndex; ///< Tile index, MUST be -1 if you don't want to use it
566 /// while the global useTileIndex is set to 1
567 UINT_32 basePitch; ///< Base level pitch in pixels, 0 means ignored, is a
568 /// must for mip levels from SI+.
569 /// Don't use pitch in blocks for compressed formats!
570 UINT_32 maxBaseAlign; ///< Max base alignment request from client
571 UINT_32 pitchAlign; ///< Pitch alignment request from client
572 UINT_32 heightAlign; ///< Height alignment request from client
573 } ADDR_COMPUTE_SURFACE_INFO_INPUT;
574
575 /**
576 ****************************************************************************************************
577 * ADDR_COMPUTE_SURFACE_INFO_OUTPUT
578 *
579 * @brief
580 * Output structure for AddrComputeSurfInfo
581 * @note
582 Element: AddrLib unit for computing. e.g. BCn: 4x4 blocks; R32B32B32: 32bit with 3x pitch
583 Pixel: Original pixel
584 ****************************************************************************************************
585 */
586 typedef struct _ADDR_COMPUTE_SURFACE_INFO_OUTPUT
587 {
588 UINT_32 size; ///< Size of this structure in bytes
589
590 UINT_32 pitch; ///< Pitch in elements (in blocks for compressed formats)
591 UINT_32 height; ///< Height in elements (in blocks for compressed formats)
592 UINT_32 depth; ///< Number of slice/depth
593 UINT_64 surfSize; ///< Surface size in bytes
594 AddrTileMode tileMode; ///< Actual tile mode. May differ from that in input
595 UINT_32 baseAlign; ///< Base address alignment
596 UINT_32 pitchAlign; ///< Pitch alignment, in elements
597 UINT_32 heightAlign; ///< Height alignment, in elements
598 UINT_32 depthAlign; ///< Depth alignment, aligned to thickness, for 3d texture
599 UINT_32 bpp; ///< Bits per elements (e.g. blocks for BCn, 1/3 for 96bit)
600 UINT_32 pixelPitch; ///< Pitch in original pixels
601 UINT_32 pixelHeight; ///< Height in original pixels
602 UINT_32 pixelBits; ///< Original bits per pixel, passed from input
603 UINT_64 sliceSize; ///< Size of slice specified by input's slice
604 /// The result is controlled by surface flags & createFlags
605 /// By default this value equals to surfSize for volume
606 UINT_32 pitchTileMax; ///< PITCH_TILE_MAX value for h/w register
607 UINT_32 heightTileMax; ///< HEIGHT_TILE_MAX value for h/w register
608 UINT_32 sliceTileMax; ///< SLICE_TILE_MAX value for h/w register
609
610 UINT_32 numSamples; ///< Pass the effective numSamples processed in this call
611
612 /// r800 and later HWL parameters
613 ADDR_TILEINFO* pTileInfo; ///< Tile parameters used. Filled in if 0 on input
614 AddrTileType tileType; ///< Micro tiling type, only valid when tileIndex != -1
615 INT_32 tileIndex; ///< Tile index, MAY be "downgraded"
616
617 INT_32 macroModeIndex; ///< Index in macro tile mode table if there is one (CI)
618 /// Output flags
619 struct
620 {
621 /// Special information to work around SI mipmap swizzle bug UBTS #317508
622 UINT_32 last2DLevel : 1; ///< TRUE if this is the last 2D(3D) tiled
623 ///< Only meaningful when create flag checkLast2DLevel is set
624 UINT_32 tcCompatible : 1; ///< If the surface can be shader compatible
625 UINT_32 dccUnsupport : 1; ///< If the surface can support DCC compressed rendering
626 UINT_32 prtTileIndex : 1; ///< SI only, indicate the returned tile index is for PRT
627 ///< If address lib return true for mip 0, client should set prt flag
628 ///< for child mips in subsequent compute surface info calls
629 UINT_32 reserved :28; ///< Reserved bits
630 };
631
632 UINT_32 equationIndex; ///< Equation index in the equation table;
633
634 UINT_32 blockWidth; ///< Width in element inside one block(1D->Micro, 2D->Macro)
635 UINT_32 blockHeight; ///< Height in element inside one block(1D->Micro, 2D->Macro)
636 UINT_32 blockSlices; ///< Slice number inside one block(1D->Micro, 2D->Macro)
637
638 /// Stereo info
639 ADDR_QBSTEREOINFO* pStereoInfo;///< Stereo information, needed when .qbStereo flag is TRUE
640
641 INT_32 stencilTileIdx; ///< stencil tile index output when matchStencilTileCfg was set
642 } ADDR_COMPUTE_SURFACE_INFO_OUTPUT;
643
644 /**
645 ****************************************************************************************************
646 * AddrComputeSurfaceInfo
647 *
648 * @brief
649 * Compute surface width/height/depth/alignments and suitable tiling mode
650 ****************************************************************************************************
651 */
652 ADDR_E_RETURNCODE ADDR_API AddrComputeSurfaceInfo(
653 ADDR_HANDLE hLib,
654 const ADDR_COMPUTE_SURFACE_INFO_INPUT* pIn,
655 ADDR_COMPUTE_SURFACE_INFO_OUTPUT* pOut);
656
657
658
659 /**
660 ****************************************************************************************************
661 * ADDR_COMPUTE_SURFACE_ADDRFROMCOORD_INPUT
662 *
663 * @brief
664 * Input structure for AddrComputeSurfaceAddrFromCoord
665 ****************************************************************************************************
666 */
667 typedef struct _ADDR_COMPUTE_SURFACE_ADDRFROMCOORD_INPUT
668 {
669 UINT_32 size; ///< Size of this structure in bytes
670
671 UINT_32 x; ///< X coordinate
672 UINT_32 y; ///< Y coordinate
673 UINT_32 slice; ///< Slice index
674 UINT_32 sample; ///< Sample index, use fragment index for EQAA
675
676 UINT_32 bpp; ///< Bits per pixel
677 UINT_32 pitch; ///< Surface pitch, in pixels
678 UINT_32 height; ///< Surface height, in pixels
679 UINT_32 numSlices; ///< Surface depth
680 UINT_32 numSamples; ///< Number of samples
681
682 AddrTileMode tileMode; ///< Tile mode
683 BOOL_32 isDepth; ///< TRUE if the surface uses depth sample ordering within
684 /// micro tile. Textures can also choose depth sample order
685 UINT_32 tileBase; ///< Base offset (in bits) inside micro tile which handles
686 /// the case that components are stored separately
687 UINT_32 compBits; ///< The component bits actually needed(for planar surface)
688
689 UINT_32 numFrags; ///< Number of fragments, leave it zero or the same as
690 /// number of samples for normal AA; Set it to the
691 /// number of fragments for EQAA
692 /// r800 and later HWL parameters
693 // Used for 1D tiling above
694 AddrTileType tileType; ///< See defintion of AddrTileType
695 struct
696 {
697 UINT_32 ignoreSE : 1; ///< TRUE if shader engines are ignored. This is texture
698 /// only flag. Only non-RT texture can set this to TRUE
699 UINT_32 reserved :31; ///< Reserved for future use.
700 };
701 // 2D tiling needs following structure
702 ADDR_TILEINFO* pTileInfo; ///< 2D tile parameters. Client must provide all data
703 INT_32 tileIndex; ///< Tile index, MUST be -1 if you don't want to use it
704 /// while the global useTileIndex is set to 1
705 union
706 {
707 struct
708 {
709 UINT_32 bankSwizzle; ///< Bank swizzle
710 UINT_32 pipeSwizzle; ///< Pipe swizzle
711 };
712 UINT_32 tileSwizzle; ///< Combined swizzle, if useCombinedSwizzle is TRUE
713 };
714
715 #if ADDR_AM_BUILD // These two fields are not valid in SW blt since no HTILE access
716 UINT_32 addr5Swizzle; ///< ADDR5_SWIZZLE_MASK of DB_DEPTH_INFO
717 BOOL_32 is32ByteTile; ///< Caller must have access to HTILE buffer and know if
718 /// this tile is compressed to 32B
719 #endif
720 } ADDR_COMPUTE_SURFACE_ADDRFROMCOORD_INPUT;
721
722 /**
723 ****************************************************************************************************
724 * ADDR_COMPUTE_SURFACE_ADDRFROMCOORD_OUTPUT
725 *
726 * @brief
727 * Output structure for AddrComputeSurfaceAddrFromCoord
728 ****************************************************************************************************
729 */
730 typedef struct _ADDR_COMPUTE_SURFACE_ADDRFROMCOORD_OUTPUT
731 {
732 UINT_32 size; ///< Size of this structure in bytes
733
734 UINT_64 addr; ///< Byte address
735 UINT_32 bitPosition; ///< Bit position within surfaceAddr, 0-7.
736 /// For surface bpp < 8, e.g. FMT_1.
737 UINT_32 prtBlockIndex; ///< Index of a PRT tile (64K block)
738 } ADDR_COMPUTE_SURFACE_ADDRFROMCOORD_OUTPUT;
739
740 /**
741 ****************************************************************************************************
742 * AddrComputeSurfaceAddrFromCoord
743 *
744 * @brief
745 * Compute surface address from a given coordinate.
746 ****************************************************************************************************
747 */
748 ADDR_E_RETURNCODE ADDR_API AddrComputeSurfaceAddrFromCoord(
749 ADDR_HANDLE hLib,
750 const ADDR_COMPUTE_SURFACE_ADDRFROMCOORD_INPUT* pIn,
751 ADDR_COMPUTE_SURFACE_ADDRFROMCOORD_OUTPUT* pOut);
752
753
754
755 /**
756 ****************************************************************************************************
757 * ADDR_COMPUTE_SURFACE_COORDFROMADDR_INPUT
758 *
759 * @brief
760 * Input structure for AddrComputeSurfaceCoordFromAddr
761 ****************************************************************************************************
762 */
763 typedef struct _ADDR_COMPUTE_SURFACE_COORDFROMADDR_INPUT
764 {
765 UINT_32 size; ///< Size of this structure in bytes
766
767 UINT_64 addr; ///< Address in bytes
768 UINT_32 bitPosition; ///< Bit position in addr. 0-7. for surface bpp < 8,
769 /// e.g. FMT_1;
770 UINT_32 bpp; ///< Bits per pixel
771 UINT_32 pitch; ///< Pitch, in pixels
772 UINT_32 height; ///< Height in pixels
773 UINT_32 numSlices; ///< Surface depth
774 UINT_32 numSamples; ///< Number of samples
775
776 AddrTileMode tileMode; ///< Tile mode
777 BOOL_32 isDepth; ///< Surface uses depth sample ordering within micro tile.
778 /// Note: Textures can choose depth sample order as well.
779 UINT_32 tileBase; ///< Base offset (in bits) inside micro tile which handles
780 /// the case that components are stored separately
781 UINT_32 compBits; ///< The component bits actually needed(for planar surface)
782
783 UINT_32 numFrags; ///< Number of fragments, leave it zero or the same as
784 /// number of samples for normal AA; Set it to the
785 /// number of fragments for EQAA
786 /// r800 and later HWL parameters
787 // Used for 1D tiling above
788 AddrTileType tileType; ///< See defintion of AddrTileType
789 struct
790 {
791 UINT_32 ignoreSE : 1; ///< TRUE if shader engines are ignored. This is texture
792 /// only flag. Only non-RT texture can set this to TRUE
793 UINT_32 reserved :31; ///< Reserved for future use.
794 };
795 // 2D tiling needs following structure
796 ADDR_TILEINFO* pTileInfo; ///< 2D tile parameters. Client must provide all data
797 INT_32 tileIndex; ///< Tile index, MUST be -1 if you don't want to use it
798 /// while the global useTileIndex is set to 1
799 union
800 {
801 struct
802 {
803 UINT_32 bankSwizzle; ///< Bank swizzle
804 UINT_32 pipeSwizzle; ///< Pipe swizzle
805 };
806 UINT_32 tileSwizzle; ///< Combined swizzle, if useCombinedSwizzle is TRUE
807 };
808 } ADDR_COMPUTE_SURFACE_COORDFROMADDR_INPUT;
809
810 /**
811 ****************************************************************************************************
812 * ADDR_COMPUTE_SURFACE_COORDFROMADDR_OUTPUT
813 *
814 * @brief
815 * Output structure for AddrComputeSurfaceCoordFromAddr
816 ****************************************************************************************************
817 */
818 typedef struct _ADDR_COMPUTE_SURFACE_COORDFROMADDR_OUTPUT
819 {
820 UINT_32 size; ///< Size of this structure in bytes
821
822 UINT_32 x; ///< X coordinate
823 UINT_32 y; ///< Y coordinate
824 UINT_32 slice; ///< Index of slices
825 UINT_32 sample; ///< Index of samples, means fragment index for EQAA
826 } ADDR_COMPUTE_SURFACE_COORDFROMADDR_OUTPUT;
827
828 /**
829 ****************************************************************************************************
830 * AddrComputeSurfaceCoordFromAddr
831 *
832 * @brief
833 * Compute coordinate from a given surface address
834 ****************************************************************************************************
835 */
836 ADDR_E_RETURNCODE ADDR_API AddrComputeSurfaceCoordFromAddr(
837 ADDR_HANDLE hLib,
838 const ADDR_COMPUTE_SURFACE_COORDFROMADDR_INPUT* pIn,
839 ADDR_COMPUTE_SURFACE_COORDFROMADDR_OUTPUT* pOut);
840
841 ////////////////////////////////////////////////////////////////////////////////////////////////////
842 // HTile functions
843 ////////////////////////////////////////////////////////////////////////////////////////////////////
844
845 /**
846 ****************************************************************************************************
847 * ADDR_HTILE_FLAGS
848 *
849 * @brief
850 * HTILE flags
851 ****************************************************************************************************
852 */
853 typedef union _ADDR_HTILE_FLAGS
854 {
855 struct
856 {
857 UINT_32 tcCompatible : 1; ///< Flag indicates surface needs to be shader readable
858 UINT_32 reserved :31; ///< Reserved bits
859 };
860
861 UINT_32 value;
862 } ADDR_HTILE_FLAGS;
863
864 /**
865 ****************************************************************************************************
866 * ADDR_COMPUTE_HTILE_INFO_INPUT
867 *
868 * @brief
869 * Input structure of AddrComputeHtileInfo
870 ****************************************************************************************************
871 */
872 typedef struct _ADDR_COMPUTE_HTILE_INFO_INPUT
873 {
874 UINT_32 size; ///< Size of this structure in bytes
875
876 ADDR_HTILE_FLAGS flags; ///< HTILE flags
877 UINT_32 pitch; ///< Surface pitch, in pixels
878 UINT_32 height; ///< Surface height, in pixels
879 UINT_32 numSlices; ///< Number of slices
880 BOOL_32 isLinear; ///< Linear or tiled HTILE layout
881 AddrHtileBlockSize blockWidth; ///< 4 or 8. EG above only support 8
882 AddrHtileBlockSize blockHeight; ///< 4 or 8. EG above only support 8
883 ADDR_TILEINFO* pTileInfo; ///< Tile info
884
885 INT_32 tileIndex; ///< Tile index, MUST be -1 if you don't want to use it
886 /// while the global useTileIndex is set to 1
887 INT_32 macroModeIndex; ///< Index in macro tile mode table if there is one (CI)
888 ///< README: When tileIndex is not -1, this must be valid
889 } ADDR_COMPUTE_HTILE_INFO_INPUT;
890
891 /**
892 ****************************************************************************************************
893 * ADDR_COMPUTE_HTILE_INFO_OUTPUT
894 *
895 * @brief
896 * Output structure of AddrComputeHtileInfo
897 ****************************************************************************************************
898 */
899 typedef struct _ADDR_COMPUTE_HTILE_INFO_OUTPUT
900 {
901 UINT_32 size; ///< Size of this structure in bytes
902
903 UINT_32 pitch; ///< Pitch in pixels of depth buffer represented in this
904 /// HTile buffer. This might be larger than original depth
905 /// buffer pitch when called with an unaligned pitch.
906 UINT_32 height; ///< Height in pixels, as above
907 UINT_64 htileBytes; ///< Size of HTILE buffer, in bytes
908 UINT_32 baseAlign; ///< Base alignment
909 UINT_32 bpp; ///< Bits per pixel for HTILE is how many bits for an 8x8 block!
910 UINT_32 macroWidth; ///< Macro width in pixels, actually squared cache shape
911 UINT_32 macroHeight; ///< Macro height in pixels
912 UINT_64 sliceSize; ///< Slice size, in bytes.
913 BOOL_32 sliceInterleaved; ///< Flag to indicate if different slice's htile is interleaved
914 /// Compute engine clear can't be used if htile is interleaved
915 } ADDR_COMPUTE_HTILE_INFO_OUTPUT;
916
917 /**
918 ****************************************************************************************************
919 * AddrComputeHtileInfo
920 *
921 * @brief
922 * Compute Htile pitch, height, base alignment and size in bytes
923 ****************************************************************************************************
924 */
925 ADDR_E_RETURNCODE ADDR_API AddrComputeHtileInfo(
926 ADDR_HANDLE hLib,
927 const ADDR_COMPUTE_HTILE_INFO_INPUT* pIn,
928 ADDR_COMPUTE_HTILE_INFO_OUTPUT* pOut);
929
930
931
932 /**
933 ****************************************************************************************************
934 * ADDR_COMPUTE_HTILE_ADDRFROMCOORD_INPUT
935 *
936 * @brief
937 * Input structure for AddrComputeHtileAddrFromCoord
938 ****************************************************************************************************
939 */
940 typedef struct _ADDR_COMPUTE_HTILE_ADDRFROMCOORD_INPUT
941 {
942 UINT_32 size; ///< Size of this structure in bytes
943
944 UINT_32 pitch; ///< Pitch, in pixels
945 UINT_32 height; ///< Height in pixels
946 UINT_32 x; ///< X coordinate
947 UINT_32 y; ///< Y coordinate
948 UINT_32 slice; ///< Index of slice
949 UINT_32 numSlices; ///< Number of slices
950 BOOL_32 isLinear; ///< Linear or tiled HTILE layout
951 ADDR_HTILE_FLAGS flags; ///< htile flags
952 AddrHtileBlockSize blockWidth; ///< 4 or 8. 1 means 8, 0 means 4. EG above only support 8
953 AddrHtileBlockSize blockHeight; ///< 4 or 8. 1 means 8, 0 means 4. EG above only support 8
954 ADDR_TILEINFO* pTileInfo; ///< Tile info
955
956 INT_32 tileIndex; ///< Tile index, MUST be -1 if you don't want to use it
957 /// while the global useTileIndex is set to 1
958 INT_32 macroModeIndex; ///< Index in macro tile mode table if there is one (CI)
959 ///< README: When tileIndex is not -1, this must be valid
960 UINT_32 bpp; ///< depth/stencil buffer bit per pixel size
961 UINT_32 zStencilAddr; ///< tcCompatible Z/Stencil surface address
962 } ADDR_COMPUTE_HTILE_ADDRFROMCOORD_INPUT;
963
964 /**
965 ****************************************************************************************************
966 * ADDR_COMPUTE_HTILE_ADDRFROMCOORD_OUTPUT
967 *
968 * @brief
969 * Output structure for AddrComputeHtileAddrFromCoord
970 ****************************************************************************************************
971 */
972 typedef struct _ADDR_COMPUTE_HTILE_ADDRFROMCOORD_OUTPUT
973 {
974 UINT_32 size; ///< Size of this structure in bytes
975
976 UINT_64 addr; ///< Address in bytes
977 UINT_32 bitPosition; ///< Bit position, 0 or 4. CMASK and HTILE shares some lib method.
978 /// So we keep bitPosition for HTILE as well
979 } ADDR_COMPUTE_HTILE_ADDRFROMCOORD_OUTPUT;
980
981 /**
982 ****************************************************************************************************
983 * AddrComputeHtileAddrFromCoord
984 *
985 * @brief
986 * Compute Htile address according to coordinates (of depth buffer)
987 ****************************************************************************************************
988 */
989 ADDR_E_RETURNCODE ADDR_API AddrComputeHtileAddrFromCoord(
990 ADDR_HANDLE hLib,
991 const ADDR_COMPUTE_HTILE_ADDRFROMCOORD_INPUT* pIn,
992 ADDR_COMPUTE_HTILE_ADDRFROMCOORD_OUTPUT* pOut);
993
994
995
996 /**
997 ****************************************************************************************************
998 * ADDR_COMPUTE_HTILE_COORDFROMADDR_INPUT
999 *
1000 * @brief
1001 * Input structure for AddrComputeHtileCoordFromAddr
1002 ****************************************************************************************************
1003 */
1004 typedef struct _ADDR_COMPUTE_HTILE_COORDFROMADDR_INPUT
1005 {
1006 UINT_32 size; ///< Size of this structure in bytes
1007
1008 UINT_64 addr; ///< Address
1009 UINT_32 bitPosition; ///< Bit position 0 or 4. CMASK and HTILE share some methods
1010 /// so we keep bitPosition for HTILE as well
1011 UINT_32 pitch; ///< Pitch, in pixels
1012 UINT_32 height; ///< Height, in pixels
1013 UINT_32 numSlices; ///< Number of slices
1014 BOOL_32 isLinear; ///< Linear or tiled HTILE layout
1015 AddrHtileBlockSize blockWidth; ///< 4 or 8. 1 means 8, 0 means 4. R8xx/R9xx only support 8
1016 AddrHtileBlockSize blockHeight; ///< 4 or 8. 1 means 8, 0 means 4. R8xx/R9xx only support 8
1017 ADDR_TILEINFO* pTileInfo; ///< Tile info
1018
1019 INT_32 tileIndex; ///< Tile index, MUST be -1 if you don't want to use it
1020 /// while the global useTileIndex is set to 1
1021 INT_32 macroModeIndex; ///< Index in macro tile mode table if there is one (CI)
1022 ///< README: When tileIndex is not -1, this must be valid
1023 } ADDR_COMPUTE_HTILE_COORDFROMADDR_INPUT;
1024
1025 /**
1026 ****************************************************************************************************
1027 * ADDR_COMPUTE_HTILE_COORDFROMADDR_OUTPUT
1028 *
1029 * @brief
1030 * Output structure for AddrComputeHtileCoordFromAddr
1031 ****************************************************************************************************
1032 */
1033 typedef struct _ADDR_COMPUTE_HTILE_COORDFROMADDR_OUTPUT
1034 {
1035 UINT_32 size; ///< Size of this structure in bytes
1036
1037 UINT_32 x; ///< X coordinate
1038 UINT_32 y; ///< Y coordinate
1039 UINT_32 slice; ///< Slice index
1040 } ADDR_COMPUTE_HTILE_COORDFROMADDR_OUTPUT;
1041
1042 /**
1043 ****************************************************************************************************
1044 * AddrComputeHtileCoordFromAddr
1045 *
1046 * @brief
1047 * Compute coordinates within depth buffer (1st pixel of a micro tile) according to
1048 * Htile address
1049 ****************************************************************************************************
1050 */
1051 ADDR_E_RETURNCODE ADDR_API AddrComputeHtileCoordFromAddr(
1052 ADDR_HANDLE hLib,
1053 const ADDR_COMPUTE_HTILE_COORDFROMADDR_INPUT* pIn,
1054 ADDR_COMPUTE_HTILE_COORDFROMADDR_OUTPUT* pOut);
1055
1056
1057
1058 ////////////////////////////////////////////////////////////////////////////////////////////////////
1059 // C-mask functions
1060 ////////////////////////////////////////////////////////////////////////////////////////////////////
1061
1062 /**
1063 ****************************************************************************************************
1064 * ADDR_CMASK_FLAGS
1065 *
1066 * @brief
1067 * CMASK flags
1068 ****************************************************************************************************
1069 */
1070 typedef union _ADDR_CMASK_FLAGS
1071 {
1072 struct
1073 {
1074 UINT_32 tcCompatible : 1; ///< Flag indicates surface needs to be shader readable
1075 UINT_32 reserved :31; ///< Reserved bits
1076 };
1077
1078 UINT_32 value;
1079 } ADDR_CMASK_FLAGS;
1080
1081 /**
1082 ****************************************************************************************************
1083 * ADDR_COMPUTE_CMASK_INFO_INPUT
1084 *
1085 * @brief
1086 * Input structure of AddrComputeCmaskInfo
1087 ****************************************************************************************************
1088 */
1089 typedef struct _ADDR_COMPUTE_CMASKINFO_INPUT
1090 {
1091 UINT_32 size; ///< Size of this structure in bytes
1092
1093 ADDR_CMASK_FLAGS flags; ///< CMASK flags
1094 UINT_32 pitch; ///< Pitch, in pixels, of color buffer
1095 UINT_32 height; ///< Height, in pixels, of color buffer
1096 UINT_32 numSlices; ///< Number of slices, of color buffer
1097 BOOL_32 isLinear; ///< Linear or tiled layout, Only SI can be linear
1098 ADDR_TILEINFO* pTileInfo; ///< Tile info
1099
1100 INT_32 tileIndex; ///< Tile index, MUST be -1 if you don't want to use it
1101 /// while the global useTileIndex is set to 1
1102 INT_32 macroModeIndex; ///< Index in macro tile mode table if there is one (CI)
1103 ///< README: When tileIndex is not -1, this must be valid
1104 } ADDR_COMPUTE_CMASK_INFO_INPUT;
1105
1106 /**
1107 ****************************************************************************************************
1108 * ADDR_COMPUTE_CMASK_INFO_OUTPUT
1109 *
1110 * @brief
1111 * Output structure of AddrComputeCmaskInfo
1112 ****************************************************************************************************
1113 */
1114 typedef struct _ADDR_COMPUTE_CMASK_INFO_OUTPUT
1115 {
1116 UINT_32 size; ///< Size of this structure in bytes
1117
1118 UINT_32 pitch; ///< Pitch in pixels of color buffer which
1119 /// this Cmask matches. The size might be larger than
1120 /// original color buffer pitch when called with
1121 /// an unaligned pitch.
1122 UINT_32 height; ///< Height in pixels, as above
1123 UINT_64 cmaskBytes; ///< Size in bytes of CMask buffer
1124 UINT_32 baseAlign; ///< Base alignment
1125 UINT_32 blockMax; ///< Cmask block size. Need this to set CB_COLORn_MASK register
1126 UINT_32 macroWidth; ///< Macro width in pixels, actually squared cache shape
1127 UINT_32 macroHeight; ///< Macro height in pixels
1128 UINT_64 sliceSize; ///< Slice size, in bytes.
1129 } ADDR_COMPUTE_CMASK_INFO_OUTPUT;
1130
1131 /**
1132 ****************************************************************************************************
1133 * AddrComputeCmaskInfo
1134 *
1135 * @brief
1136 * Compute Cmask pitch, height, base alignment and size in bytes from color buffer
1137 * info
1138 ****************************************************************************************************
1139 */
1140 ADDR_E_RETURNCODE ADDR_API AddrComputeCmaskInfo(
1141 ADDR_HANDLE hLib,
1142 const ADDR_COMPUTE_CMASK_INFO_INPUT* pIn,
1143 ADDR_COMPUTE_CMASK_INFO_OUTPUT* pOut);
1144
1145
1146
1147 /**
1148 ****************************************************************************************************
1149 * ADDR_COMPUTE_CMASK_ADDRFROMCOORD_INPUT
1150 *
1151 * @brief
1152 * Input structure for AddrComputeCmaskAddrFromCoord
1153 *
1154 ****************************************************************************************************
1155 */
1156 typedef struct _ADDR_COMPUTE_CMASK_ADDRFROMCOORD_INPUT
1157 {
1158 UINT_32 size; ///< Size of this structure in bytes
1159 UINT_32 x; ///< X coordinate
1160 UINT_32 y; ///< Y coordinate
1161 UINT_64 fmaskAddr; ///< Fmask addr for tc compatible Cmask
1162 UINT_32 slice; ///< Slice index
1163 UINT_32 pitch; ///< Pitch in pixels, of color buffer
1164 UINT_32 height; ///< Height in pixels, of color buffer
1165 UINT_32 numSlices; ///< Number of slices
1166 UINT_32 bpp;
1167 BOOL_32 isLinear; ///< Linear or tiled layout, Only SI can be linear
1168 ADDR_CMASK_FLAGS flags; ///< CMASK flags
1169 ADDR_TILEINFO* pTileInfo; ///< Tile info
1170
1171 INT_32 tileIndex; ///< Tile index, MUST be -1 if you don't want to use it
1172 ///< while the global useTileIndex is set to 1
1173 INT_32 macroModeIndex; ///< Index in macro tile mode table if there is one (CI)
1174 ///< README: When tileIndex is not -1, this must be valid
1175 } ADDR_COMPUTE_CMASK_ADDRFROMCOORD_INPUT;
1176
1177 /**
1178 ****************************************************************************************************
1179 * ADDR_COMPUTE_CMASK_ADDRFROMCOORD_OUTPUT
1180 *
1181 * @brief
1182 * Output structure for AddrComputeCmaskAddrFromCoord
1183 ****************************************************************************************************
1184 */
1185 typedef struct _ADDR_COMPUTE_CMASK_ADDRFROMCOORD_OUTPUT
1186 {
1187 UINT_32 size; ///< Size of this structure in bytes
1188
1189 UINT_64 addr; ///< CMASK address in bytes
1190 UINT_32 bitPosition; ///< Bit position within addr, 0-7. CMASK is 4 bpp,
1191 /// so the address may be located in bit 0 (0) or 4 (4)
1192 } ADDR_COMPUTE_CMASK_ADDRFROMCOORD_OUTPUT;
1193
1194 /**
1195 ****************************************************************************************************
1196 * AddrComputeCmaskAddrFromCoord
1197 *
1198 * @brief
1199 * Compute Cmask address according to coordinates (of MSAA color buffer)
1200 ****************************************************************************************************
1201 */
1202 ADDR_E_RETURNCODE ADDR_API AddrComputeCmaskAddrFromCoord(
1203 ADDR_HANDLE hLib,
1204 const ADDR_COMPUTE_CMASK_ADDRFROMCOORD_INPUT* pIn,
1205 ADDR_COMPUTE_CMASK_ADDRFROMCOORD_OUTPUT* pOut);
1206
1207
1208
1209 /**
1210 ****************************************************************************************************
1211 * ADDR_COMPUTE_CMASK_COORDFROMADDR_INPUT
1212 *
1213 * @brief
1214 * Input structure for AddrComputeCmaskCoordFromAddr
1215 ****************************************************************************************************
1216 */
1217 typedef struct _ADDR_COMPUTE_CMASK_COORDFROMADDR_INPUT
1218 {
1219 UINT_32 size; ///< Size of this structure in bytes
1220
1221 UINT_64 addr; ///< CMASK address in bytes
1222 UINT_32 bitPosition; ///< Bit position within addr, 0-7. CMASK is 4 bpp,
1223 /// so the address may be located in bit 0 (0) or 4 (4)
1224 UINT_32 pitch; ///< Pitch, in pixels
1225 UINT_32 height; ///< Height in pixels
1226 UINT_32 numSlices; ///< Number of slices
1227 BOOL_32 isLinear; ///< Linear or tiled layout, Only SI can be linear
1228 ADDR_TILEINFO* pTileInfo; ///< Tile info
1229
1230 INT_32 tileIndex; ///< Tile index, MUST be -1 if you don't want to use it
1231 /// while the global useTileIndex is set to 1
1232 INT_32 macroModeIndex; ///< Index in macro tile mode table if there is one (CI)
1233 ///< README: When tileIndex is not -1, this must be valid
1234 } ADDR_COMPUTE_CMASK_COORDFROMADDR_INPUT;
1235
1236 /**
1237 ****************************************************************************************************
1238 * ADDR_COMPUTE_CMASK_COORDFROMADDR_OUTPUT
1239 *
1240 * @brief
1241 * Output structure for AddrComputeCmaskCoordFromAddr
1242 ****************************************************************************************************
1243 */
1244 typedef struct _ADDR_COMPUTE_CMASK_COORDFROMADDR_OUTPUT
1245 {
1246 UINT_32 size; ///< Size of this structure in bytes
1247
1248 UINT_32 x; ///< X coordinate
1249 UINT_32 y; ///< Y coordinate
1250 UINT_32 slice; ///< Slice index
1251 } ADDR_COMPUTE_CMASK_COORDFROMADDR_OUTPUT;
1252
1253 /**
1254 ****************************************************************************************************
1255 * AddrComputeCmaskCoordFromAddr
1256 *
1257 * @brief
1258 * Compute coordinates within color buffer (1st pixel of a micro tile) according to
1259 * Cmask address
1260 ****************************************************************************************************
1261 */
1262 ADDR_E_RETURNCODE ADDR_API AddrComputeCmaskCoordFromAddr(
1263 ADDR_HANDLE hLib,
1264 const ADDR_COMPUTE_CMASK_COORDFROMADDR_INPUT* pIn,
1265 ADDR_COMPUTE_CMASK_COORDFROMADDR_OUTPUT* pOut);
1266
1267
1268
1269 ////////////////////////////////////////////////////////////////////////////////////////////////////
1270 // F-mask functions
1271 ////////////////////////////////////////////////////////////////////////////////////////////////////
1272
1273 /**
1274 ****************************************************************************************************
1275 * ADDR_COMPUTE_FMASK_INFO_INPUT
1276 *
1277 * @brief
1278 * Input structure for AddrComputeFmaskInfo
1279 ****************************************************************************************************
1280 */
1281 typedef struct _ADDR_COMPUTE_FMASK_INFO_INPUT
1282 {
1283 UINT_32 size; ///< Size of this structure in bytes
1284
1285 AddrTileMode tileMode; ///< Tile mode
1286 UINT_32 pitch; ///< Surface pitch, in pixels
1287 UINT_32 height; ///< Surface height, in pixels
1288 UINT_32 numSlices; ///< Number of slice/depth
1289 UINT_32 numSamples; ///< Number of samples
1290 UINT_32 numFrags; ///< Number of fragments, leave it zero or the same as
1291 /// number of samples for normal AA; Set it to the
1292 /// number of fragments for EQAA
1293 /// r800 and later HWL parameters
1294 struct
1295 {
1296 UINT_32 resolved: 1; ///< TRUE if the surface is for resolved fmask, only used
1297 /// by H/W clients. S/W should always set it to FALSE.
1298 UINT_32 reserved: 31; ///< Reserved for future use.
1299 };
1300 ADDR_TILEINFO* pTileInfo; ///< 2D tiling parameters. Clients must give valid data
1301 INT_32 tileIndex; ///< Tile index, MUST be -1 if you don't want to use it
1302 /// while the global useTileIndex is set to 1
1303 } ADDR_COMPUTE_FMASK_INFO_INPUT;
1304
1305 /**
1306 ****************************************************************************************************
1307 * ADDR_COMPUTE_FMASK_INFO_OUTPUT
1308 *
1309 * @brief
1310 * Output structure for AddrComputeFmaskInfo
1311 ****************************************************************************************************
1312 */
1313 typedef struct _ADDR_COMPUTE_FMASK_INFO_OUTPUT
1314 {
1315 UINT_32 size; ///< Size of this structure in bytes
1316
1317 UINT_32 pitch; ///< Pitch of fmask in pixels
1318 UINT_32 height; ///< Height of fmask in pixels
1319 UINT_32 numSlices; ///< Slices of fmask
1320 UINT_64 fmaskBytes; ///< Size of fmask in bytes
1321 UINT_32 baseAlign; ///< Base address alignment
1322 UINT_32 pitchAlign; ///< Pitch alignment
1323 UINT_32 heightAlign; ///< Height alignment
1324 UINT_32 bpp; ///< Bits per pixel of FMASK is: number of bit planes
1325 UINT_32 numSamples; ///< Number of samples, used for dump, export this since input
1326 /// may be changed in 9xx and above
1327 /// r800 and later HWL parameters
1328 ADDR_TILEINFO* pTileInfo; ///< Tile parameters used. Fmask can have different
1329 /// bank_height from color buffer
1330 INT_32 tileIndex; ///< Tile index, MUST be -1 if you don't want to use it
1331 /// while the global useTileIndex is set to 1
1332 INT_32 macroModeIndex; ///< Index in macro tile mode table if there is one (CI)
1333 UINT_64 sliceSize; ///< Size of slice in bytes
1334 } ADDR_COMPUTE_FMASK_INFO_OUTPUT;
1335
1336 /**
1337 ****************************************************************************************************
1338 * AddrComputeFmaskInfo
1339 *
1340 * @brief
1341 * Compute Fmask pitch/height/depth/alignments and size in bytes
1342 ****************************************************************************************************
1343 */
1344 ADDR_E_RETURNCODE ADDR_API AddrComputeFmaskInfo(
1345 ADDR_HANDLE hLib,
1346 const ADDR_COMPUTE_FMASK_INFO_INPUT* pIn,
1347 ADDR_COMPUTE_FMASK_INFO_OUTPUT* pOut);
1348
1349
1350
1351 /**
1352 ****************************************************************************************************
1353 * ADDR_COMPUTE_FMASK_ADDRFROMCOORD_INPUT
1354 *
1355 * @brief
1356 * Input structure for AddrComputeFmaskAddrFromCoord
1357 ****************************************************************************************************
1358 */
1359 typedef struct _ADDR_COMPUTE_FMASK_ADDRFROMCOORD_INPUT
1360 {
1361 UINT_32 size; ///< Size of this structure in bytes
1362
1363 UINT_32 x; ///< X coordinate
1364 UINT_32 y; ///< Y coordinate
1365 UINT_32 slice; ///< Slice index
1366 UINT_32 plane; ///< Plane number
1367 UINT_32 sample; ///< Sample index (fragment index for EQAA)
1368
1369 UINT_32 pitch; ///< Surface pitch, in pixels
1370 UINT_32 height; ///< Surface height, in pixels
1371 UINT_32 numSamples; ///< Number of samples
1372 UINT_32 numFrags; ///< Number of fragments, leave it zero or the same as
1373 /// number of samples for normal AA; Set it to the
1374 /// number of fragments for EQAA
1375
1376 AddrTileMode tileMode; ///< Tile mode
1377 union
1378 {
1379 struct
1380 {
1381 UINT_32 bankSwizzle; ///< Bank swizzle
1382 UINT_32 pipeSwizzle; ///< Pipe swizzle
1383 };
1384 UINT_32 tileSwizzle; ///< Combined swizzle, if useCombinedSwizzle is TRUE
1385 };
1386
1387 /// r800 and later HWL parameters
1388 struct
1389 {
1390 UINT_32 resolved: 1; ///< TRUE if this is a resolved fmask, used by H/W clients
1391 UINT_32 ignoreSE: 1; ///< TRUE if shader engines are ignored.
1392 UINT_32 reserved: 30; ///< Reserved for future use.
1393 };
1394 ADDR_TILEINFO* pTileInfo; ///< 2D tiling parameters. Client must provide all data
1395
1396 } ADDR_COMPUTE_FMASK_ADDRFROMCOORD_INPUT;
1397
1398 /**
1399 ****************************************************************************************************
1400 * ADDR_COMPUTE_FMASK_ADDRFROMCOORD_OUTPUT
1401 *
1402 * @brief
1403 * Output structure for AddrComputeFmaskAddrFromCoord
1404 ****************************************************************************************************
1405 */
1406 typedef struct _ADDR_COMPUTE_FMASK_ADDRFROMCOORD_OUTPUT
1407 {
1408 UINT_32 size; ///< Size of this structure in bytes
1409
1410 UINT_64 addr; ///< Fmask address
1411 UINT_32 bitPosition; ///< Bit position within fmaskAddr, 0-7.
1412 } ADDR_COMPUTE_FMASK_ADDRFROMCOORD_OUTPUT;
1413
1414 /**
1415 ****************************************************************************************************
1416 * AddrComputeFmaskAddrFromCoord
1417 *
1418 * @brief
1419 * Compute Fmask address according to coordinates (x,y,slice,sample,plane)
1420 ****************************************************************************************************
1421 */
1422 ADDR_E_RETURNCODE ADDR_API AddrComputeFmaskAddrFromCoord(
1423 ADDR_HANDLE hLib,
1424 const ADDR_COMPUTE_FMASK_ADDRFROMCOORD_INPUT* pIn,
1425 ADDR_COMPUTE_FMASK_ADDRFROMCOORD_OUTPUT* pOut);
1426
1427
1428
1429 /**
1430 ****************************************************************************************************
1431 * ADDR_COMPUTE_FMASK_COORDFROMADDR_INPUT
1432 *
1433 * @brief
1434 * Input structure for AddrComputeFmaskCoordFromAddr
1435 ****************************************************************************************************
1436 */
1437 typedef struct _ADDR_COMPUTE_FMASK_COORDFROMADDR_INPUT
1438 {
1439 UINT_32 size; ///< Size of this structure in bytes
1440
1441 UINT_64 addr; ///< Address
1442 UINT_32 bitPosition; ///< Bit position within addr, 0-7.
1443
1444 UINT_32 pitch; ///< Pitch, in pixels
1445 UINT_32 height; ///< Height in pixels
1446 UINT_32 numSamples; ///< Number of samples
1447 UINT_32 numFrags; ///< Number of fragments
1448 AddrTileMode tileMode; ///< Tile mode
1449 union
1450 {
1451 struct
1452 {
1453 UINT_32 bankSwizzle; ///< Bank swizzle
1454 UINT_32 pipeSwizzle; ///< Pipe swizzle
1455 };
1456 UINT_32 tileSwizzle; ///< Combined swizzle, if useCombinedSwizzle is TRUE
1457 };
1458
1459 /// r800 and later HWL parameters
1460 struct
1461 {
1462 UINT_32 resolved: 1; ///< TRUE if this is a resolved fmask, used by HW components
1463 UINT_32 ignoreSE: 1; ///< TRUE if shader engines are ignored.
1464 UINT_32 reserved: 30; ///< Reserved for future use.
1465 };
1466 ADDR_TILEINFO* pTileInfo; ///< 2D tile parameters. Client must provide all data
1467
1468 } ADDR_COMPUTE_FMASK_COORDFROMADDR_INPUT;
1469
1470 /**
1471 ****************************************************************************************************
1472 * ADDR_COMPUTE_FMASK_COORDFROMADDR_OUTPUT
1473 *
1474 * @brief
1475 * Output structure for AddrComputeFmaskCoordFromAddr
1476 ****************************************************************************************************
1477 */
1478 typedef struct _ADDR_COMPUTE_FMASK_COORDFROMADDR_OUTPUT
1479 {
1480 UINT_32 size; ///< Size of this structure in bytes
1481
1482 UINT_32 x; ///< X coordinate
1483 UINT_32 y; ///< Y coordinate
1484 UINT_32 slice; ///< Slice index
1485 UINT_32 plane; ///< Plane number
1486 UINT_32 sample; ///< Sample index (fragment index for EQAA)
1487 } ADDR_COMPUTE_FMASK_COORDFROMADDR_OUTPUT;
1488
1489 /**
1490 ****************************************************************************************************
1491 * AddrComputeFmaskCoordFromAddr
1492 *
1493 * @brief
1494 * Compute FMASK coordinate from an given address
1495 ****************************************************************************************************
1496 */
1497 ADDR_E_RETURNCODE ADDR_API AddrComputeFmaskCoordFromAddr(
1498 ADDR_HANDLE hLib,
1499 const ADDR_COMPUTE_FMASK_COORDFROMADDR_INPUT* pIn,
1500 ADDR_COMPUTE_FMASK_COORDFROMADDR_OUTPUT* pOut);
1501
1502
1503
1504 ////////////////////////////////////////////////////////////////////////////////////////////////////
1505 // Element/utility functions
1506 ////////////////////////////////////////////////////////////////////////////////////////////////////
1507
1508 /**
1509 ****************************************************************************************************
1510 * AddrGetVersion
1511 *
1512 * @brief
1513 * Get AddrLib version number
1514 ****************************************************************************************************
1515 */
1516 UINT_32 ADDR_API AddrGetVersion(ADDR_HANDLE hLib);
1517
1518 /**
1519 ****************************************************************************************************
1520 * AddrUseTileIndex
1521 *
1522 * @brief
1523 * Return TRUE if tileIndex is enabled in this address library
1524 ****************************************************************************************************
1525 */
1526 BOOL_32 ADDR_API AddrUseTileIndex(ADDR_HANDLE hLib);
1527
1528 /**
1529 ****************************************************************************************************
1530 * AddrUseCombinedSwizzle
1531 *
1532 * @brief
1533 * Return TRUE if combined swizzle is enabled in this address library
1534 ****************************************************************************************************
1535 */
1536 BOOL_32 ADDR_API AddrUseCombinedSwizzle(ADDR_HANDLE hLib);
1537
1538 /**
1539 ****************************************************************************************************
1540 * ADDR_EXTRACT_BANKPIPE_SWIZZLE_INPUT
1541 *
1542 * @brief
1543 * Input structure of AddrExtractBankPipeSwizzle
1544 ****************************************************************************************************
1545 */
1546 typedef struct _ADDR_EXTRACT_BANKPIPE_SWIZZLE_INPUT
1547 {
1548 UINT_32 size; ///< Size of this structure in bytes
1549
1550 UINT_32 base256b; ///< Base256b value
1551
1552 /// r800 and later HWL parameters
1553 ADDR_TILEINFO* pTileInfo; ///< 2D tile parameters. Client must provide all data
1554
1555 INT_32 tileIndex; ///< Tile index, MUST be -1 if you don't want to use it
1556 /// while the global useTileIndex is set to 1
1557 INT_32 macroModeIndex; ///< Index in macro tile mode table if there is one (CI)
1558 ///< README: When tileIndex is not -1, this must be valid
1559 } ADDR_EXTRACT_BANKPIPE_SWIZZLE_INPUT;
1560
1561 /**
1562 ****************************************************************************************************
1563 * ADDR_EXTRACT_BANKPIPE_SWIZZLE_OUTPUT
1564 *
1565 * @brief
1566 * Output structure of AddrExtractBankPipeSwizzle
1567 ****************************************************************************************************
1568 */
1569 typedef struct _ADDR_EXTRACT_BANKPIPE_SWIZZLE_OUTPUT
1570 {
1571 UINT_32 size; ///< Size of this structure in bytes
1572
1573 UINT_32 bankSwizzle; ///< Bank swizzle
1574 UINT_32 pipeSwizzle; ///< Pipe swizzle
1575 } ADDR_EXTRACT_BANKPIPE_SWIZZLE_OUTPUT;
1576
1577 /**
1578 ****************************************************************************************************
1579 * AddrExtractBankPipeSwizzle
1580 *
1581 * @brief
1582 * Extract Bank and Pipe swizzle from base256b
1583 * @return
1584 * ADDR_OK if no error
1585 ****************************************************************************************************
1586 */
1587 ADDR_E_RETURNCODE ADDR_API AddrExtractBankPipeSwizzle(
1588 ADDR_HANDLE hLib,
1589 const ADDR_EXTRACT_BANKPIPE_SWIZZLE_INPUT* pIn,
1590 ADDR_EXTRACT_BANKPIPE_SWIZZLE_OUTPUT* pOut);
1591
1592
1593 /**
1594 ****************************************************************************************************
1595 * ADDR_COMBINE_BANKPIPE_SWIZZLE_INPUT
1596 *
1597 * @brief
1598 * Input structure of AddrCombineBankPipeSwizzle
1599 ****************************************************************************************************
1600 */
1601 typedef struct _ADDR_COMBINE_BANKPIPE_SWIZZLE_INPUT
1602 {
1603 UINT_32 size; ///< Size of this structure in bytes
1604
1605 UINT_32 bankSwizzle; ///< Bank swizzle
1606 UINT_32 pipeSwizzle; ///< Pipe swizzle
1607 UINT_64 baseAddr; ///< Base address (leave it zero for driver clients)
1608
1609 /// r800 and later HWL parameters
1610 ADDR_TILEINFO* pTileInfo; ///< 2D tile parameters. Client must provide all data
1611
1612 INT_32 tileIndex; ///< Tile index, MUST be -1 if you don't want to use it
1613 /// while the global useTileIndex is set to 1
1614 INT_32 macroModeIndex; ///< Index in macro tile mode table if there is one (CI)
1615 ///< README: When tileIndex is not -1, this must be valid
1616 } ADDR_COMBINE_BANKPIPE_SWIZZLE_INPUT;
1617
1618 /**
1619 ****************************************************************************************************
1620 * ADDR_COMBINE_BANKPIPE_SWIZZLE_OUTPUT
1621 *
1622 * @brief
1623 * Output structure of AddrCombineBankPipeSwizzle
1624 ****************************************************************************************************
1625 */
1626 typedef struct _ADDR_COMBINE_BANKPIPE_SWIZZLE_OUTPUT
1627 {
1628 UINT_32 size; ///< Size of this structure in bytes
1629
1630 UINT_32 tileSwizzle; ///< Combined swizzle
1631 } ADDR_COMBINE_BANKPIPE_SWIZZLE_OUTPUT;
1632
1633 /**
1634 ****************************************************************************************************
1635 * AddrCombineBankPipeSwizzle
1636 *
1637 * @brief
1638 * Combine Bank and Pipe swizzle
1639 * @return
1640 * ADDR_OK if no error
1641 * @note
1642 * baseAddr here is full MCAddress instead of base256b
1643 ****************************************************************************************************
1644 */
1645 ADDR_E_RETURNCODE ADDR_API AddrCombineBankPipeSwizzle(
1646 ADDR_HANDLE hLib,
1647 const ADDR_COMBINE_BANKPIPE_SWIZZLE_INPUT* pIn,
1648 ADDR_COMBINE_BANKPIPE_SWIZZLE_OUTPUT* pOut);
1649
1650
1651
1652 /**
1653 ****************************************************************************************************
1654 * ADDR_COMPUTE_SLICESWIZZLE_INPUT
1655 *
1656 * @brief
1657 * Input structure of AddrComputeSliceSwizzle
1658 ****************************************************************************************************
1659 */
1660 typedef struct _ADDR_COMPUTE_SLICESWIZZLE_INPUT
1661 {
1662 UINT_32 size; ///< Size of this structure in bytes
1663
1664 AddrTileMode tileMode; ///< Tile Mode
1665 UINT_32 baseSwizzle; ///< Base tile swizzle
1666 UINT_32 slice; ///< Slice index
1667 UINT_64 baseAddr; ///< Base address, driver should leave it 0 in most cases
1668
1669 /// r800 and later HWL parameters
1670 ADDR_TILEINFO* pTileInfo; ///< 2D tile parameters. Actually banks needed here!
1671
1672 INT_32 tileIndex; ///< Tile index, MUST be -1 if you don't want to use it
1673 /// while the global useTileIndex is set to 1
1674 INT_32 macroModeIndex; ///< Index in macro tile mode table if there is one (CI)
1675 ///< README: When tileIndex is not -1, this must be valid
1676 } ADDR_COMPUTE_SLICESWIZZLE_INPUT;
1677
1678
1679
1680 /**
1681 ****************************************************************************************************
1682 * ADDR_COMPUTE_SLICESWIZZLE_OUTPUT
1683 *
1684 * @brief
1685 * Output structure of AddrComputeSliceSwizzle
1686 ****************************************************************************************************
1687 */
1688 typedef struct _ADDR_COMPUTE_SLICESWIZZLE_OUTPUT
1689 {
1690 UINT_32 size; ///< Size of this structure in bytes
1691
1692 UINT_32 tileSwizzle; ///< Recalculated tileSwizzle value
1693 } ADDR_COMPUTE_SLICESWIZZLE_OUTPUT;
1694
1695 /**
1696 ****************************************************************************************************
1697 * AddrComputeSliceSwizzle
1698 *
1699 * @brief
1700 * Extract Bank and Pipe swizzle from base256b
1701 * @return
1702 * ADDR_OK if no error
1703 ****************************************************************************************************
1704 */
1705 ADDR_E_RETURNCODE ADDR_API AddrComputeSliceSwizzle(
1706 ADDR_HANDLE hLib,
1707 const ADDR_COMPUTE_SLICESWIZZLE_INPUT* pIn,
1708 ADDR_COMPUTE_SLICESWIZZLE_OUTPUT* pOut);
1709
1710
1711 /**
1712 ****************************************************************************************************
1713 * AddrSwizzleGenOption
1714 *
1715 * @brief
1716 * Which swizzle generating options: legacy or linear
1717 ****************************************************************************************************
1718 */
1719 typedef enum _AddrSwizzleGenOption
1720 {
1721 ADDR_SWIZZLE_GEN_DEFAULT = 0, ///< As is in client driver implemention for swizzle
1722 ADDR_SWIZZLE_GEN_LINEAR = 1, ///< Using a linear increment of swizzle
1723 } AddrSwizzleGenOption;
1724
1725 /**
1726 ****************************************************************************************************
1727 * AddrSwizzleOption
1728 *
1729 * @brief
1730 * Controls how swizzle is generated
1731 ****************************************************************************************************
1732 */
1733 typedef union _ADDR_SWIZZLE_OPTION
1734 {
1735 struct
1736 {
1737 UINT_32 genOption : 1; ///< The way swizzle is generated, see AddrSwizzleGenOption
1738 UINT_32 reduceBankBit : 1; ///< TRUE if we need reduce swizzle bits
1739 UINT_32 reserved :30; ///< Reserved bits
1740 };
1741
1742 UINT_32 value;
1743
1744 } ADDR_SWIZZLE_OPTION;
1745
1746 /**
1747 ****************************************************************************************************
1748 * ADDR_COMPUTE_BASE_SWIZZLE_INPUT
1749 *
1750 * @brief
1751 * Input structure of AddrComputeBaseSwizzle
1752 ****************************************************************************************************
1753 */
1754 typedef struct _ADDR_COMPUTE_BASE_SWIZZLE_INPUT
1755 {
1756 UINT_32 size; ///< Size of this structure in bytes
1757
1758 ADDR_SWIZZLE_OPTION option; ///< Swizzle option
1759 UINT_32 surfIndex; ///< Index of this surface type
1760 AddrTileMode tileMode; ///< Tile Mode
1761
1762 /// r800 and later HWL parameters
1763 ADDR_TILEINFO* pTileInfo; ///< 2D tile parameters. Actually banks needed here!
1764
1765 INT_32 tileIndex; ///< Tile index, MUST be -1 if you don't want to use it
1766 /// while the global useTileIndex is set to 1
1767 INT_32 macroModeIndex; ///< Index in macro tile mode table if there is one (CI)
1768 ///< README: When tileIndex is not -1, this must be valid
1769 } ADDR_COMPUTE_BASE_SWIZZLE_INPUT;
1770
1771 /**
1772 ****************************************************************************************************
1773 * ADDR_COMPUTE_BASE_SWIZZLE_OUTPUT
1774 *
1775 * @brief
1776 * Output structure of AddrComputeBaseSwizzle
1777 ****************************************************************************************************
1778 */
1779 typedef struct _ADDR_COMPUTE_BASE_SWIZZLE_OUTPUT
1780 {
1781 UINT_32 size; ///< Size of this structure in bytes
1782
1783 UINT_32 tileSwizzle; ///< Combined swizzle
1784 } ADDR_COMPUTE_BASE_SWIZZLE_OUTPUT;
1785
1786 /**
1787 ****************************************************************************************************
1788 * AddrComputeBaseSwizzle
1789 *
1790 * @brief
1791 * Return a Combined Bank and Pipe swizzle base on surface based on surface type/index
1792 * @return
1793 * ADDR_OK if no error
1794 ****************************************************************************************************
1795 */
1796 ADDR_E_RETURNCODE ADDR_API AddrComputeBaseSwizzle(
1797 ADDR_HANDLE hLib,
1798 const ADDR_COMPUTE_BASE_SWIZZLE_INPUT* pIn,
1799 ADDR_COMPUTE_BASE_SWIZZLE_OUTPUT* pOut);
1800
1801
1802
1803 /**
1804 ****************************************************************************************************
1805 * ELEM_GETEXPORTNORM_INPUT
1806 *
1807 * @brief
1808 * Input structure for ElemGetExportNorm
1809 *
1810 ****************************************************************************************************
1811 */
1812 typedef struct _ELEM_GETEXPORTNORM_INPUT
1813 {
1814 UINT_32 size; ///< Size of this structure in bytes
1815
1816 AddrColorFormat format; ///< Color buffer format; Client should use ColorFormat
1817 AddrSurfaceNumber num; ///< Surface number type; Client should use NumberType
1818 AddrSurfaceSwap swap; ///< Surface swap byte swap; Client should use SurfaceSwap
1819 UINT_32 numSamples; ///< Number of samples
1820 } ELEM_GETEXPORTNORM_INPUT;
1821
1822 /**
1823 ****************************************************************************************************
1824 * ElemGetExportNorm
1825 *
1826 * @brief
1827 * Helper function to check one format can be EXPORT_NUM, which is a register
1828 * CB_COLOR_INFO.SURFACE_FORMAT. FP16 can be reported as EXPORT_NORM for rv770 in r600
1829 * family
1830 * @note
1831 * The implementation is only for r600.
1832 * 00 - EXPORT_FULL: PS exports are 4 pixels with 4 components with 32-bits-per-component. (two
1833 * clocks per export)
1834 * 01 - EXPORT_NORM: PS exports are 4 pixels with 4 components with 16-bits-per-component. (one
1835 * clock per export)
1836 *
1837 ****************************************************************************************************
1838 */
1839 BOOL_32 ADDR_API ElemGetExportNorm(
1840 ADDR_HANDLE hLib,
1841 const ELEM_GETEXPORTNORM_INPUT* pIn);
1842
1843
1844
1845 /**
1846 ****************************************************************************************************
1847 * ELEM_FLT32TODEPTHPIXEL_INPUT
1848 *
1849 * @brief
1850 * Input structure for addrFlt32ToDepthPixel
1851 *
1852 ****************************************************************************************************
1853 */
1854 typedef struct _ELEM_FLT32TODEPTHPIXEL_INPUT
1855 {
1856 UINT_32 size; ///< Size of this structure in bytes
1857
1858 AddrDepthFormat format; ///< Depth buffer format
1859 ADDR_FLT_32 comps[2]; ///< Component values (Z/stencil)
1860 } ELEM_FLT32TODEPTHPIXEL_INPUT;
1861
1862 /**
1863 ****************************************************************************************************
1864 * ELEM_FLT32TODEPTHPIXEL_INPUT
1865 *
1866 * @brief
1867 * Output structure for ElemFlt32ToDepthPixel
1868 *
1869 ****************************************************************************************************
1870 */
1871 typedef struct _ELEM_FLT32TODEPTHPIXEL_OUTPUT
1872 {
1873 UINT_32 size; ///< Size of this structure in bytes
1874
1875 UINT_8* pPixel; ///< Real depth value. Same data type as depth buffer.
1876 /// Client must provide enough storage for this type.
1877 UINT_32 depthBase; ///< Tile base in bits for depth bits
1878 UINT_32 stencilBase; ///< Tile base in bits for stencil bits
1879 UINT_32 depthBits; ///< Bits for depth
1880 UINT_32 stencilBits; ///< Bits for stencil
1881 } ELEM_FLT32TODEPTHPIXEL_OUTPUT;
1882
1883 /**
1884 ****************************************************************************************************
1885 * ElemFlt32ToDepthPixel
1886 *
1887 * @brief
1888 * Convert a FLT_32 value to a depth/stencil pixel value
1889 *
1890 * @return
1891 * Return code
1892 *
1893 ****************************************************************************************************
1894 */
1895 ADDR_E_RETURNCODE ADDR_API ElemFlt32ToDepthPixel(
1896 ADDR_HANDLE hLib,
1897 const ELEM_FLT32TODEPTHPIXEL_INPUT* pIn,
1898 ELEM_FLT32TODEPTHPIXEL_OUTPUT* pOut);
1899
1900
1901
1902 /**
1903 ****************************************************************************************************
1904 * ELEM_FLT32TOCOLORPIXEL_INPUT
1905 *
1906 * @brief
1907 * Input structure for addrFlt32ToColorPixel
1908 *
1909 ****************************************************************************************************
1910 */
1911 typedef struct _ELEM_FLT32TOCOLORPIXEL_INPUT
1912 {
1913 UINT_32 size; ///< Size of this structure in bytes
1914
1915 AddrColorFormat format; ///< Color buffer format
1916 AddrSurfaceNumber surfNum; ///< Surface number
1917 AddrSurfaceSwap surfSwap; ///< Surface swap
1918 ADDR_FLT_32 comps[4]; ///< Component values (r/g/b/a)
1919 } ELEM_FLT32TOCOLORPIXEL_INPUT;
1920
1921 /**
1922 ****************************************************************************************************
1923 * ELEM_FLT32TOCOLORPIXEL_INPUT
1924 *
1925 * @brief
1926 * Output structure for ElemFlt32ToColorPixel
1927 *
1928 ****************************************************************************************************
1929 */
1930 typedef struct _ELEM_FLT32TOCOLORPIXEL_OUTPUT
1931 {
1932 UINT_32 size; ///< Size of this structure in bytes
1933
1934 UINT_8* pPixel; ///< Real color value. Same data type as color buffer.
1935 /// Client must provide enough storage for this type.
1936 } ELEM_FLT32TOCOLORPIXEL_OUTPUT;
1937
1938 /**
1939 ****************************************************************************************************
1940 * ElemFlt32ToColorPixel
1941 *
1942 * @brief
1943 * Convert a FLT_32 value to a red/green/blue/alpha pixel value
1944 *
1945 * @return
1946 * Return code
1947 *
1948 ****************************************************************************************************
1949 */
1950 ADDR_E_RETURNCODE ADDR_API ElemFlt32ToColorPixel(
1951 ADDR_HANDLE hLib,
1952 const ELEM_FLT32TOCOLORPIXEL_INPUT* pIn,
1953 ELEM_FLT32TOCOLORPIXEL_OUTPUT* pOut);
1954
1955
1956 /**
1957 ****************************************************************************************************
1958 * ADDR_CONVERT_TILEINFOTOHW_INPUT
1959 *
1960 * @brief
1961 * Input structure for AddrConvertTileInfoToHW
1962 * @note
1963 * When reverse is TRUE, indices are igonred
1964 ****************************************************************************************************
1965 */
1966 typedef struct _ADDR_CONVERT_TILEINFOTOHW_INPUT
1967 {
1968 UINT_32 size; ///< Size of this structure in bytes
1969 BOOL_32 reverse; ///< Convert control flag.
1970 /// FALSE: convert from real value to HW value;
1971 /// TRUE: convert from HW value to real value.
1972
1973 /// r800 and later HWL parameters
1974 ADDR_TILEINFO* pTileInfo; ///< Tile parameters with real value
1975
1976 INT_32 tileIndex; ///< Tile index, MUST be -1 if you don't want to use it
1977 /// while the global useTileIndex is set to 1
1978 INT_32 macroModeIndex; ///< Index in macro tile mode table if there is one (CI)
1979 ///< README: When tileIndex is not -1, this must be valid
1980 UINT_32 bpp; ///< Bits per pixel
1981 } ADDR_CONVERT_TILEINFOTOHW_INPUT;
1982
1983 /**
1984 ****************************************************************************************************
1985 * ADDR_CONVERT_TILEINFOTOHW_OUTPUT
1986 *
1987 * @brief
1988 * Output structure for AddrConvertTileInfoToHW
1989 ****************************************************************************************************
1990 */
1991 typedef struct _ADDR_CONVERT_TILEINFOTOHW_OUTPUT
1992 {
1993 UINT_32 size; ///< Size of this structure in bytes
1994
1995 /// r800 and later HWL parameters
1996 ADDR_TILEINFO* pTileInfo; ///< Tile parameters with hardware register value
1997
1998 } ADDR_CONVERT_TILEINFOTOHW_OUTPUT;
1999
2000 /**
2001 ****************************************************************************************************
2002 * AddrConvertTileInfoToHW
2003 *
2004 * @brief
2005 * Convert tile info from real value to hardware register value
2006 ****************************************************************************************************
2007 */
2008 ADDR_E_RETURNCODE ADDR_API AddrConvertTileInfoToHW(
2009 ADDR_HANDLE hLib,
2010 const ADDR_CONVERT_TILEINFOTOHW_INPUT* pIn,
2011 ADDR_CONVERT_TILEINFOTOHW_OUTPUT* pOut);
2012
2013
2014
2015 /**
2016 ****************************************************************************************************
2017 * ADDR_CONVERT_TILEINDEX_INPUT
2018 *
2019 * @brief
2020 * Input structure for AddrConvertTileIndex
2021 ****************************************************************************************************
2022 */
2023 typedef struct _ADDR_CONVERT_TILEINDEX_INPUT
2024 {
2025 UINT_32 size; ///< Size of this structure in bytes
2026
2027 INT_32 tileIndex; ///< Tile index
2028 INT_32 macroModeIndex; ///< Index in macro tile mode table if there is one (CI)
2029 UINT_32 bpp; ///< Bits per pixel
2030 BOOL_32 tileInfoHw; ///< Set to TRUE if client wants HW enum, otherwise actual
2031 } ADDR_CONVERT_TILEINDEX_INPUT;
2032
2033 /**
2034 ****************************************************************************************************
2035 * ADDR_CONVERT_TILEINDEX_OUTPUT
2036 *
2037 * @brief
2038 * Output structure for AddrConvertTileIndex
2039 ****************************************************************************************************
2040 */
2041 typedef struct _ADDR_CONVERT_TILEINDEX_OUTPUT
2042 {
2043 UINT_32 size; ///< Size of this structure in bytes
2044
2045 AddrTileMode tileMode; ///< Tile mode
2046 AddrTileType tileType; ///< Tile type
2047 ADDR_TILEINFO* pTileInfo; ///< Tile info
2048
2049 } ADDR_CONVERT_TILEINDEX_OUTPUT;
2050
2051 /**
2052 ****************************************************************************************************
2053 * AddrConvertTileIndex
2054 *
2055 * @brief
2056 * Convert tile index to tile mode/type/info
2057 ****************************************************************************************************
2058 */
2059 ADDR_E_RETURNCODE ADDR_API AddrConvertTileIndex(
2060 ADDR_HANDLE hLib,
2061 const ADDR_CONVERT_TILEINDEX_INPUT* pIn,
2062 ADDR_CONVERT_TILEINDEX_OUTPUT* pOut);
2063
2064 /**
2065 ****************************************************************************************************
2066 * ADDR_GET_MACROMODEINDEX_INPUT
2067 *
2068 * @brief
2069 * Input structure for AddrGetMacroModeIndex
2070 ****************************************************************************************************
2071 */
2072 typedef struct _ADDR_GET_MACROMODEINDEX_INPUT
2073 {
2074 UINT_32 size; ///< Size of this structure in bytes
2075 ADDR_SURFACE_FLAGS flags; ///< Surface flag
2076 INT_32 tileIndex; ///< Tile index
2077 UINT_32 bpp; ///< Bits per pixel
2078 UINT_32 numFrags; ///< Number of color fragments
2079 } ADDR_GET_MACROMODEINDEX_INPUT;
2080
2081 /**
2082 ****************************************************************************************************
2083 * ADDR_GET_MACROMODEINDEX_OUTPUT
2084 *
2085 * @brief
2086 * Output structure for AddrGetMacroModeIndex
2087 ****************************************************************************************************
2088 */
2089 typedef struct _ADDR_GET_MACROMODEINDEX_OUTPUT
2090 {
2091 UINT_32 size; ///< Size of this structure in bytes
2092 INT_32 macroModeIndex; ///< Index in macro tile mode table if there is one (CI)
2093 } ADDR_GET_MACROMODEINDEX_OUTPUT;
2094
2095 /**
2096 ****************************************************************************************************
2097 * AddrGetMacroModeIndex
2098 *
2099 * @brief
2100 * Get macro mode index based on input parameters
2101 ****************************************************************************************************
2102 */
2103 ADDR_E_RETURNCODE ADDR_API AddrGetMacroModeIndex(
2104 ADDR_HANDLE hLib,
2105 const ADDR_GET_MACROMODEINDEX_INPUT* pIn,
2106 ADDR_GET_MACROMODEINDEX_OUTPUT* pOut);
2107
2108 /**
2109 ****************************************************************************************************
2110 * ADDR_CONVERT_TILEINDEX1_INPUT
2111 *
2112 * @brief
2113 * Input structure for AddrConvertTileIndex1 (without macro mode index)
2114 ****************************************************************************************************
2115 */
2116 typedef struct _ADDR_CONVERT_TILEINDEX1_INPUT
2117 {
2118 UINT_32 size; ///< Size of this structure in bytes
2119
2120 INT_32 tileIndex; ///< Tile index
2121 UINT_32 bpp; ///< Bits per pixel
2122 UINT_32 numSamples; ///< Number of samples
2123 BOOL_32 tileInfoHw; ///< Set to TRUE if client wants HW enum, otherwise actual
2124 } ADDR_CONVERT_TILEINDEX1_INPUT;
2125
2126 /**
2127 ****************************************************************************************************
2128 * AddrConvertTileIndex1
2129 *
2130 * @brief
2131 * Convert tile index to tile mode/type/info
2132 ****************************************************************************************************
2133 */
2134 ADDR_E_RETURNCODE ADDR_API AddrConvertTileIndex1(
2135 ADDR_HANDLE hLib,
2136 const ADDR_CONVERT_TILEINDEX1_INPUT* pIn,
2137 ADDR_CONVERT_TILEINDEX_OUTPUT* pOut);
2138
2139
2140
2141 /**
2142 ****************************************************************************************************
2143 * ADDR_GET_TILEINDEX_INPUT
2144 *
2145 * @brief
2146 * Input structure for AddrGetTileIndex
2147 ****************************************************************************************************
2148 */
2149 typedef struct _ADDR_GET_TILEINDEX_INPUT
2150 {
2151 UINT_32 size; ///< Size of this structure in bytes
2152
2153 AddrTileMode tileMode; ///< Tile mode
2154 AddrTileType tileType; ///< Tile-type: disp/non-disp/...
2155 ADDR_TILEINFO* pTileInfo; ///< Pointer to tile-info structure, can be NULL for linear/1D
2156 } ADDR_GET_TILEINDEX_INPUT;
2157
2158 /**
2159 ****************************************************************************************************
2160 * ADDR_GET_TILEINDEX_OUTPUT
2161 *
2162 * @brief
2163 * Output structure for AddrGetTileIndex
2164 ****************************************************************************************************
2165 */
2166 typedef struct _ADDR_GET_TILEINDEX_OUTPUT
2167 {
2168 UINT_32 size; ///< Size of this structure in bytes
2169
2170 INT_32 index; ///< index in table
2171 } ADDR_GET_TILEINDEX_OUTPUT;
2172
2173 /**
2174 ****************************************************************************************************
2175 * AddrGetTileIndex
2176 *
2177 * @brief
2178 * Get the tiling mode index in table
2179 ****************************************************************************************************
2180 */
2181 ADDR_E_RETURNCODE ADDR_API AddrGetTileIndex(
2182 ADDR_HANDLE hLib,
2183 const ADDR_GET_TILEINDEX_INPUT* pIn,
2184 ADDR_GET_TILEINDEX_OUTPUT* pOut);
2185
2186
2187
2188
2189 /**
2190 ****************************************************************************************************
2191 * ADDR_PRT_INFO_INPUT
2192 *
2193 * @brief
2194 * Input structure for AddrComputePrtInfo
2195 ****************************************************************************************************
2196 */
2197 typedef struct _ADDR_PRT_INFO_INPUT
2198 {
2199 AddrFormat format; ///< Surface format
2200 UINT_32 baseMipWidth; ///< Base mipmap width
2201 UINT_32 baseMipHeight; ///< Base mipmap height
2202 UINT_32 baseMipDepth; ///< Base mipmap depth
2203 UINT_32 numFrags; ///< Number of fragments,
2204 } ADDR_PRT_INFO_INPUT;
2205
2206 /**
2207 ****************************************************************************************************
2208 * ADDR_PRT_INFO_OUTPUT
2209 *
2210 * @brief
2211 * Input structure for AddrComputePrtInfo
2212 ****************************************************************************************************
2213 */
2214 typedef struct _ADDR_PRT_INFO_OUTPUT
2215 {
2216 UINT_32 prtTileWidth;
2217 UINT_32 prtTileHeight;
2218 } ADDR_PRT_INFO_OUTPUT;
2219
2220 /**
2221 ****************************************************************************************************
2222 * AddrComputePrtInfo
2223 *
2224 * @brief
2225 * Compute prt surface related information
2226 ****************************************************************************************************
2227 */
2228 ADDR_E_RETURNCODE ADDR_API AddrComputePrtInfo(
2229 ADDR_HANDLE hLib,
2230 const ADDR_PRT_INFO_INPUT* pIn,
2231 ADDR_PRT_INFO_OUTPUT* pOut);
2232
2233 ////////////////////////////////////////////////////////////////////////////////////////////////////
2234 // DCC key functions
2235 ////////////////////////////////////////////////////////////////////////////////////////////////////
2236
2237 /**
2238 ****************************************************************************************************
2239 * _ADDR_COMPUTE_DCCINFO_INPUT
2240 *
2241 * @brief
2242 * Input structure of AddrComputeDccInfo
2243 ****************************************************************************************************
2244 */
2245 typedef struct _ADDR_COMPUTE_DCCINFO_INPUT
2246 {
2247 UINT_32 size; ///< Size of this structure in bytes
2248 UINT_32 bpp; ///< BitPP of color surface
2249 UINT_32 numSamples; ///< Sample number of color surface
2250 UINT_64 colorSurfSize; ///< Size of color surface to which dcc key is bound
2251 AddrTileMode tileMode; ///< Tile mode of color surface
2252 ADDR_TILEINFO tileInfo; ///< Tile info of color surface
2253 UINT_32 tileSwizzle; ///< Tile swizzle
2254 INT_32 tileIndex; ///< Tile index of color surface,
2255 ///< MUST be -1 if you don't want to use it
2256 ///< while the global useTileIndex is set to 1
2257 INT_32 macroModeIndex; ///< Index in macro tile mode table if there is one (CI)
2258 ///< README: When tileIndex is not -1, this must be valid
2259 } ADDR_COMPUTE_DCCINFO_INPUT;
2260
2261 /**
2262 ****************************************************************************************************
2263 * ADDR_COMPUTE_DCCINFO_OUTPUT
2264 *
2265 * @brief
2266 * Output structure of AddrComputeDccInfo
2267 ****************************************************************************************************
2268 */
2269 typedef struct _ADDR_COMPUTE_DCCINFO_OUTPUT
2270 {
2271 UINT_32 size; ///< Size of this structure in bytes
2272 UINT_64 dccRamBaseAlign; ///< Base alignment of dcc key
2273 UINT_64 dccRamSize; ///< Size of dcc key
2274 UINT_64 dccFastClearSize; ///< Size of dcc key portion that can be fast cleared
2275 BOOL_32 subLvlCompressible; ///< Whether sub resource is compressiable
2276 BOOL_32 dccRamSizeAligned; ///< Whether the dcc key size is aligned
2277 } ADDR_COMPUTE_DCCINFO_OUTPUT;
2278
2279 /**
2280 ****************************************************************************************************
2281 * AddrComputeDccInfo
2282 *
2283 * @brief
2284 * Compute DCC key size, base alignment
2285 * info
2286 ****************************************************************************************************
2287 */
2288 ADDR_E_RETURNCODE ADDR_API AddrComputeDccInfo(
2289 ADDR_HANDLE hLib,
2290 const ADDR_COMPUTE_DCCINFO_INPUT* pIn,
2291 ADDR_COMPUTE_DCCINFO_OUTPUT* pOut);
2292
2293 /**
2294 ****************************************************************************************************
2295 * ADDR_GET_MAX_ALINGMENTS_OUTPUT
2296 *
2297 * @brief
2298 * Output structure of AddrGetMaxAlignments
2299 ****************************************************************************************************
2300 */
2301 typedef struct _ADDR_GET_MAX_ALINGMENTS_OUTPUT
2302 {
2303 UINT_32 size; ///< Size of this structure in bytes
2304 UINT_64 baseAlign; ///< Maximum base alignment in bytes
2305 } ADDR_GET_MAX_ALINGMENTS_OUTPUT;
2306
2307 /**
2308 ****************************************************************************************************
2309 * AddrGetMaxAlignments
2310 *
2311 * @brief
2312 * Gets maximnum alignments
2313 ****************************************************************************************************
2314 */
2315 ADDR_E_RETURNCODE ADDR_API AddrGetMaxAlignments(
2316 ADDR_HANDLE hLib,
2317 ADDR_GET_MAX_ALINGMENTS_OUTPUT* pOut);
2318
2319 #if defined(__cplusplus)
2320 }
2321 #endif
2322
2323 #endif // __ADDR_INTERFACE_H__
2324
2325