src/amd/addrlib/addrinterface.h

   1 /*
   2  * Copyright © 2014 Advanced Micro Devices, Inc.
   3  * All Rights Reserved.
   4  *
   5  * Permission is hereby granted, free of charge, to any person obtaining
   6  * a copy of this software and associated documentation files (the
   7  * "Software"), to deal in the Software without restriction, including
   8  * without limitation the rights to use, copy, modify, merge, publish,
   9  * distribute, sub license, and/or sell copies of the Software, and to
  10  * permit persons to whom the Software is furnished to do so, subject to
  11  * the following conditions:
  12  *
  13  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  14  * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
  15  * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  16  * NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS, AUTHORS
  17  * AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  18  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
  19  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
  20  * USE OR OTHER DEALINGS IN THE SOFTWARE.
  21  *
  22  * The above copyright notice and this permission notice (including the
  23  * next paragraph) shall be included in all copies or substantial portions
  24  * of the Software.
  25  */
  26
  27 /**
  28 ****************************************************************************************************
  29 * @file  addrinterface.h
  30 * @brief Contains the addrlib interfaces declaration and parameter defines
  31 ****************************************************************************************************
  32 */
  33 #ifndef __ADDR_INTERFACE_H__
  34 #define __ADDR_INTERFACE_H__
  35
  36 #include "addrtypes.h"
  37
  38 #if defined(__cplusplus)
  39 extern "C"
  40 {
  41 #endif
  42
  43 #define ADDRLIB_VERSION_MAJOR 6
  44 #define ADDRLIB_VERSION_MINOR 2
  45 #define ADDRLIB_VERSION ((ADDRLIB_VERSION_MAJOR << 16) | ADDRLIB_VERSION_MINOR)
  46
  47 /// Virtually all interface functions need ADDR_HANDLE as first parameter
  48 typedef VOID*   ADDR_HANDLE;
  49
  50 /// Client handle used in callbacks
  51 typedef VOID*   ADDR_CLIENT_HANDLE;
  52
  53 /**
  54 * /////////////////////////////////////////////////////////////////////////////////////////////////
  55 * //                                  Callback functions
  56 * /////////////////////////////////////////////////////////////////////////////////////////////////
  57 *    typedef VOID* (ADDR_API* ADDR_ALLOCSYSMEM)(
  58 *         const ADDR_ALLOCSYSMEM_INPUT* pInput);
  59 *    typedef ADDR_E_RETURNCODE (ADDR_API* ADDR_FREESYSMEM)(
  60 *         VOID* pVirtAddr);
  61 *    typedef ADDR_E_RETURNCODE (ADDR_API* ADDR_DEBUGPRINT)(
  62 *         const ADDR_DEBUGPRINT_INPUT* pInput);
  63 *
  64 * /////////////////////////////////////////////////////////////////////////////////////////////////
  65 * //                               Create/Destroy/Config functions
  66 * /////////////////////////////////////////////////////////////////////////////////////////////////
  67 *     AddrCreate()
  68 *     AddrDestroy()
  69 *
  70 * /////////////////////////////////////////////////////////////////////////////////////////////////
  71 * //                                  Surface functions
  72 * /////////////////////////////////////////////////////////////////////////////////////////////////
  73 *     AddrComputeSurfaceInfo()
  74 *     AddrComputeSurfaceAddrFromCoord()
  75 *     AddrComputeSurfaceCoordFromAddr()
  76 *
  77 * /////////////////////////////////////////////////////////////////////////////////////////////////
  78 * //                                   HTile functions
  79 * /////////////////////////////////////////////////////////////////////////////////////////////////
  80 *     AddrComputeHtileInfo()
  81 *     AddrComputeHtileAddrFromCoord()
  82 *     AddrComputeHtileCoordFromAddr()
  83 *
  84 * /////////////////////////////////////////////////////////////////////////////////////////////////
  85 * //                                   C-mask functions
  86 * /////////////////////////////////////////////////////////////////////////////////////////////////
  87 *     AddrComputeCmaskInfo()
  88 *     AddrComputeCmaskAddrFromCoord()
  89 *     AddrComputeCmaskCoordFromAddr()
  90 *
  91 * /////////////////////////////////////////////////////////////////////////////////////////////////
  92 * //                                   F-mask functions
  93 * /////////////////////////////////////////////////////////////////////////////////////////////////
  94 *     AddrComputeFmaskInfo()
  95 *     AddrComputeFmaskAddrFromCoord()
  96 *     AddrComputeFmaskCoordFromAddr()
  97 *
  98 * /////////////////////////////////////////////////////////////////////////////////////////////////
  99 * //                               Element/Utility functions
 100 * /////////////////////////////////////////////////////////////////////////////////////////////////
 101 *     ElemFlt32ToDepthPixel()
 102 *     ElemFlt32ToColorPixel()
 103 *     AddrExtractBankPipeSwizzle()
 104 *     AddrCombineBankPipeSwizzle()
 105 *     AddrComputeSliceSwizzle()
 106 *     AddrConvertTileInfoToHW()
 107 *     AddrConvertTileIndex()
 108 *     AddrConvertTileIndex1()
 109 *     AddrGetTileIndex()
 110 *     AddrComputeBaseSwizzle()
 111 *     AddrUseTileIndex()
 112 *     AddrUseCombinedSwizzle()
 113 *
 114 **/
 115
 116 ////////////////////////////////////////////////////////////////////////////////////////////////////
 117 //                                      Callback functions
 118 ////////////////////////////////////////////////////////////////////////////////////////////////////
 119
 120 /**
 121 ****************************************************************************************************
 122 * @brief channel setting structure
 123 ****************************************************************************************************
 124 */
 125 typedef union _ADDR_CHANNEL_SETTING
 126 {
 127     struct
 128     {
 129         UINT_8 valid   : 1;    ///< Indicate whehter this channel setting is valid
 130         UINT_8 channel : 2;    ///< 0 for x channel, 1 for y channel, 2 for z channel
 131         UINT_8 index   : 5;    ///< Channel index
 132     };
 133     UINT_8 value;              ///< Value
 134 } ADDR_CHANNEL_SETTING;
 135
 136 /**
 137 ****************************************************************************************************
 138 * @brief address equation key structure
 139 ****************************************************************************************************
 140 */
 141 typedef union _ADDR_EQUATION_KEY
 142 {
 143     struct
 144     {
 145         UINT_32 log2ElementBytes : 3; ///< Log2 of Bytes per pixel
 146         UINT_32 tileMode         : 5; ///< Tile mode
 147         UINT_32 microTileType    : 3; ///< Micro tile type
 148         UINT_32 pipeConfig       : 5; ///< pipe config
 149         UINT_32 numBanksLog2     : 3; ///< Number of banks log2
 150         UINT_32 bankWidth        : 4; ///< Bank width
 151         UINT_32 bankHeight       : 4; ///< Bank height
 152         UINT_32 macroAspectRatio : 3; ///< Macro tile aspect ratio
 153         UINT_32 prt              : 1; ///< SI only, indicate whether this equation is for prt
 154         UINT_32 reserved         : 1; ///< Reserved bit
 155     } fields;
 156     UINT_32 value;
 157 } ADDR_EQUATION_KEY;
 158
 159 /**
 160 ****************************************************************************************************
 161 * @brief address equation structure
 162 ****************************************************************************************************
 163 */
 164 #define ADDR_MAX_EQUATION_BIT 20u
 165
 166 // Invalid equation index
 167 #define ADDR_INVALID_EQUATION_INDEX 0xFFFFFFFF
 168
 169 typedef struct _ADDR_EQUATION
 170 {
 171     ADDR_CHANNEL_SETTING addr[ADDR_MAX_EQUATION_BIT];  ///< addr setting
 172                                                        ///< each bit is result of addr ^ xor ^ xor2
 173     ADDR_CHANNEL_SETTING xor1[ADDR_MAX_EQUATION_BIT];  ///< xor setting
 174     ADDR_CHANNEL_SETTING xor2[ADDR_MAX_EQUATION_BIT];  ///< xor2 setting
 175     UINT_32              numBits;                      ///< The number of bits in equation
 176     BOOL_32              stackedDepthSlices;           ///< TRUE if depth slices are treated as being
 177                                                        ///< stacked vertically prior to swizzling
 178 } ADDR_EQUATION;
 179
 180
 181 /**
 182 ****************************************************************************************************
 183 * @brief Alloc system memory flags.
 184 * @note These flags are reserved for future use and if flags are added will minimize the impact
 185 *       of the client.
 186 ****************************************************************************************************
 187 */
 188 typedef union _ADDR_ALLOCSYSMEM_FLAGS
 189 {
 190     struct
 191     {
 192         UINT_32 reserved    : 32;  ///< Reserved for future use.
 193     } fields;
 194     UINT_32 value;
 195
 196 } ADDR_ALLOCSYSMEM_FLAGS;
 197
 198 /**
 199 ****************************************************************************************************
 200 * @brief Alloc system memory input structure
 201 ****************************************************************************************************
 202 */
 203 typedef struct _ADDR_ALLOCSYSMEM_INPUT
 204 {
 205     UINT_32                 size;           ///< Size of this structure in bytes
 206
 207     ADDR_ALLOCSYSMEM_FLAGS  flags;          ///< System memory flags.
 208     UINT_32                 sizeInBytes;    ///< System memory allocation size in bytes.
 209     ADDR_CLIENT_HANDLE      hClient;        ///< Client handle
 210 } ADDR_ALLOCSYSMEM_INPUT;
 211
 212 /**
 213 ****************************************************************************************************
 214 * ADDR_ALLOCSYSMEM
 215 *   @brief
 216 *       Allocate system memory callback function. Returns valid pointer on success.
 217 ****************************************************************************************************
 218 */
 219 typedef VOID* (ADDR_API* ADDR_ALLOCSYSMEM)(
 220     const ADDR_ALLOCSYSMEM_INPUT* pInput);
 221
 222 /**
 223 ****************************************************************************************************
 224 * @brief Free system memory input structure
 225 ****************************************************************************************************
 226 */
 227 typedef struct _ADDR_FREESYSMEM_INPUT
 228 {
 229     UINT_32                 size;           ///< Size of this structure in bytes
 230
 231     VOID*                   pVirtAddr;      ///< Virtual address
 232     ADDR_CLIENT_HANDLE      hClient;        ///< Client handle
 233 } ADDR_FREESYSMEM_INPUT;
 234
 235 /**
 236 ****************************************************************************************************
 237 * ADDR_FREESYSMEM
 238 *   @brief
 239 *       Free system memory callback function.
 240 *       Returns ADDR_OK on success.
 241 ****************************************************************************************************
 242 */
 243 typedef ADDR_E_RETURNCODE (ADDR_API* ADDR_FREESYSMEM)(
 244     const ADDR_FREESYSMEM_INPUT* pInput);
 245
 246 /**
 247 ****************************************************************************************************
 248 * @brief Print debug message input structure
 249 ****************************************************************************************************
 250 */
 251 typedef struct _ADDR_DEBUGPRINT_INPUT
 252 {
 253     UINT_32             size;           ///< Size of this structure in bytes
 254
 255     CHAR*               pDebugString;   ///< Debug print string
 256     va_list             ap;             ///< Variable argument list
 257     ADDR_CLIENT_HANDLE  hClient;        ///< Client handle
 258 } ADDR_DEBUGPRINT_INPUT;
 259
 260 /**
 261 ****************************************************************************************************
 262 * ADDR_DEBUGPRINT
 263 *   @brief
 264 *       Print debug message callback function.
 265 *       Returns ADDR_OK on success.
 266 ****************************************************************************************************
 267 */
 268 typedef ADDR_E_RETURNCODE (ADDR_API* ADDR_DEBUGPRINT)(
 269     const ADDR_DEBUGPRINT_INPUT* pInput);
 270
 271 /**
 272 ****************************************************************************************************
 273 * ADDR_CALLBACKS
 274 *
 275 *   @brief
 276 *       Address Library needs client to provide system memory alloc/free routines.
 277 ****************************************************************************************************
 278 */
 279 typedef struct _ADDR_CALLBACKS
 280 {
 281     ADDR_ALLOCSYSMEM allocSysMem;   ///< Routine to allocate system memory
 282     ADDR_FREESYSMEM  freeSysMem;    ///< Routine to free system memory
 283     ADDR_DEBUGPRINT  debugPrint;    ///< Routine to print debug message
 284 } ADDR_CALLBACKS;
 285
 286 ////////////////////////////////////////////////////////////////////////////////////////////////////
 287 //                               Create/Destroy functions
 288 ////////////////////////////////////////////////////////////////////////////////////////////////////
 289
 290 /**
 291 ****************************************************************************************************
 292 * ADDR_CREATE_FLAGS
 293 *
 294 *   @brief
 295 *       This structure is used to pass some setup in creation of AddrLib
 296 *   @note
 297 ****************************************************************************************************
 298 */
 299 typedef union _ADDR_CREATE_FLAGS
 300 {
 301     struct
 302     {
 303         UINT_32 noCubeMipSlicesPad     : 1;    ///< Turn cubemap faces padding off
 304         UINT_32 fillSizeFields         : 1;    ///< If clients fill size fields in all input and
 305                                                ///  output structure
 306         UINT_32 useTileIndex           : 1;    ///< Make tileIndex field in input valid
 307         UINT_32 useCombinedSwizzle     : 1;    ///< Use combined tile swizzle
 308         UINT_32 checkLast2DLevel       : 1;    ///< Check the last 2D mip sub level
 309         UINT_32 useHtileSliceAlign     : 1;    ///< Do htile single slice alignment
 310         UINT_32 allowLargeThickTile    : 1;    ///< Allow 64*thickness*bytesPerPixel > rowSize
 311         UINT_32 reserved               : 25;   ///< Reserved bits for future use
 312     };
 313
 314     UINT_32 value;
 315 } ADDR_CREATE_FLAGS;
 316
 317 /**
 318 ****************************************************************************************************
 319 *   ADDR_REGISTER_VALUE
 320 *
 321 *   @brief
 322 *       Data from registers to setup AddrLib global data, used in AddrCreate
 323 ****************************************************************************************************
 324 */
 325 typedef struct _ADDR_REGISTER_VALUE
 326 {
 327     UINT_32  gbAddrConfig;       ///< For R8xx, use GB_ADDR_CONFIG register value.
 328                                  ///  For R6xx/R7xx, use GB_TILING_CONFIG.
 329                                  ///  But they can be treated as the same.
 330                                  ///  if this value is 0, use chip to set default value
 331     UINT_32  backendDisables;    ///< 1 bit per backend, starting with LSB. 1=disabled,0=enabled.
 332                                  ///  Register value of CC_RB_BACKEND_DISABLE.BACKEND_DISABLE
 333
 334                                  ///  R800 registers-----------------------------------------------
 335     UINT_32  noOfBanks;          ///< Number of h/w ram banks - For r800: MC_ARB_RAMCFG.NOOFBANK
 336                                  ///  No enums for this value in h/w header files
 337                                  ///  0: 4
 338                                  ///  1: 8
 339                                  ///  2: 16
 340     UINT_32  noOfRanks;          ///  MC_ARB_RAMCFG.NOOFRANK
 341                                  ///  0: 1
 342                                  ///  1: 2
 343                                  ///  SI (R1000) registers-----------------------------------------
 344     const UINT_32* pTileConfig;  ///< Global tile setting tables
 345     UINT_32  noOfEntries;        ///< Number of entries in pTileConfig
 346
 347                                  ///< CI registers-------------------------------------------------
 348     const UINT_32* pMacroTileConfig;    ///< Global macro tile mode table
 349     UINT_32  noOfMacroEntries;   ///< Number of entries in pMacroTileConfig
 350
 351                                  ///< GFX9 HW parameters
 352     UINT_32  blockVarSizeLog2;   ///< SW_VAR_* block size
 353 } ADDR_REGISTER_VALUE;
 354
 355 /**
 356 ****************************************************************************************************
 357 * ADDR_CREATE_INPUT
 358 *
 359 *   @brief
 360 *       Parameters use to create an AddrLib Object. Caller must provide all fields.
 361 *
 362 ****************************************************************************************************
 363 */
 364 typedef struct _ADDR_CREATE_INPUT
 365 {
 366     UINT_32             size;                ///< Size of this structure in bytes
 367
 368     UINT_32             chipEngine;          ///< Chip Engine
 369     UINT_32             chipFamily;          ///< Chip Family
 370     UINT_32             chipRevision;        ///< Chip Revision
 371     ADDR_CALLBACKS      callbacks;           ///< Callbacks for sysmem alloc/free/print
 372     ADDR_CREATE_FLAGS   createFlags;         ///< Flags to setup AddrLib
 373     ADDR_REGISTER_VALUE regValue;            ///< Data from registers to setup AddrLib global data
 374     ADDR_CLIENT_HANDLE  hClient;             ///< Client handle
 375     UINT_32             minPitchAlignPixels; ///< Minimum pitch alignment in pixels
 376 } ADDR_CREATE_INPUT;
 377
 378 /**
 379 ****************************************************************************************************
 380 * ADDR_CREATEINFO_OUTPUT
 381 *
 382 *   @brief
 383 *       Return AddrLib handle to client driver
 384 *
 385 ****************************************************************************************************
 386 */
 387 typedef struct _ADDR_CREATE_OUTPUT
 388 {
 389     UINT_32              size;            ///< Size of this structure in bytes
 390
 391     ADDR_HANDLE          hLib;            ///< Address lib handle
 392
 393     UINT_32              numEquations;    ///< Number of equations in the table
 394     const ADDR_EQUATION* pEquationTable;  ///< Pointer to the equation table
 395 } ADDR_CREATE_OUTPUT;
 396
 397 /**
 398 ****************************************************************************************************
 399 *   AddrCreate
 400 *
 401 *   @brief
 402 *       Create AddrLib object, must be called before any interface calls
 403 *
 404 *   @return
 405 *       ADDR_OK if successful
 406 ****************************************************************************************************
 407 */
 408 ADDR_E_RETURNCODE ADDR_API AddrCreate(
 409     const ADDR_CREATE_INPUT*    pAddrCreateIn,
 410     ADDR_CREATE_OUTPUT*         pAddrCreateOut);
 411
 412
 413
 414 /**
 415 ****************************************************************************************************
 416 *   AddrDestroy
 417 *
 418 *   @brief
 419 *       Destroy AddrLib object, must be called to free internally allocated resources.
 420 *
 421 *   @return
 422 *      ADDR_OK if successful
 423 ****************************************************************************************************
 424 */
 425 ADDR_E_RETURNCODE ADDR_API AddrDestroy(
 426     ADDR_HANDLE hLib);
 427
 428
 429
 430 ////////////////////////////////////////////////////////////////////////////////////////////////////
 431 //                                    Surface functions
 432 ////////////////////////////////////////////////////////////////////////////////////////////////////
 433
 434 /**
 435 ****************************************************************************************************
 436 * @brief
 437 *       Bank/tiling parameters. On function input, these can be set as desired or
 438 *       left 0 for AddrLib to calculate/default. On function output, these are the actual
 439 *       parameters used.
 440 * @note
 441 *       Valid bankWidth/bankHeight value:
 442 *       1,2,4,8. They are factors instead of pixels or bytes.
 443 *
 444 *       The bank number remains constant across each row of the
 445 *       macro tile as each pipe is selected, so the number of
 446 *       tiles in the x direction with the same bank number will
 447 *       be bank_width * num_pipes.
 448 ****************************************************************************************************
 449 */
 450 typedef struct _ADDR_TILEINFO
 451 {
 452     ///  Any of these parameters can be set to 0 to use the HW default.
 453     UINT_32     banks;              ///< Number of banks, numerical value
 454     UINT_32     bankWidth;          ///< Number of tiles in the X direction in the same bank
 455     UINT_32     bankHeight;         ///< Number of tiles in the Y direction in the same bank
 456     UINT_32     macroAspectRatio;   ///< Macro tile aspect ratio. 1-1:1, 2-4:1, 4-16:1, 8-64:1
 457     UINT_32     tileSplitBytes;     ///< Tile split size, in bytes
 458     AddrPipeCfg pipeConfig;         ///< Pipe Config = HW enum + 1
 459 } ADDR_TILEINFO;
 460
 461 // Create a define to avoid client change. The removal of R800 is because we plan to implement SI
 462 // within 800 HWL - An AddrPipeCfg is added in above data structure
 463 typedef ADDR_TILEINFO ADDR_R800_TILEINFO;
 464
 465 /**
 466 ****************************************************************************************************
 467 * @brief
 468 *       Information needed by quad buffer stereo support
 469 ****************************************************************************************************
 470 */
 471 typedef struct _ADDR_QBSTEREOINFO
 472 {
 473     UINT_32         eyeHeight;          ///< Height (in pixel rows) to right eye
 474     UINT_32         rightOffset;        ///< Offset (in bytes) to right eye
 475     UINT_32         rightSwizzle;       ///< TileSwizzle for right eyes
 476 } ADDR_QBSTEREOINFO;
 477
 478 /**
 479 ****************************************************************************************************
 480 *   ADDR_SURFACE_FLAGS
 481 *
 482 *   @brief
 483 *       Surface flags
 484 ****************************************************************************************************
 485 */
 486 typedef union _ADDR_SURFACE_FLAGS
 487 {
 488     struct
 489     {
 490         UINT_32 color                : 1; ///< Flag indicates this is a color buffer
 491         UINT_32 depth                : 1; ///< Flag indicates this is a depth/stencil buffer
 492         UINT_32 stencil              : 1; ///< Flag indicates this is a stencil buffer
 493         UINT_32 texture              : 1; ///< Flag indicates this is a texture
 494         UINT_32 cube                 : 1; ///< Flag indicates this is a cubemap
 495         UINT_32 volume               : 1; ///< Flag indicates this is a volume texture
 496         UINT_32 fmask                : 1; ///< Flag indicates this is an fmask
 497         UINT_32 cubeAsArray          : 1; ///< Flag indicates if treat cubemap as arrays
 498         UINT_32 compressZ            : 1; ///< Flag indicates z buffer is compressed
 499         UINT_32 overlay              : 1; ///< Flag indicates this is an overlay surface
 500         UINT_32 noStencil            : 1; ///< Flag indicates this depth has no separate stencil
 501         UINT_32 display              : 1; ///< Flag indicates this should match display controller req.
 502         UINT_32 opt4Space            : 1; ///< Flag indicates this surface should be optimized for space
 503                                           ///  i.e. save some memory but may lose performance
 504         UINT_32 prt                  : 1; ///< Flag for partially resident texture
 505         UINT_32 qbStereo             : 1; ///< Quad buffer stereo surface
 506         UINT_32 pow2Pad              : 1; ///< SI: Pad to pow2, must set for mipmap (include level0)
 507         UINT_32 interleaved          : 1; ///< Special flag for interleaved YUV surface padding
 508         UINT_32 tcCompatible         : 1; ///< Flag indicates surface needs to be shader readable
 509         UINT_32 dispTileType         : 1; ///< NI: force display Tiling for 128 bit shared resoruce
 510         UINT_32 dccCompatible        : 1; ///< VI: whether to make MSAA surface support dcc fast clear
 511         UINT_32 dccPipeWorkaround    : 1; ///< VI: whether to workaround the HW limit that
 512                                           ///  dcc can't be enabled if pipe config of tile mode
 513                                           ///  is different from that of ASIC, this flag
 514                                           ///  is address lib internal flag, client should ignore it
 515         UINT_32 czDispCompatible     : 1; ///< SI+: CZ family has a HW bug needs special alignment.
 516                                           ///  This flag indicates we need to follow the
 517                                           ///  alignment with CZ families or other ASICs under
 518                                           ///  PX configuration + CZ.
 519         UINT_32 nonSplit             : 1; ///< CI: depth texture should not be split
 520         UINT_32 disableLinearOpt     : 1; ///< Disable tile mode optimization to linear
 521         UINT_32 needEquation         : 1; ///< Make the surface tile setting equation compatible.
 522                                           ///  This flag indicates we need to override tile
 523                                           ///  mode to PRT_* tile mode to disable slice rotation,
 524                                           ///  which is needed by swizzle pattern equation.
 525         UINT_32 skipIndicesOutput    : 1; ///< Skipping indices in output.
 526         UINT_32 rotateDisplay        : 1; ///< Rotate micro tile type
 527         UINT_32 minimizeAlignment    : 1; ///< Minimize alignment
 528         UINT_32 preferEquation       : 1; ///< Return equation index without adjusting tile mode
 529         UINT_32 matchStencilTileCfg  : 1; ///< Select tile index of stencil as well as depth surface
 530                                           ///  to make sure they share same tile config parameters
 531         UINT_32 reserved             : 2; ///< Reserved bits
 532     };
 533
 534     UINT_32 value;
 535 } ADDR_SURFACE_FLAGS;
 536
 537 /**
 538 ****************************************************************************************************
 539 *   ADDR_COMPUTE_SURFACE_INFO_INPUT
 540 *
 541 *   @brief
 542 *       Input structure for AddrComputeSurfaceInfo
 543 ****************************************************************************************************
 544 */
 545 typedef struct _ADDR_COMPUTE_SURFACE_INFO_INPUT
 546 {
 547     UINT_32             size;               ///< Size of this structure in bytes
 548
 549     AddrTileMode        tileMode;           ///< Tile mode
 550     AddrFormat          format;             ///< If format is set to valid one, bpp/width/height
 551                                             ///  might be overwritten
 552     UINT_32             bpp;                ///< Bits per pixel
 553     UINT_32             numSamples;         ///< Number of samples
 554     UINT_32             width;              ///< Width, in pixels
 555     UINT_32             height;             ///< Height, in pixels
 556     UINT_32             numSlices;          ///< Number of surface slices or depth
 557     UINT_32             slice;              ///< Slice index
 558     UINT_32             mipLevel;           ///< Current mipmap level
 559     UINT_32             numMipLevels;       ///< Number of mips in mip chain
 560     ADDR_SURFACE_FLAGS  flags;              ///< Surface type flags
 561     UINT_32             numFrags;           ///< Number of fragments, leave it zero or the same as
 562                                             ///  number of samples for normal AA; Set it to the
 563                                             ///  number of fragments for EQAA
 564     /// r800 and later HWL parameters
 565     // Needed by 2D tiling, for linear and 1D tiling, just keep them 0's
 566     ADDR_TILEINFO*      pTileInfo;          ///< 2D tile parameters. Set to 0 to default/calculate
 567     AddrTileType        tileType;           ///< Micro tiling type, not needed when tileIndex != -1
 568     INT_32              tileIndex;          ///< Tile index, MUST be -1 if you don't want to use it
 569                                             ///  while the global useTileIndex is set to 1
 570     UINT_32             basePitch;          ///< Base level pitch in pixels, 0 means ignored, is a
 571                                             ///  must for mip levels from SI+.
 572                                             ///  Don't use pitch in blocks for compressed formats!
 573     UINT_32             maxBaseAlign;       ///< Max base alignment request from client
 574     UINT_32             pitchAlign;         ///< Pitch alignment request from client
 575     UINT_32             heightAlign;        ///< Height alignment request from client
 576 } ADDR_COMPUTE_SURFACE_INFO_INPUT;
 577
 578 /**
 579 ****************************************************************************************************
 580 *   ADDR_COMPUTE_SURFACE_INFO_OUTPUT
 581 *
 582 *   @brief
 583 *       Output structure for AddrComputeSurfInfo
 584 *   @note
 585         Element: AddrLib unit for computing. e.g. BCn: 4x4 blocks; R32B32B32: 32bit with 3x pitch
 586         Pixel: Original pixel
 587 ****************************************************************************************************
 588 */
 589 typedef struct _ADDR_COMPUTE_SURFACE_INFO_OUTPUT
 590 {
 591     UINT_32         size;           ///< Size of this structure in bytes
 592
 593     UINT_32         pitch;          ///< Pitch in elements (in blocks for compressed formats)
 594     UINT_32         height;         ///< Height in elements (in blocks for compressed formats)
 595     UINT_32         depth;          ///< Number of slice/depth
 596     UINT_64         surfSize;       ///< Surface size in bytes
 597     AddrTileMode    tileMode;       ///< Actual tile mode. May differ from that in input
 598     UINT_32         baseAlign;      ///< Base address alignment
 599     UINT_32         pitchAlign;     ///< Pitch alignment, in elements
 600     UINT_32         heightAlign;    ///< Height alignment, in elements
 601     UINT_32         depthAlign;     ///< Depth alignment, aligned to thickness, for 3d texture
 602     UINT_32         bpp;            ///< Bits per elements (e.g. blocks for BCn, 1/3 for 96bit)
 603     UINT_32         pixelPitch;     ///< Pitch in original pixels
 604     UINT_32         pixelHeight;    ///< Height in original pixels
 605     UINT_32         pixelBits;      ///< Original bits per pixel, passed from input
 606     UINT_64         sliceSize;      ///< Size of slice specified by input's slice
 607                                     ///  The result is controlled by surface flags & createFlags
 608                                     ///  By default this value equals to surfSize for volume
 609     UINT_32         pitchTileMax;   ///< PITCH_TILE_MAX value for h/w register
 610     UINT_32         heightTileMax;  ///< HEIGHT_TILE_MAX value for h/w register
 611     UINT_32         sliceTileMax;   ///< SLICE_TILE_MAX value for h/w register
 612
 613     UINT_32         numSamples;     ///< Pass the effective numSamples processed in this call
 614
 615     /// r800 and later HWL parameters
 616     ADDR_TILEINFO*  pTileInfo;      ///< Tile parameters used. Filled in if 0 on input
 617     AddrTileType    tileType;       ///< Micro tiling type, only valid when tileIndex != -1
 618     INT_32          tileIndex;      ///< Tile index, MAY be "downgraded"
 619
 620     INT_32          macroModeIndex; ///< Index in macro tile mode table if there is one (CI)
 621     /// Output flags
 622     struct
 623     {
 624         /// Special information to work around SI mipmap swizzle bug UBTS #317508
 625         UINT_32     last2DLevel  : 1;  ///< TRUE if this is the last 2D(3D) tiled
 626                                        ///< Only meaningful when create flag checkLast2DLevel is set
 627         UINT_32     tcCompatible : 1;  ///< If the surface can be shader compatible
 628         UINT_32     dccUnsupport : 1;  ///< If the surface can support DCC compressed rendering
 629         UINT_32     prtTileIndex : 1;  ///< SI only, indicate the returned tile index is for PRT
 630                                        ///< If address lib return true for mip 0, client should set prt flag
 631                                        ///< for child mips in subsequent compute surface info calls
 632         UINT_32     reserved     :28;  ///< Reserved bits
 633     };
 634
 635     UINT_32         equationIndex;     ///< Equation index in the equation table;
 636
 637     UINT_32         blockWidth;        ///< Width in element inside one block(1D->Micro, 2D->Macro)
 638     UINT_32         blockHeight;       ///< Height in element inside one block(1D->Micro, 2D->Macro)
 639     UINT_32         blockSlices;       ///< Slice number inside one block(1D->Micro, 2D->Macro)
 640
 641     /// Stereo info
 642     ADDR_QBSTEREOINFO*  pStereoInfo;///< Stereo information, needed when .qbStereo flag is TRUE
 643
 644     INT_32          stencilTileIdx; ///< stencil tile index output when matchStencilTileCfg was set
 645 } ADDR_COMPUTE_SURFACE_INFO_OUTPUT;
 646
 647 /**
 648 ****************************************************************************************************
 649 *   AddrComputeSurfaceInfo
 650 *
 651 *   @brief
 652 *       Compute surface width/height/depth/alignments and suitable tiling mode
 653 ****************************************************************************************************
 654 */
 655 ADDR_E_RETURNCODE ADDR_API AddrComputeSurfaceInfo(
 656     ADDR_HANDLE                             hLib,
 657     const ADDR_COMPUTE_SURFACE_INFO_INPUT*  pIn,
 658     ADDR_COMPUTE_SURFACE_INFO_OUTPUT*       pOut);
 659
 660
 661
 662 /**
 663 ****************************************************************************************************
 664 *   ADDR_COMPUTE_SURFACE_ADDRFROMCOORD_INPUT
 665 *
 666 *   @brief
 667 *       Input structure for AddrComputeSurfaceAddrFromCoord
 668 ****************************************************************************************************
 669 */
 670 typedef struct _ADDR_COMPUTE_SURFACE_ADDRFROMCOORD_INPUT
 671 {
 672     UINT_32         size;               ///< Size of this structure in bytes
 673
 674     UINT_32         x;                  ///< X coordinate
 675     UINT_32         y;                  ///< Y coordinate
 676     UINT_32         slice;              ///< Slice index
 677     UINT_32         sample;             ///< Sample index, use fragment index for EQAA
 678
 679     UINT_32         bpp;                ///< Bits per pixel
 680     UINT_32         pitch;              ///< Surface pitch, in pixels
 681     UINT_32         height;             ///< Surface height, in pixels
 682     UINT_32         numSlices;          ///< Surface depth
 683     UINT_32         numSamples;         ///< Number of samples
 684
 685     AddrTileMode    tileMode;           ///< Tile mode
 686     BOOL_32         isDepth;            ///< TRUE if the surface uses depth sample ordering within
 687                                         ///  micro tile. Textures can also choose depth sample order
 688     UINT_32         tileBase;           ///< Base offset (in bits) inside micro tile which handles
 689                                         ///  the case that components are stored separately
 690     UINT_32         compBits;           ///< The component bits actually needed(for planar surface)
 691
 692     UINT_32         numFrags;           ///< Number of fragments, leave it zero or the same as
 693                                         ///  number of samples for normal AA; Set it to the
 694                                         ///  number of fragments for EQAA
 695     /// r800 and later HWL parameters
 696     // Used for 1D tiling above
 697     AddrTileType    tileType;           ///< See defintion of AddrTileType
 698     struct
 699     {
 700         UINT_32     ignoreSE : 1;       ///< TRUE if shader engines are ignored. This is texture
 701                                         ///  only flag. Only non-RT texture can set this to TRUE
 702         UINT_32     reserved :31;       ///< Reserved for future use.
 703     };
 704     // 2D tiling needs following structure
 705     ADDR_TILEINFO*  pTileInfo;          ///< 2D tile parameters. Client must provide all data
 706     INT_32          tileIndex;          ///< Tile index, MUST be -1 if you don't want to use it
 707                                         ///  while the global useTileIndex is set to 1
 708     union
 709     {
 710         struct
 711         {
 712             UINT_32  bankSwizzle;       ///< Bank swizzle
 713             UINT_32  pipeSwizzle;       ///< Pipe swizzle
 714         };
 715         UINT_32     tileSwizzle;        ///< Combined swizzle, if useCombinedSwizzle is TRUE
 716     };
 717 } ADDR_COMPUTE_SURFACE_ADDRFROMCOORD_INPUT;
 718
 719 /**
 720 ****************************************************************************************************
 721 *   ADDR_COMPUTE_SURFACE_ADDRFROMCOORD_OUTPUT
 722 *
 723 *   @brief
 724 *       Output structure for AddrComputeSurfaceAddrFromCoord
 725 ****************************************************************************************************
 726 */
 727 typedef struct _ADDR_COMPUTE_SURFACE_ADDRFROMCOORD_OUTPUT
 728 {
 729     UINT_32 size;           ///< Size of this structure in bytes
 730
 731     UINT_64 addr;           ///< Byte address
 732     UINT_32 bitPosition;    ///< Bit position within surfaceAddr, 0-7.
 733                             ///  For surface bpp < 8, e.g. FMT_1.
 734     UINT_32 prtBlockIndex;  ///< Index of a PRT tile (64K block)
 735 } ADDR_COMPUTE_SURFACE_ADDRFROMCOORD_OUTPUT;
 736
 737 /**
 738 ****************************************************************************************************
 739 *   AddrComputeSurfaceAddrFromCoord
 740 *
 741 *   @brief
 742 *       Compute surface address from a given coordinate.
 743 ****************************************************************************************************
 744 */
 745 ADDR_E_RETURNCODE ADDR_API AddrComputeSurfaceAddrFromCoord(
 746     ADDR_HANDLE                                     hLib,
 747     const ADDR_COMPUTE_SURFACE_ADDRFROMCOORD_INPUT* pIn,
 748     ADDR_COMPUTE_SURFACE_ADDRFROMCOORD_OUTPUT*      pOut);
 749
 750
 751
 752 /**
 753 ****************************************************************************************************
 754 *   ADDR_COMPUTE_SURFACE_COORDFROMADDR_INPUT
 755 *
 756 *   @brief
 757 *       Input structure for AddrComputeSurfaceCoordFromAddr
 758 ****************************************************************************************************
 759 */
 760 typedef struct _ADDR_COMPUTE_SURFACE_COORDFROMADDR_INPUT
 761 {
 762     UINT_32         size;               ///< Size of this structure in bytes
 763
 764     UINT_64         addr;               ///< Address in bytes
 765     UINT_32         bitPosition;        ///< Bit position in addr. 0-7. for surface bpp < 8,
 766                                         ///  e.g. FMT_1;
 767     UINT_32         bpp;                ///< Bits per pixel
 768     UINT_32         pitch;              ///< Pitch, in pixels
 769     UINT_32         height;             ///< Height in pixels
 770     UINT_32         numSlices;          ///< Surface depth
 771     UINT_32         numSamples;         ///< Number of samples
 772
 773     AddrTileMode    tileMode;           ///< Tile mode
 774     BOOL_32         isDepth;            ///< Surface uses depth sample ordering within micro tile.
 775                                         ///  Note: Textures can choose depth sample order as well.
 776     UINT_32         tileBase;           ///< Base offset (in bits) inside micro tile which handles
 777                                         ///  the case that components are stored separately
 778     UINT_32         compBits;           ///< The component bits actually needed(for planar surface)
 779
 780     UINT_32         numFrags;           ///< Number of fragments, leave it zero or the same as
 781                                         ///  number of samples for normal AA; Set it to the
 782                                         ///  number of fragments for EQAA
 783     /// r800 and later HWL parameters
 784     // Used for 1D tiling above
 785     AddrTileType    tileType;           ///< See defintion of AddrTileType
 786     struct
 787     {
 788         UINT_32     ignoreSE : 1;       ///< TRUE if shader engines are ignored. This is texture
 789                                         ///  only flag. Only non-RT texture can set this to TRUE
 790         UINT_32     reserved :31;       ///< Reserved for future use.
 791     };
 792     // 2D tiling needs following structure
 793     ADDR_TILEINFO*  pTileInfo;          ///< 2D tile parameters. Client must provide all data
 794     INT_32          tileIndex;          ///< Tile index, MUST be -1 if you don't want to use it
 795                                         ///  while the global useTileIndex is set to 1
 796     union
 797     {
 798         struct
 799         {
 800             UINT_32  bankSwizzle;       ///< Bank swizzle
 801             UINT_32  pipeSwizzle;       ///< Pipe swizzle
 802         };
 803         UINT_32     tileSwizzle;        ///< Combined swizzle, if useCombinedSwizzle is TRUE
 804     };
 805 } ADDR_COMPUTE_SURFACE_COORDFROMADDR_INPUT;
 806
 807 /**
 808 ****************************************************************************************************
 809 *   ADDR_COMPUTE_SURFACE_COORDFROMADDR_OUTPUT
 810 *
 811 *   @brief
 812 *       Output structure for AddrComputeSurfaceCoordFromAddr
 813 ****************************************************************************************************
 814 */
 815 typedef struct _ADDR_COMPUTE_SURFACE_COORDFROMADDR_OUTPUT
 816 {
 817     UINT_32 size;   ///< Size of this structure in bytes
 818
 819     UINT_32 x;      ///< X coordinate
 820     UINT_32 y;      ///< Y coordinate
 821     UINT_32 slice;  ///< Index of slices
 822     UINT_32 sample; ///< Index of samples, means fragment index for EQAA
 823 } ADDR_COMPUTE_SURFACE_COORDFROMADDR_OUTPUT;
 824
 825 /**
 826 ****************************************************************************************************
 827 *   AddrComputeSurfaceCoordFromAddr
 828 *
 829 *   @brief
 830 *       Compute coordinate from a given surface address
 831 ****************************************************************************************************
 832 */
 833 ADDR_E_RETURNCODE ADDR_API AddrComputeSurfaceCoordFromAddr(
 834     ADDR_HANDLE                                     hLib,
 835     const ADDR_COMPUTE_SURFACE_COORDFROMADDR_INPUT* pIn,
 836     ADDR_COMPUTE_SURFACE_COORDFROMADDR_OUTPUT*      pOut);
 837
 838 ////////////////////////////////////////////////////////////////////////////////////////////////////
 839 //                                   HTile functions
 840 ////////////////////////////////////////////////////////////////////////////////////////////////////
 841
 842 /**
 843 ****************************************************************************************************
 844 *   ADDR_HTILE_FLAGS
 845 *
 846 *   @brief
 847 *       HTILE flags
 848 ****************************************************************************************************
 849 */
 850 typedef union _ADDR_HTILE_FLAGS
 851 {
 852     struct
 853     {
 854         UINT_32 tcCompatible          : 1;  ///< Flag indicates surface needs to be shader readable
 855         UINT_32 skipTcCompatSizeAlign : 1;  ///< Flag indicates that addrLib will not align htile
 856                                             ///  size to 256xBankxPipe when computing tc-compatible
 857                                             ///  htile info.
 858         UINT_32 reserved              : 30; ///< Reserved bits
 859     };
 860
 861     UINT_32 value;
 862 } ADDR_HTILE_FLAGS;
 863
 864 /**
 865 ****************************************************************************************************
 866 *   ADDR_COMPUTE_HTILE_INFO_INPUT
 867 *
 868 *   @brief
 869 *       Input structure of AddrComputeHtileInfo
 870 ****************************************************************************************************
 871 */
 872 typedef struct _ADDR_COMPUTE_HTILE_INFO_INPUT
 873 {
 874     UINT_32            size;            ///< Size of this structure in bytes
 875
 876     ADDR_HTILE_FLAGS   flags;           ///< HTILE flags
 877     UINT_32            pitch;           ///< Surface pitch, in pixels
 878     UINT_32            height;          ///< Surface height, in pixels
 879     UINT_32            numSlices;       ///< Number of slices
 880     BOOL_32            isLinear;        ///< Linear or tiled HTILE layout
 881     AddrHtileBlockSize blockWidth;      ///< 4 or 8. EG above only support 8
 882     AddrHtileBlockSize blockHeight;     ///< 4 or 8. EG above only support 8
 883     ADDR_TILEINFO*     pTileInfo;       ///< Tile info
 884
 885     INT_32             tileIndex;       ///< Tile index, MUST be -1 if you don't want to use it
 886                                         ///  while the global useTileIndex is set to 1
 887     INT_32             macroModeIndex;  ///< Index in macro tile mode table if there is one (CI)
 888                                         ///< README: When tileIndex is not -1, this must be valid
 889 } ADDR_COMPUTE_HTILE_INFO_INPUT;
 890
 891 /**
 892 ****************************************************************************************************
 893 *   ADDR_COMPUTE_HTILE_INFO_OUTPUT
 894 *
 895 *   @brief
 896 *       Output structure of AddrComputeHtileInfo
 897 ****************************************************************************************************
 898 */
 899 typedef struct _ADDR_COMPUTE_HTILE_INFO_OUTPUT
 900 {
 901     UINT_32 size;               ///< Size of this structure in bytes
 902
 903     UINT_32 pitch;              ///< Pitch in pixels of depth buffer represented in this
 904                                 ///  HTile buffer. This might be larger than original depth
 905                                 ///  buffer pitch when called with an unaligned pitch.
 906     UINT_32 height;             ///< Height in pixels, as above
 907     UINT_64 htileBytes;         ///< Size of HTILE buffer, in bytes
 908     UINT_32 baseAlign;          ///< Base alignment
 909     UINT_32 bpp;                ///< Bits per pixel for HTILE is how many bits for an 8x8 block!
 910     UINT_32 macroWidth;         ///< Macro width in pixels, actually squared cache shape
 911     UINT_32 macroHeight;        ///< Macro height in pixels
 912     UINT_64 sliceSize;          ///< Slice size, in bytes.
 913     BOOL_32 sliceInterleaved;   ///< Flag to indicate if different slice's htile is interleaved
 914                                 ///  Compute engine clear can't be used if htile is interleaved
 915     BOOL_32 nextMipLevelCompressible;   ///< Flag to indicate whether HTILE can be enabled in
 916                                         ///  next mip level, it also indicates if memory set based
 917                                         ///  fast clear can be used for current mip level.
 918 } ADDR_COMPUTE_HTILE_INFO_OUTPUT;
 919
 920 /**
 921 ****************************************************************************************************
 922 *   AddrComputeHtileInfo
 923 *
 924 *   @brief
 925 *       Compute Htile pitch, height, base alignment and size in bytes
 926 ****************************************************************************************************
 927 */
 928 ADDR_E_RETURNCODE ADDR_API AddrComputeHtileInfo(
 929     ADDR_HANDLE                             hLib,
 930     const ADDR_COMPUTE_HTILE_INFO_INPUT*    pIn,
 931     ADDR_COMPUTE_HTILE_INFO_OUTPUT*         pOut);
 932
 933
 934
 935 /**
 936 ****************************************************************************************************
 937 *   ADDR_COMPUTE_HTILE_ADDRFROMCOORD_INPUT
 938 *
 939 *   @brief
 940 *       Input structure for AddrComputeHtileAddrFromCoord
 941 ****************************************************************************************************
 942 */
 943 typedef struct _ADDR_COMPUTE_HTILE_ADDRFROMCOORD_INPUT
 944 {
 945     UINT_32            size;            ///< Size of this structure in bytes
 946
 947     UINT_32            pitch;           ///< Pitch, in pixels
 948     UINT_32            height;          ///< Height in pixels
 949     UINT_32            x;               ///< X coordinate
 950     UINT_32            y;               ///< Y coordinate
 951     UINT_32            slice;           ///< Index of slice
 952     UINT_32            numSlices;       ///< Number of slices
 953     BOOL_32            isLinear;        ///< Linear or tiled HTILE layout
 954     ADDR_HTILE_FLAGS   flags;           ///< htile flags
 955     AddrHtileBlockSize blockWidth;      ///< 4 or 8. 1 means 8, 0 means 4. EG above only support 8
 956     AddrHtileBlockSize blockHeight;     ///< 4 or 8. 1 means 8, 0 means 4. EG above only support 8
 957     ADDR_TILEINFO*     pTileInfo;       ///< Tile info
 958
 959     INT_32             tileIndex;       ///< Tile index, MUST be -1 if you don't want to use it
 960                                         ///  while the global useTileIndex is set to 1
 961     INT_32             macroModeIndex;  ///< Index in macro tile mode table if there is one (CI)
 962                                         ///< README: When tileIndex is not -1, this must be valid
 963     UINT_32            bpp;             ///< depth/stencil buffer bit per pixel size
 964     UINT_32            zStencilAddr;    ///< tcCompatible Z/Stencil surface address
 965 } ADDR_COMPUTE_HTILE_ADDRFROMCOORD_INPUT;
 966
 967 /**
 968 ****************************************************************************************************
 969 *   ADDR_COMPUTE_HTILE_ADDRFROMCOORD_OUTPUT
 970 *
 971 *   @brief
 972 *       Output structure for AddrComputeHtileAddrFromCoord
 973 ****************************************************************************************************
 974 */
 975 typedef struct _ADDR_COMPUTE_HTILE_ADDRFROMCOORD_OUTPUT
 976 {
 977     UINT_32 size;           ///< Size of this structure in bytes
 978
 979     UINT_64 addr;           ///< Address in bytes
 980     UINT_32 bitPosition;    ///< Bit position, 0 or 4. CMASK and HTILE shares some lib method.
 981                             ///  So we keep bitPosition for HTILE as well
 982 } ADDR_COMPUTE_HTILE_ADDRFROMCOORD_OUTPUT;
 983
 984 /**
 985 ****************************************************************************************************
 986 *   AddrComputeHtileAddrFromCoord
 987 *
 988 *   @brief
 989 *       Compute Htile address according to coordinates (of depth buffer)
 990 ****************************************************************************************************
 991 */
 992 ADDR_E_RETURNCODE ADDR_API AddrComputeHtileAddrFromCoord(
 993     ADDR_HANDLE                                     hLib,
 994     const ADDR_COMPUTE_HTILE_ADDRFROMCOORD_INPUT*   pIn,
 995     ADDR_COMPUTE_HTILE_ADDRFROMCOORD_OUTPUT*        pOut);
 996
 997
 998
 999 /**
1000 ****************************************************************************************************
1001 *   ADDR_COMPUTE_HTILE_COORDFROMADDR_INPUT
1002 *
1003 *   @brief
1004 *       Input structure for AddrComputeHtileCoordFromAddr
1005 ****************************************************************************************************
1006 */
1007 typedef struct _ADDR_COMPUTE_HTILE_COORDFROMADDR_INPUT
1008 {
1009     UINT_32            size;            ///< Size of this structure in bytes
1010
1011     UINT_64            addr;            ///< Address
1012     UINT_32            bitPosition;     ///< Bit position 0 or 4. CMASK and HTILE share some methods
1013                                         ///  so we keep bitPosition for HTILE as well
1014     UINT_32            pitch;           ///< Pitch, in pixels
1015     UINT_32            height;          ///< Height, in pixels
1016     UINT_32            numSlices;       ///< Number of slices
1017     BOOL_32            isLinear;        ///< Linear or tiled HTILE layout
1018     AddrHtileBlockSize blockWidth;      ///< 4 or 8. 1 means 8, 0 means 4. R8xx/R9xx only support 8
1019     AddrHtileBlockSize blockHeight;     ///< 4 or 8. 1 means 8, 0 means 4. R8xx/R9xx only support 8
1020     ADDR_TILEINFO*     pTileInfo;       ///< Tile info
1021
1022     INT_32             tileIndex;       ///< Tile index, MUST be -1 if you don't want to use it
1023                                         ///  while the global useTileIndex is set to 1
1024     INT_32             macroModeIndex;  ///< Index in macro tile mode table if there is one (CI)
1025                                         ///< README: When tileIndex is not -1, this must be valid
1026 } ADDR_COMPUTE_HTILE_COORDFROMADDR_INPUT;
1027
1028 /**
1029 ****************************************************************************************************
1030 *   ADDR_COMPUTE_HTILE_COORDFROMADDR_OUTPUT
1031 *
1032 *   @brief
1033 *       Output structure for AddrComputeHtileCoordFromAddr
1034 ****************************************************************************************************
1035 */
1036 typedef struct _ADDR_COMPUTE_HTILE_COORDFROMADDR_OUTPUT
1037 {
1038     UINT_32 size;   ///< Size of this structure in bytes
1039
1040     UINT_32 x;      ///< X coordinate
1041     UINT_32 y;      ///< Y coordinate
1042     UINT_32 slice;  ///< Slice index
1043 } ADDR_COMPUTE_HTILE_COORDFROMADDR_OUTPUT;
1044
1045 /**
1046 ****************************************************************************************************
1047 *   AddrComputeHtileCoordFromAddr
1048 *
1049 *   @brief
1050 *       Compute coordinates within depth buffer (1st pixel of a micro tile) according to
1051 *       Htile address
1052 ****************************************************************************************************
1053 */
1054 ADDR_E_RETURNCODE ADDR_API AddrComputeHtileCoordFromAddr(
1055     ADDR_HANDLE                                     hLib,
1056     const ADDR_COMPUTE_HTILE_COORDFROMADDR_INPUT*   pIn,
1057     ADDR_COMPUTE_HTILE_COORDFROMADDR_OUTPUT*        pOut);
1058
1059
1060
1061 ////////////////////////////////////////////////////////////////////////////////////////////////////
1062 //                                     C-mask functions
1063 ////////////////////////////////////////////////////////////////////////////////////////////////////
1064
1065 /**
1066 ****************************************************************************************************
1067 *   ADDR_CMASK_FLAGS
1068 *
1069 *   @brief
1070 *       CMASK flags
1071 ****************************************************************************************************
1072 */
1073 typedef union _ADDR_CMASK_FLAGS
1074 {
1075     struct
1076     {
1077         UINT_32 tcCompatible  : 1; ///< Flag indicates surface needs to be shader readable
1078         UINT_32 reserved      :31; ///< Reserved bits
1079     };
1080
1081     UINT_32 value;
1082 } ADDR_CMASK_FLAGS;
1083
1084 /**
1085 ****************************************************************************************************
1086 *   ADDR_COMPUTE_CMASK_INFO_INPUT
1087 *
1088 *   @brief
1089 *       Input structure of AddrComputeCmaskInfo
1090 ****************************************************************************************************
1091 */
1092 typedef struct _ADDR_COMPUTE_CMASKINFO_INPUT
1093 {
1094     UINT_32             size;            ///< Size of this structure in bytes
1095
1096     ADDR_CMASK_FLAGS    flags;           ///< CMASK flags
1097     UINT_32             pitch;           ///< Pitch, in pixels, of color buffer
1098     UINT_32             height;          ///< Height, in pixels, of color buffer
1099     UINT_32             numSlices;       ///< Number of slices, of color buffer
1100     BOOL_32             isLinear;        ///< Linear or tiled layout, Only SI can be linear
1101     ADDR_TILEINFO*      pTileInfo;       ///< Tile info
1102
1103     INT_32              tileIndex;       ///< Tile index, MUST be -1 if you don't want to use it
1104                                          ///  while the global useTileIndex is set to 1
1105     INT_32              macroModeIndex;  ///< Index in macro tile mode table if there is one (CI)
1106                                          ///< README: When tileIndex is not -1, this must be valid
1107 } ADDR_COMPUTE_CMASK_INFO_INPUT;
1108
1109 /**
1110 ****************************************************************************************************
1111 *   ADDR_COMPUTE_CMASK_INFO_OUTPUT
1112 *
1113 *   @brief
1114 *       Output structure of AddrComputeCmaskInfo
1115 ****************************************************************************************************
1116 */
1117 typedef struct _ADDR_COMPUTE_CMASK_INFO_OUTPUT
1118 {
1119     UINT_32 size;           ///< Size of this structure in bytes
1120
1121     UINT_32 pitch;          ///< Pitch in pixels of color buffer which
1122                             ///  this Cmask matches. The size might be larger than
1123                             ///  original color buffer pitch when called with
1124                             ///  an unaligned pitch.
1125     UINT_32 height;         ///< Height in pixels, as above
1126     UINT_64 cmaskBytes;     ///< Size in bytes of CMask buffer
1127     UINT_32 baseAlign;      ///< Base alignment
1128     UINT_32 blockMax;       ///< Cmask block size. Need this to set CB_COLORn_MASK register
1129     UINT_32 macroWidth;     ///< Macro width in pixels, actually squared cache shape
1130     UINT_32 macroHeight;    ///< Macro height in pixels
1131     UINT_64 sliceSize;      ///< Slice size, in bytes.
1132 } ADDR_COMPUTE_CMASK_INFO_OUTPUT;
1133
1134 /**
1135 ****************************************************************************************************
1136 *   AddrComputeCmaskInfo
1137 *
1138 *   @brief
1139 *       Compute Cmask pitch, height, base alignment and size in bytes from color buffer
1140 *       info
1141 ****************************************************************************************************
1142 */
1143 ADDR_E_RETURNCODE ADDR_API AddrComputeCmaskInfo(
1144     ADDR_HANDLE                             hLib,
1145     const ADDR_COMPUTE_CMASK_INFO_INPUT*    pIn,
1146     ADDR_COMPUTE_CMASK_INFO_OUTPUT*         pOut);
1147
1148
1149
1150 /**
1151 ****************************************************************************************************
1152 *   ADDR_COMPUTE_CMASK_ADDRFROMCOORD_INPUT
1153 *
1154 *   @brief
1155 *       Input structure for AddrComputeCmaskAddrFromCoord
1156 *
1157 ****************************************************************************************************
1158 */
1159 typedef struct _ADDR_COMPUTE_CMASK_ADDRFROMCOORD_INPUT
1160 {
1161     UINT_32          size;           ///< Size of this structure in bytes
1162     UINT_32          x;              ///< X coordinate
1163     UINT_32          y;              ///< Y coordinate
1164     UINT_64          fmaskAddr;      ///< Fmask addr for tc compatible Cmask
1165     UINT_32          slice;          ///< Slice index
1166     UINT_32          pitch;          ///< Pitch in pixels, of color buffer
1167     UINT_32          height;         ///< Height in pixels, of color buffer
1168     UINT_32          numSlices;      ///< Number of slices
1169     UINT_32          bpp;
1170     BOOL_32          isLinear;       ///< Linear or tiled layout, Only SI can be linear
1171     ADDR_CMASK_FLAGS flags;          ///< CMASK flags
1172     ADDR_TILEINFO*   pTileInfo;      ///< Tile info
1173
1174     INT_32           tileIndex;      ///< Tile index, MUST be -1 if you don't want to use it
1175                                      ///< while the global useTileIndex is set to 1
1176     INT_32           macroModeIndex; ///< Index in macro tile mode table if there is one (CI)
1177                                      ///< README: When tileIndex is not -1, this must be valid
1178 } ADDR_COMPUTE_CMASK_ADDRFROMCOORD_INPUT;
1179
1180 /**
1181 ****************************************************************************************************
1182 *   ADDR_COMPUTE_CMASK_ADDRFROMCOORD_OUTPUT
1183 *
1184 *   @brief
1185 *       Output structure for AddrComputeCmaskAddrFromCoord
1186 ****************************************************************************************************
1187 */
1188 typedef struct _ADDR_COMPUTE_CMASK_ADDRFROMCOORD_OUTPUT
1189 {
1190     UINT_32 size;           ///< Size of this structure in bytes
1191
1192     UINT_64 addr;           ///< CMASK address in bytes
1193     UINT_32 bitPosition;    ///< Bit position within addr, 0-7. CMASK is 4 bpp,
1194                             ///  so the address may be located in bit 0 (0) or 4 (4)
1195 } ADDR_COMPUTE_CMASK_ADDRFROMCOORD_OUTPUT;
1196
1197 /**
1198 ****************************************************************************************************
1199 *   AddrComputeCmaskAddrFromCoord
1200 *
1201 *   @brief
1202 *       Compute Cmask address according to coordinates (of MSAA color buffer)
1203 ****************************************************************************************************
1204 */
1205 ADDR_E_RETURNCODE ADDR_API AddrComputeCmaskAddrFromCoord(
1206     ADDR_HANDLE                                     hLib,
1207     const ADDR_COMPUTE_CMASK_ADDRFROMCOORD_INPUT*   pIn,
1208     ADDR_COMPUTE_CMASK_ADDRFROMCOORD_OUTPUT*        pOut);
1209
1210
1211
1212 /**
1213 ****************************************************************************************************
1214 *   ADDR_COMPUTE_CMASK_COORDFROMADDR_INPUT
1215 *
1216 *   @brief
1217 *       Input structure for AddrComputeCmaskCoordFromAddr
1218 ****************************************************************************************************
1219 */
1220 typedef struct _ADDR_COMPUTE_CMASK_COORDFROMADDR_INPUT
1221 {
1222     UINT_32        size;            ///< Size of this structure in bytes
1223
1224     UINT_64        addr;            ///< CMASK address in bytes
1225     UINT_32        bitPosition;     ///< Bit position within addr, 0-7. CMASK is 4 bpp,
1226                                     ///  so the address may be located in bit 0 (0) or 4 (4)
1227     UINT_32        pitch;           ///< Pitch, in pixels
1228     UINT_32        height;          ///< Height in pixels
1229     UINT_32        numSlices;       ///< Number of slices
1230     BOOL_32        isLinear;        ///< Linear or tiled layout, Only SI can be linear
1231     ADDR_TILEINFO* pTileInfo;       ///< Tile info
1232
1233     INT_32         tileIndex;       ///< Tile index, MUST be -1 if you don't want to use it
1234                                     ///  while the global useTileIndex is set to 1
1235     INT_32         macroModeIndex;  ///< Index in macro tile mode table if there is one (CI)
1236                                     ///< README: When tileIndex is not -1, this must be valid
1237 } ADDR_COMPUTE_CMASK_COORDFROMADDR_INPUT;
1238
1239 /**
1240 ****************************************************************************************************
1241 *   ADDR_COMPUTE_CMASK_COORDFROMADDR_OUTPUT
1242 *
1243 *   @brief
1244 *       Output structure for AddrComputeCmaskCoordFromAddr
1245 ****************************************************************************************************
1246 */
1247 typedef struct _ADDR_COMPUTE_CMASK_COORDFROMADDR_OUTPUT
1248 {
1249     UINT_32 size;   ///< Size of this structure in bytes
1250
1251     UINT_32 x;      ///< X coordinate
1252     UINT_32 y;      ///< Y coordinate
1253     UINT_32 slice;  ///< Slice index
1254 } ADDR_COMPUTE_CMASK_COORDFROMADDR_OUTPUT;
1255
1256 /**
1257 ****************************************************************************************************
1258 *   AddrComputeCmaskCoordFromAddr
1259 *
1260 *   @brief
1261 *       Compute coordinates within color buffer (1st pixel of a micro tile) according to
1262 *       Cmask address
1263 ****************************************************************************************************
1264 */
1265 ADDR_E_RETURNCODE ADDR_API AddrComputeCmaskCoordFromAddr(
1266     ADDR_HANDLE                                     hLib,
1267     const ADDR_COMPUTE_CMASK_COORDFROMADDR_INPUT*   pIn,
1268     ADDR_COMPUTE_CMASK_COORDFROMADDR_OUTPUT*        pOut);
1269
1270
1271
1272 ////////////////////////////////////////////////////////////////////////////////////////////////////
1273 //                                     F-mask functions
1274 ////////////////////////////////////////////////////////////////////////////////////////////////////
1275
1276 /**
1277 ****************************************************************************************************
1278 *   ADDR_COMPUTE_FMASK_INFO_INPUT
1279 *
1280 *   @brief
1281 *       Input structure for AddrComputeFmaskInfo
1282 ****************************************************************************************************
1283 */
1284 typedef struct _ADDR_COMPUTE_FMASK_INFO_INPUT
1285 {
1286     UINT_32         size;               ///< Size of this structure in bytes
1287
1288     AddrTileMode    tileMode;           ///< Tile mode
1289     UINT_32         pitch;              ///< Surface pitch, in pixels
1290     UINT_32         height;             ///< Surface height, in pixels
1291     UINT_32         numSlices;          ///< Number of slice/depth
1292     UINT_32         numSamples;         ///< Number of samples
1293     UINT_32         numFrags;           ///< Number of fragments, leave it zero or the same as
1294                                         ///  number of samples for normal AA; Set it to the
1295                                         ///  number of fragments for EQAA
1296     /// r800 and later HWL parameters
1297     struct
1298     {
1299         UINT_32 resolved:   1;          ///< TRUE if the surface is for resolved fmask, only used
1300                                         ///  by H/W clients. S/W should always set it to FALSE.
1301         UINT_32 reserved:  31;          ///< Reserved for future use.
1302     };
1303     ADDR_TILEINFO*  pTileInfo;          ///< 2D tiling parameters. Clients must give valid data
1304     INT_32          tileIndex;          ///< Tile index, MUST be -1 if you don't want to use it
1305                                         ///  while the global useTileIndex is set to 1
1306 } ADDR_COMPUTE_FMASK_INFO_INPUT;
1307
1308 /**
1309 ****************************************************************************************************
1310 *   ADDR_COMPUTE_FMASK_INFO_OUTPUT
1311 *
1312 *   @brief
1313 *       Output structure for AddrComputeFmaskInfo
1314 ****************************************************************************************************
1315 */
1316 typedef struct _ADDR_COMPUTE_FMASK_INFO_OUTPUT
1317 {
1318     UINT_32         size;           ///< Size of this structure in bytes
1319
1320     UINT_32         pitch;          ///< Pitch of fmask in pixels
1321     UINT_32         height;         ///< Height of fmask in pixels
1322     UINT_32         numSlices;      ///< Slices of fmask
1323     UINT_64         fmaskBytes;     ///< Size of fmask in bytes
1324     UINT_32         baseAlign;      ///< Base address alignment
1325     UINT_32         pitchAlign;     ///< Pitch alignment
1326     UINT_32         heightAlign;    ///< Height alignment
1327     UINT_32         bpp;            ///< Bits per pixel of FMASK is: number of bit planes
1328     UINT_32         numSamples;     ///< Number of samples, used for dump, export this since input
1329                                     ///  may be changed in 9xx and above
1330     /// r800 and later HWL parameters
1331     ADDR_TILEINFO*  pTileInfo;      ///< Tile parameters used. Fmask can have different
1332                                     ///  bank_height from color buffer
1333     INT_32          tileIndex;      ///< Tile index, MUST be -1 if you don't want to use it
1334                                     ///  while the global useTileIndex is set to 1
1335     INT_32          macroModeIndex; ///< Index in macro tile mode table if there is one (CI)
1336     UINT_64         sliceSize;      ///< Size of slice in bytes
1337 } ADDR_COMPUTE_FMASK_INFO_OUTPUT;
1338
1339 /**
1340 ****************************************************************************************************
1341 *   AddrComputeFmaskInfo
1342 *
1343 *   @brief
1344 *       Compute Fmask pitch/height/depth/alignments and size in bytes
1345 ****************************************************************************************************
1346 */
1347 ADDR_E_RETURNCODE ADDR_API AddrComputeFmaskInfo(
1348     ADDR_HANDLE                             hLib,
1349     const ADDR_COMPUTE_FMASK_INFO_INPUT*    pIn,
1350     ADDR_COMPUTE_FMASK_INFO_OUTPUT*         pOut);
1351
1352
1353
1354 /**
1355 ****************************************************************************************************
1356 *   ADDR_COMPUTE_FMASK_ADDRFROMCOORD_INPUT
1357 *
1358 *   @brief
1359 *       Input structure for AddrComputeFmaskAddrFromCoord
1360 ****************************************************************************************************
1361 */
1362 typedef struct _ADDR_COMPUTE_FMASK_ADDRFROMCOORD_INPUT
1363 {
1364     UINT_32         size;               ///< Size of this structure in bytes
1365
1366     UINT_32         x;                  ///< X coordinate
1367     UINT_32         y;                  ///< Y coordinate
1368     UINT_32         slice;              ///< Slice index
1369     UINT_32         plane;              ///< Plane number
1370     UINT_32         sample;             ///< Sample index (fragment index for EQAA)
1371
1372     UINT_32         pitch;              ///< Surface pitch, in pixels
1373     UINT_32         height;             ///< Surface height, in pixels
1374     UINT_32         numSamples;         ///< Number of samples
1375     UINT_32         numFrags;           ///< Number of fragments, leave it zero or the same as
1376                                         ///  number of samples for normal AA; Set it to the
1377                                         ///  number of fragments for EQAA
1378
1379     AddrTileMode    tileMode;           ///< Tile mode
1380     union
1381     {
1382         struct
1383         {
1384             UINT_32  bankSwizzle;       ///< Bank swizzle
1385             UINT_32  pipeSwizzle;       ///< Pipe swizzle
1386         };
1387         UINT_32     tileSwizzle;        ///< Combined swizzle, if useCombinedSwizzle is TRUE
1388     };
1389
1390     /// r800 and later HWL parameters
1391     struct
1392     {
1393         UINT_32 resolved:   1;          ///< TRUE if this is a resolved fmask, used by H/W clients
1394         UINT_32 ignoreSE:   1;          ///< TRUE if shader engines are ignored.
1395         UINT_32 reserved:  30;          ///< Reserved for future use.
1396     };
1397     ADDR_TILEINFO*  pTileInfo;          ///< 2D tiling parameters. Client must provide all data
1398
1399 } ADDR_COMPUTE_FMASK_ADDRFROMCOORD_INPUT;
1400
1401 /**
1402 ****************************************************************************************************
1403 *   ADDR_COMPUTE_FMASK_ADDRFROMCOORD_OUTPUT
1404 *
1405 *   @brief
1406 *       Output structure for AddrComputeFmaskAddrFromCoord
1407 ****************************************************************************************************
1408 */
1409 typedef struct _ADDR_COMPUTE_FMASK_ADDRFROMCOORD_OUTPUT
1410 {
1411     UINT_32 size;           ///< Size of this structure in bytes
1412
1413     UINT_64 addr;           ///< Fmask address
1414     UINT_32 bitPosition;    ///< Bit position within fmaskAddr, 0-7.
1415 } ADDR_COMPUTE_FMASK_ADDRFROMCOORD_OUTPUT;
1416
1417 /**
1418 ****************************************************************************************************
1419 *   AddrComputeFmaskAddrFromCoord
1420 *
1421 *   @brief
1422 *       Compute Fmask address according to coordinates (x,y,slice,sample,plane)
1423 ****************************************************************************************************
1424 */
1425 ADDR_E_RETURNCODE ADDR_API AddrComputeFmaskAddrFromCoord(
1426     ADDR_HANDLE                                     hLib,
1427     const ADDR_COMPUTE_FMASK_ADDRFROMCOORD_INPUT*   pIn,
1428     ADDR_COMPUTE_FMASK_ADDRFROMCOORD_OUTPUT*        pOut);
1429
1430
1431
1432 /**
1433 ****************************************************************************************************
1434 *   ADDR_COMPUTE_FMASK_COORDFROMADDR_INPUT
1435 *
1436 *   @brief
1437 *       Input structure for AddrComputeFmaskCoordFromAddr
1438 ****************************************************************************************************
1439 */
1440 typedef struct _ADDR_COMPUTE_FMASK_COORDFROMADDR_INPUT
1441 {
1442     UINT_32         size;               ///< Size of this structure in bytes
1443
1444     UINT_64         addr;               ///< Address
1445     UINT_32         bitPosition;        ///< Bit position within addr, 0-7.
1446
1447     UINT_32         pitch;              ///< Pitch, in pixels
1448     UINT_32         height;             ///< Height in pixels
1449     UINT_32         numSamples;         ///< Number of samples
1450     UINT_32         numFrags;           ///< Number of fragments
1451     AddrTileMode    tileMode;           ///< Tile mode
1452     union
1453     {
1454         struct
1455         {
1456             UINT_32  bankSwizzle;       ///< Bank swizzle
1457             UINT_32  pipeSwizzle;       ///< Pipe swizzle
1458         };
1459         UINT_32     tileSwizzle;        ///< Combined swizzle, if useCombinedSwizzle is TRUE
1460     };
1461
1462     /// r800 and later HWL parameters
1463     struct
1464     {
1465         UINT_32 resolved:   1;          ///< TRUE if this is a resolved fmask, used by HW components
1466         UINT_32 ignoreSE:   1;          ///< TRUE if shader engines are ignored.
1467         UINT_32 reserved:  30;          ///< Reserved for future use.
1468     };
1469     ADDR_TILEINFO*  pTileInfo;          ///< 2D tile parameters. Client must provide all data
1470
1471 } ADDR_COMPUTE_FMASK_COORDFROMADDR_INPUT;
1472
1473 /**
1474 ****************************************************************************************************
1475 *   ADDR_COMPUTE_FMASK_COORDFROMADDR_OUTPUT
1476 *
1477 *   @brief
1478 *       Output structure for AddrComputeFmaskCoordFromAddr
1479 ****************************************************************************************************
1480 */
1481 typedef struct _ADDR_COMPUTE_FMASK_COORDFROMADDR_OUTPUT
1482 {
1483     UINT_32 size;       ///< Size of this structure in bytes
1484
1485     UINT_32 x;          ///< X coordinate
1486     UINT_32 y;          ///< Y coordinate
1487     UINT_32 slice;      ///< Slice index
1488     UINT_32 plane;      ///< Plane number
1489     UINT_32 sample;     ///< Sample index (fragment index for EQAA)
1490 } ADDR_COMPUTE_FMASK_COORDFROMADDR_OUTPUT;
1491
1492 /**
1493 ****************************************************************************************************
1494 *   AddrComputeFmaskCoordFromAddr
1495 *
1496 *   @brief
1497 *       Compute FMASK coordinate from an given address
1498 ****************************************************************************************************
1499 */
1500 ADDR_E_RETURNCODE ADDR_API AddrComputeFmaskCoordFromAddr(
1501     ADDR_HANDLE                                     hLib,
1502     const ADDR_COMPUTE_FMASK_COORDFROMADDR_INPUT*   pIn,
1503     ADDR_COMPUTE_FMASK_COORDFROMADDR_OUTPUT*        pOut);
1504
1505
1506
1507 ////////////////////////////////////////////////////////////////////////////////////////////////////
1508 //                          Element/utility functions
1509 ////////////////////////////////////////////////////////////////////////////////////////////////////
1510
1511 /**
1512 ****************************************************************************************************
1513 *   AddrGetVersion
1514 *
1515 *   @brief
1516 *       Get AddrLib version number
1517 ****************************************************************************************************
1518 */
1519 UINT_32 ADDR_API AddrGetVersion(ADDR_HANDLE hLib);
1520
1521 /**
1522 ****************************************************************************************************
1523 *   AddrUseTileIndex
1524 *
1525 *   @brief
1526 *       Return TRUE if tileIndex is enabled in this address library
1527 ****************************************************************************************************
1528 */
1529 BOOL_32 ADDR_API AddrUseTileIndex(ADDR_HANDLE hLib);
1530
1531 /**
1532 ****************************************************************************************************
1533 *   AddrUseCombinedSwizzle
1534 *
1535 *   @brief
1536 *       Return TRUE if combined swizzle is enabled in this address library
1537 ****************************************************************************************************
1538 */
1539 BOOL_32 ADDR_API AddrUseCombinedSwizzle(ADDR_HANDLE hLib);
1540
1541 /**
1542 ****************************************************************************************************
1543 *   ADDR_EXTRACT_BANKPIPE_SWIZZLE_INPUT
1544 *
1545 *   @brief
1546 *       Input structure of AddrExtractBankPipeSwizzle
1547 ****************************************************************************************************
1548 */
1549 typedef struct _ADDR_EXTRACT_BANKPIPE_SWIZZLE_INPUT
1550 {
1551     UINT_32         size;           ///< Size of this structure in bytes
1552
1553     UINT_32         base256b;       ///< Base256b value
1554
1555     /// r800 and later HWL parameters
1556     ADDR_TILEINFO*  pTileInfo;      ///< 2D tile parameters. Client must provide all data
1557
1558     INT_32          tileIndex;      ///< Tile index, MUST be -1 if you don't want to use it
1559                                     ///  while the global useTileIndex is set to 1
1560     INT_32          macroModeIndex; ///< Index in macro tile mode table if there is one (CI)
1561                                     ///< README: When tileIndex is not -1, this must be valid
1562 } ADDR_EXTRACT_BANKPIPE_SWIZZLE_INPUT;
1563
1564 /**
1565 ****************************************************************************************************
1566 *   ADDR_EXTRACT_BANKPIPE_SWIZZLE_OUTPUT
1567 *
1568 *   @brief
1569 *       Output structure of AddrExtractBankPipeSwizzle
1570 ****************************************************************************************************
1571 */
1572 typedef struct _ADDR_EXTRACT_BANKPIPE_SWIZZLE_OUTPUT
1573 {
1574     UINT_32 size;           ///< Size of this structure in bytes
1575
1576     UINT_32 bankSwizzle;    ///< Bank swizzle
1577     UINT_32 pipeSwizzle;    ///< Pipe swizzle
1578 } ADDR_EXTRACT_BANKPIPE_SWIZZLE_OUTPUT;
1579
1580 /**
1581 ****************************************************************************************************
1582 *   AddrExtractBankPipeSwizzle
1583 *
1584 *   @brief
1585 *       Extract Bank and Pipe swizzle from base256b
1586 *   @return
1587 *       ADDR_OK if no error
1588 ****************************************************************************************************
1589 */
1590 ADDR_E_RETURNCODE ADDR_API AddrExtractBankPipeSwizzle(
1591     ADDR_HANDLE                                 hLib,
1592     const ADDR_EXTRACT_BANKPIPE_SWIZZLE_INPUT*  pIn,
1593     ADDR_EXTRACT_BANKPIPE_SWIZZLE_OUTPUT*       pOut);
1594
1595
1596 /**
1597 ****************************************************************************************************
1598 *   ADDR_COMBINE_BANKPIPE_SWIZZLE_INPUT
1599 *
1600 *   @brief
1601 *       Input structure of AddrCombineBankPipeSwizzle
1602 ****************************************************************************************************
1603 */
1604 typedef struct _ADDR_COMBINE_BANKPIPE_SWIZZLE_INPUT
1605 {
1606     UINT_32         size;           ///< Size of this structure in bytes
1607
1608     UINT_32         bankSwizzle;    ///< Bank swizzle
1609     UINT_32         pipeSwizzle;    ///< Pipe swizzle
1610     UINT_64         baseAddr;       ///< Base address (leave it zero for driver clients)
1611
1612     /// r800 and later HWL parameters
1613     ADDR_TILEINFO*  pTileInfo;      ///< 2D tile parameters. Client must provide all data
1614
1615     INT_32          tileIndex;      ///< Tile index, MUST be -1 if you don't want to use it
1616                                     ///  while the global useTileIndex is set to 1
1617     INT_32          macroModeIndex; ///< Index in macro tile mode table if there is one (CI)
1618                                     ///< README: When tileIndex is not -1, this must be valid
1619 } ADDR_COMBINE_BANKPIPE_SWIZZLE_INPUT;
1620
1621 /**
1622 ****************************************************************************************************
1623 *   ADDR_COMBINE_BANKPIPE_SWIZZLE_OUTPUT
1624 *
1625 *   @brief
1626 *       Output structure of AddrCombineBankPipeSwizzle
1627 ****************************************************************************************************
1628 */
1629 typedef struct _ADDR_COMBINE_BANKPIPE_SWIZZLE_OUTPUT
1630 {
1631     UINT_32 size;           ///< Size of this structure in bytes
1632
1633     UINT_32 tileSwizzle;    ///< Combined swizzle
1634 } ADDR_COMBINE_BANKPIPE_SWIZZLE_OUTPUT;
1635
1636 /**
1637 ****************************************************************************************************
1638 *   AddrCombineBankPipeSwizzle
1639 *
1640 *   @brief
1641 *       Combine Bank and Pipe swizzle
1642 *   @return
1643 *       ADDR_OK if no error
1644 *   @note
1645 *       baseAddr here is full MCAddress instead of base256b
1646 ****************************************************************************************************
1647 */
1648 ADDR_E_RETURNCODE ADDR_API AddrCombineBankPipeSwizzle(
1649     ADDR_HANDLE                                 hLib,
1650     const ADDR_COMBINE_BANKPIPE_SWIZZLE_INPUT*  pIn,
1651     ADDR_COMBINE_BANKPIPE_SWIZZLE_OUTPUT*       pOut);
1652
1653
1654
1655 /**
1656 ****************************************************************************************************
1657 *   ADDR_COMPUTE_SLICESWIZZLE_INPUT
1658 *
1659 *   @brief
1660 *       Input structure of AddrComputeSliceSwizzle
1661 ****************************************************************************************************
1662 */
1663 typedef struct _ADDR_COMPUTE_SLICESWIZZLE_INPUT
1664 {
1665     UINT_32         size;               ///< Size of this structure in bytes
1666
1667     AddrTileMode    tileMode;           ///< Tile Mode
1668     UINT_32         baseSwizzle;        ///< Base tile swizzle
1669     UINT_32         slice;              ///< Slice index
1670     UINT_64         baseAddr;           ///< Base address, driver should leave it 0 in most cases
1671
1672     /// r800 and later HWL parameters
1673     ADDR_TILEINFO*  pTileInfo;          ///< 2D tile parameters. Actually banks needed here!
1674
1675     INT_32          tileIndex;          ///< Tile index, MUST be -1 if you don't want to use it
1676                                         ///  while the global useTileIndex is set to 1
1677     INT_32          macroModeIndex;     ///< Index in macro tile mode table if there is one (CI)
1678                                         ///< README: When tileIndex is not -1, this must be valid
1679 } ADDR_COMPUTE_SLICESWIZZLE_INPUT;
1680
1681
1682
1683 /**
1684 ****************************************************************************************************
1685 *   ADDR_COMPUTE_SLICESWIZZLE_OUTPUT
1686 *
1687 *   @brief
1688 *       Output structure of AddrComputeSliceSwizzle
1689 ****************************************************************************************************
1690 */
1691 typedef struct _ADDR_COMPUTE_SLICESWIZZLE_OUTPUT
1692 {
1693     UINT_32  size;           ///< Size of this structure in bytes
1694
1695     UINT_32  tileSwizzle;    ///< Recalculated tileSwizzle value
1696 } ADDR_COMPUTE_SLICESWIZZLE_OUTPUT;
1697
1698 /**
1699 ****************************************************************************************************
1700 *   AddrComputeSliceSwizzle
1701 *
1702 *   @brief
1703 *       Extract Bank and Pipe swizzle from base256b
1704 *   @return
1705 *       ADDR_OK if no error
1706 ****************************************************************************************************
1707 */
1708 ADDR_E_RETURNCODE ADDR_API AddrComputeSliceSwizzle(
1709     ADDR_HANDLE                             hLib,
1710     const ADDR_COMPUTE_SLICESWIZZLE_INPUT*  pIn,
1711     ADDR_COMPUTE_SLICESWIZZLE_OUTPUT*       pOut);
1712
1713
1714 /**
1715 ****************************************************************************************************
1716 *   AddrSwizzleGenOption
1717 *
1718 *   @brief
1719 *       Which swizzle generating options: legacy or linear
1720 ****************************************************************************************************
1721 */
1722 typedef enum _AddrSwizzleGenOption
1723 {
1724     ADDR_SWIZZLE_GEN_DEFAULT    = 0,    ///< As is in client driver implemention for swizzle
1725     ADDR_SWIZZLE_GEN_LINEAR     = 1,    ///< Using a linear increment of swizzle
1726 } AddrSwizzleGenOption;
1727
1728 /**
1729 ****************************************************************************************************
1730 *   AddrSwizzleOption
1731 *
1732 *   @brief
1733 *       Controls how swizzle is generated
1734 ****************************************************************************************************
1735 */
1736 typedef union _ADDR_SWIZZLE_OPTION
1737 {
1738     struct
1739     {
1740         UINT_32 genOption       : 1;    ///< The way swizzle is generated, see AddrSwizzleGenOption
1741         UINT_32 reduceBankBit   : 1;    ///< TRUE if we need reduce swizzle bits
1742         UINT_32 reserved        :30;    ///< Reserved bits
1743     };
1744
1745     UINT_32 value;
1746
1747 } ADDR_SWIZZLE_OPTION;
1748
1749 /**
1750 ****************************************************************************************************
1751 *   ADDR_COMPUTE_BASE_SWIZZLE_INPUT
1752 *
1753 *   @brief
1754 *       Input structure of AddrComputeBaseSwizzle
1755 ****************************************************************************************************
1756 */
1757 typedef struct _ADDR_COMPUTE_BASE_SWIZZLE_INPUT
1758 {
1759     UINT_32             size;           ///< Size of this structure in bytes
1760
1761     ADDR_SWIZZLE_OPTION option;         ///< Swizzle option
1762     UINT_32             surfIndex;      ///< Index of this surface type
1763     AddrTileMode        tileMode;       ///< Tile Mode
1764
1765     /// r800 and later HWL parameters
1766     ADDR_TILEINFO*      pTileInfo;      ///< 2D tile parameters. Actually banks needed here!
1767
1768     INT_32              tileIndex;      ///< Tile index, MUST be -1 if you don't want to use it
1769                                         ///  while the global useTileIndex is set to 1
1770     INT_32              macroModeIndex; ///< Index in macro tile mode table if there is one (CI)
1771                                         ///< README: When tileIndex is not -1, this must be valid
1772 } ADDR_COMPUTE_BASE_SWIZZLE_INPUT;
1773
1774 /**
1775 ****************************************************************************************************
1776 *   ADDR_COMPUTE_BASE_SWIZZLE_OUTPUT
1777 *
1778 *   @brief
1779 *       Output structure of AddrComputeBaseSwizzle
1780 ****************************************************************************************************
1781 */
1782 typedef struct _ADDR_COMPUTE_BASE_SWIZZLE_OUTPUT
1783 {
1784     UINT_32 size;           ///< Size of this structure in bytes
1785
1786     UINT_32 tileSwizzle;    ///< Combined swizzle
1787 } ADDR_COMPUTE_BASE_SWIZZLE_OUTPUT;
1788
1789 /**
1790 ****************************************************************************************************
1791 *   AddrComputeBaseSwizzle
1792 *
1793 *   @brief
1794 *       Return a Combined Bank and Pipe swizzle base on surface based on surface type/index
1795 *   @return
1796 *       ADDR_OK if no error
1797 ****************************************************************************************************
1798 */
1799 ADDR_E_RETURNCODE ADDR_API AddrComputeBaseSwizzle(
1800     ADDR_HANDLE                             hLib,
1801     const ADDR_COMPUTE_BASE_SWIZZLE_INPUT*  pIn,
1802     ADDR_COMPUTE_BASE_SWIZZLE_OUTPUT*       pOut);
1803
1804
1805
1806 /**
1807 ****************************************************************************************************
1808 *   ELEM_GETEXPORTNORM_INPUT
1809 *
1810 *   @brief
1811 *       Input structure for ElemGetExportNorm
1812 *
1813 ****************************************************************************************************
1814 */
1815 typedef struct _ELEM_GETEXPORTNORM_INPUT
1816 {
1817     UINT_32             size;       ///< Size of this structure in bytes
1818
1819     AddrColorFormat     format;     ///< Color buffer format; Client should use ColorFormat
1820     AddrSurfaceNumber   num;        ///< Surface number type; Client should use NumberType
1821     AddrSurfaceSwap     swap;       ///< Surface swap byte swap; Client should use SurfaceSwap
1822     UINT_32             numSamples; ///< Number of samples
1823 } ELEM_GETEXPORTNORM_INPUT;
1824
1825 /**
1826 ****************************************************************************************************
1827 *  ElemGetExportNorm
1828 *
1829 *   @brief
1830 *       Helper function to check one format can be EXPORT_NUM, which is a register
1831 *       CB_COLOR_INFO.SURFACE_FORMAT. FP16 can be reported as EXPORT_NORM for rv770 in r600
1832 *       family
1833 *   @note
1834 *       The implementation is only for r600.
1835 *       00 - EXPORT_FULL: PS exports are 4 pixels with 4 components with 32-bits-per-component. (two
1836 *       clocks per export)
1837 *       01 - EXPORT_NORM: PS exports are 4 pixels with 4 components with 16-bits-per-component. (one
1838 *       clock per export)
1839 *
1840 ****************************************************************************************************
1841 */
1842 BOOL_32 ADDR_API ElemGetExportNorm(
1843     ADDR_HANDLE                     hLib,
1844     const ELEM_GETEXPORTNORM_INPUT* pIn);
1845
1846
1847
1848 /**
1849 ****************************************************************************************************
1850 *   ELEM_FLT32TODEPTHPIXEL_INPUT
1851 *
1852 *   @brief
1853 *       Input structure for addrFlt32ToDepthPixel
1854 *
1855 ****************************************************************************************************
1856 */
1857 typedef struct _ELEM_FLT32TODEPTHPIXEL_INPUT
1858 {
1859     UINT_32         size;           ///< Size of this structure in bytes
1860
1861     AddrDepthFormat format;         ///< Depth buffer format
1862     ADDR_FLT_32     comps[2];       ///< Component values (Z/stencil)
1863 } ELEM_FLT32TODEPTHPIXEL_INPUT;
1864
1865 /**
1866 ****************************************************************************************************
1867 *   ELEM_FLT32TODEPTHPIXEL_INPUT
1868 *
1869 *   @brief
1870 *       Output structure for ElemFlt32ToDepthPixel
1871 *
1872 ****************************************************************************************************
1873 */
1874 typedef struct _ELEM_FLT32TODEPTHPIXEL_OUTPUT
1875 {
1876     UINT_32 size;           ///< Size of this structure in bytes
1877
1878     UINT_8* pPixel;         ///< Real depth value. Same data type as depth buffer.
1879                             ///  Client must provide enough storage for this type.
1880     UINT_32 depthBase;      ///< Tile base in bits for depth bits
1881     UINT_32 stencilBase;    ///< Tile base in bits for stencil bits
1882     UINT_32 depthBits;      ///< Bits for depth
1883     UINT_32 stencilBits;    ///< Bits for stencil
1884 } ELEM_FLT32TODEPTHPIXEL_OUTPUT;
1885
1886 /**
1887 ****************************************************************************************************
1888 *   ElemFlt32ToDepthPixel
1889 *
1890 *   @brief
1891 *       Convert a FLT_32 value to a depth/stencil pixel value
1892 *
1893 *   @return
1894 *       Return code
1895 *
1896 ****************************************************************************************************
1897 */
1898 ADDR_E_RETURNCODE ADDR_API ElemFlt32ToDepthPixel(
1899     ADDR_HANDLE                         hLib,
1900     const ELEM_FLT32TODEPTHPIXEL_INPUT* pIn,
1901     ELEM_FLT32TODEPTHPIXEL_OUTPUT*      pOut);
1902
1903
1904
1905 /**
1906 ****************************************************************************************************
1907 *   ELEM_FLT32TOCOLORPIXEL_INPUT
1908 *
1909 *   @brief
1910 *       Input structure for addrFlt32ToColorPixel
1911 *
1912 ****************************************************************************************************
1913 */
1914 typedef struct _ELEM_FLT32TOCOLORPIXEL_INPUT
1915 {
1916     UINT_32            size;           ///< Size of this structure in bytes
1917
1918     AddrColorFormat    format;         ///< Color buffer format
1919     AddrSurfaceNumber  surfNum;        ///< Surface number
1920     AddrSurfaceSwap    surfSwap;       ///< Surface swap
1921     ADDR_FLT_32        comps[4];       ///< Component values (r/g/b/a)
1922 } ELEM_FLT32TOCOLORPIXEL_INPUT;
1923
1924 /**
1925 ****************************************************************************************************
1926 *   ELEM_FLT32TOCOLORPIXEL_INPUT
1927 *
1928 *   @brief
1929 *       Output structure for ElemFlt32ToColorPixel
1930 *
1931 ****************************************************************************************************
1932 */
1933 typedef struct _ELEM_FLT32TOCOLORPIXEL_OUTPUT
1934 {
1935     UINT_32 size;       ///< Size of this structure in bytes
1936
1937     UINT_8* pPixel;     ///< Real color value. Same data type as color buffer.
1938                         ///  Client must provide enough storage for this type.
1939 } ELEM_FLT32TOCOLORPIXEL_OUTPUT;
1940
1941 /**
1942 ****************************************************************************************************
1943 *   ElemFlt32ToColorPixel
1944 *
1945 *   @brief
1946 *       Convert a FLT_32 value to a red/green/blue/alpha pixel value
1947 *
1948 *   @return
1949 *       Return code
1950 *
1951 ****************************************************************************************************
1952 */
1953 ADDR_E_RETURNCODE ADDR_API ElemFlt32ToColorPixel(
1954     ADDR_HANDLE                         hLib,
1955     const ELEM_FLT32TOCOLORPIXEL_INPUT* pIn,
1956     ELEM_FLT32TOCOLORPIXEL_OUTPUT*      pOut);
1957
1958
1959 /**
1960 ****************************************************************************************************
1961 *   ADDR_CONVERT_TILEINFOTOHW_INPUT
1962 *
1963 *   @brief
1964 *       Input structure for AddrConvertTileInfoToHW
1965 *   @note
1966 *       When reverse is TRUE, indices are igonred
1967 ****************************************************************************************************
1968 */
1969 typedef struct _ADDR_CONVERT_TILEINFOTOHW_INPUT
1970 {
1971     UINT_32         size;               ///< Size of this structure in bytes
1972     BOOL_32         reverse;            ///< Convert control flag.
1973                                         ///  FALSE: convert from real value to HW value;
1974                                         ///  TRUE: convert from HW value to real value.
1975
1976     /// r800 and later HWL parameters
1977     ADDR_TILEINFO*  pTileInfo;          ///< Tile parameters with real value
1978
1979     INT_32          tileIndex;          ///< Tile index, MUST be -1 if you don't want to use it
1980                                         ///  while the global useTileIndex is set to 1
1981     INT_32          macroModeIndex;     ///< Index in macro tile mode table if there is one (CI)
1982                                         ///< README: When tileIndex is not -1, this must be valid
1983     UINT_32         bpp;                ///< Bits per pixel
1984 } ADDR_CONVERT_TILEINFOTOHW_INPUT;
1985
1986 /**
1987 ****************************************************************************************************
1988 *   ADDR_CONVERT_TILEINFOTOHW_OUTPUT
1989 *
1990 *   @brief
1991 *       Output structure for AddrConvertTileInfoToHW
1992 ****************************************************************************************************
1993 */
1994 typedef struct _ADDR_CONVERT_TILEINFOTOHW_OUTPUT
1995 {
1996     UINT_32             size;               ///< Size of this structure in bytes
1997
1998     /// r800 and later HWL parameters
1999     ADDR_TILEINFO*      pTileInfo;          ///< Tile parameters with hardware register value
2000
2001 } ADDR_CONVERT_TILEINFOTOHW_OUTPUT;
2002
2003 /**
2004 ****************************************************************************************************
2005 *   AddrConvertTileInfoToHW
2006 *
2007 *   @brief
2008 *       Convert tile info from real value to hardware register value
2009 ****************************************************************************************************
2010 */
2011 ADDR_E_RETURNCODE ADDR_API AddrConvertTileInfoToHW(
2012     ADDR_HANDLE                             hLib,
2013     const ADDR_CONVERT_TILEINFOTOHW_INPUT*  pIn,
2014     ADDR_CONVERT_TILEINFOTOHW_OUTPUT*       pOut);
2015
2016
2017
2018 /**
2019 ****************************************************************************************************
2020 *   ADDR_CONVERT_TILEINDEX_INPUT
2021 *
2022 *   @brief
2023 *       Input structure for AddrConvertTileIndex
2024 ****************************************************************************************************
2025 */
2026 typedef struct _ADDR_CONVERT_TILEINDEX_INPUT
2027 {
2028     UINT_32         size;               ///< Size of this structure in bytes
2029
2030     INT_32          tileIndex;          ///< Tile index
2031     INT_32          macroModeIndex;     ///< Index in macro tile mode table if there is one (CI)
2032     UINT_32         bpp;                ///< Bits per pixel
2033     BOOL_32         tileInfoHw;         ///< Set to TRUE if client wants HW enum, otherwise actual
2034 } ADDR_CONVERT_TILEINDEX_INPUT;
2035
2036 /**
2037 ****************************************************************************************************
2038 *   ADDR_CONVERT_TILEINDEX_OUTPUT
2039 *
2040 *   @brief
2041 *       Output structure for AddrConvertTileIndex
2042 ****************************************************************************************************
2043 */
2044 typedef struct _ADDR_CONVERT_TILEINDEX_OUTPUT
2045 {
2046     UINT_32             size;           ///< Size of this structure in bytes
2047
2048     AddrTileMode        tileMode;       ///< Tile mode
2049     AddrTileType        tileType;       ///< Tile type
2050     ADDR_TILEINFO*      pTileInfo;      ///< Tile info
2051
2052 } ADDR_CONVERT_TILEINDEX_OUTPUT;
2053
2054 /**
2055 ****************************************************************************************************
2056 *   AddrConvertTileIndex
2057 *
2058 *   @brief
2059 *       Convert tile index to tile mode/type/info
2060 ****************************************************************************************************
2061 */
2062 ADDR_E_RETURNCODE ADDR_API AddrConvertTileIndex(
2063     ADDR_HANDLE                         hLib,
2064     const ADDR_CONVERT_TILEINDEX_INPUT* pIn,
2065     ADDR_CONVERT_TILEINDEX_OUTPUT*      pOut);
2066
2067 /**
2068 ****************************************************************************************************
2069 *   ADDR_GET_MACROMODEINDEX_INPUT
2070 *
2071 *   @brief
2072 *       Input structure for AddrGetMacroModeIndex
2073 ****************************************************************************************************
2074 */
2075 typedef struct _ADDR_GET_MACROMODEINDEX_INPUT
2076 {
2077     UINT_32             size;               ///< Size of this structure in bytes
2078     ADDR_SURFACE_FLAGS  flags;              ///< Surface flag
2079     INT_32              tileIndex;          ///< Tile index
2080     UINT_32             bpp;                ///< Bits per pixel
2081     UINT_32             numFrags;           ///< Number of color fragments
2082 } ADDR_GET_MACROMODEINDEX_INPUT;
2083
2084 /**
2085 ****************************************************************************************************
2086 *   ADDR_GET_MACROMODEINDEX_OUTPUT
2087 *
2088 *   @brief
2089 *       Output structure for AddrGetMacroModeIndex
2090 ****************************************************************************************************
2091 */
2092 typedef struct _ADDR_GET_MACROMODEINDEX_OUTPUT
2093 {
2094     UINT_32             size;            ///< Size of this structure in bytes
2095     INT_32              macroModeIndex;  ///< Index in macro tile mode table if there is one (CI)
2096 } ADDR_GET_MACROMODEINDEX_OUTPUT;
2097
2098 /**
2099 ****************************************************************************************************
2100 *   AddrGetMacroModeIndex
2101 *
2102 *   @brief
2103 *       Get macro mode index based on input parameters
2104 ****************************************************************************************************
2105 */
2106 ADDR_E_RETURNCODE ADDR_API AddrGetMacroModeIndex(
2107     ADDR_HANDLE                          hLib,
2108     const ADDR_GET_MACROMODEINDEX_INPUT* pIn,
2109     ADDR_GET_MACROMODEINDEX_OUTPUT*      pOut);
2110
2111 /**
2112 ****************************************************************************************************
2113 *   ADDR_CONVERT_TILEINDEX1_INPUT
2114 *
2115 *   @brief
2116 *       Input structure for AddrConvertTileIndex1 (without macro mode index)
2117 ****************************************************************************************************
2118 */
2119 typedef struct _ADDR_CONVERT_TILEINDEX1_INPUT
2120 {
2121     UINT_32         size;               ///< Size of this structure in bytes
2122
2123     INT_32          tileIndex;          ///< Tile index
2124     UINT_32         bpp;                ///< Bits per pixel
2125     UINT_32         numSamples;         ///< Number of samples
2126     BOOL_32         tileInfoHw;         ///< Set to TRUE if client wants HW enum, otherwise actual
2127 } ADDR_CONVERT_TILEINDEX1_INPUT;
2128
2129 /**
2130 ****************************************************************************************************
2131 *   AddrConvertTileIndex1
2132 *
2133 *   @brief
2134 *       Convert tile index to tile mode/type/info
2135 ****************************************************************************************************
2136 */
2137 ADDR_E_RETURNCODE ADDR_API AddrConvertTileIndex1(
2138     ADDR_HANDLE                             hLib,
2139     const ADDR_CONVERT_TILEINDEX1_INPUT*    pIn,
2140     ADDR_CONVERT_TILEINDEX_OUTPUT*          pOut);
2141
2142
2143
2144 /**
2145 ****************************************************************************************************
2146 *   ADDR_GET_TILEINDEX_INPUT
2147 *
2148 *   @brief
2149 *       Input structure for AddrGetTileIndex
2150 ****************************************************************************************************
2151 */
2152 typedef struct _ADDR_GET_TILEINDEX_INPUT
2153 {
2154     UINT_32         size;           ///< Size of this structure in bytes
2155
2156     AddrTileMode    tileMode;       ///< Tile mode
2157     AddrTileType    tileType;       ///< Tile-type: disp/non-disp/...
2158     ADDR_TILEINFO*  pTileInfo;      ///< Pointer to tile-info structure, can be NULL for linear/1D
2159 } ADDR_GET_TILEINDEX_INPUT;
2160
2161 /**
2162 ****************************************************************************************************
2163 *   ADDR_GET_TILEINDEX_OUTPUT
2164 *
2165 *   @brief
2166 *       Output structure for AddrGetTileIndex
2167 ****************************************************************************************************
2168 */
2169 typedef struct _ADDR_GET_TILEINDEX_OUTPUT
2170 {
2171     UINT_32         size;           ///< Size of this structure in bytes
2172
2173     INT_32          index;          ///< index in table
2174 } ADDR_GET_TILEINDEX_OUTPUT;
2175
2176 /**
2177 ****************************************************************************************************
2178 *   AddrGetTileIndex
2179 *
2180 *   @brief
2181 *       Get the tiling mode index in table
2182 ****************************************************************************************************
2183 */
2184 ADDR_E_RETURNCODE ADDR_API AddrGetTileIndex(
2185     ADDR_HANDLE                     hLib,
2186     const ADDR_GET_TILEINDEX_INPUT* pIn,
2187     ADDR_GET_TILEINDEX_OUTPUT*      pOut);
2188
2189
2190
2191 /**
2192 ****************************************************************************************************
2193 *   ADDR_PRT_INFO_INPUT
2194 *
2195 *   @brief
2196 *       Input structure for AddrComputePrtInfo
2197 ****************************************************************************************************
2198 */
2199 typedef struct _ADDR_PRT_INFO_INPUT
2200 {
2201     AddrFormat          format;        ///< Surface format
2202     UINT_32             baseMipWidth;  ///< Base mipmap width
2203     UINT_32             baseMipHeight; ///< Base mipmap height
2204     UINT_32             baseMipDepth;  ///< Base mipmap depth
2205     UINT_32             numFrags;      ///< Number of fragments,
2206 } ADDR_PRT_INFO_INPUT;
2207
2208 /**
2209 ****************************************************************************************************
2210 *   ADDR_PRT_INFO_OUTPUT
2211 *
2212 *   @brief
2213 *       Input structure for AddrComputePrtInfo
2214 ****************************************************************************************************
2215 */
2216 typedef struct _ADDR_PRT_INFO_OUTPUT
2217 {
2218     UINT_32             prtTileWidth;
2219     UINT_32             prtTileHeight;
2220 } ADDR_PRT_INFO_OUTPUT;
2221
2222 /**
2223 ****************************************************************************************************
2224 *   AddrComputePrtInfo
2225 *
2226 *   @brief
2227 *       Compute prt surface related information
2228 ****************************************************************************************************
2229 */
2230 ADDR_E_RETURNCODE ADDR_API AddrComputePrtInfo(
2231     ADDR_HANDLE                 hLib,
2232     const ADDR_PRT_INFO_INPUT*  pIn,
2233     ADDR_PRT_INFO_OUTPUT*       pOut);
2234
2235
2236
2237 ////////////////////////////////////////////////////////////////////////////////////////////////////
2238 //                                     DCC key functions
2239 ////////////////////////////////////////////////////////////////////////////////////////////////////
2240
2241 /**
2242 ****************************************************************************************************
2243 *   _ADDR_COMPUTE_DCCINFO_INPUT
2244 *
2245 *   @brief
2246 *       Input structure of AddrComputeDccInfo
2247 ****************************************************************************************************
2248 */
2249 typedef struct _ADDR_COMPUTE_DCCINFO_INPUT
2250 {
2251     UINT_32             size;            ///< Size of this structure in bytes
2252     UINT_32             bpp;             ///< BitPP of color surface
2253     UINT_32             numSamples;      ///< Sample number of color surface
2254     UINT_64             colorSurfSize;   ///< Size of color surface to which dcc key is bound
2255     AddrTileMode        tileMode;        ///< Tile mode of color surface
2256     ADDR_TILEINFO       tileInfo;        ///< Tile info of color surface
2257     UINT_32             tileSwizzle;     ///< Tile swizzle
2258     INT_32              tileIndex;       ///< Tile index of color surface,
2259                                          ///< MUST be -1 if you don't want to use it
2260                                          ///< while the global useTileIndex is set to 1
2261     INT_32              macroModeIndex;  ///< Index in macro tile mode table if there is one (CI)
2262                                          ///< README: When tileIndex is not -1, this must be valid
2263 } ADDR_COMPUTE_DCCINFO_INPUT;
2264
2265 /**
2266 ****************************************************************************************************
2267 *   ADDR_COMPUTE_DCCINFO_OUTPUT
2268 *
2269 *   @brief
2270 *       Output structure of AddrComputeDccInfo
2271 ****************************************************************************************************
2272 */
2273 typedef struct _ADDR_COMPUTE_DCCINFO_OUTPUT
2274 {
2275     UINT_32 size;                 ///< Size of this structure in bytes
2276     UINT_64 dccRamBaseAlign;      ///< Base alignment of dcc key
2277     UINT_64 dccRamSize;           ///< Size of dcc key
2278     UINT_64 dccFastClearSize;     ///< Size of dcc key portion that can be fast cleared
2279     BOOL_32 subLvlCompressible;   ///< Whether sub resource is compressiable
2280     BOOL_32 dccRamSizeAligned;    ///< Whether the dcc key size is aligned
2281 } ADDR_COMPUTE_DCCINFO_OUTPUT;
2282
2283 /**
2284 ****************************************************************************************************
2285 *   AddrComputeDccInfo
2286 *
2287 *   @brief
2288 *       Compute DCC key size, base alignment
2289 *       info
2290 ****************************************************************************************************
2291 */
2292 ADDR_E_RETURNCODE ADDR_API AddrComputeDccInfo(
2293     ADDR_HANDLE                             hLib,
2294     const ADDR_COMPUTE_DCCINFO_INPUT*       pIn,
2295     ADDR_COMPUTE_DCCINFO_OUTPUT*            pOut);
2296
2297
2298
2299 /**
2300 ****************************************************************************************************
2301 *   ADDR_GET_MAX_ALIGNMENTS_OUTPUT
2302 *
2303 *   @brief
2304 *       Output structure of AddrGetMaxAlignments
2305 ****************************************************************************************************
2306 */
2307 typedef struct _ADDR_GET_MAX_ALIGNMENTS_OUTPUT
2308 {
2309     UINT_32 size;                   ///< Size of this structure in bytes
2310     UINT_64 baseAlign;              ///< Maximum base alignment in bytes
2311 } ADDR_GET_MAX_ALIGNMENTS_OUTPUT;
2312
2313 /**
2314 ****************************************************************************************************
2315 *   AddrGetMaxAlignments
2316 *
2317 *   @brief
2318 *       Gets maximnum alignments
2319 ****************************************************************************************************
2320 */
2321 ADDR_E_RETURNCODE ADDR_API AddrGetMaxAlignments(
2322     ADDR_HANDLE                     hLib,
2323     ADDR_GET_MAX_ALIGNMENTS_OUTPUT* pOut);
2324
2325
2326
2327 /**
2328 ****************************************************************************************************
2329 *                                Address library interface version 2
2330 *                                    available from Gfx9 hardware
2331 ****************************************************************************************************
2332 *     Addr2ComputeSurfaceInfo()
2333 *     Addr2ComputeSurfaceAddrFromCoord()
2334 *     Addr2ComputeSurfaceCoordFromAddr()
2335
2336 *     Addr2ComputeHtileInfo()
2337 *     Addr2ComputeHtileAddrFromCoord()
2338 *     Addr2ComputeHtileCoordFromAddr()
2339 *
2340 *     Addr2ComputeCmaskInfo()
2341 *     Addr2ComputeCmaskAddrFromCoord()
2342 *     Addr2ComputeCmaskCoordFromAddr()
2343 *
2344 *     Addr2ComputeFmaskInfo()
2345 *     Addr2ComputeFmaskAddrFromCoord()
2346 *     Addr2ComputeFmaskCoordFromAddr()
2347 *
2348 *     Addr2ComputeDccInfo()
2349 *
2350 **/
2351
2352
2353 ////////////////////////////////////////////////////////////////////////////////////////////////////
2354 //                                    Surface functions for Gfx9
2355 ////////////////////////////////////////////////////////////////////////////////////////////////////
2356
2357 /**
2358 ****************************************************************************************************
2359 *   ADDR2_SURFACE_FLAGS
2360 *
2361 *   @brief
2362 *       Surface flags
2363 ****************************************************************************************************
2364 */
2365 typedef union _ADDR2_SURFACE_FLAGS
2366 {
2367     struct
2368     {
2369         UINT_32 color         :  1; ///< This resource is a color buffer, can be used with RTV
2370         UINT_32 depth         :  1; ///< Thie resource is a depth buffer, can be used with DSV
2371         UINT_32 stencil       :  1; ///< Thie resource is a stencil buffer, can be used with DSV
2372         UINT_32 fmask         :  1; ///< This is an fmask surface
2373         UINT_32 overlay       :  1; ///< This is an overlay surface
2374         UINT_32 display       :  1; ///< This resource is displable, can be used with DRV
2375         UINT_32 prt           :  1; ///< This is a partially resident texture
2376         UINT_32 qbStereo      :  1; ///< This is a quad buffer stereo surface
2377         UINT_32 interleaved   :  1; ///< Special flag for interleaved YUV surface padding
2378         UINT_32 texture       :  1; ///< This resource can be used with SRV
2379         UINT_32 unordered     :  1; ///< This resource can be used with UAV
2380         UINT_32 rotated       :  1; ///< This resource is rotated and displable
2381         UINT_32 needEquation  :  1; ///< This resource needs equation to be generated if possible
2382         UINT_32 opt4space     :  1; ///< This resource should be optimized for space
2383         UINT_32 minimizeAlign :  1; ///< This resource should use minimum alignment
2384         UINT_32 reserved      : 17; ///< Reserved bits
2385     };
2386
2387     UINT_32 value;
2388 } ADDR2_SURFACE_FLAGS;
2389
2390 /**
2391 ****************************************************************************************************
2392 *   ADDR2_COMPUTE_SURFACE_INFO_INPUT
2393 *
2394 *   @brief
2395 *       Input structure for Addr2ComputeSurfaceInfo
2396 ****************************************************************************************************
2397 */
2398 typedef struct _ADDR2_COMPUTE_SURFACE_INFO_INPUT
2399 {
2400     UINT_32               size;              ///< Size of this structure in bytes
2401
2402     ADDR2_SURFACE_FLAGS   flags;             ///< Surface flags
2403     AddrSwizzleMode       swizzleMode;       ///< Swizzle Mode for Gfx9
2404     AddrResourceType      resourceType;      ///< Surface type
2405     AddrFormat            format;            ///< Surface format
2406     UINT_32               bpp;               ///< bits per pixel
2407     UINT_32               width;             ///< Width (of mip0), in pixels
2408     UINT_32               height;            ///< Height (of mip0), in pixels
2409     UINT_32               numSlices;         ///< Number surface slice/depth (of mip0),
2410     UINT_32               numMipLevels;      ///< Total mipmap levels.
2411     UINT_32               numSamples;        ///< Number of samples
2412     UINT_32               numFrags;          ///< Number of fragments, leave it zero or the same as
2413                                              ///  number of samples for normal AA; Set it to the
2414                                              ///  number of fragments for EQAA
2415     UINT_32               pitchInElement;    ///< Pitch in elements (blocks for compressed formats)
2416     UINT_32               sliceAlign;        ///< Required slice size in bytes
2417 } ADDR2_COMPUTE_SURFACE_INFO_INPUT;
2418
2419 /**
2420 ****************************************************************************************************
2421 *   ADDR2_MIP_INFO
2422 *
2423 *   @brief
2424 *       Structure that contains information for mip level
2425 *
2426 ****************************************************************************************************
2427 */
2428 typedef struct _ADDR2_MIP_INFO
2429 {
2430     UINT_32             pitch;              ///< Pitch in elements
2431     UINT_32             height;             ///< Padded height in elements
2432     UINT_32             depth;              ///< Padded depth
2433     UINT_32             pixelPitch;         ///< Pitch in pixels
2434     UINT_32             pixelHeight;        ///< Padded height in pixels
2435     UINT_32             equationIndex;      ///< Equation index in the equation table
2436     UINT_64             offset;             ///< Offset in bytes from mip base, should only be used
2437                                             ///< to setup vam surface descriptor, can't be used
2438                                             ///< to setup swizzle pattern
2439     UINT_64             macroBlockOffset;   ///< macro block offset in bytes from mip base
2440     UINT_32             mipTailOffset;      ///< mip tail offset in bytes
2441     UINT_32             mipTailCoordX;      ///< mip tail coord x
2442     UINT_32             mipTailCoordY;      ///< mip tail coord y
2443     UINT_32             mipTailCoordZ;      ///< mip tail coord z
2444 } ADDR2_MIP_INFO;
2445
2446 /**
2447 ****************************************************************************************************
2448 *   ADDR2_COMPUTE_SURFACE_INFO_OUTPUT
2449 *
2450 *   @brief
2451 *       Output structure for Addr2ComputeSurfInfo
2452 *   @note
2453         Element: AddrLib unit for computing. e.g. BCn: 4x4 blocks; R32B32B32: 32bit with 3x pitch
2454         Pixel: Original pixel
2455 ****************************************************************************************************
2456 */
2457 typedef struct _ADDR2_COMPUTE_SURFACE_INFO_OUTPUT
2458 {
2459     UINT_32             size;                 ///< Size of this structure in bytes
2460
2461     UINT_32             pitch;                ///< Pitch in elements (blocks for compressed formats)
2462     UINT_32             height;               ///< Padded height (of mip0) in elements
2463     UINT_32             numSlices;            ///< Padded depth for 3d resource
2464                                               ///< or padded number of slices for 2d array resource
2465     UINT_32             mipChainPitch;        ///< Pitch (of total mip chain) in elements
2466     UINT_32             mipChainHeight;       ///< Padded height (of total mip chain) in elements
2467     UINT_32             mipChainSlice;        ///< Padded depth (of total mip chain)
2468     UINT_64             sliceSize;            ///< Slice (total mip chain) size in bytes
2469     UINT_64             surfSize;             ///< Surface (total mip chain) size in bytes
2470     UINT_32             baseAlign;            ///< Base address alignment
2471     UINT_32             bpp;                  ///< Bits per elements
2472                                               ///  (e.g. blocks for BCn, 1/3 for 96bit)
2473     UINT_32             pixelMipChainPitch;   ///< Mip chain pitch in original pixels
2474     UINT_32             pixelMipChainHeight;  ///< Mip chain height in original pixels
2475     UINT_32             pixelPitch;           ///< Pitch in original pixels
2476     UINT_32             pixelHeight;          ///< Height in original pixels
2477     UINT_32             pixelBits;            ///< Original bits per pixel, passed from input
2478
2479     UINT_32             blockWidth;           ///< Width in element inside one block
2480     UINT_32             blockHeight;          ///< Height in element inside one block
2481     UINT_32             blockSlices;          ///< Slice number inside one block
2482                                               ///< Prt tile is one block, its width/height/slice
2483                                               ///< equals to blcok width/height/slice
2484
2485     BOOL_32             epitchIsHeight;       ///< Whether to use height to program epitch register
2486     /// Stereo info
2487     ADDR_QBSTEREOINFO*  pStereoInfo;          ///< Stereo info, needed if qbStereo flag is TRUE
2488     /// Mip info
2489     ADDR2_MIP_INFO*     pMipInfo;             ///< Pointer to mip information array
2490                                               ///  if it is not NULL, the array is assumed to
2491                                               ///  contain numMipLevels entries
2492
2493     UINT_32             equationIndex;        ///< Equation index in the equation table of mip0
2494     BOOL_32             mipChainInTail;       ///< If whole mipchain falls into mip tail block
2495     UINT_32             firstMipIdInTail;     ///< The id of first mip in tail, if there is no mip
2496                                               ///  in tail, it will be set to number of mip levels
2497 } ADDR2_COMPUTE_SURFACE_INFO_OUTPUT;
2498
2499 /**
2500 ****************************************************************************************************
2501 *   Addr2ComputeSurfaceInfo
2502 *
2503 *   @brief
2504 *       Compute surface width/height/slices/alignments and suitable tiling mode
2505 ****************************************************************************************************
2506 */
2507 ADDR_E_RETURNCODE ADDR_API Addr2ComputeSurfaceInfo(
2508     ADDR_HANDLE                                hLib,
2509     const ADDR2_COMPUTE_SURFACE_INFO_INPUT*    pIn,
2510     ADDR2_COMPUTE_SURFACE_INFO_OUTPUT*         pOut);
2511
2512
2513
2514 /**
2515 ****************************************************************************************************
2516 *   ADDR2_COMPUTE_SURFACE_ADDRFROMCOORD_INPUT
2517 *
2518 *   @brief
2519 *       Input structure for Addr2ComputeSurfaceAddrFromCoord
2520 ****************************************************************************************************
2521 */
2522 typedef struct _ADDR2_COMPUTE_SURFACE_ADDRFROMCOORD_INPUT
2523 {
2524     UINT_32             size;            ///< Size of this structure in bytes
2525
2526     UINT_32             x;               ///< X coordinate
2527     UINT_32             y;               ///< Y coordinate
2528     UINT_32             slice;           ///< Slice index
2529     UINT_32             sample;          ///< Sample index, use fragment index for EQAA
2530     UINT_32             mipId;           ///< the mip ID in mip chain
2531
2532     AddrSwizzleMode     swizzleMode;     ///< Swizzle mode for Gfx9
2533     ADDR2_SURFACE_FLAGS flags;           ///< Surface flags
2534     AddrResourceType    resourceType;    ///< Surface type
2535     UINT_32             bpp;             ///< Bits per pixel
2536     UINT_32             unalignedWidth;  ///< Surface original width (of mip0)
2537     UINT_32             unalignedHeight; ///< Surface original height (of mip0)
2538     UINT_32             numSlices;       ///< Surface original slices (of mip0)
2539     UINT_32             numMipLevels;    ///< Total mipmap levels
2540     UINT_32             numSamples;      ///< Number of samples
2541     UINT_32             numFrags;        ///< Number of fragments, leave it zero or the same as
2542                                          ///  number of samples for normal AA; Set it to the
2543                                          ///  number of fragments for EQAA
2544
2545     UINT_32             pipeBankXor;     ///< Combined swizzle used to do bank/pipe rotation
2546     UINT_32             pitchInElement;  ///< Pitch in elements (blocks for compressed formats)
2547 } ADDR2_COMPUTE_SURFACE_ADDRFROMCOORD_INPUT;
2548
2549 /**
2550 ****************************************************************************************************
2551 *   ADDR2_COMPUTE_SURFACE_ADDRFROMCOORD_OUTPUT
2552 *
2553 *   @brief
2554 *       Output structure for Addr2ComputeSurfaceAddrFromCoord
2555 ****************************************************************************************************
2556 */
2557 typedef struct _ADDR2_COMPUTE_SURFACE_ADDRFROMCOORD_OUTPUT
2558 {
2559     UINT_32    size;             ///< Size of this structure in bytes
2560
2561     UINT_64    addr;             ///< Byte address
2562     UINT_32    bitPosition;      ///< Bit position within surfaceAddr, 0-7.
2563                                  ///  For surface bpp < 8, e.g. FMT_1.
2564     UINT_32    prtBlockIndex;    ///< Index of a PRT tile (64K block)
2565 } ADDR2_COMPUTE_SURFACE_ADDRFROMCOORD_OUTPUT;
2566
2567 /**
2568 ****************************************************************************************************
2569 *   Addr2ComputeSurfaceAddrFromCoord
2570 *
2571 *   @brief
2572 *       Compute surface address from a given coordinate.
2573 ****************************************************************************************************
2574 */
2575 ADDR_E_RETURNCODE ADDR_API Addr2ComputeSurfaceAddrFromCoord(
2576     ADDR_HANDLE                                         hLib,
2577     const ADDR2_COMPUTE_SURFACE_ADDRFROMCOORD_INPUT*    pIn,
2578     ADDR2_COMPUTE_SURFACE_ADDRFROMCOORD_OUTPUT*         pOut);
2579
2580
2581
2582 /**
2583 ****************************************************************************************************
2584 *   ADDR2_COMPUTE_SURFACE_COORDFROMADDR_INPUT
2585 *
2586 *   @brief
2587 *       Input structure for Addr2ComputeSurfaceCoordFromAddr
2588 ****************************************************************************************************
2589 */
2590 typedef struct _ADDR2_COMPUTE_SURFACE_COORDFROMADDR_INPUT
2591 {
2592     UINT_32             size;            ///< Size of this structure in bytes
2593
2594     UINT_64             addr;            ///< Address in bytes
2595     UINT_32             bitPosition;     ///< Bit position in addr. 0-7. for surface bpp < 8,
2596                                          ///  e.g. FMT_1;
2597
2598     AddrSwizzleMode     swizzleMode;     ///< Swizzle mode for Gfx9
2599     ADDR2_SURFACE_FLAGS flags;           ///< Surface flags
2600     AddrResourceType    resourceType;    ///< Surface type
2601     UINT_32             bpp;             ///< Bits per pixel
2602     UINT_32             unalignedWidth;  ///< Surface original width (of mip0)
2603     UINT_32             unalignedHeight; ///< Surface original height (of mip0)
2604     UINT_32             numSlices;       ///< Surface original slices (of mip0)
2605     UINT_32             numMipLevels;    ///< Total mipmap levels.
2606     UINT_32             numSamples;      ///< Number of samples
2607     UINT_32             numFrags;        ///< Number of fragments, leave it zero or the same as
2608                                          ///  number of samples for normal AA; Set it to the
2609                                          ///  number of fragments for EQAA
2610
2611     UINT_32             pipeBankXor;     ///< Combined swizzle used to do bank/pipe rotation
2612     UINT_32             pitchInElement;  ///< Pitch in elements (blocks for compressed formats)
2613 } ADDR2_COMPUTE_SURFACE_COORDFROMADDR_INPUT;
2614
2615 /**
2616 ****************************************************************************************************
2617 *   ADDR2_COMPUTE_SURFACE_COORDFROMADDR_OUTPUT
2618 *
2619 *   @brief
2620 *       Output structure for Addr2ComputeSurfaceCoordFromAddr
2621 ****************************************************************************************************
2622 */
2623 typedef struct _ADDR2_COMPUTE_SURFACE_COORDFROMADDR_OUTPUT
2624 {
2625     UINT_32    size;       ///< Size of this structure in bytes
2626
2627     UINT_32    x;          ///< X coordinate
2628     UINT_32    y;          ///< Y coordinate
2629     UINT_32    slice;      ///< Index of slices
2630     UINT_32    sample;     ///< Index of samples, means fragment index for EQAA
2631     UINT_32    mipId;      ///< mipmap level id
2632 } ADDR2_COMPUTE_SURFACE_COORDFROMADDR_OUTPUT;
2633
2634 /**
2635 ****************************************************************************************************
2636 *   Addr2ComputeSurfaceCoordFromAddr
2637 *
2638 *   @brief
2639 *       Compute coordinate from a given surface address
2640 ****************************************************************************************************
2641 */
2642 ADDR_E_RETURNCODE ADDR_API Addr2ComputeSurfaceCoordFromAddr(
2643     ADDR_HANDLE                                         hLib,
2644     const ADDR2_COMPUTE_SURFACE_COORDFROMADDR_INPUT*    pIn,
2645     ADDR2_COMPUTE_SURFACE_COORDFROMADDR_OUTPUT*         pOut);
2646
2647
2648
2649 ////////////////////////////////////////////////////////////////////////////////////////////////////
2650 //                                   HTile functions for Gfx9
2651 ////////////////////////////////////////////////////////////////////////////////////////////////////
2652
2653 /**
2654 ****************************************************************************************************
2655 *   ADDR2_META_FLAGS
2656 *
2657 *   @brief
2658 *       Metadata flags
2659 ****************************************************************************************************
2660 */
2661 typedef union _ADDR2_META_FLAGS
2662 {
2663     struct
2664     {
2665         UINT_32 pipeAligned :  1;    ///< if Metadata being pipe aligned
2666         UINT_32 rbAligned   :  1;    ///< if Metadata being RB aligned
2667         UINT_32 linear      :  1;    ///< if Metadata linear, GFX9 does not suppord this!
2668         UINT_32 reserved    : 29;    ///< Reserved bits
2669     };
2670
2671     UINT_32 value;
2672 } ADDR2_META_FLAGS;
2673
2674 /**
2675 ****************************************************************************************************
2676 *   ADDR2_META_MIP_INFO
2677 *
2678 *   @brief
2679 *       Structure to store per mip metadata information
2680 ****************************************************************************************************
2681 */
2682 typedef struct _ADDR2_META_MIP_INFO
2683 {
2684     BOOL_32    inMiptail;
2685     union
2686     {
2687         struct
2688         {
2689             UINT_32    startX;
2690             UINT_32    startY;
2691             UINT_32    startZ;
2692             UINT_32    width;
2693             UINT_32    height;
2694             UINT_32    depth;
2695         };
2696
2697         struct
2698         {
2699             UINT_32    offset;
2700             UINT_32    sliceSize;
2701         };
2702     };
2703 } ADDR2_META_MIP_INFO;
2704
2705 /**
2706 ****************************************************************************************************
2707 *   ADDR2_COMPUTE_HTILE_INFO_INPUT
2708 *
2709 *   @brief
2710 *       Input structure of Addr2ComputeHtileInfo
2711 ****************************************************************************************************
2712 */
2713 typedef struct _ADDR2_COMPUTE_HTILE_INFO_INPUT
2714 {
2715     UINT_32             size;               ///< Size of this structure in bytes
2716
2717     ADDR2_META_FLAGS    hTileFlags;         ///< HTILE flags
2718     ADDR2_SURFACE_FLAGS depthFlags;         ///< Depth surface flags
2719     AddrSwizzleMode     swizzleMode;        ///< Depth surface swizzle mode
2720     UINT_32             unalignedWidth;     ///< Depth surface original width (of mip0)
2721     UINT_32             unalignedHeight;    ///< Depth surface original height (of mip0)
2722     UINT_32             numSlices;          ///< Number of slices of depth surface (of mip0)
2723     UINT_32             numMipLevels;       ///< Total mipmap levels of color surface
2724     UINT_32             firstMipIdInTail;
2725 } ADDR2_COMPUTE_HTILE_INFO_INPUT;
2726
2727 /**
2728 ****************************************************************************************************
2729 *   ADDR2_COMPUTE_HTILE_INFO_OUTPUT
2730 *
2731 *   @brief
2732 *       Output structure of Addr2ComputeHtileInfo
2733 ****************************************************************************************************
2734 */
2735 typedef struct _ADDR2_COMPUTE_HTILE_INFO_OUTPUT
2736 {
2737     UINT_32    size;                ///< Size of this structure in bytes
2738
2739     UINT_32    pitch;               ///< Pitch in pixels of depth buffer represented in this
2740                                     ///  HTile buffer. This might be larger than original depth
2741                                     ///  buffer pitch when called with an unaligned pitch.
2742     UINT_32    height;              ///< Height in pixels, as above
2743     UINT_32    baseAlign;           ///< Base alignment
2744     UINT_32    sliceSize;           ///< Slice size, in bytes.
2745     UINT_32    htileBytes;          ///< Size of HTILE buffer, in bytes
2746     UINT_32    metaBlkWidth;        ///< Meta block width
2747     UINT_32    metaBlkHeight;       ///< Meta block height
2748     UINT_32    metaBlkNumPerSlice;  ///< Number of metablock within one slice
2749
2750     ADDR2_META_MIP_INFO* pMipInfo;  ///< HTILE mip information
2751 } ADDR2_COMPUTE_HTILE_INFO_OUTPUT;
2752
2753 /**
2754 ****************************************************************************************************
2755 *   Addr2ComputeHtileInfo
2756 *
2757 *   @brief
2758 *       Compute Htile pitch, height, base alignment and size in bytes
2759 ****************************************************************************************************
2760 */
2761 ADDR_E_RETURNCODE ADDR_API Addr2ComputeHtileInfo(
2762     ADDR_HANDLE                              hLib,
2763     const ADDR2_COMPUTE_HTILE_INFO_INPUT*    pIn,
2764     ADDR2_COMPUTE_HTILE_INFO_OUTPUT*         pOut);
2765
2766
2767
2768 /**
2769 ****************************************************************************************************
2770 *   ADDR2_COMPUTE_HTILE_ADDRFROMCOORD_INPUT
2771 *
2772 *   @brief
2773 *       Input structure for Addr2ComputeHtileAddrFromCoord
2774 ****************************************************************************************************
2775 */
2776 typedef struct _ADDR2_COMPUTE_HTILE_ADDRFROMCOORD_INPUT
2777 {
2778     UINT_32             size;                ///< Size of this structure in bytes
2779
2780     UINT_32             x;                   ///< X coordinate
2781     UINT_32             y;                   ///< Y coordinate
2782     UINT_32             slice;               ///< Index of slices
2783     UINT_32             mipId;               ///< mipmap level id
2784
2785     ADDR2_META_FLAGS    hTileFlags;          ///< HTILE flags
2786     ADDR2_SURFACE_FLAGS depthflags;          ///< Depth surface flags
2787     AddrSwizzleMode     swizzleMode;         ///< Depth surface swizzle mode
2788     UINT_32             bpp;                 ///< Depth surface bits per pixel
2789     UINT_32             unalignedWidth;      ///< Depth surface original width (of mip0)
2790     UINT_32             unalignedHeight;     ///< Depth surface original height (of mip0)
2791     UINT_32             numSlices;           ///< Depth surface original depth (of mip0)
2792     UINT_32             numMipLevels;        ///< Depth surface total mipmap levels
2793     UINT_32             numSamples;          ///< Depth surface number of samples
2794     UINT_32             pipeXor;             ///< Pipe xor setting
2795 } ADDR2_COMPUTE_HTILE_ADDRFROMCOORD_INPUT;
2796
2797 /**
2798 ****************************************************************************************************
2799 *   ADDR2_COMPUTE_HTILE_ADDRFROMCOORD_OUTPUT
2800 *
2801 *   @brief
2802 *       Output structure for Addr2ComputeHtileAddrFromCoord
2803 ****************************************************************************************************
2804 */
2805 typedef struct _ADDR2_COMPUTE_HTILE_ADDRFROMCOORD_OUTPUT
2806 {
2807     UINT_32    size;    ///< Size of this structure in bytes
2808
2809     UINT_64    addr;    ///< Address in bytes
2810 } ADDR2_COMPUTE_HTILE_ADDRFROMCOORD_OUTPUT;
2811
2812 /**
2813 ****************************************************************************************************
2814 *   Addr2ComputeHtileAddrFromCoord
2815 *
2816 *   @brief
2817 *       Compute Htile address according to coordinates (of depth buffer)
2818 ****************************************************************************************************
2819 */
2820 ADDR_E_RETURNCODE ADDR_API Addr2ComputeHtileAddrFromCoord(
2821     ADDR_HANDLE                                       hLib,
2822     const ADDR2_COMPUTE_HTILE_ADDRFROMCOORD_INPUT*    pIn,
2823     ADDR2_COMPUTE_HTILE_ADDRFROMCOORD_OUTPUT*         pOut);
2824
2825
2826
2827 /**
2828 ****************************************************************************************************
2829 *   ADDR2_COMPUTE_HTILE_COORDFROMADDR_INPUT
2830 *
2831 *   @brief
2832 *       Input structure for Addr2ComputeHtileCoordFromAddr
2833 ****************************************************************************************************
2834 */
2835 typedef struct _ADDR2_COMPUTE_HTILE_COORDFROMADDR_INPUT
2836 {
2837     UINT_32             size;                ///< Size of this structure in bytes
2838
2839     UINT_64             addr;                ///< Address
2840
2841     ADDR2_META_FLAGS    hTileFlags;          ///< HTILE flags
2842     ADDR2_SURFACE_FLAGS depthFlags;          ///< Depth surface flags
2843     AddrSwizzleMode     swizzleMode;         ///< Depth surface swizzle mode
2844     UINT_32             bpp;                 ///< Depth surface bits per pixel
2845     UINT_32             unalignedWidth;      ///< Depth surface original width (of mip0)
2846     UINT_32             unalignedHeight;     ///< Depth surface original height (of mip0)
2847     UINT_32             numSlices;           ///< Depth surface original depth (of mip0)
2848     UINT_32             numMipLevels;        ///< Depth surface total mipmap levels
2849     UINT_32             numSamples;          ///< Depth surface number of samples
2850     UINT_32             pipeXor;             ///< Pipe xor setting
2851 } ADDR2_COMPUTE_HTILE_COORDFROMADDR_INPUT;
2852
2853 /**
2854 ****************************************************************************************************
2855 *   ADDR2_COMPUTE_HTILE_COORDFROMADDR_OUTPUT
2856 *
2857 *   @brief
2858 *       Output structure for Addr2ComputeHtileCoordFromAddr
2859 ****************************************************************************************************
2860 */
2861 typedef struct _ADDR2_COMPUTE_HTILE_COORDFROMADDR_OUTPUT
2862 {
2863     UINT_32    size;        ///< Size of this structure in bytes
2864
2865     UINT_32    x;           ///< X coordinate
2866     UINT_32    y;           ///< Y coordinate
2867     UINT_32    slice;       ///< Index of slices
2868     UINT_32    mipId;       ///< mipmap level id
2869 } ADDR2_COMPUTE_HTILE_COORDFROMADDR_OUTPUT;
2870
2871 /**
2872 ****************************************************************************************************
2873 *   Addr2ComputeHtileCoordFromAddr
2874 *
2875 *   @brief
2876 *       Compute coordinates within depth buffer (1st pixel of a micro tile) according to
2877 *       Htile address
2878 ****************************************************************************************************
2879 */
2880 ADDR_E_RETURNCODE ADDR_API Addr2ComputeHtileCoordFromAddr(
2881     ADDR_HANDLE                                       hLib,
2882     const ADDR2_COMPUTE_HTILE_COORDFROMADDR_INPUT*    pIn,
2883     ADDR2_COMPUTE_HTILE_COORDFROMADDR_OUTPUT*         pOut);
2884
2885
2886
2887 ////////////////////////////////////////////////////////////////////////////////////////////////////
2888 //                                     C-mask functions for Gfx9
2889 ////////////////////////////////////////////////////////////////////////////////////////////////////
2890
2891 /**
2892 ****************************************************************************************************
2893 *   ADDR2_COMPUTE_CMASK_INFO_INPUT
2894 *
2895 *   @brief
2896 *       Input structure of Addr2ComputeCmaskInfo
2897 ****************************************************************************************************
2898 */
2899 typedef struct _ADDR2_COMPUTE_CMASKINFO_INPUT
2900 {
2901     UINT_32             size;               ///< Size of this structure in bytes
2902
2903     ADDR2_META_FLAGS    cMaskFlags;         ///< CMASK flags
2904     ADDR2_SURFACE_FLAGS colorFlags;         ///< Color surface flags
2905     AddrResourceType    resourceType;       ///< Color surface type
2906     AddrSwizzleMode     swizzleMode;        ///< FMask surface swizzle mode
2907     UINT_32             unalignedWidth;     ///< Color surface original width
2908     UINT_32             unalignedHeight;    ///< Color surface original height
2909     UINT_32             numSlices;          ///< Number of slices of color buffer
2910 } ADDR2_COMPUTE_CMASK_INFO_INPUT;
2911
2912 /**
2913 ****************************************************************************************************
2914 *   ADDR2_COMPUTE_CMASK_INFO_OUTPUT
2915 *
2916 *   @brief
2917 *       Output structure of Addr2ComputeCmaskInfo
2918 ****************************************************************************************************
2919 */
2920 typedef struct _ADDR2_COMPUTE_CMASK_INFO_OUTPUT
2921 {
2922     UINT_32    size;          ///< Size of this structure in bytes
2923
2924     UINT_32    pitch;         ///< Pitch in pixels of color buffer which
2925                               ///  this Cmask matches. The size might be larger than
2926                               ///  original color buffer pitch when called with
2927                               ///  an unaligned pitch.
2928     UINT_32    height;        ///< Height in pixels, as above
2929     UINT_32    baseAlign;     ///< Base alignment
2930     UINT_32    sliceSize;     ///< Slice size, in bytes.
2931     UINT_32    cmaskBytes;    ///< Size in bytes of CMask buffer
2932     UINT_32    metaBlkWidth;  ///< Meta block width
2933     UINT_32    metaBlkHeight; ///< Meta block height
2934
2935     UINT_32    metaBlkNumPerSlice; ///< Number of metablock within one slice
2936 } ADDR2_COMPUTE_CMASK_INFO_OUTPUT;
2937
2938 /**
2939 ****************************************************************************************************
2940 *   Addr2ComputeCmaskInfo
2941 *
2942 *   @brief
2943 *       Compute Cmask pitch, height, base alignment and size in bytes from color buffer
2944 *       info
2945 ****************************************************************************************************
2946 */
2947 ADDR_E_RETURNCODE ADDR_API Addr2ComputeCmaskInfo(
2948     ADDR_HANDLE                              hLib,
2949     const ADDR2_COMPUTE_CMASK_INFO_INPUT*    pIn,
2950     ADDR2_COMPUTE_CMASK_INFO_OUTPUT*         pOut);
2951
2952
2953
2954 /**
2955 ****************************************************************************************************
2956 *   ADDR2_COMPUTE_CMASK_ADDRFROMCOORD_INPUT
2957 *
2958 *   @brief
2959 *       Input structure for Addr2ComputeCmaskAddrFromCoord
2960 *
2961 ****************************************************************************************************
2962 */
2963 typedef struct _ADDR2_COMPUTE_CMASK_ADDRFROMCOORD_INPUT
2964 {
2965     UINT_32             size;                ///< Size of this structure in bytes
2966
2967     UINT_32             x;                   ///< X coordinate
2968     UINT_32             y;                   ///< Y coordinate
2969     UINT_32             slice;               ///< Index of slices
2970
2971     ADDR2_META_FLAGS    cMaskFlags;          ///< CMASK flags
2972     ADDR2_SURFACE_FLAGS colorFlags;          ///< Color surface flags
2973     AddrResourceType    resourceType;        ///< Color surface type
2974     AddrSwizzleMode     swizzleMode;         ///< FMask surface swizzle mode
2975
2976     UINT_32             unalignedWidth;      ///< Color surface original width (of mip0)
2977     UINT_32             unalignedHeight;     ///< Color surface original height (of mip0)
2978     UINT_32             numSlices;           ///< Color surface original slices (of mip0)
2979
2980     UINT_32             numSamples;          ///< Color surfae sample number
2981     UINT_32             numFrags;            ///< Color surface fragment number
2982
2983     UINT_32             pipeXor;             ///< pipe Xor setting
2984 } ADDR2_COMPUTE_CMASK_ADDRFROMCOORD_INPUT;
2985
2986 /**
2987 ****************************************************************************************************
2988 *   ADDR2_COMPUTE_CMASK_ADDRFROMCOORD_OUTPUT
2989 *
2990 *   @brief
2991 *       Output structure for Addr2ComputeCmaskAddrFromCoord
2992 ****************************************************************************************************
2993 */
2994 typedef struct _ADDR2_COMPUTE_CMASK_ADDRFROMCOORD_OUTPUT
2995 {
2996     UINT_32    size;           ///< Size of this structure in bytes
2997
2998     UINT_64    addr;           ///< CMASK address in bytes
2999     UINT_32    bitPosition;    ///< Bit position within addr, 0 or 4
3000 } ADDR2_COMPUTE_CMASK_ADDRFROMCOORD_OUTPUT;
3001
3002 /**
3003 ****************************************************************************************************
3004 *   Addr2ComputeCmaskAddrFromCoord
3005 *
3006 *   @brief
3007 *       Compute Cmask address according to coordinates (of MSAA color buffer)
3008 ****************************************************************************************************
3009 */
3010 ADDR_E_RETURNCODE ADDR_API Addr2ComputeCmaskAddrFromCoord(
3011     ADDR_HANDLE                                      hLib,
3012     const ADDR2_COMPUTE_CMASK_ADDRFROMCOORD_INPUT*   pIn,
3013     ADDR2_COMPUTE_CMASK_ADDRFROMCOORD_OUTPUT*        pOut);
3014
3015
3016
3017 /**
3018 ****************************************************************************************************
3019 *   ADDR2_COMPUTE_CMASK_COORDFROMADDR_INPUT
3020 *
3021 *   @brief
3022 *       Input structure for Addr2ComputeCmaskCoordFromAddr
3023 ****************************************************************************************************
3024 */
3025 typedef struct _ADDR2_COMPUTE_CMASK_COORDFROMADDR_INPUT
3026 {
3027     UINT_32             size;                ///< Size of this structure in bytes
3028
3029     UINT_64             addr;                ///< CMASK address in bytes
3030     UINT_32             bitPosition;         ///< Bit position within addr, 0 or 4
3031
3032     ADDR2_META_FLAGS    cMaskFlags;          ///< CMASK flags
3033     ADDR2_SURFACE_FLAGS colorFlags;          ///< Color surface flags
3034     AddrResourceType    resourceType;        ///< Color surface type
3035     AddrSwizzleMode     swizzleMode;         ///< FMask surface swizzle mode
3036
3037     UINT_32             unalignedWidth;      ///< Color surface original width (of mip0)
3038     UINT_32             unalignedHeight;     ///< Color surface original height (of mip0)
3039     UINT_32             numSlices;           ///< Color surface original slices (of mip0)
3040     UINT_32             numMipLevels;        ///< Color surface total mipmap levels.
3041 } ADDR2_COMPUTE_CMASK_COORDFROMADDR_INPUT;
3042
3043 /**
3044 ****************************************************************************************************
3045 *   ADDR2_COMPUTE_CMASK_COORDFROMADDR_OUTPUT
3046 *
3047 *   @brief
3048 *       Output structure for Addr2ComputeCmaskCoordFromAddr
3049 ****************************************************************************************************
3050 */
3051 typedef struct _ADDR2_COMPUTE_CMASK_COORDFROMADDR_OUTPUT
3052 {
3053     UINT_32    size;        ///< Size of this structure in bytes
3054
3055     UINT_32    x;           ///< X coordinate
3056     UINT_32    y;           ///< Y coordinate
3057     UINT_32    slice;       ///< Index of slices
3058     UINT_32    mipId;       ///< mipmap level id
3059 } ADDR2_COMPUTE_CMASK_COORDFROMADDR_OUTPUT;
3060
3061 /**
3062 ****************************************************************************************************
3063 *   Addr2ComputeCmaskCoordFromAddr
3064 *
3065 *   @brief
3066 *       Compute coordinates within color buffer (1st pixel of a micro tile) according to
3067 *       Cmask address
3068 ****************************************************************************************************
3069 */
3070 ADDR_E_RETURNCODE ADDR_API Addr2ComputeCmaskCoordFromAddr(
3071     ADDR_HANDLE                                       hLib,
3072     const ADDR2_COMPUTE_CMASK_COORDFROMADDR_INPUT*    pIn,
3073     ADDR2_COMPUTE_CMASK_COORDFROMADDR_OUTPUT*         pOut);
3074
3075
3076
3077 ////////////////////////////////////////////////////////////////////////////////////////////////////
3078 //                                     F-mask functions for Gfx9
3079 ////////////////////////////////////////////////////////////////////////////////////////////////////
3080
3081 /**
3082 ****************************************************************************************************
3083 *   ADDR2_FMASK_FLAGS
3084 *
3085 *   @brief
3086 *       FMASK flags
3087 ****************************************************************************************************
3088 */
3089 typedef union _ADDR2_FMASK_FLAGS
3090 {
3091     struct
3092     {
3093         UINT_32 resolved :  1;    ///< TRUE if this is a resolved fmask, used by H/W clients
3094                                   ///  by H/W clients. S/W should always set it to FALSE.
3095         UINT_32 reserved : 31;    ///< Reserved for future use.
3096     };
3097
3098     UINT_32 value;
3099 } ADDR2_FMASK_FLAGS;
3100
3101 /**
3102 ****************************************************************************************************
3103 *   ADDR2_COMPUTE_FMASK_INFO_INPUT
3104 *
3105 *   @brief
3106 *       Input structure for Addr2ComputeFmaskInfo
3107 ****************************************************************************************************
3108 */
3109 typedef struct _ADDR2_COMPUTE_FMASK_INFO_INPUT
3110 {
3111     UINT_32             size;               ///< Size of this structure in bytes
3112
3113     AddrSwizzleMode     swizzleMode;        ///< FMask surface swizzle mode
3114     UINT_32             unalignedWidth;     ///< Color surface original width
3115     UINT_32             unalignedHeight;    ///< Color surface original height
3116     UINT_32             numSlices;          ///< Number of slices/depth
3117     UINT_32             numSamples;         ///< Number of samples
3118     UINT_32             numFrags;           ///< Number of fragments, leave it zero or the same as
3119                                             ///  number of samples for normal AA; Set it to the
3120                                             ///  number of fragments for EQAA
3121     ADDR2_FMASK_FLAGS   fMaskFlags;         ///< FMASK flags
3122 } ADDR2_COMPUTE_FMASK_INFO_INPUT;
3123
3124 /**
3125 ****************************************************************************************************
3126 *   ADDR2_COMPUTE_FMASK_INFO_OUTPUT
3127 *
3128 *   @brief
3129 *       Output structure for Addr2ComputeFmaskInfo
3130 ****************************************************************************************************
3131 */
3132 typedef struct _ADDR2_COMPUTE_FMASK_INFO_OUTPUT
3133 {
3134     UINT_32    size;           ///< Size of this structure in bytes
3135
3136     UINT_32    pitch;          ///< Pitch of fmask in pixels
3137     UINT_32    height;         ///< Height of fmask in pixels
3138     UINT_32    baseAlign;      ///< Base alignment
3139     UINT_32    numSlices;      ///< Slices of fmask
3140     UINT_32    fmaskBytes;     ///< Size of fmask in bytes
3141     UINT_32    bpp;            ///< Bits per pixel of FMASK is: number of bit planes
3142     UINT_32    numSamples;     ///< Number of samples
3143     UINT_32    sliceSize;      ///< Size of slice in bytes
3144 } ADDR2_COMPUTE_FMASK_INFO_OUTPUT;
3145
3146 /**
3147 ****************************************************************************************************
3148 *   Addr2ComputeFmaskInfo
3149 *
3150 *   @brief
3151 *       Compute Fmask pitch/height/slices/alignments and size in bytes
3152 ****************************************************************************************************
3153 */
3154 ADDR_E_RETURNCODE ADDR_API Addr2ComputeFmaskInfo(
3155     ADDR_HANDLE                              hLib,
3156     const ADDR2_COMPUTE_FMASK_INFO_INPUT*    pIn,
3157     ADDR2_COMPUTE_FMASK_INFO_OUTPUT*         pOut);
3158
3159
3160
3161 /**
3162 ****************************************************************************************************
3163 *   ADDR2_COMPUTE_FMASK_ADDRFROMCOORD_INPUT
3164 *
3165 *   @brief
3166 *       Input structure for Addr2ComputeFmaskAddrFromCoord
3167 ****************************************************************************************************
3168 */
3169 typedef struct _ADDR2_COMPUTE_FMASK_ADDRFROMCOORD_INPUT
3170 {
3171     UINT_32            size;               ///< Size of this structure in bytes
3172
3173     AddrSwizzleMode    swizzleMode;        ///< FMask surface swizzle mode
3174     UINT_32            x;                  ///< X coordinate
3175     UINT_32            y;                  ///< Y coordinate
3176     UINT_32            slice;              ///< Slice index
3177     UINT_32            sample;             ///< Sample index (fragment index for EQAA)
3178     UINT_32            plane;              ///< Plane number
3179
3180     UINT_32            unalignedWidth;     ///< Color surface original width
3181     UINT_32            unalignedHeight;    ///< Color surface original height
3182     UINT_32            numSamples;         ///< Number of samples
3183     UINT_32            numFrags;           ///< Number of fragments, leave it zero or the same as
3184                                            ///  number of samples for normal AA; Set it to the
3185                                            ///  number of fragments for EQAA
3186     UINT_32            tileSwizzle;        ///< Combined swizzle used to do bank/pipe rotation
3187
3188     ADDR2_FMASK_FLAGS  fMaskFlags; ///< FMASK flags
3189 } ADDR2_COMPUTE_FMASK_ADDRFROMCOORD_INPUT;
3190
3191 /**
3192 ****************************************************************************************************
3193 *   ADDR2_COMPUTE_FMASK_ADDRFROMCOORD_OUTPUT
3194 *
3195 *   @brief
3196 *       Output structure for Addr2ComputeFmaskAddrFromCoord
3197 ****************************************************************************************************
3198 */
3199 typedef struct _ADDR2_COMPUTE_FMASK_ADDRFROMCOORD_OUTPUT
3200 {
3201     UINT_32    size;           ///< Size of this structure in bytes
3202
3203     UINT_64    addr;           ///< Fmask address
3204     UINT_32    bitPosition;    ///< Bit position within fmaskAddr, 0-7.
3205 } ADDR2_COMPUTE_FMASK_ADDRFROMCOORD_OUTPUT;
3206
3207 /**
3208 ****************************************************************************************************
3209 *   Addr2ComputeFmaskAddrFromCoord
3210 *
3211 *   @brief
3212 *       Compute Fmask address according to coordinates (x,y,slice,sample,plane)
3213 ****************************************************************************************************
3214 */
3215 ADDR_E_RETURNCODE ADDR_API Addr2ComputeFmaskAddrFromCoord(
3216     ADDR_HANDLE                                       hLib,
3217     const ADDR2_COMPUTE_FMASK_ADDRFROMCOORD_INPUT*    pIn,
3218     ADDR2_COMPUTE_FMASK_ADDRFROMCOORD_OUTPUT*         pOut);
3219
3220
3221
3222 /**
3223 ****************************************************************************************************
3224 *   ADDR2_COMPUTE_FMASK_COORDFROMADDR_INPUT
3225 *
3226 *   @brief
3227 *       Input structure for Addr2ComputeFmaskCoordFromAddr
3228 ****************************************************************************************************
3229 */
3230 typedef struct _ADDR2_COMPUTE_FMASK_COORDFROMADDR_INPUT
3231 {
3232     UINT_32            size;               ///< Size of this structure in bytes
3233
3234     UINT_64            addr;               ///< Address
3235     UINT_32            bitPosition;        ///< Bit position within addr, 0-7.
3236     AddrSwizzleMode    swizzleMode;        ///< FMask surface swizzle mode
3237
3238     UINT_32            unalignedWidth;     ///< Color surface original width
3239     UINT_32            unalignedHeight;    ///< Color surface original height
3240     UINT_32            numSamples;         ///< Number of samples
3241     UINT_32            numFrags;           ///< Number of fragments
3242
3243     UINT_32            tileSwizzle;        ///< Combined swizzle used to do bank/pipe rotation
3244
3245     ADDR2_FMASK_FLAGS  fMaskFlags; ///< FMASK flags
3246 } ADDR2_COMPUTE_FMASK_COORDFROMADDR_INPUT;
3247
3248 /**
3249 ****************************************************************************************************
3250 *   ADDR2_COMPUTE_FMASK_COORDFROMADDR_OUTPUT
3251 *
3252 *   @brief
3253 *       Output structure for Addr2ComputeFmaskCoordFromAddr
3254 ****************************************************************************************************
3255 */
3256 typedef struct _ADDR2_COMPUTE_FMASK_COORDFROMADDR_OUTPUT
3257 {
3258     UINT_32    size;      ///< Size of this structure in bytes
3259
3260     UINT_32    x;         ///< X coordinate
3261     UINT_32    y;         ///< Y coordinate
3262     UINT_32    slice;     ///< Slice index
3263     UINT_32    sample;    ///< Sample index (fragment index for EQAA)
3264     UINT_32    plane;     ///< Plane number
3265 } ADDR2_COMPUTE_FMASK_COORDFROMADDR_OUTPUT;
3266
3267 /**
3268 ****************************************************************************************************
3269 *   Addr2ComputeFmaskCoordFromAddr
3270 *
3271 *   @brief
3272 *       Compute FMASK coordinate from an given address
3273 ****************************************************************************************************
3274 */
3275 ADDR_E_RETURNCODE ADDR_API Addr2ComputeFmaskCoordFromAddr(
3276     ADDR_HANDLE                                       hLib,
3277     const ADDR2_COMPUTE_FMASK_COORDFROMADDR_INPUT*    pIn,
3278     ADDR2_COMPUTE_FMASK_COORDFROMADDR_OUTPUT*         pOut);
3279
3280
3281
3282 ////////////////////////////////////////////////////////////////////////////////////////////////////
3283 //                                     DCC key functions for Gfx9
3284 ////////////////////////////////////////////////////////////////////////////////////////////////////
3285
3286 /**
3287 ****************************************************************************************************
3288 *   _ADDR2_COMPUTE_DCCINFO_INPUT
3289 *
3290 *   @brief
3291 *       Input structure of Addr2ComputeDccInfo
3292 ****************************************************************************************************
3293 */
3294 typedef struct _ADDR2_COMPUTE_DCCINFO_INPUT
3295 {
3296     UINT_32             size;               ///< Size of this structure in bytes
3297
3298     ADDR2_META_FLAGS    dccKeyFlags;        ///< DCC key flags
3299     ADDR2_SURFACE_FLAGS colorFlags;         ///< Color surface flags
3300     AddrResourceType    resourceType;       ///< Color surface type
3301     AddrSwizzleMode     swizzleMode;        ///< Color surface swizzle mode
3302     UINT_32             bpp;                ///< bits per pixel
3303     UINT_32             unalignedWidth;     ///< Color surface original width (of mip0)
3304     UINT_32             unalignedHeight;    ///< Color surface original height (of mip0)
3305     UINT_32             numSlices;          ///< Number of slices, of color surface (of mip0)
3306     UINT_32             numFrags;           ///< Fragment number of color surface
3307     UINT_32             numMipLevels;       ///< Total mipmap levels of color surface
3308     UINT_32             dataSurfaceSize;    ///< The padded size of all slices and mip levels
3309                                             ///< useful in meta linear case
3310     UINT_32             firstMipIdInTail;
3311 } ADDR2_COMPUTE_DCCINFO_INPUT;
3312
3313 /**
3314 ****************************************************************************************************
3315 *   ADDR2_COMPUTE_DCCINFO_OUTPUT
3316 *
3317 *   @brief
3318 *       Output structure of Addr2ComputeDccInfo
3319 ****************************************************************************************************
3320 */
3321 typedef struct _ADDR2_COMPUTE_DCCINFO_OUTPUT
3322 {
3323     UINT_32    size;               ///< Size of this structure in bytes
3324
3325     UINT_32    dccRamBaseAlign;    ///< Base alignment of dcc key
3326     UINT_32    dccRamSize;         ///< Size of dcc key
3327
3328     UINT_32    pitch;              ///< DCC surface mip chain pitch
3329     UINT_32    height;             ///< DCC surface mip chain height
3330     UINT_32    depth;              ///< DCC surface mip chain depth
3331
3332     UINT_32    compressBlkWidth;   ///< DCC compress block width
3333     UINT_32    compressBlkHeight;  ///< DCC compress block height
3334     UINT_32    compressBlkDepth;   ///< DCC compress block depth
3335
3336     UINT_32    metaBlkWidth;       ///< DCC meta block width
3337     UINT_32    metaBlkHeight;      ///< DCC meta block height
3338     UINT_32    metaBlkDepth;       ///< DCC meta block depth
3339
3340     UINT_32    metaBlkNumPerSlice; ///< Number of metablock within one slice
3341
3342     union
3343     {
3344         UINT_32 fastClearSizePerSlice;  ///< Size of DCC within a slice should be fast cleared
3345         UINT_32 dccRamSliceSize;
3346     };
3347
3348     ADDR2_META_MIP_INFO* pMipInfo;      ///< DCC mip information
3349 } ADDR2_COMPUTE_DCCINFO_OUTPUT;
3350
3351 /**
3352 ****************************************************************************************************
3353 *   Addr2ComputeDccInfo
3354 *
3355 *   @brief
3356 *       Compute DCC key size, base alignment
3357 *       info
3358 ****************************************************************************************************
3359 */
3360 ADDR_E_RETURNCODE ADDR_API Addr2ComputeDccInfo(
3361     ADDR_HANDLE                           hLib,
3362     const ADDR2_COMPUTE_DCCINFO_INPUT*    pIn,
3363     ADDR2_COMPUTE_DCCINFO_OUTPUT*         pOut);
3364
3365
3366 /**
3367 ****************************************************************************************************
3368 *   ADDR2_COMPUTE_DCC_ADDRFROMCOORD_INPUT
3369 *
3370 *   @brief
3371 *       Input structure for Addr2ComputeDccAddrFromCoord
3372 *
3373 ****************************************************************************************************
3374 */
3375 typedef struct _ADDR2_COMPUTE_DCC_ADDRFROMCOORD_INPUT
3376 {
3377     UINT_32             size;                ///< Size of this structure in bytes
3378
3379     UINT_32             x;                   ///< X coordinate
3380     UINT_32             y;                   ///< Y coordinate
3381     UINT_32             slice;               ///< Index of slices
3382     UINT_32             sample;              ///< Index of samples, means fragment index for EQAA
3383     UINT_32             mipId;               ///< mipmap level id
3384
3385     ADDR2_META_FLAGS    dccKeyFlags;         ///< DCC flags
3386     ADDR2_SURFACE_FLAGS colorFlags;          ///< Color surface flags
3387     AddrResourceType    resourceType;        ///< Color surface type
3388     AddrSwizzleMode     swizzleMode;         ///< Color surface swizzle mode
3389     UINT_32             bpp;                 ///< Color surface bits per pixel
3390     UINT_32             unalignedWidth;      ///< Color surface original width (of mip0)
3391     UINT_32             unalignedHeight;     ///< Color surface original height (of mip0)
3392     UINT_32             numSlices;           ///< Color surface original slices (of mip0)
3393     UINT_32             numMipLevels;        ///< Color surface mipmap levels
3394     UINT_32             numFrags;            ///< Color surface fragment number
3395
3396     UINT_32             pipeXor;             ///< pipe Xor setting
3397 } ADDR2_COMPUTE_DCC_ADDRFROMCOORD_INPUT;
3398
3399 /**
3400 ****************************************************************************************************
3401 *   ADDR2_COMPUTE_DCC_ADDRFROMCOORD_OUTPUT
3402 *
3403 *   @brief
3404 *       Output structure for Addr2ComputeDccAddrFromCoord
3405 ****************************************************************************************************
3406 */
3407 typedef struct _ADDR2_COMPUTE_DCC_ADDRFROMCOORD_OUTPUT
3408 {
3409     UINT_32    size;           ///< Size of this structure in bytes
3410
3411     UINT_64    addr;           ///< DCC address in bytes
3412 } ADDR2_COMPUTE_DCC_ADDRFROMCOORD_OUTPUT;
3413
3414 /**
3415 ****************************************************************************************************
3416 *   Addr2ComputeDccAddrFromCoord
3417 *
3418 *   @brief
3419 *       Compute DCC address according to coordinates (of MSAA color buffer)
3420 ****************************************************************************************************
3421 */
3422 ADDR_E_RETURNCODE ADDR_API Addr2ComputeDccAddrFromCoord(
3423     ADDR_HANDLE                                    hLib,
3424     const ADDR2_COMPUTE_DCC_ADDRFROMCOORD_INPUT*   pIn,
3425     ADDR2_COMPUTE_DCC_ADDRFROMCOORD_OUTPUT*        pOut);
3426
3427 ////////////////////////////////////////////////////////////////////////////////////////////////////
3428 //                                     Misc functions for Gfx9
3429 ////////////////////////////////////////////////////////////////////////////////////////////////////
3430
3431 /**
3432 ****************************************************************************************************
3433 *   ADDR2_COMPUTE_PIPEBANKXOR_INPUT
3434 *
3435 *   @brief
3436 *       Input structure of Addr2ComputePipebankXor
3437 ****************************************************************************************************
3438 */
3439 typedef struct _ADDR2_COMPUTE_PIPEBANKXOR_INPUT
3440 {
3441     UINT_32             size;               ///< Size of this structure in bytes
3442     UINT_32             surfIndex;          ///< Input surface index
3443     ADDR2_SURFACE_FLAGS flags;              ///< Surface flag
3444     AddrSwizzleMode     swizzleMode;        ///< Surface swizzle mode
3445     AddrResourceType    resourceType;       ///< Surface resource type
3446     AddrFormat          format;             ///< Surface format
3447     UINT_32             numSamples;         ///< Number of samples
3448     UINT_32             numFrags;           ///< Number of fragments, leave it zero or the same as
3449                                             ///  number of samples for normal AA; Set it to the
3450                                             ///  number of fragments for EQAA
3451 } ADDR2_COMPUTE_PIPEBANKXOR_INPUT;
3452
3453 /**
3454 ****************************************************************************************************
3455 *   ADDR2_COMPUTE_PIPEBANKXOR_OUTPUT
3456 *
3457 *   @brief
3458 *       Output structure of Addr2ComputePipebankXor
3459 ****************************************************************************************************
3460 */
3461 typedef struct _ADDR2_COMPUTE_PIPEBANKXOR_OUTPUT
3462 {
3463     UINT_32             size;               ///< Size of this structure in bytes
3464     UINT_32             pipeBankXor;        ///< Pipe bank xor
3465 } ADDR2_COMPUTE_PIPEBANKXOR_OUTPUT;
3466
3467 /**
3468 ****************************************************************************************************
3469 *   Addr2ComputePipeBankXor
3470 *
3471 *   @brief
3472 *       Calculate a valid bank pipe xor value for client to use.
3473 ****************************************************************************************************
3474 */
3475 ADDR_E_RETURNCODE ADDR_API Addr2ComputePipeBankXor(
3476     ADDR_HANDLE                            hLib,
3477     const ADDR2_COMPUTE_PIPEBANKXOR_INPUT* pIn,
3478     ADDR2_COMPUTE_PIPEBANKXOR_OUTPUT*      pOut);
3479
3480 /**
3481 ****************************************************************************************************
3482 *   ADDR2_COMPUTE_SLICE_PIPEBANKXOR_INPUT
3483 *
3484 *   @brief
3485 *       Input structure of Addr2ComputeSlicePipeBankXor
3486 ****************************************************************************************************
3487 */
3488 typedef struct _ADDR2_COMPUTE_SLICE_PIPEBANKXOR_INPUT
3489 {
3490     UINT_32             size;               ///< Size of this structure in bytes
3491     AddrSwizzleMode     swizzleMode;        ///< Surface swizzle mode
3492     AddrResourceType    resourceType;       ///< Surface resource type
3493     UINT_32             basePipeBankXor;    ///< Base pipe bank xor
3494     UINT_32             slice;              ///< Slice id
3495     UINT_32             numSamples;         ///< Number of samples
3496 } ADDR2_COMPUTE_SLICE_PIPEBANKXOR_INPUT;
3497
3498 /**
3499 ****************************************************************************************************
3500 *   ADDR2_COMPUTE_SLICE_PIPEBANKXOR_OUTPUT
3501 *
3502 *   @brief
3503 *       Output structure of Addr2ComputeSlicePipeBankXor
3504 ****************************************************************************************************
3505 */
3506 typedef struct _ADDR2_COMPUTE_SLICE_PIPEBANKXOR_OUTPUT
3507 {
3508     UINT_32             size;               ///< Size of this structure in bytes
3509     UINT_32             pipeBankXor;        ///< Pipe bank xor
3510 } ADDR2_COMPUTE_SLICE_PIPEBANKXOR_OUTPUT;
3511
3512 /**
3513 ****************************************************************************************************
3514 *   Addr2ComputeSlicePipeBankXor
3515 *
3516 *   @brief
3517 *       Calculate slice pipe bank xor value based on base pipe bank xor and slice id.
3518 ****************************************************************************************************
3519 */
3520 ADDR_E_RETURNCODE ADDR_API Addr2ComputeSlicePipeBankXor(
3521     ADDR_HANDLE                                  hLib,
3522     const ADDR2_COMPUTE_SLICE_PIPEBANKXOR_INPUT* pIn,
3523     ADDR2_COMPUTE_SLICE_PIPEBANKXOR_OUTPUT*      pOut);
3524
3525 /**
3526 ****************************************************************************************************
3527 *   ADDR2_COMPUTE_SUBRESOURCE_OFFSET_FORSWIZZLEPATTERN_INPUT
3528 *
3529 *   @brief
3530 *       Input structure of Addr2ComputeSubResourceOffsetForSwizzlePattern
3531 ****************************************************************************************************
3532 */
3533 typedef struct _ADDR2_COMPUTE_SUBRESOURCE_OFFSET_FORSWIZZLEPATTERN_INPUT
3534 {
3535     UINT_32             size;               ///< Size of this structure in bytes
3536     AddrSwizzleMode     swizzleMode;        ///< Surface swizzle mode
3537     AddrResourceType    resourceType;       ///< Surface resource type
3538     UINT_32             pipeBankXor;        ///< Per resource xor
3539     UINT_32             slice;              ///< Slice id
3540     UINT_64             sliceSize;          ///< Slice size of a mip chain
3541     UINT_64             macroBlockOffset;   ///< Macro block offset, returned in ADDR2_MIP_INFO
3542     UINT_32             mipTailOffset;      ///< Mip tail offset, returned in ADDR2_MIP_INFO
3543 } ADDR2_COMPUTE_SUBRESOURCE_OFFSET_FORSWIZZLEPATTERN_INPUT;
3544
3545 /**
3546 ****************************************************************************************************
3547 *   ADDR2_COMPUTE_SUBRESOURCE_OFFSET_FORSWIZZLEPATTERN_OUTPUT
3548 *
3549 *   @brief
3550 *       Output structure of Addr2ComputeSubResourceOffsetForSwizzlePattern
3551 ****************************************************************************************************
3552 */
3553 typedef struct _ADDR2_COMPUTE_SUBRESOURCE_OFFSET_FORSWIZZLEPATTERN_OUTPUT
3554 {
3555     UINT_32             size;               ///< Size of this structure in bytes
3556     UINT_64             offset;             ///< offset
3557 } ADDR2_COMPUTE_SUBRESOURCE_OFFSET_FORSWIZZLEPATTERN_OUTPUT;
3558
3559 /**
3560 ****************************************************************************************************
3561 *   Addr2ComputeSubResourceOffsetForSwizzlePattern
3562 *
3563 *   @brief
3564 *       Calculate sub resource offset to support swizzle pattern.
3565 ****************************************************************************************************
3566 */
3567 ADDR_E_RETURNCODE ADDR_API Addr2ComputeSubResourceOffsetForSwizzlePattern(
3568     ADDR_HANDLE                                                     hLib,
3569     const ADDR2_COMPUTE_SUBRESOURCE_OFFSET_FORSWIZZLEPATTERN_INPUT* pIn,
3570     ADDR2_COMPUTE_SUBRESOURCE_OFFSET_FORSWIZZLEPATTERN_OUTPUT*      pOut);
3571
3572 /**
3573 ****************************************************************************************************
3574 *   ADDR2_BLOCK_SET
3575 *
3576 *   @brief
3577 *       Bit field that defines block type
3578 ****************************************************************************************************
3579 */
3580 typedef union _ADDR2_BLOCK_SET
3581 {
3582     struct
3583     {
3584         UINT_32 micro       : 1;   // 256B block for 2D resource
3585         UINT_32 macro4KB    : 1;   // 4KB for 2D/3D resource
3586         UINT_32 macro64KB   : 1;   // 64KB for 2D/3D resource
3587         UINT_32 var         : 1;   // VAR block
3588         UINT_32 linear      : 1;   // Linear block
3589         UINT_32 reserved    : 27;
3590     };
3591
3592     UINT_32 value;
3593 } ADDR2_BLOCK_SET;
3594
3595 /**
3596 ****************************************************************************************************
3597 *   ADDR2_SWTYPE_SET
3598 *
3599 *   @brief
3600 *       Bit field that defines swizzle type
3601 ****************************************************************************************************
3602 */
3603 typedef union _ADDR2_SWTYPE_SET
3604 {
3605     struct
3606     {
3607         UINT_32 sw_Z     : 1;   // SW_*_Z_*
3608         UINT_32 sw_S     : 1;   // SW_*_S_*
3609         UINT_32 sw_D     : 1;   // SW_*_D_*
3610         UINT_32 sw_R     : 1;   // SW_*_R_*
3611         UINT_32 reserved : 28;
3612     };
3613
3614     UINT_32 value;
3615 } ADDR2_SWTYPE_SET;
3616
3617 /**
3618 ****************************************************************************************************
3619 *   ADDR2_GET_PREFERRED_SURF_SETTING_INPUT
3620 *
3621 *   @brief
3622 *       Input structure of Addr2GetPreferredSurfaceSetting
3623 ****************************************************************************************************
3624 */
3625 typedef struct _ADDR2_GET_PREFERRED_SURF_SETTING_INPUT
3626 {
3627     UINT_32               size;              ///< Size of this structure in bytes
3628
3629     ADDR2_SURFACE_FLAGS   flags;             ///< Surface flags
3630     AddrResourceType      resourceType;      ///< Surface type
3631     AddrFormat            format;            ///< Surface format
3632     AddrResrouceLocation  resourceLoction;   ///< Surface heap choice
3633     ADDR2_BLOCK_SET       forbiddenBlock;    ///< Client can use it to disable some block setting
3634                                              ///< such as linear for DXTn, tiled for YUV
3635     ADDR2_SWTYPE_SET      preferredSwSet;    ///< Client can use it to specify sw type(s) wanted
3636     BOOL_32               noXor;             ///< Do not use xor mode for this resource
3637     UINT_32               bpp;               ///< bits per pixel
3638     UINT_32               width;             ///< Width (of mip0), in pixels
3639     UINT_32               height;            ///< Height (of mip0), in pixels
3640     UINT_32               numSlices;         ///< Number surface slice/depth (of mip0),
3641     UINT_32               numMipLevels;      ///< Total mipmap levels.
3642     UINT_32               numSamples;        ///< Number of samples
3643     UINT_32               numFrags;          ///< Number of fragments, leave it zero or the same as
3644                                              ///  number of samples for normal AA; Set it to the
3645                                              ///  number of fragments for EQAA
3646     UINT_32               maxAlign;          ///< maximum base/size alignment requested by client
3647     UINT_32               minSizeAlign;      ///< memory allocated for surface in client driver will
3648                                              ///  be padded to multiple of this value (in bytes)
3649 } ADDR2_GET_PREFERRED_SURF_SETTING_INPUT;
3650
3651 /**
3652 ****************************************************************************************************
3653 *   ADDR2_GET_PREFERRED_SURF_SETTING_OUTPUT
3654 *
3655 *   @brief
3656 *       Output structure of Addr2GetPreferredSurfaceSetting
3657 ****************************************************************************************************
3658 */
3659 typedef struct _ADDR2_GET_PREFERRED_SURF_SETTING_OUTPUT
3660 {
3661     UINT_32               size;                 ///< Size of this structure in bytes
3662
3663     AddrSwizzleMode       swizzleMode;          ///< Suggested swizzle mode to be used
3664     AddrResourceType      resourceType;         ///< Suggested resource type to program HW
3665     ADDR2_BLOCK_SET       validBlockSet;        ///< Valid block type bit conbination
3666     BOOL_32               canXor;               ///< If client can use xor on a valid macro block
3667                                                 ///  type
3668     ADDR2_SWTYPE_SET      validSwTypeSet;       ///< Valid swizzle type bit combination
3669     ADDR2_SWTYPE_SET      clientPreferredSwSet; ///< Client-preferred swizzle type bit combination
3670 } ADDR2_GET_PREFERRED_SURF_SETTING_OUTPUT;
3671
3672 /**
3673 ****************************************************************************************************
3674 *   Addr2GetPreferredSurfaceSetting
3675 *
3676 *   @brief
3677 *       Suggest a preferred setting for client driver to program HW register
3678 ****************************************************************************************************
3679 */
3680 ADDR_E_RETURNCODE ADDR_API Addr2GetPreferredSurfaceSetting(
3681     ADDR_HANDLE                                   hLib,
3682     const ADDR2_GET_PREFERRED_SURF_SETTING_INPUT* pIn,
3683     ADDR2_GET_PREFERRED_SURF_SETTING_OUTPUT*      pOut);
3684
3685 /**
3686 ****************************************************************************************************
3687 *   Addr2IsValidDisplaySwizzleMode
3688 *
3689 *   @brief
3690 *       Return whether the swizzle mode is supported by DCE / DCN.
3691 ****************************************************************************************************
3692 */
3693 ADDR_E_RETURNCODE ADDR_API Addr2IsValidDisplaySwizzleMode(
3694     ADDR_HANDLE     hLib,
3695     AddrSwizzleMode swizzleMode,
3696     UINT_32         bpp,
3697     bool            *result);
3698
3699 #if defined(__cplusplus)
3700 }
3701 #endif
3702
3703 #endif // __ADDR_INTERFACE_H__