2 * Copyright © 2014 Advanced Micro Devices, Inc.
5 * Permission is hereby granted, free of charge, to any person obtaining
6 * a copy of this software and associated documentation files (the
7 * "Software"), to deal in the Software without restriction, including
8 * without limitation the rights to use, copy, modify, merge, publish,
9 * distribute, sub license, and/or sell copies of the Software, and to
10 * permit persons to whom the Software is furnished to do so, subject to
11 * the following conditions:
13 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
14 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
15 * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
16 * NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS, AUTHORS
17 * AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
18 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
20 * USE OR OTHER DEALINGS IN THE SOFTWARE.
22 * The above copyright notice and this permission notice (including the
23 * next paragraph) shall be included in all copies or substantial portions
28 ***************************************************************************************************
30 * @brief Contains the helper function and constants
31 ***************************************************************************************************
33 #ifndef __ADDR_TYPES_H__
34 #define __ADDR_TYPES_H__
36 #if defined(__APPLE__) || defined(TCORE_BUILD)
37 // External definitions header maintained by Mac driver team (and TCORE team)
38 // Helps address compilation issues & reduces code covered by NDA
39 #include "addrExtDef.h"
43 // Windows and/or Linux
60 #include <stdarg.h> // va_list...etc need this header
62 #endif // defined (__APPLE__)
65 ***************************************************************************************************
67 ***************************************************************************************************
71 #define ADDR_CDECL __attribute__((cdecl))
73 #define ADDR_CDECL __cdecl
79 #if defined(__AMD64__)
82 #define ADDR_STDCALL __attribute__((stdcall))
85 #define ADDR_STDCALL __stdcall
91 #define ADDR_FASTCALL __attribute__((regparm(0)))
93 #define ADDR_FASTCALL __fastcall
98 #define GC_CDECL ADDR_CDECL
102 #define GC_STDCALL ADDR_STDCALL
106 #define GC_FASTCALL ADDR_FASTCALL
110 #if defined(__GNUC__)
111 #define ADDR_INLINE static inline // inline needs to be static to link
113 // win32, win64, other platforms
114 #define ADDR_INLINE __inline
115 #endif // #if defined(__GNUC__)
117 #define ADDR_API ADDR_FASTCALL //default call convention is fast call
120 ***************************************************************************************************
121 * Global defines used by other modules
122 ***************************************************************************************************
124 #if !defined(TILEINDEX_INVALID)
125 #define TILEINDEX_INVALID -1
128 #if !defined(TILEINDEX_LINEAR_GENERAL)
129 #define TILEINDEX_LINEAR_GENERAL -2
132 #if !defined(TILEINDEX_LINEAR_ALIGNED)
133 #define TILEINDEX_LINEAR_ALIGNED 8
137 ***************************************************************************************************
139 ***************************************************************************************************
141 typedef enum _ADDR_E_RETURNCODE
152 ADDR_PARAMSIZEMISMATCH
,
153 ADDR_INVALIDGBREGVALUES
,
158 ***************************************************************************************************
160 * Neutral enums that define tile modes for all H/W
162 * R600/R800 tiling mode can be cast to hw enums directly but never cast into HW enum from
163 * ADDR_TM_2D_TILED_XTHICK
165 ***************************************************************************************************
167 typedef enum _AddrTileMode
169 ADDR_TM_LINEAR_GENERAL
= 0, ///< Least restrictions, pitch: multiple of 8 if not buffer
170 ADDR_TM_LINEAR_ALIGNED
= 1, ///< Requests pitch or slice to be multiple of 64 pixels
171 ADDR_TM_1D_TILED_THIN1
= 2, ///< Linear array of 8x8 tiles
172 ADDR_TM_1D_TILED_THICK
= 3, ///< Linear array of 8x8x4 tiles
173 ADDR_TM_2D_TILED_THIN1
= 4, ///< A set of macro tiles consist of 8x8 tiles
174 ADDR_TM_2D_TILED_THIN2
= 5, ///< 600 HWL only, macro tile ratio is 1:4
175 ADDR_TM_2D_TILED_THIN4
= 6, ///< 600 HWL only, macro tile ratio is 1:16
176 ADDR_TM_2D_TILED_THICK
= 7, ///< A set of macro tiles consist of 8x8x4 tiles
177 ADDR_TM_2B_TILED_THIN1
= 8, ///< 600 HWL only, with bank swap
178 ADDR_TM_2B_TILED_THIN2
= 9, ///< 600 HWL only, with bank swap and ratio is 1:4
179 ADDR_TM_2B_TILED_THIN4
= 10, ///< 600 HWL only, with bank swap and ratio is 1:16
180 ADDR_TM_2B_TILED_THICK
= 11, ///< 600 HWL only, with bank swap, consists of 8x8x4 tiles
181 ADDR_TM_3D_TILED_THIN1
= 12, ///< Macro tiling w/ pipe rotation between slices
182 ADDR_TM_3D_TILED_THICK
= 13, ///< Macro tiling w/ pipe rotation bwtween slices, thick
183 ADDR_TM_3B_TILED_THIN1
= 14, ///< 600 HWL only, with bank swap
184 ADDR_TM_3B_TILED_THICK
= 15, ///< 600 HWL only, with bank swap, thick
185 ADDR_TM_2D_TILED_XTHICK
= 16, ///< Tile is 8x8x8, valid from NI
186 ADDR_TM_3D_TILED_XTHICK
= 17, ///< Tile is 8x8x8, valid from NI
187 ADDR_TM_POWER_SAVE
= 18, ///< Power save mode, only used by KMD on NI
188 ADDR_TM_PRT_TILED_THIN1
= 19, ///< No bank/pipe rotation or hashing beyond macrotile size
189 ADDR_TM_PRT_2D_TILED_THIN1
= 20, ///< Same as 2D_TILED_THIN1, PRT only
190 ADDR_TM_PRT_3D_TILED_THIN1
= 21, ///< Same as 3D_TILED_THIN1, PRT only
191 ADDR_TM_PRT_TILED_THICK
= 22, ///< No bank/pipe rotation or hashing beyond macrotile size
192 ADDR_TM_PRT_2D_TILED_THICK
= 23, ///< Same as 2D_TILED_THICK, PRT only
193 ADDR_TM_PRT_3D_TILED_THICK
= 24, ///< Same as 3D_TILED_THICK, PRT only
194 ADDR_TM_COUNT
= 25, ///< Must be the value of the last tile mode
198 ***************************************************************************************************
202 * Neutral enum for SurfaceFormat
204 ***************************************************************************************************
206 typedef enum _AddrFormat
{
207 ADDR_FMT_INVALID
= 0x00000000,
208 ADDR_FMT_8
= 0x00000001,
209 ADDR_FMT_4_4
= 0x00000002,
210 ADDR_FMT_3_3_2
= 0x00000003,
211 ADDR_FMT_RESERVED_4
= 0x00000004,
212 ADDR_FMT_16
= 0x00000005,
213 ADDR_FMT_16_FLOAT
= 0x00000006,
214 ADDR_FMT_8_8
= 0x00000007,
215 ADDR_FMT_5_6_5
= 0x00000008,
216 ADDR_FMT_6_5_5
= 0x00000009,
217 ADDR_FMT_1_5_5_5
= 0x0000000a,
218 ADDR_FMT_4_4_4_4
= 0x0000000b,
219 ADDR_FMT_5_5_5_1
= 0x0000000c,
220 ADDR_FMT_32
= 0x0000000d,
221 ADDR_FMT_32_FLOAT
= 0x0000000e,
222 ADDR_FMT_16_16
= 0x0000000f,
223 ADDR_FMT_16_16_FLOAT
= 0x00000010,
224 ADDR_FMT_8_24
= 0x00000011,
225 ADDR_FMT_8_24_FLOAT
= 0x00000012,
226 ADDR_FMT_24_8
= 0x00000013,
227 ADDR_FMT_24_8_FLOAT
= 0x00000014,
228 ADDR_FMT_10_11_11
= 0x00000015,
229 ADDR_FMT_10_11_11_FLOAT
= 0x00000016,
230 ADDR_FMT_11_11_10
= 0x00000017,
231 ADDR_FMT_11_11_10_FLOAT
= 0x00000018,
232 ADDR_FMT_2_10_10_10
= 0x00000019,
233 ADDR_FMT_8_8_8_8
= 0x0000001a,
234 ADDR_FMT_10_10_10_2
= 0x0000001b,
235 ADDR_FMT_X24_8_32_FLOAT
= 0x0000001c,
236 ADDR_FMT_32_32
= 0x0000001d,
237 ADDR_FMT_32_32_FLOAT
= 0x0000001e,
238 ADDR_FMT_16_16_16_16
= 0x0000001f,
239 ADDR_FMT_16_16_16_16_FLOAT
= 0x00000020,
240 ADDR_FMT_RESERVED_33
= 0x00000021,
241 ADDR_FMT_32_32_32_32
= 0x00000022,
242 ADDR_FMT_32_32_32_32_FLOAT
= 0x00000023,
243 ADDR_FMT_RESERVED_36
= 0x00000024,
244 ADDR_FMT_1
= 0x00000025,
245 ADDR_FMT_1_REVERSED
= 0x00000026,
246 ADDR_FMT_GB_GR
= 0x00000027,
247 ADDR_FMT_BG_RG
= 0x00000028,
248 ADDR_FMT_32_AS_8
= 0x00000029,
249 ADDR_FMT_32_AS_8_8
= 0x0000002a,
250 ADDR_FMT_5_9_9_9_SHAREDEXP
= 0x0000002b,
251 ADDR_FMT_8_8_8
= 0x0000002c,
252 ADDR_FMT_16_16_16
= 0x0000002d,
253 ADDR_FMT_16_16_16_FLOAT
= 0x0000002e,
254 ADDR_FMT_32_32_32
= 0x0000002f,
255 ADDR_FMT_32_32_32_FLOAT
= 0x00000030,
256 ADDR_FMT_BC1
= 0x00000031,
257 ADDR_FMT_BC2
= 0x00000032,
258 ADDR_FMT_BC3
= 0x00000033,
259 ADDR_FMT_BC4
= 0x00000034,
260 ADDR_FMT_BC5
= 0x00000035,
261 ADDR_FMT_BC6
= 0x00000036,
262 ADDR_FMT_BC7
= 0x00000037,
263 ADDR_FMT_32_AS_32_32_32_32
= 0x00000038,
264 ADDR_FMT_APC3
= 0x00000039,
265 ADDR_FMT_APC4
= 0x0000003a,
266 ADDR_FMT_APC5
= 0x0000003b,
267 ADDR_FMT_APC6
= 0x0000003c,
268 ADDR_FMT_APC7
= 0x0000003d,
269 ADDR_FMT_CTX1
= 0x0000003e,
270 ADDR_FMT_RESERVED_63
= 0x0000003f,
274 ***************************************************************************************************
278 * Neutral enum for addrFlt32ToDepthPixel
280 ***************************************************************************************************
282 typedef enum _AddrDepthFormat
284 ADDR_DEPTH_INVALID
= 0x00000000,
285 ADDR_DEPTH_16
= 0x00000001,
286 ADDR_DEPTH_X8_24
= 0x00000002,
287 ADDR_DEPTH_8_24
= 0x00000003,
288 ADDR_DEPTH_X8_24_FLOAT
= 0x00000004,
289 ADDR_DEPTH_8_24_FLOAT
= 0x00000005,
290 ADDR_DEPTH_32_FLOAT
= 0x00000006,
291 ADDR_DEPTH_X24_8_32_FLOAT
= 0x00000007,
296 ***************************************************************************************************
300 * Neutral enum for ColorFormat
302 ***************************************************************************************************
304 typedef enum _AddrColorFormat
306 ADDR_COLOR_INVALID
= 0x00000000,
307 ADDR_COLOR_8
= 0x00000001,
308 ADDR_COLOR_4_4
= 0x00000002,
309 ADDR_COLOR_3_3_2
= 0x00000003,
310 ADDR_COLOR_RESERVED_4
= 0x00000004,
311 ADDR_COLOR_16
= 0x00000005,
312 ADDR_COLOR_16_FLOAT
= 0x00000006,
313 ADDR_COLOR_8_8
= 0x00000007,
314 ADDR_COLOR_5_6_5
= 0x00000008,
315 ADDR_COLOR_6_5_5
= 0x00000009,
316 ADDR_COLOR_1_5_5_5
= 0x0000000a,
317 ADDR_COLOR_4_4_4_4
= 0x0000000b,
318 ADDR_COLOR_5_5_5_1
= 0x0000000c,
319 ADDR_COLOR_32
= 0x0000000d,
320 ADDR_COLOR_32_FLOAT
= 0x0000000e,
321 ADDR_COLOR_16_16
= 0x0000000f,
322 ADDR_COLOR_16_16_FLOAT
= 0x00000010,
323 ADDR_COLOR_8_24
= 0x00000011,
324 ADDR_COLOR_8_24_FLOAT
= 0x00000012,
325 ADDR_COLOR_24_8
= 0x00000013,
326 ADDR_COLOR_24_8_FLOAT
= 0x00000014,
327 ADDR_COLOR_10_11_11
= 0x00000015,
328 ADDR_COLOR_10_11_11_FLOAT
= 0x00000016,
329 ADDR_COLOR_11_11_10
= 0x00000017,
330 ADDR_COLOR_11_11_10_FLOAT
= 0x00000018,
331 ADDR_COLOR_2_10_10_10
= 0x00000019,
332 ADDR_COLOR_8_8_8_8
= 0x0000001a,
333 ADDR_COLOR_10_10_10_2
= 0x0000001b,
334 ADDR_COLOR_X24_8_32_FLOAT
= 0x0000001c,
335 ADDR_COLOR_32_32
= 0x0000001d,
336 ADDR_COLOR_32_32_FLOAT
= 0x0000001e,
337 ADDR_COLOR_16_16_16_16
= 0x0000001f,
338 ADDR_COLOR_16_16_16_16_FLOAT
= 0x00000020,
339 ADDR_COLOR_RESERVED_33
= 0x00000021,
340 ADDR_COLOR_32_32_32_32
= 0x00000022,
341 ADDR_COLOR_32_32_32_32_FLOAT
= 0x00000023,
345 ***************************************************************************************************
349 * Neutral enum for SurfaceNumber
351 ***************************************************************************************************
353 typedef enum _AddrSurfaceNumber
{
354 ADDR_NUMBER_UNORM
= 0x00000000,
355 ADDR_NUMBER_SNORM
= 0x00000001,
356 ADDR_NUMBER_USCALED
= 0x00000002,
357 ADDR_NUMBER_SSCALED
= 0x00000003,
358 ADDR_NUMBER_UINT
= 0x00000004,
359 ADDR_NUMBER_SINT
= 0x00000005,
360 ADDR_NUMBER_SRGB
= 0x00000006,
361 ADDR_NUMBER_FLOAT
= 0x00000007,
365 ***************************************************************************************************
369 * Neutral enum for SurfaceSwap
371 ***************************************************************************************************
373 typedef enum _AddrSurfaceSwap
{
374 ADDR_SWAP_STD
= 0x00000000,
375 ADDR_SWAP_ALT
= 0x00000001,
376 ADDR_SWAP_STD_REV
= 0x00000002,
377 ADDR_SWAP_ALT_REV
= 0x00000003,
381 ***************************************************************************************************
385 * Size of HTILE blocks, valid values are 4 or 8 for now
386 ***************************************************************************************************
388 typedef enum _AddrHtileBlockSize
390 ADDR_HTILE_BLOCKSIZE_4
= 4,
391 ADDR_HTILE_BLOCKSIZE_8
= 8,
392 } AddrHtileBlockSize
;
396 ***************************************************************************************************
400 * The pipe configuration field specifies both the number of pipes and
401 * how pipes are interleaved on the surface.
402 * The expression of number of pipes, the shader engine tile size, and packer tile size
403 * is encoded in a PIPE_CONFIG register field.
404 * In general the number of pipes usually matches the number of memory channels of the
405 * hardware configuration.
406 * For hw configurations w/ non-pow2 memory number of memory channels, it usually matches
407 * the number of ROP units(? TODO: which registers??)
408 * The enum value = hw enum + 1 which is to reserve 0 for requesting default.
409 ***************************************************************************************************
411 typedef enum _AddrPipeCfg
413 ADDR_PIPECFG_INVALID
= 0,
414 ADDR_PIPECFG_P2
= 1, /// 2 pipes,
415 ADDR_PIPECFG_P4_8x16
= 5, /// 4 pipes,
416 ADDR_PIPECFG_P4_16x16
= 6,
417 ADDR_PIPECFG_P4_16x32
= 7,
418 ADDR_PIPECFG_P4_32x32
= 8,
419 ADDR_PIPECFG_P8_16x16_8x16
= 9, /// 8 pipes
420 ADDR_PIPECFG_P8_16x32_8x16
= 10,
421 ADDR_PIPECFG_P8_32x32_8x16
= 11,
422 ADDR_PIPECFG_P8_16x32_16x16
= 12,
423 ADDR_PIPECFG_P8_32x32_16x16
= 13,
424 ADDR_PIPECFG_P8_32x32_16x32
= 14,
425 ADDR_PIPECFG_P8_32x64_32x32
= 15,
426 ADDR_PIPECFG_P16_32x32_8x16
= 17, /// 16 pipes
427 ADDR_PIPECFG_P16_32x32_16x16
= 18,
428 ADDR_PIPECFG_MAX
= 19,
432 ***************************************************************************************************
436 * Neutral enums that specifies micro tile type (MICRO_TILE_MODE)
437 ***************************************************************************************************
439 typedef enum _AddrTileType
441 ADDR_DISPLAYABLE
= 0, ///< Displayable tiling
442 ADDR_NON_DISPLAYABLE
= 1, ///< Non-displayable tiling, a.k.a thin micro tiling
443 ADDR_DEPTH_SAMPLE_ORDER
= 2, ///< Same as non-displayable plus depth-sample-order
444 ADDR_ROTATED
= 3, ///< Rotated displayable tiling
445 ADDR_THICK
= 4, ///< Thick micro-tiling, only valid for THICK and XTHICK
448 ///////////////////////////////////////////////////////////////////////////////////////////////////
450 // Type definitions: short system-independent names for address library types
452 ///////////////////////////////////////////////////////////////////////////////////////////////////
454 #if !defined(__APPLE__)
456 #ifndef BOOL_32 // no bool type in C
457 /// @brief Boolean type, since none is defined in C
467 #define UINT_32 unsigned int
475 #define UINT_16 unsigned short
483 #define UINT_8 unsigned char
499 // 64-bit integer types depend on the compiler
501 #if defined( __GNUC__ ) || defined( __WATCOMC__ )
502 #define INT_64 long long
503 #define UINT_64 unsigned long long
505 #elif defined( _WIN32 )
506 #define INT_64 __int64
507 #define UINT_64 unsigned __int64
510 #error Unsupported compiler and/or operating system for 64-bit integers
512 /// @brief 64-bit signed integer type (compiler dependent)
515 /// The addrlib defines a 64-bit signed integer type for either
516 /// Gnu/Watcom compilers (which use the first syntax) or for
517 /// the Windows VCC compiler (which uses the second syntax).
518 #define INT_64 long long OR __int64
520 /// @brief 64-bit unsigned integer type (compiler dependent)
523 /// The addrlib defines a 64-bit unsigned integer type for either
524 /// Gnu/Watcom compilers (which use the first syntax) or for
525 /// the Windows VCC compiler (which uses the second syntax).
527 #define UINT_64 unsigned long long OR unsigned __int64
530 #endif // #if !defined(__APPLE__)
532 // ADDR64X is used to print addresses in hex form on both Windows and Linux
534 #if defined( __GNUC__ ) || defined( __WATCOMC__ )
535 #define ADDR64X "llx"
536 #define ADDR64D "lld"
538 #elif defined( _WIN32 )
539 #define ADDR64X "I64x"
540 #define ADDR64D "I64d"
543 #error Unsupported compiler and/or operating system for 64-bit integers
545 /// @brief Addrlib device address 64-bit printf tag (compiler dependent)
548 /// This allows printf to display an ADDR_64 for either the Windows VCC compiler
549 /// (which used this value) or the Gnu/Watcom compilers (which use "llx".
550 /// An example of use is printf("addr 0x%"ADDR64X"\n", address);
552 #define ADDR64X "llx" OR "I64x"
553 #define ADDR64D "lld" OR "I64d"
557 /// @brief Union for storing a 32-bit float or 32-bit integer
560 /// This union provides a simple way to convert between a 32-bit float
561 /// and a 32-bit integer. It also prevents the compiler from producing
562 /// code that alters NaN values when assiging or coying floats.
563 /// Therefore, all address library routines that pass or return 32-bit
564 /// floating point data do so by passing or returning a FLT_32.
573 ///////////////////////////////////////////////////////////////////////////////////////////////////
575 // Macros for controlling linking and building on multiple systems
577 ///////////////////////////////////////////////////////////////////////////////////////////////////
578 #if defined(_MSC_VER)
580 #undef va_copy //redefine va_copy to support VC2013
584 #if !defined(va_copy)
585 #define va_copy(dst, src) \
586 ((void) memcpy(&(dst), &(src), sizeof(va_list)))
589 #endif // __ADDR_TYPES_H__