android: radv: build vulkan.radv conditionally to radeonsi
[mesa.git] / src / amd / addrlib / addrtypes.h
1 /*
2 * Copyright © 2014 Advanced Micro Devices, Inc.
3 * All Rights Reserved.
4 *
5 * Permission is hereby granted, free of charge, to any person obtaining
6 * a copy of this software and associated documentation files (the
7 * "Software"), to deal in the Software without restriction, including
8 * without limitation the rights to use, copy, modify, merge, publish,
9 * distribute, sub license, and/or sell copies of the Software, and to
10 * permit persons to whom the Software is furnished to do so, subject to
11 * the following conditions:
12 *
13 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
14 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
15 * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
16 * NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS, AUTHORS
17 * AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
18 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
20 * USE OR OTHER DEALINGS IN THE SOFTWARE.
21 *
22 * The above copyright notice and this permission notice (including the
23 * next paragraph) shall be included in all copies or substantial portions
24 * of the Software.
25 */
26
27 /**
28 ****************************************************************************************************
29 * @file addrtypes.h
30 * @brief Contains the helper function and constants
31 ****************************************************************************************************
32 */
33 #ifndef __ADDR_TYPES_H__
34 #define __ADDR_TYPES_H__
35
36 #if defined(__APPLE__) && !defined(HAVE_TSERVER)
37 // External definitions header maintained by Apple driver team, but not for diag team under Mac.
38 // Helps address compilation issues & reduces code covered by NDA
39 #include "addrExtDef.h"
40
41 #else
42
43 // Windows and/or Linux
44 #if !defined(VOID)
45 typedef void VOID;
46 #endif
47
48 #if !defined(FLOAT)
49 typedef float FLOAT;
50 #endif
51
52 #if !defined(CHAR)
53 typedef char CHAR;
54 #endif
55
56 #if !defined(INT)
57 typedef int INT;
58 #endif
59
60 #include <stdarg.h> // va_list...etc need this header
61
62 #endif // defined (__APPLE__) && !defined(HAVE_TSERVER)
63
64 /**
65 ****************************************************************************************************
66 * Calling conventions
67 ****************************************************************************************************
68 */
69 #ifndef ADDR_CDECL
70 #if defined(__GNUC__)
71 #define ADDR_CDECL __attribute__((cdecl))
72 #else
73 #define ADDR_CDECL __cdecl
74 #endif
75 #endif
76
77 #ifndef ADDR_STDCALL
78 #if defined(__GNUC__)
79 #if defined(__amd64__) || defined(__x86_64__)
80 #define ADDR_STDCALL
81 #else
82 #define ADDR_STDCALL __attribute__((stdcall))
83 #endif
84 #else
85 #define ADDR_STDCALL __stdcall
86 #endif
87 #endif
88
89 #ifndef ADDR_FASTCALL
90 #if defined(BRAHMA_ARM)
91 #define ADDR_FASTCALL
92 #elif defined(__GNUC__)
93 #if defined(__i386__)
94 #define ADDR_FASTCALL __attribute__((regparm(0)))
95 #else
96 #define ADDR_FASTCALL
97 #endif
98 #else
99 #define ADDR_FASTCALL __fastcall
100 #endif
101 #endif
102
103 #ifndef GC_CDECL
104 #define GC_CDECL ADDR_CDECL
105 #endif
106
107 #ifndef GC_STDCALL
108 #define GC_STDCALL ADDR_STDCALL
109 #endif
110
111 #ifndef GC_FASTCALL
112 #define GC_FASTCALL ADDR_FASTCALL
113 #endif
114
115
116 #if defined(__GNUC__)
117 #define ADDR_INLINE static inline // inline needs to be static to link
118 #else
119 // win32, win64, other platforms
120 #define ADDR_INLINE __inline
121 #endif // #if defined(__GNUC__)
122
123 #define ADDR_API ADDR_FASTCALL //default call convention is fast call
124
125 /**
126 ****************************************************************************************************
127 * Global defines used by other modules
128 ****************************************************************************************************
129 */
130 #if !defined(TILEINDEX_INVALID)
131 #define TILEINDEX_INVALID -1
132 #endif
133
134 #if !defined(TILEINDEX_LINEAR_GENERAL)
135 #define TILEINDEX_LINEAR_GENERAL -2
136 #endif
137
138 #if !defined(TILEINDEX_LINEAR_ALIGNED)
139 #define TILEINDEX_LINEAR_ALIGNED 8
140 #endif
141
142 /**
143 ****************************************************************************************************
144 * Return codes
145 ****************************************************************************************************
146 */
147 typedef enum _ADDR_E_RETURNCODE
148 {
149 // General Return
150 ADDR_OK = 0,
151 ADDR_ERROR = 1,
152
153 // Specific Errors
154 ADDR_OUTOFMEMORY,
155 ADDR_INVALIDPARAMS,
156 ADDR_NOTSUPPORTED,
157 ADDR_NOTIMPLEMENTED,
158 ADDR_PARAMSIZEMISMATCH,
159 ADDR_INVALIDGBREGVALUES,
160
161 } ADDR_E_RETURNCODE;
162
163 /**
164 ****************************************************************************************************
165 * @brief
166 * Neutral enums that define tile modes for all H/W
167 * @note
168 * R600/R800 tiling mode can be cast to hw enums directly but never cast into HW enum from
169 * ADDR_TM_2D_TILED_XTHICK
170 *
171 ****************************************************************************************************
172 */
173 typedef enum _AddrTileMode
174 {
175 ADDR_TM_LINEAR_GENERAL = 0, ///< Least restrictions, pitch: multiple of 8 if not buffer
176 ADDR_TM_LINEAR_ALIGNED = 1, ///< Requests pitch or slice to be multiple of 64 pixels
177 ADDR_TM_1D_TILED_THIN1 = 2, ///< Linear array of 8x8 tiles
178 ADDR_TM_1D_TILED_THICK = 3, ///< Linear array of 8x8x4 tiles
179 ADDR_TM_2D_TILED_THIN1 = 4, ///< A set of macro tiles consist of 8x8 tiles
180 ADDR_TM_2D_TILED_THIN2 = 5, ///< 600 HWL only, macro tile ratio is 1:4
181 ADDR_TM_2D_TILED_THIN4 = 6, ///< 600 HWL only, macro tile ratio is 1:16
182 ADDR_TM_2D_TILED_THICK = 7, ///< A set of macro tiles consist of 8x8x4 tiles
183 ADDR_TM_2B_TILED_THIN1 = 8, ///< 600 HWL only, with bank swap
184 ADDR_TM_2B_TILED_THIN2 = 9, ///< 600 HWL only, with bank swap and ratio is 1:4
185 ADDR_TM_2B_TILED_THIN4 = 10, ///< 600 HWL only, with bank swap and ratio is 1:16
186 ADDR_TM_2B_TILED_THICK = 11, ///< 600 HWL only, with bank swap, consists of 8x8x4 tiles
187 ADDR_TM_3D_TILED_THIN1 = 12, ///< Macro tiling w/ pipe rotation between slices
188 ADDR_TM_3D_TILED_THICK = 13, ///< Macro tiling w/ pipe rotation bwtween slices, thick
189 ADDR_TM_3B_TILED_THIN1 = 14, ///< 600 HWL only, with bank swap
190 ADDR_TM_3B_TILED_THICK = 15, ///< 600 HWL only, with bank swap, thick
191 ADDR_TM_2D_TILED_XTHICK = 16, ///< Tile is 8x8x8, valid from NI
192 ADDR_TM_3D_TILED_XTHICK = 17, ///< Tile is 8x8x8, valid from NI
193 ADDR_TM_POWER_SAVE = 18, ///< Power save mode, only used by KMD on NI
194 ADDR_TM_PRT_TILED_THIN1 = 19, ///< No bank/pipe rotation or hashing beyond macrotile size
195 ADDR_TM_PRT_2D_TILED_THIN1 = 20, ///< Same as 2D_TILED_THIN1, PRT only
196 ADDR_TM_PRT_3D_TILED_THIN1 = 21, ///< Same as 3D_TILED_THIN1, PRT only
197 ADDR_TM_PRT_TILED_THICK = 22, ///< No bank/pipe rotation or hashing beyond macrotile size
198 ADDR_TM_PRT_2D_TILED_THICK = 23, ///< Same as 2D_TILED_THICK, PRT only
199 ADDR_TM_PRT_3D_TILED_THICK = 24, ///< Same as 3D_TILED_THICK, PRT only
200 ADDR_TM_UNKNOWN = 25, ///< Unkown tile mode, should be decided by address lib
201 ADDR_TM_COUNT = 26, ///< Must be the value of the last tile mode
202 } AddrTileMode;
203
204 /**
205 ****************************************************************************************************
206 * @brief
207 * Neutral enums that define swizzle modes for Gfx9 ASIC
208 * @note
209 *
210 * ADDR_SW_LINEAR linear aligned addressing mode, for 1D/2D/3D resouce
211 * ADDR_SW_256B_* addressing block aligned size is 256B, for 2D/3D resouce
212 * ADDR_SW_4KB_* addressing block aligned size is 4KB, for 2D/3D resouce
213 * ADDR_SW_64KB_* addressing block aligned size is 64KB, for 2D/3D resouce
214 * ADDR_SW_VAR_* addressing block aligned size is ASIC specific, for 2D/3D resouce
215 *
216 * ADDR_SW_*_Z For 2D resouce, represents Z-order swizzle mode for depth/stencil/FMask
217 For 3D resouce, represents a swizzle mode similar to legacy thick tile mode
218 * ADDR_SW_*_S represents standard swizzle mode defined by MS
219 * ADDR_SW_*_D For 2D resouce, represents a swizzle mode for displayable resource
220 * For 3D resouce, represents a swizzle mode which places each slice in order & pixel
221 within slice is placed as 2D ADDR_SW_*_S. Don't use this combination if possible!
222 * ADDR_SW_*_R For 2D resouce only, represents a swizzle mode for rotated displayable resource
223 *
224 ****************************************************************************************************
225 */
226 typedef enum _AddrSwizzleMode
227 {
228 ADDR_SW_LINEAR = 0,
229 ADDR_SW_256B_S = 1,
230 ADDR_SW_256B_D = 2,
231 ADDR_SW_256B_R = 3,
232 ADDR_SW_4KB_Z = 4,
233 ADDR_SW_4KB_S = 5,
234 ADDR_SW_4KB_D = 6,
235 ADDR_SW_4KB_R = 7,
236 ADDR_SW_64KB_Z = 8,
237 ADDR_SW_64KB_S = 9,
238 ADDR_SW_64KB_D = 10,
239 ADDR_SW_64KB_R = 11,
240 ADDR_SW_VAR_Z = 12,
241 ADDR_SW_VAR_S = 13,
242 ADDR_SW_VAR_D = 14,
243 ADDR_SW_VAR_R = 15,
244 ADDR_SW_64KB_Z_T = 16,
245 ADDR_SW_64KB_S_T = 17,
246 ADDR_SW_64KB_D_T = 18,
247 ADDR_SW_64KB_R_T = 19,
248 ADDR_SW_4KB_Z_X = 20,
249 ADDR_SW_4KB_S_X = 21,
250 ADDR_SW_4KB_D_X = 22,
251 ADDR_SW_4KB_R_X = 23,
252 ADDR_SW_64KB_Z_X = 24,
253 ADDR_SW_64KB_S_X = 25,
254 ADDR_SW_64KB_D_X = 26,
255 ADDR_SW_64KB_R_X = 27,
256 ADDR_SW_VAR_Z_X = 28,
257 ADDR_SW_VAR_S_X = 29,
258 ADDR_SW_VAR_D_X = 30,
259 ADDR_SW_VAR_R_X = 31,
260 ADDR_SW_LINEAR_GENERAL = 32,
261 ADDR_SW_MAX_TYPE = 33,
262
263 // Used for represent block with identical size
264 ADDR_SW_256B = ADDR_SW_256B_S,
265 ADDR_SW_4KB = ADDR_SW_4KB_S_X,
266 ADDR_SW_64KB = ADDR_SW_64KB_S_X,
267 ADDR_SW_VAR = ADDR_SW_VAR_S_X,
268 } AddrSwizzleMode;
269
270 /**
271 ****************************************************************************************************
272 * @brief
273 * Neutral enums that define image type
274 * @note
275 * this is new for address library interface version 2
276 *
277 ****************************************************************************************************
278 */
279 typedef enum _AddrResourceType
280 {
281 ADDR_RSRC_TEX_1D = 0,
282 ADDR_RSRC_TEX_2D = 1,
283 ADDR_RSRC_TEX_3D = 2,
284 ADDR_RSRC_MAX_TYPE = 3,
285 } AddrResourceType;
286
287 /**
288 ****************************************************************************************************
289 * @brief
290 * Neutral enums that define resource heap location
291 * @note
292 * this is new for address library interface version 2
293 *
294 ****************************************************************************************************
295 */
296 typedef enum _AddrResrouceLocation
297 {
298 ADDR_RSRC_LOC_UNDEF = 0, // Resource heap is undefined/unknown
299 ADDR_RSRC_LOC_LOCAL = 1, // CPU visable and CPU invisable local heap
300 ADDR_RSRC_LOC_USWC = 2, // CPU write-combined non-cached nonlocal heap
301 ADDR_RSRC_LOC_CACHED = 3, // CPU cached nonlocal heap
302 ADDR_RSRC_LOC_INVIS = 4, // CPU invisable local heap only
303 ADDR_RSRC_LOC_MAX_TYPE = 5,
304 } AddrResrouceLocation;
305
306 /**
307 ****************************************************************************************************
308 * @brief
309 * Neutral enums that define resource basic swizzle mode
310 * @note
311 * this is new for address library interface version 2
312 *
313 ****************************************************************************************************
314 */
315 typedef enum _AddrSwType
316 {
317 ADDR_SW_Z = 0, // Resource basic swizzle mode is ZOrder
318 ADDR_SW_S = 1, // Resource basic swizzle mode is Standard
319 ADDR_SW_D = 2, // Resource basic swizzle mode is Display
320 ADDR_SW_R = 3, // Resource basic swizzle mode is Rotated
321 } AddrSwType;
322
323 /**
324 ****************************************************************************************************
325 * @brief
326 * Neutral enums that define mipmap major mode
327 * @note
328 * this is new for address library interface version 2
329 *
330 ****************************************************************************************************
331 */
332 typedef enum _AddrMajorMode
333 {
334 ADDR_MAJOR_X = 0,
335 ADDR_MAJOR_Y = 1,
336 ADDR_MAJOR_Z = 2,
337 ADDR_MAJOR_MAX_TYPE = 3,
338 } AddrMajorMode;
339
340 /**
341 ****************************************************************************************************
342 * AddrFormat
343 *
344 * @brief
345 * Neutral enum for SurfaceFormat
346 *
347 ****************************************************************************************************
348 */
349 typedef enum _AddrFormat {
350 ADDR_FMT_INVALID = 0x00000000,
351 ADDR_FMT_8 = 0x00000001,
352 ADDR_FMT_4_4 = 0x00000002,
353 ADDR_FMT_3_3_2 = 0x00000003,
354 ADDR_FMT_RESERVED_4 = 0x00000004,
355 ADDR_FMT_16 = 0x00000005,
356 ADDR_FMT_16_FLOAT = 0x00000006,
357 ADDR_FMT_8_8 = 0x00000007,
358 ADDR_FMT_5_6_5 = 0x00000008,
359 ADDR_FMT_6_5_5 = 0x00000009,
360 ADDR_FMT_1_5_5_5 = 0x0000000a,
361 ADDR_FMT_4_4_4_4 = 0x0000000b,
362 ADDR_FMT_5_5_5_1 = 0x0000000c,
363 ADDR_FMT_32 = 0x0000000d,
364 ADDR_FMT_32_FLOAT = 0x0000000e,
365 ADDR_FMT_16_16 = 0x0000000f,
366 ADDR_FMT_16_16_FLOAT = 0x00000010,
367 ADDR_FMT_8_24 = 0x00000011,
368 ADDR_FMT_8_24_FLOAT = 0x00000012,
369 ADDR_FMT_24_8 = 0x00000013,
370 ADDR_FMT_24_8_FLOAT = 0x00000014,
371 ADDR_FMT_10_11_11 = 0x00000015,
372 ADDR_FMT_10_11_11_FLOAT = 0x00000016,
373 ADDR_FMT_11_11_10 = 0x00000017,
374 ADDR_FMT_11_11_10_FLOAT = 0x00000018,
375 ADDR_FMT_2_10_10_10 = 0x00000019,
376 ADDR_FMT_8_8_8_8 = 0x0000001a,
377 ADDR_FMT_10_10_10_2 = 0x0000001b,
378 ADDR_FMT_X24_8_32_FLOAT = 0x0000001c,
379 ADDR_FMT_32_32 = 0x0000001d,
380 ADDR_FMT_32_32_FLOAT = 0x0000001e,
381 ADDR_FMT_16_16_16_16 = 0x0000001f,
382 ADDR_FMT_16_16_16_16_FLOAT = 0x00000020,
383 ADDR_FMT_RESERVED_33 = 0x00000021,
384 ADDR_FMT_32_32_32_32 = 0x00000022,
385 ADDR_FMT_32_32_32_32_FLOAT = 0x00000023,
386 ADDR_FMT_RESERVED_36 = 0x00000024,
387 ADDR_FMT_1 = 0x00000025,
388 ADDR_FMT_1_REVERSED = 0x00000026,
389 ADDR_FMT_GB_GR = 0x00000027,
390 ADDR_FMT_BG_RG = 0x00000028,
391 ADDR_FMT_32_AS_8 = 0x00000029,
392 ADDR_FMT_32_AS_8_8 = 0x0000002a,
393 ADDR_FMT_5_9_9_9_SHAREDEXP = 0x0000002b,
394 ADDR_FMT_8_8_8 = 0x0000002c,
395 ADDR_FMT_16_16_16 = 0x0000002d,
396 ADDR_FMT_16_16_16_FLOAT = 0x0000002e,
397 ADDR_FMT_32_32_32 = 0x0000002f,
398 ADDR_FMT_32_32_32_FLOAT = 0x00000030,
399 ADDR_FMT_BC1 = 0x00000031,
400 ADDR_FMT_BC2 = 0x00000032,
401 ADDR_FMT_BC3 = 0x00000033,
402 ADDR_FMT_BC4 = 0x00000034,
403 ADDR_FMT_BC5 = 0x00000035,
404 ADDR_FMT_BC6 = 0x00000036,
405 ADDR_FMT_BC7 = 0x00000037,
406 ADDR_FMT_32_AS_32_32_32_32 = 0x00000038,
407 ADDR_FMT_APC3 = 0x00000039,
408 ADDR_FMT_APC4 = 0x0000003a,
409 ADDR_FMT_APC5 = 0x0000003b,
410 ADDR_FMT_APC6 = 0x0000003c,
411 ADDR_FMT_APC7 = 0x0000003d,
412 ADDR_FMT_CTX1 = 0x0000003e,
413 ADDR_FMT_RESERVED_63 = 0x0000003f,
414 ADDR_FMT_ASTC_4x4 = 0x00000040,
415 ADDR_FMT_ASTC_5x4 = 0x00000041,
416 ADDR_FMT_ASTC_5x5 = 0x00000042,
417 ADDR_FMT_ASTC_6x5 = 0x00000043,
418 ADDR_FMT_ASTC_6x6 = 0x00000044,
419 ADDR_FMT_ASTC_8x5 = 0x00000045,
420 ADDR_FMT_ASTC_8x6 = 0x00000046,
421 ADDR_FMT_ASTC_8x8 = 0x00000047,
422 ADDR_FMT_ASTC_10x5 = 0x00000048,
423 ADDR_FMT_ASTC_10x6 = 0x00000049,
424 ADDR_FMT_ASTC_10x8 = 0x0000004a,
425 ADDR_FMT_ASTC_10x10 = 0x0000004b,
426 ADDR_FMT_ASTC_12x10 = 0x0000004c,
427 ADDR_FMT_ASTC_12x12 = 0x0000004d,
428 ADDR_FMT_ETC2_64BPP = 0x0000004e,
429 ADDR_FMT_ETC2_128BPP = 0x0000004f,
430 } AddrFormat;
431
432 /**
433 ****************************************************************************************************
434 * AddrDepthFormat
435 *
436 * @brief
437 * Neutral enum for addrFlt32ToDepthPixel
438 *
439 ****************************************************************************************************
440 */
441 typedef enum _AddrDepthFormat
442 {
443 ADDR_DEPTH_INVALID = 0x00000000,
444 ADDR_DEPTH_16 = 0x00000001,
445 ADDR_DEPTH_X8_24 = 0x00000002,
446 ADDR_DEPTH_8_24 = 0x00000003,
447 ADDR_DEPTH_X8_24_FLOAT = 0x00000004,
448 ADDR_DEPTH_8_24_FLOAT = 0x00000005,
449 ADDR_DEPTH_32_FLOAT = 0x00000006,
450 ADDR_DEPTH_X24_8_32_FLOAT = 0x00000007,
451
452 } AddrDepthFormat;
453
454 /**
455 ****************************************************************************************************
456 * AddrColorFormat
457 *
458 * @brief
459 * Neutral enum for ColorFormat
460 *
461 ****************************************************************************************************
462 */
463 typedef enum _AddrColorFormat
464 {
465 ADDR_COLOR_INVALID = 0x00000000,
466 ADDR_COLOR_8 = 0x00000001,
467 ADDR_COLOR_4_4 = 0x00000002,
468 ADDR_COLOR_3_3_2 = 0x00000003,
469 ADDR_COLOR_RESERVED_4 = 0x00000004,
470 ADDR_COLOR_16 = 0x00000005,
471 ADDR_COLOR_16_FLOAT = 0x00000006,
472 ADDR_COLOR_8_8 = 0x00000007,
473 ADDR_COLOR_5_6_5 = 0x00000008,
474 ADDR_COLOR_6_5_5 = 0x00000009,
475 ADDR_COLOR_1_5_5_5 = 0x0000000a,
476 ADDR_COLOR_4_4_4_4 = 0x0000000b,
477 ADDR_COLOR_5_5_5_1 = 0x0000000c,
478 ADDR_COLOR_32 = 0x0000000d,
479 ADDR_COLOR_32_FLOAT = 0x0000000e,
480 ADDR_COLOR_16_16 = 0x0000000f,
481 ADDR_COLOR_16_16_FLOAT = 0x00000010,
482 ADDR_COLOR_8_24 = 0x00000011,
483 ADDR_COLOR_8_24_FLOAT = 0x00000012,
484 ADDR_COLOR_24_8 = 0x00000013,
485 ADDR_COLOR_24_8_FLOAT = 0x00000014,
486 ADDR_COLOR_10_11_11 = 0x00000015,
487 ADDR_COLOR_10_11_11_FLOAT = 0x00000016,
488 ADDR_COLOR_11_11_10 = 0x00000017,
489 ADDR_COLOR_11_11_10_FLOAT = 0x00000018,
490 ADDR_COLOR_2_10_10_10 = 0x00000019,
491 ADDR_COLOR_8_8_8_8 = 0x0000001a,
492 ADDR_COLOR_10_10_10_2 = 0x0000001b,
493 ADDR_COLOR_X24_8_32_FLOAT = 0x0000001c,
494 ADDR_COLOR_32_32 = 0x0000001d,
495 ADDR_COLOR_32_32_FLOAT = 0x0000001e,
496 ADDR_COLOR_16_16_16_16 = 0x0000001f,
497 ADDR_COLOR_16_16_16_16_FLOAT = 0x00000020,
498 ADDR_COLOR_RESERVED_33 = 0x00000021,
499 ADDR_COLOR_32_32_32_32 = 0x00000022,
500 ADDR_COLOR_32_32_32_32_FLOAT = 0x00000023,
501 } AddrColorFormat;
502
503 /**
504 ****************************************************************************************************
505 * AddrSurfaceNumber
506 *
507 * @brief
508 * Neutral enum for SurfaceNumber
509 *
510 ****************************************************************************************************
511 */
512 typedef enum _AddrSurfaceNumber {
513 ADDR_NUMBER_UNORM = 0x00000000,
514 ADDR_NUMBER_SNORM = 0x00000001,
515 ADDR_NUMBER_USCALED = 0x00000002,
516 ADDR_NUMBER_SSCALED = 0x00000003,
517 ADDR_NUMBER_UINT = 0x00000004,
518 ADDR_NUMBER_SINT = 0x00000005,
519 ADDR_NUMBER_SRGB = 0x00000006,
520 ADDR_NUMBER_FLOAT = 0x00000007,
521 } AddrSurfaceNumber;
522
523 /**
524 ****************************************************************************************************
525 * AddrSurfaceSwap
526 *
527 * @brief
528 * Neutral enum for SurfaceSwap
529 *
530 ****************************************************************************************************
531 */
532 typedef enum _AddrSurfaceSwap {
533 ADDR_SWAP_STD = 0x00000000,
534 ADDR_SWAP_ALT = 0x00000001,
535 ADDR_SWAP_STD_REV = 0x00000002,
536 ADDR_SWAP_ALT_REV = 0x00000003,
537 } AddrSurfaceSwap;
538
539 /**
540 ****************************************************************************************************
541 * AddrHtileBlockSize
542 *
543 * @brief
544 * Size of HTILE blocks, valid values are 4 or 8 for now
545 ****************************************************************************************************
546 */
547 typedef enum _AddrHtileBlockSize
548 {
549 ADDR_HTILE_BLOCKSIZE_4 = 4,
550 ADDR_HTILE_BLOCKSIZE_8 = 8,
551 } AddrHtileBlockSize;
552
553
554 /**
555 ****************************************************************************************************
556 * AddrPipeCfg
557 *
558 * @brief
559 * The pipe configuration field specifies both the number of pipes and
560 * how pipes are interleaved on the surface.
561 * The expression of number of pipes, the shader engine tile size, and packer tile size
562 * is encoded in a PIPE_CONFIG register field.
563 * In general the number of pipes usually matches the number of memory channels of the
564 * hardware configuration.
565 * For hw configurations w/ non-pow2 memory number of memory channels, it usually matches
566 * the number of ROP units(? TODO: which registers??)
567 * The enum value = hw enum + 1 which is to reserve 0 for requesting default.
568 ****************************************************************************************************
569 */
570 typedef enum _AddrPipeCfg
571 {
572 ADDR_PIPECFG_INVALID = 0,
573 ADDR_PIPECFG_P2 = 1, /// 2 pipes,
574 ADDR_PIPECFG_P4_8x16 = 5, /// 4 pipes,
575 ADDR_PIPECFG_P4_16x16 = 6,
576 ADDR_PIPECFG_P4_16x32 = 7,
577 ADDR_PIPECFG_P4_32x32 = 8,
578 ADDR_PIPECFG_P8_16x16_8x16 = 9, /// 8 pipes
579 ADDR_PIPECFG_P8_16x32_8x16 = 10,
580 ADDR_PIPECFG_P8_32x32_8x16 = 11,
581 ADDR_PIPECFG_P8_16x32_16x16 = 12,
582 ADDR_PIPECFG_P8_32x32_16x16 = 13,
583 ADDR_PIPECFG_P8_32x32_16x32 = 14,
584 ADDR_PIPECFG_P8_32x64_32x32 = 15,
585 ADDR_PIPECFG_P16_32x32_8x16 = 17, /// 16 pipes
586 ADDR_PIPECFG_P16_32x32_16x16 = 18,
587 ADDR_PIPECFG_MAX = 19,
588 } AddrPipeCfg;
589
590 /**
591 ****************************************************************************************************
592 * AddrTileType
593 *
594 * @brief
595 * Neutral enums that specifies micro tile type (MICRO_TILE_MODE)
596 ****************************************************************************************************
597 */
598 typedef enum _AddrTileType
599 {
600 ADDR_DISPLAYABLE = 0, ///< Displayable tiling
601 ADDR_NON_DISPLAYABLE = 1, ///< Non-displayable tiling, a.k.a thin micro tiling
602 ADDR_DEPTH_SAMPLE_ORDER = 2, ///< Same as non-displayable plus depth-sample-order
603 ADDR_ROTATED = 3, ///< Rotated displayable tiling
604 ADDR_THICK = 4, ///< Thick micro-tiling, only valid for THICK and XTHICK
605 } AddrTileType;
606
607 ////////////////////////////////////////////////////////////////////////////////////////////////////
608 //
609 // Type definitions: short system-independent names for address library types
610 //
611 ////////////////////////////////////////////////////////////////////////////////////////////////////
612
613 #if !defined(__APPLE__) || defined(HAVE_TSERVER)
614
615 #ifndef BOOL_32 // no bool type in C
616 /// @brief Boolean type, since none is defined in C
617 /// @ingroup type
618 #define BOOL_32 int
619 #endif
620
621 #ifndef INT_32
622 #define INT_32 int
623 #endif
624
625 #ifndef UINT_32
626 #define UINT_32 unsigned int
627 #endif
628
629 #ifndef INT_16
630 #define INT_16 short
631 #endif
632
633 #ifndef UINT_16
634 #define UINT_16 unsigned short
635 #endif
636
637 #ifndef INT_8
638 #define INT_8 char
639 #endif
640
641 #ifndef UINT_8
642 #define UINT_8 unsigned char
643 #endif
644
645 #ifndef NULL
646 #define NULL 0
647 #endif
648
649 #ifndef TRUE
650 #define TRUE 1
651 #endif
652
653 #ifndef FALSE
654 #define FALSE 0
655 #endif
656
657 //
658 // 64-bit integer types depend on the compiler
659 //
660 #if defined( __GNUC__ ) || defined( __WATCOMC__ )
661 #define INT_64 long long
662 #define UINT_64 unsigned long long
663
664 #elif defined( _WIN32 )
665 #define INT_64 __int64
666 #define UINT_64 unsigned __int64
667
668 #else
669 #error Unsupported compiler and/or operating system for 64-bit integers
670
671 /// @brief 64-bit signed integer type (compiler dependent)
672 /// @ingroup type
673 ///
674 /// The addrlib defines a 64-bit signed integer type for either
675 /// Gnu/Watcom compilers (which use the first syntax) or for
676 /// the Windows VCC compiler (which uses the second syntax).
677 #define INT_64 long long OR __int64
678
679 /// @brief 64-bit unsigned integer type (compiler dependent)
680 /// @ingroup type
681 ///
682 /// The addrlib defines a 64-bit unsigned integer type for either
683 /// Gnu/Watcom compilers (which use the first syntax) or for
684 /// the Windows VCC compiler (which uses the second syntax).
685 ///
686 #define UINT_64 unsigned long long OR unsigned __int64
687 #endif
688
689 #endif // #if !defined(__APPLE__) || defined(HAVE_TSERVER)
690
691 // ADDR64X is used to print addresses in hex form on both Windows and Linux
692 //
693 #if defined( __GNUC__ ) || defined( __WATCOMC__ )
694 #define ADDR64X "llx"
695 #define ADDR64D "lld"
696
697 #elif defined( _WIN32 )
698 #define ADDR64X "I64x"
699 #define ADDR64D "I64d"
700
701 #else
702 #error Unsupported compiler and/or operating system for 64-bit integers
703
704 /// @brief Addrlib device address 64-bit printf tag (compiler dependent)
705 /// @ingroup type
706 ///
707 /// This allows printf to display an ADDR_64 for either the Windows VCC compiler
708 /// (which used this value) or the Gnu/Watcom compilers (which use "llx".
709 /// An example of use is printf("addr 0x%"ADDR64X"\n", address);
710 ///
711 #define ADDR64X "llx" OR "I64x"
712 #define ADDR64D "lld" OR "I64d"
713 #endif
714
715
716 /// @brief Union for storing a 32-bit float or 32-bit integer
717 /// @ingroup type
718 ///
719 /// This union provides a simple way to convert between a 32-bit float
720 /// and a 32-bit integer. It also prevents the compiler from producing
721 /// code that alters NaN values when assiging or coying floats.
722 /// Therefore, all address library routines that pass or return 32-bit
723 /// floating point data do so by passing or returning a FLT_32.
724 ///
725 typedef union {
726 INT_32 i;
727 UINT_32 u;
728 float f;
729 } ADDR_FLT_32;
730
731
732 ////////////////////////////////////////////////////////////////////////////////////////////////////
733 //
734 // Macros for controlling linking and building on multiple systems
735 //
736 ////////////////////////////////////////////////////////////////////////////////////////////////////
737 #if defined(_MSC_VER)
738 #if defined(va_copy)
739 #undef va_copy //redefine va_copy to support VC2013
740 #endif
741 #endif
742
743 #if !defined(va_copy)
744 #define va_copy(dst, src) \
745 ((void) memcpy(&(dst), &(src), sizeof(va_list)))
746 #endif
747
748 #endif // __ADDR_TYPES_H__
749