amdgpu/addrlib: add tcCompatible htile addr from coordinate support.
[mesa.git] / src / amd / addrlib / core / addrlib1.h
1 /*
2 * Copyright © 2016 Advanced Micro Devices, Inc.
3 * All Rights Reserved.
4 *
5 * Permission is hereby granted, free of charge, to any person obtaining
6 * a copy of this software and associated documentation files (the
7 * "Software"), to deal in the Software without restriction, including
8 * without limitation the rights to use, copy, modify, merge, publish,
9 * distribute, sub license, and/or sell copies of the Software, and to
10 * permit persons to whom the Software is furnished to do so, subject to
11 * the following conditions:
12 *
13 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
14 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
15 * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
16 * NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS, AUTHORS
17 * AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
18 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
20 * USE OR OTHER DEALINGS IN THE SOFTWARE.
21 *
22 * The above copyright notice and this permission notice (including the
23 * next paragraph) shall be included in all copies or substantial portions
24 * of the Software.
25 */
26
27 /**
28 ***************************************************************************************************
29 * @file addrlib1.h
30 * @brief Contains the AddrLib1 base class definition.
31 ***************************************************************************************************
32 */
33
34 #ifndef __ADDR_LIB1_H__
35 #define __ADDR_LIB1_H__
36
37 #include "addrlib.h"
38
39
40 /**
41 ***************************************************************************************************
42 * @brief Neutral enums that define bank swap size
43 ***************************************************************************************************
44 */
45 enum AddrSampleSplitSize
46 {
47 ADDR_SAMPLESPLIT_1KB = 1024,
48 ADDR_SAMPLESPLIT_2KB = 2048,
49 ADDR_SAMPLESPLIT_4KB = 4096,
50 ADDR_SAMPLESPLIT_8KB = 8192,
51 };
52
53 /**
54 ***************************************************************************************************
55 * @brief Flags for AddrTileMode
56 ***************************************************************************************************
57 */
58 struct AddrTileModeFlags
59 {
60 UINT_32 thickness : 4;
61 UINT_32 isLinear : 1;
62 UINT_32 isMicro : 1;
63 UINT_32 isMacro : 1;
64 UINT_32 isMacro3d : 1;
65 UINT_32 isPrt : 1;
66 UINT_32 isPrtNoRotation : 1;
67 UINT_32 isBankSwapped : 1;
68 };
69
70 /**
71 ***************************************************************************************************
72 * @brief This class contains asic independent address lib functionalities
73 ***************************************************************************************************
74 */
75 class AddrLib1 : public AddrLib
76 {
77 public:
78 virtual ~AddrLib1();
79
80 static AddrLib1* GetAddrLib1(
81 ADDR_HANDLE hLib);
82
83 /// Returns tileIndex support
84 BOOL_32 UseTileIndex(INT_32 index) const
85 {
86 return m_configFlags.useTileIndex && (index != TileIndexInvalid);
87 }
88
89 /// Returns combined swizzle support
90 BOOL_32 UseCombinedSwizzle() const
91 {
92 return m_configFlags.useCombinedSwizzle;
93 }
94
95 //
96 // Interface stubs
97 //
98 ADDR_E_RETURNCODE ComputeSurfaceInfo(
99 const ADDR_COMPUTE_SURFACE_INFO_INPUT* pIn,
100 ADDR_COMPUTE_SURFACE_INFO_OUTPUT* pOut) const;
101
102 ADDR_E_RETURNCODE ComputeSurfaceAddrFromCoord(
103 const ADDR_COMPUTE_SURFACE_ADDRFROMCOORD_INPUT* pIn,
104 ADDR_COMPUTE_SURFACE_ADDRFROMCOORD_OUTPUT* pOut) const;
105
106 ADDR_E_RETURNCODE ComputeSurfaceCoordFromAddr(
107 const ADDR_COMPUTE_SURFACE_COORDFROMADDR_INPUT* pIn,
108 ADDR_COMPUTE_SURFACE_COORDFROMADDR_OUTPUT* pOut) const;
109
110 ADDR_E_RETURNCODE ComputeSliceTileSwizzle(
111 const ADDR_COMPUTE_SLICESWIZZLE_INPUT* pIn,
112 ADDR_COMPUTE_SLICESWIZZLE_OUTPUT* pOut) const;
113
114 ADDR_E_RETURNCODE ExtractBankPipeSwizzle(
115 const ADDR_EXTRACT_BANKPIPE_SWIZZLE_INPUT* pIn,
116 ADDR_EXTRACT_BANKPIPE_SWIZZLE_OUTPUT* pOut) const;
117
118 ADDR_E_RETURNCODE CombineBankPipeSwizzle(
119 const ADDR_COMBINE_BANKPIPE_SWIZZLE_INPUT* pIn,
120 ADDR_COMBINE_BANKPIPE_SWIZZLE_OUTPUT* pOut) const;
121
122 ADDR_E_RETURNCODE ComputeBaseSwizzle(
123 const ADDR_COMPUTE_BASE_SWIZZLE_INPUT* pIn,
124 ADDR_COMPUTE_BASE_SWIZZLE_OUTPUT* pOut) const;
125
126 ADDR_E_RETURNCODE ComputeFmaskInfo(
127 const ADDR_COMPUTE_FMASK_INFO_INPUT* pIn,
128 ADDR_COMPUTE_FMASK_INFO_OUTPUT* pOut);
129
130 ADDR_E_RETURNCODE ComputeFmaskAddrFromCoord(
131 const ADDR_COMPUTE_FMASK_ADDRFROMCOORD_INPUT* pIn,
132 ADDR_COMPUTE_FMASK_ADDRFROMCOORD_OUTPUT* pOut) const;
133
134 ADDR_E_RETURNCODE ComputeFmaskCoordFromAddr(
135 const ADDR_COMPUTE_FMASK_COORDFROMADDR_INPUT* pIn,
136 ADDR_COMPUTE_FMASK_COORDFROMADDR_OUTPUT* pOut) const;
137
138 ADDR_E_RETURNCODE ConvertTileInfoToHW(
139 const ADDR_CONVERT_TILEINFOTOHW_INPUT* pIn,
140 ADDR_CONVERT_TILEINFOTOHW_OUTPUT* pOut) const;
141
142 ADDR_E_RETURNCODE ConvertTileIndex(
143 const ADDR_CONVERT_TILEINDEX_INPUT* pIn,
144 ADDR_CONVERT_TILEINDEX_OUTPUT* pOut) const;
145
146 ADDR_E_RETURNCODE ConvertTileIndex1(
147 const ADDR_CONVERT_TILEINDEX1_INPUT* pIn,
148 ADDR_CONVERT_TILEINDEX_OUTPUT* pOut) const;
149
150 ADDR_E_RETURNCODE GetTileIndex(
151 const ADDR_GET_TILEINDEX_INPUT* pIn,
152 ADDR_GET_TILEINDEX_OUTPUT* pOut) const;
153
154 ADDR_E_RETURNCODE ComputeHtileInfo(
155 const ADDR_COMPUTE_HTILE_INFO_INPUT* pIn,
156 ADDR_COMPUTE_HTILE_INFO_OUTPUT* pOut) const;
157
158 ADDR_E_RETURNCODE ComputeCmaskInfo(
159 const ADDR_COMPUTE_CMASK_INFO_INPUT* pIn,
160 ADDR_COMPUTE_CMASK_INFO_OUTPUT* pOut) const;
161
162 ADDR_E_RETURNCODE ComputeDccInfo(
163 const ADDR_COMPUTE_DCCINFO_INPUT* pIn,
164 ADDR_COMPUTE_DCCINFO_OUTPUT* pOut) const;
165
166 ADDR_E_RETURNCODE ComputeHtileAddrFromCoord(
167 const ADDR_COMPUTE_HTILE_ADDRFROMCOORD_INPUT* pIn,
168 ADDR_COMPUTE_HTILE_ADDRFROMCOORD_OUTPUT* pOut) const;
169
170 ADDR_E_RETURNCODE ComputeCmaskAddrFromCoord(
171 const ADDR_COMPUTE_CMASK_ADDRFROMCOORD_INPUT* pIn,
172 ADDR_COMPUTE_CMASK_ADDRFROMCOORD_OUTPUT* pOut) const;
173
174 ADDR_E_RETURNCODE ComputeHtileCoordFromAddr(
175 const ADDR_COMPUTE_HTILE_COORDFROMADDR_INPUT* pIn,
176 ADDR_COMPUTE_HTILE_COORDFROMADDR_OUTPUT* pOut) const;
177
178 ADDR_E_RETURNCODE ComputeCmaskCoordFromAddr(
179 const ADDR_COMPUTE_CMASK_COORDFROMADDR_INPUT* pIn,
180 ADDR_COMPUTE_CMASK_COORDFROMADDR_OUTPUT* pOut) const;
181
182 ADDR_E_RETURNCODE ComputePrtInfo(
183 const ADDR_PRT_INFO_INPUT* pIn,
184 ADDR_PRT_INFO_OUTPUT* pOut) const;
185 protected:
186 AddrLib1(); // Constructor is protected
187 AddrLib1(const AddrClient* pClient);
188
189 /// Pure Virtual function for Hwl computing surface info
190 virtual ADDR_E_RETURNCODE HwlComputeSurfaceInfo(
191 const ADDR_COMPUTE_SURFACE_INFO_INPUT* pIn,
192 ADDR_COMPUTE_SURFACE_INFO_OUTPUT* pOut) const = 0;
193
194 /// Pure Virtual function for Hwl computing surface address from coord
195 virtual ADDR_E_RETURNCODE HwlComputeSurfaceAddrFromCoord(
196 const ADDR_COMPUTE_SURFACE_ADDRFROMCOORD_INPUT* pIn,
197 ADDR_COMPUTE_SURFACE_ADDRFROMCOORD_OUTPUT* pOut) const = 0;
198
199 /// Pure Virtual function for Hwl computing surface coord from address
200 virtual ADDR_E_RETURNCODE HwlComputeSurfaceCoordFromAddr(
201 const ADDR_COMPUTE_SURFACE_COORDFROMADDR_INPUT* pIn,
202 ADDR_COMPUTE_SURFACE_COORDFROMADDR_OUTPUT* pOut) const = 0;
203
204 /// Pure Virtual function for Hwl computing surface tile swizzle
205 virtual ADDR_E_RETURNCODE HwlComputeSliceTileSwizzle(
206 const ADDR_COMPUTE_SLICESWIZZLE_INPUT* pIn,
207 ADDR_COMPUTE_SLICESWIZZLE_OUTPUT* pOut) const = 0;
208
209 /// Pure Virtual function for Hwl extracting bank/pipe swizzle from base256b
210 virtual ADDR_E_RETURNCODE HwlExtractBankPipeSwizzle(
211 const ADDR_EXTRACT_BANKPIPE_SWIZZLE_INPUT* pIn,
212 ADDR_EXTRACT_BANKPIPE_SWIZZLE_OUTPUT* pOut) const = 0;
213
214 /// Pure Virtual function for Hwl combining bank/pipe swizzle
215 virtual ADDR_E_RETURNCODE HwlCombineBankPipeSwizzle(
216 UINT_32 bankSwizzle, UINT_32 pipeSwizzle, ADDR_TILEINFO* pTileInfo,
217 UINT_64 baseAddr, UINT_32* pTileSwizzle) const = 0;
218
219 /// Pure Virtual function for Hwl computing base swizzle
220 virtual ADDR_E_RETURNCODE HwlComputeBaseSwizzle(
221 const ADDR_COMPUTE_BASE_SWIZZLE_INPUT* pIn,
222 ADDR_COMPUTE_BASE_SWIZZLE_OUTPUT* pOut) const = 0;
223
224 /// Pure Virtual function for Hwl computing HTILE base align
225 virtual UINT_32 HwlComputeHtileBaseAlign(
226 BOOL_32 isTcCompatible, BOOL_32 isLinear, ADDR_TILEINFO* pTileInfo) const = 0;
227
228 /// Pure Virtual function for Hwl computing HTILE bpp
229 virtual UINT_32 HwlComputeHtileBpp(
230 BOOL_32 isWidth8, BOOL_32 isHeight8) const = 0;
231
232 /// Pure Virtual function for Hwl computing HTILE bytes
233 virtual UINT_64 HwlComputeHtileBytes(
234 UINT_32 pitch, UINT_32 height, UINT_32 bpp,
235 BOOL_32 isLinear, UINT_32 numSlices, UINT_64* pSliceBytes, UINT_32 baseAlign) const = 0;
236
237 /// Pure Virtual function for Hwl computing FMASK info
238 virtual ADDR_E_RETURNCODE HwlComputeFmaskInfo(
239 const ADDR_COMPUTE_FMASK_INFO_INPUT* pIn,
240 ADDR_COMPUTE_FMASK_INFO_OUTPUT* pOut) = 0;
241
242 /// Pure Virtual function for Hwl FMASK address from coord
243 virtual ADDR_E_RETURNCODE HwlComputeFmaskAddrFromCoord(
244 const ADDR_COMPUTE_FMASK_ADDRFROMCOORD_INPUT* pIn,
245 ADDR_COMPUTE_FMASK_ADDRFROMCOORD_OUTPUT* pOut) const = 0;
246
247 /// Pure Virtual function for Hwl FMASK coord from address
248 virtual ADDR_E_RETURNCODE HwlComputeFmaskCoordFromAddr(
249 const ADDR_COMPUTE_FMASK_COORDFROMADDR_INPUT* pIn,
250 ADDR_COMPUTE_FMASK_COORDFROMADDR_OUTPUT* pOut) const = 0;
251
252 /// Pure Virtual function for Hwl convert tile info from real value to HW value
253 virtual ADDR_E_RETURNCODE HwlConvertTileInfoToHW(
254 const ADDR_CONVERT_TILEINFOTOHW_INPUT* pIn,
255 ADDR_CONVERT_TILEINFOTOHW_OUTPUT* pOut) const = 0;
256
257 /// Pure Virtual function for Hwl compute mipmap info
258 virtual BOOL_32 HwlComputeMipLevel(
259 ADDR_COMPUTE_SURFACE_INFO_INPUT* pIn) const = 0;
260
261 /// Pure Virtual function for Hwl compute max cmask blockMax value
262 virtual BOOL_32 HwlGetMaxCmaskBlockMax() const = 0;
263
264 /// Pure Virtual function for Hwl compute fmask bits
265 virtual UINT_32 HwlComputeFmaskBits(
266 const ADDR_COMPUTE_FMASK_INFO_INPUT* pIn,
267 UINT_32* pNumSamples) const = 0;
268
269 /// Virtual function to get index (not pure then no need to implement this in all hwls
270 virtual ADDR_E_RETURNCODE HwlGetTileIndex(
271 const ADDR_GET_TILEINDEX_INPUT* pIn,
272 ADDR_GET_TILEINDEX_OUTPUT* pOut) const
273 {
274 return ADDR_NOTSUPPORTED;
275 }
276
277 /// Virtual function for Hwl to compute Dcc info
278 virtual ADDR_E_RETURNCODE HwlComputeDccInfo(
279 const ADDR_COMPUTE_DCCINFO_INPUT* pIn,
280 ADDR_COMPUTE_DCCINFO_OUTPUT* pOut) const
281 {
282 return ADDR_NOTSUPPORTED;
283 }
284
285 /// Virtual function to get cmask address for tc compatible cmask
286 virtual ADDR_E_RETURNCODE HwlComputeCmaskAddrFromCoord(
287 const ADDR_COMPUTE_CMASK_ADDRFROMCOORD_INPUT* pIn,
288 ADDR_COMPUTE_CMASK_ADDRFROMCOORD_OUTPUT* pOut) const
289 {
290 return ADDR_NOTSUPPORTED;
291 }
292
293 /// Virtual function to get htile address for tc compatible htile
294 virtual ADDR_E_RETURNCODE HwlComputeHtileAddrFromCoord(
295 const ADDR_COMPUTE_HTILE_ADDRFROMCOORD_INPUT* pIn,
296 ADDR_COMPUTE_HTILE_ADDRFROMCOORD_OUTPUT* pOut) const
297 {
298 return ADDR_NOTSUPPORTED;
299 }
300
301 // Compute attributes
302
303 // HTILE
304 UINT_32 ComputeHtileInfo(
305 ADDR_HTILE_FLAGS flags,
306 UINT_32 pitchIn, UINT_32 heightIn, UINT_32 numSlices,
307 BOOL_32 isLinear, BOOL_32 isWidth8, BOOL_32 isHeight8,
308 ADDR_TILEINFO* pTileInfo,
309 UINT_32* pPitchOut, UINT_32* pHeightOut, UINT_64* pHtileBytes,
310 UINT_32* pMacroWidth = NULL, UINT_32* pMacroHeight = NULL,
311 UINT_64* pSliceSize = NULL, UINT_32* pBaseAlign = NULL) const;
312
313 // CMASK
314 ADDR_E_RETURNCODE ComputeCmaskInfo(
315 ADDR_CMASK_FLAGS flags,
316 UINT_32 pitchIn, UINT_32 heightIn, UINT_32 numSlices, BOOL_32 isLinear,
317 ADDR_TILEINFO* pTileInfo, UINT_32* pPitchOut, UINT_32* pHeightOut, UINT_64* pCmaskBytes,
318 UINT_32* pMacroWidth, UINT_32* pMacroHeight, UINT_64* pSliceSize = NULL,
319 UINT_32* pBaseAlign = NULL, UINT_32* pBlockMax = NULL) const;
320
321 virtual VOID HwlComputeTileDataWidthAndHeightLinear(
322 UINT_32* pMacroWidth, UINT_32* pMacroHeight,
323 UINT_32 bpp, ADDR_TILEINFO* pTileInfo) const;
324
325 // CMASK & HTILE addressing
326 virtual UINT_64 HwlComputeXmaskAddrFromCoord(
327 UINT_32 pitch, UINT_32 height, UINT_32 x, UINT_32 y, UINT_32 slice,
328 UINT_32 numSlices, UINT_32 factor, BOOL_32 isLinear, BOOL_32 isWidth8,
329 BOOL_32 isHeight8, ADDR_TILEINFO* pTileInfo,
330 UINT_32* bitPosition) const;
331
332 virtual VOID HwlComputeXmaskCoordFromAddr(
333 UINT_64 addr, UINT_32 bitPosition, UINT_32 pitch, UINT_32 height, UINT_32 numSlices,
334 UINT_32 factor, BOOL_32 isLinear, BOOL_32 isWidth8, BOOL_32 isHeight8,
335 ADDR_TILEINFO* pTileInfo, UINT_32* pX, UINT_32* pY, UINT_32* pSlice) const;
336
337 // Surface mipmap
338 VOID ComputeMipLevel(
339 ADDR_COMPUTE_SURFACE_INFO_INPUT* pIn) const;
340
341 /// Pure Virtual function for Hwl checking degrade for base level
342 virtual BOOL_32 HwlDegradeBaseLevel(
343 const ADDR_COMPUTE_SURFACE_INFO_INPUT* pIn) const = 0;
344
345 virtual BOOL_32 HwlOverrideTileMode(
346 const ADDR_COMPUTE_SURFACE_INFO_INPUT* pIn,
347 AddrTileMode* pTileMode,
348 AddrTileType* pTileType) const
349 {
350 // not supported in hwl layer, FALSE for not-overrided
351 return FALSE;
352 }
353
354 AddrTileMode DegradeLargeThickTile(AddrTileMode tileMode, UINT_32 bpp) const;
355
356 VOID PadDimensions(
357 AddrTileMode tileMode, UINT_32 bpp, ADDR_SURFACE_FLAGS flags,
358 UINT_32 numSamples, ADDR_TILEINFO* pTileInfo, UINT_32 padDims, UINT_32 mipLevel,
359 UINT_32* pPitch, UINT_32 pitchAlign, UINT_32* pHeight, UINT_32 heightAlign,
360 UINT_32* pSlices, UINT_32 sliceAlign) const;
361
362 virtual VOID HwlPadDimensions(
363 AddrTileMode tileMode, UINT_32 bpp, ADDR_SURFACE_FLAGS flags,
364 UINT_32 numSamples, ADDR_TILEINFO* pTileInfo, UINT_32 padDims, UINT_32 mipLevel,
365 UINT_32* pPitch, UINT_32 pitchAlign, UINT_32* pHeight, UINT_32 heightAlign,
366 UINT_32* pSlices, UINT_32 sliceAlign) const
367 {
368 }
369
370 //
371 // Addressing shared for linear/1D tiling
372 //
373 UINT_64 ComputeSurfaceAddrFromCoordLinear(
374 UINT_32 x, UINT_32 y, UINT_32 slice, UINT_32 sample,
375 UINT_32 bpp, UINT_32 pitch, UINT_32 height, UINT_32 numSlices,
376 UINT_32* pBitPosition) const;
377
378 VOID ComputeSurfaceCoordFromAddrLinear(
379 UINT_64 addr, UINT_32 bitPosition, UINT_32 bpp,
380 UINT_32 pitch, UINT_32 height, UINT_32 numSlices,
381 UINT_32* pX, UINT_32* pY, UINT_32* pSlice, UINT_32* pSample) const;
382
383 VOID ComputeSurfaceCoordFromAddrMicroTiled(
384 UINT_64 addr, UINT_32 bitPosition,
385 UINT_32 bpp, UINT_32 pitch, UINT_32 height, UINT_32 numSamples,
386 AddrTileMode tileMode, UINT_32 tileBase, UINT_32 compBits,
387 UINT_32* pX, UINT_32* pY, UINT_32* pSlice, UINT_32* pSample,
388 AddrTileType microTileType, BOOL_32 isDepthSampleOrder) const;
389
390 UINT_32 ComputePixelIndexWithinMicroTile(
391 UINT_32 x, UINT_32 y, UINT_32 z,
392 UINT_32 bpp, AddrTileMode tileMode, AddrTileType microTileType) const;
393
394 /// Pure Virtual function for Hwl computing coord from offset inside micro tile
395 virtual VOID HwlComputePixelCoordFromOffset(
396 UINT_32 offset, UINT_32 bpp, UINT_32 numSamples,
397 AddrTileMode tileMode, UINT_32 tileBase, UINT_32 compBits,
398 UINT_32* pX, UINT_32* pY, UINT_32* pSlice, UINT_32* pSample,
399 AddrTileType microTileType, BOOL_32 isDepthSampleOrder) const = 0;
400
401 //
402 // Addressing shared by all
403 //
404 virtual UINT_32 HwlGetPipes(
405 const ADDR_TILEINFO* pTileInfo) const;
406
407 UINT_32 ComputePipeFromAddr(
408 UINT_64 addr, UINT_32 numPipes) const;
409
410 /// Pure Virtual function for Hwl computing pipe from coord
411 virtual UINT_32 ComputePipeFromCoord(
412 UINT_32 x, UINT_32 y, UINT_32 slice, AddrTileMode tileMode,
413 UINT_32 pipeSwizzle, BOOL_32 flags, ADDR_TILEINFO* pTileInfo) const = 0;
414
415 /// Pure Virtual function for Hwl computing coord Y for 8 pipe cmask/htile
416 virtual UINT_32 HwlComputeXmaskCoordYFrom8Pipe(
417 UINT_32 pipe, UINT_32 x) const = 0;
418
419 //
420 // Misc helper
421 //
422 static const AddrTileModeFlags m_modeFlags[ADDR_TM_COUNT];
423
424 static UINT_32 ComputeSurfaceThickness(
425 AddrTileMode tileMode);
426
427 // Checking tile mode
428 static BOOL_32 IsMacroTiled(AddrTileMode tileMode);
429 static BOOL_32 IsMacro3dTiled(AddrTileMode tileMode);
430 static BOOL_32 IsLinear(AddrTileMode tileMode);
431 static BOOL_32 IsMicroTiled(AddrTileMode tileMode);
432 static BOOL_32 IsPrtTileMode(AddrTileMode tileMode);
433 static BOOL_32 IsPrtNoRotationTileMode(AddrTileMode tileMode);
434
435 /// Return TRUE if tile info is needed
436 BOOL_32 UseTileInfo() const
437 {
438 return !m_configFlags.ignoreTileInfo;
439 }
440
441 /// Adjusts pitch alignment for flipping surface
442 VOID AdjustPitchAlignment(
443 ADDR_SURFACE_FLAGS flags, UINT_32* pPitchAlign) const;
444
445 /// Overwrite tile config according to tile index
446 virtual ADDR_E_RETURNCODE HwlSetupTileCfg(
447 UINT_32 bpp, INT_32 index, INT_32 macroModeIndex,
448 ADDR_TILEINFO* pInfo, AddrTileMode* mode = NULL, AddrTileType* type = NULL) const;
449
450 /// Overwrite macro tile config according to tile index
451 virtual INT_32 HwlComputeMacroModeIndex(
452 INT_32 index, ADDR_SURFACE_FLAGS flags, UINT_32 bpp, UINT_32 numSamples,
453 ADDR_TILEINFO* pTileInfo, AddrTileMode *pTileMode = NULL, AddrTileType *pTileType = NULL
454 ) const
455 {
456 return TileIndexNoMacroIndex;
457 }
458
459 /// Pre-handler of 3x pitch (96 bit) adjustment
460 virtual UINT_32 HwlPreHandleBaseLvl3xPitch(
461 const ADDR_COMPUTE_SURFACE_INFO_INPUT* pIn, UINT_32 expPitch) const;
462 /// Post-handler of 3x pitch adjustment
463 virtual UINT_32 HwlPostHandleBaseLvl3xPitch(
464 const ADDR_COMPUTE_SURFACE_INFO_INPUT* pIn, UINT_32 expPitch) const;
465 /// Check miplevel after surface adjustment
466 ADDR_E_RETURNCODE PostComputeMipLevel(
467 ADDR_COMPUTE_SURFACE_INFO_INPUT* pIn,
468 ADDR_COMPUTE_SURFACE_INFO_OUTPUT* pOut) const;
469
470 /// Quad buffer stereo support, has its implementation in ind. layer
471 virtual BOOL_32 ComputeQbStereoInfo(
472 ADDR_COMPUTE_SURFACE_INFO_OUTPUT* pOut) const;
473
474 /// Pure virutual function to compute stereo bank swizzle for right eye
475 virtual UINT_32 HwlComputeQbStereoRightSwizzle(
476 ADDR_COMPUTE_SURFACE_INFO_OUTPUT* pOut) const = 0;
477
478 private:
479 // Disallow the copy constructor
480 AddrLib1(const AddrLib1& a);
481
482 // Disallow the assignment operator
483 AddrLib1& operator=(const AddrLib1& a);
484
485 UINT_32 ComputeCmaskBaseAlign(
486 ADDR_CMASK_FLAGS flags, ADDR_TILEINFO* pTileInfo) const;
487
488 UINT_64 ComputeCmaskBytes(
489 UINT_32 pitch, UINT_32 height, UINT_32 numSlices) const;
490
491 //
492 // CMASK/HTILE shared methods
493 //
494 VOID ComputeTileDataWidthAndHeight(
495 UINT_32 bpp, UINT_32 cacheBits, ADDR_TILEINFO* pTileInfo,
496 UINT_32* pMacroWidth, UINT_32* pMacroHeight) const;
497
498 UINT_32 ComputeXmaskCoordYFromPipe(
499 UINT_32 pipe, UINT_32 x) const;
500
501 BOOL_32 OptimizeTileMode(
502 const ADDR_COMPUTE_SURFACE_INFO_INPUT* pIn, AddrTileMode* pTileMode) const;
503 };
504
505 #endif
506