amdgpu/addrlib: Add new flags minimizePadding and maxBaseAlign
[mesa.git] / src / amd / addrlib / r800 / ciaddrlib.h
1 /*
2 * Copyright © 2014 Advanced Micro Devices, Inc.
3 * All Rights Reserved.
4 *
5 * Permission is hereby granted, free of charge, to any person obtaining
6 * a copy of this software and associated documentation files (the
7 * "Software"), to deal in the Software without restriction, including
8 * without limitation the rights to use, copy, modify, merge, publish,
9 * distribute, sub license, and/or sell copies of the Software, and to
10 * permit persons to whom the Software is furnished to do so, subject to
11 * the following conditions:
12 *
13 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
14 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
15 * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
16 * NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS, AUTHORS
17 * AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
18 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
20 * USE OR OTHER DEALINGS IN THE SOFTWARE.
21 *
22 * The above copyright notice and this permission notice (including the
23 * next paragraph) shall be included in all copies or substantial portions
24 * of the Software.
25 */
26
27 /**
28 ****************************************************************************************************
29 * @file ciaddrlib.h
30 * @brief Contains the CiLib class definition.
31 ****************************************************************************************************
32 */
33
34 #ifndef __CI_ADDR_LIB_H__
35 #define __CI_ADDR_LIB_H__
36
37 #include "addrlib1.h"
38 #include "siaddrlib.h"
39
40 namespace Addr
41 {
42 namespace V1
43 {
44
45 /**
46 ****************************************************************************************************
47 * @brief CI specific settings structure.
48 ****************************************************************************************************
49 */
50 struct CIChipSettings
51 {
52 struct
53 {
54 UINT_32 isSeaIsland : 1;
55 UINT_32 isBonaire : 1;
56 UINT_32 isKaveri : 1;
57 UINT_32 isSpectre : 1;
58 UINT_32 isSpooky : 1;
59 UINT_32 isKalindi : 1;
60 // Hawaii is GFXIP 7.2
61 UINT_32 isHawaii : 1;
62
63 // VI
64 UINT_32 isVolcanicIslands : 1;
65 UINT_32 isIceland : 1;
66 UINT_32 isTonga : 1;
67 UINT_32 isFiji : 1;
68 UINT_32 isPolaris10 : 1;
69 UINT_32 isPolaris11 : 1;
70 UINT_32 isPolaris12 : 1;
71 // VI fusion (Carrizo)
72 UINT_32 isCarrizo : 1;
73 };
74 };
75
76 /**
77 ****************************************************************************************************
78 * @brief This class is the CI specific address library
79 * function set.
80 ****************************************************************************************************
81 */
82 class CiLib : public SiLib
83 {
84 public:
85 /// Creates CiLib object
86 static Addr::Lib* CreateObj(const Client* pClient)
87 {
88 VOID* pMem = Object::ClientAlloc(sizeof(CiLib), pClient);
89 return (pMem != NULL) ? new (pMem) CiLib(pClient) : NULL;
90 }
91
92 private:
93 CiLib(const Client* pClient);
94 virtual ~CiLib();
95
96 protected:
97
98 // Hwl interface - defined in AddrLib1
99 virtual ADDR_E_RETURNCODE HwlComputeSurfaceInfo(
100 const ADDR_COMPUTE_SURFACE_INFO_INPUT* pIn,
101 ADDR_COMPUTE_SURFACE_INFO_OUTPUT* pOut) const;
102
103 virtual ADDR_E_RETURNCODE HwlComputeFmaskInfo(
104 const ADDR_COMPUTE_FMASK_INFO_INPUT* pIn,
105 ADDR_COMPUTE_FMASK_INFO_OUTPUT* pOut);
106
107 virtual ChipFamily HwlConvertChipFamily(
108 UINT_32 uChipFamily, UINT_32 uChipRevision);
109
110 virtual BOOL_32 HwlInitGlobalParams(
111 const ADDR_CREATE_INPUT* pCreateIn);
112
113 virtual ADDR_E_RETURNCODE HwlSetupTileCfg(
114 UINT_32 bpp, INT_32 index, INT_32 macroModeIndex, ADDR_TILEINFO* pInfo,
115 AddrTileMode* pMode = 0, AddrTileType* pType = 0) const;
116
117 virtual VOID HwlComputeTileDataWidthAndHeightLinear(
118 UINT_32* pMacroWidth, UINT_32* pMacroHeight,
119 UINT_32 bpp, ADDR_TILEINFO* pTileInfo) const;
120
121 virtual INT_32 HwlComputeMacroModeIndex(
122 INT_32 tileIndex, ADDR_SURFACE_FLAGS flags, UINT_32 bpp, UINT_32 numSamples,
123 ADDR_TILEINFO* pTileInfo, AddrTileMode* pTileMode = NULL, AddrTileType* pTileType = NULL
124 ) const;
125
126 // Sub-hwl interface - defined in EgBasedLib
127 virtual VOID HwlSetupTileInfo(
128 AddrTileMode tileMode, ADDR_SURFACE_FLAGS flags,
129 UINT_32 bpp, UINT_32 pitch, UINT_32 height, UINT_32 numSamples,
130 ADDR_TILEINFO* inputTileInfo, ADDR_TILEINFO* outputTileInfo,
131 AddrTileType inTileType, ADDR_COMPUTE_SURFACE_INFO_OUTPUT* pOut) const;
132
133 virtual INT_32 HwlPostCheckTileIndex(
134 const ADDR_TILEINFO* pInfo, AddrTileMode mode, AddrTileType type,
135 INT curIndex = TileIndexInvalid) const;
136
137 virtual VOID HwlFmaskPreThunkSurfInfo(
138 const ADDR_COMPUTE_FMASK_INFO_INPUT* pFmaskIn,
139 const ADDR_COMPUTE_FMASK_INFO_OUTPUT* pFmaskOut,
140 ADDR_COMPUTE_SURFACE_INFO_INPUT* pSurfIn,
141 ADDR_COMPUTE_SURFACE_INFO_OUTPUT* pSurfOut) const;
142
143 virtual VOID HwlFmaskPostThunkSurfInfo(
144 const ADDR_COMPUTE_SURFACE_INFO_OUTPUT* pSurfOut,
145 ADDR_COMPUTE_FMASK_INFO_OUTPUT* pFmaskOut) const;
146
147 virtual AddrTileMode HwlDegradeThickTileMode(
148 AddrTileMode baseTileMode, UINT_32 numSlices, UINT_32* pBytesPerTile) const;
149
150 virtual VOID HwlOverrideTileMode(ADDR_COMPUTE_SURFACE_INFO_INPUT* pInOut) const;
151
152 virtual VOID HwlOptimizeTileMode(ADDR_COMPUTE_SURFACE_INFO_INPUT* pInOut) const;
153
154 virtual VOID HwlSelectTileMode(ADDR_COMPUTE_SURFACE_INFO_INPUT* pInOut) const;
155
156 /// Overwrite tile setting to PRT
157 virtual VOID HwlSetPrtTileMode(ADDR_COMPUTE_SURFACE_INFO_INPUT* pInOut) const;
158
159 virtual ADDR_E_RETURNCODE HwlComputeDccInfo(
160 const ADDR_COMPUTE_DCCINFO_INPUT* pIn,
161 ADDR_COMPUTE_DCCINFO_OUTPUT* pOut) const;
162
163 virtual ADDR_E_RETURNCODE HwlComputeCmaskAddrFromCoord(
164 const ADDR_COMPUTE_CMASK_ADDRFROMCOORD_INPUT* pIn,
165 ADDR_COMPUTE_CMASK_ADDRFROMCOORD_OUTPUT* pOut) const;
166
167 virtual ADDR_E_RETURNCODE HwlComputeHtileAddrFromCoord(
168 const ADDR_COMPUTE_HTILE_ADDRFROMCOORD_INPUT* pIn,
169 ADDR_COMPUTE_HTILE_ADDRFROMCOORD_OUTPUT* pOut) const;
170
171 virtual ADDR_E_RETURNCODE HwlGetMaxAlignments(ADDR_GET_MAX_ALINGMENTS_OUTPUT* pOut) const;
172
173 virtual VOID HwlPadDimensions(
174 AddrTileMode tileMode, UINT_32 bpp, ADDR_SURFACE_FLAGS flags,
175 UINT_32 numSamples, ADDR_TILEINFO* pTileInfo, UINT_32 mipLevel,
176 UINT_32* pPitch, UINT_32 *PitchAlign, UINT_32 height, UINT_32 heightAlign) const;
177
178 virtual VOID HwlComputeSurfaceAlignmentsMacroTiled(
179 AddrTileMode tileMode, UINT_32 bpp, ADDR_SURFACE_FLAGS flags,
180 UINT_32 mipLevel, UINT_32 numSamples, ADDR_TILEINFO* pTileInfo,
181 UINT_32* pBaseAlign, UINT_32* pPitchAlign, UINT_32* pHeightAlign,
182 UINT_32* pMacroTileWidth, UINT_32* pMacroTileHeight) const;
183
184 private:
185 VOID ReadGbTileMode(
186 UINT_32 regValue, TileConfig* pCfg) const;
187
188 VOID ReadGbMacroTileCfg(
189 UINT_32 regValue, ADDR_TILEINFO* pCfg) const;
190
191 BOOL_32 InitTileSettingTable(
192 const UINT_32 *pSetting, UINT_32 noOfEntries);
193
194 BOOL_32 InitMacroTileCfgTable(
195 const UINT_32 *pSetting, UINT_32 noOfEntries);
196
197 UINT_64 HwlComputeMetadataNibbleAddress(
198 UINT_64 uncompressedDataByteAddress,
199 UINT_64 dataBaseByteAddress,
200 UINT_64 metadataBaseByteAddress,
201 UINT_32 metadataBitSize,
202 UINT_32 elementBitSize,
203 UINT_32 blockByteSize,
204 UINT_32 pipeInterleaveBytes,
205 UINT_32 numOfPipes,
206 UINT_32 numOfBanks,
207 UINT_32 numOfSamplesPerSplit) const;
208
209 static const UINT_32 MacroTileTableSize = 16;
210 ADDR_TILEINFO m_macroTileTable[MacroTileTableSize];
211 UINT_32 m_noOfMacroEntries;
212 BOOL_32 m_allowNonDispThickModes;
213
214 CIChipSettings m_settings;
215 };
216
217 } // V1
218 } // Addr
219
220 #endif
221
222