amdgpu/addrlib: rename SiAddrLib/CiAddrLib to match internal spelling
[mesa.git] / src / amd / addrlib / r800 / siaddrlib.h
1 /*
2 * Copyright © 2014 Advanced Micro Devices, Inc.
3 * All Rights Reserved.
4 *
5 * Permission is hereby granted, free of charge, to any person obtaining
6 * a copy of this software and associated documentation files (the
7 * "Software"), to deal in the Software without restriction, including
8 * without limitation the rights to use, copy, modify, merge, publish,
9 * distribute, sub license, and/or sell copies of the Software, and to
10 * permit persons to whom the Software is furnished to do so, subject to
11 * the following conditions:
12 *
13 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
14 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
15 * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
16 * NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS, AUTHORS
17 * AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
18 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
20 * USE OR OTHER DEALINGS IN THE SOFTWARE.
21 *
22 * The above copyright notice and this permission notice (including the
23 * next paragraph) shall be included in all copies or substantial portions
24 * of the Software.
25 */
26
27 /**
28 ***************************************************************************************************
29 * @file siaddrlib.h
30 * @brief Contains the R800AddrLib class definition.
31 ***************************************************************************************************
32 */
33
34 #ifndef __SI_ADDR_LIB_H__
35 #define __SI_ADDR_LIB_H__
36
37 #include "addrlib.h"
38 #include "egbaddrlib.h"
39
40 /**
41 ***************************************************************************************************
42 * @brief Describes the information in tile mode table
43 ***************************************************************************************************
44 */
45 struct ADDR_TILECONFIG
46 {
47 AddrTileMode mode;
48 AddrTileType type;
49 ADDR_TILEINFO info;
50 };
51
52 /**
53 ***************************************************************************************************
54 * @brief SI specific settings structure.
55 ***************************************************************************************************
56 */
57 struct SIChipSettings
58 {
59 struct
60 {
61 UINT_32 isSouthernIsland : 1;
62 UINT_32 isTahiti : 1;
63 UINT_32 isPitCairn : 1;
64 UINT_32 isCapeVerde : 1;
65 /// Oland/Hainan are of GFXIP 6.0, similar with SI
66 UINT_32 isOland : 1;
67 UINT_32 isHainan : 1;
68 };
69 };
70
71 /**
72 ***************************************************************************************************
73 * @brief This class is the SI specific address library
74 * function set.
75 ***************************************************************************************************
76 */
77 class SiAddrLib : public EgBasedAddrLib
78 {
79 public:
80 /// Creates SIAddrLib object
81 static AddrLib* CreateObj(const AddrClient* pClient)
82 {
83 return new(pClient) SiAddrLib(pClient);
84 }
85
86 protected:
87 SiAddrLib(const AddrClient* pClient);
88 virtual ~SiAddrLib();
89
90 // Hwl interface - defined in AddrLib
91 virtual ADDR_E_RETURNCODE HwlComputeSurfaceInfo(
92 const ADDR_COMPUTE_SURFACE_INFO_INPUT* pIn,
93 ADDR_COMPUTE_SURFACE_INFO_OUTPUT* pOut) const;
94
95 virtual ADDR_E_RETURNCODE HwlConvertTileInfoToHW(
96 const ADDR_CONVERT_TILEINFOTOHW_INPUT* pIn,
97 ADDR_CONVERT_TILEINFOTOHW_OUTPUT* pOut) const;
98
99 virtual UINT_64 HwlComputeXmaskAddrFromCoord(
100 UINT_32 pitch, UINT_32 height, UINT_32 x, UINT_32 y, UINT_32 slice, UINT_32 numSlices,
101 UINT_32 factor, BOOL_32 isLinear, BOOL_32 isWidth8, BOOL_32 isHeight8,
102 ADDR_TILEINFO* pTileInfo, UINT_32* pBitPosition) const;
103
104 virtual VOID HwlComputeXmaskCoordFromAddr(
105 UINT_64 addr, UINT_32 bitPosition, UINT_32 pitch, UINT_32 height, UINT_32 numSlices,
106 UINT_32 factor, BOOL_32 isLinear, BOOL_32 isWidth8, BOOL_32 isHeight8,
107 ADDR_TILEINFO* pTileInfo, UINT_32* pX, UINT_32* pY, UINT_32* pSlice) const;
108
109 virtual ADDR_E_RETURNCODE HwlGetTileIndex(
110 const ADDR_GET_TILEINDEX_INPUT* pIn,
111 ADDR_GET_TILEINDEX_OUTPUT* pOut) const;
112
113 virtual BOOL_32 HwlComputeMipLevel(
114 ADDR_COMPUTE_SURFACE_INFO_INPUT* pIn) const;
115
116 virtual AddrChipFamily HwlConvertChipFamily(
117 UINT_32 uChipFamily, UINT_32 uChipRevision);
118
119 virtual BOOL_32 HwlInitGlobalParams(
120 const ADDR_CREATE_INPUT* pCreateIn);
121
122 virtual ADDR_E_RETURNCODE HwlSetupTileCfg(
123 INT_32 index, INT_32 macroModeIndex,
124 ADDR_TILEINFO* pInfo, AddrTileMode* pMode = 0, AddrTileType* pType = 0) const;
125
126 virtual VOID HwlComputeTileDataWidthAndHeightLinear(
127 UINT_32* pMacroWidth, UINT_32* pMacroHeight,
128 UINT_32 bpp, ADDR_TILEINFO* pTileInfo) const;
129
130 virtual UINT_64 HwlComputeHtileBytes(
131 UINT_32 pitch, UINT_32 height, UINT_32 bpp,
132 BOOL_32 isLinear, UINT_32 numSlices, UINT_64* pSliceBytes, UINT_32 baseAlign) const;
133
134 virtual UINT_32 ComputePipeFromCoord(
135 UINT_32 x, UINT_32 y, UINT_32 slice,
136 AddrTileMode tileMode, UINT_32 pipeSwizzle, BOOL_32 ignoreSE,
137 ADDR_TILEINFO* pTileInfo) const;
138
139 virtual UINT_32 HwlGetPipes(const ADDR_TILEINFO* pTileInfo) const;
140
141 /// Pre-handler of 3x pitch (96 bit) adjustment
142 virtual UINT_32 HwlPreHandleBaseLvl3xPitch(
143 const ADDR_COMPUTE_SURFACE_INFO_INPUT* pIn, UINT_32 expPitch) const;
144 /// Post-handler of 3x pitch adjustment
145 virtual UINT_32 HwlPostHandleBaseLvl3xPitch(
146 const ADDR_COMPUTE_SURFACE_INFO_INPUT* pIn, UINT_32 expPitch) const;
147
148 /// Dummy function to finalize the inheritance
149 virtual UINT_32 HwlComputeXmaskCoordYFrom8Pipe(
150 UINT_32 pipe, UINT_32 x) const;
151
152 // Sub-hwl interface - defined in EgBasedAddrLib
153 virtual VOID HwlSetupTileInfo(
154 AddrTileMode tileMode, ADDR_SURFACE_FLAGS flags,
155 UINT_32 bpp, UINT_32 pitch, UINT_32 height, UINT_32 numSamples,
156 ADDR_TILEINFO* inputTileInfo, ADDR_TILEINFO* outputTileInfo,
157 AddrTileType inTileType, ADDR_COMPUTE_SURFACE_INFO_OUTPUT* pOut) const;
158
159 virtual UINT_32 HwlGetPitchAlignmentMicroTiled(
160 AddrTileMode tileMode, UINT_32 bpp, ADDR_SURFACE_FLAGS flags, UINT_32 numSamples) const;
161
162 virtual UINT_64 HwlGetSizeAdjustmentMicroTiled(
163 UINT_32 thickness, UINT_32 bpp, ADDR_SURFACE_FLAGS flags, UINT_32 numSamples,
164 UINT_32 baseAlign, UINT_32 pitchAlign,
165 UINT_32 *pPitch, UINT_32 *pHeight) const;
166
167 virtual VOID HwlCheckLastMacroTiledLvl(
168 const ADDR_COMPUTE_SURFACE_INFO_INPUT* pIn, ADDR_COMPUTE_SURFACE_INFO_OUTPUT* pOut) const;
169
170 virtual BOOL_32 HwlTileInfoEqual(
171 const ADDR_TILEINFO* pLeft, const ADDR_TILEINFO* pRight) const;
172
173 virtual AddrTileMode HwlDegradeThickTileMode(
174 AddrTileMode baseTileMode, UINT_32 numSlices, UINT_32* pBytesPerTile) const;
175
176 virtual BOOL_32 HwlOverrideTileMode(
177 const ADDR_COMPUTE_SURFACE_INFO_INPUT* pIn,
178 AddrTileMode* pTileMode,
179 AddrTileType* pTileType) const;
180
181 virtual BOOL_32 HwlSanityCheckMacroTiled(
182 ADDR_TILEINFO* pTileInfo) const
183 {
184 return TRUE;
185 }
186
187 virtual UINT_32 HwlGetPitchAlignmentLinear(UINT_32 bpp, ADDR_SURFACE_FLAGS flags) const;
188
189 virtual UINT_64 HwlGetSizeAdjustmentLinear(
190 AddrTileMode tileMode,
191 UINT_32 bpp, UINT_32 numSamples, UINT_32 baseAlign, UINT_32 pitchAlign,
192 UINT_32 *pPitch, UINT_32 *pHeight, UINT_32 *pHeightAlign) const;
193
194 virtual VOID HwlComputeSurfaceCoord2DFromBankPipe(
195 AddrTileMode tileMode, UINT_32* pX, UINT_32* pY, UINT_32 slice,
196 UINT_32 bank, UINT_32 pipe,
197 UINT_32 bankSwizzle, UINT_32 pipeSwizzle, UINT_32 tileSlices,
198 BOOL_32 ignoreSE,
199 ADDR_TILEINFO* pTileInfo) const;
200
201 virtual UINT_32 HwlPreAdjustBank(
202 UINT_32 tileX, UINT_32 bank, ADDR_TILEINFO* pTileInfo) const;
203
204 virtual INT_32 HwlPostCheckTileIndex(
205 const ADDR_TILEINFO* pInfo, AddrTileMode mode, AddrTileType type,
206 INT curIndex = TileIndexInvalid) const;
207
208 virtual VOID HwlFmaskPreThunkSurfInfo(
209 const ADDR_COMPUTE_FMASK_INFO_INPUT* pFmaskIn,
210 const ADDR_COMPUTE_FMASK_INFO_OUTPUT* pFmaskOut,
211 ADDR_COMPUTE_SURFACE_INFO_INPUT* pSurfIn,
212 ADDR_COMPUTE_SURFACE_INFO_OUTPUT* pSurfOut) const;
213
214 virtual VOID HwlFmaskPostThunkSurfInfo(
215 const ADDR_COMPUTE_SURFACE_INFO_OUTPUT* pSurfOut,
216 ADDR_COMPUTE_FMASK_INFO_OUTPUT* pFmaskOut) const;
217
218 virtual UINT_32 HwlComputeFmaskBits(
219 const ADDR_COMPUTE_FMASK_INFO_INPUT* pIn,
220 UINT_32* pNumSamples) const;
221
222 virtual BOOL_32 HwlReduceBankWidthHeight(
223 UINT_32 tileSize, UINT_32 bpp, ADDR_SURFACE_FLAGS flags, UINT_32 numSamples,
224 UINT_32 bankHeightAlign, UINT_32 pipes,
225 ADDR_TILEINFO* pTileInfo) const
226 {
227 return TRUE;
228 }
229
230 // Protected non-virtual functions
231 VOID ComputeTileCoordFromPipeAndElemIdx(
232 UINT_32 elemIdx, UINT_32 pipe, AddrPipeCfg pipeCfg, UINT_32 pitchInMacroTile,
233 UINT_32 x, UINT_32 y, UINT_32* pX, UINT_32* pY) const;
234
235 UINT_32 TileCoordToMaskElementIndex(
236 UINT_32 tx, UINT_32 ty, AddrPipeCfg pipeConfig,
237 UINT_32 *macroShift, UINT_32 *elemIdxBits) const;
238
239 BOOL_32 DecodeGbRegs(
240 const ADDR_REGISTER_VALUE* pRegValue);
241
242 const ADDR_TILECONFIG* GetTileSetting(
243 UINT_32 index) const;
244
245 static const UINT_32 TileTableSize = 32;
246 ADDR_TILECONFIG m_tileTable[TileTableSize];
247 UINT_32 m_noOfEntries;
248
249 private:
250
251 UINT_32 GetPipePerSurf(AddrPipeCfg pipeConfig) const;
252
253 VOID ReadGbTileMode(
254 UINT_32 regValue, ADDR_TILECONFIG* pCfg) const;
255 BOOL_32 InitTileSettingTable(
256 const UINT_32 *pSetting, UINT_32 noOfEntries);
257
258 SIChipSettings m_settings;
259 };
260
261 #endif
262