2 * Copyright © 2007-2019 Advanced Micro Devices, Inc.
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22 * The above copyright notice and this permission notice (including the
23 * next paragraph) shall be included in all copies or substantial portions
28 ************************************************************************************************************************
30 * @brief Contains the Addr::V2::Lib class definition.
31 ************************************************************************************************************************
34 #ifndef __ADDR2_LIB2_H__
35 #define __ADDR2_LIB2_H__
45 ************************************************************************************************************************
46 * @brief Flags for SwizzleModeTable
47 ************************************************************************************************************************
49 struct SwizzleModeFlags
52 UINT_32 isLinear
: 1; // Linear
55 UINT_32 is256b
: 1; // Block size is 256B
56 UINT_32 is4kb
: 1; // Block size is 4KB
57 UINT_32 is64kb
: 1; // Block size is 64KB
58 UINT_32 isVar
: 1; // Block size is variable
60 UINT_32 isZ
: 1; // Z order swizzle mode
61 UINT_32 isStd
: 1; // Standard swizzle mode
62 UINT_32 isDisp
: 1; // Display swizzle mode
63 UINT_32 isRot
: 1; // Rotate swizzle mode
66 UINT_32 isXor
: 1; // XOR after swizzle if set
68 UINT_32 isT
: 1; // T mode
70 UINT_32 isRtOpt
: 1; // mode opt for render target
86 // Macro define resource block type
89 AddrBlockMicro
= 0, // Resource uses 256B block
90 AddrBlock4KB
= 1, // Resource uses 4KB block
91 AddrBlock64KB
= 2, // Resource uses 64KB block
92 AddrBlockVar
= 3, // Resource uses var block, only valid for GFX9
93 AddrBlockLinear
= 4, // Resource uses linear swizzle mode
95 AddrBlockMaxTiledType
= AddrBlock64KB
+ 1,
100 AddrBlockSetMicro
= 1 << AddrBlockMicro
,
101 AddrBlockSetMacro4KB
= 1 << AddrBlock4KB
,
102 AddrBlockSetMacro64KB
= 1 << AddrBlock64KB
,
103 AddrBlockSetVar
= 1 << AddrBlockVar
,
104 AddrBlockSetLinear
= 1 << AddrBlockLinear
,
106 AddrBlockSetMacro
= AddrBlockSetMacro4KB
| AddrBlockSetMacro64KB
,
111 AddrSwSetZ
= 1 << ADDR_SW_Z
,
112 AddrSwSetS
= 1 << ADDR_SW_S
,
113 AddrSwSetD
= 1 << ADDR_SW_D
,
114 AddrSwSetR
= 1 << ADDR_SW_R
,
116 AddrSwSetAll
= AddrSwSetZ
| AddrSwSetS
| AddrSwSetD
| AddrSwSetR
,
120 ************************************************************************************************************************
121 * @brief This class contains asic independent address lib functionalities
122 ************************************************************************************************************************
124 class Lib
: public Addr::Lib
137 ADDR_E_RETURNCODE
ComputeSurfaceInfo(
138 const ADDR2_COMPUTE_SURFACE_INFO_INPUT
* pIn
,
139 ADDR2_COMPUTE_SURFACE_INFO_OUTPUT
* pOut
) const;
141 ADDR_E_RETURNCODE
ComputeSurfaceAddrFromCoord(
142 const ADDR2_COMPUTE_SURFACE_ADDRFROMCOORD_INPUT
* pIn
,
143 ADDR2_COMPUTE_SURFACE_ADDRFROMCOORD_OUTPUT
* pOut
) const;
145 ADDR_E_RETURNCODE
ComputeSurfaceCoordFromAddr(
146 const ADDR2_COMPUTE_SURFACE_COORDFROMADDR_INPUT
* pIn
,
147 ADDR2_COMPUTE_SURFACE_COORDFROMADDR_OUTPUT
* pOut
) const;
150 ADDR_E_RETURNCODE
ComputeHtileInfo(
151 const ADDR2_COMPUTE_HTILE_INFO_INPUT
* pIn
,
152 ADDR2_COMPUTE_HTILE_INFO_OUTPUT
* pOut
) const;
154 ADDR_E_RETURNCODE
ComputeHtileAddrFromCoord(
155 const ADDR2_COMPUTE_HTILE_ADDRFROMCOORD_INPUT
* pIn
,
156 ADDR2_COMPUTE_HTILE_ADDRFROMCOORD_OUTPUT
* pOut
);
158 ADDR_E_RETURNCODE
ComputeHtileCoordFromAddr(
159 const ADDR2_COMPUTE_HTILE_COORDFROMADDR_INPUT
* pIn
,
160 ADDR2_COMPUTE_HTILE_COORDFROMADDR_OUTPUT
* pOut
);
163 ADDR_E_RETURNCODE
ComputeCmaskInfo(
164 const ADDR2_COMPUTE_CMASK_INFO_INPUT
* pIn
,
165 ADDR2_COMPUTE_CMASK_INFO_OUTPUT
* pOut
) const;
167 ADDR_E_RETURNCODE
ComputeCmaskAddrFromCoord(
168 const ADDR2_COMPUTE_CMASK_ADDRFROMCOORD_INPUT
* pIn
,
169 ADDR2_COMPUTE_CMASK_ADDRFROMCOORD_OUTPUT
* pOut
);
171 ADDR_E_RETURNCODE
ComputeCmaskCoordFromAddr(
172 const ADDR2_COMPUTE_CMASK_COORDFROMADDR_INPUT
* pIn
,
173 ADDR2_COMPUTE_CMASK_COORDFROMADDR_OUTPUT
* pOut
) const;
176 ADDR_E_RETURNCODE
ComputeFmaskInfo(
177 const ADDR2_COMPUTE_FMASK_INFO_INPUT
* pIn
,
178 ADDR2_COMPUTE_FMASK_INFO_OUTPUT
* pOut
);
180 ADDR_E_RETURNCODE
ComputeFmaskAddrFromCoord(
181 const ADDR2_COMPUTE_FMASK_ADDRFROMCOORD_INPUT
* pIn
,
182 ADDR2_COMPUTE_FMASK_ADDRFROMCOORD_OUTPUT
* pOut
) const;
184 ADDR_E_RETURNCODE
ComputeFmaskCoordFromAddr(
185 const ADDR2_COMPUTE_FMASK_COORDFROMADDR_INPUT
* pIn
,
186 ADDR2_COMPUTE_FMASK_COORDFROMADDR_OUTPUT
* pOut
) const;
189 ADDR_E_RETURNCODE
ComputeDccInfo(
190 const ADDR2_COMPUTE_DCCINFO_INPUT
* pIn
,
191 ADDR2_COMPUTE_DCCINFO_OUTPUT
* pOut
) const;
193 ADDR_E_RETURNCODE
ComputeDccAddrFromCoord(
194 const ADDR2_COMPUTE_DCC_ADDRFROMCOORD_INPUT
* pIn
,
195 ADDR2_COMPUTE_DCC_ADDRFROMCOORD_OUTPUT
* pOut
);
198 ADDR_E_RETURNCODE
ComputePipeBankXor(
199 const ADDR2_COMPUTE_PIPEBANKXOR_INPUT
* pIn
,
200 ADDR2_COMPUTE_PIPEBANKXOR_OUTPUT
* pOut
);
202 ADDR_E_RETURNCODE
ComputeSlicePipeBankXor(
203 const ADDR2_COMPUTE_SLICE_PIPEBANKXOR_INPUT
* pIn
,
204 ADDR2_COMPUTE_SLICE_PIPEBANKXOR_OUTPUT
* pOut
);
206 ADDR_E_RETURNCODE
ComputeSubResourceOffsetForSwizzlePattern(
207 const ADDR2_COMPUTE_SUBRESOURCE_OFFSET_FORSWIZZLEPATTERN_INPUT
* pIn
,
208 ADDR2_COMPUTE_SUBRESOURCE_OFFSET_FORSWIZZLEPATTERN_OUTPUT
* pOut
);
210 ADDR_E_RETURNCODE
Addr2GetPreferredSurfaceSetting(
211 const ADDR2_GET_PREFERRED_SURF_SETTING_INPUT
* pIn
,
212 ADDR2_GET_PREFERRED_SURF_SETTING_OUTPUT
* pOut
) const;
214 virtual BOOL_32
IsValidDisplaySwizzleMode(
215 const ADDR2_COMPUTE_SURFACE_INFO_INPUT
* pIn
) const
217 ADDR_NOT_IMPLEMENTED();
218 return ADDR_NOTIMPLEMENTED
;
222 Lib(); // Constructor is protected
223 Lib(const Client
* pClient
);
225 static const UINT_32 MaxNumOfBpp
= 5;
226 static const UINT_32 MaxNumOfAA
= 4;
228 static const Dim2d Block256_2d
[MaxNumOfBpp
];
229 static const Dim3d Block1K_3d
[MaxNumOfBpp
];
231 static const UINT_32 PrtAlignment
= 64 * 1024;
232 static const UINT_32 MaxMacroBits
= 20;
234 static const UINT_32 MaxMipLevels
= 16;
236 // Checking block size
237 BOOL_32
IsBlock256b(AddrSwizzleMode swizzleMode
) const
239 return m_swizzleModeTable
[swizzleMode
].is256b
;
242 BOOL_32
IsBlock4kb(AddrSwizzleMode swizzleMode
) const
244 return m_swizzleModeTable
[swizzleMode
].is4kb
;
247 BOOL_32
IsBlock64kb(AddrSwizzleMode swizzleMode
) const
249 return m_swizzleModeTable
[swizzleMode
].is64kb
;
252 BOOL_32
IsBlockVariable(AddrSwizzleMode swizzleMode
) const
254 return m_swizzleModeTable
[swizzleMode
].isVar
;
257 // Checking swizzle mode
258 BOOL_32
IsLinear(AddrSwizzleMode swizzleMode
) const
260 return m_swizzleModeTable
[swizzleMode
].isLinear
;
263 BOOL_32
IsRtOptSwizzle(AddrSwizzleMode swizzleMode
) const
265 return m_swizzleModeTable
[swizzleMode
].isRtOpt
;
268 BOOL_32
IsZOrderSwizzle(AddrSwizzleMode swizzleMode
) const
270 return m_swizzleModeTable
[swizzleMode
].isZ
;
273 BOOL_32
IsStandardSwizzle(AddrSwizzleMode swizzleMode
) const
275 return m_swizzleModeTable
[swizzleMode
].isStd
;
278 BOOL_32
IsDisplaySwizzle(AddrSwizzleMode swizzleMode
) const
280 return m_swizzleModeTable
[swizzleMode
].isDisp
;
283 BOOL_32
IsRotateSwizzle(AddrSwizzleMode swizzleMode
) const
285 return m_swizzleModeTable
[swizzleMode
].isRot
;
288 BOOL_32
IsStandardSwizzle(AddrResourceType resourceType
, AddrSwizzleMode swizzleMode
) const
290 return HwlIsStandardSwizzle(resourceType
, swizzleMode
);
293 BOOL_32
IsDisplaySwizzle(AddrResourceType resourceType
, AddrSwizzleMode swizzleMode
) const
295 return HwlIsDisplaySwizzle(resourceType
, swizzleMode
);
298 BOOL_32
IsXor(AddrSwizzleMode swizzleMode
) const
300 return m_swizzleModeTable
[swizzleMode
].isXor
;
303 BOOL_32
IsPrt(AddrSwizzleMode swizzleMode
) const
305 return m_swizzleModeTable
[swizzleMode
].isT
;
308 BOOL_32
IsNonPrtXor(AddrSwizzleMode swizzleMode
) const
310 return (IsXor(swizzleMode
) && (IsPrt(swizzleMode
) == FALSE
));
313 // Checking resource type
314 static BOOL_32
IsTex1d(AddrResourceType resourceType
)
316 return (resourceType
== ADDR_RSRC_TEX_1D
);
319 static BOOL_32
IsTex2d(AddrResourceType resourceType
)
321 return (resourceType
== ADDR_RSRC_TEX_2D
);
324 static BOOL_32
IsTex3d(AddrResourceType resourceType
)
326 return (resourceType
== ADDR_RSRC_TEX_3D
);
329 BOOL_32
IsThick(AddrResourceType resourceType
, AddrSwizzleMode swizzleMode
) const
331 return HwlIsThick(resourceType
, swizzleMode
);
334 BOOL_32
IsThin(AddrResourceType resourceType
, AddrSwizzleMode swizzleMode
) const
336 return HwlIsThin(resourceType
, swizzleMode
);
339 UINT_32
GetBlockSizeLog2(AddrSwizzleMode swizzleMode
) const
341 UINT_32 blockSizeLog2
= 0;
343 if (IsBlock256b(swizzleMode
) || IsLinear(swizzleMode
))
347 else if (IsBlock4kb(swizzleMode
))
351 else if (IsBlock64kb(swizzleMode
))
355 else if (IsBlockVariable(swizzleMode
))
357 blockSizeLog2
= m_blockVarSizeLog2
;
361 ADDR_ASSERT_ALWAYS();
364 return blockSizeLog2
;
367 UINT_32
GetBlockSize(AddrSwizzleMode swizzleMode
) const
369 return (1 << GetBlockSizeLog2(swizzleMode
));
372 static UINT_32
GetFmaskBpp(UINT_32 sample
, UINT_32 frag
)
374 sample
= (sample
== 0) ? 1 : sample
;
375 frag
= (frag
== 0) ? sample
: frag
;
377 UINT_32 fmaskBpp
= QLog2(frag
);
389 fmaskBpp
= Max(8u, fmaskBpp
* sample
);
394 virtual BOOL_32
HwlIsStandardSwizzle(
395 AddrResourceType resourceType
,
396 AddrSwizzleMode swizzleMode
) const
398 ADDR_NOT_IMPLEMENTED();
402 virtual BOOL_32
HwlIsDisplaySwizzle(
403 AddrResourceType resourceType
,
404 AddrSwizzleMode swizzleMode
) const
406 ADDR_NOT_IMPLEMENTED();
410 virtual BOOL_32
HwlIsThin(
411 AddrResourceType resourceType
,
412 AddrSwizzleMode swizzleMode
) const
414 ADDR_NOT_IMPLEMENTED();
418 virtual BOOL_32
HwlIsThick(
419 AddrResourceType resourceType
,
420 AddrSwizzleMode swizzleMode
) const
422 ADDR_NOT_IMPLEMENTED();
426 virtual ADDR_E_RETURNCODE
HwlComputeHtileInfo(
427 const ADDR2_COMPUTE_HTILE_INFO_INPUT
* pIn
,
428 ADDR2_COMPUTE_HTILE_INFO_OUTPUT
* pOut
) const
430 ADDR_NOT_IMPLEMENTED();
431 return ADDR_NOTSUPPORTED
;
434 virtual ADDR_E_RETURNCODE
HwlComputeCmaskInfo(
435 const ADDR2_COMPUTE_CMASK_INFO_INPUT
* pIn
,
436 ADDR2_COMPUTE_CMASK_INFO_OUTPUT
* pOut
) const
438 ADDR_NOT_IMPLEMENTED();
439 return ADDR_NOTSUPPORTED
;
442 virtual ADDR_E_RETURNCODE
HwlComputeDccInfo(
443 const ADDR2_COMPUTE_DCCINFO_INPUT
* pIn
,
444 ADDR2_COMPUTE_DCCINFO_OUTPUT
* pOut
) const
446 ADDR_NOT_IMPLEMENTED();
447 return ADDR_NOTSUPPORTED
;
450 virtual ADDR_E_RETURNCODE
HwlComputeDccAddrFromCoord(
451 const ADDR2_COMPUTE_DCC_ADDRFROMCOORD_INPUT
* pIn
,
452 ADDR2_COMPUTE_DCC_ADDRFROMCOORD_OUTPUT
* pOut
)
454 ADDR_NOT_IMPLEMENTED();
455 return ADDR_NOTSUPPORTED
;
458 virtual ADDR_E_RETURNCODE
HwlComputeCmaskAddrFromCoord(
459 const ADDR2_COMPUTE_CMASK_ADDRFROMCOORD_INPUT
* pIn
,
460 ADDR2_COMPUTE_CMASK_ADDRFROMCOORD_OUTPUT
* pOut
)
462 ADDR_NOT_IMPLEMENTED();
463 return ADDR_NOTSUPPORTED
;
466 virtual ADDR_E_RETURNCODE
HwlComputeHtileAddrFromCoord(
467 const ADDR2_COMPUTE_HTILE_ADDRFROMCOORD_INPUT
* pIn
,
468 ADDR2_COMPUTE_HTILE_ADDRFROMCOORD_OUTPUT
* pOut
)
470 ADDR_NOT_IMPLEMENTED();
471 return ADDR_NOTSUPPORTED
;
474 virtual ADDR_E_RETURNCODE
HwlComputeHtileCoordFromAddr(
475 const ADDR2_COMPUTE_HTILE_COORDFROMADDR_INPUT
* pIn
,
476 ADDR2_COMPUTE_HTILE_COORDFROMADDR_OUTPUT
* pOut
)
478 ADDR_NOT_IMPLEMENTED();
479 return ADDR_NOTSUPPORTED
;
482 virtual ADDR_E_RETURNCODE
HwlComputeBlock256Equation(
483 AddrResourceType rsrcType
,
484 AddrSwizzleMode swMode
,
485 UINT_32 elementBytesLog2
,
486 ADDR_EQUATION
* pEquation
) const
488 ADDR_NOT_IMPLEMENTED();
489 return ADDR_NOTSUPPORTED
;
492 virtual ADDR_E_RETURNCODE
HwlComputeThinEquation(
493 AddrResourceType rsrcType
,
494 AddrSwizzleMode swMode
,
495 UINT_32 elementBytesLog2
,
496 ADDR_EQUATION
* pEquation
) const
498 ADDR_NOT_IMPLEMENTED();
499 return ADDR_NOTSUPPORTED
;
502 virtual ADDR_E_RETURNCODE
HwlComputeThickEquation(
503 AddrResourceType rsrcType
,
504 AddrSwizzleMode swMode
,
505 UINT_32 elementBytesLog2
,
506 ADDR_EQUATION
* pEquation
) const
508 ADDR_NOT_IMPLEMENTED();
509 return ADDR_NOTSUPPORTED
;
512 virtual UINT_32
HwlGetEquationIndex(
513 const ADDR2_COMPUTE_SURFACE_INFO_INPUT
* pIn
,
514 ADDR2_COMPUTE_SURFACE_INFO_OUTPUT
* pOut
) const
516 ADDR_NOT_IMPLEMENTED();
517 return ADDR_INVALID_EQUATION_INDEX
;
520 UINT_32
GetEquationIndex(
521 const ADDR2_COMPUTE_SURFACE_INFO_INPUT
* pIn
,
522 ADDR2_COMPUTE_SURFACE_INFO_OUTPUT
* pOut
) const
524 return HwlGetEquationIndex(pIn
, pOut
);
527 virtual ADDR_E_RETURNCODE
HwlComputePipeBankXor(
528 const ADDR2_COMPUTE_PIPEBANKXOR_INPUT
* pIn
,
529 ADDR2_COMPUTE_PIPEBANKXOR_OUTPUT
* pOut
) const
531 ADDR_NOT_IMPLEMENTED();
532 return ADDR_NOTSUPPORTED
;
535 virtual ADDR_E_RETURNCODE
HwlComputeSlicePipeBankXor(
536 const ADDR2_COMPUTE_SLICE_PIPEBANKXOR_INPUT
* pIn
,
537 ADDR2_COMPUTE_SLICE_PIPEBANKXOR_OUTPUT
* pOut
) const
539 ADDR_NOT_IMPLEMENTED();
540 return ADDR_NOTSUPPORTED
;
543 virtual ADDR_E_RETURNCODE
HwlComputeSubResourceOffsetForSwizzlePattern(
544 const ADDR2_COMPUTE_SUBRESOURCE_OFFSET_FORSWIZZLEPATTERN_INPUT
* pIn
,
545 ADDR2_COMPUTE_SUBRESOURCE_OFFSET_FORSWIZZLEPATTERN_OUTPUT
* pOut
) const
547 ADDR_NOT_IMPLEMENTED();
548 return ADDR_NOTSUPPORTED
;
551 virtual ADDR_E_RETURNCODE
HwlGetPreferredSurfaceSetting(
552 const ADDR2_GET_PREFERRED_SURF_SETTING_INPUT
* pIn
,
553 ADDR2_GET_PREFERRED_SURF_SETTING_OUTPUT
* pOut
) const
555 ADDR_NOT_IMPLEMENTED();
556 return ADDR_NOTSUPPORTED
;
559 virtual ADDR_E_RETURNCODE
HwlComputeSurfaceInfoSanityCheck(
560 const ADDR2_COMPUTE_SURFACE_INFO_INPUT
* pIn
) const
562 ADDR_NOT_IMPLEMENTED();
563 return ADDR_NOTSUPPORTED
;
566 virtual ADDR_E_RETURNCODE
HwlComputeSurfaceInfoTiled(
567 const ADDR2_COMPUTE_SURFACE_INFO_INPUT
* pIn
,
568 ADDR2_COMPUTE_SURFACE_INFO_OUTPUT
* pOut
) const
570 ADDR_NOT_IMPLEMENTED();
571 return ADDR_NOTIMPLEMENTED
;
574 virtual ADDR_E_RETURNCODE
HwlComputeSurfaceInfoLinear(
575 const ADDR2_COMPUTE_SURFACE_INFO_INPUT
* pIn
,
576 ADDR2_COMPUTE_SURFACE_INFO_OUTPUT
* pOut
) const
578 ADDR_NOT_IMPLEMENTED();
579 return ADDR_NOTIMPLEMENTED
;
582 virtual ADDR_E_RETURNCODE
HwlComputeSurfaceAddrFromCoordTiled(
583 const ADDR2_COMPUTE_SURFACE_ADDRFROMCOORD_INPUT
* pIn
,
584 ADDR2_COMPUTE_SURFACE_ADDRFROMCOORD_OUTPUT
* pOut
) const
586 ADDR_NOT_IMPLEMENTED();
587 return ADDR_NOTIMPLEMENTED
;
590 ADDR_E_RETURNCODE
ComputeBlock256Equation(
591 AddrResourceType rsrcType
,
592 AddrSwizzleMode swMode
,
593 UINT_32 elementBytesLog2
,
594 ADDR_EQUATION
* pEquation
) const;
596 ADDR_E_RETURNCODE
ComputeThinEquation(
597 AddrResourceType rsrcType
,
598 AddrSwizzleMode swMode
,
599 UINT_32 elementBytesLog2
,
600 ADDR_EQUATION
* pEquation
) const;
602 ADDR_E_RETURNCODE
ComputeThickEquation(
603 AddrResourceType rsrcType
,
604 AddrSwizzleMode swMode
,
605 UINT_32 elementBytesLog2
,
606 ADDR_EQUATION
* pEquation
) const;
608 ADDR_E_RETURNCODE
ComputeSurfaceInfoSanityCheck(
609 const ADDR2_COMPUTE_SURFACE_INFO_INPUT
* pIn
) const;
611 ADDR_E_RETURNCODE
ComputeSurfaceInfoLinear(
612 const ADDR2_COMPUTE_SURFACE_INFO_INPUT
* pIn
,
613 ADDR2_COMPUTE_SURFACE_INFO_OUTPUT
* pOut
) const;
615 ADDR_E_RETURNCODE
ComputeSurfaceInfoTiled(
616 const ADDR2_COMPUTE_SURFACE_INFO_INPUT
* pIn
,
617 ADDR2_COMPUTE_SURFACE_INFO_OUTPUT
* pOut
) const;
619 ADDR_E_RETURNCODE
ComputeSurfaceAddrFromCoordLinear(
620 const ADDR2_COMPUTE_SURFACE_ADDRFROMCOORD_INPUT
* pIn
,
621 ADDR2_COMPUTE_SURFACE_ADDRFROMCOORD_OUTPUT
* pOut
) const;
623 ADDR_E_RETURNCODE
ComputeSurfaceAddrFromCoordTiled(
624 const ADDR2_COMPUTE_SURFACE_ADDRFROMCOORD_INPUT
* pIn
,
625 ADDR2_COMPUTE_SURFACE_ADDRFROMCOORD_OUTPUT
* pOut
) const;
627 ADDR_E_RETURNCODE
ComputeSurfaceCoordFromAddrLinear(
628 const ADDR2_COMPUTE_SURFACE_COORDFROMADDR_INPUT
* pIn
,
629 ADDR2_COMPUTE_SURFACE_COORDFROMADDR_OUTPUT
* pOut
) const;
631 ADDR_E_RETURNCODE
ComputeSurfaceCoordFromAddrTiled(
632 const ADDR2_COMPUTE_SURFACE_COORDFROMADDR_INPUT
* pIn
,
633 ADDR2_COMPUTE_SURFACE_COORDFROMADDR_OUTPUT
* pOut
) const;
635 UINT_32
ComputeSurface2DMicroBlockOffset(
636 const _ADDR2_COMPUTE_SURFACE_ADDRFROMCOORD_INPUT
* pIn
) const;
638 UINT_32
ComputeSurface3DMicroBlockOffset(
639 const _ADDR2_COMPUTE_SURFACE_ADDRFROMCOORD_INPUT
* pIn
) const;
642 ADDR_E_RETURNCODE
ComputeBlockDimensionForSurf(
648 AddrResourceType resourceType
,
649 AddrSwizzleMode swizzleMode
) const;
651 ADDR_E_RETURNCODE
ComputeBlockDimension(
656 AddrResourceType resourceType
,
657 AddrSwizzleMode swizzleMode
) const;
659 static UINT_64
ComputePadSize(
660 const Dim3d
* pBlkDim
,
666 pPadDim
->w
= PowTwoAlign(width
,pBlkDim
->w
);
667 pPadDim
->h
= PowTwoAlign(height
,pBlkDim
->h
);
668 pPadDim
->d
= PowTwoAlign(numSlices
, pBlkDim
->d
);
669 return static_cast<UINT_64
>(pPadDim
->w
) * pPadDim
->h
* pPadDim
->d
;
672 static ADDR_E_RETURNCODE
ExtractPipeBankXor(
679 static BOOL_32
Valid3DMipSliceIdConstraint(
684 return (Max((numSlices
>> mipId
), 1u) > slice
);
688 AddrResourceType resourceType
,
689 AddrSwizzleMode swizzleMode
,
692 UINT_32 blockDepth
) const;
694 static BOOL_32
IsLocalHeap(AddrResrouceLocation resourceType
)
696 return ((resourceType
== ADDR_RSRC_LOC_LOCAL
) ||
697 (resourceType
== ADDR_RSRC_LOC_INVIS
));
700 static BOOL_32
IsInvisibleHeap(AddrResrouceLocation resourceType
)
702 return (resourceType
== ADDR_RSRC_LOC_INVIS
);
705 static BOOL_32
IsNonlocalHeap(AddrResrouceLocation resourceType
)
707 return ((resourceType
== ADDR_RSRC_LOC_USWC
) ||
708 (resourceType
== ADDR_RSRC_LOC_CACHED
));
711 UINT_32
GetPipeLog2ForMetaAddressing(BOOL_32 pipeAligned
, AddrSwizzleMode swizzleMode
) const
713 UINT_32 numPipeLog2
= pipeAligned
? Min(m_pipesLog2
+ m_seLog2
, 5u) : 0;
715 if (IsXor(swizzleMode
))
717 UINT_32 maxPipeLog2
= GetBlockSizeLog2(swizzleMode
) - m_pipeInterleaveLog2
;
719 numPipeLog2
= Min(numPipeLog2
, maxPipeLog2
);
725 UINT_32
GetPipeNumForMetaAddressing(BOOL_32 pipeAligned
, AddrSwizzleMode swizzleMode
) const
727 return (1 << GetPipeLog2ForMetaAddressing(pipeAligned
, swizzleMode
));
730 VOID
VerifyMipLevelInfo(const ADDR2_COMPUTE_SURFACE_INFO_INPUT
* pIn
) const
733 if (pIn
->numMipLevels
> 1)
735 UINT_32 actualMipLevels
= 1;
736 switch (pIn
->resourceType
)
738 case ADDR_RSRC_TEX_3D
:
739 // Fall through to share 2D case
740 actualMipLevels
= Max(actualMipLevels
, Log2NonPow2(pIn
->numSlices
) + 1);
741 case ADDR_RSRC_TEX_2D
:
742 // Fall through to share 1D case
743 actualMipLevels
= Max(actualMipLevels
, Log2NonPow2(pIn
->height
) + 1);
744 case ADDR_RSRC_TEX_1D
:
746 actualMipLevels
= Max(actualMipLevels
, Log2NonPow2(pIn
->width
) + 1);
749 ADDR_ASSERT_ALWAYS();
752 // Client pass wrong number of MipLevels to addrlib and result will be bad.
753 // Not sure if we should fail this calling instead of putting an assertion here.
754 ADDR_ASSERT(actualMipLevels
>= pIn
->numMipLevels
);
759 ADDR_E_RETURNCODE
ApplyCustomerPipeBankXor(
760 AddrSwizzleMode swizzleMode
,
764 UINT_32
* pBlockOffset
) const
766 ADDR_E_RETURNCODE returnCode
= ADDR_OK
;
768 if (IsXor(swizzleMode
))
770 // Apply driver set bankPipeXor
773 returnCode
= ExtractPipeBankXor(pipeBankXor
, bankBits
, pipeBits
, &bankX
, &pipeX
);
774 *pBlockOffset
^= (pipeX
<< m_pipeInterleaveLog2
);
775 *pBlockOffset
^= (bankX
<< (m_pipeInterleaveLog2
+ pipeBits
));
781 UINT_32
GetPipeXorBits(UINT_32 macroBlockBits
) const;
783 ADDR_E_RETURNCODE
ApplyCustomizedPitchHeight(
784 const ADDR2_COMPUTE_SURFACE_INFO_INPUT
* pIn
,
785 UINT_32 elementBytes
,
786 UINT_32 pitchAlignInElement
,
788 UINT_32
* pHeight
) const;
790 VOID
ComputeQbStereoInfo(ADDR2_COMPUTE_SURFACE_INFO_OUTPUT
* pOut
) const;
792 UINT_32 m_se
; ///< Number of shader engine
793 UINT_32 m_rbPerSe
; ///< Number of render backend per shader engine
794 UINT_32 m_maxCompFrag
; ///< Number of max compressed fragment
796 UINT_32 m_banksLog2
; ///< Number of bank Log2
797 UINT_32 m_pipesLog2
; ///< Number of pipe per shader engine Log2
798 UINT_32 m_seLog2
; ///< Number of shader engine Log2
799 UINT_32 m_rbPerSeLog2
; ///< Number of render backend per shader engine Log2
800 UINT_32 m_maxCompFragLog2
; ///< Number of max compressed fragment Log2
802 UINT_32 m_pipeInterleaveLog2
; ///< Log2 of pipe interleave bytes
804 UINT_32 m_blockVarSizeLog2
; ///< Log2 of block var size
806 SwizzleModeFlags m_swizzleModeTable
[ADDR_SW_MAX_TYPE
]; ///< Swizzle mode table
809 // Disallow the copy constructor
812 // Disallow the assignment operator
813 Lib
& operator=(const Lib
& a
);