652ff228032050c2e7ca561f010b4ddbdd81ce86
[mesa.git] / src / amd / common / ac_binary.c
1 /*
2 * Copyright 2014 Advanced Micro Devices, Inc.
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
20 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
21 * SOFTWARE.
22 */
23
24 #include "ac_binary.h"
25
26 #include "util/u_math.h"
27 #include "util/u_memory.h"
28
29 #include <gelf.h>
30 #include <libelf.h>
31 #include <stdio.h>
32
33 #include <sid.h>
34
35 #define SPILLED_SGPRS 0x4
36 #define SPILLED_VGPRS 0x8
37
38 /* Parse configuration data in .AMDGPU.config section format. */
39 void ac_parse_shader_binary_config(const char *data, size_t nbytes,
40 bool really_needs_scratch,
41 struct ac_shader_config *conf)
42 {
43 uint32_t wavesize = 0;
44
45 for (size_t i = 0; i < nbytes; i += 8) {
46 unsigned reg = util_le32_to_cpu(*(uint32_t*)(data + i));
47 unsigned value = util_le32_to_cpu(*(uint32_t*)(data + i + 4));
48 switch (reg) {
49 case R_00B028_SPI_SHADER_PGM_RSRC1_PS:
50 case R_00B128_SPI_SHADER_PGM_RSRC1_VS:
51 case R_00B228_SPI_SHADER_PGM_RSRC1_GS:
52 case R_00B848_COMPUTE_PGM_RSRC1:
53 case R_00B428_SPI_SHADER_PGM_RSRC1_HS:
54 conf->num_sgprs = MAX2(conf->num_sgprs, (G_00B028_SGPRS(value) + 1) * 8);
55 conf->num_vgprs = MAX2(conf->num_vgprs, (G_00B028_VGPRS(value) + 1) * 4);
56 conf->float_mode = G_00B028_FLOAT_MODE(value);
57 conf->rsrc1 = value;
58 break;
59 case R_00B02C_SPI_SHADER_PGM_RSRC2_PS:
60 conf->lds_size = MAX2(conf->lds_size, G_00B02C_EXTRA_LDS_SIZE(value));
61 break;
62 case R_00B84C_COMPUTE_PGM_RSRC2:
63 conf->lds_size = MAX2(conf->lds_size, G_00B84C_LDS_SIZE(value));
64 conf->rsrc2 = value;
65 break;
66 case R_0286CC_SPI_PS_INPUT_ENA:
67 conf->spi_ps_input_ena = value;
68 break;
69 case R_0286D0_SPI_PS_INPUT_ADDR:
70 conf->spi_ps_input_addr = value;
71 break;
72 case R_0286E8_SPI_TMPRING_SIZE:
73 case R_00B860_COMPUTE_TMPRING_SIZE:
74 /* WAVESIZE is in units of 256 dwords. */
75 wavesize = value;
76 break;
77 case SPILLED_SGPRS:
78 conf->spilled_sgprs = value;
79 break;
80 case SPILLED_VGPRS:
81 conf->spilled_vgprs = value;
82 break;
83 default:
84 {
85 static bool printed;
86
87 if (!printed) {
88 fprintf(stderr, "Warning: LLVM emitted unknown "
89 "config register: 0x%x\n", reg);
90 printed = true;
91 }
92 }
93 break;
94 }
95 }
96
97 if (!conf->spi_ps_input_addr)
98 conf->spi_ps_input_addr = conf->spi_ps_input_ena;
99
100 if (really_needs_scratch) {
101 /* sgprs spills aren't spilling */
102 conf->scratch_bytes_per_wave = G_00B860_WAVESIZE(wavesize) * 256 * 4;
103 }
104 }