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amd/common/gfx10: print out GCR_CNTL as part of {ACQUIRE,RELEASE}_MEM
[mesa.git] / src / amd / common / ac_debug.c
1 /*
2 * Copyright 2015 Advanced Micro Devices, Inc.
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * on the rights to use, copy, modify, merge, publish, distribute, sub
8 * license, and/or sell copies of the Software, and to permit persons to whom
9 * the Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM,
19 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
20 * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
21 * USE OR OTHER DEALINGS IN THE SOFTWARE.
22 */
23
24 #include "ac_debug.h"
25
26 #ifdef HAVE_VALGRIND
27 #include <valgrind.h>
28 #include <memcheck.h>
29 #define VG(x) x
30 #else
31 #define VG(x)
32 #endif
33
34 #include <inttypes.h>
35
36 #include "sid.h"
37 #include "sid_tables.h"
38 #include "util/u_math.h"
39 #include "util/u_memory.h"
40 #include "util/u_string.h"
41
42 #include <assert.h>
43
44 /* Parsed IBs are difficult to read without colors. Use "less -R file" to
45 * read them, or use "aha -b -f file" to convert them to html.
46 */
47 #define COLOR_RESET "\033[0m"
48 #define COLOR_RED "\033[31m"
49 #define COLOR_GREEN "\033[1;32m"
50 #define COLOR_YELLOW "\033[1;33m"
51 #define COLOR_CYAN "\033[1;36m"
52
53 #define INDENT_PKT 8
54
55 struct ac_ib_parser {
56 FILE *f;
57 uint32_t *ib;
58 unsigned num_dw;
59 const int *trace_ids;
60 unsigned trace_id_count;
61 enum chip_class chip_class;
62 ac_debug_addr_callback addr_callback;
63 void *addr_callback_data;
64
65 unsigned cur_dw;
66 };
67
68 static void ac_do_parse_ib(FILE *f, struct ac_ib_parser *ib);
69
70 static void print_spaces(FILE *f, unsigned num)
71 {
72 fprintf(f, "%*s", num, "");
73 }
74
75 static void print_value(FILE *file, uint32_t value, int bits)
76 {
77 /* Guess if it's int or float */
78 if (value <= (1 << 15)) {
79 if (value <= 9)
80 fprintf(file, "%u\n", value);
81 else
82 fprintf(file, "%u (0x%0*x)\n", value, bits / 4, value);
83 } else {
84 float f = uif(value);
85
86 if (fabs(f) < 100000 && f*10 == floor(f*10))
87 fprintf(file, "%.1ff (0x%0*x)\n", f, bits / 4, value);
88 else
89 /* Don't print more leading zeros than there are bits. */
90 fprintf(file, "0x%0*x\n", bits / 4, value);
91 }
92 }
93
94 static void print_named_value(FILE *file, const char *name, uint32_t value,
95 int bits)
96 {
97 print_spaces(file, INDENT_PKT);
98 fprintf(file, COLOR_YELLOW "%s" COLOR_RESET " <- ", name);
99 print_value(file, value, bits);
100 }
101
102 static const struct si_reg *find_register(const struct si_reg *table,
103 unsigned table_size,
104 unsigned offset)
105 {
106 for (unsigned i = 0; i < table_size; i++) {
107 const struct si_reg *reg = &table[i];
108
109 if (reg->offset == offset)
110 return reg;
111 }
112
113 return NULL;
114 }
115
116 void ac_dump_reg(FILE *file, enum chip_class chip_class, unsigned offset,
117 uint32_t value, uint32_t field_mask)
118 {
119 const struct si_reg *reg = NULL;
120
121 if (chip_class >= GFX9)
122 reg = find_register(gfx9_reg_table, ARRAY_SIZE(gfx9_reg_table), offset);
123 else if (chip_class >= GFX8)
124 reg = find_register(gfx8_reg_table, ARRAY_SIZE(gfx8_reg_table), offset);
125 else if (chip_class >= GFX7)
126 reg = find_register(gfx7_reg_table, ARRAY_SIZE(gfx7_reg_table), offset);
127 else
128 reg = find_register(gfx6_reg_table, ARRAY_SIZE(gfx6_reg_table), offset);
129
130 if (reg) {
131 const char *reg_name = sid_strings + reg->name_offset;
132 bool first_field = true;
133
134 print_spaces(file, INDENT_PKT);
135 fprintf(file, COLOR_YELLOW "%s" COLOR_RESET " <- ",
136 reg_name);
137
138 if (!reg->num_fields) {
139 print_value(file, value, 32);
140 return;
141 }
142
143 for (unsigned f = 0; f < reg->num_fields; f++) {
144 const struct si_field *field = sid_fields_table + reg->fields_offset + f;
145 const int *values_offsets = sid_strings_offsets + field->values_offset;
146 uint32_t val = (value & field->mask) >>
147 (ffs(field->mask) - 1);
148
149 if (!(field->mask & field_mask))
150 continue;
151
152 /* Indent the field. */
153 if (!first_field)
154 print_spaces(file,
155 INDENT_PKT + strlen(reg_name) + 4);
156
157 /* Print the field. */
158 fprintf(file, "%s = ", sid_strings + field->name_offset);
159
160 if (val < field->num_values && values_offsets[val] >= 0)
161 fprintf(file, "%s\n", sid_strings + values_offsets[val]);
162 else
163 print_value(file, val,
164 util_bitcount(field->mask));
165
166 first_field = false;
167 }
168 return;
169 }
170
171 print_spaces(file, INDENT_PKT);
172 fprintf(file, COLOR_YELLOW "0x%05x" COLOR_RESET " <- 0x%08x\n", offset, value);
173 }
174
175 static uint32_t ac_ib_get(struct ac_ib_parser *ib)
176 {
177 uint32_t v = 0;
178
179 if (ib->cur_dw < ib->num_dw) {
180 v = ib->ib[ib->cur_dw];
181 #ifdef HAVE_VALGRIND
182 /* Help figure out where garbage data is written to IBs.
183 *
184 * Arguably we should do this already when the IBs are written,
185 * see RADEON_VALGRIND. The problem is that client-requests to
186 * Valgrind have an overhead even when Valgrind isn't running,
187 * and radeon_emit is performance sensitive...
188 */
189 if (VALGRIND_CHECK_VALUE_IS_DEFINED(v))
190 fprintf(ib->f, COLOR_RED "Valgrind: The next DWORD is garbage"
191 COLOR_RESET "\n");
192 #endif
193 fprintf(ib->f, "\n\035#%08x ", v);
194 } else {
195 fprintf(ib->f, "\n\035#???????? ");
196 }
197
198 ib->cur_dw++;
199 return v;
200 }
201
202 static void ac_parse_set_reg_packet(FILE *f, unsigned count, unsigned reg_offset,
203 struct ac_ib_parser *ib)
204 {
205 unsigned reg_dw = ac_ib_get(ib);
206 unsigned reg = ((reg_dw & 0xFFFF) << 2) + reg_offset;
207 unsigned index = reg_dw >> 28;
208 int i;
209
210 if (index != 0) {
211 print_spaces(f, INDENT_PKT);
212 fprintf(f, "INDEX = %u\n", index);
213 }
214
215 for (i = 0; i < count; i++)
216 ac_dump_reg(f, ib->chip_class, reg + i*4, ac_ib_get(ib), ~0);
217 }
218
219 static void ac_parse_packet3(FILE *f, uint32_t header, struct ac_ib_parser *ib,
220 int *current_trace_id)
221 {
222 unsigned first_dw = ib->cur_dw;
223 int count = PKT_COUNT_G(header);
224 unsigned op = PKT3_IT_OPCODE_G(header);
225 const char *predicate = PKT3_PREDICATE(header) ? "(predicate)" : "";
226 int i;
227
228 /* Print the name first. */
229 for (i = 0; i < ARRAY_SIZE(packet3_table); i++)
230 if (packet3_table[i].op == op)
231 break;
232
233 if (i < ARRAY_SIZE(packet3_table)) {
234 const char *name = sid_strings + packet3_table[i].name_offset;
235
236 if (op == PKT3_SET_CONTEXT_REG ||
237 op == PKT3_SET_CONFIG_REG ||
238 op == PKT3_SET_UCONFIG_REG ||
239 op == PKT3_SET_UCONFIG_REG_INDEX ||
240 op == PKT3_SET_SH_REG)
241 fprintf(f, COLOR_CYAN "%s%s" COLOR_CYAN ":\n",
242 name, predicate);
243 else
244 fprintf(f, COLOR_GREEN "%s%s" COLOR_RESET ":\n",
245 name, predicate);
246 } else
247 fprintf(f, COLOR_RED "PKT3_UNKNOWN 0x%x%s" COLOR_RESET ":\n",
248 op, predicate);
249
250 /* Print the contents. */
251 switch (op) {
252 case PKT3_SET_CONTEXT_REG:
253 ac_parse_set_reg_packet(f, count, SI_CONTEXT_REG_OFFSET, ib);
254 break;
255 case PKT3_SET_CONFIG_REG:
256 ac_parse_set_reg_packet(f, count, SI_CONFIG_REG_OFFSET, ib);
257 break;
258 case PKT3_SET_UCONFIG_REG:
259 case PKT3_SET_UCONFIG_REG_INDEX:
260 ac_parse_set_reg_packet(f, count, CIK_UCONFIG_REG_OFFSET, ib);
261 break;
262 case PKT3_SET_SH_REG:
263 ac_parse_set_reg_packet(f, count, SI_SH_REG_OFFSET, ib);
264 break;
265 case PKT3_ACQUIRE_MEM:
266 ac_dump_reg(f, ib->chip_class, R_0301F0_CP_COHER_CNTL, ac_ib_get(ib), ~0);
267 ac_dump_reg(f, ib->chip_class, R_0301F4_CP_COHER_SIZE, ac_ib_get(ib), ~0);
268 ac_dump_reg(f, ib->chip_class, R_030230_CP_COHER_SIZE_HI, ac_ib_get(ib), ~0);
269 ac_dump_reg(f, ib->chip_class, R_0301F8_CP_COHER_BASE, ac_ib_get(ib), ~0);
270 ac_dump_reg(f, ib->chip_class, R_0301E4_CP_COHER_BASE_HI, ac_ib_get(ib), ~0);
271 print_named_value(f, "POLL_INTERVAL", ac_ib_get(ib), 16);
272 if (ib->chip_class >= GFX10)
273 ac_dump_reg(f, ib->chip_class, R_586_GCR_CNTL, ac_ib_get(ib), ~0);
274 break;
275 case PKT3_SURFACE_SYNC:
276 if (ib->chip_class >= GFX7) {
277 ac_dump_reg(f, ib->chip_class, R_0301F0_CP_COHER_CNTL, ac_ib_get(ib), ~0);
278 ac_dump_reg(f, ib->chip_class, R_0301F4_CP_COHER_SIZE, ac_ib_get(ib), ~0);
279 ac_dump_reg(f, ib->chip_class, R_0301F8_CP_COHER_BASE, ac_ib_get(ib), ~0);
280 } else {
281 ac_dump_reg(f, ib->chip_class, R_0085F0_CP_COHER_CNTL, ac_ib_get(ib), ~0);
282 ac_dump_reg(f, ib->chip_class, R_0085F4_CP_COHER_SIZE, ac_ib_get(ib), ~0);
283 ac_dump_reg(f, ib->chip_class, R_0085F8_CP_COHER_BASE, ac_ib_get(ib), ~0);
284 }
285 print_named_value(f, "POLL_INTERVAL", ac_ib_get(ib), 16);
286 break;
287 case PKT3_EVENT_WRITE: {
288 uint32_t event_dw = ac_ib_get(ib);
289 ac_dump_reg(f, ib->chip_class, R_028A90_VGT_EVENT_INITIATOR, event_dw,
290 S_028A90_EVENT_TYPE(~0));
291 print_named_value(f, "EVENT_INDEX", (event_dw >> 8) & 0xf, 4);
292 print_named_value(f, "INV_L2", (event_dw >> 20) & 0x1, 1);
293 if (count > 0) {
294 print_named_value(f, "ADDRESS_LO", ac_ib_get(ib), 32);
295 print_named_value(f, "ADDRESS_HI", ac_ib_get(ib), 16);
296 }
297 break;
298 }
299 case PKT3_EVENT_WRITE_EOP: {
300 uint32_t event_dw = ac_ib_get(ib);
301 ac_dump_reg(f, ib->chip_class, R_028A90_VGT_EVENT_INITIATOR, event_dw,
302 S_028A90_EVENT_TYPE(~0));
303 print_named_value(f, "EVENT_INDEX", (event_dw >> 8) & 0xf, 4);
304 print_named_value(f, "TCL1_VOL_ACTION_ENA", (event_dw >> 12) & 0x1, 1);
305 print_named_value(f, "TC_VOL_ACTION_ENA", (event_dw >> 13) & 0x1, 1);
306 print_named_value(f, "TC_WB_ACTION_ENA", (event_dw >> 15) & 0x1, 1);
307 print_named_value(f, "TCL1_ACTION_ENA", (event_dw >> 16) & 0x1, 1);
308 print_named_value(f, "TC_ACTION_ENA", (event_dw >> 17) & 0x1, 1);
309 print_named_value(f, "ADDRESS_LO", ac_ib_get(ib), 32);
310 uint32_t addr_hi_dw = ac_ib_get(ib);
311 print_named_value(f, "ADDRESS_HI", addr_hi_dw, 16);
312 print_named_value(f, "DST_SEL", (addr_hi_dw >> 16) & 0x3, 2);
313 print_named_value(f, "INT_SEL", (addr_hi_dw >> 24) & 0x7, 3);
314 print_named_value(f, "DATA_SEL", addr_hi_dw >> 29, 3);
315 print_named_value(f, "DATA_LO", ac_ib_get(ib), 32);
316 print_named_value(f, "DATA_HI", ac_ib_get(ib), 32);
317 break;
318 }
319 case PKT3_RELEASE_MEM: {
320 uint32_t event_dw = ac_ib_get(ib);
321 if (ib->chip_class >= GFX10) {
322 ac_dump_reg(f, ib->chip_class, R_490_RELEASE_MEM_OP, event_dw, ~0u);
323 } else {
324 ac_dump_reg(f, ib->chip_class, R_028A90_VGT_EVENT_INITIATOR, event_dw,
325 S_028A90_EVENT_TYPE(~0));
326 print_named_value(f, "EVENT_INDEX", (event_dw >> 8) & 0xf, 4);
327 print_named_value(f, "TCL1_VOL_ACTION_ENA", (event_dw >> 12) & 0x1, 1);
328 print_named_value(f, "TC_VOL_ACTION_ENA", (event_dw >> 13) & 0x1, 1);
329 print_named_value(f, "TC_WB_ACTION_ENA", (event_dw >> 15) & 0x1, 1);
330 print_named_value(f, "TCL1_ACTION_ENA", (event_dw >> 16) & 0x1, 1);
331 print_named_value(f, "TC_ACTION_ENA", (event_dw >> 17) & 0x1, 1);
332 print_named_value(f, "TC_NC_ACTION_ENA", (event_dw >> 19) & 0x1, 1);
333 print_named_value(f, "TC_WC_ACTION_ENA", (event_dw >> 20) & 0x1, 1);
334 print_named_value(f, "TC_MD_ACTION_ENA", (event_dw >> 21) & 0x1, 1);
335 }
336 uint32_t sel_dw = ac_ib_get(ib);
337 print_named_value(f, "DST_SEL", (sel_dw >> 16) & 0x3, 2);
338 print_named_value(f, "INT_SEL", (sel_dw >> 24) & 0x7, 3);
339 print_named_value(f, "DATA_SEL", sel_dw >> 29, 3);
340 print_named_value(f, "ADDRESS_LO", ac_ib_get(ib), 32);
341 print_named_value(f, "ADDRESS_HI", ac_ib_get(ib), 32);
342 print_named_value(f, "DATA_LO", ac_ib_get(ib), 32);
343 print_named_value(f, "DATA_HI", ac_ib_get(ib), 32);
344 print_named_value(f, "CTXID", ac_ib_get(ib), 32);
345 break;
346 }
347 case PKT3_WAIT_REG_MEM:
348 print_named_value(f, "OP", ac_ib_get(ib), 32);
349 print_named_value(f, "ADDRESS_LO", ac_ib_get(ib), 32);
350 print_named_value(f, "ADDRESS_HI", ac_ib_get(ib), 32);
351 print_named_value(f, "REF", ac_ib_get(ib), 32);
352 print_named_value(f, "MASK", ac_ib_get(ib), 32);
353 print_named_value(f, "POLL_INTERVAL", ac_ib_get(ib), 16);
354 break;
355 case PKT3_DRAW_INDEX_AUTO:
356 ac_dump_reg(f, ib->chip_class, R_030930_VGT_NUM_INDICES, ac_ib_get(ib), ~0);
357 ac_dump_reg(f, ib->chip_class, R_0287F0_VGT_DRAW_INITIATOR, ac_ib_get(ib), ~0);
358 break;
359 case PKT3_DRAW_INDEX_2:
360 ac_dump_reg(f, ib->chip_class, R_028A78_VGT_DMA_MAX_SIZE, ac_ib_get(ib), ~0);
361 ac_dump_reg(f, ib->chip_class, R_0287E8_VGT_DMA_BASE, ac_ib_get(ib), ~0);
362 ac_dump_reg(f, ib->chip_class, R_0287E4_VGT_DMA_BASE_HI, ac_ib_get(ib), ~0);
363 ac_dump_reg(f, ib->chip_class, R_030930_VGT_NUM_INDICES, ac_ib_get(ib), ~0);
364 ac_dump_reg(f, ib->chip_class, R_0287F0_VGT_DRAW_INITIATOR, ac_ib_get(ib), ~0);
365 break;
366 case PKT3_INDEX_TYPE:
367 ac_dump_reg(f, ib->chip_class, R_028A7C_VGT_DMA_INDEX_TYPE, ac_ib_get(ib), ~0);
368 break;
369 case PKT3_NUM_INSTANCES:
370 ac_dump_reg(f, ib->chip_class, R_030934_VGT_NUM_INSTANCES, ac_ib_get(ib), ~0);
371 break;
372 case PKT3_WRITE_DATA:
373 ac_dump_reg(f, ib->chip_class, R_370_CONTROL, ac_ib_get(ib), ~0);
374 ac_dump_reg(f, ib->chip_class, R_371_DST_ADDR_LO, ac_ib_get(ib), ~0);
375 ac_dump_reg(f, ib->chip_class, R_372_DST_ADDR_HI, ac_ib_get(ib), ~0);
376 /* The payload is written automatically */
377 break;
378 case PKT3_CP_DMA:
379 ac_dump_reg(f, ib->chip_class, R_410_CP_DMA_WORD0, ac_ib_get(ib), ~0);
380 ac_dump_reg(f, ib->chip_class, R_411_CP_DMA_WORD1, ac_ib_get(ib), ~0);
381 ac_dump_reg(f, ib->chip_class, R_412_CP_DMA_WORD2, ac_ib_get(ib), ~0);
382 ac_dump_reg(f, ib->chip_class, R_413_CP_DMA_WORD3, ac_ib_get(ib), ~0);
383 ac_dump_reg(f, ib->chip_class, R_414_COMMAND, ac_ib_get(ib), ~0);
384 break;
385 case PKT3_DMA_DATA:
386 ac_dump_reg(f, ib->chip_class, R_500_DMA_DATA_WORD0, ac_ib_get(ib), ~0);
387 ac_dump_reg(f, ib->chip_class, R_501_SRC_ADDR_LO, ac_ib_get(ib), ~0);
388 ac_dump_reg(f, ib->chip_class, R_502_SRC_ADDR_HI, ac_ib_get(ib), ~0);
389 ac_dump_reg(f, ib->chip_class, R_503_DST_ADDR_LO, ac_ib_get(ib), ~0);
390 ac_dump_reg(f, ib->chip_class, R_504_DST_ADDR_HI, ac_ib_get(ib), ~0);
391 ac_dump_reg(f, ib->chip_class, R_414_COMMAND, ac_ib_get(ib), ~0);
392 break;
393 case PKT3_INDIRECT_BUFFER_SI:
394 case PKT3_INDIRECT_BUFFER_CONST:
395 case PKT3_INDIRECT_BUFFER_CIK: {
396 uint32_t base_lo_dw = ac_ib_get(ib);
397 ac_dump_reg(f, ib->chip_class, R_3F0_IB_BASE_LO, base_lo_dw, ~0);
398 uint32_t base_hi_dw = ac_ib_get(ib);
399 ac_dump_reg(f, ib->chip_class, R_3F1_IB_BASE_HI, base_hi_dw, ~0);
400 uint32_t control_dw = ac_ib_get(ib);
401 ac_dump_reg(f, ib->chip_class, R_3F2_IB_CONTROL, control_dw, ~0);
402
403 if (!ib->addr_callback)
404 break;
405
406 uint64_t addr = ((uint64_t)base_hi_dw << 32) | base_lo_dw;
407 void *data = ib->addr_callback(ib->addr_callback_data, addr);
408 if (!data)
409 break;
410
411 if (G_3F2_CHAIN(control_dw)) {
412 ib->ib = data;
413 ib->num_dw = G_3F2_IB_SIZE(control_dw);
414 ib->cur_dw = 0;
415 return;
416 }
417
418 struct ac_ib_parser ib_recurse;
419 memcpy(&ib_recurse, ib, sizeof(ib_recurse));
420 ib_recurse.ib = data;
421 ib_recurse.num_dw = G_3F2_IB_SIZE(control_dw);
422 ib_recurse.cur_dw = 0;
423 if(ib_recurse.trace_id_count) {
424 if (*current_trace_id == *ib->trace_ids) {
425 ++ib_recurse.trace_ids;
426 --ib_recurse.trace_id_count;
427 } else {
428 ib_recurse.trace_id_count = 0;
429 }
430 }
431
432 fprintf(f, "\n\035>------------------ nested begin ------------------\n");
433 ac_do_parse_ib(f, &ib_recurse);
434 fprintf(f, "\n\035<------------------- nested end -------------------\n");
435 break;
436 }
437 case PKT3_CLEAR_STATE:
438 case PKT3_INCREMENT_DE_COUNTER:
439 case PKT3_PFP_SYNC_ME:
440 break;
441 case PKT3_NOP:
442 if (header == 0xffff1000) {
443 count = -1; /* One dword NOP. */
444 } else if (count == 0 && ib->cur_dw < ib->num_dw &&
445 AC_IS_TRACE_POINT(ib->ib[ib->cur_dw])) {
446 unsigned packet_id = AC_GET_TRACE_POINT_ID(ib->ib[ib->cur_dw]);
447
448 print_spaces(f, INDENT_PKT);
449 fprintf(f, COLOR_RED "Trace point ID: %u\n", packet_id);
450
451 if (!ib->trace_id_count)
452 break; /* tracing was disabled */
453
454 *current_trace_id = packet_id;
455
456 print_spaces(f, INDENT_PKT);
457 if (packet_id < *ib->trace_ids)
458 fprintf(f, COLOR_RED
459 "This trace point was reached by the CP."
460 COLOR_RESET "\n");
461 else if (packet_id == *ib->trace_ids)
462 fprintf(f, COLOR_RED
463 "!!!!! This is the last trace point that "
464 "was reached by the CP !!!!!"
465 COLOR_RESET "\n");
466 else if (packet_id+1 == *ib->trace_ids)
467 fprintf(f, COLOR_RED
468 "!!!!! This is the first trace point that "
469 "was NOT been reached by the CP !!!!!"
470 COLOR_RESET "\n");
471 else
472 fprintf(f, COLOR_RED
473 "!!!!! This trace point was NOT reached "
474 "by the CP !!!!!"
475 COLOR_RESET "\n");
476 break;
477 }
478 break;
479 }
480
481 /* print additional dwords */
482 while (ib->cur_dw <= first_dw + count)
483 ac_ib_get(ib);
484
485 if (ib->cur_dw > first_dw + count + 1)
486 fprintf(f, COLOR_RED "\n!!!!! count in header too low !!!!!"
487 COLOR_RESET "\n");
488 }
489
490 /**
491 * Parse and print an IB into a file.
492 */
493 static void ac_do_parse_ib(FILE *f, struct ac_ib_parser *ib)
494 {
495 int current_trace_id = -1;
496
497 while (ib->cur_dw < ib->num_dw) {
498 uint32_t header = ac_ib_get(ib);
499 unsigned type = PKT_TYPE_G(header);
500
501 switch (type) {
502 case 3:
503 ac_parse_packet3(f, header, ib, &current_trace_id);
504 break;
505 case 2:
506 /* type-2 nop */
507 if (header == 0x80000000) {
508 fprintf(f, COLOR_GREEN "NOP (type 2)" COLOR_RESET "\n");
509 break;
510 }
511 /* fall through */
512 default:
513 fprintf(f, "Unknown packet type %i\n", type);
514 break;
515 }
516 }
517 }
518
519 static void format_ib_output(FILE *f, char *out)
520 {
521 unsigned depth = 0;
522
523 for (;;) {
524 char op = 0;
525
526 if (out[0] == '\n' && out[1] == '\035')
527 out++;
528 if (out[0] == '\035') {
529 op = out[1];
530 out += 2;
531 }
532
533 if (op == '<')
534 depth--;
535
536 unsigned indent = 4 * depth;
537 if (op != '#')
538 indent += 9;
539
540 if (indent)
541 print_spaces(f, indent);
542
543 char *end = util_strchrnul(out, '\n');
544 fwrite(out, end - out, 1, f);
545 fputc('\n', f); /* always end with a new line */
546 if (!*end)
547 break;
548
549 out = end + 1;
550
551 if (op == '>')
552 depth++;
553 }
554 }
555
556 /**
557 * Parse and print an IB into a file.
558 *
559 * \param f file
560 * \param ib_ptr IB
561 * \param num_dw size of the IB
562 * \param chip_class chip class
563 * \param trace_ids the last trace IDs that are known to have been reached
564 * and executed by the CP, typically read from a buffer
565 * \param trace_id_count The number of entries in the trace_ids array.
566 * \param addr_callback Get a mapped pointer of the IB at a given address. Can
567 * be NULL.
568 * \param addr_callback_data user data for addr_callback
569 */
570 void ac_parse_ib_chunk(FILE *f, uint32_t *ib_ptr, int num_dw, const int *trace_ids,
571 unsigned trace_id_count, enum chip_class chip_class,
572 ac_debug_addr_callback addr_callback, void *addr_callback_data)
573 {
574 struct ac_ib_parser ib = {};
575 ib.ib = ib_ptr;
576 ib.num_dw = num_dw;
577 ib.trace_ids = trace_ids;
578 ib.trace_id_count = trace_id_count;
579 ib.chip_class = chip_class;
580 ib.addr_callback = addr_callback;
581 ib.addr_callback_data = addr_callback_data;
582
583 char *out;
584 size_t outsize;
585 FILE *memf = open_memstream(&out, &outsize);
586 ib.f = memf;
587 ac_do_parse_ib(memf, &ib);
588 fclose(memf);
589
590 if (out) {
591 format_ib_output(f, out);
592 free(out);
593 }
594
595 if (ib.cur_dw > ib.num_dw) {
596 printf("\nPacket ends after the end of IB.\n");
597 exit(1);
598 }
599 }
600
601 /**
602 * Parse and print an IB into a file.
603 *
604 * \param f file
605 * \param ib IB
606 * \param num_dw size of the IB
607 * \param chip_class chip class
608 * \param trace_ids the last trace IDs that are known to have been reached
609 * and executed by the CP, typically read from a buffer
610 * \param trace_id_count The number of entries in the trace_ids array.
611 * \param addr_callback Get a mapped pointer of the IB at a given address. Can
612 * be NULL.
613 * \param addr_callback_data user data for addr_callback
614 */
615 void ac_parse_ib(FILE *f, uint32_t *ib, int num_dw, const int *trace_ids,
616 unsigned trace_id_count, const char *name,
617 enum chip_class chip_class, ac_debug_addr_callback addr_callback,
618 void *addr_callback_data)
619 {
620 fprintf(f, "------------------ %s begin ------------------\n", name);
621
622 ac_parse_ib_chunk(f, ib, num_dw, trace_ids, trace_id_count,
623 chip_class, addr_callback, addr_callback_data);
624
625 fprintf(f, "------------------- %s end -------------------\n\n", name);
626 }
627
628 /**
629 * Parse dmesg and return TRUE if a VM fault has been detected.
630 *
631 * \param chip_class chip class
632 * \param old_dmesg_timestamp previous dmesg timestamp parsed at init time
633 * \param out_addr detected VM fault addr
634 */
635 bool ac_vm_fault_occured(enum chip_class chip_class,
636 uint64_t *old_dmesg_timestamp, uint64_t *out_addr)
637 {
638 char line[2000];
639 unsigned sec, usec;
640 int progress = 0;
641 uint64_t dmesg_timestamp = 0;
642 bool fault = false;
643
644 FILE *p = popen("dmesg", "r");
645 if (!p)
646 return false;
647
648 while (fgets(line, sizeof(line), p)) {
649 char *msg, len;
650
651 if (!line[0] || line[0] == '\n')
652 continue;
653
654 /* Get the timestamp. */
655 if (sscanf(line, "[%u.%u]", &sec, &usec) != 2) {
656 static bool hit = false;
657 if (!hit) {
658 fprintf(stderr, "%s: failed to parse line '%s'\n",
659 __func__, line);
660 hit = true;
661 }
662 continue;
663 }
664 dmesg_timestamp = sec * 1000000ull + usec;
665
666 /* If just updating the timestamp. */
667 if (!out_addr)
668 continue;
669
670 /* Process messages only if the timestamp is newer. */
671 if (dmesg_timestamp <= *old_dmesg_timestamp)
672 continue;
673
674 /* Only process the first VM fault. */
675 if (fault)
676 continue;
677
678 /* Remove trailing \n */
679 len = strlen(line);
680 if (len && line[len-1] == '\n')
681 line[len-1] = 0;
682
683 /* Get the message part. */
684 msg = strchr(line, ']');
685 if (!msg)
686 continue;
687 msg++;
688
689 const char *header_line, *addr_line_prefix, *addr_line_format;
690
691 if (chip_class >= GFX9) {
692 /* Match this:
693 * ..: [gfxhub] VMC page fault (src_id:0 ring:158 vm_id:2 pas_id:0)
694 * ..: at page 0x0000000219f8f000 from 27
695 * ..: VM_L2_PROTECTION_FAULT_STATUS:0x0020113C
696 */
697 header_line = "VMC page fault";
698 addr_line_prefix = " at page";
699 addr_line_format = "%"PRIx64;
700 } else {
701 header_line = "GPU fault detected:";
702 addr_line_prefix = "VM_CONTEXT1_PROTECTION_FAULT_ADDR";
703 addr_line_format = "%"PRIX64;
704 }
705
706 switch (progress) {
707 case 0:
708 if (strstr(msg, header_line))
709 progress = 1;
710 break;
711 case 1:
712 msg = strstr(msg, addr_line_prefix);
713 if (msg) {
714 msg = strstr(msg, "0x");
715 if (msg) {
716 msg += 2;
717 if (sscanf(msg, addr_line_format, out_addr) == 1)
718 fault = true;
719 }
720 }
721 progress = 0;
722 break;
723 default:
724 progress = 0;
725 }
726 }
727 pclose(p);
728
729 if (dmesg_timestamp > *old_dmesg_timestamp)
730 *old_dmesg_timestamp = dmesg_timestamp;
731
732 return fault;
733 }
734
735 static int compare_wave(const void *p1, const void *p2)
736 {
737 struct ac_wave_info *w1 = (struct ac_wave_info *)p1;
738 struct ac_wave_info *w2 = (struct ac_wave_info *)p2;
739
740 /* Sort waves according to PC and then SE, SH, CU, etc. */
741 if (w1->pc < w2->pc)
742 return -1;
743 if (w1->pc > w2->pc)
744 return 1;
745 if (w1->se < w2->se)
746 return -1;
747 if (w1->se > w2->se)
748 return 1;
749 if (w1->sh < w2->sh)
750 return -1;
751 if (w1->sh > w2->sh)
752 return 1;
753 if (w1->cu < w2->cu)
754 return -1;
755 if (w1->cu > w2->cu)
756 return 1;
757 if (w1->simd < w2->simd)
758 return -1;
759 if (w1->simd > w2->simd)
760 return 1;
761 if (w1->wave < w2->wave)
762 return -1;
763 if (w1->wave > w2->wave)
764 return 1;
765
766 return 0;
767 }
768
769 /* Return wave information. "waves" should be a large enough array. */
770 unsigned ac_get_wave_info(struct ac_wave_info waves[AC_MAX_WAVES_PER_CHIP])
771 {
772 char line[2000];
773 unsigned num_waves = 0;
774
775 FILE *p = popen("umr -O halt_waves -wa", "r");
776 if (!p)
777 return 0;
778
779 if (!fgets(line, sizeof(line), p) ||
780 strncmp(line, "SE", 2) != 0) {
781 pclose(p);
782 return 0;
783 }
784
785 while (fgets(line, sizeof(line), p)) {
786 struct ac_wave_info *w;
787 uint32_t pc_hi, pc_lo, exec_hi, exec_lo;
788
789 assert(num_waves < AC_MAX_WAVES_PER_CHIP);
790 w = &waves[num_waves];
791
792 if (sscanf(line, "%u %u %u %u %u %x %x %x %x %x %x %x",
793 &w->se, &w->sh, &w->cu, &w->simd, &w->wave,
794 &w->status, &pc_hi, &pc_lo, &w->inst_dw0,
795 &w->inst_dw1, &exec_hi, &exec_lo) == 12) {
796 w->pc = ((uint64_t)pc_hi << 32) | pc_lo;
797 w->exec = ((uint64_t)exec_hi << 32) | exec_lo;
798 w->matched = false;
799 num_waves++;
800 }
801 }
802
803 qsort(waves, num_waves, sizeof(struct ac_wave_info), compare_wave);
804
805 pclose(p);
806 return num_waves;
807 }