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amd/common: pass chip_class to ac_dump_reg
[mesa.git] / src / amd / common / ac_debug.c
1 /*
2 * Copyright 2015 Advanced Micro Devices, Inc.
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * on the rights to use, copy, modify, merge, publish, distribute, sub
8 * license, and/or sell copies of the Software, and to permit persons to whom
9 * the Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM,
19 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
20 * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
21 * USE OR OTHER DEALINGS IN THE SOFTWARE.
22 *
23 * Authors:
24 * Marek Olšák <maraeo@gmail.com>
25 */
26
27 #include "ac_debug.h"
28
29 #ifdef HAVE_VALGRIND
30 #include <valgrind.h>
31 #include <memcheck.h>
32 #define VG(x) x
33 #else
34 #define VG(x)
35 #endif
36
37 #include <inttypes.h>
38
39 #include "sid.h"
40 #include "gfx9d.h"
41 #include "sid_tables.h"
42 #include "util/u_math.h"
43 #include "util/u_memory.h"
44 #include "util/u_string.h"
45
46 /* Parsed IBs are difficult to read without colors. Use "less -R file" to
47 * read them, or use "aha -b -f file" to convert them to html.
48 */
49 #define COLOR_RESET "\033[0m"
50 #define COLOR_RED "\033[31m"
51 #define COLOR_GREEN "\033[1;32m"
52 #define COLOR_YELLOW "\033[1;33m"
53 #define COLOR_CYAN "\033[1;36m"
54
55 #define INDENT_PKT 8
56
57 struct ac_ib_parser {
58 FILE *f;
59 uint32_t *ib;
60 unsigned num_dw;
61 const int *trace_ids;
62 unsigned trace_id_count;
63 enum chip_class chip_class;
64 ac_debug_addr_callback addr_callback;
65 void *addr_callback_data;
66
67 unsigned cur_dw;
68 };
69
70 static void ac_do_parse_ib(FILE *f, struct ac_ib_parser *ib);
71
72 static void print_spaces(FILE *f, unsigned num)
73 {
74 fprintf(f, "%*s", num, "");
75 }
76
77 static void print_value(FILE *file, uint32_t value, int bits)
78 {
79 /* Guess if it's int or float */
80 if (value <= (1 << 15)) {
81 if (value <= 9)
82 fprintf(file, "%u\n", value);
83 else
84 fprintf(file, "%u (0x%0*x)\n", value, bits / 4, value);
85 } else {
86 float f = uif(value);
87
88 if (fabs(f) < 100000 && f*10 == floor(f*10))
89 fprintf(file, "%.1ff (0x%0*x)\n", f, bits / 4, value);
90 else
91 /* Don't print more leading zeros than there are bits. */
92 fprintf(file, "0x%0*x\n", bits / 4, value);
93 }
94 }
95
96 static void print_named_value(FILE *file, const char *name, uint32_t value,
97 int bits)
98 {
99 print_spaces(file, INDENT_PKT);
100 fprintf(file, COLOR_YELLOW "%s" COLOR_RESET " <- ", name);
101 print_value(file, value, bits);
102 }
103
104 void ac_dump_reg(FILE *file, enum chip_class chip_class, unsigned offset,
105 uint32_t value, uint32_t field_mask)
106 {
107 int r, f;
108
109 for (r = 0; r < ARRAY_SIZE(sid_reg_table); r++) {
110 const struct si_reg *reg = &sid_reg_table[r];
111 const char *reg_name = sid_strings + reg->name_offset;
112
113 if (reg->offset == offset) {
114 bool first_field = true;
115
116 print_spaces(file, INDENT_PKT);
117 fprintf(file, COLOR_YELLOW "%s" COLOR_RESET " <- ",
118 reg_name);
119
120 if (!reg->num_fields) {
121 print_value(file, value, 32);
122 return;
123 }
124
125 for (f = 0; f < reg->num_fields; f++) {
126 const struct si_field *field = sid_fields_table + reg->fields_offset + f;
127 const int *values_offsets = sid_strings_offsets + field->values_offset;
128 uint32_t val = (value & field->mask) >>
129 (ffs(field->mask) - 1);
130
131 if (!(field->mask & field_mask))
132 continue;
133
134 /* Indent the field. */
135 if (!first_field)
136 print_spaces(file,
137 INDENT_PKT + strlen(reg_name) + 4);
138
139 /* Print the field. */
140 fprintf(file, "%s = ", sid_strings + field->name_offset);
141
142 if (val < field->num_values && values_offsets[val] >= 0)
143 fprintf(file, "%s\n", sid_strings + values_offsets[val]);
144 else
145 print_value(file, val,
146 util_bitcount(field->mask));
147
148 first_field = false;
149 }
150 return;
151 }
152 }
153
154 print_spaces(file, INDENT_PKT);
155 fprintf(file, COLOR_YELLOW "0x%05x" COLOR_RESET " <- 0x%08x\n", offset, value);
156 }
157
158 static uint32_t ac_ib_get(struct ac_ib_parser *ib)
159 {
160 uint32_t v = 0;
161
162 if (ib->cur_dw < ib->num_dw) {
163 v = ib->ib[ib->cur_dw];
164 #ifdef HAVE_VALGRIND
165 /* Help figure out where garbage data is written to IBs.
166 *
167 * Arguably we should do this already when the IBs are written,
168 * see RADEON_VALGRIND. The problem is that client-requests to
169 * Valgrind have an overhead even when Valgrind isn't running,
170 * and radeon_emit is performance sensitive...
171 */
172 if (VALGRIND_CHECK_VALUE_IS_DEFINED(v))
173 fprintf(ib->f, COLOR_RED "Valgrind: The next DWORD is garbage"
174 COLOR_RESET "\n");
175 #endif
176 fprintf(ib->f, "\n\035#%08x ", v);
177 } else {
178 fprintf(ib->f, "\n\035#???????? ");
179 }
180
181 ib->cur_dw++;
182 return v;
183 }
184
185 static void ac_parse_set_reg_packet(FILE *f, unsigned count, unsigned reg_offset,
186 struct ac_ib_parser *ib)
187 {
188 unsigned reg_dw = ac_ib_get(ib);
189 unsigned reg = ((reg_dw & 0xFFFF) << 2) + reg_offset;
190 unsigned index = reg_dw >> 28;
191 int i;
192
193 if (index != 0) {
194 print_spaces(f, INDENT_PKT);
195 fprintf(f, "INDEX = %u\n", index);
196 }
197
198 for (i = 0; i < count; i++)
199 ac_dump_reg(f, ib->chip_class, reg + i*4, ac_ib_get(ib), ~0);
200 }
201
202 static void ac_parse_packet3(FILE *f, uint32_t header, struct ac_ib_parser *ib,
203 int *current_trace_id)
204 {
205 unsigned first_dw = ib->cur_dw;
206 int count = PKT_COUNT_G(header);
207 unsigned op = PKT3_IT_OPCODE_G(header);
208 const char *predicate = PKT3_PREDICATE(header) ? "(predicate)" : "";
209 int i;
210
211 /* Print the name first. */
212 for (i = 0; i < ARRAY_SIZE(packet3_table); i++)
213 if (packet3_table[i].op == op)
214 break;
215
216 if (i < ARRAY_SIZE(packet3_table)) {
217 const char *name = sid_strings + packet3_table[i].name_offset;
218
219 if (op == PKT3_SET_CONTEXT_REG ||
220 op == PKT3_SET_CONFIG_REG ||
221 op == PKT3_SET_UCONFIG_REG ||
222 op == PKT3_SET_SH_REG)
223 fprintf(f, COLOR_CYAN "%s%s" COLOR_CYAN ":\n",
224 name, predicate);
225 else
226 fprintf(f, COLOR_GREEN "%s%s" COLOR_RESET ":\n",
227 name, predicate);
228 } else
229 fprintf(f, COLOR_RED "PKT3_UNKNOWN 0x%x%s" COLOR_RESET ":\n",
230 op, predicate);
231
232 /* Print the contents. */
233 switch (op) {
234 case PKT3_SET_CONTEXT_REG:
235 ac_parse_set_reg_packet(f, count, SI_CONTEXT_REG_OFFSET, ib);
236 break;
237 case PKT3_SET_CONFIG_REG:
238 ac_parse_set_reg_packet(f, count, SI_CONFIG_REG_OFFSET, ib);
239 break;
240 case PKT3_SET_UCONFIG_REG:
241 ac_parse_set_reg_packet(f, count, CIK_UCONFIG_REG_OFFSET, ib);
242 break;
243 case PKT3_SET_SH_REG:
244 ac_parse_set_reg_packet(f, count, SI_SH_REG_OFFSET, ib);
245 break;
246 case PKT3_ACQUIRE_MEM:
247 ac_dump_reg(f, ib->chip_class, R_0301F0_CP_COHER_CNTL, ac_ib_get(ib), ~0);
248 ac_dump_reg(f, ib->chip_class, R_0301F4_CP_COHER_SIZE, ac_ib_get(ib), ~0);
249 ac_dump_reg(f, ib->chip_class, R_030230_CP_COHER_SIZE_HI, ac_ib_get(ib), ~0);
250 ac_dump_reg(f, ib->chip_class, R_0301F8_CP_COHER_BASE, ac_ib_get(ib), ~0);
251 ac_dump_reg(f, ib->chip_class, R_0301E4_CP_COHER_BASE_HI, ac_ib_get(ib), ~0);
252 print_named_value(f, "POLL_INTERVAL", ac_ib_get(ib), 16);
253 break;
254 case PKT3_SURFACE_SYNC:
255 if (ib->chip_class >= CIK) {
256 ac_dump_reg(f, ib->chip_class, R_0301F0_CP_COHER_CNTL, ac_ib_get(ib), ~0);
257 ac_dump_reg(f, ib->chip_class, R_0301F4_CP_COHER_SIZE, ac_ib_get(ib), ~0);
258 ac_dump_reg(f, ib->chip_class, R_0301F8_CP_COHER_BASE, ac_ib_get(ib), ~0);
259 } else {
260 ac_dump_reg(f, ib->chip_class, R_0085F0_CP_COHER_CNTL, ac_ib_get(ib), ~0);
261 ac_dump_reg(f, ib->chip_class, R_0085F4_CP_COHER_SIZE, ac_ib_get(ib), ~0);
262 ac_dump_reg(f, ib->chip_class, R_0085F8_CP_COHER_BASE, ac_ib_get(ib), ~0);
263 }
264 print_named_value(f, "POLL_INTERVAL", ac_ib_get(ib), 16);
265 break;
266 case PKT3_EVENT_WRITE: {
267 uint32_t event_dw = ac_ib_get(ib);
268 ac_dump_reg(f, ib->chip_class, R_028A90_VGT_EVENT_INITIATOR, event_dw,
269 S_028A90_EVENT_TYPE(~0));
270 print_named_value(f, "EVENT_INDEX", (event_dw >> 8) & 0xf, 4);
271 print_named_value(f, "INV_L2", (event_dw >> 20) & 0x1, 1);
272 if (count > 0) {
273 print_named_value(f, "ADDRESS_LO", ac_ib_get(ib), 32);
274 print_named_value(f, "ADDRESS_HI", ac_ib_get(ib), 16);
275 }
276 break;
277 }
278 case PKT3_EVENT_WRITE_EOP: {
279 uint32_t event_dw = ac_ib_get(ib);
280 ac_dump_reg(f, ib->chip_class, R_028A90_VGT_EVENT_INITIATOR, event_dw,
281 S_028A90_EVENT_TYPE(~0));
282 print_named_value(f, "EVENT_INDEX", (event_dw >> 8) & 0xf, 4);
283 print_named_value(f, "TCL1_VOL_ACTION_ENA", (event_dw >> 12) & 0x1, 1);
284 print_named_value(f, "TC_VOL_ACTION_ENA", (event_dw >> 13) & 0x1, 1);
285 print_named_value(f, "TC_WB_ACTION_ENA", (event_dw >> 15) & 0x1, 1);
286 print_named_value(f, "TCL1_ACTION_ENA", (event_dw >> 16) & 0x1, 1);
287 print_named_value(f, "TC_ACTION_ENA", (event_dw >> 17) & 0x1, 1);
288 print_named_value(f, "ADDRESS_LO", ac_ib_get(ib), 32);
289 uint32_t addr_hi_dw = ac_ib_get(ib);
290 print_named_value(f, "ADDRESS_HI", addr_hi_dw, 16);
291 print_named_value(f, "DST_SEL", (addr_hi_dw >> 16) & 0x3, 2);
292 print_named_value(f, "INT_SEL", (addr_hi_dw >> 24) & 0x7, 3);
293 print_named_value(f, "DATA_SEL", addr_hi_dw >> 29, 3);
294 print_named_value(f, "DATA_LO", ac_ib_get(ib), 32);
295 print_named_value(f, "DATA_HI", ac_ib_get(ib), 32);
296 break;
297 }
298 case PKT3_RELEASE_MEM: {
299 uint32_t event_dw = ac_ib_get(ib);
300 ac_dump_reg(f, ib->chip_class, R_028A90_VGT_EVENT_INITIATOR, event_dw,
301 S_028A90_EVENT_TYPE(~0));
302 print_named_value(f, "EVENT_INDEX", (event_dw >> 8) & 0xf, 4);
303 print_named_value(f, "TCL1_VOL_ACTION_ENA", (event_dw >> 12) & 0x1, 1);
304 print_named_value(f, "TC_VOL_ACTION_ENA", (event_dw >> 13) & 0x1, 1);
305 print_named_value(f, "TC_WB_ACTION_ENA", (event_dw >> 15) & 0x1, 1);
306 print_named_value(f, "TCL1_ACTION_ENA", (event_dw >> 16) & 0x1, 1);
307 print_named_value(f, "TC_ACTION_ENA", (event_dw >> 17) & 0x1, 1);
308 print_named_value(f, "TC_NC_ACTION_ENA", (event_dw >> 19) & 0x1, 1);
309 print_named_value(f, "TC_WC_ACTION_ENA", (event_dw >> 20) & 0x1, 1);
310 print_named_value(f, "TC_MD_ACTION_ENA", (event_dw >> 21) & 0x1, 1);
311 uint32_t sel_dw = ac_ib_get(ib);
312 print_named_value(f, "DST_SEL", (sel_dw >> 16) & 0x3, 2);
313 print_named_value(f, "INT_SEL", (sel_dw >> 24) & 0x7, 3);
314 print_named_value(f, "DATA_SEL", sel_dw >> 29, 3);
315 print_named_value(f, "ADDRESS_LO", ac_ib_get(ib), 32);
316 print_named_value(f, "ADDRESS_HI", ac_ib_get(ib), 32);
317 print_named_value(f, "DATA_LO", ac_ib_get(ib), 32);
318 print_named_value(f, "DATA_HI", ac_ib_get(ib), 32);
319 print_named_value(f, "CTXID", ac_ib_get(ib), 32);
320 break;
321 }
322 case PKT3_WAIT_REG_MEM:
323 print_named_value(f, "OP", ac_ib_get(ib), 32);
324 print_named_value(f, "ADDRESS_LO", ac_ib_get(ib), 32);
325 print_named_value(f, "ADDRESS_HI", ac_ib_get(ib), 32);
326 print_named_value(f, "REF", ac_ib_get(ib), 32);
327 print_named_value(f, "MASK", ac_ib_get(ib), 32);
328 print_named_value(f, "POLL_INTERVAL", ac_ib_get(ib), 16);
329 break;
330 case PKT3_DRAW_INDEX_AUTO:
331 ac_dump_reg(f, ib->chip_class, R_030930_VGT_NUM_INDICES, ac_ib_get(ib), ~0);
332 ac_dump_reg(f, ib->chip_class, R_0287F0_VGT_DRAW_INITIATOR, ac_ib_get(ib), ~0);
333 break;
334 case PKT3_DRAW_INDEX_2:
335 ac_dump_reg(f, ib->chip_class, R_028A78_VGT_DMA_MAX_SIZE, ac_ib_get(ib), ~0);
336 ac_dump_reg(f, ib->chip_class, R_0287E8_VGT_DMA_BASE, ac_ib_get(ib), ~0);
337 ac_dump_reg(f, ib->chip_class, R_0287E4_VGT_DMA_BASE_HI, ac_ib_get(ib), ~0);
338 ac_dump_reg(f, ib->chip_class, R_030930_VGT_NUM_INDICES, ac_ib_get(ib), ~0);
339 ac_dump_reg(f, ib->chip_class, R_0287F0_VGT_DRAW_INITIATOR, ac_ib_get(ib), ~0);
340 break;
341 case PKT3_INDEX_TYPE:
342 ac_dump_reg(f, ib->chip_class, R_028A7C_VGT_DMA_INDEX_TYPE, ac_ib_get(ib), ~0);
343 break;
344 case PKT3_NUM_INSTANCES:
345 ac_dump_reg(f, ib->chip_class, R_030934_VGT_NUM_INSTANCES, ac_ib_get(ib), ~0);
346 break;
347 case PKT3_WRITE_DATA:
348 ac_dump_reg(f, ib->chip_class, R_370_CONTROL, ac_ib_get(ib), ~0);
349 ac_dump_reg(f, ib->chip_class, R_371_DST_ADDR_LO, ac_ib_get(ib), ~0);
350 ac_dump_reg(f, ib->chip_class, R_372_DST_ADDR_HI, ac_ib_get(ib), ~0);
351 /* The payload is written automatically */
352 break;
353 case PKT3_CP_DMA:
354 ac_dump_reg(f, ib->chip_class, R_410_CP_DMA_WORD0, ac_ib_get(ib), ~0);
355 ac_dump_reg(f, ib->chip_class, R_411_CP_DMA_WORD1, ac_ib_get(ib), ~0);
356 ac_dump_reg(f, ib->chip_class, R_412_CP_DMA_WORD2, ac_ib_get(ib), ~0);
357 ac_dump_reg(f, ib->chip_class, R_413_CP_DMA_WORD3, ac_ib_get(ib), ~0);
358 ac_dump_reg(f, ib->chip_class, R_414_COMMAND, ac_ib_get(ib), ~0);
359 break;
360 case PKT3_DMA_DATA:
361 ac_dump_reg(f, ib->chip_class, R_500_DMA_DATA_WORD0, ac_ib_get(ib), ~0);
362 ac_dump_reg(f, ib->chip_class, R_501_SRC_ADDR_LO, ac_ib_get(ib), ~0);
363 ac_dump_reg(f, ib->chip_class, R_502_SRC_ADDR_HI, ac_ib_get(ib), ~0);
364 ac_dump_reg(f, ib->chip_class, R_503_DST_ADDR_LO, ac_ib_get(ib), ~0);
365 ac_dump_reg(f, ib->chip_class, R_504_DST_ADDR_HI, ac_ib_get(ib), ~0);
366 ac_dump_reg(f, ib->chip_class, R_414_COMMAND, ac_ib_get(ib), ~0);
367 break;
368 case PKT3_INDIRECT_BUFFER_SI:
369 case PKT3_INDIRECT_BUFFER_CONST:
370 case PKT3_INDIRECT_BUFFER_CIK: {
371 uint32_t base_lo_dw = ac_ib_get(ib);
372 ac_dump_reg(f, ib->chip_class, R_3F0_IB_BASE_LO, base_lo_dw, ~0);
373 uint32_t base_hi_dw = ac_ib_get(ib);
374 ac_dump_reg(f, ib->chip_class, R_3F1_IB_BASE_HI, base_hi_dw, ~0);
375 uint32_t control_dw = ac_ib_get(ib);
376 ac_dump_reg(f, ib->chip_class, R_3F2_CONTROL, control_dw, ~0);
377
378 if (!ib->addr_callback)
379 break;
380
381 uint64_t addr = ((uint64_t)base_hi_dw << 32) | base_lo_dw;
382 void *data = ib->addr_callback(ib->addr_callback_data, addr);
383 if (!data)
384 break;
385
386 if (G_3F2_CHAIN(control_dw)) {
387 ib->ib = data;
388 ib->num_dw = G_3F2_IB_SIZE(control_dw);
389 ib->cur_dw = 0;
390 return;
391 }
392
393 struct ac_ib_parser ib_recurse;
394 memcpy(&ib_recurse, ib, sizeof(ib_recurse));
395 ib_recurse.ib = data;
396 ib_recurse.num_dw = G_3F2_IB_SIZE(control_dw);
397 ib_recurse.cur_dw = 0;
398 if(ib_recurse.trace_id_count) {
399 if (*current_trace_id == *ib->trace_ids) {
400 ++ib_recurse.trace_ids;
401 --ib_recurse.trace_id_count;
402 } else {
403 ib_recurse.trace_id_count = 0;
404 }
405 }
406
407 fprintf(f, "\n\035>------------------ nested begin ------------------\n");
408 ac_do_parse_ib(f, &ib_recurse);
409 fprintf(f, "\n\035<------------------- nested end -------------------\n");
410 break;
411 }
412 case PKT3_CLEAR_STATE:
413 case PKT3_INCREMENT_DE_COUNTER:
414 case PKT3_PFP_SYNC_ME:
415 break;
416 case PKT3_NOP:
417 if (header == 0xffff1000) {
418 count = -1; /* One dword NOP. */
419 } else if (count == 0 && ib->cur_dw < ib->num_dw &&
420 AC_IS_TRACE_POINT(ib->ib[ib->cur_dw])) {
421 unsigned packet_id = AC_GET_TRACE_POINT_ID(ib->ib[ib->cur_dw]);
422
423 print_spaces(f, INDENT_PKT);
424 fprintf(f, COLOR_RED "Trace point ID: %u\n", packet_id);
425
426 if (!ib->trace_id_count)
427 break; /* tracing was disabled */
428
429 *current_trace_id = packet_id;
430
431 print_spaces(f, INDENT_PKT);
432 if (packet_id < *ib->trace_ids)
433 fprintf(f, COLOR_RED
434 "This trace point was reached by the CP."
435 COLOR_RESET "\n");
436 else if (packet_id == *ib->trace_ids)
437 fprintf(f, COLOR_RED
438 "!!!!! This is the last trace point that "
439 "was reached by the CP !!!!!"
440 COLOR_RESET "\n");
441 else if (packet_id+1 == *ib->trace_ids)
442 fprintf(f, COLOR_RED
443 "!!!!! This is the first trace point that "
444 "was NOT been reached by the CP !!!!!"
445 COLOR_RESET "\n");
446 else
447 fprintf(f, COLOR_RED
448 "!!!!! This trace point was NOT reached "
449 "by the CP !!!!!"
450 COLOR_RESET "\n");
451 break;
452 }
453 break;
454 }
455
456 /* print additional dwords */
457 while (ib->cur_dw <= first_dw + count)
458 ac_ib_get(ib);
459
460 if (ib->cur_dw > first_dw + count + 1)
461 fprintf(f, COLOR_RED "\n!!!!! count in header too low !!!!!"
462 COLOR_RESET "\n");
463 }
464
465 /**
466 * Parse and print an IB into a file.
467 */
468 static void ac_do_parse_ib(FILE *f, struct ac_ib_parser *ib)
469 {
470 int current_trace_id = -1;
471
472 while (ib->cur_dw < ib->num_dw) {
473 uint32_t header = ac_ib_get(ib);
474 unsigned type = PKT_TYPE_G(header);
475
476 switch (type) {
477 case 3:
478 ac_parse_packet3(f, header, ib, &current_trace_id);
479 break;
480 case 2:
481 /* type-2 nop */
482 if (header == 0x80000000) {
483 fprintf(f, COLOR_GREEN "NOP (type 2)" COLOR_RESET "\n");
484 break;
485 }
486 /* fall through */
487 default:
488 fprintf(f, "Unknown packet type %i\n", type);
489 break;
490 }
491 }
492 }
493
494 static void format_ib_output(FILE *f, char *out)
495 {
496 unsigned depth = 0;
497
498 for (;;) {
499 char op = 0;
500
501 if (out[0] == '\n' && out[1] == '\035')
502 out++;
503 if (out[0] == '\035') {
504 op = out[1];
505 out += 2;
506 }
507
508 if (op == '<')
509 depth--;
510
511 unsigned indent = 4 * depth;
512 if (op != '#')
513 indent += 9;
514
515 if (indent)
516 print_spaces(f, indent);
517
518 char *end = util_strchrnul(out, '\n');
519 fwrite(out, end - out, 1, f);
520 fputc('\n', f); /* always end with a new line */
521 if (!*end)
522 break;
523
524 out = end + 1;
525
526 if (op == '>')
527 depth++;
528 }
529 }
530
531 /**
532 * Parse and print an IB into a file.
533 *
534 * \param f file
535 * \param ib_ptr IB
536 * \param num_dw size of the IB
537 * \param chip_class chip class
538 * \param trace_ids the last trace IDs that are known to have been reached
539 * and executed by the CP, typically read from a buffer
540 * \param trace_id_count The number of entries in the trace_ids array.
541 * \param addr_callback Get a mapped pointer of the IB at a given address. Can
542 * be NULL.
543 * \param addr_callback_data user data for addr_callback
544 */
545 void ac_parse_ib_chunk(FILE *f, uint32_t *ib_ptr, int num_dw, const int *trace_ids,
546 unsigned trace_id_count, enum chip_class chip_class,
547 ac_debug_addr_callback addr_callback, void *addr_callback_data)
548 {
549 struct ac_ib_parser ib = {};
550 ib.ib = ib_ptr;
551 ib.num_dw = num_dw;
552 ib.trace_ids = trace_ids;
553 ib.trace_id_count = trace_id_count;
554 ib.chip_class = chip_class;
555 ib.addr_callback = addr_callback;
556 ib.addr_callback_data = addr_callback_data;
557
558 char *out;
559 size_t outsize;
560 FILE *memf = open_memstream(&out, &outsize);
561 ib.f = memf;
562 ac_do_parse_ib(memf, &ib);
563 fclose(memf);
564
565 if (out) {
566 format_ib_output(f, out);
567 free(out);
568 }
569
570 if (ib.cur_dw > ib.num_dw) {
571 printf("\nPacket ends after the end of IB.\n");
572 exit(1);
573 }
574 }
575
576 /**
577 * Parse and print an IB into a file.
578 *
579 * \param f file
580 * \param ib IB
581 * \param num_dw size of the IB
582 * \param chip_class chip class
583 * \param trace_ids the last trace IDs that are known to have been reached
584 * and executed by the CP, typically read from a buffer
585 * \param trace_id_count The number of entries in the trace_ids array.
586 * \param addr_callback Get a mapped pointer of the IB at a given address. Can
587 * be NULL.
588 * \param addr_callback_data user data for addr_callback
589 */
590 void ac_parse_ib(FILE *f, uint32_t *ib, int num_dw, const int *trace_ids,
591 unsigned trace_id_count, const char *name,
592 enum chip_class chip_class, ac_debug_addr_callback addr_callback,
593 void *addr_callback_data)
594 {
595 fprintf(f, "------------------ %s begin ------------------\n", name);
596
597 ac_parse_ib_chunk(f, ib, num_dw, trace_ids, trace_id_count,
598 chip_class, addr_callback, addr_callback_data);
599
600 fprintf(f, "------------------- %s end -------------------\n\n", name);
601 }
602
603 /**
604 * Parse dmesg and return TRUE if a VM fault has been detected.
605 *
606 * \param chip_class chip class
607 * \param old_dmesg_timestamp previous dmesg timestamp parsed at init time
608 * \param out_addr detected VM fault addr
609 */
610 bool ac_vm_fault_occured(enum chip_class chip_class,
611 uint64_t *old_dmesg_timestamp, uint64_t *out_addr)
612 {
613 char line[2000];
614 unsigned sec, usec;
615 int progress = 0;
616 uint64_t dmesg_timestamp = 0;
617 bool fault = false;
618
619 FILE *p = popen("dmesg", "r");
620 if (!p)
621 return false;
622
623 while (fgets(line, sizeof(line), p)) {
624 char *msg, len;
625
626 if (!line[0] || line[0] == '\n')
627 continue;
628
629 /* Get the timestamp. */
630 if (sscanf(line, "[%u.%u]", &sec, &usec) != 2) {
631 static bool hit = false;
632 if (!hit) {
633 fprintf(stderr, "%s: failed to parse line '%s'\n",
634 __func__, line);
635 hit = true;
636 }
637 continue;
638 }
639 dmesg_timestamp = sec * 1000000ull + usec;
640
641 /* If just updating the timestamp. */
642 if (!out_addr)
643 continue;
644
645 /* Process messages only if the timestamp is newer. */
646 if (dmesg_timestamp <= *old_dmesg_timestamp)
647 continue;
648
649 /* Only process the first VM fault. */
650 if (fault)
651 continue;
652
653 /* Remove trailing \n */
654 len = strlen(line);
655 if (len && line[len-1] == '\n')
656 line[len-1] = 0;
657
658 /* Get the message part. */
659 msg = strchr(line, ']');
660 if (!msg)
661 continue;
662 msg++;
663
664 const char *header_line, *addr_line_prefix, *addr_line_format;
665
666 if (chip_class >= GFX9) {
667 /* Match this:
668 * ..: [gfxhub] VMC page fault (src_id:0 ring:158 vm_id:2 pas_id:0)
669 * ..: at page 0x0000000219f8f000 from 27
670 * ..: VM_L2_PROTECTION_FAULT_STATUS:0x0020113C
671 */
672 header_line = "VMC page fault";
673 addr_line_prefix = " at page";
674 addr_line_format = "%"PRIx64;
675 } else {
676 header_line = "GPU fault detected:";
677 addr_line_prefix = "VM_CONTEXT1_PROTECTION_FAULT_ADDR";
678 addr_line_format = "%"PRIX64;
679 }
680
681 switch (progress) {
682 case 0:
683 if (strstr(msg, header_line))
684 progress = 1;
685 break;
686 case 1:
687 msg = strstr(msg, addr_line_prefix);
688 if (msg) {
689 msg = strstr(msg, "0x");
690 if (msg) {
691 msg += 2;
692 if (sscanf(msg, addr_line_format, out_addr) == 1)
693 fault = true;
694 }
695 }
696 progress = 0;
697 break;
698 default:
699 progress = 0;
700 }
701 }
702 pclose(p);
703
704 if (dmesg_timestamp > *old_dmesg_timestamp)
705 *old_dmesg_timestamp = dmesg_timestamp;
706
707 return fault;
708 }