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[mesa.git] / src / amd / common / ac_llvm_build.c
1 /*
2 * Copyright 2014 Advanced Micro Devices, Inc.
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the
6 * "Software"), to deal in the Software without restriction, including
7 * without limitation the rights to use, copy, modify, merge, publish,
8 * distribute, sub license, and/or sell copies of the Software, and to
9 * permit persons to whom the Software is furnished to do so, subject to
10 * the following conditions:
11 *
12 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
13 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
14 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
15 * THE COPYRIGHT HOLDERS, AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM,
16 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
17 * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
18 * USE OR OTHER DEALINGS IN THE SOFTWARE.
19 *
20 * The above copyright notice and this permission notice (including the
21 * next paragraph) shall be included in all copies or substantial portions
22 * of the Software.
23 *
24 */
25 /* based on pieces from si_pipe.c and radeon_llvm_emit.c */
26 #include "ac_llvm_build.h"
27
28 #include <llvm-c/Core.h>
29
30 #include "c11/threads.h"
31
32 #include <assert.h>
33 #include <stdio.h>
34
35 #include "ac_llvm_util.h"
36 #include "ac_exp_param.h"
37 #include "util/bitscan.h"
38 #include "util/macros.h"
39 #include "util/u_atomic.h"
40 #include "sid.h"
41
42 #include "shader_enums.h"
43
44 /* Initialize module-independent parts of the context.
45 *
46 * The caller is responsible for initializing ctx::module and ctx::builder.
47 */
48 void
49 ac_llvm_context_init(struct ac_llvm_context *ctx, LLVMContextRef context,
50 enum chip_class chip_class)
51 {
52 LLVMValueRef args[1];
53
54 ctx->chip_class = chip_class;
55
56 ctx->context = context;
57 ctx->module = NULL;
58 ctx->builder = NULL;
59
60 ctx->voidt = LLVMVoidTypeInContext(ctx->context);
61 ctx->i1 = LLVMInt1TypeInContext(ctx->context);
62 ctx->i8 = LLVMInt8TypeInContext(ctx->context);
63 ctx->i16 = LLVMIntTypeInContext(ctx->context, 16);
64 ctx->i32 = LLVMIntTypeInContext(ctx->context, 32);
65 ctx->i64 = LLVMIntTypeInContext(ctx->context, 64);
66 ctx->f16 = LLVMHalfTypeInContext(ctx->context);
67 ctx->f32 = LLVMFloatTypeInContext(ctx->context);
68 ctx->f64 = LLVMDoubleTypeInContext(ctx->context);
69 ctx->v2i32 = LLVMVectorType(ctx->i32, 2);
70 ctx->v3i32 = LLVMVectorType(ctx->i32, 3);
71 ctx->v4i32 = LLVMVectorType(ctx->i32, 4);
72 ctx->v4f32 = LLVMVectorType(ctx->f32, 4);
73 ctx->v8i32 = LLVMVectorType(ctx->i32, 8);
74
75 ctx->i32_0 = LLVMConstInt(ctx->i32, 0, false);
76 ctx->i32_1 = LLVMConstInt(ctx->i32, 1, false);
77 ctx->f32_0 = LLVMConstReal(ctx->f32, 0.0);
78 ctx->f32_1 = LLVMConstReal(ctx->f32, 1.0);
79
80 ctx->i1false = LLVMConstInt(ctx->i1, 0, false);
81 ctx->i1true = LLVMConstInt(ctx->i1, 1, false);
82
83 ctx->range_md_kind = LLVMGetMDKindIDInContext(ctx->context,
84 "range", 5);
85
86 ctx->invariant_load_md_kind = LLVMGetMDKindIDInContext(ctx->context,
87 "invariant.load", 14);
88
89 ctx->fpmath_md_kind = LLVMGetMDKindIDInContext(ctx->context, "fpmath", 6);
90
91 args[0] = LLVMConstReal(ctx->f32, 2.5);
92 ctx->fpmath_md_2p5_ulp = LLVMMDNodeInContext(ctx->context, args, 1);
93
94 ctx->uniform_md_kind = LLVMGetMDKindIDInContext(ctx->context,
95 "amdgpu.uniform", 14);
96
97 ctx->empty_md = LLVMMDNodeInContext(ctx->context, NULL, 0);
98 }
99
100 unsigned
101 ac_get_type_size(LLVMTypeRef type)
102 {
103 LLVMTypeKind kind = LLVMGetTypeKind(type);
104
105 switch (kind) {
106 case LLVMIntegerTypeKind:
107 return LLVMGetIntTypeWidth(type) / 8;
108 case LLVMFloatTypeKind:
109 return 4;
110 case LLVMDoubleTypeKind:
111 case LLVMPointerTypeKind:
112 return 8;
113 case LLVMVectorTypeKind:
114 return LLVMGetVectorSize(type) *
115 ac_get_type_size(LLVMGetElementType(type));
116 case LLVMArrayTypeKind:
117 return LLVMGetArrayLength(type) *
118 ac_get_type_size(LLVMGetElementType(type));
119 default:
120 assert(0);
121 return 0;
122 }
123 }
124
125 static LLVMTypeRef to_integer_type_scalar(struct ac_llvm_context *ctx, LLVMTypeRef t)
126 {
127 if (t == ctx->f16 || t == ctx->i16)
128 return ctx->i16;
129 else if (t == ctx->f32 || t == ctx->i32)
130 return ctx->i32;
131 else if (t == ctx->f64 || t == ctx->i64)
132 return ctx->i64;
133 else
134 unreachable("Unhandled integer size");
135 }
136
137 LLVMTypeRef
138 ac_to_integer_type(struct ac_llvm_context *ctx, LLVMTypeRef t)
139 {
140 if (LLVMGetTypeKind(t) == LLVMVectorTypeKind) {
141 LLVMTypeRef elem_type = LLVMGetElementType(t);
142 return LLVMVectorType(to_integer_type_scalar(ctx, elem_type),
143 LLVMGetVectorSize(t));
144 }
145 return to_integer_type_scalar(ctx, t);
146 }
147
148 LLVMValueRef
149 ac_to_integer(struct ac_llvm_context *ctx, LLVMValueRef v)
150 {
151 LLVMTypeRef type = LLVMTypeOf(v);
152 return LLVMBuildBitCast(ctx->builder, v, ac_to_integer_type(ctx, type), "");
153 }
154
155 static LLVMTypeRef to_float_type_scalar(struct ac_llvm_context *ctx, LLVMTypeRef t)
156 {
157 if (t == ctx->i16 || t == ctx->f16)
158 return ctx->f16;
159 else if (t == ctx->i32 || t == ctx->f32)
160 return ctx->f32;
161 else if (t == ctx->i64 || t == ctx->f64)
162 return ctx->f64;
163 else
164 unreachable("Unhandled float size");
165 }
166
167 LLVMTypeRef
168 ac_to_float_type(struct ac_llvm_context *ctx, LLVMTypeRef t)
169 {
170 if (LLVMGetTypeKind(t) == LLVMVectorTypeKind) {
171 LLVMTypeRef elem_type = LLVMGetElementType(t);
172 return LLVMVectorType(to_float_type_scalar(ctx, elem_type),
173 LLVMGetVectorSize(t));
174 }
175 return to_float_type_scalar(ctx, t);
176 }
177
178 LLVMValueRef
179 ac_to_float(struct ac_llvm_context *ctx, LLVMValueRef v)
180 {
181 LLVMTypeRef type = LLVMTypeOf(v);
182 return LLVMBuildBitCast(ctx->builder, v, ac_to_float_type(ctx, type), "");
183 }
184
185
186 LLVMValueRef
187 ac_build_intrinsic(struct ac_llvm_context *ctx, const char *name,
188 LLVMTypeRef return_type, LLVMValueRef *params,
189 unsigned param_count, unsigned attrib_mask)
190 {
191 LLVMValueRef function, call;
192 bool set_callsite_attrs = HAVE_LLVM >= 0x0400 &&
193 !(attrib_mask & AC_FUNC_ATTR_LEGACY);
194
195 function = LLVMGetNamedFunction(ctx->module, name);
196 if (!function) {
197 LLVMTypeRef param_types[32], function_type;
198 unsigned i;
199
200 assert(param_count <= 32);
201
202 for (i = 0; i < param_count; ++i) {
203 assert(params[i]);
204 param_types[i] = LLVMTypeOf(params[i]);
205 }
206 function_type =
207 LLVMFunctionType(return_type, param_types, param_count, 0);
208 function = LLVMAddFunction(ctx->module, name, function_type);
209
210 LLVMSetFunctionCallConv(function, LLVMCCallConv);
211 LLVMSetLinkage(function, LLVMExternalLinkage);
212
213 if (!set_callsite_attrs)
214 ac_add_func_attributes(ctx->context, function, attrib_mask);
215 }
216
217 call = LLVMBuildCall(ctx->builder, function, params, param_count, "");
218 if (set_callsite_attrs)
219 ac_add_func_attributes(ctx->context, call, attrib_mask);
220 return call;
221 }
222
223 /**
224 * Given the i32 or vNi32 \p type, generate the textual name (e.g. for use with
225 * intrinsic names).
226 */
227 void ac_build_type_name_for_intr(LLVMTypeRef type, char *buf, unsigned bufsize)
228 {
229 LLVMTypeRef elem_type = type;
230
231 assert(bufsize >= 8);
232
233 if (LLVMGetTypeKind(type) == LLVMVectorTypeKind) {
234 int ret = snprintf(buf, bufsize, "v%u",
235 LLVMGetVectorSize(type));
236 if (ret < 0) {
237 char *type_name = LLVMPrintTypeToString(type);
238 fprintf(stderr, "Error building type name for: %s\n",
239 type_name);
240 return;
241 }
242 elem_type = LLVMGetElementType(type);
243 buf += ret;
244 bufsize -= ret;
245 }
246 switch (LLVMGetTypeKind(elem_type)) {
247 default: break;
248 case LLVMIntegerTypeKind:
249 snprintf(buf, bufsize, "i%d", LLVMGetIntTypeWidth(elem_type));
250 break;
251 case LLVMFloatTypeKind:
252 snprintf(buf, bufsize, "f32");
253 break;
254 case LLVMDoubleTypeKind:
255 snprintf(buf, bufsize, "f64");
256 break;
257 }
258 }
259
260 /**
261 * Helper function that builds an LLVM IR PHI node and immediately adds
262 * incoming edges.
263 */
264 LLVMValueRef
265 ac_build_phi(struct ac_llvm_context *ctx, LLVMTypeRef type,
266 unsigned count_incoming, LLVMValueRef *values,
267 LLVMBasicBlockRef *blocks)
268 {
269 LLVMValueRef phi = LLVMBuildPhi(ctx->builder, type, "");
270 LLVMAddIncoming(phi, values, blocks, count_incoming);
271 return phi;
272 }
273
274 /* Prevent optimizations (at least of memory accesses) across the current
275 * point in the program by emitting empty inline assembly that is marked as
276 * having side effects.
277 *
278 * Optionally, a value can be passed through the inline assembly to prevent
279 * LLVM from hoisting calls to ReadNone functions.
280 */
281 void
282 ac_build_optimization_barrier(struct ac_llvm_context *ctx,
283 LLVMValueRef *pvgpr)
284 {
285 static int counter = 0;
286
287 LLVMBuilderRef builder = ctx->builder;
288 char code[16];
289
290 snprintf(code, sizeof(code), "; %d", p_atomic_inc_return(&counter));
291
292 if (!pvgpr) {
293 LLVMTypeRef ftype = LLVMFunctionType(ctx->voidt, NULL, 0, false);
294 LLVMValueRef inlineasm = LLVMConstInlineAsm(ftype, code, "", true, false);
295 LLVMBuildCall(builder, inlineasm, NULL, 0, "");
296 } else {
297 LLVMTypeRef ftype = LLVMFunctionType(ctx->i32, &ctx->i32, 1, false);
298 LLVMValueRef inlineasm = LLVMConstInlineAsm(ftype, code, "=v,0", true, false);
299 LLVMValueRef vgpr = *pvgpr;
300 LLVMTypeRef vgpr_type = LLVMTypeOf(vgpr);
301 unsigned vgpr_size = ac_get_type_size(vgpr_type);
302 LLVMValueRef vgpr0;
303
304 assert(vgpr_size % 4 == 0);
305
306 vgpr = LLVMBuildBitCast(builder, vgpr, LLVMVectorType(ctx->i32, vgpr_size / 4), "");
307 vgpr0 = LLVMBuildExtractElement(builder, vgpr, ctx->i32_0, "");
308 vgpr0 = LLVMBuildCall(builder, inlineasm, &vgpr0, 1, "");
309 vgpr = LLVMBuildInsertElement(builder, vgpr, vgpr0, ctx->i32_0, "");
310 vgpr = LLVMBuildBitCast(builder, vgpr, vgpr_type, "");
311
312 *pvgpr = vgpr;
313 }
314 }
315
316 LLVMValueRef
317 ac_build_ballot(struct ac_llvm_context *ctx,
318 LLVMValueRef value)
319 {
320 LLVMValueRef args[3] = {
321 value,
322 ctx->i32_0,
323 LLVMConstInt(ctx->i32, LLVMIntNE, 0)
324 };
325
326 /* We currently have no other way to prevent LLVM from lifting the icmp
327 * calls to a dominating basic block.
328 */
329 ac_build_optimization_barrier(ctx, &args[0]);
330
331 if (LLVMTypeOf(args[0]) != ctx->i32)
332 args[0] = LLVMBuildBitCast(ctx->builder, args[0], ctx->i32, "");
333
334 return ac_build_intrinsic(ctx,
335 "llvm.amdgcn.icmp.i32",
336 ctx->i64, args, 3,
337 AC_FUNC_ATTR_NOUNWIND |
338 AC_FUNC_ATTR_READNONE |
339 AC_FUNC_ATTR_CONVERGENT);
340 }
341
342 LLVMValueRef
343 ac_build_vote_all(struct ac_llvm_context *ctx, LLVMValueRef value)
344 {
345 LLVMValueRef active_set = ac_build_ballot(ctx, ctx->i32_1);
346 LLVMValueRef vote_set = ac_build_ballot(ctx, value);
347 return LLVMBuildICmp(ctx->builder, LLVMIntEQ, vote_set, active_set, "");
348 }
349
350 LLVMValueRef
351 ac_build_vote_any(struct ac_llvm_context *ctx, LLVMValueRef value)
352 {
353 LLVMValueRef vote_set = ac_build_ballot(ctx, value);
354 return LLVMBuildICmp(ctx->builder, LLVMIntNE, vote_set,
355 LLVMConstInt(ctx->i64, 0, 0), "");
356 }
357
358 LLVMValueRef
359 ac_build_vote_eq(struct ac_llvm_context *ctx, LLVMValueRef value)
360 {
361 LLVMValueRef active_set = ac_build_ballot(ctx, ctx->i32_1);
362 LLVMValueRef vote_set = ac_build_ballot(ctx, value);
363
364 LLVMValueRef all = LLVMBuildICmp(ctx->builder, LLVMIntEQ,
365 vote_set, active_set, "");
366 LLVMValueRef none = LLVMBuildICmp(ctx->builder, LLVMIntEQ,
367 vote_set,
368 LLVMConstInt(ctx->i64, 0, 0), "");
369 return LLVMBuildOr(ctx->builder, all, none, "");
370 }
371
372 LLVMValueRef
373 ac_build_gather_values_extended(struct ac_llvm_context *ctx,
374 LLVMValueRef *values,
375 unsigned value_count,
376 unsigned value_stride,
377 bool load,
378 bool always_vector)
379 {
380 LLVMBuilderRef builder = ctx->builder;
381 LLVMValueRef vec = NULL;
382 unsigned i;
383
384 if (value_count == 1 && !always_vector) {
385 if (load)
386 return LLVMBuildLoad(builder, values[0], "");
387 return values[0];
388 } else if (!value_count)
389 unreachable("value_count is 0");
390
391 for (i = 0; i < value_count; i++) {
392 LLVMValueRef value = values[i * value_stride];
393 if (load)
394 value = LLVMBuildLoad(builder, value, "");
395
396 if (!i)
397 vec = LLVMGetUndef( LLVMVectorType(LLVMTypeOf(value), value_count));
398 LLVMValueRef index = LLVMConstInt(ctx->i32, i, false);
399 vec = LLVMBuildInsertElement(builder, vec, value, index, "");
400 }
401 return vec;
402 }
403
404 LLVMValueRef
405 ac_build_gather_values(struct ac_llvm_context *ctx,
406 LLVMValueRef *values,
407 unsigned value_count)
408 {
409 return ac_build_gather_values_extended(ctx, values, value_count, 1, false, false);
410 }
411
412 LLVMValueRef
413 ac_build_fdiv(struct ac_llvm_context *ctx,
414 LLVMValueRef num,
415 LLVMValueRef den)
416 {
417 LLVMValueRef ret = LLVMBuildFDiv(ctx->builder, num, den, "");
418
419 if (!LLVMIsConstant(ret))
420 LLVMSetMetadata(ret, ctx->fpmath_md_kind, ctx->fpmath_md_2p5_ulp);
421 return ret;
422 }
423
424 /* Coordinates for cube map selection. sc, tc, and ma are as in Table 8.27
425 * of the OpenGL 4.5 (Compatibility Profile) specification, except ma is
426 * already multiplied by two. id is the cube face number.
427 */
428 struct cube_selection_coords {
429 LLVMValueRef stc[2];
430 LLVMValueRef ma;
431 LLVMValueRef id;
432 };
433
434 static void
435 build_cube_intrinsic(struct ac_llvm_context *ctx,
436 LLVMValueRef in[3],
437 struct cube_selection_coords *out)
438 {
439 LLVMTypeRef f32 = ctx->f32;
440
441 out->stc[1] = ac_build_intrinsic(ctx, "llvm.amdgcn.cubetc",
442 f32, in, 3, AC_FUNC_ATTR_READNONE);
443 out->stc[0] = ac_build_intrinsic(ctx, "llvm.amdgcn.cubesc",
444 f32, in, 3, AC_FUNC_ATTR_READNONE);
445 out->ma = ac_build_intrinsic(ctx, "llvm.amdgcn.cubema",
446 f32, in, 3, AC_FUNC_ATTR_READNONE);
447 out->id = ac_build_intrinsic(ctx, "llvm.amdgcn.cubeid",
448 f32, in, 3, AC_FUNC_ATTR_READNONE);
449 }
450
451 /**
452 * Build a manual selection sequence for cube face sc/tc coordinates and
453 * major axis vector (multiplied by 2 for consistency) for the given
454 * vec3 \p coords, for the face implied by \p selcoords.
455 *
456 * For the major axis, we always adjust the sign to be in the direction of
457 * selcoords.ma; i.e., a positive out_ma means that coords is pointed towards
458 * the selcoords major axis.
459 */
460 static void build_cube_select(struct ac_llvm_context *ctx,
461 const struct cube_selection_coords *selcoords,
462 const LLVMValueRef *coords,
463 LLVMValueRef *out_st,
464 LLVMValueRef *out_ma)
465 {
466 LLVMBuilderRef builder = ctx->builder;
467 LLVMTypeRef f32 = LLVMTypeOf(coords[0]);
468 LLVMValueRef is_ma_positive;
469 LLVMValueRef sgn_ma;
470 LLVMValueRef is_ma_z, is_not_ma_z;
471 LLVMValueRef is_ma_y;
472 LLVMValueRef is_ma_x;
473 LLVMValueRef sgn;
474 LLVMValueRef tmp;
475
476 is_ma_positive = LLVMBuildFCmp(builder, LLVMRealUGE,
477 selcoords->ma, LLVMConstReal(f32, 0.0), "");
478 sgn_ma = LLVMBuildSelect(builder, is_ma_positive,
479 LLVMConstReal(f32, 1.0), LLVMConstReal(f32, -1.0), "");
480
481 is_ma_z = LLVMBuildFCmp(builder, LLVMRealUGE, selcoords->id, LLVMConstReal(f32, 4.0), "");
482 is_not_ma_z = LLVMBuildNot(builder, is_ma_z, "");
483 is_ma_y = LLVMBuildAnd(builder, is_not_ma_z,
484 LLVMBuildFCmp(builder, LLVMRealUGE, selcoords->id, LLVMConstReal(f32, 2.0), ""), "");
485 is_ma_x = LLVMBuildAnd(builder, is_not_ma_z, LLVMBuildNot(builder, is_ma_y, ""), "");
486
487 /* Select sc */
488 tmp = LLVMBuildSelect(builder, is_ma_x, coords[2], coords[0], "");
489 sgn = LLVMBuildSelect(builder, is_ma_y, LLVMConstReal(f32, 1.0),
490 LLVMBuildSelect(builder, is_ma_z, sgn_ma,
491 LLVMBuildFNeg(builder, sgn_ma, ""), ""), "");
492 out_st[0] = LLVMBuildFMul(builder, tmp, sgn, "");
493
494 /* Select tc */
495 tmp = LLVMBuildSelect(builder, is_ma_y, coords[2], coords[1], "");
496 sgn = LLVMBuildSelect(builder, is_ma_y, sgn_ma,
497 LLVMConstReal(f32, -1.0), "");
498 out_st[1] = LLVMBuildFMul(builder, tmp, sgn, "");
499
500 /* Select ma */
501 tmp = LLVMBuildSelect(builder, is_ma_z, coords[2],
502 LLVMBuildSelect(builder, is_ma_y, coords[1], coords[0], ""), "");
503 tmp = ac_build_intrinsic(ctx, "llvm.fabs.f32",
504 ctx->f32, &tmp, 1, AC_FUNC_ATTR_READNONE);
505 *out_ma = LLVMBuildFMul(builder, tmp, LLVMConstReal(f32, 2.0), "");
506 }
507
508 void
509 ac_prepare_cube_coords(struct ac_llvm_context *ctx,
510 bool is_deriv, bool is_array, bool is_lod,
511 LLVMValueRef *coords_arg,
512 LLVMValueRef *derivs_arg)
513 {
514
515 LLVMBuilderRef builder = ctx->builder;
516 struct cube_selection_coords selcoords;
517 LLVMValueRef coords[3];
518 LLVMValueRef invma;
519
520 if (is_array && !is_lod) {
521 LLVMValueRef tmp = coords_arg[3];
522 tmp = ac_build_intrinsic(ctx, "llvm.rint.f32", ctx->f32, &tmp, 1, 0);
523
524 /* Section 8.9 (Texture Functions) of the GLSL 4.50 spec says:
525 *
526 * "For Array forms, the array layer used will be
527 *
528 * max(0, min(d−1, floor(layer+0.5)))
529 *
530 * where d is the depth of the texture array and layer
531 * comes from the component indicated in the tables below.
532 * Workaroudn for an issue where the layer is taken from a
533 * helper invocation which happens to fall on a different
534 * layer due to extrapolation."
535 *
536 * VI and earlier attempt to implement this in hardware by
537 * clamping the value of coords[2] = (8 * layer) + face.
538 * Unfortunately, this means that the we end up with the wrong
539 * face when clamping occurs.
540 *
541 * Clamp the layer earlier to work around the issue.
542 */
543 if (ctx->chip_class <= VI) {
544 LLVMValueRef ge0;
545 ge0 = LLVMBuildFCmp(builder, LLVMRealOGE, tmp, ctx->f32_0, "");
546 tmp = LLVMBuildSelect(builder, ge0, tmp, ctx->f32_0, "");
547 }
548
549 coords_arg[3] = tmp;
550 }
551
552 build_cube_intrinsic(ctx, coords_arg, &selcoords);
553
554 invma = ac_build_intrinsic(ctx, "llvm.fabs.f32",
555 ctx->f32, &selcoords.ma, 1, AC_FUNC_ATTR_READNONE);
556 invma = ac_build_fdiv(ctx, LLVMConstReal(ctx->f32, 1.0), invma);
557
558 for (int i = 0; i < 2; ++i)
559 coords[i] = LLVMBuildFMul(builder, selcoords.stc[i], invma, "");
560
561 coords[2] = selcoords.id;
562
563 if (is_deriv && derivs_arg) {
564 LLVMValueRef derivs[4];
565 int axis;
566
567 /* Convert cube derivatives to 2D derivatives. */
568 for (axis = 0; axis < 2; axis++) {
569 LLVMValueRef deriv_st[2];
570 LLVMValueRef deriv_ma;
571
572 /* Transform the derivative alongside the texture
573 * coordinate. Mathematically, the correct formula is
574 * as follows. Assume we're projecting onto the +Z face
575 * and denote by dx/dh the derivative of the (original)
576 * X texture coordinate with respect to horizontal
577 * window coordinates. The projection onto the +Z face
578 * plane is:
579 *
580 * f(x,z) = x/z
581 *
582 * Then df/dh = df/dx * dx/dh + df/dz * dz/dh
583 * = 1/z * dx/dh - x/z * 1/z * dz/dh.
584 *
585 * This motivatives the implementation below.
586 *
587 * Whether this actually gives the expected results for
588 * apps that might feed in derivatives obtained via
589 * finite differences is anyone's guess. The OpenGL spec
590 * seems awfully quiet about how textureGrad for cube
591 * maps should be handled.
592 */
593 build_cube_select(ctx, &selcoords, &derivs_arg[axis * 3],
594 deriv_st, &deriv_ma);
595
596 deriv_ma = LLVMBuildFMul(builder, deriv_ma, invma, "");
597
598 for (int i = 0; i < 2; ++i)
599 derivs[axis * 2 + i] =
600 LLVMBuildFSub(builder,
601 LLVMBuildFMul(builder, deriv_st[i], invma, ""),
602 LLVMBuildFMul(builder, deriv_ma, coords[i], ""), "");
603 }
604
605 memcpy(derivs_arg, derivs, sizeof(derivs));
606 }
607
608 /* Shift the texture coordinate. This must be applied after the
609 * derivative calculation.
610 */
611 for (int i = 0; i < 2; ++i)
612 coords[i] = LLVMBuildFAdd(builder, coords[i], LLVMConstReal(ctx->f32, 1.5), "");
613
614 if (is_array) {
615 /* for cube arrays coord.z = coord.w(array_index) * 8 + face */
616 /* coords_arg.w component - array_index for cube arrays */
617 LLVMValueRef tmp = LLVMBuildFMul(ctx->builder, coords_arg[3], LLVMConstReal(ctx->f32, 8.0), "");
618 coords[2] = LLVMBuildFAdd(ctx->builder, tmp, coords[2], "");
619 }
620
621 memcpy(coords_arg, coords, sizeof(coords));
622 }
623
624
625 LLVMValueRef
626 ac_build_fs_interp(struct ac_llvm_context *ctx,
627 LLVMValueRef llvm_chan,
628 LLVMValueRef attr_number,
629 LLVMValueRef params,
630 LLVMValueRef i,
631 LLVMValueRef j)
632 {
633 LLVMValueRef args[5];
634 LLVMValueRef p1;
635
636 if (HAVE_LLVM < 0x0400) {
637 LLVMValueRef ij[2];
638 ij[0] = LLVMBuildBitCast(ctx->builder, i, ctx->i32, "");
639 ij[1] = LLVMBuildBitCast(ctx->builder, j, ctx->i32, "");
640
641 args[0] = llvm_chan;
642 args[1] = attr_number;
643 args[2] = params;
644 args[3] = ac_build_gather_values(ctx, ij, 2);
645 return ac_build_intrinsic(ctx, "llvm.SI.fs.interp",
646 ctx->f32, args, 4,
647 AC_FUNC_ATTR_READNONE);
648 }
649
650 args[0] = i;
651 args[1] = llvm_chan;
652 args[2] = attr_number;
653 args[3] = params;
654
655 p1 = ac_build_intrinsic(ctx, "llvm.amdgcn.interp.p1",
656 ctx->f32, args, 4, AC_FUNC_ATTR_READNONE);
657
658 args[0] = p1;
659 args[1] = j;
660 args[2] = llvm_chan;
661 args[3] = attr_number;
662 args[4] = params;
663
664 return ac_build_intrinsic(ctx, "llvm.amdgcn.interp.p2",
665 ctx->f32, args, 5, AC_FUNC_ATTR_READNONE);
666 }
667
668 LLVMValueRef
669 ac_build_fs_interp_mov(struct ac_llvm_context *ctx,
670 LLVMValueRef parameter,
671 LLVMValueRef llvm_chan,
672 LLVMValueRef attr_number,
673 LLVMValueRef params)
674 {
675 LLVMValueRef args[4];
676 if (HAVE_LLVM < 0x0400) {
677 args[0] = llvm_chan;
678 args[1] = attr_number;
679 args[2] = params;
680
681 return ac_build_intrinsic(ctx,
682 "llvm.SI.fs.constant",
683 ctx->f32, args, 3,
684 AC_FUNC_ATTR_READNONE);
685 }
686
687 args[0] = parameter;
688 args[1] = llvm_chan;
689 args[2] = attr_number;
690 args[3] = params;
691
692 return ac_build_intrinsic(ctx, "llvm.amdgcn.interp.mov",
693 ctx->f32, args, 4, AC_FUNC_ATTR_READNONE);
694 }
695
696 LLVMValueRef
697 ac_build_gep0(struct ac_llvm_context *ctx,
698 LLVMValueRef base_ptr,
699 LLVMValueRef index)
700 {
701 LLVMValueRef indices[2] = {
702 LLVMConstInt(ctx->i32, 0, 0),
703 index,
704 };
705 return LLVMBuildGEP(ctx->builder, base_ptr,
706 indices, 2, "");
707 }
708
709 void
710 ac_build_indexed_store(struct ac_llvm_context *ctx,
711 LLVMValueRef base_ptr, LLVMValueRef index,
712 LLVMValueRef value)
713 {
714 LLVMBuildStore(ctx->builder, value,
715 ac_build_gep0(ctx, base_ptr, index));
716 }
717
718 /**
719 * Build an LLVM bytecode indexed load using LLVMBuildGEP + LLVMBuildLoad.
720 * It's equivalent to doing a load from &base_ptr[index].
721 *
722 * \param base_ptr Where the array starts.
723 * \param index The element index into the array.
724 * \param uniform Whether the base_ptr and index can be assumed to be
725 * dynamically uniform (i.e. load to an SGPR)
726 * \param invariant Whether the load is invariant (no other opcodes affect it)
727 */
728 static LLVMValueRef
729 ac_build_load_custom(struct ac_llvm_context *ctx, LLVMValueRef base_ptr,
730 LLVMValueRef index, bool uniform, bool invariant)
731 {
732 LLVMValueRef pointer, result;
733
734 pointer = ac_build_gep0(ctx, base_ptr, index);
735 if (uniform)
736 LLVMSetMetadata(pointer, ctx->uniform_md_kind, ctx->empty_md);
737 result = LLVMBuildLoad(ctx->builder, pointer, "");
738 if (invariant)
739 LLVMSetMetadata(result, ctx->invariant_load_md_kind, ctx->empty_md);
740 return result;
741 }
742
743 LLVMValueRef ac_build_load(struct ac_llvm_context *ctx, LLVMValueRef base_ptr,
744 LLVMValueRef index)
745 {
746 return ac_build_load_custom(ctx, base_ptr, index, false, false);
747 }
748
749 LLVMValueRef ac_build_load_invariant(struct ac_llvm_context *ctx,
750 LLVMValueRef base_ptr, LLVMValueRef index)
751 {
752 return ac_build_load_custom(ctx, base_ptr, index, false, true);
753 }
754
755 LLVMValueRef ac_build_load_to_sgpr(struct ac_llvm_context *ctx,
756 LLVMValueRef base_ptr, LLVMValueRef index)
757 {
758 return ac_build_load_custom(ctx, base_ptr, index, true, true);
759 }
760
761 /* TBUFFER_STORE_FORMAT_{X,XY,XYZ,XYZW} <- the suffix is selected by num_channels=1..4.
762 * The type of vdata must be one of i32 (num_channels=1), v2i32 (num_channels=2),
763 * or v4i32 (num_channels=3,4).
764 */
765 void
766 ac_build_buffer_store_dword(struct ac_llvm_context *ctx,
767 LLVMValueRef rsrc,
768 LLVMValueRef vdata,
769 unsigned num_channels,
770 LLVMValueRef voffset,
771 LLVMValueRef soffset,
772 unsigned inst_offset,
773 bool glc,
774 bool slc,
775 bool writeonly_memory,
776 bool swizzle_enable_hint)
777 {
778 /* SWIZZLE_ENABLE requires that soffset isn't folded into voffset
779 * (voffset is swizzled, but soffset isn't swizzled).
780 * llvm.amdgcn.buffer.store doesn't have a separate soffset parameter.
781 */
782 if (!swizzle_enable_hint) {
783 /* Split 3 channel stores, becase LLVM doesn't support 3-channel
784 * intrinsics. */
785 if (num_channels == 3) {
786 LLVMValueRef v[3], v01;
787
788 for (int i = 0; i < 3; i++) {
789 v[i] = LLVMBuildExtractElement(ctx->builder, vdata,
790 LLVMConstInt(ctx->i32, i, 0), "");
791 }
792 v01 = ac_build_gather_values(ctx, v, 2);
793
794 ac_build_buffer_store_dword(ctx, rsrc, v01, 2, voffset,
795 soffset, inst_offset, glc, slc,
796 writeonly_memory, swizzle_enable_hint);
797 ac_build_buffer_store_dword(ctx, rsrc, v[2], 1, voffset,
798 soffset, inst_offset + 8,
799 glc, slc,
800 writeonly_memory, swizzle_enable_hint);
801 return;
802 }
803
804 unsigned func = CLAMP(num_channels, 1, 3) - 1;
805 static const char *types[] = {"f32", "v2f32", "v4f32"};
806 char name[256];
807 LLVMValueRef offset = soffset;
808
809 if (inst_offset)
810 offset = LLVMBuildAdd(ctx->builder, offset,
811 LLVMConstInt(ctx->i32, inst_offset, 0), "");
812 if (voffset)
813 offset = LLVMBuildAdd(ctx->builder, offset, voffset, "");
814
815 LLVMValueRef args[] = {
816 ac_to_float(ctx, vdata),
817 LLVMBuildBitCast(ctx->builder, rsrc, ctx->v4i32, ""),
818 LLVMConstInt(ctx->i32, 0, 0),
819 offset,
820 LLVMConstInt(ctx->i1, glc, 0),
821 LLVMConstInt(ctx->i1, slc, 0),
822 };
823
824 snprintf(name, sizeof(name), "llvm.amdgcn.buffer.store.%s",
825 types[func]);
826
827 ac_build_intrinsic(ctx, name, ctx->voidt,
828 args, ARRAY_SIZE(args),
829 writeonly_memory ?
830 AC_FUNC_ATTR_INACCESSIBLE_MEM_ONLY :
831 AC_FUNC_ATTR_WRITEONLY);
832 return;
833 }
834
835 static unsigned dfmt[] = {
836 V_008F0C_BUF_DATA_FORMAT_32,
837 V_008F0C_BUF_DATA_FORMAT_32_32,
838 V_008F0C_BUF_DATA_FORMAT_32_32_32,
839 V_008F0C_BUF_DATA_FORMAT_32_32_32_32
840 };
841 assert(num_channels >= 1 && num_channels <= 4);
842
843 LLVMValueRef args[] = {
844 rsrc,
845 vdata,
846 LLVMConstInt(ctx->i32, num_channels, 0),
847 voffset ? voffset : LLVMGetUndef(ctx->i32),
848 soffset,
849 LLVMConstInt(ctx->i32, inst_offset, 0),
850 LLVMConstInt(ctx->i32, dfmt[num_channels - 1], 0),
851 LLVMConstInt(ctx->i32, V_008F0C_BUF_NUM_FORMAT_UINT, 0),
852 LLVMConstInt(ctx->i32, voffset != NULL, 0),
853 LLVMConstInt(ctx->i32, 0, 0), /* idxen */
854 LLVMConstInt(ctx->i32, glc, 0),
855 LLVMConstInt(ctx->i32, slc, 0),
856 LLVMConstInt(ctx->i32, 0, 0), /* tfe*/
857 };
858
859 /* The instruction offset field has 12 bits */
860 assert(voffset || inst_offset < (1 << 12));
861
862 /* The intrinsic is overloaded, we need to add a type suffix for overloading to work. */
863 unsigned func = CLAMP(num_channels, 1, 3) - 1;
864 const char *types[] = {"i32", "v2i32", "v4i32"};
865 char name[256];
866 snprintf(name, sizeof(name), "llvm.SI.tbuffer.store.%s", types[func]);
867
868 ac_build_intrinsic(ctx, name, ctx->voidt,
869 args, ARRAY_SIZE(args),
870 AC_FUNC_ATTR_LEGACY);
871 }
872
873 LLVMValueRef
874 ac_build_buffer_load(struct ac_llvm_context *ctx,
875 LLVMValueRef rsrc,
876 int num_channels,
877 LLVMValueRef vindex,
878 LLVMValueRef voffset,
879 LLVMValueRef soffset,
880 unsigned inst_offset,
881 unsigned glc,
882 unsigned slc,
883 bool can_speculate,
884 bool allow_smem)
885 {
886 LLVMValueRef offset = LLVMConstInt(ctx->i32, inst_offset, 0);
887 if (voffset)
888 offset = LLVMBuildAdd(ctx->builder, offset, voffset, "");
889 if (soffset)
890 offset = LLVMBuildAdd(ctx->builder, offset, soffset, "");
891
892 /* TODO: VI and later generations can use SMEM with GLC=1.*/
893 if (allow_smem && !glc && !slc) {
894 assert(vindex == NULL);
895
896 LLVMValueRef result[4];
897
898 for (int i = 0; i < num_channels; i++) {
899 if (i) {
900 offset = LLVMBuildAdd(ctx->builder, offset,
901 LLVMConstInt(ctx->i32, 4, 0), "");
902 }
903 LLVMValueRef args[2] = {rsrc, offset};
904 result[i] = ac_build_intrinsic(ctx, "llvm.SI.load.const.v4i32",
905 ctx->f32, args, 2,
906 AC_FUNC_ATTR_READNONE |
907 AC_FUNC_ATTR_LEGACY);
908 }
909 if (num_channels == 1)
910 return result[0];
911
912 if (num_channels == 3)
913 result[num_channels++] = LLVMGetUndef(ctx->f32);
914 return ac_build_gather_values(ctx, result, num_channels);
915 }
916
917 unsigned func = CLAMP(num_channels, 1, 3) - 1;
918
919 LLVMValueRef args[] = {
920 LLVMBuildBitCast(ctx->builder, rsrc, ctx->v4i32, ""),
921 vindex ? vindex : LLVMConstInt(ctx->i32, 0, 0),
922 offset,
923 LLVMConstInt(ctx->i1, glc, 0),
924 LLVMConstInt(ctx->i1, slc, 0)
925 };
926
927 LLVMTypeRef types[] = {ctx->f32, LLVMVectorType(ctx->f32, 2),
928 ctx->v4f32};
929 const char *type_names[] = {"f32", "v2f32", "v4f32"};
930 char name[256];
931
932 snprintf(name, sizeof(name), "llvm.amdgcn.buffer.load.%s",
933 type_names[func]);
934
935 return ac_build_intrinsic(ctx, name, types[func], args,
936 ARRAY_SIZE(args),
937 /* READNONE means writes can't affect it, while
938 * READONLY means that writes can affect it. */
939 can_speculate && HAVE_LLVM >= 0x0400 ?
940 AC_FUNC_ATTR_READNONE :
941 AC_FUNC_ATTR_READONLY);
942 }
943
944 LLVMValueRef ac_build_buffer_load_format(struct ac_llvm_context *ctx,
945 LLVMValueRef rsrc,
946 LLVMValueRef vindex,
947 LLVMValueRef voffset,
948 bool can_speculate)
949 {
950 LLVMValueRef args [] = {
951 LLVMBuildBitCast(ctx->builder, rsrc, ctx->v4i32, ""),
952 vindex,
953 voffset,
954 ctx->i1false, /* glc */
955 ctx->i1false, /* slc */
956 };
957
958 return ac_build_intrinsic(ctx,
959 "llvm.amdgcn.buffer.load.format.v4f32",
960 ctx->v4f32, args, ARRAY_SIZE(args),
961 /* READNONE means writes can't affect it, while
962 * READONLY means that writes can affect it. */
963 can_speculate && HAVE_LLVM >= 0x0400 ?
964 AC_FUNC_ATTR_READNONE :
965 AC_FUNC_ATTR_READONLY);
966 }
967
968 /**
969 * Set range metadata on an instruction. This can only be used on load and
970 * call instructions. If you know an instruction can only produce the values
971 * 0, 1, 2, you would do set_range_metadata(value, 0, 3);
972 * \p lo is the minimum value inclusive.
973 * \p hi is the maximum value exclusive.
974 */
975 static void set_range_metadata(struct ac_llvm_context *ctx,
976 LLVMValueRef value, unsigned lo, unsigned hi)
977 {
978 LLVMValueRef range_md, md_args[2];
979 LLVMTypeRef type = LLVMTypeOf(value);
980 LLVMContextRef context = LLVMGetTypeContext(type);
981
982 md_args[0] = LLVMConstInt(type, lo, false);
983 md_args[1] = LLVMConstInt(type, hi, false);
984 range_md = LLVMMDNodeInContext(context, md_args, 2);
985 LLVMSetMetadata(value, ctx->range_md_kind, range_md);
986 }
987
988 LLVMValueRef
989 ac_get_thread_id(struct ac_llvm_context *ctx)
990 {
991 LLVMValueRef tid;
992
993 LLVMValueRef tid_args[2];
994 tid_args[0] = LLVMConstInt(ctx->i32, 0xffffffff, false);
995 tid_args[1] = LLVMConstInt(ctx->i32, 0, false);
996 tid_args[1] = ac_build_intrinsic(ctx,
997 "llvm.amdgcn.mbcnt.lo", ctx->i32,
998 tid_args, 2, AC_FUNC_ATTR_READNONE);
999
1000 tid = ac_build_intrinsic(ctx, "llvm.amdgcn.mbcnt.hi",
1001 ctx->i32, tid_args,
1002 2, AC_FUNC_ATTR_READNONE);
1003 set_range_metadata(ctx, tid, 0, 64);
1004 return tid;
1005 }
1006
1007 /*
1008 * SI implements derivatives using the local data store (LDS)
1009 * All writes to the LDS happen in all executing threads at
1010 * the same time. TID is the Thread ID for the current
1011 * thread and is a value between 0 and 63, representing
1012 * the thread's position in the wavefront.
1013 *
1014 * For the pixel shader threads are grouped into quads of four pixels.
1015 * The TIDs of the pixels of a quad are:
1016 *
1017 * +------+------+
1018 * |4n + 0|4n + 1|
1019 * +------+------+
1020 * |4n + 2|4n + 3|
1021 * +------+------+
1022 *
1023 * So, masking the TID with 0xfffffffc yields the TID of the top left pixel
1024 * of the quad, masking with 0xfffffffd yields the TID of the top pixel of
1025 * the current pixel's column, and masking with 0xfffffffe yields the TID
1026 * of the left pixel of the current pixel's row.
1027 *
1028 * Adding 1 yields the TID of the pixel to the right of the left pixel, and
1029 * adding 2 yields the TID of the pixel below the top pixel.
1030 */
1031 LLVMValueRef
1032 ac_build_ddxy(struct ac_llvm_context *ctx,
1033 uint32_t mask,
1034 int idx,
1035 LLVMValueRef val)
1036 {
1037 LLVMValueRef tl, trbl, args[2];
1038 LLVMValueRef result;
1039
1040 if (ctx->chip_class >= VI) {
1041 LLVMValueRef thread_id, tl_tid, trbl_tid;
1042 thread_id = ac_get_thread_id(ctx);
1043
1044 tl_tid = LLVMBuildAnd(ctx->builder, thread_id,
1045 LLVMConstInt(ctx->i32, mask, false), "");
1046
1047 trbl_tid = LLVMBuildAdd(ctx->builder, tl_tid,
1048 LLVMConstInt(ctx->i32, idx, false), "");
1049
1050 args[0] = LLVMBuildMul(ctx->builder, tl_tid,
1051 LLVMConstInt(ctx->i32, 4, false), "");
1052 args[1] = val;
1053 tl = ac_build_intrinsic(ctx,
1054 "llvm.amdgcn.ds.bpermute", ctx->i32,
1055 args, 2,
1056 AC_FUNC_ATTR_READNONE |
1057 AC_FUNC_ATTR_CONVERGENT);
1058
1059 args[0] = LLVMBuildMul(ctx->builder, trbl_tid,
1060 LLVMConstInt(ctx->i32, 4, false), "");
1061 trbl = ac_build_intrinsic(ctx,
1062 "llvm.amdgcn.ds.bpermute", ctx->i32,
1063 args, 2,
1064 AC_FUNC_ATTR_READNONE |
1065 AC_FUNC_ATTR_CONVERGENT);
1066 } else {
1067 uint32_t masks[2] = {};
1068
1069 switch (mask) {
1070 case AC_TID_MASK_TOP_LEFT:
1071 masks[0] = 0x8000;
1072 if (idx == 1)
1073 masks[1] = 0x8055;
1074 else
1075 masks[1] = 0x80aa;
1076
1077 break;
1078 case AC_TID_MASK_TOP:
1079 masks[0] = 0x8044;
1080 masks[1] = 0x80ee;
1081 break;
1082 case AC_TID_MASK_LEFT:
1083 masks[0] = 0x80a0;
1084 masks[1] = 0x80f5;
1085 break;
1086 default:
1087 assert(0);
1088 }
1089
1090 args[0] = val;
1091 args[1] = LLVMConstInt(ctx->i32, masks[0], false);
1092
1093 tl = ac_build_intrinsic(ctx,
1094 "llvm.amdgcn.ds.swizzle", ctx->i32,
1095 args, 2,
1096 AC_FUNC_ATTR_READNONE |
1097 AC_FUNC_ATTR_CONVERGENT);
1098
1099 args[1] = LLVMConstInt(ctx->i32, masks[1], false);
1100 trbl = ac_build_intrinsic(ctx,
1101 "llvm.amdgcn.ds.swizzle", ctx->i32,
1102 args, 2,
1103 AC_FUNC_ATTR_READNONE |
1104 AC_FUNC_ATTR_CONVERGENT);
1105 }
1106
1107 tl = LLVMBuildBitCast(ctx->builder, tl, ctx->f32, "");
1108 trbl = LLVMBuildBitCast(ctx->builder, trbl, ctx->f32, "");
1109 result = LLVMBuildFSub(ctx->builder, trbl, tl, "");
1110 return result;
1111 }
1112
1113 void
1114 ac_build_sendmsg(struct ac_llvm_context *ctx,
1115 uint32_t msg,
1116 LLVMValueRef wave_id)
1117 {
1118 LLVMValueRef args[2];
1119 const char *intr_name = (HAVE_LLVM < 0x0400) ? "llvm.SI.sendmsg" : "llvm.amdgcn.s.sendmsg";
1120 args[0] = LLVMConstInt(ctx->i32, msg, false);
1121 args[1] = wave_id;
1122 ac_build_intrinsic(ctx, intr_name, ctx->voidt, args, 2, 0);
1123 }
1124
1125 LLVMValueRef
1126 ac_build_imsb(struct ac_llvm_context *ctx,
1127 LLVMValueRef arg,
1128 LLVMTypeRef dst_type)
1129 {
1130 const char *intr_name = (HAVE_LLVM < 0x0400) ? "llvm.AMDGPU.flbit.i32" :
1131 "llvm.amdgcn.sffbh.i32";
1132 LLVMValueRef msb = ac_build_intrinsic(ctx, intr_name,
1133 dst_type, &arg, 1,
1134 AC_FUNC_ATTR_READNONE);
1135
1136 /* The HW returns the last bit index from MSB, but NIR/TGSI wants
1137 * the index from LSB. Invert it by doing "31 - msb". */
1138 msb = LLVMBuildSub(ctx->builder, LLVMConstInt(ctx->i32, 31, false),
1139 msb, "");
1140
1141 LLVMValueRef all_ones = LLVMConstInt(ctx->i32, -1, true);
1142 LLVMValueRef cond = LLVMBuildOr(ctx->builder,
1143 LLVMBuildICmp(ctx->builder, LLVMIntEQ,
1144 arg, LLVMConstInt(ctx->i32, 0, 0), ""),
1145 LLVMBuildICmp(ctx->builder, LLVMIntEQ,
1146 arg, all_ones, ""), "");
1147
1148 return LLVMBuildSelect(ctx->builder, cond, all_ones, msb, "");
1149 }
1150
1151 LLVMValueRef
1152 ac_build_umsb(struct ac_llvm_context *ctx,
1153 LLVMValueRef arg,
1154 LLVMTypeRef dst_type)
1155 {
1156 LLVMValueRef args[2] = {
1157 arg,
1158 ctx->i1true,
1159 };
1160 LLVMValueRef msb = ac_build_intrinsic(ctx, "llvm.ctlz.i32",
1161 dst_type, args, ARRAY_SIZE(args),
1162 AC_FUNC_ATTR_READNONE);
1163
1164 /* The HW returns the last bit index from MSB, but TGSI/NIR wants
1165 * the index from LSB. Invert it by doing "31 - msb". */
1166 msb = LLVMBuildSub(ctx->builder, LLVMConstInt(ctx->i32, 31, false),
1167 msb, "");
1168
1169 /* check for zero */
1170 return LLVMBuildSelect(ctx->builder,
1171 LLVMBuildICmp(ctx->builder, LLVMIntEQ, arg,
1172 LLVMConstInt(ctx->i32, 0, 0), ""),
1173 LLVMConstInt(ctx->i32, -1, true), msb, "");
1174 }
1175
1176 LLVMValueRef ac_build_umin(struct ac_llvm_context *ctx, LLVMValueRef a,
1177 LLVMValueRef b)
1178 {
1179 LLVMValueRef cmp = LLVMBuildICmp(ctx->builder, LLVMIntULE, a, b, "");
1180 return LLVMBuildSelect(ctx->builder, cmp, a, b, "");
1181 }
1182
1183 LLVMValueRef ac_build_clamp(struct ac_llvm_context *ctx, LLVMValueRef value)
1184 {
1185 if (HAVE_LLVM >= 0x0500) {
1186 LLVMValueRef max[2] = {
1187 value,
1188 LLVMConstReal(ctx->f32, 0),
1189 };
1190 LLVMValueRef min[2] = {
1191 LLVMConstReal(ctx->f32, 1),
1192 };
1193
1194 min[1] = ac_build_intrinsic(ctx, "llvm.maxnum.f32",
1195 ctx->f32, max, 2,
1196 AC_FUNC_ATTR_READNONE);
1197 return ac_build_intrinsic(ctx, "llvm.minnum.f32",
1198 ctx->f32, min, 2,
1199 AC_FUNC_ATTR_READNONE);
1200 }
1201
1202 LLVMValueRef args[3] = {
1203 value,
1204 LLVMConstReal(ctx->f32, 0),
1205 LLVMConstReal(ctx->f32, 1),
1206 };
1207
1208 return ac_build_intrinsic(ctx, "llvm.AMDGPU.clamp.", ctx->f32, args, 3,
1209 AC_FUNC_ATTR_READNONE |
1210 AC_FUNC_ATTR_LEGACY);
1211 }
1212
1213 void ac_build_export(struct ac_llvm_context *ctx, struct ac_export_args *a)
1214 {
1215 LLVMValueRef args[9];
1216
1217 if (HAVE_LLVM >= 0x0500) {
1218 args[0] = LLVMConstInt(ctx->i32, a->target, 0);
1219 args[1] = LLVMConstInt(ctx->i32, a->enabled_channels, 0);
1220
1221 if (a->compr) {
1222 LLVMTypeRef i16 = LLVMInt16TypeInContext(ctx->context);
1223 LLVMTypeRef v2i16 = LLVMVectorType(i16, 2);
1224
1225 args[2] = LLVMBuildBitCast(ctx->builder, a->out[0],
1226 v2i16, "");
1227 args[3] = LLVMBuildBitCast(ctx->builder, a->out[1],
1228 v2i16, "");
1229 args[4] = LLVMConstInt(ctx->i1, a->done, 0);
1230 args[5] = LLVMConstInt(ctx->i1, a->valid_mask, 0);
1231
1232 ac_build_intrinsic(ctx, "llvm.amdgcn.exp.compr.v2i16",
1233 ctx->voidt, args, 6, 0);
1234 } else {
1235 args[2] = a->out[0];
1236 args[3] = a->out[1];
1237 args[4] = a->out[2];
1238 args[5] = a->out[3];
1239 args[6] = LLVMConstInt(ctx->i1, a->done, 0);
1240 args[7] = LLVMConstInt(ctx->i1, a->valid_mask, 0);
1241
1242 ac_build_intrinsic(ctx, "llvm.amdgcn.exp.f32",
1243 ctx->voidt, args, 8, 0);
1244 }
1245 return;
1246 }
1247
1248 args[0] = LLVMConstInt(ctx->i32, a->enabled_channels, 0);
1249 args[1] = LLVMConstInt(ctx->i32, a->valid_mask, 0);
1250 args[2] = LLVMConstInt(ctx->i32, a->done, 0);
1251 args[3] = LLVMConstInt(ctx->i32, a->target, 0);
1252 args[4] = LLVMConstInt(ctx->i32, a->compr, 0);
1253 memcpy(args + 5, a->out, sizeof(a->out[0]) * 4);
1254
1255 ac_build_intrinsic(ctx, "llvm.SI.export", ctx->voidt, args, 9,
1256 AC_FUNC_ATTR_LEGACY);
1257 }
1258
1259 LLVMValueRef ac_build_image_opcode(struct ac_llvm_context *ctx,
1260 struct ac_image_args *a)
1261 {
1262 LLVMTypeRef dst_type;
1263 LLVMValueRef args[11];
1264 unsigned num_args = 0;
1265 const char *name = NULL;
1266 char intr_name[128], type[64];
1267
1268 if (HAVE_LLVM >= 0x0400) {
1269 bool sample = a->opcode == ac_image_sample ||
1270 a->opcode == ac_image_gather4 ||
1271 a->opcode == ac_image_get_lod;
1272
1273 if (sample)
1274 args[num_args++] = ac_to_float(ctx, a->addr);
1275 else
1276 args[num_args++] = a->addr;
1277
1278 args[num_args++] = a->resource;
1279 if (sample)
1280 args[num_args++] = a->sampler;
1281 args[num_args++] = LLVMConstInt(ctx->i32, a->dmask, 0);
1282 if (sample)
1283 args[num_args++] = LLVMConstInt(ctx->i1, a->unorm, 0);
1284 args[num_args++] = ctx->i1false; /* glc */
1285 args[num_args++] = ctx->i1false; /* slc */
1286 args[num_args++] = ctx->i1false; /* lwe */
1287 args[num_args++] = LLVMConstInt(ctx->i1, a->da, 0);
1288
1289 switch (a->opcode) {
1290 case ac_image_sample:
1291 name = "llvm.amdgcn.image.sample";
1292 break;
1293 case ac_image_gather4:
1294 name = "llvm.amdgcn.image.gather4";
1295 break;
1296 case ac_image_load:
1297 name = "llvm.amdgcn.image.load";
1298 break;
1299 case ac_image_load_mip:
1300 name = "llvm.amdgcn.image.load.mip";
1301 break;
1302 case ac_image_get_lod:
1303 name = "llvm.amdgcn.image.getlod";
1304 break;
1305 case ac_image_get_resinfo:
1306 name = "llvm.amdgcn.image.getresinfo";
1307 break;
1308 default:
1309 unreachable("invalid image opcode");
1310 }
1311
1312 ac_build_type_name_for_intr(LLVMTypeOf(args[0]), type,
1313 sizeof(type));
1314
1315 snprintf(intr_name, sizeof(intr_name), "%s%s%s%s.v4f32.%s.v8i32",
1316 name,
1317 a->compare ? ".c" : "",
1318 a->bias ? ".b" :
1319 a->lod ? ".l" :
1320 a->deriv ? ".d" :
1321 a->level_zero ? ".lz" : "",
1322 a->offset ? ".o" : "",
1323 type);
1324
1325 LLVMValueRef result =
1326 ac_build_intrinsic(ctx, intr_name,
1327 ctx->v4f32, args, num_args,
1328 AC_FUNC_ATTR_READNONE);
1329 if (!sample) {
1330 result = LLVMBuildBitCast(ctx->builder, result,
1331 ctx->v4i32, "");
1332 }
1333 return result;
1334 }
1335
1336 args[num_args++] = a->addr;
1337 args[num_args++] = a->resource;
1338
1339 if (a->opcode == ac_image_load ||
1340 a->opcode == ac_image_load_mip ||
1341 a->opcode == ac_image_get_resinfo) {
1342 dst_type = ctx->v4i32;
1343 } else {
1344 dst_type = ctx->v4f32;
1345 args[num_args++] = a->sampler;
1346 }
1347
1348 args[num_args++] = LLVMConstInt(ctx->i32, a->dmask, 0);
1349 args[num_args++] = LLVMConstInt(ctx->i32, a->unorm, 0);
1350 args[num_args++] = LLVMConstInt(ctx->i32, 0, 0); /* r128 */
1351 args[num_args++] = LLVMConstInt(ctx->i32, a->da, 0);
1352 args[num_args++] = LLVMConstInt(ctx->i32, 0, 0); /* glc */
1353 args[num_args++] = LLVMConstInt(ctx->i32, 0, 0); /* slc */
1354 args[num_args++] = LLVMConstInt(ctx->i32, 0, 0); /* tfe */
1355 args[num_args++] = LLVMConstInt(ctx->i32, 0, 0); /* lwe */
1356
1357 switch (a->opcode) {
1358 case ac_image_sample:
1359 name = "llvm.SI.image.sample";
1360 break;
1361 case ac_image_gather4:
1362 name = "llvm.SI.gather4";
1363 break;
1364 case ac_image_load:
1365 name = "llvm.SI.image.load";
1366 break;
1367 case ac_image_load_mip:
1368 name = "llvm.SI.image.load.mip";
1369 break;
1370 case ac_image_get_lod:
1371 name = "llvm.SI.getlod";
1372 break;
1373 case ac_image_get_resinfo:
1374 name = "llvm.SI.getresinfo";
1375 break;
1376 }
1377
1378 ac_build_type_name_for_intr(LLVMTypeOf(a->addr), type, sizeof(type));
1379 snprintf(intr_name, sizeof(intr_name), "%s%s%s%s.%s",
1380 name,
1381 a->compare ? ".c" : "",
1382 a->bias ? ".b" :
1383 a->lod ? ".l" :
1384 a->deriv ? ".d" :
1385 a->level_zero ? ".lz" : "",
1386 a->offset ? ".o" : "",
1387 type);
1388
1389 return ac_build_intrinsic(ctx, intr_name,
1390 dst_type, args, num_args,
1391 AC_FUNC_ATTR_READNONE |
1392 AC_FUNC_ATTR_LEGACY);
1393 }
1394
1395 LLVMValueRef ac_build_cvt_pkrtz_f16(struct ac_llvm_context *ctx,
1396 LLVMValueRef args[2])
1397 {
1398 if (HAVE_LLVM >= 0x0500) {
1399 LLVMTypeRef v2f16 =
1400 LLVMVectorType(LLVMHalfTypeInContext(ctx->context), 2);
1401 LLVMValueRef res =
1402 ac_build_intrinsic(ctx, "llvm.amdgcn.cvt.pkrtz",
1403 v2f16, args, 2,
1404 AC_FUNC_ATTR_READNONE);
1405 return LLVMBuildBitCast(ctx->builder, res, ctx->i32, "");
1406 }
1407
1408 return ac_build_intrinsic(ctx, "llvm.SI.packf16", ctx->i32, args, 2,
1409 AC_FUNC_ATTR_READNONE |
1410 AC_FUNC_ATTR_LEGACY);
1411 }
1412
1413 LLVMValueRef ac_build_wqm_vote(struct ac_llvm_context *ctx, LLVMValueRef i1)
1414 {
1415 assert(HAVE_LLVM >= 0x0600);
1416 return ac_build_intrinsic(ctx, "llvm.amdgcn.wqm.vote", ctx->i1,
1417 &i1, 1, AC_FUNC_ATTR_READNONE);
1418 }
1419
1420 void ac_build_kill_if_false(struct ac_llvm_context *ctx, LLVMValueRef i1)
1421 {
1422 if (HAVE_LLVM >= 0x0600) {
1423 ac_build_intrinsic(ctx, "llvm.amdgcn.kill", ctx->voidt,
1424 &i1, 1, 0);
1425 return;
1426 }
1427
1428 LLVMValueRef value = LLVMBuildSelect(ctx->builder, i1,
1429 LLVMConstReal(ctx->f32, 1),
1430 LLVMConstReal(ctx->f32, -1), "");
1431 ac_build_intrinsic(ctx, "llvm.AMDGPU.kill", ctx->voidt,
1432 &value, 1, AC_FUNC_ATTR_LEGACY);
1433 }
1434
1435 LLVMValueRef ac_build_bfe(struct ac_llvm_context *ctx, LLVMValueRef input,
1436 LLVMValueRef offset, LLVMValueRef width,
1437 bool is_signed)
1438 {
1439 LLVMValueRef args[] = {
1440 input,
1441 offset,
1442 width,
1443 };
1444
1445 if (HAVE_LLVM >= 0x0500) {
1446 return ac_build_intrinsic(ctx,
1447 is_signed ? "llvm.amdgcn.sbfe.i32" :
1448 "llvm.amdgcn.ubfe.i32",
1449 ctx->i32, args, 3,
1450 AC_FUNC_ATTR_READNONE);
1451 }
1452
1453 return ac_build_intrinsic(ctx,
1454 is_signed ? "llvm.AMDGPU.bfe.i32" :
1455 "llvm.AMDGPU.bfe.u32",
1456 ctx->i32, args, 3,
1457 AC_FUNC_ATTR_READNONE |
1458 AC_FUNC_ATTR_LEGACY);
1459 }
1460
1461 void ac_get_image_intr_name(const char *base_name,
1462 LLVMTypeRef data_type,
1463 LLVMTypeRef coords_type,
1464 LLVMTypeRef rsrc_type,
1465 char *out_name, unsigned out_len)
1466 {
1467 char coords_type_name[8];
1468
1469 ac_build_type_name_for_intr(coords_type, coords_type_name,
1470 sizeof(coords_type_name));
1471
1472 if (HAVE_LLVM <= 0x0309) {
1473 snprintf(out_name, out_len, "%s.%s", base_name, coords_type_name);
1474 } else {
1475 char data_type_name[8];
1476 char rsrc_type_name[8];
1477
1478 ac_build_type_name_for_intr(data_type, data_type_name,
1479 sizeof(data_type_name));
1480 ac_build_type_name_for_intr(rsrc_type, rsrc_type_name,
1481 sizeof(rsrc_type_name));
1482 snprintf(out_name, out_len, "%s.%s.%s.%s", base_name,
1483 data_type_name, coords_type_name, rsrc_type_name);
1484 }
1485 }
1486
1487 #define AC_EXP_TARGET (HAVE_LLVM >= 0x0500 ? 0 : 3)
1488 #define AC_EXP_OUT0 (HAVE_LLVM >= 0x0500 ? 2 : 5)
1489
1490 enum ac_ir_type {
1491 AC_IR_UNDEF,
1492 AC_IR_CONST,
1493 AC_IR_VALUE,
1494 };
1495
1496 struct ac_vs_exp_chan
1497 {
1498 LLVMValueRef value;
1499 float const_float;
1500 enum ac_ir_type type;
1501 };
1502
1503 struct ac_vs_exp_inst {
1504 unsigned offset;
1505 LLVMValueRef inst;
1506 struct ac_vs_exp_chan chan[4];
1507 };
1508
1509 struct ac_vs_exports {
1510 unsigned num;
1511 struct ac_vs_exp_inst exp[VARYING_SLOT_MAX];
1512 };
1513
1514 /* Return true if the PARAM export has been eliminated. */
1515 static bool ac_eliminate_const_output(uint8_t *vs_output_param_offset,
1516 uint32_t num_outputs,
1517 struct ac_vs_exp_inst *exp)
1518 {
1519 unsigned i, default_val; /* SPI_PS_INPUT_CNTL_i.DEFAULT_VAL */
1520 bool is_zero[4] = {}, is_one[4] = {};
1521
1522 for (i = 0; i < 4; i++) {
1523 /* It's a constant expression. Undef outputs are eliminated too. */
1524 if (exp->chan[i].type == AC_IR_UNDEF) {
1525 is_zero[i] = true;
1526 is_one[i] = true;
1527 } else if (exp->chan[i].type == AC_IR_CONST) {
1528 if (exp->chan[i].const_float == 0)
1529 is_zero[i] = true;
1530 else if (exp->chan[i].const_float == 1)
1531 is_one[i] = true;
1532 else
1533 return false; /* other constant */
1534 } else
1535 return false;
1536 }
1537
1538 /* Only certain combinations of 0 and 1 can be eliminated. */
1539 if (is_zero[0] && is_zero[1] && is_zero[2])
1540 default_val = is_zero[3] ? 0 : 1;
1541 else if (is_one[0] && is_one[1] && is_one[2])
1542 default_val = is_zero[3] ? 2 : 3;
1543 else
1544 return false;
1545
1546 /* The PARAM export can be represented as DEFAULT_VAL. Kill it. */
1547 LLVMInstructionEraseFromParent(exp->inst);
1548
1549 /* Change OFFSET to DEFAULT_VAL. */
1550 for (i = 0; i < num_outputs; i++) {
1551 if (vs_output_param_offset[i] == exp->offset) {
1552 vs_output_param_offset[i] =
1553 AC_EXP_PARAM_DEFAULT_VAL_0000 + default_val;
1554 break;
1555 }
1556 }
1557 return true;
1558 }
1559
1560 static bool ac_eliminate_duplicated_output(uint8_t *vs_output_param_offset,
1561 uint32_t num_outputs,
1562 struct ac_vs_exports *processed,
1563 struct ac_vs_exp_inst *exp)
1564 {
1565 unsigned p, copy_back_channels = 0;
1566
1567 /* See if the output is already in the list of processed outputs.
1568 * The LLVMValueRef comparison relies on SSA.
1569 */
1570 for (p = 0; p < processed->num; p++) {
1571 bool different = false;
1572
1573 for (unsigned j = 0; j < 4; j++) {
1574 struct ac_vs_exp_chan *c1 = &processed->exp[p].chan[j];
1575 struct ac_vs_exp_chan *c2 = &exp->chan[j];
1576
1577 /* Treat undef as a match. */
1578 if (c2->type == AC_IR_UNDEF)
1579 continue;
1580
1581 /* If c1 is undef but c2 isn't, we can copy c2 to c1
1582 * and consider the instruction duplicated.
1583 */
1584 if (c1->type == AC_IR_UNDEF) {
1585 copy_back_channels |= 1 << j;
1586 continue;
1587 }
1588
1589 /* Test whether the channels are not equal. */
1590 if (c1->type != c2->type ||
1591 (c1->type == AC_IR_CONST &&
1592 c1->const_float != c2->const_float) ||
1593 (c1->type == AC_IR_VALUE &&
1594 c1->value != c2->value)) {
1595 different = true;
1596 break;
1597 }
1598 }
1599 if (!different)
1600 break;
1601
1602 copy_back_channels = 0;
1603 }
1604 if (p == processed->num)
1605 return false;
1606
1607 /* If a match was found, but the matching export has undef where the new
1608 * one has a normal value, copy the normal value to the undef channel.
1609 */
1610 struct ac_vs_exp_inst *match = &processed->exp[p];
1611
1612 while (copy_back_channels) {
1613 unsigned chan = u_bit_scan(&copy_back_channels);
1614
1615 assert(match->chan[chan].type == AC_IR_UNDEF);
1616 LLVMSetOperand(match->inst, AC_EXP_OUT0 + chan,
1617 exp->chan[chan].value);
1618 match->chan[chan] = exp->chan[chan];
1619 }
1620
1621 /* The PARAM export is duplicated. Kill it. */
1622 LLVMInstructionEraseFromParent(exp->inst);
1623
1624 /* Change OFFSET to the matching export. */
1625 for (unsigned i = 0; i < num_outputs; i++) {
1626 if (vs_output_param_offset[i] == exp->offset) {
1627 vs_output_param_offset[i] = match->offset;
1628 break;
1629 }
1630 }
1631 return true;
1632 }
1633
1634 void ac_optimize_vs_outputs(struct ac_llvm_context *ctx,
1635 LLVMValueRef main_fn,
1636 uint8_t *vs_output_param_offset,
1637 uint32_t num_outputs,
1638 uint8_t *num_param_exports)
1639 {
1640 LLVMBasicBlockRef bb;
1641 bool removed_any = false;
1642 struct ac_vs_exports exports;
1643
1644 exports.num = 0;
1645
1646 /* Process all LLVM instructions. */
1647 bb = LLVMGetFirstBasicBlock(main_fn);
1648 while (bb) {
1649 LLVMValueRef inst = LLVMGetFirstInstruction(bb);
1650
1651 while (inst) {
1652 LLVMValueRef cur = inst;
1653 inst = LLVMGetNextInstruction(inst);
1654 struct ac_vs_exp_inst exp;
1655
1656 if (LLVMGetInstructionOpcode(cur) != LLVMCall)
1657 continue;
1658
1659 LLVMValueRef callee = ac_llvm_get_called_value(cur);
1660
1661 if (!ac_llvm_is_function(callee))
1662 continue;
1663
1664 const char *name = LLVMGetValueName(callee);
1665 unsigned num_args = LLVMCountParams(callee);
1666
1667 /* Check if this is an export instruction. */
1668 if ((num_args != 9 && num_args != 8) ||
1669 (strcmp(name, "llvm.SI.export") &&
1670 strcmp(name, "llvm.amdgcn.exp.f32")))
1671 continue;
1672
1673 LLVMValueRef arg = LLVMGetOperand(cur, AC_EXP_TARGET);
1674 unsigned target = LLVMConstIntGetZExtValue(arg);
1675
1676 if (target < V_008DFC_SQ_EXP_PARAM)
1677 continue;
1678
1679 target -= V_008DFC_SQ_EXP_PARAM;
1680
1681 /* Parse the instruction. */
1682 memset(&exp, 0, sizeof(exp));
1683 exp.offset = target;
1684 exp.inst = cur;
1685
1686 for (unsigned i = 0; i < 4; i++) {
1687 LLVMValueRef v = LLVMGetOperand(cur, AC_EXP_OUT0 + i);
1688
1689 exp.chan[i].value = v;
1690
1691 if (LLVMIsUndef(v)) {
1692 exp.chan[i].type = AC_IR_UNDEF;
1693 } else if (LLVMIsAConstantFP(v)) {
1694 LLVMBool loses_info;
1695 exp.chan[i].type = AC_IR_CONST;
1696 exp.chan[i].const_float =
1697 LLVMConstRealGetDouble(v, &loses_info);
1698 } else {
1699 exp.chan[i].type = AC_IR_VALUE;
1700 }
1701 }
1702
1703 /* Eliminate constant and duplicated PARAM exports. */
1704 if (ac_eliminate_const_output(vs_output_param_offset,
1705 num_outputs, &exp) ||
1706 ac_eliminate_duplicated_output(vs_output_param_offset,
1707 num_outputs, &exports,
1708 &exp)) {
1709 removed_any = true;
1710 } else {
1711 exports.exp[exports.num++] = exp;
1712 }
1713 }
1714 bb = LLVMGetNextBasicBlock(bb);
1715 }
1716
1717 /* Remove holes in export memory due to removed PARAM exports.
1718 * This is done by renumbering all PARAM exports.
1719 */
1720 if (removed_any) {
1721 uint8_t old_offset[VARYING_SLOT_MAX];
1722 unsigned out, i;
1723
1724 /* Make a copy of the offsets. We need the old version while
1725 * we are modifying some of them. */
1726 memcpy(old_offset, vs_output_param_offset,
1727 sizeof(old_offset));
1728
1729 for (i = 0; i < exports.num; i++) {
1730 unsigned offset = exports.exp[i].offset;
1731
1732 /* Update vs_output_param_offset. Multiple outputs can
1733 * have the same offset.
1734 */
1735 for (out = 0; out < num_outputs; out++) {
1736 if (old_offset[out] == offset)
1737 vs_output_param_offset[out] = i;
1738 }
1739
1740 /* Change the PARAM offset in the instruction. */
1741 LLVMSetOperand(exports.exp[i].inst, AC_EXP_TARGET,
1742 LLVMConstInt(ctx->i32,
1743 V_008DFC_SQ_EXP_PARAM + i, 0));
1744 }
1745 *num_param_exports = exports.num;
1746 }
1747 }
1748
1749 void ac_init_exec_full_mask(struct ac_llvm_context *ctx)
1750 {
1751 LLVMValueRef full_mask = LLVMConstInt(ctx->i64, ~0ull, 0);
1752 ac_build_intrinsic(ctx,
1753 "llvm.amdgcn.init.exec", ctx->voidt,
1754 &full_mask, 1, AC_FUNC_ATTR_CONVERGENT);
1755 }
1756
1757 void ac_declare_lds_as_pointer(struct ac_llvm_context *ctx)
1758 {
1759 unsigned lds_size = ctx->chip_class >= CIK ? 65536 : 32768;
1760 ctx->lds = LLVMBuildIntToPtr(ctx->builder, ctx->i32_0,
1761 LLVMPointerType(LLVMArrayType(ctx->i32, lds_size / 4), AC_LOCAL_ADDR_SPACE),
1762 "lds");
1763 }
1764
1765 LLVMValueRef ac_lds_load(struct ac_llvm_context *ctx,
1766 LLVMValueRef dw_addr)
1767 {
1768 return ac_build_load(ctx, ctx->lds, dw_addr);
1769 }
1770
1771 void ac_lds_store(struct ac_llvm_context *ctx,
1772 LLVMValueRef dw_addr,
1773 LLVMValueRef value)
1774 {
1775 value = ac_to_integer(ctx, value);
1776 ac_build_indexed_store(ctx, ctx->lds,
1777 dw_addr, value);
1778 }
1779
1780 LLVMValueRef ac_find_lsb(struct ac_llvm_context *ctx,
1781 LLVMTypeRef dst_type,
1782 LLVMValueRef src0)
1783 {
1784 LLVMValueRef params[2] = {
1785 src0,
1786
1787 /* The value of 1 means that ffs(x=0) = undef, so LLVM won't
1788 * add special code to check for x=0. The reason is that
1789 * the LLVM behavior for x=0 is different from what we
1790 * need here. However, LLVM also assumes that ffs(x) is
1791 * in [0, 31], but GLSL expects that ffs(0) = -1, so
1792 * a conditional assignment to handle 0 is still required.
1793 *
1794 * The hardware already implements the correct behavior.
1795 */
1796 LLVMConstInt(ctx->i1, 1, false),
1797 };
1798
1799 LLVMValueRef lsb = ac_build_intrinsic(ctx, "llvm.cttz.i32", ctx->i32,
1800 params, 2,
1801 AC_FUNC_ATTR_READNONE);
1802
1803 /* TODO: We need an intrinsic to skip this conditional. */
1804 /* Check for zero: */
1805 return LLVMBuildSelect(ctx->builder, LLVMBuildICmp(ctx->builder,
1806 LLVMIntEQ, src0,
1807 ctx->i32_0, ""),
1808 LLVMConstInt(ctx->i32, -1, 0), lsb, "");
1809 }