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ac/nir: pass ac_nir_context to tex_fetch_ptrs and related functions
[mesa.git] / src / amd / common / ac_llvm_build.c
1 /*
2 * Copyright 2014 Advanced Micro Devices, Inc.
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the
6 * "Software"), to deal in the Software without restriction, including
7 * without limitation the rights to use, copy, modify, merge, publish,
8 * distribute, sub license, and/or sell copies of the Software, and to
9 * permit persons to whom the Software is furnished to do so, subject to
10 * the following conditions:
11 *
12 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
13 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
14 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
15 * THE COPYRIGHT HOLDERS, AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM,
16 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
17 * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
18 * USE OR OTHER DEALINGS IN THE SOFTWARE.
19 *
20 * The above copyright notice and this permission notice (including the
21 * next paragraph) shall be included in all copies or substantial portions
22 * of the Software.
23 *
24 */
25 /* based on pieces from si_pipe.c and radeon_llvm_emit.c */
26 #include "ac_llvm_build.h"
27
28 #include <llvm-c/Core.h>
29
30 #include "c11/threads.h"
31
32 #include <assert.h>
33 #include <stdio.h>
34
35 #include "ac_llvm_util.h"
36 #include "ac_exp_param.h"
37 #include "util/bitscan.h"
38 #include "util/macros.h"
39 #include "sid.h"
40
41 #include "shader_enums.h"
42
43 /* Initialize module-independent parts of the context.
44 *
45 * The caller is responsible for initializing ctx::module and ctx::builder.
46 */
47 void
48 ac_llvm_context_init(struct ac_llvm_context *ctx, LLVMContextRef context)
49 {
50 LLVMValueRef args[1];
51
52 ctx->context = context;
53 ctx->module = NULL;
54 ctx->builder = NULL;
55
56 ctx->voidt = LLVMVoidTypeInContext(ctx->context);
57 ctx->i1 = LLVMInt1TypeInContext(ctx->context);
58 ctx->i8 = LLVMInt8TypeInContext(ctx->context);
59 ctx->i16 = LLVMIntTypeInContext(ctx->context, 16);
60 ctx->i32 = LLVMIntTypeInContext(ctx->context, 32);
61 ctx->i64 = LLVMIntTypeInContext(ctx->context, 64);
62 ctx->f16 = LLVMHalfTypeInContext(ctx->context);
63 ctx->f32 = LLVMFloatTypeInContext(ctx->context);
64 ctx->f64 = LLVMDoubleTypeInContext(ctx->context);
65 ctx->v4i32 = LLVMVectorType(ctx->i32, 4);
66 ctx->v4f32 = LLVMVectorType(ctx->f32, 4);
67 ctx->v8i32 = LLVMVectorType(ctx->i32, 8);
68
69 ctx->i32_0 = LLVMConstInt(ctx->i32, 0, false);
70 ctx->i32_1 = LLVMConstInt(ctx->i32, 1, false);
71 ctx->f32_0 = LLVMConstReal(ctx->f32, 0.0);
72 ctx->f32_1 = LLVMConstReal(ctx->f32, 1.0);
73
74 ctx->range_md_kind = LLVMGetMDKindIDInContext(ctx->context,
75 "range", 5);
76
77 ctx->invariant_load_md_kind = LLVMGetMDKindIDInContext(ctx->context,
78 "invariant.load", 14);
79
80 ctx->fpmath_md_kind = LLVMGetMDKindIDInContext(ctx->context, "fpmath", 6);
81
82 args[0] = LLVMConstReal(ctx->f32, 2.5);
83 ctx->fpmath_md_2p5_ulp = LLVMMDNodeInContext(ctx->context, args, 1);
84
85 ctx->uniform_md_kind = LLVMGetMDKindIDInContext(ctx->context,
86 "amdgpu.uniform", 14);
87
88 ctx->empty_md = LLVMMDNodeInContext(ctx->context, NULL, 0);
89 }
90
91 LLVMValueRef
92 ac_build_intrinsic(struct ac_llvm_context *ctx, const char *name,
93 LLVMTypeRef return_type, LLVMValueRef *params,
94 unsigned param_count, unsigned attrib_mask)
95 {
96 LLVMValueRef function, call;
97 bool set_callsite_attrs = HAVE_LLVM >= 0x0400 &&
98 !(attrib_mask & AC_FUNC_ATTR_LEGACY);
99
100 function = LLVMGetNamedFunction(ctx->module, name);
101 if (!function) {
102 LLVMTypeRef param_types[32], function_type;
103 unsigned i;
104
105 assert(param_count <= 32);
106
107 for (i = 0; i < param_count; ++i) {
108 assert(params[i]);
109 param_types[i] = LLVMTypeOf(params[i]);
110 }
111 function_type =
112 LLVMFunctionType(return_type, param_types, param_count, 0);
113 function = LLVMAddFunction(ctx->module, name, function_type);
114
115 LLVMSetFunctionCallConv(function, LLVMCCallConv);
116 LLVMSetLinkage(function, LLVMExternalLinkage);
117
118 if (!set_callsite_attrs)
119 ac_add_func_attributes(ctx->context, function, attrib_mask);
120 }
121
122 call = LLVMBuildCall(ctx->builder, function, params, param_count, "");
123 if (set_callsite_attrs)
124 ac_add_func_attributes(ctx->context, call, attrib_mask);
125 return call;
126 }
127
128 static LLVMValueRef bitcast_to_float(struct ac_llvm_context *ctx,
129 LLVMValueRef value)
130 {
131 LLVMTypeRef type = LLVMTypeOf(value);
132 LLVMTypeRef new_type;
133
134 if (LLVMGetTypeKind(type) == LLVMVectorTypeKind)
135 new_type = LLVMVectorType(ctx->f32, LLVMGetVectorSize(type));
136 else
137 new_type = ctx->f32;
138
139 return LLVMBuildBitCast(ctx->builder, value, new_type, "");
140 }
141
142 /**
143 * Given the i32 or vNi32 \p type, generate the textual name (e.g. for use with
144 * intrinsic names).
145 */
146 void ac_build_type_name_for_intr(LLVMTypeRef type, char *buf, unsigned bufsize)
147 {
148 LLVMTypeRef elem_type = type;
149
150 assert(bufsize >= 8);
151
152 if (LLVMGetTypeKind(type) == LLVMVectorTypeKind) {
153 int ret = snprintf(buf, bufsize, "v%u",
154 LLVMGetVectorSize(type));
155 if (ret < 0) {
156 char *type_name = LLVMPrintTypeToString(type);
157 fprintf(stderr, "Error building type name for: %s\n",
158 type_name);
159 return;
160 }
161 elem_type = LLVMGetElementType(type);
162 buf += ret;
163 bufsize -= ret;
164 }
165 switch (LLVMGetTypeKind(elem_type)) {
166 default: break;
167 case LLVMIntegerTypeKind:
168 snprintf(buf, bufsize, "i%d", LLVMGetIntTypeWidth(elem_type));
169 break;
170 case LLVMFloatTypeKind:
171 snprintf(buf, bufsize, "f32");
172 break;
173 case LLVMDoubleTypeKind:
174 snprintf(buf, bufsize, "f64");
175 break;
176 }
177 }
178
179 LLVMValueRef
180 ac_build_gather_values_extended(struct ac_llvm_context *ctx,
181 LLVMValueRef *values,
182 unsigned value_count,
183 unsigned value_stride,
184 bool load)
185 {
186 LLVMBuilderRef builder = ctx->builder;
187 LLVMValueRef vec = NULL;
188 unsigned i;
189
190 if (value_count == 1) {
191 if (load)
192 return LLVMBuildLoad(builder, values[0], "");
193 return values[0];
194 } else if (!value_count)
195 unreachable("value_count is 0");
196
197 for (i = 0; i < value_count; i++) {
198 LLVMValueRef value = values[i * value_stride];
199 if (load)
200 value = LLVMBuildLoad(builder, value, "");
201
202 if (!i)
203 vec = LLVMGetUndef( LLVMVectorType(LLVMTypeOf(value), value_count));
204 LLVMValueRef index = LLVMConstInt(ctx->i32, i, false);
205 vec = LLVMBuildInsertElement(builder, vec, value, index, "");
206 }
207 return vec;
208 }
209
210 LLVMValueRef
211 ac_build_gather_values(struct ac_llvm_context *ctx,
212 LLVMValueRef *values,
213 unsigned value_count)
214 {
215 return ac_build_gather_values_extended(ctx, values, value_count, 1, false);
216 }
217
218 LLVMValueRef
219 ac_build_fdiv(struct ac_llvm_context *ctx,
220 LLVMValueRef num,
221 LLVMValueRef den)
222 {
223 LLVMValueRef ret = LLVMBuildFDiv(ctx->builder, num, den, "");
224
225 if (!LLVMIsConstant(ret))
226 LLVMSetMetadata(ret, ctx->fpmath_md_kind, ctx->fpmath_md_2p5_ulp);
227 return ret;
228 }
229
230 /* Coordinates for cube map selection. sc, tc, and ma are as in Table 8.27
231 * of the OpenGL 4.5 (Compatibility Profile) specification, except ma is
232 * already multiplied by two. id is the cube face number.
233 */
234 struct cube_selection_coords {
235 LLVMValueRef stc[2];
236 LLVMValueRef ma;
237 LLVMValueRef id;
238 };
239
240 static void
241 build_cube_intrinsic(struct ac_llvm_context *ctx,
242 LLVMValueRef in[3],
243 struct cube_selection_coords *out)
244 {
245 LLVMTypeRef f32 = ctx->f32;
246
247 out->stc[1] = ac_build_intrinsic(ctx, "llvm.amdgcn.cubetc",
248 f32, in, 3, AC_FUNC_ATTR_READNONE);
249 out->stc[0] = ac_build_intrinsic(ctx, "llvm.amdgcn.cubesc",
250 f32, in, 3, AC_FUNC_ATTR_READNONE);
251 out->ma = ac_build_intrinsic(ctx, "llvm.amdgcn.cubema",
252 f32, in, 3, AC_FUNC_ATTR_READNONE);
253 out->id = ac_build_intrinsic(ctx, "llvm.amdgcn.cubeid",
254 f32, in, 3, AC_FUNC_ATTR_READNONE);
255 }
256
257 /**
258 * Build a manual selection sequence for cube face sc/tc coordinates and
259 * major axis vector (multiplied by 2 for consistency) for the given
260 * vec3 \p coords, for the face implied by \p selcoords.
261 *
262 * For the major axis, we always adjust the sign to be in the direction of
263 * selcoords.ma; i.e., a positive out_ma means that coords is pointed towards
264 * the selcoords major axis.
265 */
266 static void build_cube_select(LLVMBuilderRef builder,
267 const struct cube_selection_coords *selcoords,
268 const LLVMValueRef *coords,
269 LLVMValueRef *out_st,
270 LLVMValueRef *out_ma)
271 {
272 LLVMTypeRef f32 = LLVMTypeOf(coords[0]);
273 LLVMValueRef is_ma_positive;
274 LLVMValueRef sgn_ma;
275 LLVMValueRef is_ma_z, is_not_ma_z;
276 LLVMValueRef is_ma_y;
277 LLVMValueRef is_ma_x;
278 LLVMValueRef sgn;
279 LLVMValueRef tmp;
280
281 is_ma_positive = LLVMBuildFCmp(builder, LLVMRealUGE,
282 selcoords->ma, LLVMConstReal(f32, 0.0), "");
283 sgn_ma = LLVMBuildSelect(builder, is_ma_positive,
284 LLVMConstReal(f32, 1.0), LLVMConstReal(f32, -1.0), "");
285
286 is_ma_z = LLVMBuildFCmp(builder, LLVMRealUGE, selcoords->id, LLVMConstReal(f32, 4.0), "");
287 is_not_ma_z = LLVMBuildNot(builder, is_ma_z, "");
288 is_ma_y = LLVMBuildAnd(builder, is_not_ma_z,
289 LLVMBuildFCmp(builder, LLVMRealUGE, selcoords->id, LLVMConstReal(f32, 2.0), ""), "");
290 is_ma_x = LLVMBuildAnd(builder, is_not_ma_z, LLVMBuildNot(builder, is_ma_y, ""), "");
291
292 /* Select sc */
293 tmp = LLVMBuildSelect(builder, is_ma_z, coords[2], coords[0], "");
294 sgn = LLVMBuildSelect(builder, is_ma_y, LLVMConstReal(f32, 1.0),
295 LLVMBuildSelect(builder, is_ma_x, sgn_ma,
296 LLVMBuildFNeg(builder, sgn_ma, ""), ""), "");
297 out_st[0] = LLVMBuildFMul(builder, tmp, sgn, "");
298
299 /* Select tc */
300 tmp = LLVMBuildSelect(builder, is_ma_y, coords[2], coords[1], "");
301 sgn = LLVMBuildSelect(builder, is_ma_y, LLVMBuildFNeg(builder, sgn_ma, ""),
302 LLVMConstReal(f32, -1.0), "");
303 out_st[1] = LLVMBuildFMul(builder, tmp, sgn, "");
304
305 /* Select ma */
306 tmp = LLVMBuildSelect(builder, is_ma_z, coords[2],
307 LLVMBuildSelect(builder, is_ma_y, coords[1], coords[0], ""), "");
308 sgn = LLVMBuildSelect(builder, is_ma_positive,
309 LLVMConstReal(f32, 2.0), LLVMConstReal(f32, -2.0), "");
310 *out_ma = LLVMBuildFMul(builder, tmp, sgn, "");
311 }
312
313 void
314 ac_prepare_cube_coords(struct ac_llvm_context *ctx,
315 bool is_deriv, bool is_array,
316 LLVMValueRef *coords_arg,
317 LLVMValueRef *derivs_arg)
318 {
319
320 LLVMBuilderRef builder = ctx->builder;
321 struct cube_selection_coords selcoords;
322 LLVMValueRef coords[3];
323 LLVMValueRef invma;
324
325 build_cube_intrinsic(ctx, coords_arg, &selcoords);
326
327 invma = ac_build_intrinsic(ctx, "llvm.fabs.f32",
328 ctx->f32, &selcoords.ma, 1, AC_FUNC_ATTR_READNONE);
329 invma = ac_build_fdiv(ctx, LLVMConstReal(ctx->f32, 1.0), invma);
330
331 for (int i = 0; i < 2; ++i)
332 coords[i] = LLVMBuildFMul(builder, selcoords.stc[i], invma, "");
333
334 coords[2] = selcoords.id;
335
336 if (is_deriv && derivs_arg) {
337 LLVMValueRef derivs[4];
338 int axis;
339
340 /* Convert cube derivatives to 2D derivatives. */
341 for (axis = 0; axis < 2; axis++) {
342 LLVMValueRef deriv_st[2];
343 LLVMValueRef deriv_ma;
344
345 /* Transform the derivative alongside the texture
346 * coordinate. Mathematically, the correct formula is
347 * as follows. Assume we're projecting onto the +Z face
348 * and denote by dx/dh the derivative of the (original)
349 * X texture coordinate with respect to horizontal
350 * window coordinates. The projection onto the +Z face
351 * plane is:
352 *
353 * f(x,z) = x/z
354 *
355 * Then df/dh = df/dx * dx/dh + df/dz * dz/dh
356 * = 1/z * dx/dh - x/z * 1/z * dz/dh.
357 *
358 * This motivatives the implementation below.
359 *
360 * Whether this actually gives the expected results for
361 * apps that might feed in derivatives obtained via
362 * finite differences is anyone's guess. The OpenGL spec
363 * seems awfully quiet about how textureGrad for cube
364 * maps should be handled.
365 */
366 build_cube_select(builder, &selcoords, &derivs_arg[axis * 3],
367 deriv_st, &deriv_ma);
368
369 deriv_ma = LLVMBuildFMul(builder, deriv_ma, invma, "");
370
371 for (int i = 0; i < 2; ++i)
372 derivs[axis * 2 + i] =
373 LLVMBuildFSub(builder,
374 LLVMBuildFMul(builder, deriv_st[i], invma, ""),
375 LLVMBuildFMul(builder, deriv_ma, coords[i], ""), "");
376 }
377
378 memcpy(derivs_arg, derivs, sizeof(derivs));
379 }
380
381 /* Shift the texture coordinate. This must be applied after the
382 * derivative calculation.
383 */
384 for (int i = 0; i < 2; ++i)
385 coords[i] = LLVMBuildFAdd(builder, coords[i], LLVMConstReal(ctx->f32, 1.5), "");
386
387 if (is_array) {
388 /* for cube arrays coord.z = coord.w(array_index) * 8 + face */
389 /* coords_arg.w component - array_index for cube arrays */
390 LLVMValueRef tmp = LLVMBuildFMul(ctx->builder, coords_arg[3], LLVMConstReal(ctx->f32, 8.0), "");
391 coords[2] = LLVMBuildFAdd(ctx->builder, tmp, coords[2], "");
392 }
393
394 memcpy(coords_arg, coords, sizeof(coords));
395 }
396
397
398 LLVMValueRef
399 ac_build_fs_interp(struct ac_llvm_context *ctx,
400 LLVMValueRef llvm_chan,
401 LLVMValueRef attr_number,
402 LLVMValueRef params,
403 LLVMValueRef i,
404 LLVMValueRef j)
405 {
406 LLVMValueRef args[5];
407 LLVMValueRef p1;
408
409 if (HAVE_LLVM < 0x0400) {
410 LLVMValueRef ij[2];
411 ij[0] = LLVMBuildBitCast(ctx->builder, i, ctx->i32, "");
412 ij[1] = LLVMBuildBitCast(ctx->builder, j, ctx->i32, "");
413
414 args[0] = llvm_chan;
415 args[1] = attr_number;
416 args[2] = params;
417 args[3] = ac_build_gather_values(ctx, ij, 2);
418 return ac_build_intrinsic(ctx, "llvm.SI.fs.interp",
419 ctx->f32, args, 4,
420 AC_FUNC_ATTR_READNONE);
421 }
422
423 args[0] = i;
424 args[1] = llvm_chan;
425 args[2] = attr_number;
426 args[3] = params;
427
428 p1 = ac_build_intrinsic(ctx, "llvm.amdgcn.interp.p1",
429 ctx->f32, args, 4, AC_FUNC_ATTR_READNONE);
430
431 args[0] = p1;
432 args[1] = j;
433 args[2] = llvm_chan;
434 args[3] = attr_number;
435 args[4] = params;
436
437 return ac_build_intrinsic(ctx, "llvm.amdgcn.interp.p2",
438 ctx->f32, args, 5, AC_FUNC_ATTR_READNONE);
439 }
440
441 LLVMValueRef
442 ac_build_fs_interp_mov(struct ac_llvm_context *ctx,
443 LLVMValueRef parameter,
444 LLVMValueRef llvm_chan,
445 LLVMValueRef attr_number,
446 LLVMValueRef params)
447 {
448 LLVMValueRef args[4];
449 if (HAVE_LLVM < 0x0400) {
450 args[0] = llvm_chan;
451 args[1] = attr_number;
452 args[2] = params;
453
454 return ac_build_intrinsic(ctx,
455 "llvm.SI.fs.constant",
456 ctx->f32, args, 3,
457 AC_FUNC_ATTR_READNONE);
458 }
459
460 args[0] = parameter;
461 args[1] = llvm_chan;
462 args[2] = attr_number;
463 args[3] = params;
464
465 return ac_build_intrinsic(ctx, "llvm.amdgcn.interp.mov",
466 ctx->f32, args, 4, AC_FUNC_ATTR_READNONE);
467 }
468
469 LLVMValueRef
470 ac_build_gep0(struct ac_llvm_context *ctx,
471 LLVMValueRef base_ptr,
472 LLVMValueRef index)
473 {
474 LLVMValueRef indices[2] = {
475 LLVMConstInt(ctx->i32, 0, 0),
476 index,
477 };
478 return LLVMBuildGEP(ctx->builder, base_ptr,
479 indices, 2, "");
480 }
481
482 void
483 ac_build_indexed_store(struct ac_llvm_context *ctx,
484 LLVMValueRef base_ptr, LLVMValueRef index,
485 LLVMValueRef value)
486 {
487 LLVMBuildStore(ctx->builder, value,
488 ac_build_gep0(ctx, base_ptr, index));
489 }
490
491 /**
492 * Build an LLVM bytecode indexed load using LLVMBuildGEP + LLVMBuildLoad.
493 * It's equivalent to doing a load from &base_ptr[index].
494 *
495 * \param base_ptr Where the array starts.
496 * \param index The element index into the array.
497 * \param uniform Whether the base_ptr and index can be assumed to be
498 * dynamically uniform
499 */
500 LLVMValueRef
501 ac_build_indexed_load(struct ac_llvm_context *ctx,
502 LLVMValueRef base_ptr, LLVMValueRef index,
503 bool uniform)
504 {
505 LLVMValueRef pointer;
506
507 pointer = ac_build_gep0(ctx, base_ptr, index);
508 if (uniform)
509 LLVMSetMetadata(pointer, ctx->uniform_md_kind, ctx->empty_md);
510 return LLVMBuildLoad(ctx->builder, pointer, "");
511 }
512
513 /**
514 * Do a load from &base_ptr[index], but also add a flag that it's loading
515 * a constant from a dynamically uniform index.
516 */
517 LLVMValueRef
518 ac_build_indexed_load_const(struct ac_llvm_context *ctx,
519 LLVMValueRef base_ptr, LLVMValueRef index)
520 {
521 LLVMValueRef result = ac_build_indexed_load(ctx, base_ptr, index, true);
522 LLVMSetMetadata(result, ctx->invariant_load_md_kind, ctx->empty_md);
523 return result;
524 }
525
526 /* TBUFFER_STORE_FORMAT_{X,XY,XYZ,XYZW} <- the suffix is selected by num_channels=1..4.
527 * The type of vdata must be one of i32 (num_channels=1), v2i32 (num_channels=2),
528 * or v4i32 (num_channels=3,4).
529 */
530 void
531 ac_build_buffer_store_dword(struct ac_llvm_context *ctx,
532 LLVMValueRef rsrc,
533 LLVMValueRef vdata,
534 unsigned num_channels,
535 LLVMValueRef voffset,
536 LLVMValueRef soffset,
537 unsigned inst_offset,
538 bool glc,
539 bool slc,
540 bool writeonly_memory,
541 bool has_add_tid)
542 {
543 /* TODO: Fix stores with ADD_TID and remove the "has_add_tid" flag. */
544 if (!has_add_tid) {
545 /* Split 3 channel stores, becase LLVM doesn't support 3-channel
546 * intrinsics. */
547 if (num_channels == 3) {
548 LLVMValueRef v[3], v01;
549
550 for (int i = 0; i < 3; i++) {
551 v[i] = LLVMBuildExtractElement(ctx->builder, vdata,
552 LLVMConstInt(ctx->i32, i, 0), "");
553 }
554 v01 = ac_build_gather_values(ctx, v, 2);
555
556 ac_build_buffer_store_dword(ctx, rsrc, v01, 2, voffset,
557 soffset, inst_offset, glc, slc,
558 writeonly_memory, has_add_tid);
559 ac_build_buffer_store_dword(ctx, rsrc, v[2], 1, voffset,
560 soffset, inst_offset + 8,
561 glc, slc,
562 writeonly_memory, has_add_tid);
563 return;
564 }
565
566 unsigned func = CLAMP(num_channels, 1, 3) - 1;
567 static const char *types[] = {"f32", "v2f32", "v4f32"};
568 char name[256];
569 LLVMValueRef offset = soffset;
570
571 if (inst_offset)
572 offset = LLVMBuildAdd(ctx->builder, offset,
573 LLVMConstInt(ctx->i32, inst_offset, 0), "");
574 if (voffset)
575 offset = LLVMBuildAdd(ctx->builder, offset, voffset, "");
576
577 LLVMValueRef args[] = {
578 bitcast_to_float(ctx, vdata),
579 LLVMBuildBitCast(ctx->builder, rsrc, ctx->v4i32, ""),
580 LLVMConstInt(ctx->i32, 0, 0),
581 offset,
582 LLVMConstInt(ctx->i1, glc, 0),
583 LLVMConstInt(ctx->i1, slc, 0),
584 };
585
586 snprintf(name, sizeof(name), "llvm.amdgcn.buffer.store.%s",
587 types[func]);
588
589 ac_build_intrinsic(ctx, name, ctx->voidt,
590 args, ARRAY_SIZE(args),
591 writeonly_memory ?
592 AC_FUNC_ATTR_INACCESSIBLE_MEM_ONLY :
593 AC_FUNC_ATTR_WRITEONLY);
594 return;
595 }
596
597 static unsigned dfmt[] = {
598 V_008F0C_BUF_DATA_FORMAT_32,
599 V_008F0C_BUF_DATA_FORMAT_32_32,
600 V_008F0C_BUF_DATA_FORMAT_32_32_32,
601 V_008F0C_BUF_DATA_FORMAT_32_32_32_32
602 };
603 assert(num_channels >= 1 && num_channels <= 4);
604
605 LLVMValueRef args[] = {
606 rsrc,
607 vdata,
608 LLVMConstInt(ctx->i32, num_channels, 0),
609 voffset ? voffset : LLVMGetUndef(ctx->i32),
610 soffset,
611 LLVMConstInt(ctx->i32, inst_offset, 0),
612 LLVMConstInt(ctx->i32, dfmt[num_channels - 1], 0),
613 LLVMConstInt(ctx->i32, V_008F0C_BUF_NUM_FORMAT_UINT, 0),
614 LLVMConstInt(ctx->i32, voffset != NULL, 0),
615 LLVMConstInt(ctx->i32, 0, 0), /* idxen */
616 LLVMConstInt(ctx->i32, glc, 0),
617 LLVMConstInt(ctx->i32, slc, 0),
618 LLVMConstInt(ctx->i32, 0, 0), /* tfe*/
619 };
620
621 /* The instruction offset field has 12 bits */
622 assert(voffset || inst_offset < (1 << 12));
623
624 /* The intrinsic is overloaded, we need to add a type suffix for overloading to work. */
625 unsigned func = CLAMP(num_channels, 1, 3) - 1;
626 const char *types[] = {"i32", "v2i32", "v4i32"};
627 char name[256];
628 snprintf(name, sizeof(name), "llvm.SI.tbuffer.store.%s", types[func]);
629
630 ac_build_intrinsic(ctx, name, ctx->voidt,
631 args, ARRAY_SIZE(args),
632 AC_FUNC_ATTR_LEGACY);
633 }
634
635 LLVMValueRef
636 ac_build_buffer_load(struct ac_llvm_context *ctx,
637 LLVMValueRef rsrc,
638 int num_channels,
639 LLVMValueRef vindex,
640 LLVMValueRef voffset,
641 LLVMValueRef soffset,
642 unsigned inst_offset,
643 unsigned glc,
644 unsigned slc,
645 bool can_speculate,
646 bool allow_smem)
647 {
648 LLVMValueRef offset = LLVMConstInt(ctx->i32, inst_offset, 0);
649 if (voffset)
650 offset = LLVMBuildAdd(ctx->builder, offset, voffset, "");
651 if (soffset)
652 offset = LLVMBuildAdd(ctx->builder, offset, soffset, "");
653
654 /* TODO: VI and later generations can use SMEM with GLC=1.*/
655 if (allow_smem && !glc && !slc) {
656 assert(vindex == NULL);
657
658 LLVMValueRef result[4];
659
660 for (int i = 0; i < num_channels; i++) {
661 if (i) {
662 offset = LLVMBuildAdd(ctx->builder, offset,
663 LLVMConstInt(ctx->i32, 4, 0), "");
664 }
665 LLVMValueRef args[2] = {rsrc, offset};
666 result[i] = ac_build_intrinsic(ctx, "llvm.SI.load.const.v4i32",
667 ctx->f32, args, 2,
668 AC_FUNC_ATTR_READNONE |
669 AC_FUNC_ATTR_LEGACY);
670 }
671 if (num_channels == 1)
672 return result[0];
673
674 if (num_channels == 3)
675 result[num_channels++] = LLVMGetUndef(ctx->f32);
676 return ac_build_gather_values(ctx, result, num_channels);
677 }
678
679 unsigned func = CLAMP(num_channels, 1, 3) - 1;
680
681 LLVMValueRef args[] = {
682 LLVMBuildBitCast(ctx->builder, rsrc, ctx->v4i32, ""),
683 vindex ? vindex : LLVMConstInt(ctx->i32, 0, 0),
684 offset,
685 LLVMConstInt(ctx->i1, glc, 0),
686 LLVMConstInt(ctx->i1, slc, 0)
687 };
688
689 LLVMTypeRef types[] = {ctx->f32, LLVMVectorType(ctx->f32, 2),
690 ctx->v4f32};
691 const char *type_names[] = {"f32", "v2f32", "v4f32"};
692 char name[256];
693
694 snprintf(name, sizeof(name), "llvm.amdgcn.buffer.load.%s",
695 type_names[func]);
696
697 return ac_build_intrinsic(ctx, name, types[func], args,
698 ARRAY_SIZE(args),
699 /* READNONE means writes can't affect it, while
700 * READONLY means that writes can affect it. */
701 can_speculate && HAVE_LLVM >= 0x0400 ?
702 AC_FUNC_ATTR_READNONE :
703 AC_FUNC_ATTR_READONLY);
704 }
705
706 LLVMValueRef ac_build_buffer_load_format(struct ac_llvm_context *ctx,
707 LLVMValueRef rsrc,
708 LLVMValueRef vindex,
709 LLVMValueRef voffset,
710 bool can_speculate)
711 {
712 LLVMValueRef args [] = {
713 LLVMBuildBitCast(ctx->builder, rsrc, ctx->v4i32, ""),
714 vindex,
715 voffset,
716 LLVMConstInt(ctx->i1, 0, 0), /* glc */
717 LLVMConstInt(ctx->i1, 0, 0), /* slc */
718 };
719
720 return ac_build_intrinsic(ctx,
721 "llvm.amdgcn.buffer.load.format.v4f32",
722 ctx->v4f32, args, ARRAY_SIZE(args),
723 /* READNONE means writes can't affect it, while
724 * READONLY means that writes can affect it. */
725 can_speculate && HAVE_LLVM >= 0x0400 ?
726 AC_FUNC_ATTR_READNONE :
727 AC_FUNC_ATTR_READONLY);
728 }
729
730 /**
731 * Set range metadata on an instruction. This can only be used on load and
732 * call instructions. If you know an instruction can only produce the values
733 * 0, 1, 2, you would do set_range_metadata(value, 0, 3);
734 * \p lo is the minimum value inclusive.
735 * \p hi is the maximum value exclusive.
736 */
737 static void set_range_metadata(struct ac_llvm_context *ctx,
738 LLVMValueRef value, unsigned lo, unsigned hi)
739 {
740 LLVMValueRef range_md, md_args[2];
741 LLVMTypeRef type = LLVMTypeOf(value);
742 LLVMContextRef context = LLVMGetTypeContext(type);
743
744 md_args[0] = LLVMConstInt(type, lo, false);
745 md_args[1] = LLVMConstInt(type, hi, false);
746 range_md = LLVMMDNodeInContext(context, md_args, 2);
747 LLVMSetMetadata(value, ctx->range_md_kind, range_md);
748 }
749
750 LLVMValueRef
751 ac_get_thread_id(struct ac_llvm_context *ctx)
752 {
753 LLVMValueRef tid;
754
755 LLVMValueRef tid_args[2];
756 tid_args[0] = LLVMConstInt(ctx->i32, 0xffffffff, false);
757 tid_args[1] = LLVMConstInt(ctx->i32, 0, false);
758 tid_args[1] = ac_build_intrinsic(ctx,
759 "llvm.amdgcn.mbcnt.lo", ctx->i32,
760 tid_args, 2, AC_FUNC_ATTR_READNONE);
761
762 tid = ac_build_intrinsic(ctx, "llvm.amdgcn.mbcnt.hi",
763 ctx->i32, tid_args,
764 2, AC_FUNC_ATTR_READNONE);
765 set_range_metadata(ctx, tid, 0, 64);
766 return tid;
767 }
768
769 /*
770 * SI implements derivatives using the local data store (LDS)
771 * All writes to the LDS happen in all executing threads at
772 * the same time. TID is the Thread ID for the current
773 * thread and is a value between 0 and 63, representing
774 * the thread's position in the wavefront.
775 *
776 * For the pixel shader threads are grouped into quads of four pixels.
777 * The TIDs of the pixels of a quad are:
778 *
779 * +------+------+
780 * |4n + 0|4n + 1|
781 * +------+------+
782 * |4n + 2|4n + 3|
783 * +------+------+
784 *
785 * So, masking the TID with 0xfffffffc yields the TID of the top left pixel
786 * of the quad, masking with 0xfffffffd yields the TID of the top pixel of
787 * the current pixel's column, and masking with 0xfffffffe yields the TID
788 * of the left pixel of the current pixel's row.
789 *
790 * Adding 1 yields the TID of the pixel to the right of the left pixel, and
791 * adding 2 yields the TID of the pixel below the top pixel.
792 */
793 LLVMValueRef
794 ac_build_ddxy(struct ac_llvm_context *ctx,
795 bool has_ds_bpermute,
796 uint32_t mask,
797 int idx,
798 LLVMValueRef lds,
799 LLVMValueRef val)
800 {
801 LLVMValueRef thread_id, tl, trbl, tl_tid, trbl_tid, args[2];
802 LLVMValueRef result;
803
804 thread_id = ac_get_thread_id(ctx);
805
806 tl_tid = LLVMBuildAnd(ctx->builder, thread_id,
807 LLVMConstInt(ctx->i32, mask, false), "");
808
809 trbl_tid = LLVMBuildAdd(ctx->builder, tl_tid,
810 LLVMConstInt(ctx->i32, idx, false), "");
811
812 if (has_ds_bpermute) {
813 args[0] = LLVMBuildMul(ctx->builder, tl_tid,
814 LLVMConstInt(ctx->i32, 4, false), "");
815 args[1] = val;
816 tl = ac_build_intrinsic(ctx,
817 "llvm.amdgcn.ds.bpermute", ctx->i32,
818 args, 2,
819 AC_FUNC_ATTR_READNONE |
820 AC_FUNC_ATTR_CONVERGENT);
821
822 args[0] = LLVMBuildMul(ctx->builder, trbl_tid,
823 LLVMConstInt(ctx->i32, 4, false), "");
824 trbl = ac_build_intrinsic(ctx,
825 "llvm.amdgcn.ds.bpermute", ctx->i32,
826 args, 2,
827 AC_FUNC_ATTR_READNONE |
828 AC_FUNC_ATTR_CONVERGENT);
829 } else {
830 LLVMValueRef store_ptr, load_ptr0, load_ptr1;
831
832 store_ptr = ac_build_gep0(ctx, lds, thread_id);
833 load_ptr0 = ac_build_gep0(ctx, lds, tl_tid);
834 load_ptr1 = ac_build_gep0(ctx, lds, trbl_tid);
835
836 LLVMBuildStore(ctx->builder, val, store_ptr);
837 tl = LLVMBuildLoad(ctx->builder, load_ptr0, "");
838 trbl = LLVMBuildLoad(ctx->builder, load_ptr1, "");
839 }
840
841 tl = LLVMBuildBitCast(ctx->builder, tl, ctx->f32, "");
842 trbl = LLVMBuildBitCast(ctx->builder, trbl, ctx->f32, "");
843 result = LLVMBuildFSub(ctx->builder, trbl, tl, "");
844 return result;
845 }
846
847 void
848 ac_build_sendmsg(struct ac_llvm_context *ctx,
849 uint32_t msg,
850 LLVMValueRef wave_id)
851 {
852 LLVMValueRef args[2];
853 const char *intr_name = (HAVE_LLVM < 0x0400) ? "llvm.SI.sendmsg" : "llvm.amdgcn.s.sendmsg";
854 args[0] = LLVMConstInt(ctx->i32, msg, false);
855 args[1] = wave_id;
856 ac_build_intrinsic(ctx, intr_name, ctx->voidt, args, 2, 0);
857 }
858
859 LLVMValueRef
860 ac_build_imsb(struct ac_llvm_context *ctx,
861 LLVMValueRef arg,
862 LLVMTypeRef dst_type)
863 {
864 const char *intr_name = (HAVE_LLVM < 0x0400) ? "llvm.AMDGPU.flbit.i32" :
865 "llvm.amdgcn.sffbh.i32";
866 LLVMValueRef msb = ac_build_intrinsic(ctx, intr_name,
867 dst_type, &arg, 1,
868 AC_FUNC_ATTR_READNONE);
869
870 /* The HW returns the last bit index from MSB, but NIR/TGSI wants
871 * the index from LSB. Invert it by doing "31 - msb". */
872 msb = LLVMBuildSub(ctx->builder, LLVMConstInt(ctx->i32, 31, false),
873 msb, "");
874
875 LLVMValueRef all_ones = LLVMConstInt(ctx->i32, -1, true);
876 LLVMValueRef cond = LLVMBuildOr(ctx->builder,
877 LLVMBuildICmp(ctx->builder, LLVMIntEQ,
878 arg, LLVMConstInt(ctx->i32, 0, 0), ""),
879 LLVMBuildICmp(ctx->builder, LLVMIntEQ,
880 arg, all_ones, ""), "");
881
882 return LLVMBuildSelect(ctx->builder, cond, all_ones, msb, "");
883 }
884
885 LLVMValueRef
886 ac_build_umsb(struct ac_llvm_context *ctx,
887 LLVMValueRef arg,
888 LLVMTypeRef dst_type)
889 {
890 LLVMValueRef args[2] = {
891 arg,
892 LLVMConstInt(ctx->i1, 1, 0),
893 };
894 LLVMValueRef msb = ac_build_intrinsic(ctx, "llvm.ctlz.i32",
895 dst_type, args, ARRAY_SIZE(args),
896 AC_FUNC_ATTR_READNONE);
897
898 /* The HW returns the last bit index from MSB, but TGSI/NIR wants
899 * the index from LSB. Invert it by doing "31 - msb". */
900 msb = LLVMBuildSub(ctx->builder, LLVMConstInt(ctx->i32, 31, false),
901 msb, "");
902
903 /* check for zero */
904 return LLVMBuildSelect(ctx->builder,
905 LLVMBuildICmp(ctx->builder, LLVMIntEQ, arg,
906 LLVMConstInt(ctx->i32, 0, 0), ""),
907 LLVMConstInt(ctx->i32, -1, true), msb, "");
908 }
909
910 LLVMValueRef ac_build_clamp(struct ac_llvm_context *ctx, LLVMValueRef value)
911 {
912 if (HAVE_LLVM >= 0x0500) {
913 LLVMValueRef max[2] = {
914 value,
915 LLVMConstReal(ctx->f32, 0),
916 };
917 LLVMValueRef min[2] = {
918 LLVMConstReal(ctx->f32, 1),
919 };
920
921 min[1] = ac_build_intrinsic(ctx, "llvm.maxnum.f32",
922 ctx->f32, max, 2,
923 AC_FUNC_ATTR_READNONE);
924 return ac_build_intrinsic(ctx, "llvm.minnum.f32",
925 ctx->f32, min, 2,
926 AC_FUNC_ATTR_READNONE);
927 }
928
929 LLVMValueRef args[3] = {
930 value,
931 LLVMConstReal(ctx->f32, 0),
932 LLVMConstReal(ctx->f32, 1),
933 };
934
935 return ac_build_intrinsic(ctx, "llvm.AMDGPU.clamp.", ctx->f32, args, 3,
936 AC_FUNC_ATTR_READNONE |
937 AC_FUNC_ATTR_LEGACY);
938 }
939
940 void ac_build_export(struct ac_llvm_context *ctx, struct ac_export_args *a)
941 {
942 LLVMValueRef args[9];
943
944 if (HAVE_LLVM >= 0x0500) {
945 args[0] = LLVMConstInt(ctx->i32, a->target, 0);
946 args[1] = LLVMConstInt(ctx->i32, a->enabled_channels, 0);
947
948 if (a->compr) {
949 LLVMTypeRef i16 = LLVMInt16TypeInContext(ctx->context);
950 LLVMTypeRef v2i16 = LLVMVectorType(i16, 2);
951
952 args[2] = LLVMBuildBitCast(ctx->builder, a->out[0],
953 v2i16, "");
954 args[3] = LLVMBuildBitCast(ctx->builder, a->out[1],
955 v2i16, "");
956 args[4] = LLVMConstInt(ctx->i1, a->done, 0);
957 args[5] = LLVMConstInt(ctx->i1, a->valid_mask, 0);
958
959 ac_build_intrinsic(ctx, "llvm.amdgcn.exp.compr.v2i16",
960 ctx->voidt, args, 6, 0);
961 } else {
962 args[2] = a->out[0];
963 args[3] = a->out[1];
964 args[4] = a->out[2];
965 args[5] = a->out[3];
966 args[6] = LLVMConstInt(ctx->i1, a->done, 0);
967 args[7] = LLVMConstInt(ctx->i1, a->valid_mask, 0);
968
969 ac_build_intrinsic(ctx, "llvm.amdgcn.exp.f32",
970 ctx->voidt, args, 8, 0);
971 }
972 return;
973 }
974
975 args[0] = LLVMConstInt(ctx->i32, a->enabled_channels, 0);
976 args[1] = LLVMConstInt(ctx->i32, a->valid_mask, 0);
977 args[2] = LLVMConstInt(ctx->i32, a->done, 0);
978 args[3] = LLVMConstInt(ctx->i32, a->target, 0);
979 args[4] = LLVMConstInt(ctx->i32, a->compr, 0);
980 memcpy(args + 5, a->out, sizeof(a->out[0]) * 4);
981
982 ac_build_intrinsic(ctx, "llvm.SI.export", ctx->voidt, args, 9,
983 AC_FUNC_ATTR_LEGACY);
984 }
985
986 LLVMValueRef ac_build_image_opcode(struct ac_llvm_context *ctx,
987 struct ac_image_args *a)
988 {
989 LLVMTypeRef dst_type;
990 LLVMValueRef args[11];
991 unsigned num_args = 0;
992 const char *name;
993 char intr_name[128], type[64];
994
995 if (HAVE_LLVM >= 0x0400) {
996 bool sample = a->opcode == ac_image_sample ||
997 a->opcode == ac_image_gather4 ||
998 a->opcode == ac_image_get_lod;
999
1000 if (sample)
1001 args[num_args++] = bitcast_to_float(ctx, a->addr);
1002 else
1003 args[num_args++] = a->addr;
1004
1005 args[num_args++] = a->resource;
1006 if (sample)
1007 args[num_args++] = a->sampler;
1008 args[num_args++] = LLVMConstInt(ctx->i32, a->dmask, 0);
1009 if (sample)
1010 args[num_args++] = LLVMConstInt(ctx->i1, a->unorm, 0);
1011 args[num_args++] = LLVMConstInt(ctx->i1, 0, 0); /* glc */
1012 args[num_args++] = LLVMConstInt(ctx->i1, 0, 0); /* slc */
1013 args[num_args++] = LLVMConstInt(ctx->i1, 0, 0); /* lwe */
1014 args[num_args++] = LLVMConstInt(ctx->i1, a->da, 0);
1015
1016 switch (a->opcode) {
1017 case ac_image_sample:
1018 name = "llvm.amdgcn.image.sample";
1019 break;
1020 case ac_image_gather4:
1021 name = "llvm.amdgcn.image.gather4";
1022 break;
1023 case ac_image_load:
1024 name = "llvm.amdgcn.image.load";
1025 break;
1026 case ac_image_load_mip:
1027 name = "llvm.amdgcn.image.load.mip";
1028 break;
1029 case ac_image_get_lod:
1030 name = "llvm.amdgcn.image.getlod";
1031 break;
1032 case ac_image_get_resinfo:
1033 name = "llvm.amdgcn.image.getresinfo";
1034 break;
1035 default:
1036 unreachable("invalid image opcode");
1037 }
1038
1039 ac_build_type_name_for_intr(LLVMTypeOf(args[0]), type,
1040 sizeof(type));
1041
1042 snprintf(intr_name, sizeof(intr_name), "%s%s%s%s.v4f32.%s.v8i32",
1043 name,
1044 a->compare ? ".c" : "",
1045 a->bias ? ".b" :
1046 a->lod ? ".l" :
1047 a->deriv ? ".d" :
1048 a->level_zero ? ".lz" : "",
1049 a->offset ? ".o" : "",
1050 type);
1051
1052 LLVMValueRef result =
1053 ac_build_intrinsic(ctx, intr_name,
1054 ctx->v4f32, args, num_args,
1055 AC_FUNC_ATTR_READNONE);
1056 if (!sample) {
1057 result = LLVMBuildBitCast(ctx->builder, result,
1058 ctx->v4i32, "");
1059 }
1060 return result;
1061 }
1062
1063 args[num_args++] = a->addr;
1064 args[num_args++] = a->resource;
1065
1066 if (a->opcode == ac_image_load ||
1067 a->opcode == ac_image_load_mip ||
1068 a->opcode == ac_image_get_resinfo) {
1069 dst_type = ctx->v4i32;
1070 } else {
1071 dst_type = ctx->v4f32;
1072 args[num_args++] = a->sampler;
1073 }
1074
1075 args[num_args++] = LLVMConstInt(ctx->i32, a->dmask, 0);
1076 args[num_args++] = LLVMConstInt(ctx->i32, a->unorm, 0);
1077 args[num_args++] = LLVMConstInt(ctx->i32, 0, 0); /* r128 */
1078 args[num_args++] = LLVMConstInt(ctx->i32, a->da, 0);
1079 args[num_args++] = LLVMConstInt(ctx->i32, 0, 0); /* glc */
1080 args[num_args++] = LLVMConstInt(ctx->i32, 0, 0); /* slc */
1081 args[num_args++] = LLVMConstInt(ctx->i32, 0, 0); /* tfe */
1082 args[num_args++] = LLVMConstInt(ctx->i32, 0, 0); /* lwe */
1083
1084 switch (a->opcode) {
1085 case ac_image_sample:
1086 name = "llvm.SI.image.sample";
1087 break;
1088 case ac_image_gather4:
1089 name = "llvm.SI.gather4";
1090 break;
1091 case ac_image_load:
1092 name = "llvm.SI.image.load";
1093 break;
1094 case ac_image_load_mip:
1095 name = "llvm.SI.image.load.mip";
1096 break;
1097 case ac_image_get_lod:
1098 name = "llvm.SI.getlod";
1099 break;
1100 case ac_image_get_resinfo:
1101 name = "llvm.SI.getresinfo";
1102 break;
1103 }
1104
1105 ac_build_type_name_for_intr(LLVMTypeOf(a->addr), type, sizeof(type));
1106 snprintf(intr_name, sizeof(intr_name), "%s%s%s%s.%s",
1107 name,
1108 a->compare ? ".c" : "",
1109 a->bias ? ".b" :
1110 a->lod ? ".l" :
1111 a->deriv ? ".d" :
1112 a->level_zero ? ".lz" : "",
1113 a->offset ? ".o" : "",
1114 type);
1115
1116 return ac_build_intrinsic(ctx, intr_name,
1117 dst_type, args, num_args,
1118 AC_FUNC_ATTR_READNONE |
1119 AC_FUNC_ATTR_LEGACY);
1120 }
1121
1122 LLVMValueRef ac_build_cvt_pkrtz_f16(struct ac_llvm_context *ctx,
1123 LLVMValueRef args[2])
1124 {
1125 if (HAVE_LLVM >= 0x0500) {
1126 LLVMTypeRef v2f16 =
1127 LLVMVectorType(LLVMHalfTypeInContext(ctx->context), 2);
1128 LLVMValueRef res =
1129 ac_build_intrinsic(ctx, "llvm.amdgcn.cvt.pkrtz",
1130 v2f16, args, 2,
1131 AC_FUNC_ATTR_READNONE);
1132 return LLVMBuildBitCast(ctx->builder, res, ctx->i32, "");
1133 }
1134
1135 return ac_build_intrinsic(ctx, "llvm.SI.packf16", ctx->i32, args, 2,
1136 AC_FUNC_ATTR_READNONE |
1137 AC_FUNC_ATTR_LEGACY);
1138 }
1139
1140 /**
1141 * KILL, AKA discard in GLSL.
1142 *
1143 * \param value kill if value < 0.0 or value == NULL.
1144 */
1145 void ac_build_kill(struct ac_llvm_context *ctx, LLVMValueRef value)
1146 {
1147 if (value) {
1148 ac_build_intrinsic(ctx, "llvm.AMDGPU.kill", ctx->voidt,
1149 &value, 1, AC_FUNC_ATTR_LEGACY);
1150 } else {
1151 ac_build_intrinsic(ctx, "llvm.AMDGPU.kilp", ctx->voidt,
1152 NULL, 0, AC_FUNC_ATTR_LEGACY);
1153 }
1154 }
1155
1156 LLVMValueRef ac_build_bfe(struct ac_llvm_context *ctx, LLVMValueRef input,
1157 LLVMValueRef offset, LLVMValueRef width,
1158 bool is_signed)
1159 {
1160 LLVMValueRef args[] = {
1161 input,
1162 offset,
1163 width,
1164 };
1165
1166 if (HAVE_LLVM >= 0x0500) {
1167 return ac_build_intrinsic(ctx,
1168 is_signed ? "llvm.amdgcn.sbfe.i32" :
1169 "llvm.amdgcn.ubfe.i32",
1170 ctx->i32, args, 3,
1171 AC_FUNC_ATTR_READNONE);
1172 }
1173
1174 return ac_build_intrinsic(ctx,
1175 is_signed ? "llvm.AMDGPU.bfe.i32" :
1176 "llvm.AMDGPU.bfe.u32",
1177 ctx->i32, args, 3,
1178 AC_FUNC_ATTR_READNONE |
1179 AC_FUNC_ATTR_LEGACY);
1180 }
1181
1182 void ac_get_image_intr_name(const char *base_name,
1183 LLVMTypeRef data_type,
1184 LLVMTypeRef coords_type,
1185 LLVMTypeRef rsrc_type,
1186 char *out_name, unsigned out_len)
1187 {
1188 char coords_type_name[8];
1189
1190 ac_build_type_name_for_intr(coords_type, coords_type_name,
1191 sizeof(coords_type_name));
1192
1193 if (HAVE_LLVM <= 0x0309) {
1194 snprintf(out_name, out_len, "%s.%s", base_name, coords_type_name);
1195 } else {
1196 char data_type_name[8];
1197 char rsrc_type_name[8];
1198
1199 ac_build_type_name_for_intr(data_type, data_type_name,
1200 sizeof(data_type_name));
1201 ac_build_type_name_for_intr(rsrc_type, rsrc_type_name,
1202 sizeof(rsrc_type_name));
1203 snprintf(out_name, out_len, "%s.%s.%s.%s", base_name,
1204 data_type_name, coords_type_name, rsrc_type_name);
1205 }
1206 }
1207
1208 #define AC_EXP_TARGET (HAVE_LLVM >= 0x0500 ? 0 : 3)
1209 #define AC_EXP_OUT0 (HAVE_LLVM >= 0x0500 ? 2 : 5)
1210
1211 enum ac_ir_type {
1212 AC_IR_UNDEF,
1213 AC_IR_CONST,
1214 AC_IR_VALUE,
1215 };
1216
1217 struct ac_vs_exp_chan
1218 {
1219 LLVMValueRef value;
1220 float const_float;
1221 enum ac_ir_type type;
1222 };
1223
1224 struct ac_vs_exp_inst {
1225 unsigned offset;
1226 LLVMValueRef inst;
1227 struct ac_vs_exp_chan chan[4];
1228 };
1229
1230 struct ac_vs_exports {
1231 unsigned num;
1232 struct ac_vs_exp_inst exp[VARYING_SLOT_MAX];
1233 };
1234
1235 /* Return true if the PARAM export has been eliminated. */
1236 static bool ac_eliminate_const_output(uint8_t *vs_output_param_offset,
1237 uint32_t num_outputs,
1238 struct ac_vs_exp_inst *exp)
1239 {
1240 unsigned i, default_val; /* SPI_PS_INPUT_CNTL_i.DEFAULT_VAL */
1241 bool is_zero[4] = {}, is_one[4] = {};
1242
1243 for (i = 0; i < 4; i++) {
1244 /* It's a constant expression. Undef outputs are eliminated too. */
1245 if (exp->chan[i].type == AC_IR_UNDEF) {
1246 is_zero[i] = true;
1247 is_one[i] = true;
1248 } else if (exp->chan[i].type == AC_IR_CONST) {
1249 if (exp->chan[i].const_float == 0)
1250 is_zero[i] = true;
1251 else if (exp->chan[i].const_float == 1)
1252 is_one[i] = true;
1253 else
1254 return false; /* other constant */
1255 } else
1256 return false;
1257 }
1258
1259 /* Only certain combinations of 0 and 1 can be eliminated. */
1260 if (is_zero[0] && is_zero[1] && is_zero[2])
1261 default_val = is_zero[3] ? 0 : 1;
1262 else if (is_one[0] && is_one[1] && is_one[2])
1263 default_val = is_zero[3] ? 2 : 3;
1264 else
1265 return false;
1266
1267 /* The PARAM export can be represented as DEFAULT_VAL. Kill it. */
1268 LLVMInstructionEraseFromParent(exp->inst);
1269
1270 /* Change OFFSET to DEFAULT_VAL. */
1271 for (i = 0; i < num_outputs; i++) {
1272 if (vs_output_param_offset[i] == exp->offset) {
1273 vs_output_param_offset[i] =
1274 AC_EXP_PARAM_DEFAULT_VAL_0000 + default_val;
1275 break;
1276 }
1277 }
1278 return true;
1279 }
1280
1281 static bool ac_eliminate_duplicated_output(uint8_t *vs_output_param_offset,
1282 uint32_t num_outputs,
1283 struct ac_vs_exports *processed,
1284 struct ac_vs_exp_inst *exp)
1285 {
1286 unsigned p, copy_back_channels = 0;
1287
1288 /* See if the output is already in the list of processed outputs.
1289 * The LLVMValueRef comparison relies on SSA.
1290 */
1291 for (p = 0; p < processed->num; p++) {
1292 bool different = false;
1293
1294 for (unsigned j = 0; j < 4; j++) {
1295 struct ac_vs_exp_chan *c1 = &processed->exp[p].chan[j];
1296 struct ac_vs_exp_chan *c2 = &exp->chan[j];
1297
1298 /* Treat undef as a match. */
1299 if (c2->type == AC_IR_UNDEF)
1300 continue;
1301
1302 /* If c1 is undef but c2 isn't, we can copy c2 to c1
1303 * and consider the instruction duplicated.
1304 */
1305 if (c1->type == AC_IR_UNDEF) {
1306 copy_back_channels |= 1 << j;
1307 continue;
1308 }
1309
1310 /* Test whether the channels are not equal. */
1311 if (c1->type != c2->type ||
1312 (c1->type == AC_IR_CONST &&
1313 c1->const_float != c2->const_float) ||
1314 (c1->type == AC_IR_VALUE &&
1315 c1->value != c2->value)) {
1316 different = true;
1317 break;
1318 }
1319 }
1320 if (!different)
1321 break;
1322
1323 copy_back_channels = 0;
1324 }
1325 if (p == processed->num)
1326 return false;
1327
1328 /* If a match was found, but the matching export has undef where the new
1329 * one has a normal value, copy the normal value to the undef channel.
1330 */
1331 struct ac_vs_exp_inst *match = &processed->exp[p];
1332
1333 while (copy_back_channels) {
1334 unsigned chan = u_bit_scan(&copy_back_channels);
1335
1336 assert(match->chan[chan].type == AC_IR_UNDEF);
1337 LLVMSetOperand(match->inst, AC_EXP_OUT0 + chan,
1338 exp->chan[chan].value);
1339 match->chan[chan] = exp->chan[chan];
1340 }
1341
1342 /* The PARAM export is duplicated. Kill it. */
1343 LLVMInstructionEraseFromParent(exp->inst);
1344
1345 /* Change OFFSET to the matching export. */
1346 for (unsigned i = 0; i < num_outputs; i++) {
1347 if (vs_output_param_offset[i] == exp->offset) {
1348 vs_output_param_offset[i] = match->offset;
1349 break;
1350 }
1351 }
1352 return true;
1353 }
1354
1355 void ac_optimize_vs_outputs(struct ac_llvm_context *ctx,
1356 LLVMValueRef main_fn,
1357 uint8_t *vs_output_param_offset,
1358 uint32_t num_outputs,
1359 uint8_t *num_param_exports)
1360 {
1361 LLVMBasicBlockRef bb;
1362 bool removed_any = false;
1363 struct ac_vs_exports exports;
1364
1365 exports.num = 0;
1366
1367 /* Process all LLVM instructions. */
1368 bb = LLVMGetFirstBasicBlock(main_fn);
1369 while (bb) {
1370 LLVMValueRef inst = LLVMGetFirstInstruction(bb);
1371
1372 while (inst) {
1373 LLVMValueRef cur = inst;
1374 inst = LLVMGetNextInstruction(inst);
1375 struct ac_vs_exp_inst exp;
1376
1377 if (LLVMGetInstructionOpcode(cur) != LLVMCall)
1378 continue;
1379
1380 LLVMValueRef callee = ac_llvm_get_called_value(cur);
1381
1382 if (!ac_llvm_is_function(callee))
1383 continue;
1384
1385 const char *name = LLVMGetValueName(callee);
1386 unsigned num_args = LLVMCountParams(callee);
1387
1388 /* Check if this is an export instruction. */
1389 if ((num_args != 9 && num_args != 8) ||
1390 (strcmp(name, "llvm.SI.export") &&
1391 strcmp(name, "llvm.amdgcn.exp.f32")))
1392 continue;
1393
1394 LLVMValueRef arg = LLVMGetOperand(cur, AC_EXP_TARGET);
1395 unsigned target = LLVMConstIntGetZExtValue(arg);
1396
1397 if (target < V_008DFC_SQ_EXP_PARAM)
1398 continue;
1399
1400 target -= V_008DFC_SQ_EXP_PARAM;
1401
1402 /* Parse the instruction. */
1403 memset(&exp, 0, sizeof(exp));
1404 exp.offset = target;
1405 exp.inst = cur;
1406
1407 for (unsigned i = 0; i < 4; i++) {
1408 LLVMValueRef v = LLVMGetOperand(cur, AC_EXP_OUT0 + i);
1409
1410 exp.chan[i].value = v;
1411
1412 if (LLVMIsUndef(v)) {
1413 exp.chan[i].type = AC_IR_UNDEF;
1414 } else if (LLVMIsAConstantFP(v)) {
1415 LLVMBool loses_info;
1416 exp.chan[i].type = AC_IR_CONST;
1417 exp.chan[i].const_float =
1418 LLVMConstRealGetDouble(v, &loses_info);
1419 } else {
1420 exp.chan[i].type = AC_IR_VALUE;
1421 }
1422 }
1423
1424 /* Eliminate constant and duplicated PARAM exports. */
1425 if (ac_eliminate_const_output(vs_output_param_offset,
1426 num_outputs, &exp) ||
1427 ac_eliminate_duplicated_output(vs_output_param_offset,
1428 num_outputs, &exports,
1429 &exp)) {
1430 removed_any = true;
1431 } else {
1432 exports.exp[exports.num++] = exp;
1433 }
1434 }
1435 bb = LLVMGetNextBasicBlock(bb);
1436 }
1437
1438 /* Remove holes in export memory due to removed PARAM exports.
1439 * This is done by renumbering all PARAM exports.
1440 */
1441 if (removed_any) {
1442 uint8_t old_offset[VARYING_SLOT_MAX];
1443 unsigned out, i;
1444
1445 /* Make a copy of the offsets. We need the old version while
1446 * we are modifying some of them. */
1447 memcpy(old_offset, vs_output_param_offset,
1448 sizeof(old_offset));
1449
1450 for (i = 0; i < exports.num; i++) {
1451 unsigned offset = exports.exp[i].offset;
1452
1453 /* Update vs_output_param_offset. Multiple outputs can
1454 * have the same offset.
1455 */
1456 for (out = 0; out < num_outputs; out++) {
1457 if (old_offset[out] == offset)
1458 vs_output_param_offset[out] = i;
1459 }
1460
1461 /* Change the PARAM offset in the instruction. */
1462 LLVMSetOperand(exports.exp[i].inst, AC_EXP_TARGET,
1463 LLVMConstInt(ctx->i32,
1464 V_008DFC_SQ_EXP_PARAM + i, 0));
1465 }
1466 *num_param_exports = exports.num;
1467 }
1468 }