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ac/nir: assert printfs will fit
[mesa.git] / src / amd / common / ac_llvm_build.c
1 /*
2 * Copyright 2014 Advanced Micro Devices, Inc.
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the
6 * "Software"), to deal in the Software without restriction, including
7 * without limitation the rights to use, copy, modify, merge, publish,
8 * distribute, sub license, and/or sell copies of the Software, and to
9 * permit persons to whom the Software is furnished to do so, subject to
10 * the following conditions:
11 *
12 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
13 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
14 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
15 * THE COPYRIGHT HOLDERS, AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM,
16 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
17 * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
18 * USE OR OTHER DEALINGS IN THE SOFTWARE.
19 *
20 * The above copyright notice and this permission notice (including the
21 * next paragraph) shall be included in all copies or substantial portions
22 * of the Software.
23 *
24 */
25 /* based on pieces from si_pipe.c and radeon_llvm_emit.c */
26 #include "ac_llvm_build.h"
27
28 #include <llvm-c/Core.h>
29
30 #include "c11/threads.h"
31
32 #include <assert.h>
33 #include <stdio.h>
34
35 #include "ac_llvm_util.h"
36 #include "ac_exp_param.h"
37 #include "util/bitscan.h"
38 #include "util/macros.h"
39 #include "sid.h"
40
41 #include "shader_enums.h"
42
43 /* Initialize module-independent parts of the context.
44 *
45 * The caller is responsible for initializing ctx::module and ctx::builder.
46 */
47 void
48 ac_llvm_context_init(struct ac_llvm_context *ctx, LLVMContextRef context)
49 {
50 LLVMValueRef args[1];
51
52 ctx->context = context;
53 ctx->module = NULL;
54 ctx->builder = NULL;
55
56 ctx->voidt = LLVMVoidTypeInContext(ctx->context);
57 ctx->i1 = LLVMInt1TypeInContext(ctx->context);
58 ctx->i8 = LLVMInt8TypeInContext(ctx->context);
59 ctx->i16 = LLVMIntTypeInContext(ctx->context, 16);
60 ctx->i32 = LLVMIntTypeInContext(ctx->context, 32);
61 ctx->i64 = LLVMIntTypeInContext(ctx->context, 64);
62 ctx->f16 = LLVMHalfTypeInContext(ctx->context);
63 ctx->f32 = LLVMFloatTypeInContext(ctx->context);
64 ctx->f64 = LLVMDoubleTypeInContext(ctx->context);
65 ctx->v4i32 = LLVMVectorType(ctx->i32, 4);
66 ctx->v4f32 = LLVMVectorType(ctx->f32, 4);
67 ctx->v8i32 = LLVMVectorType(ctx->i32, 8);
68 ctx->v16i8 = LLVMVectorType(ctx->i8, 16);
69
70 ctx->i32_0 = LLVMConstInt(ctx->i32, 0, false);
71 ctx->i32_1 = LLVMConstInt(ctx->i32, 1, false);
72 ctx->f32_0 = LLVMConstReal(ctx->f32, 0.0);
73 ctx->f32_1 = LLVMConstReal(ctx->f32, 1.0);
74
75 ctx->range_md_kind = LLVMGetMDKindIDInContext(ctx->context,
76 "range", 5);
77
78 ctx->invariant_load_md_kind = LLVMGetMDKindIDInContext(ctx->context,
79 "invariant.load", 14);
80
81 ctx->fpmath_md_kind = LLVMGetMDKindIDInContext(ctx->context, "fpmath", 6);
82
83 args[0] = LLVMConstReal(ctx->f32, 2.5);
84 ctx->fpmath_md_2p5_ulp = LLVMMDNodeInContext(ctx->context, args, 1);
85
86 ctx->uniform_md_kind = LLVMGetMDKindIDInContext(ctx->context,
87 "amdgpu.uniform", 14);
88
89 ctx->empty_md = LLVMMDNodeInContext(ctx->context, NULL, 0);
90 }
91
92 LLVMValueRef
93 ac_build_intrinsic(struct ac_llvm_context *ctx, const char *name,
94 LLVMTypeRef return_type, LLVMValueRef *params,
95 unsigned param_count, unsigned attrib_mask)
96 {
97 LLVMValueRef function, call;
98 bool set_callsite_attrs = HAVE_LLVM >= 0x0400 &&
99 !(attrib_mask & AC_FUNC_ATTR_LEGACY);
100
101 function = LLVMGetNamedFunction(ctx->module, name);
102 if (!function) {
103 LLVMTypeRef param_types[32], function_type;
104 unsigned i;
105
106 assert(param_count <= 32);
107
108 for (i = 0; i < param_count; ++i) {
109 assert(params[i]);
110 param_types[i] = LLVMTypeOf(params[i]);
111 }
112 function_type =
113 LLVMFunctionType(return_type, param_types, param_count, 0);
114 function = LLVMAddFunction(ctx->module, name, function_type);
115
116 LLVMSetFunctionCallConv(function, LLVMCCallConv);
117 LLVMSetLinkage(function, LLVMExternalLinkage);
118
119 if (!set_callsite_attrs)
120 ac_add_func_attributes(ctx->context, function, attrib_mask);
121 }
122
123 call = LLVMBuildCall(ctx->builder, function, params, param_count, "");
124 if (set_callsite_attrs)
125 ac_add_func_attributes(ctx->context, call, attrib_mask);
126 return call;
127 }
128
129 static LLVMValueRef bitcast_to_float(struct ac_llvm_context *ctx,
130 LLVMValueRef value)
131 {
132 LLVMTypeRef type = LLVMTypeOf(value);
133 LLVMTypeRef new_type;
134
135 if (LLVMGetTypeKind(type) == LLVMVectorTypeKind)
136 new_type = LLVMVectorType(ctx->f32, LLVMGetVectorSize(type));
137 else
138 new_type = ctx->f32;
139
140 return LLVMBuildBitCast(ctx->builder, value, new_type, "");
141 }
142
143 /**
144 * Given the i32 or vNi32 \p type, generate the textual name (e.g. for use with
145 * intrinsic names).
146 */
147 void ac_build_type_name_for_intr(LLVMTypeRef type, char *buf, unsigned bufsize)
148 {
149 LLVMTypeRef elem_type = type;
150
151 assert(bufsize >= 8);
152
153 if (LLVMGetTypeKind(type) == LLVMVectorTypeKind) {
154 int ret = snprintf(buf, bufsize, "v%u",
155 LLVMGetVectorSize(type));
156 if (ret < 0) {
157 char *type_name = LLVMPrintTypeToString(type);
158 fprintf(stderr, "Error building type name for: %s\n",
159 type_name);
160 return;
161 }
162 elem_type = LLVMGetElementType(type);
163 buf += ret;
164 bufsize -= ret;
165 }
166 switch (LLVMGetTypeKind(elem_type)) {
167 default: break;
168 case LLVMIntegerTypeKind:
169 snprintf(buf, bufsize, "i%d", LLVMGetIntTypeWidth(elem_type));
170 break;
171 case LLVMFloatTypeKind:
172 snprintf(buf, bufsize, "f32");
173 break;
174 case LLVMDoubleTypeKind:
175 snprintf(buf, bufsize, "f64");
176 break;
177 }
178 }
179
180 LLVMValueRef
181 ac_build_gather_values_extended(struct ac_llvm_context *ctx,
182 LLVMValueRef *values,
183 unsigned value_count,
184 unsigned value_stride,
185 bool load)
186 {
187 LLVMBuilderRef builder = ctx->builder;
188 LLVMValueRef vec = NULL;
189 unsigned i;
190
191 if (value_count == 1) {
192 if (load)
193 return LLVMBuildLoad(builder, values[0], "");
194 return values[0];
195 } else if (!value_count)
196 unreachable("value_count is 0");
197
198 for (i = 0; i < value_count; i++) {
199 LLVMValueRef value = values[i * value_stride];
200 if (load)
201 value = LLVMBuildLoad(builder, value, "");
202
203 if (!i)
204 vec = LLVMGetUndef( LLVMVectorType(LLVMTypeOf(value), value_count));
205 LLVMValueRef index = LLVMConstInt(ctx->i32, i, false);
206 vec = LLVMBuildInsertElement(builder, vec, value, index, "");
207 }
208 return vec;
209 }
210
211 LLVMValueRef
212 ac_build_gather_values(struct ac_llvm_context *ctx,
213 LLVMValueRef *values,
214 unsigned value_count)
215 {
216 return ac_build_gather_values_extended(ctx, values, value_count, 1, false);
217 }
218
219 LLVMValueRef
220 ac_build_fdiv(struct ac_llvm_context *ctx,
221 LLVMValueRef num,
222 LLVMValueRef den)
223 {
224 LLVMValueRef ret = LLVMBuildFDiv(ctx->builder, num, den, "");
225
226 if (!LLVMIsConstant(ret))
227 LLVMSetMetadata(ret, ctx->fpmath_md_kind, ctx->fpmath_md_2p5_ulp);
228 return ret;
229 }
230
231 /* Coordinates for cube map selection. sc, tc, and ma are as in Table 8.27
232 * of the OpenGL 4.5 (Compatibility Profile) specification, except ma is
233 * already multiplied by two. id is the cube face number.
234 */
235 struct cube_selection_coords {
236 LLVMValueRef stc[2];
237 LLVMValueRef ma;
238 LLVMValueRef id;
239 };
240
241 static void
242 build_cube_intrinsic(struct ac_llvm_context *ctx,
243 LLVMValueRef in[3],
244 struct cube_selection_coords *out)
245 {
246 LLVMTypeRef f32 = ctx->f32;
247
248 out->stc[1] = ac_build_intrinsic(ctx, "llvm.amdgcn.cubetc",
249 f32, in, 3, AC_FUNC_ATTR_READNONE);
250 out->stc[0] = ac_build_intrinsic(ctx, "llvm.amdgcn.cubesc",
251 f32, in, 3, AC_FUNC_ATTR_READNONE);
252 out->ma = ac_build_intrinsic(ctx, "llvm.amdgcn.cubema",
253 f32, in, 3, AC_FUNC_ATTR_READNONE);
254 out->id = ac_build_intrinsic(ctx, "llvm.amdgcn.cubeid",
255 f32, in, 3, AC_FUNC_ATTR_READNONE);
256 }
257
258 /**
259 * Build a manual selection sequence for cube face sc/tc coordinates and
260 * major axis vector (multiplied by 2 for consistency) for the given
261 * vec3 \p coords, for the face implied by \p selcoords.
262 *
263 * For the major axis, we always adjust the sign to be in the direction of
264 * selcoords.ma; i.e., a positive out_ma means that coords is pointed towards
265 * the selcoords major axis.
266 */
267 static void build_cube_select(LLVMBuilderRef builder,
268 const struct cube_selection_coords *selcoords,
269 const LLVMValueRef *coords,
270 LLVMValueRef *out_st,
271 LLVMValueRef *out_ma)
272 {
273 LLVMTypeRef f32 = LLVMTypeOf(coords[0]);
274 LLVMValueRef is_ma_positive;
275 LLVMValueRef sgn_ma;
276 LLVMValueRef is_ma_z, is_not_ma_z;
277 LLVMValueRef is_ma_y;
278 LLVMValueRef is_ma_x;
279 LLVMValueRef sgn;
280 LLVMValueRef tmp;
281
282 is_ma_positive = LLVMBuildFCmp(builder, LLVMRealUGE,
283 selcoords->ma, LLVMConstReal(f32, 0.0), "");
284 sgn_ma = LLVMBuildSelect(builder, is_ma_positive,
285 LLVMConstReal(f32, 1.0), LLVMConstReal(f32, -1.0), "");
286
287 is_ma_z = LLVMBuildFCmp(builder, LLVMRealUGE, selcoords->id, LLVMConstReal(f32, 4.0), "");
288 is_not_ma_z = LLVMBuildNot(builder, is_ma_z, "");
289 is_ma_y = LLVMBuildAnd(builder, is_not_ma_z,
290 LLVMBuildFCmp(builder, LLVMRealUGE, selcoords->id, LLVMConstReal(f32, 2.0), ""), "");
291 is_ma_x = LLVMBuildAnd(builder, is_not_ma_z, LLVMBuildNot(builder, is_ma_y, ""), "");
292
293 /* Select sc */
294 tmp = LLVMBuildSelect(builder, is_ma_z, coords[2], coords[0], "");
295 sgn = LLVMBuildSelect(builder, is_ma_y, LLVMConstReal(f32, 1.0),
296 LLVMBuildSelect(builder, is_ma_x, sgn_ma,
297 LLVMBuildFNeg(builder, sgn_ma, ""), ""), "");
298 out_st[0] = LLVMBuildFMul(builder, tmp, sgn, "");
299
300 /* Select tc */
301 tmp = LLVMBuildSelect(builder, is_ma_y, coords[2], coords[1], "");
302 sgn = LLVMBuildSelect(builder, is_ma_y, LLVMBuildFNeg(builder, sgn_ma, ""),
303 LLVMConstReal(f32, -1.0), "");
304 out_st[1] = LLVMBuildFMul(builder, tmp, sgn, "");
305
306 /* Select ma */
307 tmp = LLVMBuildSelect(builder, is_ma_z, coords[2],
308 LLVMBuildSelect(builder, is_ma_y, coords[1], coords[0], ""), "");
309 sgn = LLVMBuildSelect(builder, is_ma_positive,
310 LLVMConstReal(f32, 2.0), LLVMConstReal(f32, -2.0), "");
311 *out_ma = LLVMBuildFMul(builder, tmp, sgn, "");
312 }
313
314 void
315 ac_prepare_cube_coords(struct ac_llvm_context *ctx,
316 bool is_deriv, bool is_array,
317 LLVMValueRef *coords_arg,
318 LLVMValueRef *derivs_arg)
319 {
320
321 LLVMBuilderRef builder = ctx->builder;
322 struct cube_selection_coords selcoords;
323 LLVMValueRef coords[3];
324 LLVMValueRef invma;
325
326 build_cube_intrinsic(ctx, coords_arg, &selcoords);
327
328 invma = ac_build_intrinsic(ctx, "llvm.fabs.f32",
329 ctx->f32, &selcoords.ma, 1, AC_FUNC_ATTR_READNONE);
330 invma = ac_build_fdiv(ctx, LLVMConstReal(ctx->f32, 1.0), invma);
331
332 for (int i = 0; i < 2; ++i)
333 coords[i] = LLVMBuildFMul(builder, selcoords.stc[i], invma, "");
334
335 coords[2] = selcoords.id;
336
337 if (is_deriv && derivs_arg) {
338 LLVMValueRef derivs[4];
339 int axis;
340
341 /* Convert cube derivatives to 2D derivatives. */
342 for (axis = 0; axis < 2; axis++) {
343 LLVMValueRef deriv_st[2];
344 LLVMValueRef deriv_ma;
345
346 /* Transform the derivative alongside the texture
347 * coordinate. Mathematically, the correct formula is
348 * as follows. Assume we're projecting onto the +Z face
349 * and denote by dx/dh the derivative of the (original)
350 * X texture coordinate with respect to horizontal
351 * window coordinates. The projection onto the +Z face
352 * plane is:
353 *
354 * f(x,z) = x/z
355 *
356 * Then df/dh = df/dx * dx/dh + df/dz * dz/dh
357 * = 1/z * dx/dh - x/z * 1/z * dz/dh.
358 *
359 * This motivatives the implementation below.
360 *
361 * Whether this actually gives the expected results for
362 * apps that might feed in derivatives obtained via
363 * finite differences is anyone's guess. The OpenGL spec
364 * seems awfully quiet about how textureGrad for cube
365 * maps should be handled.
366 */
367 build_cube_select(builder, &selcoords, &derivs_arg[axis * 3],
368 deriv_st, &deriv_ma);
369
370 deriv_ma = LLVMBuildFMul(builder, deriv_ma, invma, "");
371
372 for (int i = 0; i < 2; ++i)
373 derivs[axis * 2 + i] =
374 LLVMBuildFSub(builder,
375 LLVMBuildFMul(builder, deriv_st[i], invma, ""),
376 LLVMBuildFMul(builder, deriv_ma, coords[i], ""), "");
377 }
378
379 memcpy(derivs_arg, derivs, sizeof(derivs));
380 }
381
382 /* Shift the texture coordinate. This must be applied after the
383 * derivative calculation.
384 */
385 for (int i = 0; i < 2; ++i)
386 coords[i] = LLVMBuildFAdd(builder, coords[i], LLVMConstReal(ctx->f32, 1.5), "");
387
388 if (is_array) {
389 /* for cube arrays coord.z = coord.w(array_index) * 8 + face */
390 /* coords_arg.w component - array_index for cube arrays */
391 LLVMValueRef tmp = LLVMBuildFMul(ctx->builder, coords_arg[3], LLVMConstReal(ctx->f32, 8.0), "");
392 coords[2] = LLVMBuildFAdd(ctx->builder, tmp, coords[2], "");
393 }
394
395 memcpy(coords_arg, coords, sizeof(coords));
396 }
397
398
399 LLVMValueRef
400 ac_build_fs_interp(struct ac_llvm_context *ctx,
401 LLVMValueRef llvm_chan,
402 LLVMValueRef attr_number,
403 LLVMValueRef params,
404 LLVMValueRef i,
405 LLVMValueRef j)
406 {
407 LLVMValueRef args[5];
408 LLVMValueRef p1;
409
410 if (HAVE_LLVM < 0x0400) {
411 LLVMValueRef ij[2];
412 ij[0] = LLVMBuildBitCast(ctx->builder, i, ctx->i32, "");
413 ij[1] = LLVMBuildBitCast(ctx->builder, j, ctx->i32, "");
414
415 args[0] = llvm_chan;
416 args[1] = attr_number;
417 args[2] = params;
418 args[3] = ac_build_gather_values(ctx, ij, 2);
419 return ac_build_intrinsic(ctx, "llvm.SI.fs.interp",
420 ctx->f32, args, 4,
421 AC_FUNC_ATTR_READNONE);
422 }
423
424 args[0] = i;
425 args[1] = llvm_chan;
426 args[2] = attr_number;
427 args[3] = params;
428
429 p1 = ac_build_intrinsic(ctx, "llvm.amdgcn.interp.p1",
430 ctx->f32, args, 4, AC_FUNC_ATTR_READNONE);
431
432 args[0] = p1;
433 args[1] = j;
434 args[2] = llvm_chan;
435 args[3] = attr_number;
436 args[4] = params;
437
438 return ac_build_intrinsic(ctx, "llvm.amdgcn.interp.p2",
439 ctx->f32, args, 5, AC_FUNC_ATTR_READNONE);
440 }
441
442 LLVMValueRef
443 ac_build_fs_interp_mov(struct ac_llvm_context *ctx,
444 LLVMValueRef parameter,
445 LLVMValueRef llvm_chan,
446 LLVMValueRef attr_number,
447 LLVMValueRef params)
448 {
449 LLVMValueRef args[4];
450 if (HAVE_LLVM < 0x0400) {
451 args[0] = llvm_chan;
452 args[1] = attr_number;
453 args[2] = params;
454
455 return ac_build_intrinsic(ctx,
456 "llvm.SI.fs.constant",
457 ctx->f32, args, 3,
458 AC_FUNC_ATTR_READNONE);
459 }
460
461 args[0] = parameter;
462 args[1] = llvm_chan;
463 args[2] = attr_number;
464 args[3] = params;
465
466 return ac_build_intrinsic(ctx, "llvm.amdgcn.interp.mov",
467 ctx->f32, args, 4, AC_FUNC_ATTR_READNONE);
468 }
469
470 LLVMValueRef
471 ac_build_gep0(struct ac_llvm_context *ctx,
472 LLVMValueRef base_ptr,
473 LLVMValueRef index)
474 {
475 LLVMValueRef indices[2] = {
476 LLVMConstInt(ctx->i32, 0, 0),
477 index,
478 };
479 return LLVMBuildGEP(ctx->builder, base_ptr,
480 indices, 2, "");
481 }
482
483 void
484 ac_build_indexed_store(struct ac_llvm_context *ctx,
485 LLVMValueRef base_ptr, LLVMValueRef index,
486 LLVMValueRef value)
487 {
488 LLVMBuildStore(ctx->builder, value,
489 ac_build_gep0(ctx, base_ptr, index));
490 }
491
492 /**
493 * Build an LLVM bytecode indexed load using LLVMBuildGEP + LLVMBuildLoad.
494 * It's equivalent to doing a load from &base_ptr[index].
495 *
496 * \param base_ptr Where the array starts.
497 * \param index The element index into the array.
498 * \param uniform Whether the base_ptr and index can be assumed to be
499 * dynamically uniform
500 */
501 LLVMValueRef
502 ac_build_indexed_load(struct ac_llvm_context *ctx,
503 LLVMValueRef base_ptr, LLVMValueRef index,
504 bool uniform)
505 {
506 LLVMValueRef pointer;
507
508 pointer = ac_build_gep0(ctx, base_ptr, index);
509 if (uniform)
510 LLVMSetMetadata(pointer, ctx->uniform_md_kind, ctx->empty_md);
511 return LLVMBuildLoad(ctx->builder, pointer, "");
512 }
513
514 /**
515 * Do a load from &base_ptr[index], but also add a flag that it's loading
516 * a constant from a dynamically uniform index.
517 */
518 LLVMValueRef
519 ac_build_indexed_load_const(struct ac_llvm_context *ctx,
520 LLVMValueRef base_ptr, LLVMValueRef index)
521 {
522 LLVMValueRef result = ac_build_indexed_load(ctx, base_ptr, index, true);
523 LLVMSetMetadata(result, ctx->invariant_load_md_kind, ctx->empty_md);
524 return result;
525 }
526
527 /* TBUFFER_STORE_FORMAT_{X,XY,XYZ,XYZW} <- the suffix is selected by num_channels=1..4.
528 * The type of vdata must be one of i32 (num_channels=1), v2i32 (num_channels=2),
529 * or v4i32 (num_channels=3,4).
530 */
531 void
532 ac_build_buffer_store_dword(struct ac_llvm_context *ctx,
533 LLVMValueRef rsrc,
534 LLVMValueRef vdata,
535 unsigned num_channels,
536 LLVMValueRef voffset,
537 LLVMValueRef soffset,
538 unsigned inst_offset,
539 bool glc,
540 bool slc,
541 bool writeonly_memory,
542 bool has_add_tid)
543 {
544 /* TODO: Fix stores with ADD_TID and remove the "has_add_tid" flag. */
545 if (!has_add_tid) {
546 /* Split 3 channel stores, becase LLVM doesn't support 3-channel
547 * intrinsics. */
548 if (num_channels == 3) {
549 LLVMValueRef v[3], v01;
550
551 for (int i = 0; i < 3; i++) {
552 v[i] = LLVMBuildExtractElement(ctx->builder, vdata,
553 LLVMConstInt(ctx->i32, i, 0), "");
554 }
555 v01 = ac_build_gather_values(ctx, v, 2);
556
557 ac_build_buffer_store_dword(ctx, rsrc, v01, 2, voffset,
558 soffset, inst_offset, glc, slc,
559 writeonly_memory, has_add_tid);
560 ac_build_buffer_store_dword(ctx, rsrc, v[2], 1, voffset,
561 soffset, inst_offset + 8,
562 glc, slc,
563 writeonly_memory, has_add_tid);
564 return;
565 }
566
567 unsigned func = CLAMP(num_channels, 1, 3) - 1;
568 static const char *types[] = {"f32", "v2f32", "v4f32"};
569 char name[256];
570 LLVMValueRef offset = soffset;
571
572 if (inst_offset)
573 offset = LLVMBuildAdd(ctx->builder, offset,
574 LLVMConstInt(ctx->i32, inst_offset, 0), "");
575 if (voffset)
576 offset = LLVMBuildAdd(ctx->builder, offset, voffset, "");
577
578 LLVMValueRef args[] = {
579 bitcast_to_float(ctx, vdata),
580 LLVMBuildBitCast(ctx->builder, rsrc, ctx->v4i32, ""),
581 LLVMConstInt(ctx->i32, 0, 0),
582 offset,
583 LLVMConstInt(ctx->i1, glc, 0),
584 LLVMConstInt(ctx->i1, slc, 0),
585 };
586
587 snprintf(name, sizeof(name), "llvm.amdgcn.buffer.store.%s",
588 types[func]);
589
590 ac_build_intrinsic(ctx, name, ctx->voidt,
591 args, ARRAY_SIZE(args),
592 writeonly_memory ?
593 AC_FUNC_ATTR_INACCESSIBLE_MEM_ONLY :
594 AC_FUNC_ATTR_WRITEONLY);
595 return;
596 }
597
598 static unsigned dfmt[] = {
599 V_008F0C_BUF_DATA_FORMAT_32,
600 V_008F0C_BUF_DATA_FORMAT_32_32,
601 V_008F0C_BUF_DATA_FORMAT_32_32_32,
602 V_008F0C_BUF_DATA_FORMAT_32_32_32_32
603 };
604 assert(num_channels >= 1 && num_channels <= 4);
605
606 LLVMValueRef args[] = {
607 rsrc,
608 vdata,
609 LLVMConstInt(ctx->i32, num_channels, 0),
610 voffset ? voffset : LLVMGetUndef(ctx->i32),
611 soffset,
612 LLVMConstInt(ctx->i32, inst_offset, 0),
613 LLVMConstInt(ctx->i32, dfmt[num_channels - 1], 0),
614 LLVMConstInt(ctx->i32, V_008F0C_BUF_NUM_FORMAT_UINT, 0),
615 LLVMConstInt(ctx->i32, voffset != NULL, 0),
616 LLVMConstInt(ctx->i32, 0, 0), /* idxen */
617 LLVMConstInt(ctx->i32, glc, 0),
618 LLVMConstInt(ctx->i32, slc, 0),
619 LLVMConstInt(ctx->i32, 0, 0), /* tfe*/
620 };
621
622 /* The instruction offset field has 12 bits */
623 assert(voffset || inst_offset < (1 << 12));
624
625 /* The intrinsic is overloaded, we need to add a type suffix for overloading to work. */
626 unsigned func = CLAMP(num_channels, 1, 3) - 1;
627 const char *types[] = {"i32", "v2i32", "v4i32"};
628 char name[256];
629 snprintf(name, sizeof(name), "llvm.SI.tbuffer.store.%s", types[func]);
630
631 ac_build_intrinsic(ctx, name, ctx->voidt,
632 args, ARRAY_SIZE(args),
633 AC_FUNC_ATTR_LEGACY);
634 }
635
636 LLVMValueRef
637 ac_build_buffer_load(struct ac_llvm_context *ctx,
638 LLVMValueRef rsrc,
639 int num_channels,
640 LLVMValueRef vindex,
641 LLVMValueRef voffset,
642 LLVMValueRef soffset,
643 unsigned inst_offset,
644 unsigned glc,
645 unsigned slc,
646 bool can_speculate,
647 bool allow_smem)
648 {
649 LLVMValueRef offset = LLVMConstInt(ctx->i32, inst_offset, 0);
650 if (voffset)
651 offset = LLVMBuildAdd(ctx->builder, offset, voffset, "");
652 if (soffset)
653 offset = LLVMBuildAdd(ctx->builder, offset, soffset, "");
654
655 /* TODO: VI and later generations can use SMEM with GLC=1.*/
656 if (allow_smem && !glc && !slc) {
657 assert(vindex == NULL);
658
659 LLVMValueRef result[4];
660
661 for (int i = 0; i < num_channels; i++) {
662 if (i) {
663 offset = LLVMBuildAdd(ctx->builder, offset,
664 LLVMConstInt(ctx->i32, 4, 0), "");
665 }
666 LLVMValueRef args[2] = {rsrc, offset};
667 result[i] = ac_build_intrinsic(ctx, "llvm.SI.load.const.v4i32",
668 ctx->f32, args, 2,
669 AC_FUNC_ATTR_READNONE |
670 AC_FUNC_ATTR_LEGACY);
671 }
672 if (num_channels == 1)
673 return result[0];
674
675 if (num_channels == 3)
676 result[num_channels++] = LLVMGetUndef(ctx->f32);
677 return ac_build_gather_values(ctx, result, num_channels);
678 }
679
680 unsigned func = CLAMP(num_channels, 1, 3) - 1;
681
682 LLVMValueRef args[] = {
683 LLVMBuildBitCast(ctx->builder, rsrc, ctx->v4i32, ""),
684 vindex ? vindex : LLVMConstInt(ctx->i32, 0, 0),
685 offset,
686 LLVMConstInt(ctx->i1, glc, 0),
687 LLVMConstInt(ctx->i1, slc, 0)
688 };
689
690 LLVMTypeRef types[] = {ctx->f32, LLVMVectorType(ctx->f32, 2),
691 ctx->v4f32};
692 const char *type_names[] = {"f32", "v2f32", "v4f32"};
693 char name[256];
694
695 snprintf(name, sizeof(name), "llvm.amdgcn.buffer.load.%s",
696 type_names[func]);
697
698 return ac_build_intrinsic(ctx, name, types[func], args,
699 ARRAY_SIZE(args),
700 /* READNONE means writes can't affect it, while
701 * READONLY means that writes can affect it. */
702 can_speculate && HAVE_LLVM >= 0x0400 ?
703 AC_FUNC_ATTR_READNONE :
704 AC_FUNC_ATTR_READONLY);
705 }
706
707 LLVMValueRef ac_build_buffer_load_format(struct ac_llvm_context *ctx,
708 LLVMValueRef rsrc,
709 LLVMValueRef vindex,
710 LLVMValueRef voffset,
711 bool can_speculate)
712 {
713 LLVMValueRef args [] = {
714 LLVMBuildBitCast(ctx->builder, rsrc, ctx->v4i32, ""),
715 vindex,
716 voffset,
717 LLVMConstInt(ctx->i1, 0, 0), /* glc */
718 LLVMConstInt(ctx->i1, 0, 0), /* slc */
719 };
720
721 return ac_build_intrinsic(ctx,
722 "llvm.amdgcn.buffer.load.format.v4f32",
723 ctx->v4f32, args, ARRAY_SIZE(args),
724 /* READNONE means writes can't affect it, while
725 * READONLY means that writes can affect it. */
726 can_speculate && HAVE_LLVM >= 0x0400 ?
727 AC_FUNC_ATTR_READNONE :
728 AC_FUNC_ATTR_READONLY);
729 }
730
731 /**
732 * Set range metadata on an instruction. This can only be used on load and
733 * call instructions. If you know an instruction can only produce the values
734 * 0, 1, 2, you would do set_range_metadata(value, 0, 3);
735 * \p lo is the minimum value inclusive.
736 * \p hi is the maximum value exclusive.
737 */
738 static void set_range_metadata(struct ac_llvm_context *ctx,
739 LLVMValueRef value, unsigned lo, unsigned hi)
740 {
741 LLVMValueRef range_md, md_args[2];
742 LLVMTypeRef type = LLVMTypeOf(value);
743 LLVMContextRef context = LLVMGetTypeContext(type);
744
745 md_args[0] = LLVMConstInt(type, lo, false);
746 md_args[1] = LLVMConstInt(type, hi, false);
747 range_md = LLVMMDNodeInContext(context, md_args, 2);
748 LLVMSetMetadata(value, ctx->range_md_kind, range_md);
749 }
750
751 LLVMValueRef
752 ac_get_thread_id(struct ac_llvm_context *ctx)
753 {
754 LLVMValueRef tid;
755
756 LLVMValueRef tid_args[2];
757 tid_args[0] = LLVMConstInt(ctx->i32, 0xffffffff, false);
758 tid_args[1] = LLVMConstInt(ctx->i32, 0, false);
759 tid_args[1] = ac_build_intrinsic(ctx,
760 "llvm.amdgcn.mbcnt.lo", ctx->i32,
761 tid_args, 2, AC_FUNC_ATTR_READNONE);
762
763 tid = ac_build_intrinsic(ctx, "llvm.amdgcn.mbcnt.hi",
764 ctx->i32, tid_args,
765 2, AC_FUNC_ATTR_READNONE);
766 set_range_metadata(ctx, tid, 0, 64);
767 return tid;
768 }
769
770 /*
771 * SI implements derivatives using the local data store (LDS)
772 * All writes to the LDS happen in all executing threads at
773 * the same time. TID is the Thread ID for the current
774 * thread and is a value between 0 and 63, representing
775 * the thread's position in the wavefront.
776 *
777 * For the pixel shader threads are grouped into quads of four pixels.
778 * The TIDs of the pixels of a quad are:
779 *
780 * +------+------+
781 * |4n + 0|4n + 1|
782 * +------+------+
783 * |4n + 2|4n + 3|
784 * +------+------+
785 *
786 * So, masking the TID with 0xfffffffc yields the TID of the top left pixel
787 * of the quad, masking with 0xfffffffd yields the TID of the top pixel of
788 * the current pixel's column, and masking with 0xfffffffe yields the TID
789 * of the left pixel of the current pixel's row.
790 *
791 * Adding 1 yields the TID of the pixel to the right of the left pixel, and
792 * adding 2 yields the TID of the pixel below the top pixel.
793 */
794 LLVMValueRef
795 ac_build_ddxy(struct ac_llvm_context *ctx,
796 bool has_ds_bpermute,
797 uint32_t mask,
798 int idx,
799 LLVMValueRef lds,
800 LLVMValueRef val)
801 {
802 LLVMValueRef thread_id, tl, trbl, tl_tid, trbl_tid, args[2];
803 LLVMValueRef result;
804
805 thread_id = ac_get_thread_id(ctx);
806
807 tl_tid = LLVMBuildAnd(ctx->builder, thread_id,
808 LLVMConstInt(ctx->i32, mask, false), "");
809
810 trbl_tid = LLVMBuildAdd(ctx->builder, tl_tid,
811 LLVMConstInt(ctx->i32, idx, false), "");
812
813 if (has_ds_bpermute) {
814 args[0] = LLVMBuildMul(ctx->builder, tl_tid,
815 LLVMConstInt(ctx->i32, 4, false), "");
816 args[1] = val;
817 tl = ac_build_intrinsic(ctx,
818 "llvm.amdgcn.ds.bpermute", ctx->i32,
819 args, 2,
820 AC_FUNC_ATTR_READNONE |
821 AC_FUNC_ATTR_CONVERGENT);
822
823 args[0] = LLVMBuildMul(ctx->builder, trbl_tid,
824 LLVMConstInt(ctx->i32, 4, false), "");
825 trbl = ac_build_intrinsic(ctx,
826 "llvm.amdgcn.ds.bpermute", ctx->i32,
827 args, 2,
828 AC_FUNC_ATTR_READNONE |
829 AC_FUNC_ATTR_CONVERGENT);
830 } else {
831 LLVMValueRef store_ptr, load_ptr0, load_ptr1;
832
833 store_ptr = ac_build_gep0(ctx, lds, thread_id);
834 load_ptr0 = ac_build_gep0(ctx, lds, tl_tid);
835 load_ptr1 = ac_build_gep0(ctx, lds, trbl_tid);
836
837 LLVMBuildStore(ctx->builder, val, store_ptr);
838 tl = LLVMBuildLoad(ctx->builder, load_ptr0, "");
839 trbl = LLVMBuildLoad(ctx->builder, load_ptr1, "");
840 }
841
842 tl = LLVMBuildBitCast(ctx->builder, tl, ctx->f32, "");
843 trbl = LLVMBuildBitCast(ctx->builder, trbl, ctx->f32, "");
844 result = LLVMBuildFSub(ctx->builder, trbl, tl, "");
845 return result;
846 }
847
848 void
849 ac_build_sendmsg(struct ac_llvm_context *ctx,
850 uint32_t msg,
851 LLVMValueRef wave_id)
852 {
853 LLVMValueRef args[2];
854 const char *intr_name = (HAVE_LLVM < 0x0400) ? "llvm.SI.sendmsg" : "llvm.amdgcn.s.sendmsg";
855 args[0] = LLVMConstInt(ctx->i32, msg, false);
856 args[1] = wave_id;
857 ac_build_intrinsic(ctx, intr_name, ctx->voidt, args, 2, 0);
858 }
859
860 LLVMValueRef
861 ac_build_imsb(struct ac_llvm_context *ctx,
862 LLVMValueRef arg,
863 LLVMTypeRef dst_type)
864 {
865 const char *intr_name = (HAVE_LLVM < 0x0400) ? "llvm.AMDGPU.flbit.i32" :
866 "llvm.amdgcn.sffbh.i32";
867 LLVMValueRef msb = ac_build_intrinsic(ctx, intr_name,
868 dst_type, &arg, 1,
869 AC_FUNC_ATTR_READNONE);
870
871 /* The HW returns the last bit index from MSB, but NIR/TGSI wants
872 * the index from LSB. Invert it by doing "31 - msb". */
873 msb = LLVMBuildSub(ctx->builder, LLVMConstInt(ctx->i32, 31, false),
874 msb, "");
875
876 LLVMValueRef all_ones = LLVMConstInt(ctx->i32, -1, true);
877 LLVMValueRef cond = LLVMBuildOr(ctx->builder,
878 LLVMBuildICmp(ctx->builder, LLVMIntEQ,
879 arg, LLVMConstInt(ctx->i32, 0, 0), ""),
880 LLVMBuildICmp(ctx->builder, LLVMIntEQ,
881 arg, all_ones, ""), "");
882
883 return LLVMBuildSelect(ctx->builder, cond, all_ones, msb, "");
884 }
885
886 LLVMValueRef
887 ac_build_umsb(struct ac_llvm_context *ctx,
888 LLVMValueRef arg,
889 LLVMTypeRef dst_type)
890 {
891 LLVMValueRef args[2] = {
892 arg,
893 LLVMConstInt(ctx->i1, 1, 0),
894 };
895 LLVMValueRef msb = ac_build_intrinsic(ctx, "llvm.ctlz.i32",
896 dst_type, args, ARRAY_SIZE(args),
897 AC_FUNC_ATTR_READNONE);
898
899 /* The HW returns the last bit index from MSB, but TGSI/NIR wants
900 * the index from LSB. Invert it by doing "31 - msb". */
901 msb = LLVMBuildSub(ctx->builder, LLVMConstInt(ctx->i32, 31, false),
902 msb, "");
903
904 /* check for zero */
905 return LLVMBuildSelect(ctx->builder,
906 LLVMBuildICmp(ctx->builder, LLVMIntEQ, arg,
907 LLVMConstInt(ctx->i32, 0, 0), ""),
908 LLVMConstInt(ctx->i32, -1, true), msb, "");
909 }
910
911 LLVMValueRef ac_build_clamp(struct ac_llvm_context *ctx, LLVMValueRef value)
912 {
913 if (HAVE_LLVM >= 0x0500) {
914 LLVMValueRef max[2] = {
915 value,
916 LLVMConstReal(ctx->f32, 0),
917 };
918 LLVMValueRef min[2] = {
919 LLVMConstReal(ctx->f32, 1),
920 };
921
922 min[1] = ac_build_intrinsic(ctx, "llvm.maxnum.f32",
923 ctx->f32, max, 2,
924 AC_FUNC_ATTR_READNONE);
925 return ac_build_intrinsic(ctx, "llvm.minnum.f32",
926 ctx->f32, min, 2,
927 AC_FUNC_ATTR_READNONE);
928 }
929
930 LLVMValueRef args[3] = {
931 value,
932 LLVMConstReal(ctx->f32, 0),
933 LLVMConstReal(ctx->f32, 1),
934 };
935
936 return ac_build_intrinsic(ctx, "llvm.AMDGPU.clamp.", ctx->f32, args, 3,
937 AC_FUNC_ATTR_READNONE |
938 AC_FUNC_ATTR_LEGACY);
939 }
940
941 void ac_build_export(struct ac_llvm_context *ctx, struct ac_export_args *a)
942 {
943 LLVMValueRef args[9];
944
945 if (HAVE_LLVM >= 0x0500) {
946 args[0] = LLVMConstInt(ctx->i32, a->target, 0);
947 args[1] = LLVMConstInt(ctx->i32, a->enabled_channels, 0);
948
949 if (a->compr) {
950 LLVMTypeRef i16 = LLVMInt16TypeInContext(ctx->context);
951 LLVMTypeRef v2i16 = LLVMVectorType(i16, 2);
952
953 args[2] = LLVMBuildBitCast(ctx->builder, a->out[0],
954 v2i16, "");
955 args[3] = LLVMBuildBitCast(ctx->builder, a->out[1],
956 v2i16, "");
957 args[4] = LLVMConstInt(ctx->i1, a->done, 0);
958 args[5] = LLVMConstInt(ctx->i1, a->valid_mask, 0);
959
960 ac_build_intrinsic(ctx, "llvm.amdgcn.exp.compr.v2i16",
961 ctx->voidt, args, 6, 0);
962 } else {
963 args[2] = a->out[0];
964 args[3] = a->out[1];
965 args[4] = a->out[2];
966 args[5] = a->out[3];
967 args[6] = LLVMConstInt(ctx->i1, a->done, 0);
968 args[7] = LLVMConstInt(ctx->i1, a->valid_mask, 0);
969
970 ac_build_intrinsic(ctx, "llvm.amdgcn.exp.f32",
971 ctx->voidt, args, 8, 0);
972 }
973 return;
974 }
975
976 args[0] = LLVMConstInt(ctx->i32, a->enabled_channels, 0);
977 args[1] = LLVMConstInt(ctx->i32, a->valid_mask, 0);
978 args[2] = LLVMConstInt(ctx->i32, a->done, 0);
979 args[3] = LLVMConstInt(ctx->i32, a->target, 0);
980 args[4] = LLVMConstInt(ctx->i32, a->compr, 0);
981 memcpy(args + 5, a->out, sizeof(a->out[0]) * 4);
982
983 ac_build_intrinsic(ctx, "llvm.SI.export", ctx->voidt, args, 9,
984 AC_FUNC_ATTR_LEGACY);
985 }
986
987 LLVMValueRef ac_build_image_opcode(struct ac_llvm_context *ctx,
988 struct ac_image_args *a)
989 {
990 LLVMTypeRef dst_type;
991 LLVMValueRef args[11];
992 unsigned num_args = 0;
993 const char *name;
994 char intr_name[128], type[64];
995
996 if (HAVE_LLVM >= 0x0400) {
997 bool sample = a->opcode == ac_image_sample ||
998 a->opcode == ac_image_gather4 ||
999 a->opcode == ac_image_get_lod;
1000
1001 if (sample)
1002 args[num_args++] = bitcast_to_float(ctx, a->addr);
1003 else
1004 args[num_args++] = a->addr;
1005
1006 args[num_args++] = a->resource;
1007 if (sample)
1008 args[num_args++] = a->sampler;
1009 args[num_args++] = LLVMConstInt(ctx->i32, a->dmask, 0);
1010 if (sample)
1011 args[num_args++] = LLVMConstInt(ctx->i1, a->unorm, 0);
1012 args[num_args++] = LLVMConstInt(ctx->i1, 0, 0); /* glc */
1013 args[num_args++] = LLVMConstInt(ctx->i1, 0, 0); /* slc */
1014 args[num_args++] = LLVMConstInt(ctx->i1, 0, 0); /* lwe */
1015 args[num_args++] = LLVMConstInt(ctx->i1, a->da, 0);
1016
1017 switch (a->opcode) {
1018 case ac_image_sample:
1019 name = "llvm.amdgcn.image.sample";
1020 break;
1021 case ac_image_gather4:
1022 name = "llvm.amdgcn.image.gather4";
1023 break;
1024 case ac_image_load:
1025 name = "llvm.amdgcn.image.load";
1026 break;
1027 case ac_image_load_mip:
1028 name = "llvm.amdgcn.image.load.mip";
1029 break;
1030 case ac_image_get_lod:
1031 name = "llvm.amdgcn.image.getlod";
1032 break;
1033 case ac_image_get_resinfo:
1034 name = "llvm.amdgcn.image.getresinfo";
1035 break;
1036 default:
1037 unreachable("invalid image opcode");
1038 }
1039
1040 ac_build_type_name_for_intr(LLVMTypeOf(args[0]), type,
1041 sizeof(type));
1042
1043 snprintf(intr_name, sizeof(intr_name), "%s%s%s%s.v4f32.%s.v8i32",
1044 name,
1045 a->compare ? ".c" : "",
1046 a->bias ? ".b" :
1047 a->lod ? ".l" :
1048 a->deriv ? ".d" :
1049 a->level_zero ? ".lz" : "",
1050 a->offset ? ".o" : "",
1051 type);
1052
1053 LLVMValueRef result =
1054 ac_build_intrinsic(ctx, intr_name,
1055 ctx->v4f32, args, num_args,
1056 AC_FUNC_ATTR_READNONE);
1057 if (!sample) {
1058 result = LLVMBuildBitCast(ctx->builder, result,
1059 ctx->v4i32, "");
1060 }
1061 return result;
1062 }
1063
1064 args[num_args++] = a->addr;
1065 args[num_args++] = a->resource;
1066
1067 if (a->opcode == ac_image_load ||
1068 a->opcode == ac_image_load_mip ||
1069 a->opcode == ac_image_get_resinfo) {
1070 dst_type = ctx->v4i32;
1071 } else {
1072 dst_type = ctx->v4f32;
1073 args[num_args++] = a->sampler;
1074 }
1075
1076 args[num_args++] = LLVMConstInt(ctx->i32, a->dmask, 0);
1077 args[num_args++] = LLVMConstInt(ctx->i32, a->unorm, 0);
1078 args[num_args++] = LLVMConstInt(ctx->i32, 0, 0); /* r128 */
1079 args[num_args++] = LLVMConstInt(ctx->i32, a->da, 0);
1080 args[num_args++] = LLVMConstInt(ctx->i32, 0, 0); /* glc */
1081 args[num_args++] = LLVMConstInt(ctx->i32, 0, 0); /* slc */
1082 args[num_args++] = LLVMConstInt(ctx->i32, 0, 0); /* tfe */
1083 args[num_args++] = LLVMConstInt(ctx->i32, 0, 0); /* lwe */
1084
1085 switch (a->opcode) {
1086 case ac_image_sample:
1087 name = "llvm.SI.image.sample";
1088 break;
1089 case ac_image_gather4:
1090 name = "llvm.SI.gather4";
1091 break;
1092 case ac_image_load:
1093 name = "llvm.SI.image.load";
1094 break;
1095 case ac_image_load_mip:
1096 name = "llvm.SI.image.load.mip";
1097 break;
1098 case ac_image_get_lod:
1099 name = "llvm.SI.getlod";
1100 break;
1101 case ac_image_get_resinfo:
1102 name = "llvm.SI.getresinfo";
1103 break;
1104 }
1105
1106 ac_build_type_name_for_intr(LLVMTypeOf(a->addr), type, sizeof(type));
1107 snprintf(intr_name, sizeof(intr_name), "%s%s%s%s.%s",
1108 name,
1109 a->compare ? ".c" : "",
1110 a->bias ? ".b" :
1111 a->lod ? ".l" :
1112 a->deriv ? ".d" :
1113 a->level_zero ? ".lz" : "",
1114 a->offset ? ".o" : "",
1115 type);
1116
1117 return ac_build_intrinsic(ctx, intr_name,
1118 dst_type, args, num_args,
1119 AC_FUNC_ATTR_READNONE |
1120 AC_FUNC_ATTR_LEGACY);
1121 }
1122
1123 LLVMValueRef ac_build_cvt_pkrtz_f16(struct ac_llvm_context *ctx,
1124 LLVMValueRef args[2])
1125 {
1126 if (HAVE_LLVM >= 0x0500) {
1127 LLVMTypeRef v2f16 =
1128 LLVMVectorType(LLVMHalfTypeInContext(ctx->context), 2);
1129 LLVMValueRef res =
1130 ac_build_intrinsic(ctx, "llvm.amdgcn.cvt.pkrtz",
1131 v2f16, args, 2,
1132 AC_FUNC_ATTR_READNONE);
1133 return LLVMBuildBitCast(ctx->builder, res, ctx->i32, "");
1134 }
1135
1136 return ac_build_intrinsic(ctx, "llvm.SI.packf16", ctx->i32, args, 2,
1137 AC_FUNC_ATTR_READNONE |
1138 AC_FUNC_ATTR_LEGACY);
1139 }
1140
1141 /**
1142 * KILL, AKA discard in GLSL.
1143 *
1144 * \param value kill if value < 0.0 or value == NULL.
1145 */
1146 void ac_build_kill(struct ac_llvm_context *ctx, LLVMValueRef value)
1147 {
1148 if (value) {
1149 ac_build_intrinsic(ctx, "llvm.AMDGPU.kill", ctx->voidt,
1150 &value, 1, AC_FUNC_ATTR_LEGACY);
1151 } else {
1152 ac_build_intrinsic(ctx, "llvm.AMDGPU.kilp", ctx->voidt,
1153 NULL, 0, AC_FUNC_ATTR_LEGACY);
1154 }
1155 }
1156
1157 LLVMValueRef ac_build_bfe(struct ac_llvm_context *ctx, LLVMValueRef input,
1158 LLVMValueRef offset, LLVMValueRef width,
1159 bool is_signed)
1160 {
1161 LLVMValueRef args[] = {
1162 input,
1163 offset,
1164 width,
1165 };
1166
1167 if (HAVE_LLVM >= 0x0500) {
1168 return ac_build_intrinsic(ctx,
1169 is_signed ? "llvm.amdgcn.sbfe.i32" :
1170 "llvm.amdgcn.ubfe.i32",
1171 ctx->i32, args, 3,
1172 AC_FUNC_ATTR_READNONE);
1173 }
1174
1175 return ac_build_intrinsic(ctx,
1176 is_signed ? "llvm.AMDGPU.bfe.i32" :
1177 "llvm.AMDGPU.bfe.u32",
1178 ctx->i32, args, 3,
1179 AC_FUNC_ATTR_READNONE |
1180 AC_FUNC_ATTR_LEGACY);
1181 }
1182
1183 void ac_get_image_intr_name(const char *base_name,
1184 LLVMTypeRef data_type,
1185 LLVMTypeRef coords_type,
1186 LLVMTypeRef rsrc_type,
1187 char *out_name, unsigned out_len)
1188 {
1189 char coords_type_name[8];
1190
1191 ac_build_type_name_for_intr(coords_type, coords_type_name,
1192 sizeof(coords_type_name));
1193
1194 if (HAVE_LLVM <= 0x0309) {
1195 snprintf(out_name, out_len, "%s.%s", base_name, coords_type_name);
1196 } else {
1197 char data_type_name[8];
1198 char rsrc_type_name[8];
1199
1200 ac_build_type_name_for_intr(data_type, data_type_name,
1201 sizeof(data_type_name));
1202 ac_build_type_name_for_intr(rsrc_type, rsrc_type_name,
1203 sizeof(rsrc_type_name));
1204 snprintf(out_name, out_len, "%s.%s.%s.%s", base_name,
1205 data_type_name, coords_type_name, rsrc_type_name);
1206 }
1207 }
1208
1209 #define AC_EXP_TARGET (HAVE_LLVM >= 0x0500 ? 0 : 3)
1210 #define AC_EXP_OUT0 (HAVE_LLVM >= 0x0500 ? 2 : 5)
1211
1212 enum ac_ir_type {
1213 AC_IR_UNDEF,
1214 AC_IR_CONST,
1215 AC_IR_VALUE,
1216 };
1217
1218 struct ac_vs_exp_chan
1219 {
1220 LLVMValueRef value;
1221 float const_float;
1222 enum ac_ir_type type;
1223 };
1224
1225 struct ac_vs_exp_inst {
1226 unsigned offset;
1227 LLVMValueRef inst;
1228 struct ac_vs_exp_chan chan[4];
1229 };
1230
1231 struct ac_vs_exports {
1232 unsigned num;
1233 struct ac_vs_exp_inst exp[VARYING_SLOT_MAX];
1234 };
1235
1236 /* Return true if the PARAM export has been eliminated. */
1237 static bool ac_eliminate_const_output(uint8_t *vs_output_param_offset,
1238 uint32_t num_outputs,
1239 struct ac_vs_exp_inst *exp)
1240 {
1241 unsigned i, default_val; /* SPI_PS_INPUT_CNTL_i.DEFAULT_VAL */
1242 bool is_zero[4] = {}, is_one[4] = {};
1243
1244 for (i = 0; i < 4; i++) {
1245 /* It's a constant expression. Undef outputs are eliminated too. */
1246 if (exp->chan[i].type == AC_IR_UNDEF) {
1247 is_zero[i] = true;
1248 is_one[i] = true;
1249 } else if (exp->chan[i].type == AC_IR_CONST) {
1250 if (exp->chan[i].const_float == 0)
1251 is_zero[i] = true;
1252 else if (exp->chan[i].const_float == 1)
1253 is_one[i] = true;
1254 else
1255 return false; /* other constant */
1256 } else
1257 return false;
1258 }
1259
1260 /* Only certain combinations of 0 and 1 can be eliminated. */
1261 if (is_zero[0] && is_zero[1] && is_zero[2])
1262 default_val = is_zero[3] ? 0 : 1;
1263 else if (is_one[0] && is_one[1] && is_one[2])
1264 default_val = is_zero[3] ? 2 : 3;
1265 else
1266 return false;
1267
1268 /* The PARAM export can be represented as DEFAULT_VAL. Kill it. */
1269 LLVMInstructionEraseFromParent(exp->inst);
1270
1271 /* Change OFFSET to DEFAULT_VAL. */
1272 for (i = 0; i < num_outputs; i++) {
1273 if (vs_output_param_offset[i] == exp->offset) {
1274 vs_output_param_offset[i] =
1275 AC_EXP_PARAM_DEFAULT_VAL_0000 + default_val;
1276 break;
1277 }
1278 }
1279 return true;
1280 }
1281
1282 static bool ac_eliminate_duplicated_output(uint8_t *vs_output_param_offset,
1283 uint32_t num_outputs,
1284 struct ac_vs_exports *processed,
1285 struct ac_vs_exp_inst *exp)
1286 {
1287 unsigned p, copy_back_channels = 0;
1288
1289 /* See if the output is already in the list of processed outputs.
1290 * The LLVMValueRef comparison relies on SSA.
1291 */
1292 for (p = 0; p < processed->num; p++) {
1293 bool different = false;
1294
1295 for (unsigned j = 0; j < 4; j++) {
1296 struct ac_vs_exp_chan *c1 = &processed->exp[p].chan[j];
1297 struct ac_vs_exp_chan *c2 = &exp->chan[j];
1298
1299 /* Treat undef as a match. */
1300 if (c2->type == AC_IR_UNDEF)
1301 continue;
1302
1303 /* If c1 is undef but c2 isn't, we can copy c2 to c1
1304 * and consider the instruction duplicated.
1305 */
1306 if (c1->type == AC_IR_UNDEF) {
1307 copy_back_channels |= 1 << j;
1308 continue;
1309 }
1310
1311 /* Test whether the channels are not equal. */
1312 if (c1->type != c2->type ||
1313 (c1->type == AC_IR_CONST &&
1314 c1->const_float != c2->const_float) ||
1315 (c1->type == AC_IR_VALUE &&
1316 c1->value != c2->value)) {
1317 different = true;
1318 break;
1319 }
1320 }
1321 if (!different)
1322 break;
1323
1324 copy_back_channels = 0;
1325 }
1326 if (p == processed->num)
1327 return false;
1328
1329 /* If a match was found, but the matching export has undef where the new
1330 * one has a normal value, copy the normal value to the undef channel.
1331 */
1332 struct ac_vs_exp_inst *match = &processed->exp[p];
1333
1334 while (copy_back_channels) {
1335 unsigned chan = u_bit_scan(&copy_back_channels);
1336
1337 assert(match->chan[chan].type == AC_IR_UNDEF);
1338 LLVMSetOperand(match->inst, AC_EXP_OUT0 + chan,
1339 exp->chan[chan].value);
1340 match->chan[chan] = exp->chan[chan];
1341 }
1342
1343 /* The PARAM export is duplicated. Kill it. */
1344 LLVMInstructionEraseFromParent(exp->inst);
1345
1346 /* Change OFFSET to the matching export. */
1347 for (unsigned i = 0; i < num_outputs; i++) {
1348 if (vs_output_param_offset[i] == exp->offset) {
1349 vs_output_param_offset[i] = match->offset;
1350 break;
1351 }
1352 }
1353 return true;
1354 }
1355
1356 void ac_optimize_vs_outputs(struct ac_llvm_context *ctx,
1357 LLVMValueRef main_fn,
1358 uint8_t *vs_output_param_offset,
1359 uint32_t num_outputs,
1360 uint8_t *num_param_exports)
1361 {
1362 LLVMBasicBlockRef bb;
1363 bool removed_any = false;
1364 struct ac_vs_exports exports;
1365
1366 exports.num = 0;
1367
1368 /* Process all LLVM instructions. */
1369 bb = LLVMGetFirstBasicBlock(main_fn);
1370 while (bb) {
1371 LLVMValueRef inst = LLVMGetFirstInstruction(bb);
1372
1373 while (inst) {
1374 LLVMValueRef cur = inst;
1375 inst = LLVMGetNextInstruction(inst);
1376 struct ac_vs_exp_inst exp;
1377
1378 if (LLVMGetInstructionOpcode(cur) != LLVMCall)
1379 continue;
1380
1381 LLVMValueRef callee = ac_llvm_get_called_value(cur);
1382
1383 if (!ac_llvm_is_function(callee))
1384 continue;
1385
1386 const char *name = LLVMGetValueName(callee);
1387 unsigned num_args = LLVMCountParams(callee);
1388
1389 /* Check if this is an export instruction. */
1390 if ((num_args != 9 && num_args != 8) ||
1391 (strcmp(name, "llvm.SI.export") &&
1392 strcmp(name, "llvm.amdgcn.exp.f32")))
1393 continue;
1394
1395 LLVMValueRef arg = LLVMGetOperand(cur, AC_EXP_TARGET);
1396 unsigned target = LLVMConstIntGetZExtValue(arg);
1397
1398 if (target < V_008DFC_SQ_EXP_PARAM)
1399 continue;
1400
1401 target -= V_008DFC_SQ_EXP_PARAM;
1402
1403 /* Parse the instruction. */
1404 memset(&exp, 0, sizeof(exp));
1405 exp.offset = target;
1406 exp.inst = cur;
1407
1408 for (unsigned i = 0; i < 4; i++) {
1409 LLVMValueRef v = LLVMGetOperand(cur, AC_EXP_OUT0 + i);
1410
1411 exp.chan[i].value = v;
1412
1413 if (LLVMIsUndef(v)) {
1414 exp.chan[i].type = AC_IR_UNDEF;
1415 } else if (LLVMIsAConstantFP(v)) {
1416 LLVMBool loses_info;
1417 exp.chan[i].type = AC_IR_CONST;
1418 exp.chan[i].const_float =
1419 LLVMConstRealGetDouble(v, &loses_info);
1420 } else {
1421 exp.chan[i].type = AC_IR_VALUE;
1422 }
1423 }
1424
1425 /* Eliminate constant and duplicated PARAM exports. */
1426 if (ac_eliminate_const_output(vs_output_param_offset,
1427 num_outputs, &exp) ||
1428 ac_eliminate_duplicated_output(vs_output_param_offset,
1429 num_outputs, &exports,
1430 &exp)) {
1431 removed_any = true;
1432 } else {
1433 exports.exp[exports.num++] = exp;
1434 }
1435 }
1436 bb = LLVMGetNextBasicBlock(bb);
1437 }
1438
1439 /* Remove holes in export memory due to removed PARAM exports.
1440 * This is done by renumbering all PARAM exports.
1441 */
1442 if (removed_any) {
1443 uint8_t old_offset[VARYING_SLOT_MAX];
1444 unsigned out, i;
1445
1446 /* Make a copy of the offsets. We need the old version while
1447 * we are modifying some of them. */
1448 memcpy(old_offset, vs_output_param_offset,
1449 sizeof(old_offset));
1450
1451 for (i = 0; i < exports.num; i++) {
1452 unsigned offset = exports.exp[i].offset;
1453
1454 /* Update vs_output_param_offset. Multiple outputs can
1455 * have the same offset.
1456 */
1457 for (out = 0; out < num_outputs; out++) {
1458 if (old_offset[out] == offset)
1459 vs_output_param_offset[out] = i;
1460 }
1461
1462 /* Change the PARAM offset in the instruction. */
1463 LLVMSetOperand(exports.exp[i].inst, AC_EXP_TARGET,
1464 LLVMConstInt(ctx->i32,
1465 V_008DFC_SQ_EXP_PARAM + i, 0));
1466 }
1467 *num_param_exports = exports.num;
1468 }
1469 }