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ac/nir: use ac_build_image_opcode for image intrinsics
[mesa.git] / src / amd / common / ac_llvm_build.c
1 /*
2 * Copyright 2014 Advanced Micro Devices, Inc.
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the
6 * "Software"), to deal in the Software without restriction, including
7 * without limitation the rights to use, copy, modify, merge, publish,
8 * distribute, sub license, and/or sell copies of the Software, and to
9 * permit persons to whom the Software is furnished to do so, subject to
10 * the following conditions:
11 *
12 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
13 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
14 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
15 * THE COPYRIGHT HOLDERS, AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM,
16 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
17 * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
18 * USE OR OTHER DEALINGS IN THE SOFTWARE.
19 *
20 * The above copyright notice and this permission notice (including the
21 * next paragraph) shall be included in all copies or substantial portions
22 * of the Software.
23 *
24 */
25 /* based on pieces from si_pipe.c and radeon_llvm_emit.c */
26 #include "ac_llvm_build.h"
27
28 #include <llvm-c/Core.h>
29
30 #include "c11/threads.h"
31
32 #include <assert.h>
33 #include <stdio.h>
34
35 #include "ac_llvm_util.h"
36 #include "ac_exp_param.h"
37 #include "util/bitscan.h"
38 #include "util/macros.h"
39 #include "util/u_atomic.h"
40 #include "util/u_math.h"
41 #include "sid.h"
42
43 #include "shader_enums.h"
44
45 #define AC_LLVM_INITIAL_CF_DEPTH 4
46
47 /* Data for if/else/endif and bgnloop/endloop control flow structures.
48 */
49 struct ac_llvm_flow {
50 /* Loop exit or next part of if/else/endif. */
51 LLVMBasicBlockRef next_block;
52 LLVMBasicBlockRef loop_entry_block;
53 };
54
55 /* Initialize module-independent parts of the context.
56 *
57 * The caller is responsible for initializing ctx::module and ctx::builder.
58 */
59 void
60 ac_llvm_context_init(struct ac_llvm_context *ctx, LLVMContextRef context,
61 enum chip_class chip_class, enum radeon_family family)
62 {
63 LLVMValueRef args[1];
64
65 ctx->chip_class = chip_class;
66 ctx->family = family;
67
68 ctx->context = context;
69 ctx->module = NULL;
70 ctx->builder = NULL;
71
72 ctx->voidt = LLVMVoidTypeInContext(ctx->context);
73 ctx->i1 = LLVMInt1TypeInContext(ctx->context);
74 ctx->i8 = LLVMInt8TypeInContext(ctx->context);
75 ctx->i16 = LLVMIntTypeInContext(ctx->context, 16);
76 ctx->i32 = LLVMIntTypeInContext(ctx->context, 32);
77 ctx->i64 = LLVMIntTypeInContext(ctx->context, 64);
78 ctx->intptr = HAVE_32BIT_POINTERS ? ctx->i32 : ctx->i64;
79 ctx->f16 = LLVMHalfTypeInContext(ctx->context);
80 ctx->f32 = LLVMFloatTypeInContext(ctx->context);
81 ctx->f64 = LLVMDoubleTypeInContext(ctx->context);
82 ctx->v2i16 = LLVMVectorType(ctx->i16, 2);
83 ctx->v2i32 = LLVMVectorType(ctx->i32, 2);
84 ctx->v3i32 = LLVMVectorType(ctx->i32, 3);
85 ctx->v4i32 = LLVMVectorType(ctx->i32, 4);
86 ctx->v2f32 = LLVMVectorType(ctx->f32, 2);
87 ctx->v4f32 = LLVMVectorType(ctx->f32, 4);
88 ctx->v8i32 = LLVMVectorType(ctx->i32, 8);
89
90 ctx->i32_0 = LLVMConstInt(ctx->i32, 0, false);
91 ctx->i32_1 = LLVMConstInt(ctx->i32, 1, false);
92 ctx->i64_0 = LLVMConstInt(ctx->i64, 0, false);
93 ctx->i64_1 = LLVMConstInt(ctx->i64, 1, false);
94 ctx->f32_0 = LLVMConstReal(ctx->f32, 0.0);
95 ctx->f32_1 = LLVMConstReal(ctx->f32, 1.0);
96 ctx->f64_0 = LLVMConstReal(ctx->f64, 0.0);
97 ctx->f64_1 = LLVMConstReal(ctx->f64, 1.0);
98
99 ctx->i1false = LLVMConstInt(ctx->i1, 0, false);
100 ctx->i1true = LLVMConstInt(ctx->i1, 1, false);
101
102 ctx->range_md_kind = LLVMGetMDKindIDInContext(ctx->context,
103 "range", 5);
104
105 ctx->invariant_load_md_kind = LLVMGetMDKindIDInContext(ctx->context,
106 "invariant.load", 14);
107
108 ctx->fpmath_md_kind = LLVMGetMDKindIDInContext(ctx->context, "fpmath", 6);
109
110 args[0] = LLVMConstReal(ctx->f32, 2.5);
111 ctx->fpmath_md_2p5_ulp = LLVMMDNodeInContext(ctx->context, args, 1);
112
113 ctx->uniform_md_kind = LLVMGetMDKindIDInContext(ctx->context,
114 "amdgpu.uniform", 14);
115
116 ctx->empty_md = LLVMMDNodeInContext(ctx->context, NULL, 0);
117 }
118
119 void
120 ac_llvm_context_dispose(struct ac_llvm_context *ctx)
121 {
122 free(ctx->flow);
123 ctx->flow = NULL;
124 ctx->flow_depth_max = 0;
125 }
126
127 int
128 ac_get_llvm_num_components(LLVMValueRef value)
129 {
130 LLVMTypeRef type = LLVMTypeOf(value);
131 unsigned num_components = LLVMGetTypeKind(type) == LLVMVectorTypeKind
132 ? LLVMGetVectorSize(type)
133 : 1;
134 return num_components;
135 }
136
137 LLVMValueRef
138 ac_llvm_extract_elem(struct ac_llvm_context *ac,
139 LLVMValueRef value,
140 int index)
141 {
142 if (LLVMGetTypeKind(LLVMTypeOf(value)) != LLVMVectorTypeKind) {
143 assert(index == 0);
144 return value;
145 }
146
147 return LLVMBuildExtractElement(ac->builder, value,
148 LLVMConstInt(ac->i32, index, false), "");
149 }
150
151 int
152 ac_get_elem_bits(struct ac_llvm_context *ctx, LLVMTypeRef type)
153 {
154 if (LLVMGetTypeKind(type) == LLVMVectorTypeKind)
155 type = LLVMGetElementType(type);
156
157 if (LLVMGetTypeKind(type) == LLVMIntegerTypeKind)
158 return LLVMGetIntTypeWidth(type);
159
160 if (type == ctx->f16)
161 return 16;
162 if (type == ctx->f32)
163 return 32;
164 if (type == ctx->f64)
165 return 64;
166
167 unreachable("Unhandled type kind in get_elem_bits");
168 }
169
170 unsigned
171 ac_get_type_size(LLVMTypeRef type)
172 {
173 LLVMTypeKind kind = LLVMGetTypeKind(type);
174
175 switch (kind) {
176 case LLVMIntegerTypeKind:
177 return LLVMGetIntTypeWidth(type) / 8;
178 case LLVMFloatTypeKind:
179 return 4;
180 case LLVMDoubleTypeKind:
181 return 8;
182 case LLVMPointerTypeKind:
183 if (LLVMGetPointerAddressSpace(type) == AC_CONST_32BIT_ADDR_SPACE)
184 return 4;
185 return 8;
186 case LLVMVectorTypeKind:
187 return LLVMGetVectorSize(type) *
188 ac_get_type_size(LLVMGetElementType(type));
189 case LLVMArrayTypeKind:
190 return LLVMGetArrayLength(type) *
191 ac_get_type_size(LLVMGetElementType(type));
192 default:
193 assert(0);
194 return 0;
195 }
196 }
197
198 static LLVMTypeRef to_integer_type_scalar(struct ac_llvm_context *ctx, LLVMTypeRef t)
199 {
200 if (t == ctx->f16 || t == ctx->i16)
201 return ctx->i16;
202 else if (t == ctx->f32 || t == ctx->i32)
203 return ctx->i32;
204 else if (t == ctx->f64 || t == ctx->i64)
205 return ctx->i64;
206 else
207 unreachable("Unhandled integer size");
208 }
209
210 LLVMTypeRef
211 ac_to_integer_type(struct ac_llvm_context *ctx, LLVMTypeRef t)
212 {
213 if (LLVMGetTypeKind(t) == LLVMVectorTypeKind) {
214 LLVMTypeRef elem_type = LLVMGetElementType(t);
215 return LLVMVectorType(to_integer_type_scalar(ctx, elem_type),
216 LLVMGetVectorSize(t));
217 }
218 return to_integer_type_scalar(ctx, t);
219 }
220
221 LLVMValueRef
222 ac_to_integer(struct ac_llvm_context *ctx, LLVMValueRef v)
223 {
224 LLVMTypeRef type = LLVMTypeOf(v);
225 return LLVMBuildBitCast(ctx->builder, v, ac_to_integer_type(ctx, type), "");
226 }
227
228 static LLVMTypeRef to_float_type_scalar(struct ac_llvm_context *ctx, LLVMTypeRef t)
229 {
230 if (t == ctx->i16 || t == ctx->f16)
231 return ctx->f16;
232 else if (t == ctx->i32 || t == ctx->f32)
233 return ctx->f32;
234 else if (t == ctx->i64 || t == ctx->f64)
235 return ctx->f64;
236 else
237 unreachable("Unhandled float size");
238 }
239
240 LLVMTypeRef
241 ac_to_float_type(struct ac_llvm_context *ctx, LLVMTypeRef t)
242 {
243 if (LLVMGetTypeKind(t) == LLVMVectorTypeKind) {
244 LLVMTypeRef elem_type = LLVMGetElementType(t);
245 return LLVMVectorType(to_float_type_scalar(ctx, elem_type),
246 LLVMGetVectorSize(t));
247 }
248 return to_float_type_scalar(ctx, t);
249 }
250
251 LLVMValueRef
252 ac_to_float(struct ac_llvm_context *ctx, LLVMValueRef v)
253 {
254 LLVMTypeRef type = LLVMTypeOf(v);
255 return LLVMBuildBitCast(ctx->builder, v, ac_to_float_type(ctx, type), "");
256 }
257
258
259 LLVMValueRef
260 ac_build_intrinsic(struct ac_llvm_context *ctx, const char *name,
261 LLVMTypeRef return_type, LLVMValueRef *params,
262 unsigned param_count, unsigned attrib_mask)
263 {
264 LLVMValueRef function, call;
265 bool set_callsite_attrs = !(attrib_mask & AC_FUNC_ATTR_LEGACY);
266
267 function = LLVMGetNamedFunction(ctx->module, name);
268 if (!function) {
269 LLVMTypeRef param_types[32], function_type;
270 unsigned i;
271
272 assert(param_count <= 32);
273
274 for (i = 0; i < param_count; ++i) {
275 assert(params[i]);
276 param_types[i] = LLVMTypeOf(params[i]);
277 }
278 function_type =
279 LLVMFunctionType(return_type, param_types, param_count, 0);
280 function = LLVMAddFunction(ctx->module, name, function_type);
281
282 LLVMSetFunctionCallConv(function, LLVMCCallConv);
283 LLVMSetLinkage(function, LLVMExternalLinkage);
284
285 if (!set_callsite_attrs)
286 ac_add_func_attributes(ctx->context, function, attrib_mask);
287 }
288
289 call = LLVMBuildCall(ctx->builder, function, params, param_count, "");
290 if (set_callsite_attrs)
291 ac_add_func_attributes(ctx->context, call, attrib_mask);
292 return call;
293 }
294
295 /**
296 * Given the i32 or vNi32 \p type, generate the textual name (e.g. for use with
297 * intrinsic names).
298 */
299 void ac_build_type_name_for_intr(LLVMTypeRef type, char *buf, unsigned bufsize)
300 {
301 LLVMTypeRef elem_type = type;
302
303 assert(bufsize >= 8);
304
305 if (LLVMGetTypeKind(type) == LLVMVectorTypeKind) {
306 int ret = snprintf(buf, bufsize, "v%u",
307 LLVMGetVectorSize(type));
308 if (ret < 0) {
309 char *type_name = LLVMPrintTypeToString(type);
310 fprintf(stderr, "Error building type name for: %s\n",
311 type_name);
312 return;
313 }
314 elem_type = LLVMGetElementType(type);
315 buf += ret;
316 bufsize -= ret;
317 }
318 switch (LLVMGetTypeKind(elem_type)) {
319 default: break;
320 case LLVMIntegerTypeKind:
321 snprintf(buf, bufsize, "i%d", LLVMGetIntTypeWidth(elem_type));
322 break;
323 case LLVMFloatTypeKind:
324 snprintf(buf, bufsize, "f32");
325 break;
326 case LLVMDoubleTypeKind:
327 snprintf(buf, bufsize, "f64");
328 break;
329 }
330 }
331
332 /**
333 * Helper function that builds an LLVM IR PHI node and immediately adds
334 * incoming edges.
335 */
336 LLVMValueRef
337 ac_build_phi(struct ac_llvm_context *ctx, LLVMTypeRef type,
338 unsigned count_incoming, LLVMValueRef *values,
339 LLVMBasicBlockRef *blocks)
340 {
341 LLVMValueRef phi = LLVMBuildPhi(ctx->builder, type, "");
342 LLVMAddIncoming(phi, values, blocks, count_incoming);
343 return phi;
344 }
345
346 /* Prevent optimizations (at least of memory accesses) across the current
347 * point in the program by emitting empty inline assembly that is marked as
348 * having side effects.
349 *
350 * Optionally, a value can be passed through the inline assembly to prevent
351 * LLVM from hoisting calls to ReadNone functions.
352 */
353 void
354 ac_build_optimization_barrier(struct ac_llvm_context *ctx,
355 LLVMValueRef *pvgpr)
356 {
357 static int counter = 0;
358
359 LLVMBuilderRef builder = ctx->builder;
360 char code[16];
361
362 snprintf(code, sizeof(code), "; %d", p_atomic_inc_return(&counter));
363
364 if (!pvgpr) {
365 LLVMTypeRef ftype = LLVMFunctionType(ctx->voidt, NULL, 0, false);
366 LLVMValueRef inlineasm = LLVMConstInlineAsm(ftype, code, "", true, false);
367 LLVMBuildCall(builder, inlineasm, NULL, 0, "");
368 } else {
369 LLVMTypeRef ftype = LLVMFunctionType(ctx->i32, &ctx->i32, 1, false);
370 LLVMValueRef inlineasm = LLVMConstInlineAsm(ftype, code, "=v,0", true, false);
371 LLVMValueRef vgpr = *pvgpr;
372 LLVMTypeRef vgpr_type = LLVMTypeOf(vgpr);
373 unsigned vgpr_size = ac_get_type_size(vgpr_type);
374 LLVMValueRef vgpr0;
375
376 assert(vgpr_size % 4 == 0);
377
378 vgpr = LLVMBuildBitCast(builder, vgpr, LLVMVectorType(ctx->i32, vgpr_size / 4), "");
379 vgpr0 = LLVMBuildExtractElement(builder, vgpr, ctx->i32_0, "");
380 vgpr0 = LLVMBuildCall(builder, inlineasm, &vgpr0, 1, "");
381 vgpr = LLVMBuildInsertElement(builder, vgpr, vgpr0, ctx->i32_0, "");
382 vgpr = LLVMBuildBitCast(builder, vgpr, vgpr_type, "");
383
384 *pvgpr = vgpr;
385 }
386 }
387
388 LLVMValueRef
389 ac_build_shader_clock(struct ac_llvm_context *ctx)
390 {
391 LLVMValueRef tmp = ac_build_intrinsic(ctx, "llvm.readcyclecounter",
392 ctx->i64, NULL, 0, 0);
393 return LLVMBuildBitCast(ctx->builder, tmp, ctx->v2i32, "");
394 }
395
396 LLVMValueRef
397 ac_build_ballot(struct ac_llvm_context *ctx,
398 LLVMValueRef value)
399 {
400 LLVMValueRef args[3] = {
401 value,
402 ctx->i32_0,
403 LLVMConstInt(ctx->i32, LLVMIntNE, 0)
404 };
405
406 /* We currently have no other way to prevent LLVM from lifting the icmp
407 * calls to a dominating basic block.
408 */
409 ac_build_optimization_barrier(ctx, &args[0]);
410
411 args[0] = ac_to_integer(ctx, args[0]);
412
413 return ac_build_intrinsic(ctx,
414 "llvm.amdgcn.icmp.i32",
415 ctx->i64, args, 3,
416 AC_FUNC_ATTR_NOUNWIND |
417 AC_FUNC_ATTR_READNONE |
418 AC_FUNC_ATTR_CONVERGENT);
419 }
420
421 LLVMValueRef
422 ac_build_vote_all(struct ac_llvm_context *ctx, LLVMValueRef value)
423 {
424 LLVMValueRef active_set = ac_build_ballot(ctx, ctx->i32_1);
425 LLVMValueRef vote_set = ac_build_ballot(ctx, value);
426 return LLVMBuildICmp(ctx->builder, LLVMIntEQ, vote_set, active_set, "");
427 }
428
429 LLVMValueRef
430 ac_build_vote_any(struct ac_llvm_context *ctx, LLVMValueRef value)
431 {
432 LLVMValueRef vote_set = ac_build_ballot(ctx, value);
433 return LLVMBuildICmp(ctx->builder, LLVMIntNE, vote_set,
434 LLVMConstInt(ctx->i64, 0, 0), "");
435 }
436
437 LLVMValueRef
438 ac_build_vote_eq(struct ac_llvm_context *ctx, LLVMValueRef value)
439 {
440 LLVMValueRef active_set = ac_build_ballot(ctx, ctx->i32_1);
441 LLVMValueRef vote_set = ac_build_ballot(ctx, value);
442
443 LLVMValueRef all = LLVMBuildICmp(ctx->builder, LLVMIntEQ,
444 vote_set, active_set, "");
445 LLVMValueRef none = LLVMBuildICmp(ctx->builder, LLVMIntEQ,
446 vote_set,
447 LLVMConstInt(ctx->i64, 0, 0), "");
448 return LLVMBuildOr(ctx->builder, all, none, "");
449 }
450
451 LLVMValueRef
452 ac_build_varying_gather_values(struct ac_llvm_context *ctx, LLVMValueRef *values,
453 unsigned value_count, unsigned component)
454 {
455 LLVMValueRef vec = NULL;
456
457 if (value_count == 1) {
458 return values[component];
459 } else if (!value_count)
460 unreachable("value_count is 0");
461
462 for (unsigned i = component; i < value_count + component; i++) {
463 LLVMValueRef value = values[i];
464
465 if (i == component)
466 vec = LLVMGetUndef( LLVMVectorType(LLVMTypeOf(value), value_count));
467 LLVMValueRef index = LLVMConstInt(ctx->i32, i - component, false);
468 vec = LLVMBuildInsertElement(ctx->builder, vec, value, index, "");
469 }
470 return vec;
471 }
472
473 LLVMValueRef
474 ac_build_gather_values_extended(struct ac_llvm_context *ctx,
475 LLVMValueRef *values,
476 unsigned value_count,
477 unsigned value_stride,
478 bool load,
479 bool always_vector)
480 {
481 LLVMBuilderRef builder = ctx->builder;
482 LLVMValueRef vec = NULL;
483 unsigned i;
484
485 if (value_count == 1 && !always_vector) {
486 if (load)
487 return LLVMBuildLoad(builder, values[0], "");
488 return values[0];
489 } else if (!value_count)
490 unreachable("value_count is 0");
491
492 for (i = 0; i < value_count; i++) {
493 LLVMValueRef value = values[i * value_stride];
494 if (load)
495 value = LLVMBuildLoad(builder, value, "");
496
497 if (!i)
498 vec = LLVMGetUndef( LLVMVectorType(LLVMTypeOf(value), value_count));
499 LLVMValueRef index = LLVMConstInt(ctx->i32, i, false);
500 vec = LLVMBuildInsertElement(builder, vec, value, index, "");
501 }
502 return vec;
503 }
504
505 LLVMValueRef
506 ac_build_gather_values(struct ac_llvm_context *ctx,
507 LLVMValueRef *values,
508 unsigned value_count)
509 {
510 return ac_build_gather_values_extended(ctx, values, value_count, 1, false, false);
511 }
512
513 /* Expand a scalar or vector to <4 x type> by filling the remaining channels
514 * with undef. Extract at most num_channels components from the input.
515 */
516 LLVMValueRef ac_build_expand_to_vec4(struct ac_llvm_context *ctx,
517 LLVMValueRef value,
518 unsigned num_channels)
519 {
520 LLVMTypeRef elemtype;
521 LLVMValueRef chan[4];
522
523 if (LLVMGetTypeKind(LLVMTypeOf(value)) == LLVMVectorTypeKind) {
524 unsigned vec_size = LLVMGetVectorSize(LLVMTypeOf(value));
525 num_channels = MIN2(num_channels, vec_size);
526
527 if (num_channels >= 4)
528 return value;
529
530 for (unsigned i = 0; i < num_channels; i++)
531 chan[i] = ac_llvm_extract_elem(ctx, value, i);
532
533 elemtype = LLVMGetElementType(LLVMTypeOf(value));
534 } else {
535 if (num_channels) {
536 assert(num_channels == 1);
537 chan[0] = value;
538 }
539 elemtype = LLVMTypeOf(value);
540 }
541
542 while (num_channels < 4)
543 chan[num_channels++] = LLVMGetUndef(elemtype);
544
545 return ac_build_gather_values(ctx, chan, 4);
546 }
547
548 LLVMValueRef
549 ac_build_fdiv(struct ac_llvm_context *ctx,
550 LLVMValueRef num,
551 LLVMValueRef den)
552 {
553 LLVMValueRef ret = LLVMBuildFDiv(ctx->builder, num, den, "");
554
555 /* Use v_rcp_f32 instead of precise division. */
556 if (!LLVMIsConstant(ret))
557 LLVMSetMetadata(ret, ctx->fpmath_md_kind, ctx->fpmath_md_2p5_ulp);
558 return ret;
559 }
560
561 /* Coordinates for cube map selection. sc, tc, and ma are as in Table 8.27
562 * of the OpenGL 4.5 (Compatibility Profile) specification, except ma is
563 * already multiplied by two. id is the cube face number.
564 */
565 struct cube_selection_coords {
566 LLVMValueRef stc[2];
567 LLVMValueRef ma;
568 LLVMValueRef id;
569 };
570
571 static void
572 build_cube_intrinsic(struct ac_llvm_context *ctx,
573 LLVMValueRef in[3],
574 struct cube_selection_coords *out)
575 {
576 LLVMTypeRef f32 = ctx->f32;
577
578 out->stc[1] = ac_build_intrinsic(ctx, "llvm.amdgcn.cubetc",
579 f32, in, 3, AC_FUNC_ATTR_READNONE);
580 out->stc[0] = ac_build_intrinsic(ctx, "llvm.amdgcn.cubesc",
581 f32, in, 3, AC_FUNC_ATTR_READNONE);
582 out->ma = ac_build_intrinsic(ctx, "llvm.amdgcn.cubema",
583 f32, in, 3, AC_FUNC_ATTR_READNONE);
584 out->id = ac_build_intrinsic(ctx, "llvm.amdgcn.cubeid",
585 f32, in, 3, AC_FUNC_ATTR_READNONE);
586 }
587
588 /**
589 * Build a manual selection sequence for cube face sc/tc coordinates and
590 * major axis vector (multiplied by 2 for consistency) for the given
591 * vec3 \p coords, for the face implied by \p selcoords.
592 *
593 * For the major axis, we always adjust the sign to be in the direction of
594 * selcoords.ma; i.e., a positive out_ma means that coords is pointed towards
595 * the selcoords major axis.
596 */
597 static void build_cube_select(struct ac_llvm_context *ctx,
598 const struct cube_selection_coords *selcoords,
599 const LLVMValueRef *coords,
600 LLVMValueRef *out_st,
601 LLVMValueRef *out_ma)
602 {
603 LLVMBuilderRef builder = ctx->builder;
604 LLVMTypeRef f32 = LLVMTypeOf(coords[0]);
605 LLVMValueRef is_ma_positive;
606 LLVMValueRef sgn_ma;
607 LLVMValueRef is_ma_z, is_not_ma_z;
608 LLVMValueRef is_ma_y;
609 LLVMValueRef is_ma_x;
610 LLVMValueRef sgn;
611 LLVMValueRef tmp;
612
613 is_ma_positive = LLVMBuildFCmp(builder, LLVMRealUGE,
614 selcoords->ma, LLVMConstReal(f32, 0.0), "");
615 sgn_ma = LLVMBuildSelect(builder, is_ma_positive,
616 LLVMConstReal(f32, 1.0), LLVMConstReal(f32, -1.0), "");
617
618 is_ma_z = LLVMBuildFCmp(builder, LLVMRealUGE, selcoords->id, LLVMConstReal(f32, 4.0), "");
619 is_not_ma_z = LLVMBuildNot(builder, is_ma_z, "");
620 is_ma_y = LLVMBuildAnd(builder, is_not_ma_z,
621 LLVMBuildFCmp(builder, LLVMRealUGE, selcoords->id, LLVMConstReal(f32, 2.0), ""), "");
622 is_ma_x = LLVMBuildAnd(builder, is_not_ma_z, LLVMBuildNot(builder, is_ma_y, ""), "");
623
624 /* Select sc */
625 tmp = LLVMBuildSelect(builder, is_ma_x, coords[2], coords[0], "");
626 sgn = LLVMBuildSelect(builder, is_ma_y, LLVMConstReal(f32, 1.0),
627 LLVMBuildSelect(builder, is_ma_z, sgn_ma,
628 LLVMBuildFNeg(builder, sgn_ma, ""), ""), "");
629 out_st[0] = LLVMBuildFMul(builder, tmp, sgn, "");
630
631 /* Select tc */
632 tmp = LLVMBuildSelect(builder, is_ma_y, coords[2], coords[1], "");
633 sgn = LLVMBuildSelect(builder, is_ma_y, sgn_ma,
634 LLVMConstReal(f32, -1.0), "");
635 out_st[1] = LLVMBuildFMul(builder, tmp, sgn, "");
636
637 /* Select ma */
638 tmp = LLVMBuildSelect(builder, is_ma_z, coords[2],
639 LLVMBuildSelect(builder, is_ma_y, coords[1], coords[0], ""), "");
640 tmp = ac_build_intrinsic(ctx, "llvm.fabs.f32",
641 ctx->f32, &tmp, 1, AC_FUNC_ATTR_READNONE);
642 *out_ma = LLVMBuildFMul(builder, tmp, LLVMConstReal(f32, 2.0), "");
643 }
644
645 void
646 ac_prepare_cube_coords(struct ac_llvm_context *ctx,
647 bool is_deriv, bool is_array, bool is_lod,
648 LLVMValueRef *coords_arg,
649 LLVMValueRef *derivs_arg)
650 {
651
652 LLVMBuilderRef builder = ctx->builder;
653 struct cube_selection_coords selcoords;
654 LLVMValueRef coords[3];
655 LLVMValueRef invma;
656
657 if (is_array && !is_lod) {
658 LLVMValueRef tmp = coords_arg[3];
659 tmp = ac_build_intrinsic(ctx, "llvm.rint.f32", ctx->f32, &tmp, 1, 0);
660
661 /* Section 8.9 (Texture Functions) of the GLSL 4.50 spec says:
662 *
663 * "For Array forms, the array layer used will be
664 *
665 * max(0, min(d−1, floor(layer+0.5)))
666 *
667 * where d is the depth of the texture array and layer
668 * comes from the component indicated in the tables below.
669 * Workaroudn for an issue where the layer is taken from a
670 * helper invocation which happens to fall on a different
671 * layer due to extrapolation."
672 *
673 * VI and earlier attempt to implement this in hardware by
674 * clamping the value of coords[2] = (8 * layer) + face.
675 * Unfortunately, this means that the we end up with the wrong
676 * face when clamping occurs.
677 *
678 * Clamp the layer earlier to work around the issue.
679 */
680 if (ctx->chip_class <= VI) {
681 LLVMValueRef ge0;
682 ge0 = LLVMBuildFCmp(builder, LLVMRealOGE, tmp, ctx->f32_0, "");
683 tmp = LLVMBuildSelect(builder, ge0, tmp, ctx->f32_0, "");
684 }
685
686 coords_arg[3] = tmp;
687 }
688
689 build_cube_intrinsic(ctx, coords_arg, &selcoords);
690
691 invma = ac_build_intrinsic(ctx, "llvm.fabs.f32",
692 ctx->f32, &selcoords.ma, 1, AC_FUNC_ATTR_READNONE);
693 invma = ac_build_fdiv(ctx, LLVMConstReal(ctx->f32, 1.0), invma);
694
695 for (int i = 0; i < 2; ++i)
696 coords[i] = LLVMBuildFMul(builder, selcoords.stc[i], invma, "");
697
698 coords[2] = selcoords.id;
699
700 if (is_deriv && derivs_arg) {
701 LLVMValueRef derivs[4];
702 int axis;
703
704 /* Convert cube derivatives to 2D derivatives. */
705 for (axis = 0; axis < 2; axis++) {
706 LLVMValueRef deriv_st[2];
707 LLVMValueRef deriv_ma;
708
709 /* Transform the derivative alongside the texture
710 * coordinate. Mathematically, the correct formula is
711 * as follows. Assume we're projecting onto the +Z face
712 * and denote by dx/dh the derivative of the (original)
713 * X texture coordinate with respect to horizontal
714 * window coordinates. The projection onto the +Z face
715 * plane is:
716 *
717 * f(x,z) = x/z
718 *
719 * Then df/dh = df/dx * dx/dh + df/dz * dz/dh
720 * = 1/z * dx/dh - x/z * 1/z * dz/dh.
721 *
722 * This motivatives the implementation below.
723 *
724 * Whether this actually gives the expected results for
725 * apps that might feed in derivatives obtained via
726 * finite differences is anyone's guess. The OpenGL spec
727 * seems awfully quiet about how textureGrad for cube
728 * maps should be handled.
729 */
730 build_cube_select(ctx, &selcoords, &derivs_arg[axis * 3],
731 deriv_st, &deriv_ma);
732
733 deriv_ma = LLVMBuildFMul(builder, deriv_ma, invma, "");
734
735 for (int i = 0; i < 2; ++i)
736 derivs[axis * 2 + i] =
737 LLVMBuildFSub(builder,
738 LLVMBuildFMul(builder, deriv_st[i], invma, ""),
739 LLVMBuildFMul(builder, deriv_ma, coords[i], ""), "");
740 }
741
742 memcpy(derivs_arg, derivs, sizeof(derivs));
743 }
744
745 /* Shift the texture coordinate. This must be applied after the
746 * derivative calculation.
747 */
748 for (int i = 0; i < 2; ++i)
749 coords[i] = LLVMBuildFAdd(builder, coords[i], LLVMConstReal(ctx->f32, 1.5), "");
750
751 if (is_array) {
752 /* for cube arrays coord.z = coord.w(array_index) * 8 + face */
753 /* coords_arg.w component - array_index for cube arrays */
754 LLVMValueRef tmp = LLVMBuildFMul(ctx->builder, coords_arg[3], LLVMConstReal(ctx->f32, 8.0), "");
755 coords[2] = LLVMBuildFAdd(ctx->builder, tmp, coords[2], "");
756 }
757
758 memcpy(coords_arg, coords, sizeof(coords));
759 }
760
761
762 LLVMValueRef
763 ac_build_fs_interp(struct ac_llvm_context *ctx,
764 LLVMValueRef llvm_chan,
765 LLVMValueRef attr_number,
766 LLVMValueRef params,
767 LLVMValueRef i,
768 LLVMValueRef j)
769 {
770 LLVMValueRef args[5];
771 LLVMValueRef p1;
772
773 args[0] = i;
774 args[1] = llvm_chan;
775 args[2] = attr_number;
776 args[3] = params;
777
778 p1 = ac_build_intrinsic(ctx, "llvm.amdgcn.interp.p1",
779 ctx->f32, args, 4, AC_FUNC_ATTR_READNONE);
780
781 args[0] = p1;
782 args[1] = j;
783 args[2] = llvm_chan;
784 args[3] = attr_number;
785 args[4] = params;
786
787 return ac_build_intrinsic(ctx, "llvm.amdgcn.interp.p2",
788 ctx->f32, args, 5, AC_FUNC_ATTR_READNONE);
789 }
790
791 LLVMValueRef
792 ac_build_fs_interp_mov(struct ac_llvm_context *ctx,
793 LLVMValueRef parameter,
794 LLVMValueRef llvm_chan,
795 LLVMValueRef attr_number,
796 LLVMValueRef params)
797 {
798 LLVMValueRef args[4];
799
800 args[0] = parameter;
801 args[1] = llvm_chan;
802 args[2] = attr_number;
803 args[3] = params;
804
805 return ac_build_intrinsic(ctx, "llvm.amdgcn.interp.mov",
806 ctx->f32, args, 4, AC_FUNC_ATTR_READNONE);
807 }
808
809 LLVMValueRef
810 ac_build_gep0(struct ac_llvm_context *ctx,
811 LLVMValueRef base_ptr,
812 LLVMValueRef index)
813 {
814 LLVMValueRef indices[2] = {
815 LLVMConstInt(ctx->i32, 0, 0),
816 index,
817 };
818 return LLVMBuildGEP(ctx->builder, base_ptr,
819 indices, 2, "");
820 }
821
822 void
823 ac_build_indexed_store(struct ac_llvm_context *ctx,
824 LLVMValueRef base_ptr, LLVMValueRef index,
825 LLVMValueRef value)
826 {
827 LLVMBuildStore(ctx->builder, value,
828 ac_build_gep0(ctx, base_ptr, index));
829 }
830
831 /**
832 * Build an LLVM bytecode indexed load using LLVMBuildGEP + LLVMBuildLoad.
833 * It's equivalent to doing a load from &base_ptr[index].
834 *
835 * \param base_ptr Where the array starts.
836 * \param index The element index into the array.
837 * \param uniform Whether the base_ptr and index can be assumed to be
838 * dynamically uniform (i.e. load to an SGPR)
839 * \param invariant Whether the load is invariant (no other opcodes affect it)
840 */
841 static LLVMValueRef
842 ac_build_load_custom(struct ac_llvm_context *ctx, LLVMValueRef base_ptr,
843 LLVMValueRef index, bool uniform, bool invariant)
844 {
845 LLVMValueRef pointer, result;
846
847 pointer = ac_build_gep0(ctx, base_ptr, index);
848 if (uniform)
849 LLVMSetMetadata(pointer, ctx->uniform_md_kind, ctx->empty_md);
850 result = LLVMBuildLoad(ctx->builder, pointer, "");
851 if (invariant)
852 LLVMSetMetadata(result, ctx->invariant_load_md_kind, ctx->empty_md);
853 return result;
854 }
855
856 LLVMValueRef ac_build_load(struct ac_llvm_context *ctx, LLVMValueRef base_ptr,
857 LLVMValueRef index)
858 {
859 return ac_build_load_custom(ctx, base_ptr, index, false, false);
860 }
861
862 LLVMValueRef ac_build_load_invariant(struct ac_llvm_context *ctx,
863 LLVMValueRef base_ptr, LLVMValueRef index)
864 {
865 return ac_build_load_custom(ctx, base_ptr, index, false, true);
866 }
867
868 LLVMValueRef ac_build_load_to_sgpr(struct ac_llvm_context *ctx,
869 LLVMValueRef base_ptr, LLVMValueRef index)
870 {
871 return ac_build_load_custom(ctx, base_ptr, index, true, true);
872 }
873
874 /* TBUFFER_STORE_FORMAT_{X,XY,XYZ,XYZW} <- the suffix is selected by num_channels=1..4.
875 * The type of vdata must be one of i32 (num_channels=1), v2i32 (num_channels=2),
876 * or v4i32 (num_channels=3,4).
877 */
878 void
879 ac_build_buffer_store_dword(struct ac_llvm_context *ctx,
880 LLVMValueRef rsrc,
881 LLVMValueRef vdata,
882 unsigned num_channels,
883 LLVMValueRef voffset,
884 LLVMValueRef soffset,
885 unsigned inst_offset,
886 bool glc,
887 bool slc,
888 bool writeonly_memory,
889 bool swizzle_enable_hint)
890 {
891 /* SWIZZLE_ENABLE requires that soffset isn't folded into voffset
892 * (voffset is swizzled, but soffset isn't swizzled).
893 * llvm.amdgcn.buffer.store doesn't have a separate soffset parameter.
894 */
895 if (!swizzle_enable_hint) {
896 /* Split 3 channel stores, becase LLVM doesn't support 3-channel
897 * intrinsics. */
898 if (num_channels == 3) {
899 LLVMValueRef v[3], v01;
900
901 for (int i = 0; i < 3; i++) {
902 v[i] = LLVMBuildExtractElement(ctx->builder, vdata,
903 LLVMConstInt(ctx->i32, i, 0), "");
904 }
905 v01 = ac_build_gather_values(ctx, v, 2);
906
907 ac_build_buffer_store_dword(ctx, rsrc, v01, 2, voffset,
908 soffset, inst_offset, glc, slc,
909 writeonly_memory, swizzle_enable_hint);
910 ac_build_buffer_store_dword(ctx, rsrc, v[2], 1, voffset,
911 soffset, inst_offset + 8,
912 glc, slc,
913 writeonly_memory, swizzle_enable_hint);
914 return;
915 }
916
917 unsigned func = CLAMP(num_channels, 1, 3) - 1;
918 static const char *types[] = {"f32", "v2f32", "v4f32"};
919 char name[256];
920 LLVMValueRef offset = soffset;
921
922 if (inst_offset)
923 offset = LLVMBuildAdd(ctx->builder, offset,
924 LLVMConstInt(ctx->i32, inst_offset, 0), "");
925 if (voffset)
926 offset = LLVMBuildAdd(ctx->builder, offset, voffset, "");
927
928 LLVMValueRef args[] = {
929 ac_to_float(ctx, vdata),
930 LLVMBuildBitCast(ctx->builder, rsrc, ctx->v4i32, ""),
931 LLVMConstInt(ctx->i32, 0, 0),
932 offset,
933 LLVMConstInt(ctx->i1, glc, 0),
934 LLVMConstInt(ctx->i1, slc, 0),
935 };
936
937 snprintf(name, sizeof(name), "llvm.amdgcn.buffer.store.%s",
938 types[func]);
939
940 ac_build_intrinsic(ctx, name, ctx->voidt,
941 args, ARRAY_SIZE(args),
942 writeonly_memory ?
943 AC_FUNC_ATTR_INACCESSIBLE_MEM_ONLY :
944 AC_FUNC_ATTR_WRITEONLY);
945 return;
946 }
947
948 static unsigned dfmt[] = {
949 V_008F0C_BUF_DATA_FORMAT_32,
950 V_008F0C_BUF_DATA_FORMAT_32_32,
951 V_008F0C_BUF_DATA_FORMAT_32_32_32,
952 V_008F0C_BUF_DATA_FORMAT_32_32_32_32
953 };
954 assert(num_channels >= 1 && num_channels <= 4);
955
956 LLVMValueRef args[] = {
957 rsrc,
958 vdata,
959 LLVMConstInt(ctx->i32, num_channels, 0),
960 voffset ? voffset : LLVMGetUndef(ctx->i32),
961 soffset,
962 LLVMConstInt(ctx->i32, inst_offset, 0),
963 LLVMConstInt(ctx->i32, dfmt[num_channels - 1], 0),
964 LLVMConstInt(ctx->i32, V_008F0C_BUF_NUM_FORMAT_UINT, 0),
965 LLVMConstInt(ctx->i32, voffset != NULL, 0),
966 LLVMConstInt(ctx->i32, 0, 0), /* idxen */
967 LLVMConstInt(ctx->i32, glc, 0),
968 LLVMConstInt(ctx->i32, slc, 0),
969 LLVMConstInt(ctx->i32, 0, 0), /* tfe*/
970 };
971
972 /* The instruction offset field has 12 bits */
973 assert(voffset || inst_offset < (1 << 12));
974
975 /* The intrinsic is overloaded, we need to add a type suffix for overloading to work. */
976 unsigned func = CLAMP(num_channels, 1, 3) - 1;
977 const char *types[] = {"i32", "v2i32", "v4i32"};
978 char name[256];
979 snprintf(name, sizeof(name), "llvm.SI.tbuffer.store.%s", types[func]);
980
981 ac_build_intrinsic(ctx, name, ctx->voidt,
982 args, ARRAY_SIZE(args),
983 AC_FUNC_ATTR_LEGACY);
984 }
985
986 static LLVMValueRef
987 ac_build_buffer_load_common(struct ac_llvm_context *ctx,
988 LLVMValueRef rsrc,
989 LLVMValueRef vindex,
990 LLVMValueRef voffset,
991 unsigned num_channels,
992 bool glc,
993 bool slc,
994 bool can_speculate,
995 bool use_format)
996 {
997 LLVMValueRef args[] = {
998 LLVMBuildBitCast(ctx->builder, rsrc, ctx->v4i32, ""),
999 vindex ? vindex : LLVMConstInt(ctx->i32, 0, 0),
1000 voffset,
1001 LLVMConstInt(ctx->i1, glc, 0),
1002 LLVMConstInt(ctx->i1, slc, 0)
1003 };
1004 unsigned func = CLAMP(num_channels, 1, 3) - 1;
1005
1006 LLVMTypeRef types[] = {ctx->f32, ctx->v2f32, ctx->v4f32};
1007 const char *type_names[] = {"f32", "v2f32", "v4f32"};
1008 char name[256];
1009
1010 if (use_format) {
1011 snprintf(name, sizeof(name), "llvm.amdgcn.buffer.load.format.%s",
1012 type_names[func]);
1013 } else {
1014 snprintf(name, sizeof(name), "llvm.amdgcn.buffer.load.%s",
1015 type_names[func]);
1016 }
1017
1018 return ac_build_intrinsic(ctx, name, types[func], args,
1019 ARRAY_SIZE(args),
1020 ac_get_load_intr_attribs(can_speculate));
1021 }
1022
1023 LLVMValueRef
1024 ac_build_buffer_load(struct ac_llvm_context *ctx,
1025 LLVMValueRef rsrc,
1026 int num_channels,
1027 LLVMValueRef vindex,
1028 LLVMValueRef voffset,
1029 LLVMValueRef soffset,
1030 unsigned inst_offset,
1031 unsigned glc,
1032 unsigned slc,
1033 bool can_speculate,
1034 bool allow_smem)
1035 {
1036 LLVMValueRef offset = LLVMConstInt(ctx->i32, inst_offset, 0);
1037 if (voffset)
1038 offset = LLVMBuildAdd(ctx->builder, offset, voffset, "");
1039 if (soffset)
1040 offset = LLVMBuildAdd(ctx->builder, offset, soffset, "");
1041
1042 /* TODO: VI and later generations can use SMEM with GLC=1.*/
1043 if (allow_smem && !glc && !slc) {
1044 assert(vindex == NULL);
1045
1046 LLVMValueRef result[8];
1047
1048 for (int i = 0; i < num_channels; i++) {
1049 if (i) {
1050 offset = LLVMBuildAdd(ctx->builder, offset,
1051 LLVMConstInt(ctx->i32, 4, 0), "");
1052 }
1053 LLVMValueRef args[2] = {rsrc, offset};
1054 result[i] = ac_build_intrinsic(ctx, "llvm.SI.load.const.v4i32",
1055 ctx->f32, args, 2,
1056 AC_FUNC_ATTR_READNONE |
1057 AC_FUNC_ATTR_LEGACY);
1058 }
1059 if (num_channels == 1)
1060 return result[0];
1061
1062 if (num_channels == 3)
1063 result[num_channels++] = LLVMGetUndef(ctx->f32);
1064 return ac_build_gather_values(ctx, result, num_channels);
1065 }
1066
1067 return ac_build_buffer_load_common(ctx, rsrc, vindex, offset,
1068 num_channels, glc, slc,
1069 can_speculate, false);
1070 }
1071
1072 LLVMValueRef ac_build_buffer_load_format(struct ac_llvm_context *ctx,
1073 LLVMValueRef rsrc,
1074 LLVMValueRef vindex,
1075 LLVMValueRef voffset,
1076 unsigned num_channels,
1077 bool glc,
1078 bool can_speculate)
1079 {
1080 return ac_build_buffer_load_common(ctx, rsrc, vindex, voffset,
1081 num_channels, glc, false,
1082 can_speculate, true);
1083 }
1084
1085 LLVMValueRef ac_build_buffer_load_format_gfx9_safe(struct ac_llvm_context *ctx,
1086 LLVMValueRef rsrc,
1087 LLVMValueRef vindex,
1088 LLVMValueRef voffset,
1089 unsigned num_channels,
1090 bool glc,
1091 bool can_speculate)
1092 {
1093 LLVMValueRef elem_count = LLVMBuildExtractElement(ctx->builder, rsrc, LLVMConstInt(ctx->i32, 2, 0), "");
1094 LLVMValueRef stride = LLVMBuildExtractElement(ctx->builder, rsrc, LLVMConstInt(ctx->i32, 1, 0), "");
1095 stride = LLVMBuildLShr(ctx->builder, stride, LLVMConstInt(ctx->i32, 16, 0), "");
1096
1097 LLVMValueRef new_elem_count = LLVMBuildSelect(ctx->builder,
1098 LLVMBuildICmp(ctx->builder, LLVMIntUGT, elem_count, stride, ""),
1099 elem_count, stride, "");
1100
1101 LLVMValueRef new_rsrc = LLVMBuildInsertElement(ctx->builder, rsrc, new_elem_count,
1102 LLVMConstInt(ctx->i32, 2, 0), "");
1103
1104 return ac_build_buffer_load_common(ctx, new_rsrc, vindex, voffset,
1105 num_channels, glc, false,
1106 can_speculate, true);
1107 }
1108
1109 /**
1110 * Set range metadata on an instruction. This can only be used on load and
1111 * call instructions. If you know an instruction can only produce the values
1112 * 0, 1, 2, you would do set_range_metadata(value, 0, 3);
1113 * \p lo is the minimum value inclusive.
1114 * \p hi is the maximum value exclusive.
1115 */
1116 static void set_range_metadata(struct ac_llvm_context *ctx,
1117 LLVMValueRef value, unsigned lo, unsigned hi)
1118 {
1119 LLVMValueRef range_md, md_args[2];
1120 LLVMTypeRef type = LLVMTypeOf(value);
1121 LLVMContextRef context = LLVMGetTypeContext(type);
1122
1123 md_args[0] = LLVMConstInt(type, lo, false);
1124 md_args[1] = LLVMConstInt(type, hi, false);
1125 range_md = LLVMMDNodeInContext(context, md_args, 2);
1126 LLVMSetMetadata(value, ctx->range_md_kind, range_md);
1127 }
1128
1129 LLVMValueRef
1130 ac_get_thread_id(struct ac_llvm_context *ctx)
1131 {
1132 LLVMValueRef tid;
1133
1134 LLVMValueRef tid_args[2];
1135 tid_args[0] = LLVMConstInt(ctx->i32, 0xffffffff, false);
1136 tid_args[1] = LLVMConstInt(ctx->i32, 0, false);
1137 tid_args[1] = ac_build_intrinsic(ctx,
1138 "llvm.amdgcn.mbcnt.lo", ctx->i32,
1139 tid_args, 2, AC_FUNC_ATTR_READNONE);
1140
1141 tid = ac_build_intrinsic(ctx, "llvm.amdgcn.mbcnt.hi",
1142 ctx->i32, tid_args,
1143 2, AC_FUNC_ATTR_READNONE);
1144 set_range_metadata(ctx, tid, 0, 64);
1145 return tid;
1146 }
1147
1148 /*
1149 * SI implements derivatives using the local data store (LDS)
1150 * All writes to the LDS happen in all executing threads at
1151 * the same time. TID is the Thread ID for the current
1152 * thread and is a value between 0 and 63, representing
1153 * the thread's position in the wavefront.
1154 *
1155 * For the pixel shader threads are grouped into quads of four pixels.
1156 * The TIDs of the pixels of a quad are:
1157 *
1158 * +------+------+
1159 * |4n + 0|4n + 1|
1160 * +------+------+
1161 * |4n + 2|4n + 3|
1162 * +------+------+
1163 *
1164 * So, masking the TID with 0xfffffffc yields the TID of the top left pixel
1165 * of the quad, masking with 0xfffffffd yields the TID of the top pixel of
1166 * the current pixel's column, and masking with 0xfffffffe yields the TID
1167 * of the left pixel of the current pixel's row.
1168 *
1169 * Adding 1 yields the TID of the pixel to the right of the left pixel, and
1170 * adding 2 yields the TID of the pixel below the top pixel.
1171 */
1172 LLVMValueRef
1173 ac_build_ddxy(struct ac_llvm_context *ctx,
1174 uint32_t mask,
1175 int idx,
1176 LLVMValueRef val)
1177 {
1178 LLVMValueRef tl, trbl, args[2];
1179 LLVMValueRef result;
1180
1181 if (ctx->chip_class >= VI) {
1182 LLVMValueRef thread_id, tl_tid, trbl_tid;
1183 thread_id = ac_get_thread_id(ctx);
1184
1185 tl_tid = LLVMBuildAnd(ctx->builder, thread_id,
1186 LLVMConstInt(ctx->i32, mask, false), "");
1187
1188 trbl_tid = LLVMBuildAdd(ctx->builder, tl_tid,
1189 LLVMConstInt(ctx->i32, idx, false), "");
1190
1191 args[0] = LLVMBuildMul(ctx->builder, tl_tid,
1192 LLVMConstInt(ctx->i32, 4, false), "");
1193 args[1] = val;
1194 tl = ac_build_intrinsic(ctx,
1195 "llvm.amdgcn.ds.bpermute", ctx->i32,
1196 args, 2,
1197 AC_FUNC_ATTR_READNONE |
1198 AC_FUNC_ATTR_CONVERGENT);
1199
1200 args[0] = LLVMBuildMul(ctx->builder, trbl_tid,
1201 LLVMConstInt(ctx->i32, 4, false), "");
1202 trbl = ac_build_intrinsic(ctx,
1203 "llvm.amdgcn.ds.bpermute", ctx->i32,
1204 args, 2,
1205 AC_FUNC_ATTR_READNONE |
1206 AC_FUNC_ATTR_CONVERGENT);
1207 } else {
1208 uint32_t masks[2] = {};
1209
1210 switch (mask) {
1211 case AC_TID_MASK_TOP_LEFT:
1212 masks[0] = 0x8000;
1213 if (idx == 1)
1214 masks[1] = 0x8055;
1215 else
1216 masks[1] = 0x80aa;
1217
1218 break;
1219 case AC_TID_MASK_TOP:
1220 masks[0] = 0x8044;
1221 masks[1] = 0x80ee;
1222 break;
1223 case AC_TID_MASK_LEFT:
1224 masks[0] = 0x80a0;
1225 masks[1] = 0x80f5;
1226 break;
1227 default:
1228 assert(0);
1229 }
1230
1231 args[0] = val;
1232 args[1] = LLVMConstInt(ctx->i32, masks[0], false);
1233
1234 tl = ac_build_intrinsic(ctx,
1235 "llvm.amdgcn.ds.swizzle", ctx->i32,
1236 args, 2,
1237 AC_FUNC_ATTR_READNONE |
1238 AC_FUNC_ATTR_CONVERGENT);
1239
1240 args[1] = LLVMConstInt(ctx->i32, masks[1], false);
1241 trbl = ac_build_intrinsic(ctx,
1242 "llvm.amdgcn.ds.swizzle", ctx->i32,
1243 args, 2,
1244 AC_FUNC_ATTR_READNONE |
1245 AC_FUNC_ATTR_CONVERGENT);
1246 }
1247
1248 tl = LLVMBuildBitCast(ctx->builder, tl, ctx->f32, "");
1249 trbl = LLVMBuildBitCast(ctx->builder, trbl, ctx->f32, "");
1250 result = LLVMBuildFSub(ctx->builder, trbl, tl, "");
1251 return result;
1252 }
1253
1254 void
1255 ac_build_sendmsg(struct ac_llvm_context *ctx,
1256 uint32_t msg,
1257 LLVMValueRef wave_id)
1258 {
1259 LLVMValueRef args[2];
1260 args[0] = LLVMConstInt(ctx->i32, msg, false);
1261 args[1] = wave_id;
1262 ac_build_intrinsic(ctx, "llvm.amdgcn.s.sendmsg", ctx->voidt, args, 2, 0);
1263 }
1264
1265 LLVMValueRef
1266 ac_build_imsb(struct ac_llvm_context *ctx,
1267 LLVMValueRef arg,
1268 LLVMTypeRef dst_type)
1269 {
1270 LLVMValueRef msb = ac_build_intrinsic(ctx, "llvm.amdgcn.sffbh.i32",
1271 dst_type, &arg, 1,
1272 AC_FUNC_ATTR_READNONE);
1273
1274 /* The HW returns the last bit index from MSB, but NIR/TGSI wants
1275 * the index from LSB. Invert it by doing "31 - msb". */
1276 msb = LLVMBuildSub(ctx->builder, LLVMConstInt(ctx->i32, 31, false),
1277 msb, "");
1278
1279 LLVMValueRef all_ones = LLVMConstInt(ctx->i32, -1, true);
1280 LLVMValueRef cond = LLVMBuildOr(ctx->builder,
1281 LLVMBuildICmp(ctx->builder, LLVMIntEQ,
1282 arg, LLVMConstInt(ctx->i32, 0, 0), ""),
1283 LLVMBuildICmp(ctx->builder, LLVMIntEQ,
1284 arg, all_ones, ""), "");
1285
1286 return LLVMBuildSelect(ctx->builder, cond, all_ones, msb, "");
1287 }
1288
1289 LLVMValueRef
1290 ac_build_umsb(struct ac_llvm_context *ctx,
1291 LLVMValueRef arg,
1292 LLVMTypeRef dst_type)
1293 {
1294 const char *intrin_name;
1295 LLVMTypeRef type;
1296 LLVMValueRef highest_bit;
1297 LLVMValueRef zero;
1298
1299 if (ac_get_elem_bits(ctx, LLVMTypeOf(arg)) == 64) {
1300 intrin_name = "llvm.ctlz.i64";
1301 type = ctx->i64;
1302 highest_bit = LLVMConstInt(ctx->i64, 63, false);
1303 zero = ctx->i64_0;
1304 } else {
1305 intrin_name = "llvm.ctlz.i32";
1306 type = ctx->i32;
1307 highest_bit = LLVMConstInt(ctx->i32, 31, false);
1308 zero = ctx->i32_0;
1309 }
1310
1311 LLVMValueRef params[2] = {
1312 arg,
1313 ctx->i1true,
1314 };
1315
1316 LLVMValueRef msb = ac_build_intrinsic(ctx, intrin_name, type,
1317 params, 2,
1318 AC_FUNC_ATTR_READNONE);
1319
1320 /* The HW returns the last bit index from MSB, but TGSI/NIR wants
1321 * the index from LSB. Invert it by doing "31 - msb". */
1322 msb = LLVMBuildSub(ctx->builder, highest_bit, msb, "");
1323 msb = LLVMBuildTruncOrBitCast(ctx->builder, msb, ctx->i32, "");
1324
1325 /* check for zero */
1326 return LLVMBuildSelect(ctx->builder,
1327 LLVMBuildICmp(ctx->builder, LLVMIntEQ, arg, zero, ""),
1328 LLVMConstInt(ctx->i32, -1, true), msb, "");
1329 }
1330
1331 LLVMValueRef ac_build_fmin(struct ac_llvm_context *ctx, LLVMValueRef a,
1332 LLVMValueRef b)
1333 {
1334 LLVMValueRef args[2] = {a, b};
1335 return ac_build_intrinsic(ctx, "llvm.minnum.f32", ctx->f32, args, 2,
1336 AC_FUNC_ATTR_READNONE);
1337 }
1338
1339 LLVMValueRef ac_build_fmax(struct ac_llvm_context *ctx, LLVMValueRef a,
1340 LLVMValueRef b)
1341 {
1342 LLVMValueRef args[2] = {a, b};
1343 return ac_build_intrinsic(ctx, "llvm.maxnum.f32", ctx->f32, args, 2,
1344 AC_FUNC_ATTR_READNONE);
1345 }
1346
1347 LLVMValueRef ac_build_imin(struct ac_llvm_context *ctx, LLVMValueRef a,
1348 LLVMValueRef b)
1349 {
1350 LLVMValueRef cmp = LLVMBuildICmp(ctx->builder, LLVMIntSLE, a, b, "");
1351 return LLVMBuildSelect(ctx->builder, cmp, a, b, "");
1352 }
1353
1354 LLVMValueRef ac_build_imax(struct ac_llvm_context *ctx, LLVMValueRef a,
1355 LLVMValueRef b)
1356 {
1357 LLVMValueRef cmp = LLVMBuildICmp(ctx->builder, LLVMIntSGT, a, b, "");
1358 return LLVMBuildSelect(ctx->builder, cmp, a, b, "");
1359 }
1360
1361 LLVMValueRef ac_build_umin(struct ac_llvm_context *ctx, LLVMValueRef a,
1362 LLVMValueRef b)
1363 {
1364 LLVMValueRef cmp = LLVMBuildICmp(ctx->builder, LLVMIntULE, a, b, "");
1365 return LLVMBuildSelect(ctx->builder, cmp, a, b, "");
1366 }
1367
1368 LLVMValueRef ac_build_clamp(struct ac_llvm_context *ctx, LLVMValueRef value)
1369 {
1370 if (HAVE_LLVM >= 0x0500) {
1371 return ac_build_fmin(ctx, ac_build_fmax(ctx, value, ctx->f32_0),
1372 ctx->f32_1);
1373 }
1374
1375 LLVMValueRef args[3] = {
1376 value,
1377 LLVMConstReal(ctx->f32, 0),
1378 LLVMConstReal(ctx->f32, 1),
1379 };
1380
1381 return ac_build_intrinsic(ctx, "llvm.AMDGPU.clamp.", ctx->f32, args, 3,
1382 AC_FUNC_ATTR_READNONE |
1383 AC_FUNC_ATTR_LEGACY);
1384 }
1385
1386 void ac_build_export(struct ac_llvm_context *ctx, struct ac_export_args *a)
1387 {
1388 LLVMValueRef args[9];
1389
1390 if (HAVE_LLVM >= 0x0500) {
1391 args[0] = LLVMConstInt(ctx->i32, a->target, 0);
1392 args[1] = LLVMConstInt(ctx->i32, a->enabled_channels, 0);
1393
1394 if (a->compr) {
1395 LLVMTypeRef i16 = LLVMInt16TypeInContext(ctx->context);
1396 LLVMTypeRef v2i16 = LLVMVectorType(i16, 2);
1397
1398 args[2] = LLVMBuildBitCast(ctx->builder, a->out[0],
1399 v2i16, "");
1400 args[3] = LLVMBuildBitCast(ctx->builder, a->out[1],
1401 v2i16, "");
1402 args[4] = LLVMConstInt(ctx->i1, a->done, 0);
1403 args[5] = LLVMConstInt(ctx->i1, a->valid_mask, 0);
1404
1405 ac_build_intrinsic(ctx, "llvm.amdgcn.exp.compr.v2i16",
1406 ctx->voidt, args, 6, 0);
1407 } else {
1408 args[2] = a->out[0];
1409 args[3] = a->out[1];
1410 args[4] = a->out[2];
1411 args[5] = a->out[3];
1412 args[6] = LLVMConstInt(ctx->i1, a->done, 0);
1413 args[7] = LLVMConstInt(ctx->i1, a->valid_mask, 0);
1414
1415 ac_build_intrinsic(ctx, "llvm.amdgcn.exp.f32",
1416 ctx->voidt, args, 8, 0);
1417 }
1418 return;
1419 }
1420
1421 args[0] = LLVMConstInt(ctx->i32, a->enabled_channels, 0);
1422 args[1] = LLVMConstInt(ctx->i32, a->valid_mask, 0);
1423 args[2] = LLVMConstInt(ctx->i32, a->done, 0);
1424 args[3] = LLVMConstInt(ctx->i32, a->target, 0);
1425 args[4] = LLVMConstInt(ctx->i32, a->compr, 0);
1426 memcpy(args + 5, a->out, sizeof(a->out[0]) * 4);
1427
1428 ac_build_intrinsic(ctx, "llvm.SI.export", ctx->voidt, args, 9,
1429 AC_FUNC_ATTR_LEGACY);
1430 }
1431
1432 void ac_build_export_null(struct ac_llvm_context *ctx)
1433 {
1434 struct ac_export_args args;
1435
1436 args.enabled_channels = 0x0; /* enabled channels */
1437 args.valid_mask = 1; /* whether the EXEC mask is valid */
1438 args.done = 1; /* DONE bit */
1439 args.target = V_008DFC_SQ_EXP_NULL;
1440 args.compr = 0; /* COMPR flag (0 = 32-bit export) */
1441 args.out[0] = LLVMGetUndef(ctx->f32); /* R */
1442 args.out[1] = LLVMGetUndef(ctx->f32); /* G */
1443 args.out[2] = LLVMGetUndef(ctx->f32); /* B */
1444 args.out[3] = LLVMGetUndef(ctx->f32); /* A */
1445
1446 ac_build_export(ctx, &args);
1447 }
1448
1449 static unsigned ac_num_coords(enum ac_image_dim dim)
1450 {
1451 switch (dim) {
1452 case ac_image_1d:
1453 return 1;
1454 case ac_image_2d:
1455 case ac_image_1darray:
1456 return 2;
1457 case ac_image_3d:
1458 case ac_image_cube:
1459 case ac_image_2darray:
1460 case ac_image_2dmsaa:
1461 return 3;
1462 case ac_image_2darraymsaa:
1463 return 4;
1464 default:
1465 unreachable("ac_num_coords: bad dim");
1466 }
1467 }
1468
1469 static unsigned ac_num_derivs(enum ac_image_dim dim)
1470 {
1471 switch (dim) {
1472 case ac_image_1d:
1473 case ac_image_1darray:
1474 return 2;
1475 case ac_image_2d:
1476 case ac_image_2darray:
1477 case ac_image_cube:
1478 return 4;
1479 case ac_image_3d:
1480 return 6;
1481 case ac_image_2dmsaa:
1482 case ac_image_2darraymsaa:
1483 default:
1484 unreachable("derivatives not supported");
1485 }
1486 }
1487
1488 LLVMValueRef ac_build_image_opcode(struct ac_llvm_context *ctx,
1489 struct ac_image_args *a)
1490 {
1491 LLVMValueRef args[16];
1492 LLVMTypeRef retty = ctx->v4f32;
1493 const char *name = NULL;
1494 const char *atomic_subop = "";
1495 char intr_name[128], coords_type[64];
1496
1497 assert(!a->lod || a->lod == ctx->i32_0 || a->lod == ctx->f32_0 ||
1498 !a->level_zero);
1499 assert((a->opcode != ac_image_get_resinfo && a->opcode != ac_image_load_mip &&
1500 a->opcode != ac_image_store_mip) ||
1501 a->lod);
1502 assert((a->bias ? 1 : 0) +
1503 (a->lod ? 1 : 0) +
1504 (a->level_zero ? 1 : 0) +
1505 (a->derivs[0] ? 1 : 0) <= 1);
1506
1507 bool sample = a->opcode == ac_image_sample ||
1508 a->opcode == ac_image_gather4 ||
1509 a->opcode == ac_image_get_lod;
1510 bool atomic = a->opcode == ac_image_atomic ||
1511 a->opcode == ac_image_atomic_cmpswap;
1512 bool da = a->dim == ac_image_cube ||
1513 a->dim == ac_image_1darray ||
1514 a->dim == ac_image_2darray ||
1515 a->dim == ac_image_2darraymsaa;
1516 if (a->opcode == ac_image_get_lod)
1517 da = false;
1518
1519 unsigned num_coords =
1520 a->opcode != ac_image_get_resinfo ? ac_num_coords(a->dim) : 0;
1521 LLVMValueRef addr;
1522 unsigned num_addr = 0;
1523
1524 if (a->offset)
1525 args[num_addr++] = ac_to_integer(ctx, a->offset);
1526 if (a->bias)
1527 args[num_addr++] = ac_to_integer(ctx, a->bias);
1528 if (a->compare)
1529 args[num_addr++] = ac_to_integer(ctx, a->compare);
1530 if (a->derivs[0]) {
1531 unsigned num_derivs = ac_num_derivs(a->dim);
1532 for (unsigned i = 0; i < num_derivs; ++i)
1533 args[num_addr++] = ac_to_integer(ctx, a->derivs[i]);
1534 }
1535 for (unsigned i = 0; i < num_coords; ++i)
1536 args[num_addr++] = ac_to_integer(ctx, a->coords[i]);
1537 if (a->lod)
1538 args[num_addr++] = ac_to_integer(ctx, a->lod);
1539
1540 unsigned pad_goal = util_next_power_of_two(num_addr);
1541 while (num_addr < pad_goal)
1542 args[num_addr++] = LLVMGetUndef(ctx->i32);
1543
1544 addr = ac_build_gather_values(ctx, args, num_addr);
1545
1546 unsigned num_args = 0;
1547 if (atomic || a->opcode == ac_image_store || a->opcode == ac_image_store_mip) {
1548 args[num_args++] = a->data[0];
1549 if (a->opcode == ac_image_atomic_cmpswap)
1550 args[num_args++] = a->data[1];
1551 }
1552
1553 unsigned coords_arg = num_args;
1554 if (sample)
1555 args[num_args++] = ac_to_float(ctx, addr);
1556 else
1557 args[num_args++] = ac_to_integer(ctx, addr);
1558
1559 args[num_args++] = a->resource;
1560 if (sample)
1561 args[num_args++] = a->sampler;
1562 if (!atomic) {
1563 args[num_args++] = LLVMConstInt(ctx->i32, a->dmask, 0);
1564 if (sample)
1565 args[num_args++] = LLVMConstInt(ctx->i1, a->unorm, 0);
1566 args[num_args++] = a->cache_policy & ac_glc ? ctx->i1true : ctx->i1false;
1567 args[num_args++] = a->cache_policy & ac_slc ? ctx->i1true : ctx->i1false;
1568 args[num_args++] = ctx->i1false; /* lwe */
1569 args[num_args++] = LLVMConstInt(ctx->i1, da, 0);
1570 } else {
1571 args[num_args++] = ctx->i1false; /* r128 */
1572 args[num_args++] = LLVMConstInt(ctx->i1, da, 0);
1573 args[num_args++] = a->cache_policy & ac_slc ? ctx->i1true : ctx->i1false;
1574 }
1575
1576 switch (a->opcode) {
1577 case ac_image_sample:
1578 name = "llvm.amdgcn.image.sample";
1579 break;
1580 case ac_image_gather4:
1581 name = "llvm.amdgcn.image.gather4";
1582 break;
1583 case ac_image_load:
1584 name = "llvm.amdgcn.image.load";
1585 break;
1586 case ac_image_load_mip:
1587 name = "llvm.amdgcn.image.load.mip";
1588 break;
1589 case ac_image_store:
1590 name = "llvm.amdgcn.image.store";
1591 retty = ctx->voidt;
1592 break;
1593 case ac_image_store_mip:
1594 name = "llvm.amdgcn.image.store.mip";
1595 retty = ctx->voidt;
1596 break;
1597 case ac_image_atomic:
1598 case ac_image_atomic_cmpswap:
1599 name = "llvm.amdgcn.image.atomic.";
1600 retty = ctx->i32;
1601 if (a->opcode == ac_image_atomic_cmpswap) {
1602 atomic_subop = "cmpswap";
1603 } else {
1604 switch (a->atomic) {
1605 case ac_atomic_swap: atomic_subop = "swap"; break;
1606 case ac_atomic_add: atomic_subop = "add"; break;
1607 case ac_atomic_sub: atomic_subop = "sub"; break;
1608 case ac_atomic_smin: atomic_subop = "smin"; break;
1609 case ac_atomic_umin: atomic_subop = "umin"; break;
1610 case ac_atomic_smax: atomic_subop = "smax"; break;
1611 case ac_atomic_umax: atomic_subop = "umax"; break;
1612 case ac_atomic_and: atomic_subop = "and"; break;
1613 case ac_atomic_or: atomic_subop = "or"; break;
1614 case ac_atomic_xor: atomic_subop = "xor"; break;
1615 }
1616 }
1617 break;
1618 case ac_image_get_lod:
1619 name = "llvm.amdgcn.image.getlod";
1620 break;
1621 case ac_image_get_resinfo:
1622 name = "llvm.amdgcn.image.getresinfo";
1623 break;
1624 default:
1625 unreachable("invalid image opcode");
1626 }
1627
1628 ac_build_type_name_for_intr(LLVMTypeOf(args[coords_arg]), coords_type,
1629 sizeof(coords_type));
1630
1631 if (atomic) {
1632 snprintf(intr_name, sizeof(intr_name), "llvm.amdgcn.image.atomic.%s.%s",
1633 atomic_subop, coords_type);
1634 } else {
1635 bool lod_suffix =
1636 a->lod && (a->opcode == ac_image_sample || a->opcode == ac_image_gather4);
1637
1638 snprintf(intr_name, sizeof(intr_name), "%s%s%s%s.v4f32.%s.v8i32",
1639 name,
1640 a->compare ? ".c" : "",
1641 a->bias ? ".b" :
1642 lod_suffix ? ".l" :
1643 a->derivs[0] ? ".d" :
1644 a->level_zero ? ".lz" : "",
1645 a->offset ? ".o" : "",
1646 coords_type);
1647 }
1648
1649 LLVMValueRef result =
1650 ac_build_intrinsic(ctx, intr_name, retty, args, num_args,
1651 a->attributes);
1652 if (!sample && retty == ctx->v4f32) {
1653 result = LLVMBuildBitCast(ctx->builder, result,
1654 ctx->v4i32, "");
1655 }
1656 return result;
1657 }
1658
1659 LLVMValueRef ac_build_cvt_pkrtz_f16(struct ac_llvm_context *ctx,
1660 LLVMValueRef args[2])
1661 {
1662 if (HAVE_LLVM >= 0x0500) {
1663 LLVMTypeRef v2f16 =
1664 LLVMVectorType(LLVMHalfTypeInContext(ctx->context), 2);
1665 LLVMValueRef res =
1666 ac_build_intrinsic(ctx, "llvm.amdgcn.cvt.pkrtz",
1667 v2f16, args, 2,
1668 AC_FUNC_ATTR_READNONE);
1669 return LLVMBuildBitCast(ctx->builder, res, ctx->i32, "");
1670 }
1671
1672 return ac_build_intrinsic(ctx, "llvm.SI.packf16", ctx->i32, args, 2,
1673 AC_FUNC_ATTR_READNONE |
1674 AC_FUNC_ATTR_LEGACY);
1675 }
1676
1677 /* Upper 16 bits must be zero. */
1678 static LLVMValueRef ac_llvm_pack_two_int16(struct ac_llvm_context *ctx,
1679 LLVMValueRef val[2])
1680 {
1681 return LLVMBuildOr(ctx->builder, val[0],
1682 LLVMBuildShl(ctx->builder, val[1],
1683 LLVMConstInt(ctx->i32, 16, 0),
1684 ""), "");
1685 }
1686
1687 /* Upper 16 bits are ignored and will be dropped. */
1688 static LLVMValueRef ac_llvm_pack_two_int32_as_int16(struct ac_llvm_context *ctx,
1689 LLVMValueRef val[2])
1690 {
1691 LLVMValueRef v[2] = {
1692 LLVMBuildAnd(ctx->builder, val[0],
1693 LLVMConstInt(ctx->i32, 0xffff, 0), ""),
1694 val[1],
1695 };
1696 return ac_llvm_pack_two_int16(ctx, v);
1697 }
1698
1699 LLVMValueRef ac_build_cvt_pknorm_i16(struct ac_llvm_context *ctx,
1700 LLVMValueRef args[2])
1701 {
1702 if (HAVE_LLVM >= 0x0600) {
1703 LLVMValueRef res =
1704 ac_build_intrinsic(ctx, "llvm.amdgcn.cvt.pknorm.i16",
1705 ctx->v2i16, args, 2,
1706 AC_FUNC_ATTR_READNONE);
1707 return LLVMBuildBitCast(ctx->builder, res, ctx->i32, "");
1708 }
1709
1710 LLVMValueRef val[2];
1711
1712 for (int chan = 0; chan < 2; chan++) {
1713 /* Clamp between [-1, 1]. */
1714 val[chan] = ac_build_fmin(ctx, args[chan], ctx->f32_1);
1715 val[chan] = ac_build_fmax(ctx, val[chan], LLVMConstReal(ctx->f32, -1));
1716 /* Convert to a signed integer in [-32767, 32767]. */
1717 val[chan] = LLVMBuildFMul(ctx->builder, val[chan],
1718 LLVMConstReal(ctx->f32, 32767), "");
1719 /* If positive, add 0.5, else add -0.5. */
1720 val[chan] = LLVMBuildFAdd(ctx->builder, val[chan],
1721 LLVMBuildSelect(ctx->builder,
1722 LLVMBuildFCmp(ctx->builder, LLVMRealOGE,
1723 val[chan], ctx->f32_0, ""),
1724 LLVMConstReal(ctx->f32, 0.5),
1725 LLVMConstReal(ctx->f32, -0.5), ""), "");
1726 val[chan] = LLVMBuildFPToSI(ctx->builder, val[chan], ctx->i32, "");
1727 }
1728 return ac_llvm_pack_two_int32_as_int16(ctx, val);
1729 }
1730
1731 LLVMValueRef ac_build_cvt_pknorm_u16(struct ac_llvm_context *ctx,
1732 LLVMValueRef args[2])
1733 {
1734 if (HAVE_LLVM >= 0x0600) {
1735 LLVMValueRef res =
1736 ac_build_intrinsic(ctx, "llvm.amdgcn.cvt.pknorm.u16",
1737 ctx->v2i16, args, 2,
1738 AC_FUNC_ATTR_READNONE);
1739 return LLVMBuildBitCast(ctx->builder, res, ctx->i32, "");
1740 }
1741
1742 LLVMValueRef val[2];
1743
1744 for (int chan = 0; chan < 2; chan++) {
1745 val[chan] = ac_build_clamp(ctx, args[chan]);
1746 val[chan] = LLVMBuildFMul(ctx->builder, val[chan],
1747 LLVMConstReal(ctx->f32, 65535), "");
1748 val[chan] = LLVMBuildFAdd(ctx->builder, val[chan],
1749 LLVMConstReal(ctx->f32, 0.5), "");
1750 val[chan] = LLVMBuildFPToUI(ctx->builder, val[chan],
1751 ctx->i32, "");
1752 }
1753 return ac_llvm_pack_two_int32_as_int16(ctx, val);
1754 }
1755
1756 /* The 8-bit and 10-bit clamping is for HW workarounds. */
1757 LLVMValueRef ac_build_cvt_pk_i16(struct ac_llvm_context *ctx,
1758 LLVMValueRef args[2], unsigned bits, bool hi)
1759 {
1760 assert(bits == 8 || bits == 10 || bits == 16);
1761
1762 LLVMValueRef max_rgb = LLVMConstInt(ctx->i32,
1763 bits == 8 ? 127 : bits == 10 ? 511 : 32767, 0);
1764 LLVMValueRef min_rgb = LLVMConstInt(ctx->i32,
1765 bits == 8 ? -128 : bits == 10 ? -512 : -32768, 0);
1766 LLVMValueRef max_alpha =
1767 bits != 10 ? max_rgb : ctx->i32_1;
1768 LLVMValueRef min_alpha =
1769 bits != 10 ? min_rgb : LLVMConstInt(ctx->i32, -2, 0);
1770 bool has_intrinsic = HAVE_LLVM >= 0x0600;
1771
1772 /* Clamp. */
1773 if (!has_intrinsic || bits != 16) {
1774 for (int i = 0; i < 2; i++) {
1775 bool alpha = hi && i == 1;
1776 args[i] = ac_build_imin(ctx, args[i],
1777 alpha ? max_alpha : max_rgb);
1778 args[i] = ac_build_imax(ctx, args[i],
1779 alpha ? min_alpha : min_rgb);
1780 }
1781 }
1782
1783 if (has_intrinsic) {
1784 LLVMValueRef res =
1785 ac_build_intrinsic(ctx, "llvm.amdgcn.cvt.pk.i16",
1786 ctx->v2i16, args, 2,
1787 AC_FUNC_ATTR_READNONE);
1788 return LLVMBuildBitCast(ctx->builder, res, ctx->i32, "");
1789 }
1790
1791 return ac_llvm_pack_two_int32_as_int16(ctx, args);
1792 }
1793
1794 /* The 8-bit and 10-bit clamping is for HW workarounds. */
1795 LLVMValueRef ac_build_cvt_pk_u16(struct ac_llvm_context *ctx,
1796 LLVMValueRef args[2], unsigned bits, bool hi)
1797 {
1798 assert(bits == 8 || bits == 10 || bits == 16);
1799
1800 LLVMValueRef max_rgb = LLVMConstInt(ctx->i32,
1801 bits == 8 ? 255 : bits == 10 ? 1023 : 65535, 0);
1802 LLVMValueRef max_alpha =
1803 bits != 10 ? max_rgb : LLVMConstInt(ctx->i32, 3, 0);
1804 bool has_intrinsic = HAVE_LLVM >= 0x0600;
1805
1806 /* Clamp. */
1807 if (!has_intrinsic || bits != 16) {
1808 for (int i = 0; i < 2; i++) {
1809 bool alpha = hi && i == 1;
1810 args[i] = ac_build_umin(ctx, args[i],
1811 alpha ? max_alpha : max_rgb);
1812 }
1813 }
1814
1815 if (has_intrinsic) {
1816 LLVMValueRef res =
1817 ac_build_intrinsic(ctx, "llvm.amdgcn.cvt.pk.u16",
1818 ctx->v2i16, args, 2,
1819 AC_FUNC_ATTR_READNONE);
1820 return LLVMBuildBitCast(ctx->builder, res, ctx->i32, "");
1821 }
1822
1823 return ac_llvm_pack_two_int16(ctx, args);
1824 }
1825
1826 LLVMValueRef ac_build_wqm_vote(struct ac_llvm_context *ctx, LLVMValueRef i1)
1827 {
1828 assert(HAVE_LLVM >= 0x0600);
1829 return ac_build_intrinsic(ctx, "llvm.amdgcn.wqm.vote", ctx->i1,
1830 &i1, 1, AC_FUNC_ATTR_READNONE);
1831 }
1832
1833 void ac_build_kill_if_false(struct ac_llvm_context *ctx, LLVMValueRef i1)
1834 {
1835 if (HAVE_LLVM >= 0x0600) {
1836 ac_build_intrinsic(ctx, "llvm.amdgcn.kill", ctx->voidt,
1837 &i1, 1, 0);
1838 return;
1839 }
1840
1841 LLVMValueRef value = LLVMBuildSelect(ctx->builder, i1,
1842 LLVMConstReal(ctx->f32, 1),
1843 LLVMConstReal(ctx->f32, -1), "");
1844 ac_build_intrinsic(ctx, "llvm.AMDGPU.kill", ctx->voidt,
1845 &value, 1, AC_FUNC_ATTR_LEGACY);
1846 }
1847
1848 LLVMValueRef ac_build_bfe(struct ac_llvm_context *ctx, LLVMValueRef input,
1849 LLVMValueRef offset, LLVMValueRef width,
1850 bool is_signed)
1851 {
1852 LLVMValueRef args[] = {
1853 input,
1854 offset,
1855 width,
1856 };
1857
1858 if (HAVE_LLVM >= 0x0500) {
1859 return ac_build_intrinsic(ctx,
1860 is_signed ? "llvm.amdgcn.sbfe.i32" :
1861 "llvm.amdgcn.ubfe.i32",
1862 ctx->i32, args, 3,
1863 AC_FUNC_ATTR_READNONE);
1864 }
1865
1866 return ac_build_intrinsic(ctx,
1867 is_signed ? "llvm.AMDGPU.bfe.i32" :
1868 "llvm.AMDGPU.bfe.u32",
1869 ctx->i32, args, 3,
1870 AC_FUNC_ATTR_READNONE |
1871 AC_FUNC_ATTR_LEGACY);
1872 }
1873
1874 void ac_build_waitcnt(struct ac_llvm_context *ctx, unsigned simm16)
1875 {
1876 LLVMValueRef args[1] = {
1877 LLVMConstInt(ctx->i32, simm16, false),
1878 };
1879 ac_build_intrinsic(ctx, "llvm.amdgcn.s.waitcnt",
1880 ctx->voidt, args, 1, 0);
1881 }
1882
1883 LLVMValueRef ac_build_fract(struct ac_llvm_context *ctx, LLVMValueRef src0,
1884 unsigned bitsize)
1885 {
1886 LLVMTypeRef type;
1887 char *intr;
1888
1889 if (bitsize == 32) {
1890 intr = "llvm.floor.f32";
1891 type = ctx->f32;
1892 } else {
1893 intr = "llvm.floor.f64";
1894 type = ctx->f64;
1895 }
1896
1897 LLVMValueRef params[] = {
1898 src0,
1899 };
1900 LLVMValueRef floor = ac_build_intrinsic(ctx, intr, type, params, 1,
1901 AC_FUNC_ATTR_READNONE);
1902 return LLVMBuildFSub(ctx->builder, src0, floor, "");
1903 }
1904
1905 LLVMValueRef ac_build_isign(struct ac_llvm_context *ctx, LLVMValueRef src0,
1906 unsigned bitsize)
1907 {
1908 LLVMValueRef cmp, val, zero, one;
1909 LLVMTypeRef type;
1910
1911 if (bitsize == 32) {
1912 type = ctx->i32;
1913 zero = ctx->i32_0;
1914 one = ctx->i32_1;
1915 } else {
1916 type = ctx->i64;
1917 zero = ctx->i64_0;
1918 one = ctx->i64_1;
1919 }
1920
1921 cmp = LLVMBuildICmp(ctx->builder, LLVMIntSGT, src0, zero, "");
1922 val = LLVMBuildSelect(ctx->builder, cmp, one, src0, "");
1923 cmp = LLVMBuildICmp(ctx->builder, LLVMIntSGE, val, zero, "");
1924 val = LLVMBuildSelect(ctx->builder, cmp, val, LLVMConstInt(type, -1, true), "");
1925 return val;
1926 }
1927
1928 LLVMValueRef ac_build_fsign(struct ac_llvm_context *ctx, LLVMValueRef src0,
1929 unsigned bitsize)
1930 {
1931 LLVMValueRef cmp, val, zero, one;
1932 LLVMTypeRef type;
1933
1934 if (bitsize == 32) {
1935 type = ctx->f32;
1936 zero = ctx->f32_0;
1937 one = ctx->f32_1;
1938 } else {
1939 type = ctx->f64;
1940 zero = ctx->f64_0;
1941 one = ctx->f64_1;
1942 }
1943
1944 cmp = LLVMBuildFCmp(ctx->builder, LLVMRealOGT, src0, zero, "");
1945 val = LLVMBuildSelect(ctx->builder, cmp, one, src0, "");
1946 cmp = LLVMBuildFCmp(ctx->builder, LLVMRealOGE, val, zero, "");
1947 val = LLVMBuildSelect(ctx->builder, cmp, val, LLVMConstReal(type, -1.0), "");
1948 return val;
1949 }
1950
1951 #define AC_EXP_TARGET (HAVE_LLVM >= 0x0500 ? 0 : 3)
1952 #define AC_EXP_ENABLED_CHANNELS (HAVE_LLVM >= 0x0500 ? 1 : 0)
1953 #define AC_EXP_OUT0 (HAVE_LLVM >= 0x0500 ? 2 : 5)
1954
1955 enum ac_ir_type {
1956 AC_IR_UNDEF,
1957 AC_IR_CONST,
1958 AC_IR_VALUE,
1959 };
1960
1961 struct ac_vs_exp_chan
1962 {
1963 LLVMValueRef value;
1964 float const_float;
1965 enum ac_ir_type type;
1966 };
1967
1968 struct ac_vs_exp_inst {
1969 unsigned offset;
1970 LLVMValueRef inst;
1971 struct ac_vs_exp_chan chan[4];
1972 };
1973
1974 struct ac_vs_exports {
1975 unsigned num;
1976 struct ac_vs_exp_inst exp[VARYING_SLOT_MAX];
1977 };
1978
1979 /* Return true if the PARAM export has been eliminated. */
1980 static bool ac_eliminate_const_output(uint8_t *vs_output_param_offset,
1981 uint32_t num_outputs,
1982 struct ac_vs_exp_inst *exp)
1983 {
1984 unsigned i, default_val; /* SPI_PS_INPUT_CNTL_i.DEFAULT_VAL */
1985 bool is_zero[4] = {}, is_one[4] = {};
1986
1987 for (i = 0; i < 4; i++) {
1988 /* It's a constant expression. Undef outputs are eliminated too. */
1989 if (exp->chan[i].type == AC_IR_UNDEF) {
1990 is_zero[i] = true;
1991 is_one[i] = true;
1992 } else if (exp->chan[i].type == AC_IR_CONST) {
1993 if (exp->chan[i].const_float == 0)
1994 is_zero[i] = true;
1995 else if (exp->chan[i].const_float == 1)
1996 is_one[i] = true;
1997 else
1998 return false; /* other constant */
1999 } else
2000 return false;
2001 }
2002
2003 /* Only certain combinations of 0 and 1 can be eliminated. */
2004 if (is_zero[0] && is_zero[1] && is_zero[2])
2005 default_val = is_zero[3] ? 0 : 1;
2006 else if (is_one[0] && is_one[1] && is_one[2])
2007 default_val = is_zero[3] ? 2 : 3;
2008 else
2009 return false;
2010
2011 /* The PARAM export can be represented as DEFAULT_VAL. Kill it. */
2012 LLVMInstructionEraseFromParent(exp->inst);
2013
2014 /* Change OFFSET to DEFAULT_VAL. */
2015 for (i = 0; i < num_outputs; i++) {
2016 if (vs_output_param_offset[i] == exp->offset) {
2017 vs_output_param_offset[i] =
2018 AC_EXP_PARAM_DEFAULT_VAL_0000 + default_val;
2019 break;
2020 }
2021 }
2022 return true;
2023 }
2024
2025 static bool ac_eliminate_duplicated_output(struct ac_llvm_context *ctx,
2026 uint8_t *vs_output_param_offset,
2027 uint32_t num_outputs,
2028 struct ac_vs_exports *processed,
2029 struct ac_vs_exp_inst *exp)
2030 {
2031 unsigned p, copy_back_channels = 0;
2032
2033 /* See if the output is already in the list of processed outputs.
2034 * The LLVMValueRef comparison relies on SSA.
2035 */
2036 for (p = 0; p < processed->num; p++) {
2037 bool different = false;
2038
2039 for (unsigned j = 0; j < 4; j++) {
2040 struct ac_vs_exp_chan *c1 = &processed->exp[p].chan[j];
2041 struct ac_vs_exp_chan *c2 = &exp->chan[j];
2042
2043 /* Treat undef as a match. */
2044 if (c2->type == AC_IR_UNDEF)
2045 continue;
2046
2047 /* If c1 is undef but c2 isn't, we can copy c2 to c1
2048 * and consider the instruction duplicated.
2049 */
2050 if (c1->type == AC_IR_UNDEF) {
2051 copy_back_channels |= 1 << j;
2052 continue;
2053 }
2054
2055 /* Test whether the channels are not equal. */
2056 if (c1->type != c2->type ||
2057 (c1->type == AC_IR_CONST &&
2058 c1->const_float != c2->const_float) ||
2059 (c1->type == AC_IR_VALUE &&
2060 c1->value != c2->value)) {
2061 different = true;
2062 break;
2063 }
2064 }
2065 if (!different)
2066 break;
2067
2068 copy_back_channels = 0;
2069 }
2070 if (p == processed->num)
2071 return false;
2072
2073 /* If a match was found, but the matching export has undef where the new
2074 * one has a normal value, copy the normal value to the undef channel.
2075 */
2076 struct ac_vs_exp_inst *match = &processed->exp[p];
2077
2078 /* Get current enabled channels mask. */
2079 LLVMValueRef arg = LLVMGetOperand(match->inst, AC_EXP_ENABLED_CHANNELS);
2080 unsigned enabled_channels = LLVMConstIntGetZExtValue(arg);
2081
2082 while (copy_back_channels) {
2083 unsigned chan = u_bit_scan(&copy_back_channels);
2084
2085 assert(match->chan[chan].type == AC_IR_UNDEF);
2086 LLVMSetOperand(match->inst, AC_EXP_OUT0 + chan,
2087 exp->chan[chan].value);
2088 match->chan[chan] = exp->chan[chan];
2089
2090 /* Update number of enabled channels because the original mask
2091 * is not always 0xf.
2092 */
2093 enabled_channels |= (1 << chan);
2094 LLVMSetOperand(match->inst, AC_EXP_ENABLED_CHANNELS,
2095 LLVMConstInt(ctx->i32, enabled_channels, 0));
2096 }
2097
2098 /* The PARAM export is duplicated. Kill it. */
2099 LLVMInstructionEraseFromParent(exp->inst);
2100
2101 /* Change OFFSET to the matching export. */
2102 for (unsigned i = 0; i < num_outputs; i++) {
2103 if (vs_output_param_offset[i] == exp->offset) {
2104 vs_output_param_offset[i] = match->offset;
2105 break;
2106 }
2107 }
2108 return true;
2109 }
2110
2111 void ac_optimize_vs_outputs(struct ac_llvm_context *ctx,
2112 LLVMValueRef main_fn,
2113 uint8_t *vs_output_param_offset,
2114 uint32_t num_outputs,
2115 uint8_t *num_param_exports)
2116 {
2117 LLVMBasicBlockRef bb;
2118 bool removed_any = false;
2119 struct ac_vs_exports exports;
2120
2121 exports.num = 0;
2122
2123 /* Process all LLVM instructions. */
2124 bb = LLVMGetFirstBasicBlock(main_fn);
2125 while (bb) {
2126 LLVMValueRef inst = LLVMGetFirstInstruction(bb);
2127
2128 while (inst) {
2129 LLVMValueRef cur = inst;
2130 inst = LLVMGetNextInstruction(inst);
2131 struct ac_vs_exp_inst exp;
2132
2133 if (LLVMGetInstructionOpcode(cur) != LLVMCall)
2134 continue;
2135
2136 LLVMValueRef callee = ac_llvm_get_called_value(cur);
2137
2138 if (!ac_llvm_is_function(callee))
2139 continue;
2140
2141 const char *name = LLVMGetValueName(callee);
2142 unsigned num_args = LLVMCountParams(callee);
2143
2144 /* Check if this is an export instruction. */
2145 if ((num_args != 9 && num_args != 8) ||
2146 (strcmp(name, "llvm.SI.export") &&
2147 strcmp(name, "llvm.amdgcn.exp.f32")))
2148 continue;
2149
2150 LLVMValueRef arg = LLVMGetOperand(cur, AC_EXP_TARGET);
2151 unsigned target = LLVMConstIntGetZExtValue(arg);
2152
2153 if (target < V_008DFC_SQ_EXP_PARAM)
2154 continue;
2155
2156 target -= V_008DFC_SQ_EXP_PARAM;
2157
2158 /* Parse the instruction. */
2159 memset(&exp, 0, sizeof(exp));
2160 exp.offset = target;
2161 exp.inst = cur;
2162
2163 for (unsigned i = 0; i < 4; i++) {
2164 LLVMValueRef v = LLVMGetOperand(cur, AC_EXP_OUT0 + i);
2165
2166 exp.chan[i].value = v;
2167
2168 if (LLVMIsUndef(v)) {
2169 exp.chan[i].type = AC_IR_UNDEF;
2170 } else if (LLVMIsAConstantFP(v)) {
2171 LLVMBool loses_info;
2172 exp.chan[i].type = AC_IR_CONST;
2173 exp.chan[i].const_float =
2174 LLVMConstRealGetDouble(v, &loses_info);
2175 } else {
2176 exp.chan[i].type = AC_IR_VALUE;
2177 }
2178 }
2179
2180 /* Eliminate constant and duplicated PARAM exports. */
2181 if (ac_eliminate_const_output(vs_output_param_offset,
2182 num_outputs, &exp) ||
2183 ac_eliminate_duplicated_output(ctx,
2184 vs_output_param_offset,
2185 num_outputs, &exports,
2186 &exp)) {
2187 removed_any = true;
2188 } else {
2189 exports.exp[exports.num++] = exp;
2190 }
2191 }
2192 bb = LLVMGetNextBasicBlock(bb);
2193 }
2194
2195 /* Remove holes in export memory due to removed PARAM exports.
2196 * This is done by renumbering all PARAM exports.
2197 */
2198 if (removed_any) {
2199 uint8_t old_offset[VARYING_SLOT_MAX];
2200 unsigned out, i;
2201
2202 /* Make a copy of the offsets. We need the old version while
2203 * we are modifying some of them. */
2204 memcpy(old_offset, vs_output_param_offset,
2205 sizeof(old_offset));
2206
2207 for (i = 0; i < exports.num; i++) {
2208 unsigned offset = exports.exp[i].offset;
2209
2210 /* Update vs_output_param_offset. Multiple outputs can
2211 * have the same offset.
2212 */
2213 for (out = 0; out < num_outputs; out++) {
2214 if (old_offset[out] == offset)
2215 vs_output_param_offset[out] = i;
2216 }
2217
2218 /* Change the PARAM offset in the instruction. */
2219 LLVMSetOperand(exports.exp[i].inst, AC_EXP_TARGET,
2220 LLVMConstInt(ctx->i32,
2221 V_008DFC_SQ_EXP_PARAM + i, 0));
2222 }
2223 *num_param_exports = exports.num;
2224 }
2225 }
2226
2227 void ac_init_exec_full_mask(struct ac_llvm_context *ctx)
2228 {
2229 LLVMValueRef full_mask = LLVMConstInt(ctx->i64, ~0ull, 0);
2230 ac_build_intrinsic(ctx,
2231 "llvm.amdgcn.init.exec", ctx->voidt,
2232 &full_mask, 1, AC_FUNC_ATTR_CONVERGENT);
2233 }
2234
2235 void ac_declare_lds_as_pointer(struct ac_llvm_context *ctx)
2236 {
2237 unsigned lds_size = ctx->chip_class >= CIK ? 65536 : 32768;
2238 ctx->lds = LLVMBuildIntToPtr(ctx->builder, ctx->i32_0,
2239 LLVMPointerType(LLVMArrayType(ctx->i32, lds_size / 4), AC_LOCAL_ADDR_SPACE),
2240 "lds");
2241 }
2242
2243 LLVMValueRef ac_lds_load(struct ac_llvm_context *ctx,
2244 LLVMValueRef dw_addr)
2245 {
2246 return ac_build_load(ctx, ctx->lds, dw_addr);
2247 }
2248
2249 void ac_lds_store(struct ac_llvm_context *ctx,
2250 LLVMValueRef dw_addr,
2251 LLVMValueRef value)
2252 {
2253 value = ac_to_integer(ctx, value);
2254 ac_build_indexed_store(ctx, ctx->lds,
2255 dw_addr, value);
2256 }
2257
2258 LLVMValueRef ac_find_lsb(struct ac_llvm_context *ctx,
2259 LLVMTypeRef dst_type,
2260 LLVMValueRef src0)
2261 {
2262 unsigned src0_bitsize = ac_get_elem_bits(ctx, LLVMTypeOf(src0));
2263 const char *intrin_name;
2264 LLVMTypeRef type;
2265 LLVMValueRef zero;
2266 if (src0_bitsize == 64) {
2267 intrin_name = "llvm.cttz.i64";
2268 type = ctx->i64;
2269 zero = ctx->i64_0;
2270 } else {
2271 intrin_name = "llvm.cttz.i32";
2272 type = ctx->i32;
2273 zero = ctx->i32_0;
2274 }
2275
2276 LLVMValueRef params[2] = {
2277 src0,
2278
2279 /* The value of 1 means that ffs(x=0) = undef, so LLVM won't
2280 * add special code to check for x=0. The reason is that
2281 * the LLVM behavior for x=0 is different from what we
2282 * need here. However, LLVM also assumes that ffs(x) is
2283 * in [0, 31], but GLSL expects that ffs(0) = -1, so
2284 * a conditional assignment to handle 0 is still required.
2285 *
2286 * The hardware already implements the correct behavior.
2287 */
2288 LLVMConstInt(ctx->i1, 1, false),
2289 };
2290
2291 LLVMValueRef lsb = ac_build_intrinsic(ctx, intrin_name, type,
2292 params, 2,
2293 AC_FUNC_ATTR_READNONE);
2294
2295 if (src0_bitsize == 64) {
2296 lsb = LLVMBuildTrunc(ctx->builder, lsb, ctx->i32, "");
2297 }
2298
2299 /* TODO: We need an intrinsic to skip this conditional. */
2300 /* Check for zero: */
2301 return LLVMBuildSelect(ctx->builder, LLVMBuildICmp(ctx->builder,
2302 LLVMIntEQ, src0,
2303 zero, ""),
2304 LLVMConstInt(ctx->i32, -1, 0), lsb, "");
2305 }
2306
2307 LLVMTypeRef ac_array_in_const_addr_space(LLVMTypeRef elem_type)
2308 {
2309 return LLVMPointerType(LLVMArrayType(elem_type, 0),
2310 AC_CONST_ADDR_SPACE);
2311 }
2312
2313 LLVMTypeRef ac_array_in_const32_addr_space(LLVMTypeRef elem_type)
2314 {
2315 if (!HAVE_32BIT_POINTERS)
2316 return ac_array_in_const_addr_space(elem_type);
2317
2318 return LLVMPointerType(LLVMArrayType(elem_type, 0),
2319 AC_CONST_32BIT_ADDR_SPACE);
2320 }
2321
2322 static struct ac_llvm_flow *
2323 get_current_flow(struct ac_llvm_context *ctx)
2324 {
2325 if (ctx->flow_depth > 0)
2326 return &ctx->flow[ctx->flow_depth - 1];
2327 return NULL;
2328 }
2329
2330 static struct ac_llvm_flow *
2331 get_innermost_loop(struct ac_llvm_context *ctx)
2332 {
2333 for (unsigned i = ctx->flow_depth; i > 0; --i) {
2334 if (ctx->flow[i - 1].loop_entry_block)
2335 return &ctx->flow[i - 1];
2336 }
2337 return NULL;
2338 }
2339
2340 static struct ac_llvm_flow *
2341 push_flow(struct ac_llvm_context *ctx)
2342 {
2343 struct ac_llvm_flow *flow;
2344
2345 if (ctx->flow_depth >= ctx->flow_depth_max) {
2346 unsigned new_max = MAX2(ctx->flow_depth << 1,
2347 AC_LLVM_INITIAL_CF_DEPTH);
2348
2349 ctx->flow = realloc(ctx->flow, new_max * sizeof(*ctx->flow));
2350 ctx->flow_depth_max = new_max;
2351 }
2352
2353 flow = &ctx->flow[ctx->flow_depth];
2354 ctx->flow_depth++;
2355
2356 flow->next_block = NULL;
2357 flow->loop_entry_block = NULL;
2358 return flow;
2359 }
2360
2361 static void set_basicblock_name(LLVMBasicBlockRef bb, const char *base,
2362 int label_id)
2363 {
2364 char buf[32];
2365 snprintf(buf, sizeof(buf), "%s%d", base, label_id);
2366 LLVMSetValueName(LLVMBasicBlockAsValue(bb), buf);
2367 }
2368
2369 /* Append a basic block at the level of the parent flow.
2370 */
2371 static LLVMBasicBlockRef append_basic_block(struct ac_llvm_context *ctx,
2372 const char *name)
2373 {
2374 assert(ctx->flow_depth >= 1);
2375
2376 if (ctx->flow_depth >= 2) {
2377 struct ac_llvm_flow *flow = &ctx->flow[ctx->flow_depth - 2];
2378
2379 return LLVMInsertBasicBlockInContext(ctx->context,
2380 flow->next_block, name);
2381 }
2382
2383 LLVMValueRef main_fn =
2384 LLVMGetBasicBlockParent(LLVMGetInsertBlock(ctx->builder));
2385 return LLVMAppendBasicBlockInContext(ctx->context, main_fn, name);
2386 }
2387
2388 /* Emit a branch to the given default target for the current block if
2389 * applicable -- that is, if the current block does not already contain a
2390 * branch from a break or continue.
2391 */
2392 static void emit_default_branch(LLVMBuilderRef builder,
2393 LLVMBasicBlockRef target)
2394 {
2395 if (!LLVMGetBasicBlockTerminator(LLVMGetInsertBlock(builder)))
2396 LLVMBuildBr(builder, target);
2397 }
2398
2399 void ac_build_bgnloop(struct ac_llvm_context *ctx, int label_id)
2400 {
2401 struct ac_llvm_flow *flow = push_flow(ctx);
2402 flow->loop_entry_block = append_basic_block(ctx, "LOOP");
2403 flow->next_block = append_basic_block(ctx, "ENDLOOP");
2404 set_basicblock_name(flow->loop_entry_block, "loop", label_id);
2405 LLVMBuildBr(ctx->builder, flow->loop_entry_block);
2406 LLVMPositionBuilderAtEnd(ctx->builder, flow->loop_entry_block);
2407 }
2408
2409 void ac_build_break(struct ac_llvm_context *ctx)
2410 {
2411 struct ac_llvm_flow *flow = get_innermost_loop(ctx);
2412 LLVMBuildBr(ctx->builder, flow->next_block);
2413 }
2414
2415 void ac_build_continue(struct ac_llvm_context *ctx)
2416 {
2417 struct ac_llvm_flow *flow = get_innermost_loop(ctx);
2418 LLVMBuildBr(ctx->builder, flow->loop_entry_block);
2419 }
2420
2421 void ac_build_else(struct ac_llvm_context *ctx, int label_id)
2422 {
2423 struct ac_llvm_flow *current_branch = get_current_flow(ctx);
2424 LLVMBasicBlockRef endif_block;
2425
2426 assert(!current_branch->loop_entry_block);
2427
2428 endif_block = append_basic_block(ctx, "ENDIF");
2429 emit_default_branch(ctx->builder, endif_block);
2430
2431 LLVMPositionBuilderAtEnd(ctx->builder, current_branch->next_block);
2432 set_basicblock_name(current_branch->next_block, "else", label_id);
2433
2434 current_branch->next_block = endif_block;
2435 }
2436
2437 void ac_build_endif(struct ac_llvm_context *ctx, int label_id)
2438 {
2439 struct ac_llvm_flow *current_branch = get_current_flow(ctx);
2440
2441 assert(!current_branch->loop_entry_block);
2442
2443 emit_default_branch(ctx->builder, current_branch->next_block);
2444 LLVMPositionBuilderAtEnd(ctx->builder, current_branch->next_block);
2445 set_basicblock_name(current_branch->next_block, "endif", label_id);
2446
2447 ctx->flow_depth--;
2448 }
2449
2450 void ac_build_endloop(struct ac_llvm_context *ctx, int label_id)
2451 {
2452 struct ac_llvm_flow *current_loop = get_current_flow(ctx);
2453
2454 assert(current_loop->loop_entry_block);
2455
2456 emit_default_branch(ctx->builder, current_loop->loop_entry_block);
2457
2458 LLVMPositionBuilderAtEnd(ctx->builder, current_loop->next_block);
2459 set_basicblock_name(current_loop->next_block, "endloop", label_id);
2460 ctx->flow_depth--;
2461 }
2462
2463 static void if_cond_emit(struct ac_llvm_context *ctx, LLVMValueRef cond,
2464 int label_id)
2465 {
2466 struct ac_llvm_flow *flow = push_flow(ctx);
2467 LLVMBasicBlockRef if_block;
2468
2469 if_block = append_basic_block(ctx, "IF");
2470 flow->next_block = append_basic_block(ctx, "ELSE");
2471 set_basicblock_name(if_block, "if", label_id);
2472 LLVMBuildCondBr(ctx->builder, cond, if_block, flow->next_block);
2473 LLVMPositionBuilderAtEnd(ctx->builder, if_block);
2474 }
2475
2476 void ac_build_if(struct ac_llvm_context *ctx, LLVMValueRef value,
2477 int label_id)
2478 {
2479 LLVMValueRef cond = LLVMBuildFCmp(ctx->builder, LLVMRealUNE,
2480 value, ctx->f32_0, "");
2481 if_cond_emit(ctx, cond, label_id);
2482 }
2483
2484 void ac_build_uif(struct ac_llvm_context *ctx, LLVMValueRef value,
2485 int label_id)
2486 {
2487 LLVMValueRef cond = LLVMBuildICmp(ctx->builder, LLVMIntNE,
2488 ac_to_integer(ctx, value),
2489 ctx->i32_0, "");
2490 if_cond_emit(ctx, cond, label_id);
2491 }
2492
2493 LLVMValueRef ac_build_alloca(struct ac_llvm_context *ac, LLVMTypeRef type,
2494 const char *name)
2495 {
2496 LLVMBuilderRef builder = ac->builder;
2497 LLVMBasicBlockRef current_block = LLVMGetInsertBlock(builder);
2498 LLVMValueRef function = LLVMGetBasicBlockParent(current_block);
2499 LLVMBasicBlockRef first_block = LLVMGetEntryBasicBlock(function);
2500 LLVMValueRef first_instr = LLVMGetFirstInstruction(first_block);
2501 LLVMBuilderRef first_builder = LLVMCreateBuilderInContext(ac->context);
2502 LLVMValueRef res;
2503
2504 if (first_instr) {
2505 LLVMPositionBuilderBefore(first_builder, first_instr);
2506 } else {
2507 LLVMPositionBuilderAtEnd(first_builder, first_block);
2508 }
2509
2510 res = LLVMBuildAlloca(first_builder, type, name);
2511 LLVMBuildStore(builder, LLVMConstNull(type), res);
2512
2513 LLVMDisposeBuilder(first_builder);
2514
2515 return res;
2516 }
2517
2518 LLVMValueRef ac_build_alloca_undef(struct ac_llvm_context *ac,
2519 LLVMTypeRef type, const char *name)
2520 {
2521 LLVMValueRef ptr = ac_build_alloca(ac, type, name);
2522 LLVMBuildStore(ac->builder, LLVMGetUndef(type), ptr);
2523 return ptr;
2524 }
2525
2526 LLVMValueRef ac_cast_ptr(struct ac_llvm_context *ctx, LLVMValueRef ptr,
2527 LLVMTypeRef type)
2528 {
2529 int addr_space = LLVMGetPointerAddressSpace(LLVMTypeOf(ptr));
2530 return LLVMBuildBitCast(ctx->builder, ptr,
2531 LLVMPointerType(type, addr_space), "");
2532 }
2533
2534 LLVMValueRef ac_trim_vector(struct ac_llvm_context *ctx, LLVMValueRef value,
2535 unsigned count)
2536 {
2537 unsigned num_components = ac_get_llvm_num_components(value);
2538 if (count == num_components)
2539 return value;
2540
2541 LLVMValueRef masks[] = {
2542 LLVMConstInt(ctx->i32, 0, false), LLVMConstInt(ctx->i32, 1, false),
2543 LLVMConstInt(ctx->i32, 2, false), LLVMConstInt(ctx->i32, 3, false)};
2544
2545 if (count == 1)
2546 return LLVMBuildExtractElement(ctx->builder, value, masks[0],
2547 "");
2548
2549 LLVMValueRef swizzle = LLVMConstVector(masks, count);
2550 return LLVMBuildShuffleVector(ctx->builder, value, value, swizzle, "");
2551 }
2552
2553 LLVMValueRef ac_unpack_param(struct ac_llvm_context *ctx, LLVMValueRef param,
2554 unsigned rshift, unsigned bitwidth)
2555 {
2556 LLVMValueRef value = param;
2557 if (rshift)
2558 value = LLVMBuildLShr(ctx->builder, value,
2559 LLVMConstInt(ctx->i32, rshift, false), "");
2560
2561 if (rshift + bitwidth < 32) {
2562 unsigned mask = (1 << bitwidth) - 1;
2563 value = LLVMBuildAnd(ctx->builder, value,
2564 LLVMConstInt(ctx->i32, mask, false), "");
2565 }
2566 return value;
2567 }
2568
2569 /* Adjust the sample index according to FMASK.
2570 *
2571 * For uncompressed MSAA surfaces, FMASK should return 0x76543210,
2572 * which is the identity mapping. Each nibble says which physical sample
2573 * should be fetched to get that sample.
2574 *
2575 * For example, 0x11111100 means there are only 2 samples stored and
2576 * the second sample covers 3/4 of the pixel. When reading samples 0
2577 * and 1, return physical sample 0 (determined by the first two 0s
2578 * in FMASK), otherwise return physical sample 1.
2579 *
2580 * The sample index should be adjusted as follows:
2581 * addr[sample_index] = (fmask >> (addr[sample_index] * 4)) & 0xF;
2582 */
2583 void ac_apply_fmask_to_sample(struct ac_llvm_context *ac, LLVMValueRef fmask,
2584 LLVMValueRef *addr, bool is_array_tex)
2585 {
2586 struct ac_image_args fmask_load = {};
2587 fmask_load.opcode = ac_image_load;
2588 fmask_load.resource = fmask;
2589 fmask_load.dmask = 0xf;
2590 fmask_load.dim = is_array_tex ? ac_image_2darray : ac_image_2d;
2591
2592 fmask_load.coords[0] = addr[0];
2593 fmask_load.coords[1] = addr[1];
2594 if (is_array_tex)
2595 fmask_load.coords[2] = addr[2];
2596
2597 LLVMValueRef fmask_value = ac_build_image_opcode(ac, &fmask_load);
2598 fmask_value = LLVMBuildExtractElement(ac->builder, fmask_value,
2599 ac->i32_0, "");
2600
2601 /* Apply the formula. */
2602 unsigned sample_chan = is_array_tex ? 3 : 2;
2603 LLVMValueRef final_sample;
2604 final_sample = LLVMBuildMul(ac->builder, addr[sample_chan],
2605 LLVMConstInt(ac->i32, 4, 0), "");
2606 final_sample = LLVMBuildLShr(ac->builder, fmask_value, final_sample, "");
2607 final_sample = LLVMBuildAnd(ac->builder, final_sample,
2608 LLVMConstInt(ac->i32, 0xF, 0), "");
2609
2610 /* Don't rewrite the sample index if WORD1.DATA_FORMAT of the FMASK
2611 * resource descriptor is 0 (invalid),
2612 */
2613 LLVMValueRef tmp;
2614 tmp = LLVMBuildBitCast(ac->builder, fmask, ac->v8i32, "");
2615 tmp = LLVMBuildExtractElement(ac->builder, tmp, ac->i32_1, "");
2616 tmp = LLVMBuildICmp(ac->builder, LLVMIntNE, tmp, ac->i32_0, "");
2617
2618 /* Replace the MSAA sample index. */
2619 addr[sample_chan] = LLVMBuildSelect(ac->builder, tmp, final_sample,
2620 addr[sample_chan], "");
2621 }
2622
2623 static LLVMValueRef
2624 _ac_build_readlane(struct ac_llvm_context *ctx, LLVMValueRef src, LLVMValueRef lane)
2625 {
2626 ac_build_optimization_barrier(ctx, &src);
2627 return ac_build_intrinsic(ctx,
2628 lane == NULL ? "llvm.amdgcn.readfirstlane" : "llvm.amdgcn.readlane",
2629 LLVMTypeOf(src), (LLVMValueRef []) {
2630 src, lane },
2631 lane == NULL ? 1 : 2,
2632 AC_FUNC_ATTR_READNONE |
2633 AC_FUNC_ATTR_CONVERGENT);
2634 }
2635
2636 /**
2637 * Builds the "llvm.amdgcn.readlane" or "llvm.amdgcn.readfirstlane" intrinsic.
2638 * @param ctx
2639 * @param src
2640 * @param lane - id of the lane or NULL for the first active lane
2641 * @return value of the lane
2642 */
2643 LLVMValueRef
2644 ac_build_readlane(struct ac_llvm_context *ctx, LLVMValueRef src, LLVMValueRef lane)
2645 {
2646 LLVMTypeRef src_type = LLVMTypeOf(src);
2647 src = ac_to_integer(ctx, src);
2648 unsigned bits = LLVMGetIntTypeWidth(LLVMTypeOf(src));
2649 LLVMValueRef ret;
2650
2651 if (bits == 32) {
2652 ret = _ac_build_readlane(ctx, src, lane);
2653 } else {
2654 assert(bits % 32 == 0);
2655 LLVMTypeRef vec_type = LLVMVectorType(ctx->i32, bits / 32);
2656 LLVMValueRef src_vector =
2657 LLVMBuildBitCast(ctx->builder, src, vec_type, "");
2658 ret = LLVMGetUndef(vec_type);
2659 for (unsigned i = 0; i < bits / 32; i++) {
2660 src = LLVMBuildExtractElement(ctx->builder, src_vector,
2661 LLVMConstInt(ctx->i32, i, 0), "");
2662 LLVMValueRef ret_comp = _ac_build_readlane(ctx, src, lane);
2663 ret = LLVMBuildInsertElement(ctx->builder, ret, ret_comp,
2664 LLVMConstInt(ctx->i32, i, 0), "");
2665 }
2666 }
2667 return LLVMBuildBitCast(ctx->builder, ret, src_type, "");
2668 }
2669
2670 LLVMValueRef
2671 ac_build_writelane(struct ac_llvm_context *ctx, LLVMValueRef src, LLVMValueRef value, LLVMValueRef lane)
2672 {
2673 /* TODO: Use the actual instruction when LLVM adds an intrinsic for it.
2674 */
2675 LLVMValueRef pred = LLVMBuildICmp(ctx->builder, LLVMIntEQ, lane,
2676 ac_get_thread_id(ctx), "");
2677 return LLVMBuildSelect(ctx->builder, pred, value, src, "");
2678 }
2679
2680 LLVMValueRef
2681 ac_build_mbcnt(struct ac_llvm_context *ctx, LLVMValueRef mask)
2682 {
2683 LLVMValueRef mask_vec = LLVMBuildBitCast(ctx->builder, mask,
2684 LLVMVectorType(ctx->i32, 2),
2685 "");
2686 LLVMValueRef mask_lo = LLVMBuildExtractElement(ctx->builder, mask_vec,
2687 ctx->i32_0, "");
2688 LLVMValueRef mask_hi = LLVMBuildExtractElement(ctx->builder, mask_vec,
2689 ctx->i32_1, "");
2690 LLVMValueRef val =
2691 ac_build_intrinsic(ctx, "llvm.amdgcn.mbcnt.lo", ctx->i32,
2692 (LLVMValueRef []) { mask_lo, ctx->i32_0 },
2693 2, AC_FUNC_ATTR_READNONE);
2694 val = ac_build_intrinsic(ctx, "llvm.amdgcn.mbcnt.hi", ctx->i32,
2695 (LLVMValueRef []) { mask_hi, val },
2696 2, AC_FUNC_ATTR_READNONE);
2697 return val;
2698 }
2699
2700 enum dpp_ctrl {
2701 _dpp_quad_perm = 0x000,
2702 _dpp_row_sl = 0x100,
2703 _dpp_row_sr = 0x110,
2704 _dpp_row_rr = 0x120,
2705 dpp_wf_sl1 = 0x130,
2706 dpp_wf_rl1 = 0x134,
2707 dpp_wf_sr1 = 0x138,
2708 dpp_wf_rr1 = 0x13C,
2709 dpp_row_mirror = 0x140,
2710 dpp_row_half_mirror = 0x141,
2711 dpp_row_bcast15 = 0x142,
2712 dpp_row_bcast31 = 0x143
2713 };
2714
2715 static inline enum dpp_ctrl
2716 dpp_quad_perm(unsigned lane0, unsigned lane1, unsigned lane2, unsigned lane3)
2717 {
2718 assert(lane0 < 4 && lane1 < 4 && lane2 < 4 && lane3 < 4);
2719 return _dpp_quad_perm | lane0 | (lane1 << 2) | (lane2 << 4) | (lane3 << 6);
2720 }
2721
2722 static inline enum dpp_ctrl
2723 dpp_row_sl(unsigned amount)
2724 {
2725 assert(amount > 0 && amount < 16);
2726 return _dpp_row_sl | amount;
2727 }
2728
2729 static inline enum dpp_ctrl
2730 dpp_row_sr(unsigned amount)
2731 {
2732 assert(amount > 0 && amount < 16);
2733 return _dpp_row_sr | amount;
2734 }
2735
2736 static LLVMValueRef
2737 _ac_build_dpp(struct ac_llvm_context *ctx, LLVMValueRef old, LLVMValueRef src,
2738 enum dpp_ctrl dpp_ctrl, unsigned row_mask, unsigned bank_mask,
2739 bool bound_ctrl)
2740 {
2741 return ac_build_intrinsic(ctx, "llvm.amdgcn.update.dpp.i32",
2742 LLVMTypeOf(old),
2743 (LLVMValueRef[]) {
2744 old, src,
2745 LLVMConstInt(ctx->i32, dpp_ctrl, 0),
2746 LLVMConstInt(ctx->i32, row_mask, 0),
2747 LLVMConstInt(ctx->i32, bank_mask, 0),
2748 LLVMConstInt(ctx->i1, bound_ctrl, 0) },
2749 6, AC_FUNC_ATTR_READNONE | AC_FUNC_ATTR_CONVERGENT);
2750 }
2751
2752 static LLVMValueRef
2753 ac_build_dpp(struct ac_llvm_context *ctx, LLVMValueRef old, LLVMValueRef src,
2754 enum dpp_ctrl dpp_ctrl, unsigned row_mask, unsigned bank_mask,
2755 bool bound_ctrl)
2756 {
2757 LLVMTypeRef src_type = LLVMTypeOf(src);
2758 src = ac_to_integer(ctx, src);
2759 old = ac_to_integer(ctx, old);
2760 unsigned bits = LLVMGetIntTypeWidth(LLVMTypeOf(src));
2761 LLVMValueRef ret;
2762 if (bits == 32) {
2763 ret = _ac_build_dpp(ctx, old, src, dpp_ctrl, row_mask,
2764 bank_mask, bound_ctrl);
2765 } else {
2766 assert(bits % 32 == 0);
2767 LLVMTypeRef vec_type = LLVMVectorType(ctx->i32, bits / 32);
2768 LLVMValueRef src_vector =
2769 LLVMBuildBitCast(ctx->builder, src, vec_type, "");
2770 LLVMValueRef old_vector =
2771 LLVMBuildBitCast(ctx->builder, old, vec_type, "");
2772 ret = LLVMGetUndef(vec_type);
2773 for (unsigned i = 0; i < bits / 32; i++) {
2774 src = LLVMBuildExtractElement(ctx->builder, src_vector,
2775 LLVMConstInt(ctx->i32, i,
2776 0), "");
2777 old = LLVMBuildExtractElement(ctx->builder, old_vector,
2778 LLVMConstInt(ctx->i32, i,
2779 0), "");
2780 LLVMValueRef ret_comp = _ac_build_dpp(ctx, old, src,
2781 dpp_ctrl,
2782 row_mask,
2783 bank_mask,
2784 bound_ctrl);
2785 ret = LLVMBuildInsertElement(ctx->builder, ret,
2786 ret_comp,
2787 LLVMConstInt(ctx->i32, i,
2788 0), "");
2789 }
2790 }
2791 return LLVMBuildBitCast(ctx->builder, ret, src_type, "");
2792 }
2793
2794 static inline unsigned
2795 ds_pattern_bitmode(unsigned and_mask, unsigned or_mask, unsigned xor_mask)
2796 {
2797 assert(and_mask < 32 && or_mask < 32 && xor_mask < 32);
2798 return and_mask | (or_mask << 5) | (xor_mask << 10);
2799 }
2800
2801 static LLVMValueRef
2802 _ac_build_ds_swizzle(struct ac_llvm_context *ctx, LLVMValueRef src, unsigned mask)
2803 {
2804 return ac_build_intrinsic(ctx, "llvm.amdgcn.ds.swizzle",
2805 LLVMTypeOf(src), (LLVMValueRef []) {
2806 src, LLVMConstInt(ctx->i32, mask, 0) },
2807 2, AC_FUNC_ATTR_READNONE | AC_FUNC_ATTR_CONVERGENT);
2808 }
2809
2810 LLVMValueRef
2811 ac_build_ds_swizzle(struct ac_llvm_context *ctx, LLVMValueRef src, unsigned mask)
2812 {
2813 LLVMTypeRef src_type = LLVMTypeOf(src);
2814 src = ac_to_integer(ctx, src);
2815 unsigned bits = LLVMGetIntTypeWidth(LLVMTypeOf(src));
2816 LLVMValueRef ret;
2817 if (bits == 32) {
2818 ret = _ac_build_ds_swizzle(ctx, src, mask);
2819 } else {
2820 assert(bits % 32 == 0);
2821 LLVMTypeRef vec_type = LLVMVectorType(ctx->i32, bits / 32);
2822 LLVMValueRef src_vector =
2823 LLVMBuildBitCast(ctx->builder, src, vec_type, "");
2824 ret = LLVMGetUndef(vec_type);
2825 for (unsigned i = 0; i < bits / 32; i++) {
2826 src = LLVMBuildExtractElement(ctx->builder, src_vector,
2827 LLVMConstInt(ctx->i32, i,
2828 0), "");
2829 LLVMValueRef ret_comp = _ac_build_ds_swizzle(ctx, src,
2830 mask);
2831 ret = LLVMBuildInsertElement(ctx->builder, ret,
2832 ret_comp,
2833 LLVMConstInt(ctx->i32, i,
2834 0), "");
2835 }
2836 }
2837 return LLVMBuildBitCast(ctx->builder, ret, src_type, "");
2838 }
2839
2840 static LLVMValueRef
2841 ac_build_wwm(struct ac_llvm_context *ctx, LLVMValueRef src)
2842 {
2843 char name[32], type[8];
2844 ac_build_type_name_for_intr(LLVMTypeOf(src), type, sizeof(type));
2845 snprintf(name, sizeof(name), "llvm.amdgcn.wwm.%s", type);
2846 return ac_build_intrinsic(ctx, name, LLVMTypeOf(src),
2847 (LLVMValueRef []) { src }, 1,
2848 AC_FUNC_ATTR_READNONE);
2849 }
2850
2851 static LLVMValueRef
2852 ac_build_set_inactive(struct ac_llvm_context *ctx, LLVMValueRef src,
2853 LLVMValueRef inactive)
2854 {
2855 char name[32], type[8];
2856 LLVMTypeRef src_type = LLVMTypeOf(src);
2857 src = ac_to_integer(ctx, src);
2858 inactive = ac_to_integer(ctx, inactive);
2859 ac_build_type_name_for_intr(LLVMTypeOf(src), type, sizeof(type));
2860 snprintf(name, sizeof(name), "llvm.amdgcn.set.inactive.%s", type);
2861 LLVMValueRef ret =
2862 ac_build_intrinsic(ctx, name,
2863 LLVMTypeOf(src), (LLVMValueRef []) {
2864 src, inactive }, 2,
2865 AC_FUNC_ATTR_READNONE |
2866 AC_FUNC_ATTR_CONVERGENT);
2867 return LLVMBuildBitCast(ctx->builder, ret, src_type, "");
2868 }
2869
2870 static LLVMValueRef
2871 get_reduction_identity(struct ac_llvm_context *ctx, nir_op op, unsigned type_size)
2872 {
2873 if (type_size == 4) {
2874 switch (op) {
2875 case nir_op_iadd: return ctx->i32_0;
2876 case nir_op_fadd: return ctx->f32_0;
2877 case nir_op_imul: return ctx->i32_1;
2878 case nir_op_fmul: return ctx->f32_1;
2879 case nir_op_imin: return LLVMConstInt(ctx->i32, INT32_MAX, 0);
2880 case nir_op_umin: return LLVMConstInt(ctx->i32, UINT32_MAX, 0);
2881 case nir_op_fmin: return LLVMConstReal(ctx->f32, INFINITY);
2882 case nir_op_imax: return LLVMConstInt(ctx->i32, INT32_MIN, 0);
2883 case nir_op_umax: return ctx->i32_0;
2884 case nir_op_fmax: return LLVMConstReal(ctx->f32, -INFINITY);
2885 case nir_op_iand: return LLVMConstInt(ctx->i32, -1, 0);
2886 case nir_op_ior: return ctx->i32_0;
2887 case nir_op_ixor: return ctx->i32_0;
2888 default:
2889 unreachable("bad reduction intrinsic");
2890 }
2891 } else { /* type_size == 64bit */
2892 switch (op) {
2893 case nir_op_iadd: return ctx->i64_0;
2894 case nir_op_fadd: return ctx->f64_0;
2895 case nir_op_imul: return ctx->i64_1;
2896 case nir_op_fmul: return ctx->f64_1;
2897 case nir_op_imin: return LLVMConstInt(ctx->i64, INT64_MAX, 0);
2898 case nir_op_umin: return LLVMConstInt(ctx->i64, UINT64_MAX, 0);
2899 case nir_op_fmin: return LLVMConstReal(ctx->f64, INFINITY);
2900 case nir_op_imax: return LLVMConstInt(ctx->i64, INT64_MIN, 0);
2901 case nir_op_umax: return ctx->i64_0;
2902 case nir_op_fmax: return LLVMConstReal(ctx->f64, -INFINITY);
2903 case nir_op_iand: return LLVMConstInt(ctx->i64, -1, 0);
2904 case nir_op_ior: return ctx->i64_0;
2905 case nir_op_ixor: return ctx->i64_0;
2906 default:
2907 unreachable("bad reduction intrinsic");
2908 }
2909 }
2910 }
2911
2912 static LLVMValueRef
2913 ac_build_alu_op(struct ac_llvm_context *ctx, LLVMValueRef lhs, LLVMValueRef rhs, nir_op op)
2914 {
2915 bool _64bit = ac_get_type_size(LLVMTypeOf(lhs)) == 8;
2916 switch (op) {
2917 case nir_op_iadd: return LLVMBuildAdd(ctx->builder, lhs, rhs, "");
2918 case nir_op_fadd: return LLVMBuildFAdd(ctx->builder, lhs, rhs, "");
2919 case nir_op_imul: return LLVMBuildMul(ctx->builder, lhs, rhs, "");
2920 case nir_op_fmul: return LLVMBuildFMul(ctx->builder, lhs, rhs, "");
2921 case nir_op_imin: return LLVMBuildSelect(ctx->builder,
2922 LLVMBuildICmp(ctx->builder, LLVMIntSLT, lhs, rhs, ""),
2923 lhs, rhs, "");
2924 case nir_op_umin: return LLVMBuildSelect(ctx->builder,
2925 LLVMBuildICmp(ctx->builder, LLVMIntULT, lhs, rhs, ""),
2926 lhs, rhs, "");
2927 case nir_op_fmin: return ac_build_intrinsic(ctx,
2928 _64bit ? "llvm.minnum.f64" : "llvm.minnum.f32",
2929 _64bit ? ctx->f64 : ctx->f32,
2930 (LLVMValueRef[]){lhs, rhs}, 2, AC_FUNC_ATTR_READNONE);
2931 case nir_op_imax: return LLVMBuildSelect(ctx->builder,
2932 LLVMBuildICmp(ctx->builder, LLVMIntSGT, lhs, rhs, ""),
2933 lhs, rhs, "");
2934 case nir_op_umax: return LLVMBuildSelect(ctx->builder,
2935 LLVMBuildICmp(ctx->builder, LLVMIntUGT, lhs, rhs, ""),
2936 lhs, rhs, "");
2937 case nir_op_fmax: return ac_build_intrinsic(ctx,
2938 _64bit ? "llvm.maxnum.f64" : "llvm.maxnum.f32",
2939 _64bit ? ctx->f64 : ctx->f32,
2940 (LLVMValueRef[]){lhs, rhs}, 2, AC_FUNC_ATTR_READNONE);
2941 case nir_op_iand: return LLVMBuildAnd(ctx->builder, lhs, rhs, "");
2942 case nir_op_ior: return LLVMBuildOr(ctx->builder, lhs, rhs, "");
2943 case nir_op_ixor: return LLVMBuildXor(ctx->builder, lhs, rhs, "");
2944 default:
2945 unreachable("bad reduction intrinsic");
2946 }
2947 }
2948
2949 /* TODO: add inclusive and excluse scan functions for SI chip class. */
2950 static LLVMValueRef
2951 ac_build_scan(struct ac_llvm_context *ctx, nir_op op, LLVMValueRef src, LLVMValueRef identity)
2952 {
2953 LLVMValueRef result, tmp;
2954 result = src;
2955 tmp = ac_build_dpp(ctx, identity, src, dpp_row_sr(1), 0xf, 0xf, false);
2956 result = ac_build_alu_op(ctx, result, tmp, op);
2957 tmp = ac_build_dpp(ctx, identity, src, dpp_row_sr(2), 0xf, 0xf, false);
2958 result = ac_build_alu_op(ctx, result, tmp, op);
2959 tmp = ac_build_dpp(ctx, identity, src, dpp_row_sr(3), 0xf, 0xf, false);
2960 result = ac_build_alu_op(ctx, result, tmp, op);
2961 tmp = ac_build_dpp(ctx, identity, result, dpp_row_sr(4), 0xf, 0xe, false);
2962 result = ac_build_alu_op(ctx, result, tmp, op);
2963 tmp = ac_build_dpp(ctx, identity, result, dpp_row_sr(8), 0xf, 0xc, false);
2964 result = ac_build_alu_op(ctx, result, tmp, op);
2965 tmp = ac_build_dpp(ctx, identity, result, dpp_row_bcast15, 0xa, 0xf, false);
2966 result = ac_build_alu_op(ctx, result, tmp, op);
2967 tmp = ac_build_dpp(ctx, identity, result, dpp_row_bcast31, 0xc, 0xf, false);
2968 result = ac_build_alu_op(ctx, result, tmp, op);
2969 return result;
2970 }
2971
2972 LLVMValueRef
2973 ac_build_inclusive_scan(struct ac_llvm_context *ctx, LLVMValueRef src, nir_op op)
2974 {
2975 ac_build_optimization_barrier(ctx, &src);
2976 LLVMValueRef result;
2977 LLVMValueRef identity = get_reduction_identity(ctx, op,
2978 ac_get_type_size(LLVMTypeOf(src)));
2979 result = LLVMBuildBitCast(ctx->builder,
2980 ac_build_set_inactive(ctx, src, identity),
2981 LLVMTypeOf(identity), "");
2982 result = ac_build_scan(ctx, op, result, identity);
2983
2984 return ac_build_wwm(ctx, result);
2985 }
2986
2987 LLVMValueRef
2988 ac_build_exclusive_scan(struct ac_llvm_context *ctx, LLVMValueRef src, nir_op op)
2989 {
2990 ac_build_optimization_barrier(ctx, &src);
2991 LLVMValueRef result;
2992 LLVMValueRef identity = get_reduction_identity(ctx, op,
2993 ac_get_type_size(LLVMTypeOf(src)));
2994 result = LLVMBuildBitCast(ctx->builder,
2995 ac_build_set_inactive(ctx, src, identity),
2996 LLVMTypeOf(identity), "");
2997 result = ac_build_dpp(ctx, identity, result, dpp_wf_sr1, 0xf, 0xf, false);
2998 result = ac_build_scan(ctx, op, result, identity);
2999
3000 return ac_build_wwm(ctx, result);
3001 }
3002
3003 LLVMValueRef
3004 ac_build_reduce(struct ac_llvm_context *ctx, LLVMValueRef src, nir_op op, unsigned cluster_size)
3005 {
3006 if (cluster_size == 1) return src;
3007 ac_build_optimization_barrier(ctx, &src);
3008 LLVMValueRef result, swap;
3009 LLVMValueRef identity = get_reduction_identity(ctx, op,
3010 ac_get_type_size(LLVMTypeOf(src)));
3011 result = LLVMBuildBitCast(ctx->builder,
3012 ac_build_set_inactive(ctx, src, identity),
3013 LLVMTypeOf(identity), "");
3014 swap = ac_build_quad_swizzle(ctx, result, 1, 0, 3, 2);
3015 result = ac_build_alu_op(ctx, result, swap, op);
3016 if (cluster_size == 2) return ac_build_wwm(ctx, result);
3017
3018 swap = ac_build_quad_swizzle(ctx, result, 2, 3, 0, 1);
3019 result = ac_build_alu_op(ctx, result, swap, op);
3020 if (cluster_size == 4) return ac_build_wwm(ctx, result);
3021
3022 if (ctx->chip_class >= VI)
3023 swap = ac_build_dpp(ctx, identity, result, dpp_row_half_mirror, 0xf, 0xf, false);
3024 else
3025 swap = ac_build_ds_swizzle(ctx, result, ds_pattern_bitmode(0x1f, 0, 0x04));
3026 result = ac_build_alu_op(ctx, result, swap, op);
3027 if (cluster_size == 8) return ac_build_wwm(ctx, result);
3028
3029 if (ctx->chip_class >= VI)
3030 swap = ac_build_dpp(ctx, identity, result, dpp_row_mirror, 0xf, 0xf, false);
3031 else
3032 swap = ac_build_ds_swizzle(ctx, result, ds_pattern_bitmode(0x1f, 0, 0x08));
3033 result = ac_build_alu_op(ctx, result, swap, op);
3034 if (cluster_size == 16) return ac_build_wwm(ctx, result);
3035
3036 if (ctx->chip_class >= VI && cluster_size != 32)
3037 swap = ac_build_dpp(ctx, identity, result, dpp_row_bcast15, 0xa, 0xf, false);
3038 else
3039 swap = ac_build_ds_swizzle(ctx, result, ds_pattern_bitmode(0x1f, 0, 0x10));
3040 result = ac_build_alu_op(ctx, result, swap, op);
3041 if (cluster_size == 32) return ac_build_wwm(ctx, result);
3042
3043 if (ctx->chip_class >= VI) {
3044 swap = ac_build_dpp(ctx, identity, result, dpp_row_bcast31, 0xc, 0xf, false);
3045 result = ac_build_alu_op(ctx, result, swap, op);
3046 result = ac_build_readlane(ctx, result, LLVMConstInt(ctx->i32, 63, 0));
3047 return ac_build_wwm(ctx, result);
3048 } else {
3049 swap = ac_build_readlane(ctx, result, ctx->i32_0);
3050 result = ac_build_readlane(ctx, result, LLVMConstInt(ctx->i32, 32, 0));
3051 result = ac_build_alu_op(ctx, result, swap, op);
3052 return ac_build_wwm(ctx, result);
3053 }
3054 }
3055
3056 LLVMValueRef
3057 ac_build_quad_swizzle(struct ac_llvm_context *ctx, LLVMValueRef src,
3058 unsigned lane0, unsigned lane1, unsigned lane2, unsigned lane3)
3059 {
3060 unsigned mask = dpp_quad_perm(lane0, lane1, lane2, lane3);
3061 if (ctx->chip_class >= VI && HAVE_LLVM >= 0x0600) {
3062 return ac_build_dpp(ctx, src, src, mask, 0xf, 0xf, false);
3063 } else {
3064 return ac_build_ds_swizzle(ctx, src, (1 << 15) | mask);
3065 }
3066 }
3067
3068 LLVMValueRef
3069 ac_build_shuffle(struct ac_llvm_context *ctx, LLVMValueRef src, LLVMValueRef index)
3070 {
3071 index = LLVMBuildMul(ctx->builder, index, LLVMConstInt(ctx->i32, 4, 0), "");
3072 return ac_build_intrinsic(ctx,
3073 "llvm.amdgcn.ds.bpermute", ctx->i32,
3074 (LLVMValueRef []) {index, src}, 2,
3075 AC_FUNC_ATTR_READNONE |
3076 AC_FUNC_ATTR_CONVERGENT);
3077 }