src/amd/common/ac_llvm_util.c

   1 /*
   2  * Copyright 2014 Advanced Micro Devices, Inc.
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the
   6  * "Software"), to deal in the Software without restriction, including
   7  * without limitation the rights to use, copy, modify, merge, publish,
   8  * distribute, sub license, and/or sell copies of the Software, and to
   9  * permit persons to whom the Software is furnished to do so, subject to
  10  * the following conditions:
  11  *
  12  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  13  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  14  * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
  15  * THE COPYRIGHT HOLDERS, AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM,
  16  * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
  17  * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
  18  * USE OR OTHER DEALINGS IN THE SOFTWARE.
  19  *
  20  * The above copyright notice and this permission notice (including the
  21  * next paragraph) shall be included in all copies or substantial portions
  22  * of the Software.
  23  *
  24  */
  25 /* based on pieces from si_pipe.c and radeon_llvm_emit.c */
  26 #include "ac_llvm_util.h"
  27 #include "ac_llvm_build.h"
  28 #include "util/bitscan.h"
  29 #include <llvm-c/Core.h>
  30 #include <llvm-c/Support.h>
  31 #include <llvm-c/Transforms/IPO.h>
  32 #include <llvm-c/Transforms/Scalar.h>
  33 #include <llvm-c/Transforms/Utils.h>
  34 #include "c11/threads.h"
  35 #include "gallivm/lp_bld_misc.h"
  36 #include "util/u_math.h"
  37
  38 #include <assert.h>
  39 #include <stdio.h>
  40 #include <string.h>
  41
  42 static void ac_init_llvm_target()
  43 {
  44         LLVMInitializeAMDGPUTargetInfo();
  45         LLVMInitializeAMDGPUTarget();
  46         LLVMInitializeAMDGPUTargetMC();
  47         LLVMInitializeAMDGPUAsmPrinter();
  48
  49         /* For inline assembly. */
  50         LLVMInitializeAMDGPUAsmParser();
  51
  52         /* Workaround for bug in llvm 4.0 that causes image intrinsics
  53          * to disappear.
  54          * https://reviews.llvm.org/D26348
  55          *
  56          * "mesa" is the prefix for error messages.
  57          *
  58          * -global-isel-abort=2 is a no-op unless global isel has been enabled.
  59          * This option tells the backend to fall-back to SelectionDAG and print
  60          * a diagnostic message if global isel fails.
  61          */
  62         const char *argv[] = { "mesa", "-simplifycfg-sink-common=false", "-global-isel-abort=2" };
  63         LLVMParseCommandLineOptions(ARRAY_SIZE(argv), argv, NULL);
  64 }
  65
  66 static once_flag ac_init_llvm_target_once_flag = ONCE_FLAG_INIT;
  67
  68 void ac_init_llvm_once(void)
  69 {
  70         call_once(&ac_init_llvm_target_once_flag, ac_init_llvm_target);
  71 }
  72
  73 static LLVMTargetRef ac_get_llvm_target(const char *triple)
  74 {
  75         LLVMTargetRef target = NULL;
  76         char *err_message = NULL;
  77
  78         if (LLVMGetTargetFromTriple(triple, &target, &err_message)) {
  79                 fprintf(stderr, "Cannot find target for triple %s ", triple);
  80                 if (err_message) {
  81                         fprintf(stderr, "%s\n", err_message);
  82                 }
  83                 LLVMDisposeMessage(err_message);
  84                 return NULL;
  85         }
  86         return target;
  87 }
  88
  89 const char *ac_get_llvm_processor_name(enum radeon_family family)
  90 {
  91         switch (family) {
  92         case CHIP_TAHITI:
  93                 return "tahiti";
  94         case CHIP_PITCAIRN:
  95                 return "pitcairn";
  96         case CHIP_VERDE:
  97                 return "verde";
  98         case CHIP_OLAND:
  99                 return "oland";
 100         case CHIP_HAINAN:
 101                 return "hainan";
 102         case CHIP_BONAIRE:
 103                 return "bonaire";
 104         case CHIP_KABINI:
 105                 return "kabini";
 106         case CHIP_KAVERI:
 107                 return "kaveri";
 108         case CHIP_HAWAII:
 109                 return "hawaii";
 110         case CHIP_TONGA:
 111                 return "tonga";
 112         case CHIP_ICELAND:
 113                 return "iceland";
 114         case CHIP_CARRIZO:
 115                 return "carrizo";
 116         case CHIP_FIJI:
 117                 return "fiji";
 118         case CHIP_STONEY:
 119                 return "stoney";
 120         case CHIP_POLARIS10:
 121                 return "polaris10";
 122         case CHIP_POLARIS11:
 123         case CHIP_POLARIS12:
 124         case CHIP_VEGAM:
 125                 return "polaris11";
 126         case CHIP_VEGA10:
 127                 return "gfx900";
 128         case CHIP_RAVEN:
 129                 return "gfx902";
 130         case CHIP_VEGA12:
 131                 return "gfx904";
 132         case CHIP_VEGA20:
 133                 return "gfx906";
 134         case CHIP_RAVEN2:
 135                 return HAVE_LLVM >= 0x0800 ? "gfx909" : "gfx902";
 136         case CHIP_NAVI10:
 137                 return "gfx1010";
 138         case CHIP_NAVI12:
 139                 return "gfx1011";
 140         case CHIP_NAVI14:
 141                 return "gfx1012";
 142         default:
 143                 return "";
 144         }
 145 }
 146
 147 static LLVMTargetMachineRef ac_create_target_machine(enum radeon_family family,
 148                                                      enum ac_target_machine_options tm_options,
 149                                                      LLVMCodeGenOptLevel level,
 150                                                      const char **out_triple)
 151 {
 152         assert(family >= CHIP_TAHITI);
 153         char features[256];
 154         const char *triple = (tm_options & AC_TM_SUPPORTS_SPILL) ? "amdgcn-mesa-mesa3d" : "amdgcn--";
 155         LLVMTargetRef target = ac_get_llvm_target(triple);
 156
 157         snprintf(features, sizeof(features),
 158                  "+DumpCode,-fp32-denormals,+fp64-denormals%s%s%s%s%s%s%s",
 159                  HAVE_LLVM >= 0x0800 ? "" : ",+vgpr-spilling",
 160                  family >= CHIP_NAVI10 ? ",+wavefrontsize64,-wavefrontsize32" : "",
 161                  tm_options & AC_TM_SISCHED ? ",+si-scheduler" : "",
 162                  tm_options & AC_TM_FORCE_ENABLE_XNACK ? ",+xnack" : "",
 163                  tm_options & AC_TM_FORCE_DISABLE_XNACK ? ",-xnack" : "",
 164                  tm_options & AC_TM_PROMOTE_ALLOCA_TO_SCRATCH ? ",-promote-alloca" : "",
 165                  tm_options & AC_TM_NO_LOAD_STORE_OPT ? ",-load-store-opt" : "");
 166
 167         LLVMTargetMachineRef tm = LLVMCreateTargetMachine(
 168                                      target,
 169                                      triple,
 170                                      ac_get_llvm_processor_name(family),
 171                                      features,
 172                                      level,
 173                                      LLVMRelocDefault,
 174                                      LLVMCodeModelDefault);
 175
 176         if (out_triple)
 177                 *out_triple = triple;
 178         if (tm_options & AC_TM_ENABLE_GLOBAL_ISEL)
 179                 ac_enable_global_isel(tm);
 180         return tm;
 181 }
 182
 183 static LLVMPassManagerRef ac_create_passmgr(LLVMTargetLibraryInfoRef target_library_info,
 184                                             bool check_ir)
 185 {
 186         LLVMPassManagerRef passmgr = LLVMCreatePassManager();
 187         if (!passmgr)
 188                 return NULL;
 189
 190         if (target_library_info)
 191                 LLVMAddTargetLibraryInfo(target_library_info,
 192                                          passmgr);
 193
 194         if (check_ir)
 195                 LLVMAddVerifierPass(passmgr);
 196         LLVMAddAlwaysInlinerPass(passmgr);
 197         /* Normally, the pass manager runs all passes on one function before
 198          * moving onto another. Adding a barrier no-op pass forces the pass
 199          * manager to run the inliner on all functions first, which makes sure
 200          * that the following passes are only run on the remaining non-inline
 201          * function, so it removes useless work done on dead inline functions.
 202          */
 203         ac_llvm_add_barrier_noop_pass(passmgr);
 204         /* This pass should eliminate all the load and store instructions. */
 205         LLVMAddPromoteMemoryToRegisterPass(passmgr);
 206         LLVMAddScalarReplAggregatesPass(passmgr);
 207         LLVMAddLICMPass(passmgr);
 208         LLVMAddAggressiveDCEPass(passmgr);
 209         LLVMAddCFGSimplificationPass(passmgr);
 210         /* This is recommended by the instruction combining pass. */
 211         LLVMAddEarlyCSEMemSSAPass(passmgr);
 212         LLVMAddInstructionCombiningPass(passmgr);
 213         return passmgr;
 214 }
 215
 216 static const char *attr_to_str(enum ac_func_attr attr)
 217 {
 218    switch (attr) {
 219    case AC_FUNC_ATTR_ALWAYSINLINE: return "alwaysinline";
 220    case AC_FUNC_ATTR_INREG: return "inreg";
 221    case AC_FUNC_ATTR_NOALIAS: return "noalias";
 222    case AC_FUNC_ATTR_NOUNWIND: return "nounwind";
 223    case AC_FUNC_ATTR_READNONE: return "readnone";
 224    case AC_FUNC_ATTR_READONLY: return "readonly";
 225    case AC_FUNC_ATTR_WRITEONLY: return "writeonly";
 226    case AC_FUNC_ATTR_INACCESSIBLE_MEM_ONLY: return "inaccessiblememonly";
 227    case AC_FUNC_ATTR_CONVERGENT: return "convergent";
 228    default:
 229            fprintf(stderr, "Unhandled function attribute: %x\n", attr);
 230            return 0;
 231    }
 232 }
 233
 234 void
 235 ac_add_function_attr(LLVMContextRef ctx, LLVMValueRef function,
 236                      int attr_idx, enum ac_func_attr attr)
 237 {
 238    const char *attr_name = attr_to_str(attr);
 239    unsigned kind_id = LLVMGetEnumAttributeKindForName(attr_name,
 240                                                       strlen(attr_name));
 241    LLVMAttributeRef llvm_attr = LLVMCreateEnumAttribute(ctx, kind_id, 0);
 242
 243    if (LLVMIsAFunction(function))
 244       LLVMAddAttributeAtIndex(function, attr_idx, llvm_attr);
 245    else
 246       LLVMAddCallSiteAttribute(function, attr_idx, llvm_attr);
 247 }
 248
 249 void ac_add_func_attributes(LLVMContextRef ctx, LLVMValueRef function,
 250                             unsigned attrib_mask)
 251 {
 252         attrib_mask |= AC_FUNC_ATTR_NOUNWIND;
 253         attrib_mask &= ~AC_FUNC_ATTR_LEGACY;
 254
 255         while (attrib_mask) {
 256                 enum ac_func_attr attr = 1u << u_bit_scan(&attrib_mask);
 257                 ac_add_function_attr(ctx, function, -1, attr);
 258         }
 259 }
 260
 261 void
 262 ac_dump_module(LLVMModuleRef module)
 263 {
 264         char *str = LLVMPrintModuleToString(module);
 265         fprintf(stderr, "%s", str);
 266         LLVMDisposeMessage(str);
 267 }
 268
 269 void
 270 ac_llvm_add_target_dep_function_attr(LLVMValueRef F,
 271                                      const char *name, unsigned value)
 272 {
 273         char str[16];
 274
 275         snprintf(str, sizeof(str), "0x%x", value);
 276         LLVMAddTargetDependentFunctionAttr(F, name, str);
 277 }
 278
 279 void ac_llvm_set_workgroup_size(LLVMValueRef F, unsigned size)
 280 {
 281         if (!size)
 282                 return;
 283
 284         char str[32];
 285         snprintf(str, sizeof(str), "%u,%u", size, size);
 286         LLVMAddTargetDependentFunctionAttr(F, "amdgpu-flat-work-group-size", str);
 287 }
 288
 289 unsigned
 290 ac_count_scratch_private_memory(LLVMValueRef function)
 291 {
 292         unsigned private_mem_vgprs = 0;
 293
 294         /* Process all LLVM instructions. */
 295         LLVMBasicBlockRef bb = LLVMGetFirstBasicBlock(function);
 296         while (bb) {
 297                 LLVMValueRef next = LLVMGetFirstInstruction(bb);
 298
 299                 while (next) {
 300                         LLVMValueRef inst = next;
 301                         next = LLVMGetNextInstruction(next);
 302
 303                         if (LLVMGetInstructionOpcode(inst) != LLVMAlloca)
 304                                 continue;
 305
 306                         LLVMTypeRef type = LLVMGetElementType(LLVMTypeOf(inst));
 307                         /* No idea why LLVM aligns allocas to 4 elements. */
 308                         unsigned alignment = LLVMGetAlignment(inst);
 309                         unsigned dw_size = align(ac_get_type_size(type) / 4, alignment);
 310                         private_mem_vgprs += dw_size;
 311                 }
 312                 bb = LLVMGetNextBasicBlock(bb);
 313         }
 314
 315         return private_mem_vgprs;
 316 }
 317
 318 bool
 319 ac_init_llvm_compiler(struct ac_llvm_compiler *compiler,
 320                       enum radeon_family family,
 321                       enum ac_target_machine_options tm_options)
 322 {
 323         const char *triple;
 324         memset(compiler, 0, sizeof(*compiler));
 325
 326         compiler->tm = ac_create_target_machine(family, tm_options,
 327                                                 LLVMCodeGenLevelDefault,
 328                                                 &triple);
 329         if (!compiler->tm)
 330                 return false;
 331
 332         if (tm_options & AC_TM_CREATE_LOW_OPT) {
 333                 compiler->low_opt_tm =
 334                         ac_create_target_machine(family, tm_options,
 335                                                  LLVMCodeGenLevelLess, NULL);
 336                 if (!compiler->low_opt_tm)
 337                         goto fail;
 338         }
 339
 340         compiler->target_library_info =
 341                 ac_create_target_library_info(triple);
 342         if (!compiler->target_library_info)
 343                 goto fail;
 344
 345         compiler->passmgr = ac_create_passmgr(compiler->target_library_info,
 346                                               tm_options & AC_TM_CHECK_IR);
 347         if (!compiler->passmgr)
 348                 goto fail;
 349
 350         return true;
 351 fail:
 352         ac_destroy_llvm_compiler(compiler);
 353         return false;
 354 }
 355
 356 void
 357 ac_destroy_llvm_compiler(struct ac_llvm_compiler *compiler)
 358 {
 359         if (compiler->passmgr)
 360                 LLVMDisposePassManager(compiler->passmgr);
 361         if (compiler->target_library_info)
 362                 ac_dispose_target_library_info(compiler->target_library_info);
 363         if (compiler->low_opt_tm)
 364                 LLVMDisposeTargetMachine(compiler->low_opt_tm);
 365         if (compiler->tm)
 366                 LLVMDisposeTargetMachine(compiler->tm);
 367 }