2 * Copyright 2016 Bas Nieuwenhuizen
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the
6 * "Software"), to deal in the Software without restriction, including
7 * without limitation the rights to use, copy, modify, merge, publish,
8 * distribute, sub license, and/or sell copies of the Software, and to
9 * permit persons to whom the Software is furnished to do so, subject to
10 * the following conditions:
12 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
13 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
14 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
15 * THE COPYRIGHT HOLDERS, AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM,
16 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
17 * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
18 * USE OR OTHER DEALINGS IN THE SOFTWARE.
20 * The above copyright notice and this permission notice (including the
21 * next paragraph) shall be included in all copies or substantial portions
26 #ifndef AC_LLVM_UTIL_H
27 #define AC_LLVM_UTIL_H
30 #include <llvm-c/TargetMachine.h>
32 #include "amd_family.h"
38 struct ac_compiler_passes
;
41 AC_FUNC_ATTR_ALWAYSINLINE
= (1 << 0),
42 AC_FUNC_ATTR_INREG
= (1 << 2),
43 AC_FUNC_ATTR_NOALIAS
= (1 << 3),
44 AC_FUNC_ATTR_NOUNWIND
= (1 << 4),
45 AC_FUNC_ATTR_READNONE
= (1 << 5),
46 AC_FUNC_ATTR_READONLY
= (1 << 6),
47 AC_FUNC_ATTR_WRITEONLY
= (1 << 7),
48 AC_FUNC_ATTR_INACCESSIBLE_MEM_ONLY
= (1 << 8),
49 AC_FUNC_ATTR_CONVERGENT
= (1 << 9),
51 /* Legacy intrinsic that needs attributes on function declarations
52 * and they must match the internal LLVM definition exactly, otherwise
53 * intrinsic selection fails.
55 AC_FUNC_ATTR_LEGACY
= (1u << 31),
58 enum ac_target_machine_options
{
59 AC_TM_SUPPORTS_SPILL
= (1 << 0),
60 AC_TM_SISCHED
= (1 << 1),
61 AC_TM_FORCE_ENABLE_XNACK
= (1 << 2),
62 AC_TM_FORCE_DISABLE_XNACK
= (1 << 3),
63 AC_TM_PROMOTE_ALLOCA_TO_SCRATCH
= (1 << 4),
64 AC_TM_CHECK_IR
= (1 << 5),
65 AC_TM_ENABLE_GLOBAL_ISEL
= (1 << 6),
66 AC_TM_CREATE_LOW_OPT
= (1 << 7),
67 AC_TM_NO_LOAD_STORE_OPT
= (1 << 8),
71 AC_FLOAT_MODE_DEFAULT
,
72 AC_FLOAT_MODE_NO_SIGNED_ZEROS_FP_MATH
,
73 AC_FLOAT_MODE_UNSAFE_FP_MATH
,
76 /* Per-thread persistent LLVM objects. */
77 struct ac_llvm_compiler
{
78 LLVMTargetLibraryInfoRef target_library_info
;
79 LLVMPassManagerRef passmgr
;
81 /* Default compiler. */
82 LLVMTargetMachineRef tm
;
83 struct ac_compiler_passes
*passes
;
85 /* Optional compiler for faster compilation with fewer optimizations.
86 * LLVM modules can be created with "tm" too. There is no difference.
88 LLVMTargetMachineRef low_opt_tm
; /* uses -O1 instead of -O2 */
89 struct ac_compiler_passes
*low_opt_passes
;
92 const char *ac_get_llvm_processor_name(enum radeon_family family
);
93 void ac_add_attr_dereferenceable(LLVMValueRef val
, uint64_t bytes
);
94 bool ac_is_sgpr_param(LLVMValueRef param
);
95 void ac_add_function_attr(LLVMContextRef ctx
, LLVMValueRef function
,
96 int attr_idx
, enum ac_func_attr attr
);
97 void ac_add_func_attributes(LLVMContextRef ctx
, LLVMValueRef function
,
98 unsigned attrib_mask
);
99 void ac_dump_module(LLVMModuleRef module
);
101 LLVMValueRef
ac_llvm_get_called_value(LLVMValueRef call
);
102 bool ac_llvm_is_function(LLVMValueRef v
);
103 LLVMModuleRef
ac_create_module(LLVMTargetMachineRef tm
, LLVMContextRef ctx
);
105 LLVMBuilderRef
ac_create_builder(LLVMContextRef ctx
,
106 enum ac_float_mode float_mode
);
109 ac_llvm_add_target_dep_function_attr(LLVMValueRef F
,
110 const char *name
, unsigned value
);
111 void ac_llvm_set_workgroup_size(LLVMValueRef F
, unsigned size
);
113 static inline unsigned
114 ac_get_load_intr_attribs(bool can_speculate
)
116 /* READNONE means writes can't affect it, while READONLY means that
117 * writes can affect it. */
118 return can_speculate
? AC_FUNC_ATTR_READNONE
:
119 AC_FUNC_ATTR_READONLY
;
123 ac_count_scratch_private_memory(LLVMValueRef function
);
125 LLVMTargetLibraryInfoRef
ac_create_target_library_info(const char *triple
);
126 void ac_dispose_target_library_info(LLVMTargetLibraryInfoRef library_info
);
127 void ac_init_llvm_once(void);
130 bool ac_init_llvm_compiler(struct ac_llvm_compiler
*compiler
,
131 enum radeon_family family
,
132 enum ac_target_machine_options tm_options
);
133 void ac_destroy_llvm_compiler(struct ac_llvm_compiler
*compiler
);
135 struct ac_compiler_passes
*ac_create_llvm_passes(LLVMTargetMachineRef tm
);
136 void ac_destroy_llvm_passes(struct ac_compiler_passes
*p
);
137 bool ac_compile_module_to_elf(struct ac_compiler_passes
*p
, LLVMModuleRef module
,
138 char **pelf_buffer
, size_t *pelf_size
);
139 void ac_llvm_add_barrier_noop_pass(LLVMPassManagerRef passmgr
);
140 void ac_enable_global_isel(LLVMTargetMachineRef tm
);
143 ac_has_vec3_support(enum chip_class chip
, bool use_format
)
145 if (chip
== GFX6
&& !use_format
) {
146 /* GFX6 only supports vec3 with load/store format. */
150 return HAVE_LLVM
>= 0x900;
157 #endif /* AC_LLVM_UTIL_H */