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[mesa.git] / src / amd / common / ac_nir_to_llvm.c
1 /*
2 * Copyright © 2016 Bas Nieuwenhuizen
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
21 * IN THE SOFTWARE.
22 */
23
24 #include "ac_nir_to_llvm.h"
25 #include "ac_llvm_util.h"
26 #include "ac_binary.h"
27 #include "sid.h"
28 #include "nir/nir.h"
29 #include "../vulkan/radv_descriptor_set.h"
30 #include "util/bitscan.h"
31 #include <llvm-c/Transforms/Scalar.h>
32
33 enum radeon_llvm_calling_convention {
34 RADEON_LLVM_AMDGPU_VS = 87,
35 RADEON_LLVM_AMDGPU_GS = 88,
36 RADEON_LLVM_AMDGPU_PS = 89,
37 RADEON_LLVM_AMDGPU_CS = 90,
38 };
39
40 #define CONST_ADDR_SPACE 2
41 #define LOCAL_ADDR_SPACE 3
42
43 #define RADEON_LLVM_MAX_INPUTS (VARYING_SLOT_VAR31 + 1)
44 #define RADEON_LLVM_MAX_OUTPUTS (VARYING_SLOT_VAR31 + 1)
45
46 enum desc_type {
47 DESC_IMAGE,
48 DESC_FMASK,
49 DESC_SAMPLER,
50 DESC_BUFFER,
51 };
52
53 struct nir_to_llvm_context {
54 const struct ac_nir_compiler_options *options;
55 struct ac_shader_variant_info *shader_info;
56
57 LLVMContextRef context;
58 LLVMModuleRef module;
59 LLVMBuilderRef builder;
60 LLVMValueRef main_function;
61
62 struct hash_table *defs;
63 struct hash_table *phis;
64
65 LLVMValueRef descriptor_sets[4];
66 LLVMValueRef push_constants;
67 LLVMValueRef num_work_groups;
68 LLVMValueRef workgroup_ids;
69 LLVMValueRef local_invocation_ids;
70 LLVMValueRef tg_size;
71
72 LLVMValueRef vertex_buffers;
73 LLVMValueRef base_vertex;
74 LLVMValueRef start_instance;
75 LLVMValueRef vertex_id;
76 LLVMValueRef rel_auto_id;
77 LLVMValueRef vs_prim_id;
78 LLVMValueRef instance_id;
79
80 LLVMValueRef prim_mask;
81 LLVMValueRef sample_positions;
82 LLVMValueRef persp_sample, persp_center, persp_centroid;
83 LLVMValueRef linear_sample, linear_center, linear_centroid;
84 LLVMValueRef front_face;
85 LLVMValueRef ancillary;
86 LLVMValueRef frag_pos[4];
87
88 LLVMBasicBlockRef continue_block;
89 LLVMBasicBlockRef break_block;
90
91 LLVMTypeRef i1;
92 LLVMTypeRef i8;
93 LLVMTypeRef i16;
94 LLVMTypeRef i32;
95 LLVMTypeRef i64;
96 LLVMTypeRef v2i32;
97 LLVMTypeRef v3i32;
98 LLVMTypeRef v4i32;
99 LLVMTypeRef v8i32;
100 LLVMTypeRef f32;
101 LLVMTypeRef f16;
102 LLVMTypeRef v2f32;
103 LLVMTypeRef v4f32;
104 LLVMTypeRef v16i8;
105 LLVMTypeRef voidt;
106
107 LLVMValueRef i32zero;
108 LLVMValueRef i32one;
109 LLVMValueRef f32zero;
110 LLVMValueRef f32one;
111 LLVMValueRef v4f32empty;
112
113 unsigned range_md_kind;
114 unsigned uniform_md_kind;
115 unsigned fpmath_md_kind;
116 unsigned invariant_load_md_kind;
117 LLVMValueRef empty_md;
118 LLVMValueRef fpmath_md_2p5_ulp;
119 gl_shader_stage stage;
120
121 LLVMValueRef lds;
122 LLVMValueRef inputs[RADEON_LLVM_MAX_INPUTS * 4];
123 LLVMValueRef outputs[RADEON_LLVM_MAX_OUTPUTS * 4];
124
125 LLVMValueRef shared_memory;
126 uint64_t input_mask;
127 uint64_t output_mask;
128 int num_locals;
129 LLVMValueRef *locals;
130 bool has_ddxy;
131 unsigned num_clips;
132 unsigned num_culls;
133 };
134
135 struct ac_tex_info {
136 LLVMValueRef args[12];
137 int arg_count;
138 LLVMTypeRef dst_type;
139 bool has_offset;
140 };
141
142 static LLVMValueRef
143 emit_llvm_intrinsic(struct nir_to_llvm_context *ctx, const char *name,
144 LLVMTypeRef return_type, LLVMValueRef *params,
145 unsigned param_count, LLVMAttribute attribs);
146 static LLVMValueRef get_sampler_desc(struct nir_to_llvm_context *ctx,
147 nir_deref_var *deref,
148 enum desc_type desc_type);
149 static unsigned radeon_llvm_reg_index_soa(unsigned index, unsigned chan)
150 {
151 return (index * 4) + chan;
152 }
153
154 static unsigned llvm_get_type_size(LLVMTypeRef type)
155 {
156 LLVMTypeKind kind = LLVMGetTypeKind(type);
157
158 switch (kind) {
159 case LLVMIntegerTypeKind:
160 return LLVMGetIntTypeWidth(type) / 8;
161 case LLVMFloatTypeKind:
162 return 4;
163 case LLVMPointerTypeKind:
164 return 8;
165 case LLVMVectorTypeKind:
166 return LLVMGetVectorSize(type) *
167 llvm_get_type_size(LLVMGetElementType(type));
168 default:
169 assert(0);
170 return 0;
171 }
172 }
173
174 static void set_llvm_calling_convention(LLVMValueRef func,
175 gl_shader_stage stage)
176 {
177 enum radeon_llvm_calling_convention calling_conv;
178
179 switch (stage) {
180 case MESA_SHADER_VERTEX:
181 case MESA_SHADER_TESS_CTRL:
182 case MESA_SHADER_TESS_EVAL:
183 calling_conv = RADEON_LLVM_AMDGPU_VS;
184 break;
185 case MESA_SHADER_GEOMETRY:
186 calling_conv = RADEON_LLVM_AMDGPU_GS;
187 break;
188 case MESA_SHADER_FRAGMENT:
189 calling_conv = RADEON_LLVM_AMDGPU_PS;
190 break;
191 case MESA_SHADER_COMPUTE:
192 calling_conv = RADEON_LLVM_AMDGPU_CS;
193 break;
194 default:
195 unreachable("Unhandle shader type");
196 }
197
198 LLVMSetFunctionCallConv(func, calling_conv);
199 }
200
201 static LLVMValueRef
202 create_llvm_function(LLVMContextRef ctx, LLVMModuleRef module,
203 LLVMBuilderRef builder, LLVMTypeRef *return_types,
204 unsigned num_return_elems, LLVMTypeRef *param_types,
205 unsigned param_count, unsigned array_params,
206 unsigned sgpr_params, bool unsafe_math)
207 {
208 LLVMTypeRef main_function_type, ret_type;
209 LLVMBasicBlockRef main_function_body;
210
211 if (num_return_elems)
212 ret_type = LLVMStructTypeInContext(ctx, return_types,
213 num_return_elems, true);
214 else
215 ret_type = LLVMVoidTypeInContext(ctx);
216
217 /* Setup the function */
218 main_function_type =
219 LLVMFunctionType(ret_type, param_types, param_count, 0);
220 LLVMValueRef main_function =
221 LLVMAddFunction(module, "main", main_function_type);
222 main_function_body =
223 LLVMAppendBasicBlockInContext(ctx, main_function, "main_body");
224 LLVMPositionBuilderAtEnd(builder, main_function_body);
225
226 LLVMSetFunctionCallConv(main_function, RADEON_LLVM_AMDGPU_CS);
227 for (unsigned i = 0; i < sgpr_params; ++i) {
228 LLVMValueRef P = LLVMGetParam(main_function, i);
229
230 if (i < array_params) {
231 LLVMAddAttribute(P, LLVMByValAttribute);
232 ac_add_attr_dereferenceable(P, UINT64_MAX);
233 }
234 else
235 LLVMAddAttribute(P, LLVMInRegAttribute);
236 }
237
238 if (unsafe_math) {
239 /* These were copied from some LLVM test. */
240 LLVMAddTargetDependentFunctionAttr(main_function,
241 "less-precise-fpmad",
242 "true");
243 LLVMAddTargetDependentFunctionAttr(main_function,
244 "no-infs-fp-math",
245 "true");
246 LLVMAddTargetDependentFunctionAttr(main_function,
247 "no-nans-fp-math",
248 "true");
249 LLVMAddTargetDependentFunctionAttr(main_function,
250 "unsafe-fp-math",
251 "true");
252 }
253 return main_function;
254 }
255
256 static LLVMTypeRef const_array(LLVMTypeRef elem_type, int num_elements)
257 {
258 return LLVMPointerType(LLVMArrayType(elem_type, num_elements),
259 CONST_ADDR_SPACE);
260 }
261
262 static LLVMValueRef get_shared_memory_ptr(struct nir_to_llvm_context *ctx,
263 int idx,
264 LLVMTypeRef type)
265 {
266 LLVMValueRef offset;
267 LLVMValueRef ptr;
268 int addr_space;
269
270 offset = LLVMConstInt(ctx->i32, idx, false);
271
272 ptr = ctx->shared_memory;
273 ptr = LLVMBuildGEP(ctx->builder, ptr, &offset, 1, "");
274 addr_space = LLVMGetPointerAddressSpace(LLVMTypeOf(ptr));
275 ptr = LLVMBuildBitCast(ctx->builder, ptr, LLVMPointerType(type, addr_space), "");
276 return ptr;
277 }
278
279 static LLVMValueRef to_integer(struct nir_to_llvm_context *ctx, LLVMValueRef v)
280 {
281 LLVMTypeRef type = LLVMTypeOf(v);
282 if (type == ctx->f32) {
283 return LLVMBuildBitCast(ctx->builder, v, ctx->i32, "");
284 } else if (LLVMGetTypeKind(type) == LLVMVectorTypeKind) {
285 LLVMTypeRef elem_type = LLVMGetElementType(type);
286 if (elem_type == ctx->f32) {
287 LLVMTypeRef nt = LLVMVectorType(ctx->i32, LLVMGetVectorSize(type));
288 return LLVMBuildBitCast(ctx->builder, v, nt, "");
289 }
290 }
291 return v;
292 }
293
294 static LLVMValueRef to_float(struct nir_to_llvm_context *ctx, LLVMValueRef v)
295 {
296 LLVMTypeRef type = LLVMTypeOf(v);
297 if (type == ctx->i32) {
298 return LLVMBuildBitCast(ctx->builder, v, ctx->f32, "");
299 } else if (LLVMGetTypeKind(type) == LLVMVectorTypeKind) {
300 LLVMTypeRef elem_type = LLVMGetElementType(type);
301 if (elem_type == ctx->i32) {
302 LLVMTypeRef nt = LLVMVectorType(ctx->f32, LLVMGetVectorSize(type));
303 return LLVMBuildBitCast(ctx->builder, v, nt, "");
304 }
305 }
306 return v;
307 }
308
309 static LLVMValueRef build_indexed_load(struct nir_to_llvm_context *ctx,
310 LLVMValueRef base_ptr, LLVMValueRef index,
311 bool uniform)
312 {
313 LLVMValueRef pointer;
314 LLVMValueRef indices[] = {ctx->i32zero, index};
315
316 pointer = LLVMBuildGEP(ctx->builder, base_ptr, indices, 2, "");
317 if (uniform)
318 LLVMSetMetadata(pointer, ctx->uniform_md_kind, ctx->empty_md);
319 return LLVMBuildLoad(ctx->builder, pointer, "");
320 }
321
322 static LLVMValueRef build_indexed_load_const(struct nir_to_llvm_context *ctx,
323 LLVMValueRef base_ptr, LLVMValueRef index)
324 {
325 LLVMValueRef result = build_indexed_load(ctx, base_ptr, index, true);
326 LLVMSetMetadata(result, ctx->invariant_load_md_kind, ctx->empty_md);
327 return result;
328 }
329
330 static void create_function(struct nir_to_llvm_context *ctx,
331 struct nir_shader *nir)
332 {
333 LLVMTypeRef arg_types[23];
334 unsigned arg_idx = 0;
335 unsigned array_count = 0;
336 unsigned sgpr_count = 0, user_sgpr_count;
337 unsigned i;
338
339 /* 1 for each descriptor set */
340 for (unsigned i = 0; i < 4; ++i)
341 arg_types[arg_idx++] = const_array(ctx->i8, 1024 * 1024);
342
343 /* 1 for push constants and dynamic descriptors */
344 arg_types[arg_idx++] = const_array(ctx->i8, 1024 * 1024);
345
346 array_count = arg_idx;
347 switch (nir->stage) {
348 case MESA_SHADER_COMPUTE:
349 arg_types[arg_idx++] = LLVMVectorType(ctx->i32, 3); /* grid size */
350 user_sgpr_count = arg_idx;
351 arg_types[arg_idx++] = LLVMVectorType(ctx->i32, 3);
352 arg_types[arg_idx++] = ctx->i32;
353 sgpr_count = arg_idx;
354
355 arg_types[arg_idx++] = LLVMVectorType(ctx->i32, 3);
356 break;
357 case MESA_SHADER_VERTEX:
358 arg_types[arg_idx++] = const_array(ctx->v16i8, 16); /* vertex buffers */
359 arg_types[arg_idx++] = ctx->i32; // base vertex
360 arg_types[arg_idx++] = ctx->i32; // start instance
361 user_sgpr_count = sgpr_count = arg_idx;
362 arg_types[arg_idx++] = ctx->i32; // vertex id
363 arg_types[arg_idx++] = ctx->i32; // rel auto id
364 arg_types[arg_idx++] = ctx->i32; // vs prim id
365 arg_types[arg_idx++] = ctx->i32; // instance id
366 break;
367 case MESA_SHADER_FRAGMENT:
368 arg_types[arg_idx++] = const_array(ctx->f32, 32); /* sample positions */
369 user_sgpr_count = arg_idx;
370 arg_types[arg_idx++] = ctx->i32; /* prim mask */
371 sgpr_count = arg_idx;
372 arg_types[arg_idx++] = ctx->v2i32; /* persp sample */
373 arg_types[arg_idx++] = ctx->v2i32; /* persp center */
374 arg_types[arg_idx++] = ctx->v2i32; /* persp centroid */
375 arg_types[arg_idx++] = ctx->v3i32; /* persp pull model */
376 arg_types[arg_idx++] = ctx->v2i32; /* linear sample */
377 arg_types[arg_idx++] = ctx->v2i32; /* linear center */
378 arg_types[arg_idx++] = ctx->v2i32; /* linear centroid */
379 arg_types[arg_idx++] = ctx->f32; /* line stipple tex */
380 arg_types[arg_idx++] = ctx->f32; /* pos x float */
381 arg_types[arg_idx++] = ctx->f32; /* pos y float */
382 arg_types[arg_idx++] = ctx->f32; /* pos z float */
383 arg_types[arg_idx++] = ctx->f32; /* pos w float */
384 arg_types[arg_idx++] = ctx->i32; /* front face */
385 arg_types[arg_idx++] = ctx->i32; /* ancillary */
386 arg_types[arg_idx++] = ctx->f32; /* sample coverage */
387 arg_types[arg_idx++] = ctx->i32; /* fixed pt */
388 break;
389 default:
390 unreachable("Shader stage not implemented");
391 }
392
393 ctx->main_function = create_llvm_function(
394 ctx->context, ctx->module, ctx->builder, NULL, 0, arg_types,
395 arg_idx, array_count, sgpr_count, ctx->options->unsafe_math);
396 set_llvm_calling_convention(ctx->main_function, nir->stage);
397
398
399 ctx->shader_info->num_input_sgprs = 0;
400 ctx->shader_info->num_input_vgprs = 0;
401
402 for (i = 0; i < user_sgpr_count; i++)
403 ctx->shader_info->num_user_sgprs += llvm_get_type_size(arg_types[i]) / 4;
404
405 ctx->shader_info->num_input_sgprs = ctx->shader_info->num_user_sgprs;
406 for (; i < sgpr_count; i++)
407 ctx->shader_info->num_input_sgprs += llvm_get_type_size(arg_types[i]) / 4;
408
409 if (nir->stage != MESA_SHADER_FRAGMENT)
410 for (; i < arg_idx; ++i)
411 ctx->shader_info->num_input_vgprs += llvm_get_type_size(arg_types[i]) / 4;
412
413 arg_idx = 0;
414 for (unsigned i = 0; i < 4; ++i)
415 ctx->descriptor_sets[i] =
416 LLVMGetParam(ctx->main_function, arg_idx++);
417
418 ctx->push_constants = LLVMGetParam(ctx->main_function, arg_idx++);
419
420 switch (nir->stage) {
421 case MESA_SHADER_COMPUTE:
422 ctx->num_work_groups =
423 LLVMGetParam(ctx->main_function, arg_idx++);
424 ctx->workgroup_ids =
425 LLVMGetParam(ctx->main_function, arg_idx++);
426 ctx->tg_size =
427 LLVMGetParam(ctx->main_function, arg_idx++);
428 ctx->local_invocation_ids =
429 LLVMGetParam(ctx->main_function, arg_idx++);
430 break;
431 case MESA_SHADER_VERTEX:
432 ctx->vertex_buffers = LLVMGetParam(ctx->main_function, arg_idx++);
433 ctx->base_vertex = LLVMGetParam(ctx->main_function, arg_idx++);
434 ctx->start_instance = LLVMGetParam(ctx->main_function, arg_idx++);
435 ctx->vertex_id = LLVMGetParam(ctx->main_function, arg_idx++);
436 ctx->rel_auto_id = LLVMGetParam(ctx->main_function, arg_idx++);
437 ctx->vs_prim_id = LLVMGetParam(ctx->main_function, arg_idx++);
438 ctx->instance_id = LLVMGetParam(ctx->main_function, arg_idx++);
439 break;
440 case MESA_SHADER_FRAGMENT:
441 ctx->sample_positions = LLVMGetParam(ctx->main_function, arg_idx++);
442 ctx->prim_mask = LLVMGetParam(ctx->main_function, arg_idx++);
443 ctx->persp_sample = LLVMGetParam(ctx->main_function, arg_idx++);
444 ctx->persp_center = LLVMGetParam(ctx->main_function, arg_idx++);
445 ctx->persp_centroid = LLVMGetParam(ctx->main_function, arg_idx++);
446 arg_idx++;
447 ctx->linear_sample = LLVMGetParam(ctx->main_function, arg_idx++);
448 ctx->linear_center = LLVMGetParam(ctx->main_function, arg_idx++);
449 ctx->linear_centroid = LLVMGetParam(ctx->main_function, arg_idx++);
450 arg_idx++; /* line stipple */
451 ctx->frag_pos[0] = LLVMGetParam(ctx->main_function, arg_idx++);
452 ctx->frag_pos[1] = LLVMGetParam(ctx->main_function, arg_idx++);
453 ctx->frag_pos[2] = LLVMGetParam(ctx->main_function, arg_idx++);
454 ctx->frag_pos[3] = LLVMGetParam(ctx->main_function, arg_idx++);
455 ctx->front_face = LLVMGetParam(ctx->main_function, arg_idx++);
456 ctx->ancillary = LLVMGetParam(ctx->main_function, arg_idx++);
457 break;
458 default:
459 unreachable("Shader stage not implemented");
460 }
461 }
462
463 static void setup_types(struct nir_to_llvm_context *ctx)
464 {
465 LLVMValueRef args[4];
466
467 ctx->voidt = LLVMVoidTypeInContext(ctx->context);
468 ctx->i1 = LLVMIntTypeInContext(ctx->context, 1);
469 ctx->i8 = LLVMIntTypeInContext(ctx->context, 8);
470 ctx->i16 = LLVMIntTypeInContext(ctx->context, 16);
471 ctx->i32 = LLVMIntTypeInContext(ctx->context, 32);
472 ctx->i64 = LLVMIntTypeInContext(ctx->context, 64);
473 ctx->v2i32 = LLVMVectorType(ctx->i32, 2);
474 ctx->v3i32 = LLVMVectorType(ctx->i32, 3);
475 ctx->v4i32 = LLVMVectorType(ctx->i32, 4);
476 ctx->v8i32 = LLVMVectorType(ctx->i32, 8);
477 ctx->f32 = LLVMFloatTypeInContext(ctx->context);
478 ctx->f16 = LLVMHalfTypeInContext(ctx->context);
479 ctx->v2f32 = LLVMVectorType(ctx->f32, 2);
480 ctx->v4f32 = LLVMVectorType(ctx->f32, 4);
481 ctx->v16i8 = LLVMVectorType(ctx->i8, 16);
482
483 ctx->i32zero = LLVMConstInt(ctx->i32, 0, false);
484 ctx->i32one = LLVMConstInt(ctx->i32, 1, false);
485 ctx->f32zero = LLVMConstReal(ctx->f32, 0.0);
486 ctx->f32one = LLVMConstReal(ctx->f32, 1.0);
487
488 args[0] = ctx->f32zero;
489 args[1] = ctx->f32zero;
490 args[2] = ctx->f32zero;
491 args[3] = ctx->f32one;
492 ctx->v4f32empty = LLVMConstVector(args, 4);
493
494 ctx->range_md_kind = LLVMGetMDKindIDInContext(ctx->context,
495 "range", 5);
496 ctx->invariant_load_md_kind = LLVMGetMDKindIDInContext(ctx->context,
497 "invariant.load", 14);
498 ctx->uniform_md_kind =
499 LLVMGetMDKindIDInContext(ctx->context, "amdgpu.uniform", 14);
500 ctx->empty_md = LLVMMDNodeInContext(ctx->context, NULL, 0);
501
502 ctx->fpmath_md_kind = LLVMGetMDKindIDInContext(ctx->context, "fpmath", 6);
503
504 args[0] = LLVMConstReal(ctx->f32, 2.5);
505 ctx->fpmath_md_2p5_ulp = LLVMMDNodeInContext(ctx->context, args, 1);
506 }
507
508 static int get_llvm_num_components(LLVMValueRef value)
509 {
510 LLVMTypeRef type = LLVMTypeOf(value);
511 unsigned num_components = LLVMGetTypeKind(type) == LLVMVectorTypeKind
512 ? LLVMGetVectorSize(type)
513 : 1;
514 return num_components;
515 }
516
517 static LLVMValueRef llvm_extract_elem(struct nir_to_llvm_context *ctx,
518 LLVMValueRef value,
519 int index)
520 {
521 int count = get_llvm_num_components(value);
522
523 assert(index < count);
524 if (count == 1)
525 return value;
526
527 return LLVMBuildExtractElement(ctx->builder, value,
528 LLVMConstInt(ctx->i32, index, false), "");
529 }
530
531 static LLVMValueRef trim_vector(struct nir_to_llvm_context *ctx,
532 LLVMValueRef value, unsigned count)
533 {
534 unsigned num_components = get_llvm_num_components(value);
535 if (count == num_components)
536 return value;
537
538 LLVMValueRef masks[] = {
539 LLVMConstInt(ctx->i32, 0, false), LLVMConstInt(ctx->i32, 1, false),
540 LLVMConstInt(ctx->i32, 2, false), LLVMConstInt(ctx->i32, 3, false)};
541
542 if (count == 1)
543 return LLVMBuildExtractElement(ctx->builder, value, masks[0],
544 "");
545
546 LLVMValueRef swizzle = LLVMConstVector(masks, count);
547 return LLVMBuildShuffleVector(ctx->builder, value, value, swizzle, "");
548 }
549
550 static LLVMValueRef
551 build_gather_values_extended(struct nir_to_llvm_context *ctx,
552 LLVMValueRef *values,
553 unsigned value_count,
554 unsigned value_stride,
555 bool load)
556 {
557 LLVMBuilderRef builder = ctx->builder;
558 LLVMValueRef vec;
559 unsigned i;
560
561
562 if (value_count == 1) {
563 if (load)
564 return LLVMBuildLoad(builder, values[0], "");
565 return values[0];
566 }
567
568 for (i = 0; i < value_count; i++) {
569 LLVMValueRef value = values[i * value_stride];
570 if (load)
571 value = LLVMBuildLoad(builder, value, "");
572
573 if (!i)
574 vec = LLVMGetUndef( LLVMVectorType(LLVMTypeOf(value), value_count));
575 LLVMValueRef index = LLVMConstInt(ctx->i32, i, false);
576 vec = LLVMBuildInsertElement(builder, vec, value, index, "");
577 }
578 return vec;
579 }
580
581
582 static void
583 build_store_values_extended(struct nir_to_llvm_context *ctx,
584 LLVMValueRef *values,
585 unsigned value_count,
586 unsigned value_stride,
587 LLVMValueRef vec)
588 {
589 LLVMBuilderRef builder = ctx->builder;
590 unsigned i;
591
592 if (value_count == 1) {
593 LLVMBuildStore(builder, vec, values[0]);
594 return;
595 }
596
597 for (i = 0; i < value_count; i++) {
598 LLVMValueRef ptr = values[i * value_stride];
599 LLVMValueRef index = LLVMConstInt(ctx->i32, i, false);
600 LLVMValueRef value = LLVMBuildExtractElement(builder, vec, index, "");
601 LLVMBuildStore(builder, value, ptr);
602 }
603 }
604
605 static LLVMValueRef
606 build_gather_values(struct nir_to_llvm_context *ctx,
607 LLVMValueRef *values,
608 unsigned value_count)
609 {
610 return build_gather_values_extended(ctx, values, value_count, 1, false);
611 }
612
613 static LLVMTypeRef get_def_type(struct nir_to_llvm_context *ctx,
614 nir_ssa_def *def)
615 {
616 LLVMTypeRef type = LLVMIntTypeInContext(ctx->context, def->bit_size);
617 if (def->num_components > 1) {
618 type = LLVMVectorType(type, def->num_components);
619 }
620 return type;
621 }
622
623 static LLVMValueRef get_src(struct nir_to_llvm_context *ctx, nir_src src)
624 {
625 assert(src.is_ssa);
626 struct hash_entry *entry = _mesa_hash_table_search(ctx->defs, src.ssa);
627 return (LLVMValueRef)entry->data;
628 }
629
630
631 static LLVMBasicBlockRef get_block(struct nir_to_llvm_context *ctx,
632 struct nir_block *b)
633 {
634 struct hash_entry *entry = _mesa_hash_table_search(ctx->defs, b);
635 return (LLVMBasicBlockRef)entry->data;
636 }
637
638 static LLVMValueRef get_alu_src(struct nir_to_llvm_context *ctx,
639 nir_alu_src src,
640 unsigned num_components)
641 {
642 LLVMValueRef value = get_src(ctx, src.src);
643 bool need_swizzle = false;
644
645 assert(value);
646 LLVMTypeRef type = LLVMTypeOf(value);
647 unsigned src_components = LLVMGetTypeKind(type) == LLVMVectorTypeKind
648 ? LLVMGetVectorSize(type)
649 : 1;
650
651 for (unsigned i = 0; i < num_components; ++i) {
652 assert(src.swizzle[i] < src_components);
653 if (src.swizzle[i] != i)
654 need_swizzle = true;
655 }
656
657 if (need_swizzle || num_components != src_components) {
658 LLVMValueRef masks[] = {
659 LLVMConstInt(ctx->i32, src.swizzle[0], false),
660 LLVMConstInt(ctx->i32, src.swizzle[1], false),
661 LLVMConstInt(ctx->i32, src.swizzle[2], false),
662 LLVMConstInt(ctx->i32, src.swizzle[3], false)};
663
664 if (src_components > 1 && num_components == 1) {
665 value = LLVMBuildExtractElement(ctx->builder, value,
666 masks[0], "");
667 } else if (src_components == 1 && num_components > 1) {
668 LLVMValueRef values[] = {value, value, value, value};
669 value = build_gather_values(ctx, values, num_components);
670 } else {
671 LLVMValueRef swizzle = LLVMConstVector(masks, num_components);
672 value = LLVMBuildShuffleVector(ctx->builder, value, value,
673 swizzle, "");
674 }
675 }
676 assert(!src.negate);
677 assert(!src.abs);
678 return value;
679 }
680
681 static LLVMValueRef emit_int_cmp(struct nir_to_llvm_context *ctx,
682 LLVMIntPredicate pred, LLVMValueRef src0,
683 LLVMValueRef src1)
684 {
685 LLVMValueRef result = LLVMBuildICmp(ctx->builder, pred, src0, src1, "");
686 return LLVMBuildSelect(ctx->builder, result,
687 LLVMConstInt(ctx->i32, 0xFFFFFFFF, false),
688 LLVMConstInt(ctx->i32, 0, false), "");
689 }
690
691 static LLVMValueRef emit_float_cmp(struct nir_to_llvm_context *ctx,
692 LLVMRealPredicate pred, LLVMValueRef src0,
693 LLVMValueRef src1)
694 {
695 LLVMValueRef result;
696 src0 = to_float(ctx, src0);
697 src1 = to_float(ctx, src1);
698 result = LLVMBuildFCmp(ctx->builder, pred, src0, src1, "");
699 return LLVMBuildSelect(ctx->builder, result,
700 LLVMConstInt(ctx->i32, 0xFFFFFFFF, false),
701 LLVMConstInt(ctx->i32, 0, false), "");
702 }
703
704 static LLVMValueRef emit_intrin_1f_param(struct nir_to_llvm_context *ctx,
705 const char *intrin,
706 LLVMValueRef src0)
707 {
708 LLVMValueRef params[] = {
709 to_float(ctx, src0),
710 };
711 return emit_llvm_intrinsic(ctx, intrin, ctx->f32, params, 1, LLVMReadNoneAttribute);
712 }
713
714 static LLVMValueRef emit_intrin_2f_param(struct nir_to_llvm_context *ctx,
715 const char *intrin,
716 LLVMValueRef src0, LLVMValueRef src1)
717 {
718 LLVMValueRef params[] = {
719 to_float(ctx, src0),
720 to_float(ctx, src1),
721 };
722 return emit_llvm_intrinsic(ctx, intrin, ctx->f32, params, 2, LLVMReadNoneAttribute);
723 }
724
725 static LLVMValueRef emit_intrin_3f_param(struct nir_to_llvm_context *ctx,
726 const char *intrin,
727 LLVMValueRef src0, LLVMValueRef src1, LLVMValueRef src2)
728 {
729 LLVMValueRef params[] = {
730 to_float(ctx, src0),
731 to_float(ctx, src1),
732 to_float(ctx, src2),
733 };
734 return emit_llvm_intrinsic(ctx, intrin, ctx->f32, params, 3, LLVMReadNoneAttribute);
735 }
736
737 static LLVMValueRef emit_bcsel(struct nir_to_llvm_context *ctx,
738 LLVMValueRef src0, LLVMValueRef src1, LLVMValueRef src2)
739 {
740 LLVMValueRef v = LLVMBuildICmp(ctx->builder, LLVMIntNE, src0,
741 ctx->i32zero, "");
742 return LLVMBuildSelect(ctx->builder, v, src1, src2, "");
743 }
744
745 static LLVMValueRef emit_find_lsb(struct nir_to_llvm_context *ctx,
746 LLVMValueRef src0)
747 {
748 LLVMValueRef params[2] = {
749 src0,
750
751 /* The value of 1 means that ffs(x=0) = undef, so LLVM won't
752 * add special code to check for x=0. The reason is that
753 * the LLVM behavior for x=0 is different from what we
754 * need here.
755 *
756 * The hardware already implements the correct behavior.
757 */
758 LLVMConstInt(ctx->i32, 1, false),
759 };
760 return emit_llvm_intrinsic(ctx, "llvm.cttz.i32", ctx->i32, params, 2, LLVMReadNoneAttribute);
761 }
762
763 static LLVMValueRef emit_ifind_msb(struct nir_to_llvm_context *ctx,
764 LLVMValueRef src0)
765 {
766 LLVMValueRef msb = emit_llvm_intrinsic(ctx, "llvm.AMDGPU.flbit.i32",
767 ctx->i32, &src0, 1,
768 LLVMReadNoneAttribute);
769
770 /* The HW returns the last bit index from MSB, but NIR wants
771 * the index from LSB. Invert it by doing "31 - msb". */
772 msb = LLVMBuildSub(ctx->builder, LLVMConstInt(ctx->i32, 31, false),
773 msb, "");
774
775 LLVMValueRef all_ones = LLVMConstInt(ctx->i32, -1, true);
776 LLVMValueRef cond = LLVMBuildOr(ctx->builder,
777 LLVMBuildICmp(ctx->builder, LLVMIntEQ,
778 src0, ctx->i32zero, ""),
779 LLVMBuildICmp(ctx->builder, LLVMIntEQ,
780 src0, all_ones, ""), "");
781
782 return LLVMBuildSelect(ctx->builder, cond, all_ones, msb, "");
783 }
784
785 static LLVMValueRef emit_ufind_msb(struct nir_to_llvm_context *ctx,
786 LLVMValueRef src0)
787 {
788 LLVMValueRef args[2] = {
789 src0,
790 ctx->i32one,
791 };
792 LLVMValueRef msb = emit_llvm_intrinsic(ctx, "llvm.ctlz.i32",
793 ctx->i32, args, ARRAY_SIZE(args),
794 LLVMReadNoneAttribute);
795
796 /* The HW returns the last bit index from MSB, but NIR wants
797 * the index from LSB. Invert it by doing "31 - msb". */
798 msb = LLVMBuildSub(ctx->builder, LLVMConstInt(ctx->i32, 31, false),
799 msb, "");
800
801 return LLVMBuildSelect(ctx->builder,
802 LLVMBuildICmp(ctx->builder, LLVMIntEQ, src0,
803 ctx->i32zero, ""),
804 LLVMConstInt(ctx->i32, -1, true), msb, "");
805 }
806
807 static LLVMValueRef emit_minmax_int(struct nir_to_llvm_context *ctx,
808 LLVMIntPredicate pred,
809 LLVMValueRef src0, LLVMValueRef src1)
810 {
811 return LLVMBuildSelect(ctx->builder,
812 LLVMBuildICmp(ctx->builder, pred, src0, src1, ""),
813 src0,
814 src1, "");
815
816 }
817 static LLVMValueRef emit_iabs(struct nir_to_llvm_context *ctx,
818 LLVMValueRef src0)
819 {
820 return emit_minmax_int(ctx, LLVMIntSGT, src0,
821 LLVMBuildNeg(ctx->builder, src0, ""));
822 }
823
824 static LLVMValueRef emit_fsign(struct nir_to_llvm_context *ctx,
825 LLVMValueRef src0)
826 {
827 LLVMValueRef cmp, val;
828
829 cmp = LLVMBuildFCmp(ctx->builder, LLVMRealOGT, src0, ctx->f32zero, "");
830 val = LLVMBuildSelect(ctx->builder, cmp, ctx->f32one, src0, "");
831 cmp = LLVMBuildFCmp(ctx->builder, LLVMRealOGE, val, ctx->f32zero, "");
832 val = LLVMBuildSelect(ctx->builder, cmp, val, LLVMConstReal(ctx->f32, -1.0), "");
833 return val;
834 }
835
836 static LLVMValueRef emit_isign(struct nir_to_llvm_context *ctx,
837 LLVMValueRef src0)
838 {
839 LLVMValueRef cmp, val;
840
841 cmp = LLVMBuildICmp(ctx->builder, LLVMIntSGT, src0, ctx->i32zero, "");
842 val = LLVMBuildSelect(ctx->builder, cmp, ctx->i32one, src0, "");
843 cmp = LLVMBuildICmp(ctx->builder, LLVMIntSGE, val, ctx->i32zero, "");
844 val = LLVMBuildSelect(ctx->builder, cmp, val, LLVMConstInt(ctx->i32, -1, true), "");
845 return val;
846 }
847
848 static LLVMValueRef emit_ffract(struct nir_to_llvm_context *ctx,
849 LLVMValueRef src0)
850 {
851 const char *intr = "llvm.floor.f32";
852 LLVMValueRef fsrc0 = to_float(ctx, src0);
853 LLVMValueRef params[] = {
854 fsrc0,
855 };
856 LLVMValueRef floor = emit_llvm_intrinsic(ctx, intr,
857 ctx->f32, params, 1,
858 LLVMReadNoneAttribute);
859 return LLVMBuildFSub(ctx->builder, fsrc0, floor, "");
860 }
861
862 static LLVMValueRef emit_uint_carry(struct nir_to_llvm_context *ctx,
863 const char *intrin,
864 LLVMValueRef src0, LLVMValueRef src1)
865 {
866 LLVMTypeRef ret_type;
867 LLVMTypeRef types[] = { ctx->i32, ctx->i1 };
868 LLVMValueRef res;
869 LLVMValueRef params[] = { src0, src1 };
870 ret_type = LLVMStructTypeInContext(ctx->context, types,
871 2, true);
872
873 res = emit_llvm_intrinsic(ctx, intrin, ret_type,
874 params, 2, LLVMReadNoneAttribute);
875
876 res = LLVMBuildExtractValue(ctx->builder, res, 1, "");
877 res = LLVMBuildZExt(ctx->builder, res, ctx->i32, "");
878 return res;
879 }
880
881 static LLVMValueRef emit_b2f(struct nir_to_llvm_context *ctx,
882 LLVMValueRef src0)
883 {
884 return LLVMBuildAnd(ctx->builder, src0, LLVMBuildBitCast(ctx->builder, LLVMConstReal(ctx->f32, 1.0), ctx->i32, ""), "");
885 }
886
887 static LLVMValueRef emit_umul_high(struct nir_to_llvm_context *ctx,
888 LLVMValueRef src0, LLVMValueRef src1)
889 {
890 LLVMValueRef dst64, result;
891 src0 = LLVMBuildZExt(ctx->builder, src0, ctx->i64, "");
892 src1 = LLVMBuildZExt(ctx->builder, src1, ctx->i64, "");
893
894 dst64 = LLVMBuildMul(ctx->builder, src0, src1, "");
895 dst64 = LLVMBuildLShr(ctx->builder, dst64, LLVMConstInt(ctx->i64, 32, false), "");
896 result = LLVMBuildTrunc(ctx->builder, dst64, ctx->i32, "");
897 return result;
898 }
899
900 static LLVMValueRef emit_imul_high(struct nir_to_llvm_context *ctx,
901 LLVMValueRef src0, LLVMValueRef src1)
902 {
903 LLVMValueRef dst64, result;
904 src0 = LLVMBuildSExt(ctx->builder, src0, ctx->i64, "");
905 src1 = LLVMBuildSExt(ctx->builder, src1, ctx->i64, "");
906
907 dst64 = LLVMBuildMul(ctx->builder, src0, src1, "");
908 dst64 = LLVMBuildAShr(ctx->builder, dst64, LLVMConstInt(ctx->i64, 32, false), "");
909 result = LLVMBuildTrunc(ctx->builder, dst64, ctx->i32, "");
910 return result;
911 }
912
913 static LLVMValueRef emit_bitfield_extract(struct nir_to_llvm_context *ctx,
914 const char *intrin,
915 LLVMValueRef srcs[3])
916 {
917 LLVMValueRef result;
918 LLVMValueRef icond = LLVMBuildICmp(ctx->builder, LLVMIntEQ, srcs[2], LLVMConstInt(ctx->i32, 32, false), "");
919 result = emit_llvm_intrinsic(ctx, intrin, ctx->i32, srcs, 3, LLVMReadNoneAttribute);
920
921 result = LLVMBuildSelect(ctx->builder, icond, srcs[0], result, "");
922 return result;
923 }
924
925 static LLVMValueRef emit_bitfield_insert(struct nir_to_llvm_context *ctx,
926 LLVMValueRef src0, LLVMValueRef src1,
927 LLVMValueRef src2, LLVMValueRef src3)
928 {
929 LLVMValueRef bfi_args[3], result;
930
931 bfi_args[0] = LLVMBuildShl(ctx->builder,
932 LLVMBuildSub(ctx->builder,
933 LLVMBuildShl(ctx->builder,
934 ctx->i32one,
935 src3, ""),
936 ctx->i32one, ""),
937 src2, "");
938 bfi_args[1] = LLVMBuildShl(ctx->builder, src1, src2, "");
939 bfi_args[2] = src0;
940
941 LLVMValueRef icond = LLVMBuildICmp(ctx->builder, LLVMIntEQ, src3, LLVMConstInt(ctx->i32, 32, false), "");
942
943 /* Calculate:
944 * (arg0 & arg1) | (~arg0 & arg2) = arg2 ^ (arg0 & (arg1 ^ arg2)
945 * Use the right-hand side, which the LLVM backend can convert to V_BFI.
946 */
947 result = LLVMBuildXor(ctx->builder, bfi_args[2],
948 LLVMBuildAnd(ctx->builder, bfi_args[0],
949 LLVMBuildXor(ctx->builder, bfi_args[1], bfi_args[2], ""), ""), "");
950
951 result = LLVMBuildSelect(ctx->builder, icond, src1, result, "");
952 return result;
953 }
954
955 static LLVMValueRef emit_pack_half_2x16(struct nir_to_llvm_context *ctx,
956 LLVMValueRef src0)
957 {
958 LLVMValueRef const16 = LLVMConstInt(ctx->i32, 16, false);
959 int i;
960 LLVMValueRef comp[2];
961
962 src0 = to_float(ctx, src0);
963 comp[0] = LLVMBuildExtractElement(ctx->builder, src0, ctx->i32zero, "");
964 comp[1] = LLVMBuildExtractElement(ctx->builder, src0, ctx->i32one, "");
965 for (i = 0; i < 2; i++) {
966 comp[i] = LLVMBuildFPTrunc(ctx->builder, comp[i], ctx->f16, "");
967 comp[i] = LLVMBuildBitCast(ctx->builder, comp[i], ctx->i16, "");
968 comp[i] = LLVMBuildZExt(ctx->builder, comp[i], ctx->i32, "");
969 }
970
971 comp[1] = LLVMBuildShl(ctx->builder, comp[1], const16, "");
972 comp[0] = LLVMBuildOr(ctx->builder, comp[0], comp[1], "");
973
974 return comp[0];
975 }
976
977 static LLVMValueRef emit_unpack_half_2x16(struct nir_to_llvm_context *ctx,
978 LLVMValueRef src0)
979 {
980 LLVMValueRef const16 = LLVMConstInt(ctx->i32, 16, false);
981 LLVMValueRef temps[2], result, val;
982 int i;
983
984 for (i = 0; i < 2; i++) {
985 val = i == 1 ? LLVMBuildLShr(ctx->builder, src0, const16, "") : src0;
986 val = LLVMBuildTrunc(ctx->builder, val, ctx->i16, "");
987 val = LLVMBuildBitCast(ctx->builder, val, ctx->f16, "");
988 temps[i] = LLVMBuildFPExt(ctx->builder, val, ctx->f32, "");
989 }
990
991 result = LLVMBuildInsertElement(ctx->builder, LLVMGetUndef(ctx->v2f32), temps[0],
992 ctx->i32zero, "");
993 result = LLVMBuildInsertElement(ctx->builder, result, temps[1],
994 ctx->i32one, "");
995 return result;
996 }
997
998 /**
999 * Set range metadata on an instruction. This can only be used on load and
1000 * call instructions. If you know an instruction can only produce the values
1001 * 0, 1, 2, you would do set_range_metadata(value, 0, 3);
1002 * \p lo is the minimum value inclusive.
1003 * \p hi is the maximum value exclusive.
1004 */
1005 static void set_range_metadata(struct nir_to_llvm_context *ctx,
1006 LLVMValueRef value, unsigned lo, unsigned hi)
1007 {
1008 LLVMValueRef range_md, md_args[2];
1009 LLVMTypeRef type = LLVMTypeOf(value);
1010 LLVMContextRef context = LLVMGetTypeContext(type);
1011
1012 md_args[0] = LLVMConstInt(type, lo, false);
1013 md_args[1] = LLVMConstInt(type, hi, false);
1014 range_md = LLVMMDNodeInContext(context, md_args, 2);
1015 LLVMSetMetadata(value, ctx->range_md_kind, range_md);
1016 }
1017
1018 static LLVMValueRef get_thread_id(struct nir_to_llvm_context *ctx)
1019 {
1020 LLVMValueRef tid;
1021 LLVMValueRef tid_args[2];
1022 tid_args[0] = LLVMConstInt(ctx->i32, 0xffffffff, false);
1023 tid_args[1] = ctx->i32zero;
1024 tid_args[1] = emit_llvm_intrinsic(ctx,
1025 "llvm.amdgcn.mbcnt.lo", ctx->i32,
1026 tid_args, 2, LLVMReadNoneAttribute);
1027
1028 tid = emit_llvm_intrinsic(ctx,
1029 "llvm.amdgcn.mbcnt.hi", ctx->i32,
1030 tid_args, 2, LLVMReadNoneAttribute);
1031 set_range_metadata(ctx, tid, 0, 64);
1032 return tid;
1033 }
1034
1035 /*
1036 * SI implements derivatives using the local data store (LDS)
1037 * All writes to the LDS happen in all executing threads at
1038 * the same time. TID is the Thread ID for the current
1039 * thread and is a value between 0 and 63, representing
1040 * the thread's position in the wavefront.
1041 *
1042 * For the pixel shader threads are grouped into quads of four pixels.
1043 * The TIDs of the pixels of a quad are:
1044 *
1045 * +------+------+
1046 * |4n + 0|4n + 1|
1047 * +------+------+
1048 * |4n + 2|4n + 3|
1049 * +------+------+
1050 *
1051 * So, masking the TID with 0xfffffffc yields the TID of the top left pixel
1052 * of the quad, masking with 0xfffffffd yields the TID of the top pixel of
1053 * the current pixel's column, and masking with 0xfffffffe yields the TID
1054 * of the left pixel of the current pixel's row.
1055 *
1056 * Adding 1 yields the TID of the pixel to the right of the left pixel, and
1057 * adding 2 yields the TID of the pixel below the top pixel.
1058 */
1059 /* masks for thread ID. */
1060 #define TID_MASK_TOP_LEFT 0xfffffffc
1061 #define TID_MASK_TOP 0xfffffffd
1062 #define TID_MASK_LEFT 0xfffffffe
1063 static LLVMValueRef emit_ddxy(struct nir_to_llvm_context *ctx,
1064 nir_alu_instr *instr,
1065 LLVMValueRef src0)
1066 {
1067 LLVMValueRef indices[2];
1068 LLVMValueRef store_ptr, load_ptr0, load_ptr1;
1069 LLVMValueRef tl, trbl, result;
1070 LLVMValueRef tl_tid, trbl_tid;
1071 LLVMValueRef args[2];
1072 unsigned mask;
1073 int idx;
1074 ctx->has_ddxy = true;
1075 if (!ctx->lds)
1076 ctx->lds = LLVMAddGlobalInAddressSpace(ctx->module,
1077 LLVMArrayType(ctx->i32, 64),
1078 "ddxy_lds", LOCAL_ADDR_SPACE);
1079
1080 indices[0] = ctx->i32zero;
1081 indices[1] = get_thread_id(ctx);
1082 store_ptr = LLVMBuildGEP(ctx->builder, ctx->lds,
1083 indices, 2, "");
1084
1085 if (instr->op == nir_op_fddx_fine || instr->op == nir_op_fddx)
1086 mask = TID_MASK_LEFT;
1087 else if (instr->op == nir_op_fddy_fine || instr->op == nir_op_fddy)
1088 mask = TID_MASK_TOP;
1089 else
1090 mask = TID_MASK_TOP_LEFT;
1091
1092 tl_tid = LLVMBuildAnd(ctx->builder, indices[1],
1093 LLVMConstInt(ctx->i32, mask, false), "");
1094 indices[1] = tl_tid;
1095 load_ptr0 = LLVMBuildGEP(ctx->builder, ctx->lds,
1096 indices, 2, "");
1097
1098 /* for DDX we want to next X pixel, DDY next Y pixel. */
1099 if (instr->op == nir_op_fddx_fine ||
1100 instr->op == nir_op_fddx_coarse ||
1101 instr->op == nir_op_fddx)
1102 idx = 1;
1103 else
1104 idx = 2;
1105
1106 trbl_tid = LLVMBuildAdd(ctx->builder, indices[1],
1107 LLVMConstInt(ctx->i32, idx, false), "");
1108 indices[1] = trbl_tid;
1109 load_ptr1 = LLVMBuildGEP(ctx->builder, ctx->lds,
1110 indices, 2, "");
1111
1112 if (ctx->options->family >= CHIP_TONGA) {
1113 args[0] = LLVMBuildMul(ctx->builder, tl_tid,
1114 LLVMConstInt(ctx->i32, 4, false), "");
1115 args[1] = src0;
1116 tl = emit_llvm_intrinsic(ctx, "llvm.amdgcn.ds.bpermute",
1117 ctx->i32, args, 2,
1118 LLVMReadNoneAttribute);
1119
1120 args[0] = LLVMBuildMul(ctx->builder, trbl_tid,
1121 LLVMConstInt(ctx->i32, 4, false), "");
1122 trbl = emit_llvm_intrinsic(ctx, "llvm.amdgcn.ds.bpermute",
1123 ctx->i32, args, 2,
1124 LLVMReadNoneAttribute);
1125 } else {
1126 LLVMBuildStore(ctx->builder, src0, store_ptr);
1127
1128 tl = LLVMBuildLoad(ctx->builder, load_ptr0, "");
1129 trbl = LLVMBuildLoad(ctx->builder, load_ptr1, "");
1130 }
1131 tl = LLVMBuildBitCast(ctx->builder, tl, ctx->f32, "");
1132 trbl = LLVMBuildBitCast(ctx->builder, trbl, ctx->f32, "");
1133 result = LLVMBuildFSub(ctx->builder, trbl, tl, "");
1134 return result;
1135 }
1136
1137 /*
1138 * this takes an I,J coordinate pair,
1139 * and works out the X and Y derivatives.
1140 * it returns DDX(I), DDX(J), DDY(I), DDY(J).
1141 */
1142 static LLVMValueRef emit_ddxy_interp(
1143 struct nir_to_llvm_context *ctx,
1144 LLVMValueRef interp_ij)
1145 {
1146 LLVMValueRef indices[2];
1147 LLVMValueRef store_ptr, load_ptr_x, load_ptr_y, load_ptr_ddx, load_ptr_ddy, temp, temp2;
1148 LLVMValueRef tl, tr, bl, result[4];
1149 unsigned c;
1150
1151 if (!ctx->lds)
1152 ctx->lds = LLVMAddGlobalInAddressSpace(ctx->module,
1153 LLVMArrayType(ctx->i32, 64),
1154 "ddxy_lds", LOCAL_ADDR_SPACE);
1155
1156 indices[0] = ctx->i32zero;
1157 indices[1] = get_thread_id(ctx);
1158 store_ptr = LLVMBuildGEP(ctx->builder, ctx->lds,
1159 indices, 2, "");
1160
1161 temp = LLVMBuildAnd(ctx->builder, indices[1],
1162 LLVMConstInt(ctx->i32, TID_MASK_LEFT, false), "");
1163
1164 temp2 = LLVMBuildAnd(ctx->builder, indices[1],
1165 LLVMConstInt(ctx->i32, TID_MASK_TOP, false), "");
1166
1167 indices[1] = temp;
1168 load_ptr_x = LLVMBuildGEP(ctx->builder, ctx->lds,
1169 indices, 2, "");
1170
1171 indices[1] = temp2;
1172 load_ptr_y = LLVMBuildGEP(ctx->builder, ctx->lds,
1173 indices, 2, "");
1174
1175 indices[1] = LLVMBuildAdd(ctx->builder, temp,
1176 LLVMConstInt(ctx->i32, 1, false), "");
1177 load_ptr_ddx = LLVMBuildGEP(ctx->builder, ctx->lds,
1178 indices, 2, "");
1179
1180 indices[1] = LLVMBuildAdd(ctx->builder, temp2,
1181 LLVMConstInt(ctx->i32, 2, false), "");
1182 load_ptr_ddy = LLVMBuildGEP(ctx->builder, ctx->lds,
1183 indices, 2, "");
1184
1185 for (c = 0; c < 2; ++c) {
1186 LLVMValueRef store_val;
1187 LLVMValueRef c_ll = LLVMConstInt(ctx->i32, c, false);
1188
1189 store_val = LLVMBuildExtractElement(ctx->builder,
1190 interp_ij, c_ll, "");
1191 LLVMBuildStore(ctx->builder,
1192 store_val,
1193 store_ptr);
1194
1195 tl = LLVMBuildLoad(ctx->builder, load_ptr_x, "");
1196 tl = LLVMBuildBitCast(ctx->builder, tl, ctx->f32, "");
1197
1198 tr = LLVMBuildLoad(ctx->builder, load_ptr_ddx, "");
1199 tr = LLVMBuildBitCast(ctx->builder, tr, ctx->f32, "");
1200
1201 result[c] = LLVMBuildFSub(ctx->builder, tr, tl, "");
1202
1203 tl = LLVMBuildLoad(ctx->builder, load_ptr_y, "");
1204 tl = LLVMBuildBitCast(ctx->builder, tl, ctx->f32, "");
1205
1206 bl = LLVMBuildLoad(ctx->builder, load_ptr_ddy, "");
1207 bl = LLVMBuildBitCast(ctx->builder, bl, ctx->f32, "");
1208
1209 result[c + 2] = LLVMBuildFSub(ctx->builder, bl, tl, "");
1210 }
1211
1212 return build_gather_values(ctx, result, 4);
1213 }
1214
1215 static LLVMValueRef emit_fdiv(struct nir_to_llvm_context *ctx,
1216 LLVMValueRef num,
1217 LLVMValueRef den)
1218 {
1219 LLVMValueRef ret = LLVMBuildFDiv(ctx->builder, num, den, "");
1220
1221 if (!LLVMIsConstant(ret))
1222 LLVMSetMetadata(ret, ctx->fpmath_md_kind, ctx->fpmath_md_2p5_ulp);
1223 return ret;
1224 }
1225
1226 static void visit_alu(struct nir_to_llvm_context *ctx, nir_alu_instr *instr)
1227 {
1228 LLVMValueRef src[4], result = NULL;
1229 unsigned num_components = instr->dest.dest.ssa.num_components;
1230 unsigned src_components;
1231
1232 assert(nir_op_infos[instr->op].num_inputs <= ARRAY_SIZE(src));
1233 switch (instr->op) {
1234 case nir_op_vec2:
1235 case nir_op_vec3:
1236 case nir_op_vec4:
1237 src_components = 1;
1238 break;
1239 case nir_op_pack_half_2x16:
1240 src_components = 2;
1241 break;
1242 case nir_op_unpack_half_2x16:
1243 src_components = 1;
1244 break;
1245 default:
1246 src_components = num_components;
1247 break;
1248 }
1249 for (unsigned i = 0; i < nir_op_infos[instr->op].num_inputs; i++)
1250 src[i] = get_alu_src(ctx, instr->src[i], src_components);
1251
1252 switch (instr->op) {
1253 case nir_op_fmov:
1254 case nir_op_imov:
1255 result = src[0];
1256 break;
1257 case nir_op_fneg:
1258 src[0] = to_float(ctx, src[0]);
1259 result = LLVMBuildFNeg(ctx->builder, src[0], "");
1260 break;
1261 case nir_op_ineg:
1262 result = LLVMBuildNeg(ctx->builder, src[0], "");
1263 break;
1264 case nir_op_inot:
1265 result = LLVMBuildNot(ctx->builder, src[0], "");
1266 break;
1267 case nir_op_iadd:
1268 result = LLVMBuildAdd(ctx->builder, src[0], src[1], "");
1269 break;
1270 case nir_op_fadd:
1271 src[0] = to_float(ctx, src[0]);
1272 src[1] = to_float(ctx, src[1]);
1273 result = LLVMBuildFAdd(ctx->builder, src[0], src[1], "");
1274 break;
1275 case nir_op_fsub:
1276 src[0] = to_float(ctx, src[0]);
1277 src[1] = to_float(ctx, src[1]);
1278 result = LLVMBuildFSub(ctx->builder, src[0], src[1], "");
1279 break;
1280 case nir_op_isub:
1281 result = LLVMBuildSub(ctx->builder, src[0], src[1], "");
1282 break;
1283 case nir_op_imul:
1284 result = LLVMBuildMul(ctx->builder, src[0], src[1], "");
1285 break;
1286 case nir_op_imod:
1287 result = LLVMBuildSRem(ctx->builder, src[0], src[1], "");
1288 break;
1289 case nir_op_umod:
1290 result = LLVMBuildURem(ctx->builder, src[0], src[1], "");
1291 break;
1292 case nir_op_fmod:
1293 src[0] = to_float(ctx, src[0]);
1294 src[1] = to_float(ctx, src[1]);
1295 result = emit_fdiv(ctx, src[0], src[1]);
1296 result = emit_intrin_1f_param(ctx, "llvm.floor.f32", result);
1297 result = LLVMBuildFMul(ctx->builder, src[1] , result, "");
1298 result = LLVMBuildFSub(ctx->builder, src[0], result, "");
1299 break;
1300 case nir_op_frem:
1301 src[0] = to_float(ctx, src[0]);
1302 src[1] = to_float(ctx, src[1]);
1303 result = LLVMBuildFRem(ctx->builder, src[0], src[1], "");
1304 break;
1305 case nir_op_idiv:
1306 result = LLVMBuildSDiv(ctx->builder, src[0], src[1], "");
1307 break;
1308 case nir_op_udiv:
1309 result = LLVMBuildUDiv(ctx->builder, src[0], src[1], "");
1310 break;
1311 case nir_op_fmul:
1312 src[0] = to_float(ctx, src[0]);
1313 src[1] = to_float(ctx, src[1]);
1314 result = LLVMBuildFMul(ctx->builder, src[0], src[1], "");
1315 break;
1316 case nir_op_fdiv:
1317 src[0] = to_float(ctx, src[0]);
1318 src[1] = to_float(ctx, src[1]);
1319 result = emit_fdiv(ctx, src[0], src[1]);
1320 break;
1321 case nir_op_frcp:
1322 src[0] = to_float(ctx, src[0]);
1323 result = emit_fdiv(ctx, ctx->f32one, src[0]);
1324 break;
1325 case nir_op_iand:
1326 result = LLVMBuildAnd(ctx->builder, src[0], src[1], "");
1327 break;
1328 case nir_op_ior:
1329 result = LLVMBuildOr(ctx->builder, src[0], src[1], "");
1330 break;
1331 case nir_op_ixor:
1332 result = LLVMBuildXor(ctx->builder, src[0], src[1], "");
1333 break;
1334 case nir_op_ishl:
1335 result = LLVMBuildShl(ctx->builder, src[0], src[1], "");
1336 break;
1337 case nir_op_ishr:
1338 result = LLVMBuildAShr(ctx->builder, src[0], src[1], "");
1339 break;
1340 case nir_op_ushr:
1341 result = LLVMBuildLShr(ctx->builder, src[0], src[1], "");
1342 break;
1343 case nir_op_ilt:
1344 result = emit_int_cmp(ctx, LLVMIntSLT, src[0], src[1]);
1345 break;
1346 case nir_op_ine:
1347 result = emit_int_cmp(ctx, LLVMIntNE, src[0], src[1]);
1348 break;
1349 case nir_op_ieq:
1350 result = emit_int_cmp(ctx, LLVMIntEQ, src[0], src[1]);
1351 break;
1352 case nir_op_ige:
1353 result = emit_int_cmp(ctx, LLVMIntSGE, src[0], src[1]);
1354 break;
1355 case nir_op_ult:
1356 result = emit_int_cmp(ctx, LLVMIntULT, src[0], src[1]);
1357 break;
1358 case nir_op_uge:
1359 result = emit_int_cmp(ctx, LLVMIntUGE, src[0], src[1]);
1360 break;
1361 case nir_op_feq:
1362 result = emit_float_cmp(ctx, LLVMRealUEQ, src[0], src[1]);
1363 break;
1364 case nir_op_fne:
1365 result = emit_float_cmp(ctx, LLVMRealUNE, src[0], src[1]);
1366 break;
1367 case nir_op_flt:
1368 result = emit_float_cmp(ctx, LLVMRealULT, src[0], src[1]);
1369 break;
1370 case nir_op_fge:
1371 result = emit_float_cmp(ctx, LLVMRealUGE, src[0], src[1]);
1372 break;
1373 case nir_op_fabs:
1374 result = emit_intrin_1f_param(ctx, "llvm.fabs.f32", src[0]);
1375 break;
1376 case nir_op_iabs:
1377 result = emit_iabs(ctx, src[0]);
1378 break;
1379 case nir_op_imax:
1380 result = emit_minmax_int(ctx, LLVMIntSGT, src[0], src[1]);
1381 break;
1382 case nir_op_imin:
1383 result = emit_minmax_int(ctx, LLVMIntSLT, src[0], src[1]);
1384 break;
1385 case nir_op_umax:
1386 result = emit_minmax_int(ctx, LLVMIntUGT, src[0], src[1]);
1387 break;
1388 case nir_op_umin:
1389 result = emit_minmax_int(ctx, LLVMIntULT, src[0], src[1]);
1390 break;
1391 case nir_op_isign:
1392 result = emit_isign(ctx, src[0]);
1393 break;
1394 case nir_op_fsign:
1395 src[0] = to_float(ctx, src[0]);
1396 result = emit_fsign(ctx, src[0]);
1397 break;
1398 case nir_op_ffloor:
1399 result = emit_intrin_1f_param(ctx, "llvm.floor.f32", src[0]);
1400 break;
1401 case nir_op_ftrunc:
1402 result = emit_intrin_1f_param(ctx, "llvm.trunc.f32", src[0]);
1403 break;
1404 case nir_op_fceil:
1405 result = emit_intrin_1f_param(ctx, "llvm.ceil.f32", src[0]);
1406 break;
1407 case nir_op_fround_even:
1408 result = emit_intrin_1f_param(ctx, "llvm.rint.f32", src[0]);
1409 break;
1410 case nir_op_ffract:
1411 result = emit_ffract(ctx, src[0]);
1412 break;
1413 case nir_op_fsin:
1414 result = emit_intrin_1f_param(ctx, "llvm.sin.f32", src[0]);
1415 break;
1416 case nir_op_fcos:
1417 result = emit_intrin_1f_param(ctx, "llvm.cos.f32", src[0]);
1418 break;
1419 case nir_op_fsqrt:
1420 result = emit_intrin_1f_param(ctx, "llvm.sqrt.f32", src[0]);
1421 break;
1422 case nir_op_fexp2:
1423 result = emit_intrin_1f_param(ctx, "llvm.exp2.f32", src[0]);
1424 break;
1425 case nir_op_flog2:
1426 result = emit_intrin_1f_param(ctx, "llvm.log2.f32", src[0]);
1427 break;
1428 case nir_op_frsq:
1429 result = emit_intrin_1f_param(ctx, "llvm.sqrt.f32", src[0]);
1430 result = emit_fdiv(ctx, ctx->f32one, result);
1431 break;
1432 case nir_op_fpow:
1433 result = emit_intrin_2f_param(ctx, "llvm.pow.f32", src[0], src[1]);
1434 break;
1435 case nir_op_fmax:
1436 result = emit_intrin_2f_param(ctx, "llvm.maxnum.f32", src[0], src[1]);
1437 break;
1438 case nir_op_fmin:
1439 result = emit_intrin_2f_param(ctx, "llvm.minnum.f32", src[0], src[1]);
1440 break;
1441 case nir_op_ffma:
1442 result = emit_intrin_3f_param(ctx, "llvm.fma.f32", src[0], src[1], src[2]);
1443 break;
1444 case nir_op_ibitfield_extract:
1445 result = emit_bitfield_extract(ctx, "llvm.AMDGPU.bfe.i32", src);
1446 break;
1447 case nir_op_ubitfield_extract:
1448 result = emit_bitfield_extract(ctx, "llvm.AMDGPU.bfe.u32", src);
1449 break;
1450 case nir_op_bitfield_insert:
1451 result = emit_bitfield_insert(ctx, src[0], src[1], src[2], src[3]);
1452 break;
1453 case nir_op_bitfield_reverse:
1454 result = emit_llvm_intrinsic(ctx, "llvm.bitreverse.i32", ctx->i32, src, 1, LLVMReadNoneAttribute);
1455 break;
1456 case nir_op_bit_count:
1457 result = emit_llvm_intrinsic(ctx, "llvm.ctpop.i32", ctx->i32, src, 1, LLVMReadNoneAttribute);
1458 break;
1459 case nir_op_vec2:
1460 case nir_op_vec3:
1461 case nir_op_vec4:
1462 for (unsigned i = 0; i < nir_op_infos[instr->op].num_inputs; i++)
1463 src[i] = to_integer(ctx, src[i]);
1464 result = build_gather_values(ctx, src, num_components);
1465 break;
1466 case nir_op_f2i:
1467 src[0] = to_float(ctx, src[0]);
1468 result = LLVMBuildFPToSI(ctx->builder, src[0], ctx->i32, "");
1469 break;
1470 case nir_op_f2u:
1471 src[0] = to_float(ctx, src[0]);
1472 result = LLVMBuildFPToUI(ctx->builder, src[0], ctx->i32, "");
1473 break;
1474 case nir_op_i2f:
1475 result = LLVMBuildSIToFP(ctx->builder, src[0], ctx->f32, "");
1476 break;
1477 case nir_op_u2f:
1478 result = LLVMBuildUIToFP(ctx->builder, src[0], ctx->f32, "");
1479 break;
1480 case nir_op_bcsel:
1481 result = emit_bcsel(ctx, src[0], src[1], src[2]);
1482 break;
1483 case nir_op_find_lsb:
1484 result = emit_find_lsb(ctx, src[0]);
1485 break;
1486 case nir_op_ufind_msb:
1487 result = emit_ufind_msb(ctx, src[0]);
1488 break;
1489 case nir_op_ifind_msb:
1490 result = emit_ifind_msb(ctx, src[0]);
1491 break;
1492 case nir_op_uadd_carry:
1493 result = emit_uint_carry(ctx, "llvm.uadd.with.overflow.i32", src[0], src[1]);
1494 break;
1495 case nir_op_usub_borrow:
1496 result = emit_uint_carry(ctx, "llvm.usub.with.overflow.i32", src[0], src[1]);
1497 break;
1498 case nir_op_b2f:
1499 result = emit_b2f(ctx, src[0]);
1500 break;
1501 case nir_op_fquantize2f16:
1502 src[0] = to_float(ctx, src[0]);
1503 result = LLVMBuildFPTrunc(ctx->builder, src[0], ctx->f16, "");
1504 /* need to convert back up to f32 */
1505 result = LLVMBuildFPExt(ctx->builder, result, ctx->f32, "");
1506 break;
1507 case nir_op_umul_high:
1508 result = emit_umul_high(ctx, src[0], src[1]);
1509 break;
1510 case nir_op_imul_high:
1511 result = emit_imul_high(ctx, src[0], src[1]);
1512 break;
1513 case nir_op_pack_half_2x16:
1514 result = emit_pack_half_2x16(ctx, src[0]);
1515 break;
1516 case nir_op_unpack_half_2x16:
1517 result = emit_unpack_half_2x16(ctx, src[0]);
1518 break;
1519 case nir_op_fddx:
1520 case nir_op_fddy:
1521 case nir_op_fddx_fine:
1522 case nir_op_fddy_fine:
1523 case nir_op_fddx_coarse:
1524 case nir_op_fddy_coarse:
1525 result = emit_ddxy(ctx, instr, src[0]);
1526 break;
1527 default:
1528 fprintf(stderr, "Unknown NIR alu instr: ");
1529 nir_print_instr(&instr->instr, stderr);
1530 fprintf(stderr, "\n");
1531 abort();
1532 }
1533
1534 if (result) {
1535 assert(instr->dest.dest.is_ssa);
1536 result = to_integer(ctx, result);
1537 _mesa_hash_table_insert(ctx->defs, &instr->dest.dest.ssa,
1538 result);
1539 }
1540 }
1541
1542 static void visit_load_const(struct nir_to_llvm_context *ctx,
1543 nir_load_const_instr *instr)
1544 {
1545 LLVMValueRef values[4], value = NULL;
1546 LLVMTypeRef element_type =
1547 LLVMIntTypeInContext(ctx->context, instr->def.bit_size);
1548
1549 for (unsigned i = 0; i < instr->def.num_components; ++i) {
1550 switch (instr->def.bit_size) {
1551 case 32:
1552 values[i] = LLVMConstInt(element_type,
1553 instr->value.u32[i], false);
1554 break;
1555 case 64:
1556 values[i] = LLVMConstInt(element_type,
1557 instr->value.u64[i], false);
1558 break;
1559 default:
1560 fprintf(stderr,
1561 "unsupported nir load_const bit_size: %d\n",
1562 instr->def.bit_size);
1563 abort();
1564 }
1565 }
1566 if (instr->def.num_components > 1) {
1567 value = LLVMConstVector(values, instr->def.num_components);
1568 } else
1569 value = values[0];
1570
1571 _mesa_hash_table_insert(ctx->defs, &instr->def, value);
1572 }
1573
1574 static LLVMValueRef cast_ptr(struct nir_to_llvm_context *ctx, LLVMValueRef ptr,
1575 LLVMTypeRef type)
1576 {
1577 int addr_space = LLVMGetPointerAddressSpace(LLVMTypeOf(ptr));
1578 return LLVMBuildBitCast(ctx->builder, ptr,
1579 LLVMPointerType(type, addr_space), "");
1580 }
1581
1582 static LLVMValueRef
1583 emit_llvm_intrinsic(struct nir_to_llvm_context *ctx, const char *name,
1584 LLVMTypeRef return_type, LLVMValueRef *params,
1585 unsigned param_count, LLVMAttribute attribs)
1586 {
1587 LLVMValueRef function;
1588
1589 function = LLVMGetNamedFunction(ctx->module, name);
1590 if (!function) {
1591 LLVMTypeRef param_types[32], function_type;
1592 unsigned i;
1593
1594 assert(param_count <= 32);
1595
1596 for (i = 0; i < param_count; ++i) {
1597 assert(params[i]);
1598 param_types[i] = LLVMTypeOf(params[i]);
1599 }
1600 function_type =
1601 LLVMFunctionType(return_type, param_types, param_count, 0);
1602 function = LLVMAddFunction(ctx->module, name, function_type);
1603
1604 LLVMSetFunctionCallConv(function, LLVMCCallConv);
1605 LLVMSetLinkage(function, LLVMExternalLinkage);
1606
1607 LLVMAddFunctionAttr(function, attribs | LLVMNoUnwindAttribute);
1608 }
1609 return LLVMBuildCall(ctx->builder, function, params, param_count, "");
1610 }
1611
1612 static LLVMValueRef
1613 get_buffer_size(struct nir_to_llvm_context *ctx, LLVMValueRef descriptor, bool in_elements)
1614 {
1615 LLVMValueRef size =
1616 LLVMBuildExtractElement(ctx->builder, descriptor,
1617 LLVMConstInt(ctx->i32, 2, false), "");
1618
1619 /* VI only */
1620 if (ctx->options->chip_class >= VI && in_elements) {
1621 /* On VI, the descriptor contains the size in bytes,
1622 * but TXQ must return the size in elements.
1623 * The stride is always non-zero for resources using TXQ.
1624 */
1625 LLVMValueRef stride =
1626 LLVMBuildExtractElement(ctx->builder, descriptor,
1627 LLVMConstInt(ctx->i32, 1, false), "");
1628 stride = LLVMBuildLShr(ctx->builder, stride,
1629 LLVMConstInt(ctx->i32, 16, false), "");
1630 stride = LLVMBuildAnd(ctx->builder, stride,
1631 LLVMConstInt(ctx->i32, 0x3fff, false), "");
1632
1633 size = LLVMBuildUDiv(ctx->builder, size, stride, "");
1634 }
1635 return size;
1636 }
1637
1638 /**
1639 * Given the i32 or vNi32 \p type, generate the textual name (e.g. for use with
1640 * intrinsic names).
1641 */
1642 static void build_int_type_name(
1643 LLVMTypeRef type,
1644 char *buf, unsigned bufsize)
1645 {
1646 assert(bufsize >= 6);
1647
1648 if (LLVMGetTypeKind(type) == LLVMVectorTypeKind)
1649 snprintf(buf, bufsize, "v%ui32",
1650 LLVMGetVectorSize(type));
1651 else
1652 strcpy(buf, "i32");
1653 }
1654
1655 static LLVMValueRef radv_lower_gather4_integer(struct nir_to_llvm_context *ctx,
1656 struct ac_tex_info *tinfo,
1657 nir_tex_instr *instr,
1658 const char *intr_name,
1659 unsigned coord_vgpr_index)
1660 {
1661 LLVMValueRef coord = tinfo->args[0];
1662 LLVMValueRef half_texel[2];
1663 int c;
1664
1665 //TODO Rect
1666 {
1667 LLVMValueRef txq_args[10];
1668 int txq_arg_count = 0;
1669 LLVMValueRef size;
1670 bool da = instr->is_array || instr->sampler_dim == GLSL_SAMPLER_DIM_CUBE;
1671 txq_args[txq_arg_count++] = LLVMConstInt(ctx->i32, 0, false);
1672 txq_args[txq_arg_count++] = tinfo->args[1];
1673 txq_args[txq_arg_count++] = LLVMConstInt(ctx->i32, 0xf, 0); /* dmask */
1674 txq_args[txq_arg_count++] = LLVMConstInt(ctx->i32, 0, 0); /* unorm */
1675 txq_args[txq_arg_count++] = LLVMConstInt(ctx->i32, 0, 0); /* r128 */
1676 txq_args[txq_arg_count++] = LLVMConstInt(ctx->i32, da ? 1 : 0, 0);
1677 txq_args[txq_arg_count++] = LLVMConstInt(ctx->i32, 0, 0); /* glc */
1678 txq_args[txq_arg_count++] = LLVMConstInt(ctx->i32, 0, 0); /* slc */
1679 txq_args[txq_arg_count++] = LLVMConstInt(ctx->i32, 0, 0); /* tfe */
1680 txq_args[txq_arg_count++] = LLVMConstInt(ctx->i32, 0, 0); /* lwe */
1681 size = emit_llvm_intrinsic(ctx, "llvm.SI.getresinfo.i32", ctx->v4i32,
1682 txq_args, txq_arg_count,
1683 LLVMReadNoneAttribute);
1684
1685 for (c = 0; c < 2; c++) {
1686 half_texel[c] = LLVMBuildExtractElement(ctx->builder, size,
1687 ctx->i32zero, "");
1688 half_texel[c] = LLVMBuildUIToFP(ctx->builder, half_texel[c], ctx->f32, "");
1689 half_texel[c] = emit_fdiv(ctx, ctx->f32one, half_texel[c]);
1690 half_texel[c] = LLVMBuildFMul(ctx->builder, half_texel[c],
1691 LLVMConstReal(ctx->f32, -0.5), "");
1692 }
1693 }
1694
1695 for (c = 0; c < 2; c++) {
1696 LLVMValueRef tmp;
1697 LLVMValueRef index = LLVMConstInt(ctx->i32, coord_vgpr_index + c, 0);
1698 tmp = LLVMBuildExtractElement(ctx->builder, coord, index, "");
1699 tmp = LLVMBuildBitCast(ctx->builder, tmp, ctx->f32, "");
1700 tmp = LLVMBuildFAdd(ctx->builder, tmp, half_texel[c], "");
1701 tmp = LLVMBuildBitCast(ctx->builder, tmp, ctx->i32, "");
1702 coord = LLVMBuildInsertElement(ctx->builder, coord, tmp, index, "");
1703 }
1704
1705 tinfo->args[0] = coord;
1706 return emit_llvm_intrinsic(ctx, intr_name, tinfo->dst_type, tinfo->args, tinfo->arg_count,
1707 LLVMReadNoneAttribute | LLVMNoUnwindAttribute);
1708
1709 }
1710
1711 static LLVMValueRef build_tex_intrinsic(struct nir_to_llvm_context *ctx,
1712 nir_tex_instr *instr,
1713 struct ac_tex_info *tinfo)
1714 {
1715 const char *name = "llvm.SI.image.sample";
1716 const char *infix = "";
1717 char intr_name[127];
1718 char type[64];
1719 bool is_shadow = instr->is_shadow;
1720 bool has_offset = tinfo->has_offset;
1721 switch (instr->op) {
1722 case nir_texop_txf:
1723 case nir_texop_txf_ms:
1724 case nir_texop_samples_identical:
1725 name = instr->sampler_dim == GLSL_SAMPLER_DIM_MS ? "llvm.SI.image.load" :
1726 instr->sampler_dim == GLSL_SAMPLER_DIM_BUF ? "llvm.SI.vs.load.input" :
1727 "llvm.SI.image.load.mip";
1728 is_shadow = false;
1729 has_offset = false;
1730 break;
1731 case nir_texop_txb:
1732 infix = ".b";
1733 break;
1734 case nir_texop_txl:
1735 infix = ".l";
1736 break;
1737 case nir_texop_txs:
1738 name = "llvm.SI.getresinfo";
1739 break;
1740 case nir_texop_query_levels:
1741 name = "llvm.SI.getresinfo";
1742 break;
1743 case nir_texop_tex:
1744 if (ctx->stage != MESA_SHADER_FRAGMENT)
1745 infix = ".lz";
1746 break;
1747 case nir_texop_txd:
1748 infix = ".d";
1749 break;
1750 case nir_texop_tg4:
1751 name = "llvm.SI.gather4";
1752 infix = ".lz";
1753 break;
1754 case nir_texop_lod:
1755 name = "llvm.SI.getlod";
1756 is_shadow = false;
1757 has_offset = false;
1758 break;
1759 default:
1760 break;
1761 }
1762
1763 build_int_type_name(LLVMTypeOf(tinfo->args[0]), type, sizeof(type));
1764 sprintf(intr_name, "%s%s%s%s.%s", name, is_shadow ? ".c" : "", infix,
1765 has_offset ? ".o" : "", type);
1766
1767 if (instr->op == nir_texop_tg4) {
1768 enum glsl_base_type stype = glsl_get_sampler_result_type(instr->texture->var->type);
1769 if (stype == GLSL_TYPE_UINT || stype == GLSL_TYPE_INT) {
1770 return radv_lower_gather4_integer(ctx, tinfo, instr, intr_name,
1771 (int)has_offset + (int)is_shadow);
1772 }
1773 }
1774 return emit_llvm_intrinsic(ctx, intr_name, tinfo->dst_type, tinfo->args, tinfo->arg_count,
1775 LLVMReadNoneAttribute | LLVMNoUnwindAttribute);
1776
1777 }
1778
1779 static LLVMValueRef visit_vulkan_resource_index(struct nir_to_llvm_context *ctx,
1780 nir_intrinsic_instr *instr)
1781 {
1782 LLVMValueRef index = get_src(ctx, instr->src[0]);
1783 unsigned desc_set = nir_intrinsic_desc_set(instr);
1784 unsigned binding = nir_intrinsic_binding(instr);
1785 LLVMValueRef desc_ptr = ctx->descriptor_sets[desc_set];
1786 struct radv_descriptor_set_layout *layout = ctx->options->layout->set[desc_set].layout;
1787 unsigned base_offset = layout->binding[binding].offset;
1788 LLVMValueRef offset, stride;
1789
1790 if (layout->binding[binding].type == VK_DESCRIPTOR_TYPE_UNIFORM_BUFFER_DYNAMIC ||
1791 layout->binding[binding].type == VK_DESCRIPTOR_TYPE_STORAGE_BUFFER_DYNAMIC) {
1792 desc_ptr = ctx->push_constants;
1793 base_offset = ctx->options->layout->push_constant_size;
1794 base_offset += 16 * layout->binding[binding].dynamic_offset_offset;
1795 stride = LLVMConstInt(ctx->i32, 16, false);
1796 } else
1797 stride = LLVMConstInt(ctx->i32, layout->binding[binding].size, false);
1798
1799 offset = LLVMConstInt(ctx->i32, base_offset, false);
1800 index = LLVMBuildMul(ctx->builder, index, stride, "");
1801 offset = LLVMBuildAdd(ctx->builder, offset, index, "");
1802
1803 LLVMValueRef indices[] = {ctx->i32zero, offset};
1804 desc_ptr = LLVMBuildGEP(ctx->builder, desc_ptr, indices, 2, "");
1805 desc_ptr = cast_ptr(ctx, desc_ptr, ctx->v4i32);
1806 LLVMSetMetadata(desc_ptr, ctx->uniform_md_kind, ctx->empty_md);
1807
1808 return LLVMBuildLoad(ctx->builder, desc_ptr, "");
1809 }
1810
1811 static LLVMValueRef visit_load_push_constant(struct nir_to_llvm_context *ctx,
1812 nir_intrinsic_instr *instr)
1813 {
1814 LLVMValueRef ptr;
1815
1816 LLVMValueRef indices[] = {ctx->i32zero, get_src(ctx, instr->src[0])};
1817 ptr = LLVMBuildGEP(ctx->builder, ctx->push_constants, indices, 2, "");
1818 ptr = cast_ptr(ctx, ptr, get_def_type(ctx, &instr->dest.ssa));
1819
1820 return LLVMBuildLoad(ctx->builder, ptr, "");
1821 }
1822
1823 static LLVMValueRef visit_get_buffer_size(struct nir_to_llvm_context *ctx,
1824 nir_intrinsic_instr *instr)
1825 {
1826 LLVMValueRef desc = get_src(ctx, instr->src[0]);
1827
1828 return get_buffer_size(ctx, desc, false);
1829 }
1830 static void visit_store_ssbo(struct nir_to_llvm_context *ctx,
1831 nir_intrinsic_instr *instr)
1832 {
1833 const char *store_name;
1834 LLVMTypeRef data_type = ctx->f32;
1835 unsigned writemask = nir_intrinsic_write_mask(instr);
1836 LLVMValueRef base_data, base_offset;
1837 LLVMValueRef params[6];
1838
1839 if (ctx->stage == MESA_SHADER_FRAGMENT)
1840 ctx->shader_info->fs.writes_memory = true;
1841
1842 params[1] = get_src(ctx, instr->src[1]);
1843 params[2] = LLVMConstInt(ctx->i32, 0, false); /* vindex */
1844 params[4] = LLVMConstInt(ctx->i1, 0, false); /* glc */
1845 params[5] = LLVMConstInt(ctx->i1, 0, false); /* slc */
1846
1847 if (instr->num_components > 1)
1848 data_type = LLVMVectorType(ctx->f32, instr->num_components);
1849
1850 base_data = to_float(ctx, get_src(ctx, instr->src[0]));
1851 base_data = trim_vector(ctx, base_data, instr->num_components);
1852 base_data = LLVMBuildBitCast(ctx->builder, base_data,
1853 data_type, "");
1854 base_offset = get_src(ctx, instr->src[2]); /* voffset */
1855 while (writemask) {
1856 int start, count;
1857 LLVMValueRef data;
1858 LLVMValueRef offset;
1859 LLVMValueRef tmp;
1860 u_bit_scan_consecutive_range(&writemask, &start, &count);
1861
1862 /* Due to an LLVM limitation, split 3-element writes
1863 * into a 2-element and a 1-element write. */
1864 if (count == 3) {
1865 writemask |= 1 << (start + 2);
1866 count = 2;
1867 }
1868
1869 if (count == 4) {
1870 store_name = "llvm.amdgcn.buffer.store.v4f32";
1871 data = base_data;
1872 } else if (count == 2) {
1873 tmp = LLVMBuildExtractElement(ctx->builder,
1874 base_data, LLVMConstInt(ctx->i32, start, false), "");
1875 data = LLVMBuildInsertElement(ctx->builder, LLVMGetUndef(ctx->v2f32), tmp,
1876 ctx->i32zero, "");
1877
1878 tmp = LLVMBuildExtractElement(ctx->builder,
1879 base_data, LLVMConstInt(ctx->i32, start + 1, false), "");
1880 data = LLVMBuildInsertElement(ctx->builder, data, tmp,
1881 ctx->i32one, "");
1882 store_name = "llvm.amdgcn.buffer.store.v2f32";
1883
1884 } else {
1885 assert(count == 1);
1886 if (get_llvm_num_components(base_data) > 1)
1887 data = LLVMBuildExtractElement(ctx->builder, base_data,
1888 LLVMConstInt(ctx->i32, start, false), "");
1889 else
1890 data = base_data;
1891 store_name = "llvm.amdgcn.buffer.store.f32";
1892 }
1893
1894 offset = base_offset;
1895 if (start != 0) {
1896 offset = LLVMBuildAdd(ctx->builder, offset, LLVMConstInt(ctx->i32, start * 4, false), "");
1897 }
1898 params[0] = data;
1899 params[3] = offset;
1900 emit_llvm_intrinsic(ctx, store_name,
1901 LLVMVoidTypeInContext(ctx->context), params, 6, 0);
1902 }
1903 }
1904
1905 static LLVMValueRef visit_atomic_ssbo(struct nir_to_llvm_context *ctx,
1906 nir_intrinsic_instr *instr)
1907 {
1908 const char *name;
1909 LLVMValueRef params[5];
1910 int arg_count = 0;
1911 if (ctx->stage == MESA_SHADER_FRAGMENT)
1912 ctx->shader_info->fs.writes_memory = true;
1913
1914 if (instr->intrinsic == nir_intrinsic_ssbo_atomic_comp_swap) {
1915 params[arg_count++] = get_src(ctx, instr->src[3]);
1916 }
1917 params[arg_count++] = get_src(ctx, instr->src[2]);
1918 params[arg_count++] = get_src(ctx, instr->src[0]);
1919 params[arg_count++] = LLVMConstInt(ctx->i32, 0, false); /* vindex */
1920 params[arg_count++] = get_src(ctx, instr->src[1]); /* voffset */
1921 params[arg_count++] = LLVMConstInt(ctx->i1, 0, false); /* slc */
1922
1923 switch (instr->intrinsic) {
1924 case nir_intrinsic_ssbo_atomic_add:
1925 name = "llvm.amdgcn.buffer.atomic.add";
1926 break;
1927 case nir_intrinsic_ssbo_atomic_imin:
1928 name = "llvm.amdgcn.buffer.atomic.smin";
1929 break;
1930 case nir_intrinsic_ssbo_atomic_umin:
1931 name = "llvm.amdgcn.buffer.atomic.umin";
1932 break;
1933 case nir_intrinsic_ssbo_atomic_imax:
1934 name = "llvm.amdgcn.buffer.atomic.smax";
1935 break;
1936 case nir_intrinsic_ssbo_atomic_umax:
1937 name = "llvm.amdgcn.buffer.atomic.umax";
1938 break;
1939 case nir_intrinsic_ssbo_atomic_and:
1940 name = "llvm.amdgcn.buffer.atomic.and";
1941 break;
1942 case nir_intrinsic_ssbo_atomic_or:
1943 name = "llvm.amdgcn.buffer.atomic.or";
1944 break;
1945 case nir_intrinsic_ssbo_atomic_xor:
1946 name = "llvm.amdgcn.buffer.atomic.xor";
1947 break;
1948 case nir_intrinsic_ssbo_atomic_exchange:
1949 name = "llvm.amdgcn.buffer.atomic.swap";
1950 break;
1951 case nir_intrinsic_ssbo_atomic_comp_swap:
1952 name = "llvm.amdgcn.buffer.atomic.cmpswap";
1953 break;
1954 default:
1955 abort();
1956 }
1957
1958 return emit_llvm_intrinsic(ctx, name, ctx->i32, params, arg_count, 0);
1959 }
1960
1961 static LLVMValueRef visit_load_buffer(struct nir_to_llvm_context *ctx,
1962 nir_intrinsic_instr *instr)
1963 {
1964 const char *load_name;
1965 LLVMTypeRef data_type = ctx->f32;
1966 if (instr->num_components == 3)
1967 data_type = LLVMVectorType(ctx->f32, 4);
1968 else if (instr->num_components > 1)
1969 data_type = LLVMVectorType(ctx->f32, instr->num_components);
1970
1971 if (instr->num_components == 4 || instr->num_components == 3)
1972 load_name = "llvm.amdgcn.buffer.load.v4f32";
1973 else if (instr->num_components == 2)
1974 load_name = "llvm.amdgcn.buffer.load.v2f32";
1975 else if (instr->num_components == 1)
1976 load_name = "llvm.amdgcn.buffer.load.f32";
1977 else
1978 abort();
1979
1980 LLVMValueRef params[] = {
1981 get_src(ctx, instr->src[0]),
1982 LLVMConstInt(ctx->i32, 0, false),
1983 get_src(ctx, instr->src[1]),
1984 LLVMConstInt(ctx->i1, 0, false),
1985 LLVMConstInt(ctx->i1, 0, false),
1986 };
1987
1988 LLVMValueRef ret =
1989 emit_llvm_intrinsic(ctx, load_name, data_type, params, 5, 0);
1990
1991 if (instr->num_components == 3)
1992 ret = trim_vector(ctx, ret, 3);
1993
1994 return LLVMBuildBitCast(ctx->builder, ret,
1995 get_def_type(ctx, &instr->dest.ssa), "");
1996 }
1997
1998 static void
1999 radv_get_deref_offset(struct nir_to_llvm_context *ctx, nir_deref *tail,
2000 bool vs_in, unsigned *const_out, LLVMValueRef *indir_out)
2001 {
2002 unsigned const_offset = 0;
2003 LLVMValueRef offset = NULL;
2004
2005
2006 while (tail->child != NULL) {
2007 const struct glsl_type *parent_type = tail->type;
2008 tail = tail->child;
2009
2010 if (tail->deref_type == nir_deref_type_array) {
2011 nir_deref_array *deref_array = nir_deref_as_array(tail);
2012 LLVMValueRef index, stride, local_offset;
2013 unsigned size = glsl_count_attribute_slots(tail->type, vs_in);
2014
2015 const_offset += size * deref_array->base_offset;
2016 if (deref_array->deref_array_type == nir_deref_array_type_direct)
2017 continue;
2018
2019 assert(deref_array->deref_array_type == nir_deref_array_type_indirect);
2020 index = get_src(ctx, deref_array->indirect);
2021 stride = LLVMConstInt(ctx->i32, size, 0);
2022 local_offset = LLVMBuildMul(ctx->builder, stride, index, "");
2023
2024 if (offset)
2025 offset = LLVMBuildAdd(ctx->builder, offset, local_offset, "");
2026 else
2027 offset = local_offset;
2028 } else if (tail->deref_type == nir_deref_type_struct) {
2029 nir_deref_struct *deref_struct = nir_deref_as_struct(tail);
2030
2031 for (unsigned i = 0; i < deref_struct->index; i++) {
2032 const struct glsl_type *ft = glsl_get_struct_field(parent_type, i);
2033 const_offset += glsl_count_attribute_slots(ft, vs_in);
2034 }
2035 } else
2036 unreachable("unsupported deref type");
2037
2038 }
2039
2040 if (const_offset && offset)
2041 offset = LLVMBuildAdd(ctx->builder, offset,
2042 LLVMConstInt(ctx->i32, const_offset, 0),
2043 "");
2044
2045 *const_out = const_offset;
2046 *indir_out = offset;
2047 }
2048
2049 static LLVMValueRef visit_load_var(struct nir_to_llvm_context *ctx,
2050 nir_intrinsic_instr *instr)
2051 {
2052 LLVMValueRef values[4];
2053 int idx = instr->variables[0]->var->data.driver_location;
2054 int ve = instr->dest.ssa.num_components;
2055 LLVMValueRef indir_index;
2056 unsigned const_index;
2057 switch (instr->variables[0]->var->data.mode) {
2058 case nir_var_shader_in:
2059 radv_get_deref_offset(ctx, &instr->variables[0]->deref,
2060 ctx->stage == MESA_SHADER_VERTEX,
2061 &const_index, &indir_index);
2062 for (unsigned chan = 0; chan < ve; chan++) {
2063 if (indir_index) {
2064 unsigned count = glsl_count_attribute_slots(
2065 instr->variables[0]->var->type,
2066 ctx->stage == MESA_SHADER_VERTEX);
2067 LLVMValueRef tmp_vec = build_gather_values_extended(
2068 ctx, ctx->inputs + idx + chan, count,
2069 4, false);
2070
2071 values[chan] = LLVMBuildExtractElement(ctx->builder,
2072 tmp_vec,
2073 indir_index, "");
2074 } else
2075 values[chan] = ctx->inputs[idx + chan + const_index * 4];
2076 }
2077 return to_integer(ctx, build_gather_values(ctx, values, ve));
2078 break;
2079 case nir_var_local:
2080 radv_get_deref_offset(ctx, &instr->variables[0]->deref, false,
2081 &const_index, &indir_index);
2082 for (unsigned chan = 0; chan < ve; chan++) {
2083 if (indir_index) {
2084 unsigned count = glsl_count_attribute_slots(
2085 instr->variables[0]->var->type, false);
2086 LLVMValueRef tmp_vec = build_gather_values_extended(
2087 ctx, ctx->locals + idx + chan, count,
2088 4, true);
2089
2090 values[chan] = LLVMBuildExtractElement(ctx->builder,
2091 tmp_vec,
2092 indir_index, "");
2093 } else {
2094 values[chan] = LLVMBuildLoad(ctx->builder, ctx->locals[idx + chan + const_index * 4], "");
2095 }
2096 }
2097 return to_integer(ctx, build_gather_values(ctx, values, ve));
2098 case nir_var_shader_out:
2099 radv_get_deref_offset(ctx, &instr->variables[0]->deref, false,
2100 &const_index, &indir_index);
2101 for (unsigned chan = 0; chan < ve; chan++) {
2102 if (indir_index) {
2103 unsigned count = glsl_count_attribute_slots(
2104 instr->variables[0]->var->type, false);
2105 LLVMValueRef tmp_vec = build_gather_values_extended(
2106 ctx, ctx->outputs + idx + chan, count,
2107 4, true);
2108
2109 values[chan] = LLVMBuildExtractElement(ctx->builder,
2110 tmp_vec,
2111 indir_index, "");
2112 } else {
2113 values[chan] = LLVMBuildLoad(ctx->builder,
2114 ctx->outputs[idx + chan + const_index * 4],
2115 "");
2116 }
2117 }
2118 return to_integer(ctx, build_gather_values(ctx, values, ve));
2119 case nir_var_shared: {
2120 radv_get_deref_offset(ctx, &instr->variables[0]->deref, false,
2121 &const_index, &indir_index);
2122 LLVMValueRef ptr = get_shared_memory_ptr(ctx, idx, ctx->i32);
2123 LLVMValueRef derived_ptr;
2124 LLVMValueRef index = ctx->i32zero;
2125 if (indir_index)
2126 index = LLVMBuildAdd(ctx->builder, index, indir_index, "");
2127 derived_ptr = LLVMBuildGEP(ctx->builder, ptr, &index, 1, "");
2128
2129 return to_integer(ctx, LLVMBuildLoad(ctx->builder, derived_ptr, ""));
2130 break;
2131 }
2132 default:
2133 break;
2134 }
2135 return NULL;
2136 }
2137
2138 static void
2139 visit_store_var(struct nir_to_llvm_context *ctx,
2140 nir_intrinsic_instr *instr)
2141 {
2142 LLVMValueRef temp_ptr, value;
2143 int idx = instr->variables[0]->var->data.driver_location;
2144 LLVMValueRef src = to_float(ctx, get_src(ctx, instr->src[0]));
2145 int writemask = instr->const_index[0];
2146 LLVMValueRef indir_index;
2147 unsigned const_index;
2148 switch (instr->variables[0]->var->data.mode) {
2149 case nir_var_shader_out:
2150 radv_get_deref_offset(ctx, &instr->variables[0]->deref, false,
2151 &const_index, &indir_index);
2152 for (unsigned chan = 0; chan < 4; chan++) {
2153 int stride = 4;
2154 if (!(writemask & (1 << chan)))
2155 continue;
2156 if (get_llvm_num_components(src) == 1)
2157 value = src;
2158 else
2159 value = LLVMBuildExtractElement(ctx->builder, src,
2160 LLVMConstInt(ctx->i32,
2161 chan, false),
2162 "");
2163
2164 if (instr->variables[0]->var->data.location == VARYING_SLOT_CLIP_DIST0 ||
2165 instr->variables[0]->var->data.location == VARYING_SLOT_CULL_DIST0)
2166 stride = 1;
2167 if (indir_index) {
2168 unsigned count = glsl_count_attribute_slots(
2169 instr->variables[0]->var->type, false);
2170 LLVMValueRef tmp_vec = build_gather_values_extended(
2171 ctx, ctx->outputs + idx + chan, count,
2172 stride, true);
2173
2174 if (get_llvm_num_components(tmp_vec) > 1) {
2175 tmp_vec = LLVMBuildInsertElement(ctx->builder, tmp_vec,
2176 value, indir_index, "");
2177 } else
2178 tmp_vec = value;
2179 build_store_values_extended(ctx, ctx->outputs + idx + chan,
2180 count, stride, tmp_vec);
2181
2182 } else {
2183 temp_ptr = ctx->outputs[idx + chan + const_index * stride];
2184
2185 LLVMBuildStore(ctx->builder, value, temp_ptr);
2186 }
2187 }
2188 break;
2189 case nir_var_local:
2190 radv_get_deref_offset(ctx, &instr->variables[0]->deref, false,
2191 &const_index, &indir_index);
2192 for (unsigned chan = 0; chan < 4; chan++) {
2193 if (!(writemask & (1 << chan)))
2194 continue;
2195
2196 if (get_llvm_num_components(src) == 1)
2197 value = src;
2198 else
2199 value = LLVMBuildExtractElement(ctx->builder, src,
2200 LLVMConstInt(ctx->i32, chan, false), "");
2201 if (indir_index) {
2202 unsigned count = glsl_count_attribute_slots(
2203 instr->variables[0]->var->type, false);
2204 LLVMValueRef tmp_vec = build_gather_values_extended(
2205 ctx, ctx->locals + idx + chan, count,
2206 4, true);
2207
2208 tmp_vec = LLVMBuildInsertElement(ctx->builder, tmp_vec,
2209 value, indir_index, "");
2210 build_store_values_extended(ctx, ctx->locals + idx + chan,
2211 count, 4, tmp_vec);
2212 } else {
2213 temp_ptr = ctx->locals[idx + chan + const_index * 4];
2214
2215 LLVMBuildStore(ctx->builder, value, temp_ptr);
2216 }
2217 }
2218 break;
2219 case nir_var_shared: {
2220 LLVMValueRef ptr;
2221 radv_get_deref_offset(ctx, &instr->variables[0]->deref, false,
2222 &const_index, &indir_index);
2223
2224 ptr = get_shared_memory_ptr(ctx, idx, ctx->i32);
2225 LLVMValueRef index = ctx->i32zero;
2226 LLVMValueRef derived_ptr;
2227
2228 if (indir_index)
2229 index = LLVMBuildAdd(ctx->builder, index, indir_index, "");
2230 derived_ptr = LLVMBuildGEP(ctx->builder, ptr, &index, 1, "");
2231 LLVMBuildStore(ctx->builder,
2232 to_integer(ctx, src), derived_ptr);
2233 break;
2234 }
2235 default:
2236 break;
2237 }
2238 }
2239
2240 static int image_type_to_components_count(enum glsl_sampler_dim dim, bool array)
2241 {
2242 switch (dim) {
2243 case GLSL_SAMPLER_DIM_BUF:
2244 return 1;
2245 case GLSL_SAMPLER_DIM_1D:
2246 return array ? 2 : 1;
2247 case GLSL_SAMPLER_DIM_2D:
2248 return array ? 3 : 2;
2249 case GLSL_SAMPLER_DIM_3D:
2250 case GLSL_SAMPLER_DIM_CUBE:
2251 return 3;
2252 case GLSL_SAMPLER_DIM_RECT:
2253 case GLSL_SAMPLER_DIM_SUBPASS:
2254 return 2;
2255 default:
2256 break;
2257 }
2258 return 0;
2259 }
2260
2261 static LLVMValueRef get_image_coords(struct nir_to_llvm_context *ctx,
2262 nir_intrinsic_instr *instr, bool add_frag_pos)
2263 {
2264 const struct glsl_type *type = instr->variables[0]->var->type;
2265 if(instr->variables[0]->deref.child)
2266 type = instr->variables[0]->deref.child->type;
2267
2268 LLVMValueRef src0 = get_src(ctx, instr->src[0]);
2269 LLVMValueRef coords[4];
2270 LLVMValueRef masks[] = {
2271 LLVMConstInt(ctx->i32, 0, false), LLVMConstInt(ctx->i32, 1, false),
2272 LLVMConstInt(ctx->i32, 2, false), LLVMConstInt(ctx->i32, 3, false),
2273 };
2274 LLVMValueRef res;
2275 int count;
2276 count = image_type_to_components_count(glsl_get_sampler_dim(type),
2277 glsl_sampler_type_is_array(type));
2278
2279 if (count == 1) {
2280 if (instr->src[0].ssa->num_components)
2281 res = LLVMBuildExtractElement(ctx->builder, src0, masks[0], "");
2282 else
2283 res = src0;
2284 } else {
2285 int chan;
2286 for (chan = 0; chan < count; ++chan) {
2287 coords[chan] = LLVMBuildExtractElement(ctx->builder, src0, masks[chan], "");
2288 }
2289
2290 if (add_frag_pos) {
2291 for (chan = 0; chan < count; ++chan)
2292 coords[chan] = LLVMBuildAdd(ctx->builder, coords[chan], LLVMBuildFPToUI(ctx->builder, ctx->frag_pos[chan], ctx->i32, ""), "");
2293 }
2294 if (count == 3) {
2295 coords[3] = LLVMGetUndef(ctx->i32);
2296 count = 4;
2297 }
2298 res = build_gather_values(ctx, coords, count);
2299 }
2300 return res;
2301 }
2302
2303 static void build_type_name_for_intr(
2304 LLVMTypeRef type,
2305 char *buf, unsigned bufsize)
2306 {
2307 LLVMTypeRef elem_type = type;
2308
2309 assert(bufsize >= 8);
2310
2311 if (LLVMGetTypeKind(type) == LLVMVectorTypeKind) {
2312 int ret = snprintf(buf, bufsize, "v%u",
2313 LLVMGetVectorSize(type));
2314 if (ret < 0) {
2315 char *type_name = LLVMPrintTypeToString(type);
2316 fprintf(stderr, "Error building type name for: %s\n",
2317 type_name);
2318 return;
2319 }
2320 elem_type = LLVMGetElementType(type);
2321 buf += ret;
2322 bufsize -= ret;
2323 }
2324 switch (LLVMGetTypeKind(elem_type)) {
2325 default: break;
2326 case LLVMIntegerTypeKind:
2327 snprintf(buf, bufsize, "i%d", LLVMGetIntTypeWidth(elem_type));
2328 break;
2329 case LLVMFloatTypeKind:
2330 snprintf(buf, bufsize, "f32");
2331 break;
2332 case LLVMDoubleTypeKind:
2333 snprintf(buf, bufsize, "f64");
2334 break;
2335 }
2336 }
2337
2338 static void get_image_intr_name(const char *base_name,
2339 LLVMTypeRef data_type,
2340 LLVMTypeRef coords_type,
2341 LLVMTypeRef rsrc_type,
2342 char *out_name, unsigned out_len)
2343 {
2344 char coords_type_name[8];
2345
2346 build_type_name_for_intr(coords_type, coords_type_name,
2347 sizeof(coords_type_name));
2348
2349 if (HAVE_LLVM <= 0x0309) {
2350 snprintf(out_name, out_len, "%s.%s", base_name, coords_type_name);
2351 } else {
2352 char data_type_name[8];
2353 char rsrc_type_name[8];
2354
2355 build_type_name_for_intr(data_type, data_type_name,
2356 sizeof(data_type_name));
2357 build_type_name_for_intr(rsrc_type, rsrc_type_name,
2358 sizeof(rsrc_type_name));
2359 snprintf(out_name, out_len, "%s.%s.%s.%s", base_name,
2360 data_type_name, coords_type_name, rsrc_type_name);
2361 }
2362 }
2363
2364 static LLVMValueRef visit_image_load(struct nir_to_llvm_context *ctx,
2365 nir_intrinsic_instr *instr)
2366 {
2367 LLVMValueRef params[7];
2368 LLVMValueRef res;
2369 char intrinsic_name[64];
2370 const nir_variable *var = instr->variables[0]->var;
2371 const struct glsl_type *type = var->type;
2372 if(instr->variables[0]->deref.child)
2373 type = instr->variables[0]->deref.child->type;
2374
2375 type = glsl_without_array(type);
2376 if (glsl_get_sampler_dim(type) == GLSL_SAMPLER_DIM_BUF) {
2377 params[0] = get_sampler_desc(ctx, instr->variables[0], DESC_BUFFER);
2378 params[1] = LLVMBuildExtractElement(ctx->builder, get_src(ctx, instr->src[0]),
2379 LLVMConstInt(ctx->i32, 0, false), ""); /* vindex */
2380 params[2] = LLVMConstInt(ctx->i32, 0, false); /* voffset */
2381 params[3] = LLVMConstInt(ctx->i1, 0, false); /* glc */
2382 params[4] = LLVMConstInt(ctx->i1, 0, false); /* slc */
2383 res = emit_llvm_intrinsic(ctx, "llvm.amdgcn.buffer.load.format.v4f32", ctx->v4f32,
2384 params, 5, 0);
2385
2386 res = trim_vector(ctx, res, instr->dest.ssa.num_components);
2387 res = to_integer(ctx, res);
2388 } else {
2389 bool is_da = glsl_sampler_type_is_array(type) ||
2390 glsl_get_sampler_dim(type) == GLSL_SAMPLER_DIM_CUBE;
2391 bool add_frag_pos = glsl_get_sampler_dim(type) == GLSL_SAMPLER_DIM_SUBPASS;
2392 LLVMValueRef da = is_da ? ctx->i32one : ctx->i32zero;
2393 LLVMValueRef glc = LLVMConstInt(ctx->i1, 0, false);
2394 LLVMValueRef slc = LLVMConstInt(ctx->i1, 0, false);
2395
2396 params[0] = get_image_coords(ctx, instr, add_frag_pos);
2397 params[1] = get_sampler_desc(ctx, instr->variables[0], DESC_IMAGE);
2398 params[2] = LLVMConstInt(ctx->i32, 15, false); /* dmask */
2399 if (HAVE_LLVM <= 0x0309) {
2400 params[3] = LLVMConstInt(ctx->i1, 0, false); /* r128 */
2401 params[4] = da;
2402 params[5] = glc;
2403 params[6] = slc;
2404 } else {
2405 LLVMValueRef lwe = LLVMConstInt(ctx->i1, 0, false);
2406 params[3] = glc;
2407 params[4] = slc;
2408 params[5] = lwe;
2409 params[6] = da;
2410 }
2411
2412 get_image_intr_name("llvm.amdgcn.image.load",
2413 ctx->v4f32, /* vdata */
2414 LLVMTypeOf(params[0]), /* coords */
2415 LLVMTypeOf(params[1]), /* rsrc */
2416 intrinsic_name, sizeof(intrinsic_name));
2417
2418 res = emit_llvm_intrinsic(ctx, intrinsic_name, ctx->v4f32,
2419 params, 7, LLVMReadOnlyAttribute);
2420 }
2421 return to_integer(ctx, res);
2422 }
2423
2424 static void visit_image_store(struct nir_to_llvm_context *ctx,
2425 nir_intrinsic_instr *instr)
2426 {
2427 LLVMValueRef params[8];
2428 char intrinsic_name[64];
2429 const nir_variable *var = instr->variables[0]->var;
2430 LLVMValueRef i1false = LLVMConstInt(ctx->i1, 0, 0);
2431 LLVMValueRef i1true = LLVMConstInt(ctx->i1, 1, 0);
2432 const struct glsl_type *type = glsl_without_array(var->type);
2433
2434 if (ctx->stage == MESA_SHADER_FRAGMENT)
2435 ctx->shader_info->fs.writes_memory = true;
2436
2437 if (glsl_get_sampler_dim(type) == GLSL_SAMPLER_DIM_BUF) {
2438 params[0] = to_float(ctx, get_src(ctx, instr->src[2])); /* data */
2439 params[1] = get_sampler_desc(ctx, instr->variables[0], DESC_BUFFER);
2440 params[2] = LLVMBuildExtractElement(ctx->builder, get_src(ctx, instr->src[0]),
2441 LLVMConstInt(ctx->i32, 0, false), ""); /* vindex */
2442 params[3] = LLVMConstInt(ctx->i32, 0, false); /* voffset */
2443 params[4] = i1false; /* glc */
2444 params[5] = i1false; /* slc */
2445 emit_llvm_intrinsic(ctx, "llvm.amdgcn.buffer.store.format.v4f32", ctx->voidt,
2446 params, 6, 0);
2447 } else {
2448 bool is_da = glsl_sampler_type_is_array(type) ||
2449 glsl_get_sampler_dim(type) == GLSL_SAMPLER_DIM_CUBE;
2450 LLVMValueRef da = is_da ? i1true : i1false;
2451 LLVMValueRef glc = i1false;
2452 LLVMValueRef slc = i1false;
2453
2454 params[0] = to_float(ctx, get_src(ctx, instr->src[2]));
2455 params[1] = get_image_coords(ctx, instr, false); /* coords */
2456 params[2] = get_sampler_desc(ctx, instr->variables[0], DESC_IMAGE);
2457 params[3] = LLVMConstInt(ctx->i32, 15, false); /* dmask */
2458 if (HAVE_LLVM <= 0x0309) {
2459 params[4] = i1false; /* r128 */
2460 params[5] = da;
2461 params[6] = glc;
2462 params[7] = slc;
2463 } else {
2464 LLVMValueRef lwe = i1false;
2465 params[4] = glc;
2466 params[5] = slc;
2467 params[6] = lwe;
2468 params[7] = da;
2469 }
2470
2471 get_image_intr_name("llvm.amdgcn.image.store",
2472 LLVMTypeOf(params[0]), /* vdata */
2473 LLVMTypeOf(params[1]), /* coords */
2474 LLVMTypeOf(params[2]), /* rsrc */
2475 intrinsic_name, sizeof(intrinsic_name));
2476
2477 emit_llvm_intrinsic(ctx, intrinsic_name, ctx->voidt,
2478 params, 8, 0);
2479 }
2480
2481 }
2482
2483 static LLVMValueRef visit_image_atomic(struct nir_to_llvm_context *ctx,
2484 nir_intrinsic_instr *instr)
2485 {
2486 LLVMValueRef params[6];
2487 int param_count = 0;
2488 const nir_variable *var = instr->variables[0]->var;
2489 LLVMValueRef i1false = LLVMConstInt(ctx->i1, 0, 0);
2490 LLVMValueRef i1true = LLVMConstInt(ctx->i1, 1, 0);
2491 const char *base_name = "llvm.amdgcn.image.atomic";
2492 const char *atomic_name;
2493 LLVMValueRef coords;
2494 char intrinsic_name[32], coords_type[8];
2495 const struct glsl_type *type = glsl_without_array(var->type);
2496
2497 if (ctx->stage == MESA_SHADER_FRAGMENT)
2498 ctx->shader_info->fs.writes_memory = true;
2499
2500 params[param_count++] = get_src(ctx, instr->src[2]);
2501 if (instr->intrinsic == nir_intrinsic_image_atomic_comp_swap)
2502 params[param_count++] = get_src(ctx, instr->src[3]);
2503
2504 if (glsl_get_sampler_dim(type) == GLSL_SAMPLER_DIM_BUF) {
2505 params[param_count++] = get_sampler_desc(ctx, instr->variables[0], DESC_BUFFER);
2506 coords = params[param_count++] = LLVMBuildExtractElement(ctx->builder, get_src(ctx, instr->src[0]),
2507 LLVMConstInt(ctx->i32, 0, false), ""); /* vindex */
2508 params[param_count++] = ctx->i32zero; /* voffset */
2509 params[param_count++] = i1false; /* glc */
2510 params[param_count++] = i1false; /* slc */
2511 } else {
2512 bool da = glsl_sampler_type_is_array(type) ||
2513 glsl_get_sampler_dim(type) == GLSL_SAMPLER_DIM_CUBE;
2514
2515 coords = params[param_count++] = get_image_coords(ctx, instr, false);
2516 params[param_count++] = get_sampler_desc(ctx, instr->variables[0], DESC_IMAGE);
2517 params[param_count++] = i1false; /* r128 */
2518 params[param_count++] = da ? i1true : i1false; /* da */
2519 params[param_count++] = i1false; /* slc */
2520 }
2521
2522 switch (instr->intrinsic) {
2523 case nir_intrinsic_image_atomic_add:
2524 atomic_name = "add";
2525 break;
2526 case nir_intrinsic_image_atomic_min:
2527 atomic_name = "smin";
2528 break;
2529 case nir_intrinsic_image_atomic_max:
2530 atomic_name = "smax";
2531 break;
2532 case nir_intrinsic_image_atomic_and:
2533 atomic_name = "and";
2534 break;
2535 case nir_intrinsic_image_atomic_or:
2536 atomic_name = "or";
2537 break;
2538 case nir_intrinsic_image_atomic_xor:
2539 atomic_name = "xor";
2540 break;
2541 case nir_intrinsic_image_atomic_exchange:
2542 atomic_name = "swap";
2543 break;
2544 case nir_intrinsic_image_atomic_comp_swap:
2545 atomic_name = "cmpswap";
2546 break;
2547 default:
2548 abort();
2549 }
2550 build_int_type_name(LLVMTypeOf(coords),
2551 coords_type, sizeof(coords_type));
2552
2553 snprintf(intrinsic_name, sizeof(intrinsic_name),
2554 "%s.%s.%s", base_name, atomic_name, coords_type);
2555 return emit_llvm_intrinsic(ctx, intrinsic_name, ctx->i32, params, param_count, 0);
2556 }
2557
2558 static LLVMValueRef visit_image_size(struct nir_to_llvm_context *ctx,
2559 nir_intrinsic_instr *instr)
2560 {
2561 LLVMValueRef res;
2562 LLVMValueRef params[10];
2563 const nir_variable *var = instr->variables[0]->var;
2564 const struct glsl_type *type = instr->variables[0]->var->type;
2565 bool da = glsl_sampler_type_is_array(var->type) ||
2566 glsl_get_sampler_dim(var->type) == GLSL_SAMPLER_DIM_CUBE;
2567 if(instr->variables[0]->deref.child)
2568 type = instr->variables[0]->deref.child->type;
2569
2570 if (glsl_get_sampler_dim(type) == GLSL_SAMPLER_DIM_BUF)
2571 return get_buffer_size(ctx, get_sampler_desc(ctx, instr->variables[0], DESC_BUFFER), true);
2572 params[0] = ctx->i32zero;
2573 params[1] = get_sampler_desc(ctx, instr->variables[0], DESC_IMAGE);
2574 params[2] = LLVMConstInt(ctx->i32, 15, false);
2575 params[3] = ctx->i32zero;
2576 params[4] = ctx->i32zero;
2577 params[5] = da ? ctx->i32one : ctx->i32zero;
2578 params[6] = ctx->i32zero;
2579 params[7] = ctx->i32zero;
2580 params[8] = ctx->i32zero;
2581 params[9] = ctx->i32zero;
2582
2583 res = emit_llvm_intrinsic(ctx, "llvm.SI.getresinfo.i32", ctx->v4i32,
2584 params, 10, LLVMReadNoneAttribute);
2585
2586 if (glsl_get_sampler_dim(type) == GLSL_SAMPLER_DIM_CUBE &&
2587 glsl_sampler_type_is_array(type)) {
2588 LLVMValueRef two = LLVMConstInt(ctx->i32, 2, false);
2589 LLVMValueRef six = LLVMConstInt(ctx->i32, 6, false);
2590 LLVMValueRef z = LLVMBuildExtractElement(ctx->builder, res, two, "");
2591 z = LLVMBuildSDiv(ctx->builder, z, six, "");
2592 res = LLVMBuildInsertElement(ctx->builder, res, z, two, "");
2593 }
2594 return res;
2595 }
2596
2597 static void emit_waitcnt(struct nir_to_llvm_context *ctx)
2598 {
2599 LLVMValueRef args[1] = {
2600 LLVMConstInt(ctx->i32, 0xf70, false),
2601 };
2602 emit_llvm_intrinsic(ctx, "llvm.amdgcn.s.waitcnt",
2603 ctx->voidt, args, 1, 0);
2604 }
2605
2606 static void emit_barrier(struct nir_to_llvm_context *ctx)
2607 {
2608 // TODO tess
2609 emit_llvm_intrinsic(ctx, "llvm.amdgcn.s.barrier",
2610 ctx->voidt, NULL, 0, 0);
2611 }
2612
2613 static void emit_discard_if(struct nir_to_llvm_context *ctx,
2614 nir_intrinsic_instr *instr)
2615 {
2616 LLVMValueRef cond;
2617 ctx->shader_info->fs.can_discard = true;
2618
2619 cond = LLVMBuildICmp(ctx->builder, LLVMIntNE,
2620 get_src(ctx, instr->src[0]),
2621 ctx->i32zero, "");
2622
2623 cond = LLVMBuildSelect(ctx->builder, cond,
2624 LLVMConstReal(ctx->f32, -1.0f),
2625 ctx->f32zero, "");
2626 emit_llvm_intrinsic(ctx, "llvm.AMDGPU.kill",
2627 LLVMVoidTypeInContext(ctx->context),
2628 &cond, 1, 0);
2629 }
2630
2631 static LLVMValueRef
2632 visit_load_local_invocation_index(struct nir_to_llvm_context *ctx)
2633 {
2634 LLVMValueRef result;
2635 LLVMValueRef thread_id = get_thread_id(ctx);
2636 result = LLVMBuildAnd(ctx->builder, ctx->tg_size,
2637 LLVMConstInt(ctx->i32, 0xfc0, false), "");
2638
2639 return LLVMBuildAdd(ctx->builder, result, thread_id, "");
2640 }
2641
2642 static LLVMValueRef visit_var_atomic(struct nir_to_llvm_context *ctx,
2643 nir_intrinsic_instr *instr)
2644 {
2645 LLVMValueRef ptr, result;
2646 int idx = instr->variables[0]->var->data.driver_location;
2647 LLVMValueRef src = get_src(ctx, instr->src[0]);
2648 ptr = get_shared_memory_ptr(ctx, idx, ctx->i32);
2649
2650 if (instr->intrinsic == nir_intrinsic_var_atomic_comp_swap) {
2651 LLVMValueRef src1 = get_src(ctx, instr->src[1]);
2652 result = LLVMBuildAtomicCmpXchg(ctx->builder,
2653 ptr, src, src1,
2654 LLVMAtomicOrderingSequentiallyConsistent,
2655 LLVMAtomicOrderingSequentiallyConsistent,
2656 false);
2657 } else {
2658 LLVMAtomicRMWBinOp op;
2659 switch (instr->intrinsic) {
2660 case nir_intrinsic_var_atomic_add:
2661 op = LLVMAtomicRMWBinOpAdd;
2662 break;
2663 case nir_intrinsic_var_atomic_umin:
2664 op = LLVMAtomicRMWBinOpUMin;
2665 break;
2666 case nir_intrinsic_var_atomic_umax:
2667 op = LLVMAtomicRMWBinOpUMax;
2668 break;
2669 case nir_intrinsic_var_atomic_imin:
2670 op = LLVMAtomicRMWBinOpMin;
2671 break;
2672 case nir_intrinsic_var_atomic_imax:
2673 op = LLVMAtomicRMWBinOpMax;
2674 break;
2675 case nir_intrinsic_var_atomic_and:
2676 op = LLVMAtomicRMWBinOpAnd;
2677 break;
2678 case nir_intrinsic_var_atomic_or:
2679 op = LLVMAtomicRMWBinOpOr;
2680 break;
2681 case nir_intrinsic_var_atomic_xor:
2682 op = LLVMAtomicRMWBinOpXor;
2683 break;
2684 case nir_intrinsic_var_atomic_exchange:
2685 op = LLVMAtomicRMWBinOpXchg;
2686 break;
2687 default:
2688 return NULL;
2689 }
2690
2691 result = LLVMBuildAtomicRMW(ctx->builder, op, ptr, to_integer(ctx, src),
2692 LLVMAtomicOrderingSequentiallyConsistent,
2693 false);
2694 }
2695 return result;
2696 }
2697
2698 #define INTERP_CENTER 0
2699 #define INTERP_CENTROID 1
2700 #define INTERP_SAMPLE 2
2701
2702 static LLVMValueRef lookup_interp_param(struct nir_to_llvm_context *ctx,
2703 enum glsl_interp_mode interp, unsigned location)
2704 {
2705 switch (interp) {
2706 case INTERP_MODE_FLAT:
2707 default:
2708 return NULL;
2709 case INTERP_MODE_SMOOTH:
2710 case INTERP_MODE_NONE:
2711 if (location == INTERP_CENTER)
2712 return ctx->persp_center;
2713 else if (location == INTERP_CENTROID)
2714 return ctx->persp_centroid;
2715 else if (location == INTERP_SAMPLE)
2716 return ctx->persp_sample;
2717 break;
2718 case INTERP_MODE_NOPERSPECTIVE:
2719 if (location == INTERP_CENTER)
2720 return ctx->linear_center;
2721 else if (location == INTERP_CENTROID)
2722 return ctx->linear_centroid;
2723 else if (location == INTERP_SAMPLE)
2724 return ctx->linear_sample;
2725 break;
2726 }
2727 return NULL;
2728 }
2729
2730 static LLVMValueRef load_sample_position(struct nir_to_llvm_context *ctx,
2731 LLVMValueRef sample_id)
2732 {
2733 /* offset = sample_id * 8 (8 = 2 floats containing samplepos.xy) */
2734 LLVMValueRef offset0 = LLVMBuildMul(ctx->builder, sample_id, LLVMConstInt(ctx->i32, 8, false), "");
2735 LLVMValueRef offset1 = LLVMBuildAdd(ctx->builder, offset0, LLVMConstInt(ctx->i32, 4, false), "");
2736 LLVMValueRef result[2];
2737
2738 result[0] = build_indexed_load_const(ctx, ctx->sample_positions, offset0);
2739 result[1] = build_indexed_load_const(ctx, ctx->sample_positions, offset1);
2740
2741 return build_gather_values(ctx, result, 2);
2742 }
2743
2744 static LLVMValueRef visit_interp(struct nir_to_llvm_context *ctx,
2745 nir_intrinsic_instr *instr)
2746 {
2747 LLVMValueRef result[2];
2748 LLVMValueRef interp_param, attr_number;
2749 unsigned location;
2750 unsigned chan;
2751 LLVMValueRef src_c0, src_c1;
2752 const char *intr_name;
2753 LLVMValueRef src0;
2754 int input_index = instr->variables[0]->var->data.location - VARYING_SLOT_VAR0;
2755 switch (instr->intrinsic) {
2756 case nir_intrinsic_interp_var_at_centroid:
2757 location = INTERP_CENTROID;
2758 break;
2759 case nir_intrinsic_interp_var_at_sample:
2760 case nir_intrinsic_interp_var_at_offset:
2761 location = INTERP_SAMPLE;
2762 src0 = get_src(ctx, instr->src[0]);
2763 break;
2764 default:
2765 break;
2766 }
2767
2768 if (instr->intrinsic == nir_intrinsic_interp_var_at_offset) {
2769 src_c0 = to_float(ctx, LLVMBuildExtractElement(ctx->builder, src0, ctx->i32zero, ""));
2770 src_c1 = to_float(ctx, LLVMBuildExtractElement(ctx->builder, src0, ctx->i32one, ""));
2771 } else if (instr->intrinsic == nir_intrinsic_interp_var_at_sample) {
2772 LLVMValueRef sample_position;
2773 LLVMValueRef halfval = LLVMConstReal(ctx->f32, 0.5f);
2774
2775 /* fetch sample ID */
2776 sample_position = load_sample_position(ctx, src0);
2777
2778 src_c0 = LLVMBuildExtractElement(ctx->builder, sample_position, ctx->i32zero, "");
2779 src_c0 = LLVMBuildFSub(ctx->builder, src_c0, halfval, "");
2780 src_c1 = LLVMBuildExtractElement(ctx->builder, sample_position, ctx->i32one, "");
2781 src_c1 = LLVMBuildFSub(ctx->builder, src_c1, halfval, "");
2782 }
2783 interp_param = lookup_interp_param(ctx, instr->variables[0]->var->data.interpolation, location);
2784 attr_number = LLVMConstInt(ctx->i32, input_index, false);
2785
2786 if (location == INTERP_SAMPLE) {
2787 LLVMValueRef ij_out[2];
2788 LLVMValueRef ddxy_out = emit_ddxy_interp(ctx, interp_param);
2789
2790 /*
2791 * take the I then J parameters, and the DDX/Y for it, and
2792 * calculate the IJ inputs for the interpolator.
2793 * temp1 = ddx * offset/sample.x + I;
2794 * interp_param.I = ddy * offset/sample.y + temp1;
2795 * temp1 = ddx * offset/sample.x + J;
2796 * interp_param.J = ddy * offset/sample.y + temp1;
2797 */
2798 for (unsigned i = 0; i < 2; i++) {
2799 LLVMValueRef ix_ll = LLVMConstInt(ctx->i32, i, false);
2800 LLVMValueRef iy_ll = LLVMConstInt(ctx->i32, i + 2, false);
2801 LLVMValueRef ddx_el = LLVMBuildExtractElement(ctx->builder,
2802 ddxy_out, ix_ll, "");
2803 LLVMValueRef ddy_el = LLVMBuildExtractElement(ctx->builder,
2804 ddxy_out, iy_ll, "");
2805 LLVMValueRef interp_el = LLVMBuildExtractElement(ctx->builder,
2806 interp_param, ix_ll, "");
2807 LLVMValueRef temp1, temp2;
2808
2809 interp_el = LLVMBuildBitCast(ctx->builder, interp_el,
2810 ctx->f32, "");
2811
2812 temp1 = LLVMBuildFMul(ctx->builder, ddx_el, src_c0, "");
2813 temp1 = LLVMBuildFAdd(ctx->builder, temp1, interp_el, "");
2814
2815 temp2 = LLVMBuildFMul(ctx->builder, ddy_el, src_c1, "");
2816 temp2 = LLVMBuildFAdd(ctx->builder, temp2, temp1, "");
2817
2818 ij_out[i] = LLVMBuildBitCast(ctx->builder,
2819 temp2, ctx->i32, "");
2820 }
2821 interp_param = build_gather_values(ctx, ij_out, 2);
2822
2823 }
2824 intr_name = interp_param ? "llvm.SI.fs.interp" : "llvm.SI.fs.constant";
2825 for (chan = 0; chan < 2; chan++) {
2826 LLVMValueRef args[4];
2827 LLVMValueRef llvm_chan = LLVMConstInt(ctx->i32, chan, false);
2828
2829 args[0] = llvm_chan;
2830 args[1] = attr_number;
2831 args[2] = ctx->prim_mask;
2832 args[3] = interp_param;
2833 result[chan] = emit_llvm_intrinsic(ctx, intr_name,
2834 ctx->f32, args, args[3] ? 4 : 3,
2835 LLVMReadNoneAttribute);
2836 }
2837 return build_gather_values(ctx, result, 2);
2838 }
2839
2840 static void visit_intrinsic(struct nir_to_llvm_context *ctx,
2841 nir_intrinsic_instr *instr)
2842 {
2843 LLVMValueRef result = NULL;
2844
2845 switch (instr->intrinsic) {
2846 case nir_intrinsic_load_work_group_id: {
2847 result = ctx->workgroup_ids;
2848 break;
2849 }
2850 case nir_intrinsic_load_base_vertex: {
2851 result = ctx->base_vertex;
2852 break;
2853 }
2854 case nir_intrinsic_load_vertex_id_zero_base: {
2855 result = ctx->vertex_id;
2856 break;
2857 }
2858 case nir_intrinsic_load_local_invocation_id: {
2859 result = ctx->local_invocation_ids;
2860 break;
2861 }
2862 case nir_intrinsic_load_base_instance:
2863 result = ctx->start_instance;
2864 break;
2865 case nir_intrinsic_load_sample_id:
2866 result = ctx->ancillary;
2867 break;
2868 case nir_intrinsic_load_front_face:
2869 result = ctx->front_face;
2870 break;
2871 case nir_intrinsic_load_instance_id:
2872 result = ctx->instance_id;
2873 ctx->shader_info->vs.vgpr_comp_cnt = MAX2(3,
2874 ctx->shader_info->vs.vgpr_comp_cnt);
2875 break;
2876 case nir_intrinsic_load_num_work_groups:
2877 result = ctx->num_work_groups;
2878 break;
2879 case nir_intrinsic_load_local_invocation_index:
2880 result = visit_load_local_invocation_index(ctx);
2881 break;
2882 case nir_intrinsic_load_push_constant:
2883 result = visit_load_push_constant(ctx, instr);
2884 break;
2885 case nir_intrinsic_vulkan_resource_index:
2886 result = visit_vulkan_resource_index(ctx, instr);
2887 break;
2888 case nir_intrinsic_store_ssbo:
2889 visit_store_ssbo(ctx, instr);
2890 break;
2891 case nir_intrinsic_load_ssbo:
2892 result = visit_load_buffer(ctx, instr);
2893 break;
2894 case nir_intrinsic_ssbo_atomic_add:
2895 case nir_intrinsic_ssbo_atomic_imin:
2896 case nir_intrinsic_ssbo_atomic_umin:
2897 case nir_intrinsic_ssbo_atomic_imax:
2898 case nir_intrinsic_ssbo_atomic_umax:
2899 case nir_intrinsic_ssbo_atomic_and:
2900 case nir_intrinsic_ssbo_atomic_or:
2901 case nir_intrinsic_ssbo_atomic_xor:
2902 case nir_intrinsic_ssbo_atomic_exchange:
2903 case nir_intrinsic_ssbo_atomic_comp_swap:
2904 result = visit_atomic_ssbo(ctx, instr);
2905 break;
2906 case nir_intrinsic_load_ubo:
2907 result = visit_load_buffer(ctx, instr);
2908 break;
2909 case nir_intrinsic_get_buffer_size:
2910 result = visit_get_buffer_size(ctx, instr);
2911 break;
2912 case nir_intrinsic_load_var:
2913 result = visit_load_var(ctx, instr);
2914 break;
2915 case nir_intrinsic_store_var:
2916 visit_store_var(ctx, instr);
2917 break;
2918 case nir_intrinsic_image_load:
2919 result = visit_image_load(ctx, instr);
2920 break;
2921 case nir_intrinsic_image_store:
2922 visit_image_store(ctx, instr);
2923 break;
2924 case nir_intrinsic_image_atomic_add:
2925 case nir_intrinsic_image_atomic_min:
2926 case nir_intrinsic_image_atomic_max:
2927 case nir_intrinsic_image_atomic_and:
2928 case nir_intrinsic_image_atomic_or:
2929 case nir_intrinsic_image_atomic_xor:
2930 case nir_intrinsic_image_atomic_exchange:
2931 case nir_intrinsic_image_atomic_comp_swap:
2932 result = visit_image_atomic(ctx, instr);
2933 break;
2934 case nir_intrinsic_image_size:
2935 result = visit_image_size(ctx, instr);
2936 break;
2937 case nir_intrinsic_discard:
2938 ctx->shader_info->fs.can_discard = true;
2939 emit_llvm_intrinsic(ctx, "llvm.AMDGPU.kilp",
2940 LLVMVoidTypeInContext(ctx->context),
2941 NULL, 0, 0);
2942 break;
2943 case nir_intrinsic_discard_if:
2944 emit_discard_if(ctx, instr);
2945 break;
2946 case nir_intrinsic_memory_barrier:
2947 emit_waitcnt(ctx);
2948 break;
2949 case nir_intrinsic_barrier:
2950 emit_barrier(ctx);
2951 break;
2952 case nir_intrinsic_var_atomic_add:
2953 case nir_intrinsic_var_atomic_imin:
2954 case nir_intrinsic_var_atomic_umin:
2955 case nir_intrinsic_var_atomic_imax:
2956 case nir_intrinsic_var_atomic_umax:
2957 case nir_intrinsic_var_atomic_and:
2958 case nir_intrinsic_var_atomic_or:
2959 case nir_intrinsic_var_atomic_xor:
2960 case nir_intrinsic_var_atomic_exchange:
2961 case nir_intrinsic_var_atomic_comp_swap:
2962 result = visit_var_atomic(ctx, instr);
2963 break;
2964 case nir_intrinsic_interp_var_at_centroid:
2965 case nir_intrinsic_interp_var_at_sample:
2966 case nir_intrinsic_interp_var_at_offset:
2967 result = visit_interp(ctx, instr);
2968 break;
2969 default:
2970 fprintf(stderr, "Unknown intrinsic: ");
2971 nir_print_instr(&instr->instr, stderr);
2972 fprintf(stderr, "\n");
2973 break;
2974 }
2975 if (result) {
2976 _mesa_hash_table_insert(ctx->defs, &instr->dest.ssa, result);
2977 }
2978 }
2979
2980 static LLVMValueRef get_sampler_desc(struct nir_to_llvm_context *ctx,
2981 nir_deref_var *deref,
2982 enum desc_type desc_type)
2983 {
2984 unsigned desc_set = deref->var->data.descriptor_set;
2985 LLVMValueRef list = ctx->descriptor_sets[desc_set];
2986 struct radv_descriptor_set_layout *layout = ctx->options->layout->set[desc_set].layout;
2987 struct radv_descriptor_set_binding_layout *binding = layout->binding + deref->var->data.binding;
2988 unsigned offset = binding->offset;
2989 unsigned stride = binding->size;
2990 unsigned type_size;
2991 LLVMBuilderRef builder = ctx->builder;
2992 LLVMTypeRef type;
2993 LLVMValueRef indices[2];
2994 LLVMValueRef index = NULL;
2995
2996 assert(deref->var->data.binding < layout->binding_count);
2997
2998 switch (desc_type) {
2999 case DESC_IMAGE:
3000 type = ctx->v8i32;
3001 type_size = 32;
3002 break;
3003 case DESC_FMASK:
3004 type = ctx->v8i32;
3005 offset += 32;
3006 type_size = 32;
3007 break;
3008 case DESC_SAMPLER:
3009 type = ctx->v4i32;
3010 if (binding->type == VK_DESCRIPTOR_TYPE_COMBINED_IMAGE_SAMPLER)
3011 offset += 64;
3012
3013 type_size = 16;
3014 break;
3015 case DESC_BUFFER:
3016 type = ctx->v4i32;
3017 type_size = 16;
3018 break;
3019 }
3020
3021 if (deref->deref.child) {
3022 nir_deref_array *child = (nir_deref_array*)deref->deref.child;
3023
3024 assert(child->deref_array_type != nir_deref_array_type_wildcard);
3025 offset += child->base_offset * stride;
3026 if (child->deref_array_type == nir_deref_array_type_indirect) {
3027 index = get_src(ctx, child->indirect);
3028 }
3029 }
3030
3031 assert(stride % type_size == 0);
3032
3033 if (!index)
3034 index = ctx->i32zero;
3035
3036 index = LLVMBuildMul(builder, index, LLVMConstInt(ctx->i32, stride / type_size, 0), "");
3037 indices[0] = ctx->i32zero;
3038 indices[1] = LLVMConstInt(ctx->i32, offset, 0);
3039 list = LLVMBuildGEP(builder, list, indices, 2, "");
3040 list = LLVMBuildPointerCast(builder, list, const_array(type, 0), "");
3041
3042 return build_indexed_load_const(ctx, list, index);
3043 }
3044
3045 static void set_tex_fetch_args(struct nir_to_llvm_context *ctx,
3046 struct ac_tex_info *tinfo,
3047 nir_tex_instr *instr,
3048 nir_texop op,
3049 LLVMValueRef res_ptr, LLVMValueRef samp_ptr,
3050 LLVMValueRef *param, unsigned count,
3051 unsigned dmask)
3052 {
3053 int num_args;
3054 unsigned is_rect = 0;
3055 bool da = instr->is_array || instr->sampler_dim == GLSL_SAMPLER_DIM_CUBE;
3056
3057 if (op == nir_texop_lod)
3058 da = false;
3059 /* Pad to power of two vector */
3060 while (count < util_next_power_of_two(count))
3061 param[count++] = LLVMGetUndef(ctx->i32);
3062
3063 if (count > 1)
3064 tinfo->args[0] = build_gather_values(ctx, param, count);
3065 else
3066 tinfo->args[0] = param[0];
3067
3068 tinfo->args[1] = res_ptr;
3069 num_args = 2;
3070
3071 if (op == nir_texop_txf ||
3072 op == nir_texop_txf_ms ||
3073 op == nir_texop_query_levels ||
3074 op == nir_texop_texture_samples ||
3075 op == nir_texop_txs)
3076 tinfo->dst_type = ctx->v4i32;
3077 else {
3078 tinfo->dst_type = ctx->v4f32;
3079 tinfo->args[num_args++] = samp_ptr;
3080 }
3081
3082 if (instr->sampler_dim == GLSL_SAMPLER_DIM_BUF && op == nir_texop_txf) {
3083 tinfo->args[0] = res_ptr;
3084 tinfo->args[1] = LLVMConstInt(ctx->i32, 0, false);
3085 tinfo->args[2] = param[0];
3086 tinfo->arg_count = 3;
3087 return;
3088 }
3089
3090 tinfo->args[num_args++] = LLVMConstInt(ctx->i32, dmask, 0);
3091 tinfo->args[num_args++] = LLVMConstInt(ctx->i32, is_rect, 0); /* unorm */
3092 tinfo->args[num_args++] = LLVMConstInt(ctx->i32, 0, 0); /* r128 */
3093 tinfo->args[num_args++] = LLVMConstInt(ctx->i32, da ? 1 : 0, 0);
3094 tinfo->args[num_args++] = LLVMConstInt(ctx->i32, 0, 0); /* glc */
3095 tinfo->args[num_args++] = LLVMConstInt(ctx->i32, 0, 0); /* slc */
3096 tinfo->args[num_args++] = LLVMConstInt(ctx->i32, 0, 0); /* tfe */
3097 tinfo->args[num_args++] = LLVMConstInt(ctx->i32, 0, 0); /* lwe */
3098
3099 tinfo->arg_count = num_args;
3100 }
3101
3102 static void tex_fetch_ptrs(struct nir_to_llvm_context *ctx,
3103 nir_tex_instr *instr,
3104 LLVMValueRef *res_ptr, LLVMValueRef *samp_ptr,
3105 LLVMValueRef *fmask_ptr)
3106 {
3107 if (instr->sampler_dim == GLSL_SAMPLER_DIM_BUF)
3108 *res_ptr = get_sampler_desc(ctx, instr->texture, DESC_BUFFER);
3109 else
3110 *res_ptr = get_sampler_desc(ctx, instr->texture, DESC_IMAGE);
3111 if (samp_ptr) {
3112 if (instr->sampler)
3113 *samp_ptr = get_sampler_desc(ctx, instr->sampler, DESC_SAMPLER);
3114 else
3115 *samp_ptr = get_sampler_desc(ctx, instr->texture, DESC_SAMPLER);
3116 }
3117 if (fmask_ptr && !instr->sampler && (instr->op == nir_texop_txf_ms ||
3118 instr->op == nir_texop_samples_identical))
3119 *fmask_ptr = get_sampler_desc(ctx, instr->texture, DESC_FMASK);
3120 }
3121
3122 static LLVMValueRef build_cube_intrinsic(struct nir_to_llvm_context *ctx,
3123 LLVMValueRef *in)
3124 {
3125
3126 LLVMValueRef v, cube_vec;
3127
3128 if (1) {
3129 LLVMTypeRef f32 = LLVMTypeOf(in[0]);
3130 LLVMValueRef out[4];
3131
3132 out[0] = emit_llvm_intrinsic(ctx, "llvm.amdgcn.cubetc",
3133 f32, in, 3, LLVMReadNoneAttribute);
3134 out[1] = emit_llvm_intrinsic(ctx, "llvm.amdgcn.cubesc",
3135 f32, in, 3, LLVMReadNoneAttribute);
3136 out[2] = emit_llvm_intrinsic(ctx, "llvm.amdgcn.cubema",
3137 f32, in, 3, LLVMReadNoneAttribute);
3138 out[3] = emit_llvm_intrinsic(ctx, "llvm.amdgcn.cubeid",
3139 f32, in, 3, LLVMReadNoneAttribute);
3140
3141 return build_gather_values(ctx, out, 4);
3142 } else {
3143 LLVMValueRef c[4];
3144 c[0] = in[0];
3145 c[1] = in[1];
3146 c[2] = in[2];
3147 c[3] = LLVMGetUndef(LLVMTypeOf(in[0]));
3148 cube_vec = build_gather_values(ctx, c, 4);
3149 v = emit_llvm_intrinsic(ctx, "llvm.AMDGPU.cube", LLVMTypeOf(cube_vec),
3150 &cube_vec, 1, LLVMReadNoneAttribute);
3151 }
3152 return v;
3153 }
3154
3155 static void cube_to_2d_coords(struct nir_to_llvm_context *ctx,
3156 LLVMValueRef *in, LLVMValueRef *out)
3157 {
3158 LLVMValueRef coords[4];
3159 LLVMValueRef mad_args[3];
3160 LLVMValueRef v;
3161 LLVMValueRef tmp;
3162 int i;
3163
3164 v = build_cube_intrinsic(ctx, in);
3165 for (i = 0; i < 4; i++)
3166 coords[i] = LLVMBuildExtractElement(ctx->builder, v,
3167 LLVMConstInt(ctx->i32, i, false), "");
3168
3169 coords[2] = emit_llvm_intrinsic(ctx, "llvm.fabs.f32", ctx->f32,
3170 &coords[2], 1, LLVMReadNoneAttribute);
3171 coords[2] = emit_fdiv(ctx, ctx->f32one, coords[2]);
3172
3173 mad_args[1] = coords[2];
3174 mad_args[2] = LLVMConstReal(ctx->f32, 1.5);
3175 mad_args[0] = coords[0];
3176
3177 /* emit MAD */
3178 tmp = LLVMBuildFMul(ctx->builder, mad_args[0], mad_args[1], "");
3179 coords[0] = LLVMBuildFAdd(ctx->builder, tmp, mad_args[2], "");
3180
3181 mad_args[0] = coords[1];
3182
3183 /* emit MAD */
3184 tmp = LLVMBuildFMul(ctx->builder, mad_args[0], mad_args[1], "");
3185 coords[1] = LLVMBuildFAdd(ctx->builder, tmp, mad_args[2], "");
3186
3187 /* apply xyz = yxw swizzle to cooords */
3188 out[0] = coords[1];
3189 out[1] = coords[0];
3190 out[2] = coords[3];
3191 }
3192
3193 static void emit_prepare_cube_coords(struct nir_to_llvm_context *ctx,
3194 LLVMValueRef *coords_arg, int num_coords,
3195 bool is_deriv,
3196 bool is_array, LLVMValueRef *derivs_arg)
3197 {
3198 LLVMValueRef coords[4];
3199 int i;
3200 cube_to_2d_coords(ctx, coords_arg, coords);
3201
3202 if (is_deriv && derivs_arg) {
3203 LLVMValueRef derivs[4];
3204 int axis;
3205
3206 /* Convert cube derivatives to 2D derivatives. */
3207 for (axis = 0; axis < 2; axis++) {
3208 LLVMValueRef shifted_cube_coords[4], shifted_coords[4];
3209
3210 /* Shift the cube coordinates by the derivatives to get
3211 * the cube coordinates of the "neighboring pixel".
3212 */
3213 for (i = 0; i < 3; i++)
3214 shifted_cube_coords[i] =
3215 LLVMBuildFAdd(ctx->builder, coords_arg[i],
3216 derivs_arg[axis*3+i], "");
3217 shifted_cube_coords[3] = LLVMGetUndef(ctx->f32);
3218
3219 /* Project the shifted cube coordinates onto the face. */
3220 cube_to_2d_coords(ctx, shifted_cube_coords,
3221 shifted_coords);
3222
3223 /* Subtract both sets of 2D coordinates to get 2D derivatives.
3224 * This won't work if the shifted coordinates ended up
3225 * in a different face.
3226 */
3227 for (i = 0; i < 2; i++)
3228 derivs[axis * 2 + i] =
3229 LLVMBuildFSub(ctx->builder, shifted_coords[i],
3230 coords[i], "");
3231 }
3232
3233 memcpy(derivs_arg, derivs, sizeof(derivs));
3234 }
3235
3236 if (is_array) {
3237 /* for cube arrays coord.z = coord.w(array_index) * 8 + face */
3238 /* coords_arg.w component - array_index for cube arrays */
3239 LLVMValueRef tmp = LLVMBuildFMul(ctx->builder, coords_arg[3], LLVMConstReal(ctx->f32, 8.0), "");
3240 coords[2] = LLVMBuildFAdd(ctx->builder, tmp, coords[2], "");
3241 }
3242
3243 memcpy(coords_arg, coords, sizeof(coords));
3244 }
3245
3246 static void visit_tex(struct nir_to_llvm_context *ctx, nir_tex_instr *instr)
3247 {
3248 LLVMValueRef result = NULL;
3249 struct ac_tex_info tinfo = { 0 };
3250 unsigned dmask = 0xf;
3251 LLVMValueRef address[16];
3252 LLVMValueRef coords[5];
3253 LLVMValueRef coord = NULL, lod = NULL, comparitor = NULL, bias, offsets = NULL;
3254 LLVMValueRef res_ptr, samp_ptr, fmask_ptr = NULL, sample_index = NULL;
3255 LLVMValueRef ddx = NULL, ddy = NULL;
3256 LLVMValueRef derivs[6];
3257 unsigned chan, count = 0;
3258 unsigned const_src = 0, num_deriv_comp = 0;
3259
3260 tex_fetch_ptrs(ctx, instr, &res_ptr, &samp_ptr, &fmask_ptr);
3261
3262 for (unsigned i = 0; i < instr->num_srcs; i++) {
3263 switch (instr->src[i].src_type) {
3264 case nir_tex_src_coord:
3265 coord = get_src(ctx, instr->src[i].src);
3266 break;
3267 case nir_tex_src_projector:
3268 break;
3269 case nir_tex_src_comparitor:
3270 comparitor = get_src(ctx, instr->src[i].src);
3271 break;
3272 case nir_tex_src_offset:
3273 offsets = get_src(ctx, instr->src[i].src);
3274 const_src = i;
3275 break;
3276 case nir_tex_src_bias:
3277 bias = get_src(ctx, instr->src[i].src);
3278 break;
3279 case nir_tex_src_lod:
3280 lod = get_src(ctx, instr->src[i].src);
3281 break;
3282 case nir_tex_src_ms_index:
3283 sample_index = get_src(ctx, instr->src[i].src);
3284 break;
3285 case nir_tex_src_ms_mcs:
3286 break;
3287 case nir_tex_src_ddx:
3288 ddx = get_src(ctx, instr->src[i].src);
3289 num_deriv_comp = instr->src[i].src.ssa->num_components;
3290 break;
3291 case nir_tex_src_ddy:
3292 ddy = get_src(ctx, instr->src[i].src);
3293 break;
3294 case nir_tex_src_texture_offset:
3295 case nir_tex_src_sampler_offset:
3296 case nir_tex_src_plane:
3297 default:
3298 break;
3299 }
3300 }
3301
3302 if (instr->op == nir_texop_texture_samples) {
3303 LLVMValueRef res, samples;
3304 res = LLVMBuildBitCast(ctx->builder, res_ptr, ctx->v8i32, "");
3305 samples = LLVMBuildExtractElement(ctx->builder, res,
3306 LLVMConstInt(ctx->i32, 3, false), "");
3307 samples = LLVMBuildLShr(ctx->builder, samples,
3308 LLVMConstInt(ctx->i32, 16, false), "");
3309 samples = LLVMBuildAnd(ctx->builder, samples,
3310 LLVMConstInt(ctx->i32, 0xf, false), "");
3311 samples = LLVMBuildShl(ctx->builder, ctx->i32one,
3312 samples, "");
3313
3314 result = samples;
3315 goto write_result;
3316 }
3317
3318 if (coord)
3319 for (chan = 0; chan < instr->coord_components; chan++)
3320 coords[chan] = llvm_extract_elem(ctx, coord, chan);
3321
3322 if (offsets && instr->op != nir_texop_txf) {
3323 LLVMValueRef offset[3], pack;
3324 for (chan = 0; chan < 3; ++chan)
3325 offset[chan] = ctx->i32zero;
3326
3327 tinfo.has_offset = true;
3328 for (chan = 0; chan < get_llvm_num_components(offsets); chan++) {
3329 offset[chan] = llvm_extract_elem(ctx, offsets, chan);
3330 offset[chan] = LLVMBuildAnd(ctx->builder, offset[chan],
3331 LLVMConstInt(ctx->i32, 0x3f, false), "");
3332 if (chan)
3333 offset[chan] = LLVMBuildShl(ctx->builder, offset[chan],
3334 LLVMConstInt(ctx->i32, chan * 8, false), "");
3335 }
3336 pack = LLVMBuildOr(ctx->builder, offset[0], offset[1], "");
3337 pack = LLVMBuildOr(ctx->builder, pack, offset[2], "");
3338 address[count++] = pack;
3339
3340 }
3341 /* pack LOD bias value */
3342 if (instr->op == nir_texop_txb && bias) {
3343 address[count++] = bias;
3344 }
3345
3346 /* Pack depth comparison value */
3347 if (instr->is_shadow && comparitor) {
3348 address[count++] = llvm_extract_elem(ctx, comparitor, 0);
3349 }
3350
3351 /* pack derivatives */
3352 if (ddx || ddy) {
3353 switch (instr->sampler_dim) {
3354 case GLSL_SAMPLER_DIM_3D:
3355 case GLSL_SAMPLER_DIM_CUBE:
3356 num_deriv_comp = 3;
3357 break;
3358 case GLSL_SAMPLER_DIM_2D:
3359 default:
3360 num_deriv_comp = 2;
3361 break;
3362 case GLSL_SAMPLER_DIM_1D:
3363 num_deriv_comp = 1;
3364 break;
3365 }
3366
3367 for (unsigned i = 0; i < num_deriv_comp; i++) {
3368 derivs[i * 2] = to_float(ctx, llvm_extract_elem(ctx, ddx, i));
3369 derivs[i * 2 + 1] = to_float(ctx, llvm_extract_elem(ctx, ddy, i));
3370 }
3371 }
3372
3373 if (instr->sampler_dim == GLSL_SAMPLER_DIM_CUBE && coord) {
3374 for (chan = 0; chan < instr->coord_components; chan++)
3375 coords[chan] = to_float(ctx, coords[chan]);
3376 if (instr->coord_components == 3)
3377 coords[3] = LLVMGetUndef(ctx->f32);
3378 emit_prepare_cube_coords(ctx, coords, instr->coord_components, instr->op == nir_texop_txd, instr->is_array, derivs);
3379 if (num_deriv_comp)
3380 num_deriv_comp--;
3381 }
3382
3383 if (ddx || ddy) {
3384 for (unsigned i = 0; i < num_deriv_comp * 2; i++)
3385 address[count++] = derivs[i];
3386 }
3387
3388 /* Pack texture coordinates */
3389 if (coord) {
3390 address[count++] = coords[0];
3391 if (instr->coord_components > 1)
3392 address[count++] = coords[1];
3393 if (instr->coord_components > 2) {
3394 /* This seems like a bit of a hack - but it passes Vulkan CTS with it */
3395 if (instr->sampler_dim != GLSL_SAMPLER_DIM_3D && instr->op != nir_texop_txf) {
3396 coords[2] = to_float(ctx, coords[2]);
3397 coords[2] = emit_llvm_intrinsic(ctx, "llvm.rint.f32", ctx->f32, &coords[2],
3398 1, 0);
3399 coords[2] = to_integer(ctx, coords[2]);
3400 }
3401 address[count++] = coords[2];
3402 }
3403 }
3404
3405 /* Pack LOD */
3406 if ((instr->op == nir_texop_txl || instr->op == nir_texop_txf) && lod) {
3407 address[count++] = lod;
3408 } else if (instr->op == nir_texop_txf_ms && sample_index) {
3409 address[count++] = sample_index;
3410 } else if(instr->op == nir_texop_txs) {
3411 count = 0;
3412 address[count++] = lod;
3413 }
3414
3415 for (chan = 0; chan < count; chan++) {
3416 address[chan] = LLVMBuildBitCast(ctx->builder,
3417 address[chan], ctx->i32, "");
3418 }
3419
3420 if (instr->op == nir_texop_samples_identical) {
3421 LLVMValueRef txf_address[4];
3422 struct ac_tex_info txf_info = { 0 };
3423 unsigned txf_count = count;
3424 memcpy(txf_address, address, sizeof(txf_address));
3425
3426 if (!instr->is_array)
3427 txf_address[2] = ctx->i32zero;
3428 txf_address[3] = ctx->i32zero;
3429
3430 set_tex_fetch_args(ctx, &txf_info, instr, nir_texop_txf,
3431 fmask_ptr, NULL,
3432 txf_address, txf_count, 0xf);
3433
3434 result = build_tex_intrinsic(ctx, instr, &txf_info);
3435
3436 result = LLVMBuildExtractElement(ctx->builder, result, ctx->i32zero, "");
3437 result = emit_int_cmp(ctx, LLVMIntEQ, result, ctx->i32zero);
3438 goto write_result;
3439 }
3440
3441 /* Adjust the sample index according to FMASK.
3442 *
3443 * For uncompressed MSAA surfaces, FMASK should return 0x76543210,
3444 * which is the identity mapping. Each nibble says which physical sample
3445 * should be fetched to get that sample.
3446 *
3447 * For example, 0x11111100 means there are only 2 samples stored and
3448 * the second sample covers 3/4 of the pixel. When reading samples 0
3449 * and 1, return physical sample 0 (determined by the first two 0s
3450 * in FMASK), otherwise return physical sample 1.
3451 *
3452 * The sample index should be adjusted as follows:
3453 * sample_index = (fmask >> (sample_index * 4)) & 0xF;
3454 */
3455 if (instr->sampler_dim == GLSL_SAMPLER_DIM_MS) {
3456 LLVMValueRef txf_address[4];
3457 struct ac_tex_info txf_info = { 0 };
3458 unsigned txf_count = count;
3459 memcpy(txf_address, address, sizeof(txf_address));
3460
3461 if (!instr->is_array)
3462 txf_address[2] = ctx->i32zero;
3463 txf_address[3] = ctx->i32zero;
3464
3465 set_tex_fetch_args(ctx, &txf_info, instr, nir_texop_txf,
3466 fmask_ptr, NULL,
3467 txf_address, txf_count, 0xf);
3468
3469 result = build_tex_intrinsic(ctx, instr, &txf_info);
3470 LLVMValueRef four = LLVMConstInt(ctx->i32, 4, false);
3471 LLVMValueRef F = LLVMConstInt(ctx->i32, 0xf, false);
3472
3473 LLVMValueRef fmask = LLVMBuildExtractElement(ctx->builder,
3474 result,
3475 ctx->i32zero, "");
3476
3477 unsigned sample_chan = instr->is_array ? 3 : 2;
3478
3479 LLVMValueRef sample_index4 =
3480 LLVMBuildMul(ctx->builder, address[sample_chan], four, "");
3481 LLVMValueRef shifted_fmask =
3482 LLVMBuildLShr(ctx->builder, fmask, sample_index4, "");
3483 LLVMValueRef final_sample =
3484 LLVMBuildAnd(ctx->builder, shifted_fmask, F, "");
3485
3486 /* Don't rewrite the sample index if WORD1.DATA_FORMAT of the FMASK
3487 * resource descriptor is 0 (invalid),
3488 */
3489 LLVMValueRef fmask_desc =
3490 LLVMBuildBitCast(ctx->builder, fmask_ptr,
3491 ctx->v8i32, "");
3492
3493 LLVMValueRef fmask_word1 =
3494 LLVMBuildExtractElement(ctx->builder, fmask_desc,
3495 ctx->i32one, "");
3496
3497 LLVMValueRef word1_is_nonzero =
3498 LLVMBuildICmp(ctx->builder, LLVMIntNE,
3499 fmask_word1, ctx->i32zero, "");
3500
3501 /* Replace the MSAA sample index. */
3502 address[sample_chan] =
3503 LLVMBuildSelect(ctx->builder, word1_is_nonzero,
3504 final_sample, address[sample_chan], "");
3505 }
3506
3507 if (offsets && instr->op == nir_texop_txf) {
3508 nir_const_value *const_offset =
3509 nir_src_as_const_value(instr->src[const_src].src);
3510
3511 assert(const_offset);
3512 if (instr->coord_components > 2)
3513 address[2] = LLVMBuildAdd(ctx->builder,
3514 address[2], LLVMConstInt(ctx->i32, const_offset->i32[2], false), "");
3515 if (instr->coord_components > 1)
3516 address[1] = LLVMBuildAdd(ctx->builder,
3517 address[1], LLVMConstInt(ctx->i32, const_offset->i32[1], false), "");
3518 address[0] = LLVMBuildAdd(ctx->builder,
3519 address[0], LLVMConstInt(ctx->i32, const_offset->i32[0], false), "");
3520
3521 }
3522
3523 /* TODO TG4 support */
3524 if (instr->op == nir_texop_tg4) {
3525 if (instr->is_shadow)
3526 dmask = 1;
3527 else
3528 dmask = 1 << instr->component;
3529 }
3530 set_tex_fetch_args(ctx, &tinfo, instr, instr->op,
3531 res_ptr, samp_ptr, address, count, dmask);
3532
3533 result = build_tex_intrinsic(ctx, instr, &tinfo);
3534
3535 if (instr->op == nir_texop_query_levels)
3536 result = LLVMBuildExtractElement(ctx->builder, result, LLVMConstInt(ctx->i32, 3, false), "");
3537 else if (instr->op == nir_texop_txs &&
3538 instr->sampler_dim == GLSL_SAMPLER_DIM_CUBE &&
3539 instr->is_array) {
3540 LLVMValueRef two = LLVMConstInt(ctx->i32, 2, false);
3541 LLVMValueRef six = LLVMConstInt(ctx->i32, 6, false);
3542 LLVMValueRef z = LLVMBuildExtractElement(ctx->builder, result, two, "");
3543 z = LLVMBuildSDiv(ctx->builder, z, six, "");
3544 result = LLVMBuildInsertElement(ctx->builder, result, z, two, "");
3545 } else if (instr->dest.ssa.num_components != 4)
3546 result = trim_vector(ctx, result, instr->dest.ssa.num_components);
3547
3548 write_result:
3549 if (result) {
3550 assert(instr->dest.is_ssa);
3551 result = to_integer(ctx, result);
3552 _mesa_hash_table_insert(ctx->defs, &instr->dest.ssa, result);
3553 }
3554 }
3555
3556
3557 static void visit_phi(struct nir_to_llvm_context *ctx, nir_phi_instr *instr)
3558 {
3559 LLVMTypeRef type = get_def_type(ctx, &instr->dest.ssa);
3560 LLVMValueRef result = LLVMBuildPhi(ctx->builder, type, "");
3561
3562 _mesa_hash_table_insert(ctx->defs, &instr->dest.ssa, result);
3563 _mesa_hash_table_insert(ctx->phis, instr, result);
3564 }
3565
3566 static void visit_post_phi(struct nir_to_llvm_context *ctx,
3567 nir_phi_instr *instr,
3568 LLVMValueRef llvm_phi)
3569 {
3570 nir_foreach_phi_src(src, instr) {
3571 LLVMBasicBlockRef block = get_block(ctx, src->pred);
3572 LLVMValueRef llvm_src = get_src(ctx, src->src);
3573
3574 LLVMAddIncoming(llvm_phi, &llvm_src, &block, 1);
3575 }
3576 }
3577
3578 static void phi_post_pass(struct nir_to_llvm_context *ctx)
3579 {
3580 struct hash_entry *entry;
3581 hash_table_foreach(ctx->phis, entry) {
3582 visit_post_phi(ctx, (nir_phi_instr*)entry->key,
3583 (LLVMValueRef)entry->data);
3584 }
3585 }
3586
3587
3588 static void visit_ssa_undef(struct nir_to_llvm_context *ctx,
3589 nir_ssa_undef_instr *instr)
3590 {
3591 unsigned num_components = instr->def.num_components;
3592 LLVMValueRef undef;
3593
3594 if (num_components == 1)
3595 undef = LLVMGetUndef(ctx->i32);
3596 else {
3597 undef = LLVMGetUndef(LLVMVectorType(ctx->i32, num_components));
3598 }
3599 _mesa_hash_table_insert(ctx->defs, &instr->def, undef);
3600 }
3601
3602 static void visit_jump(struct nir_to_llvm_context *ctx,
3603 nir_jump_instr *instr)
3604 {
3605 switch (instr->type) {
3606 case nir_jump_break:
3607 LLVMBuildBr(ctx->builder, ctx->break_block);
3608 LLVMClearInsertionPosition(ctx->builder);
3609 break;
3610 case nir_jump_continue:
3611 LLVMBuildBr(ctx->builder, ctx->continue_block);
3612 LLVMClearInsertionPosition(ctx->builder);
3613 break;
3614 default:
3615 fprintf(stderr, "Unknown NIR jump instr: ");
3616 nir_print_instr(&instr->instr, stderr);
3617 fprintf(stderr, "\n");
3618 abort();
3619 }
3620 }
3621
3622 static void visit_cf_list(struct nir_to_llvm_context *ctx,
3623 struct exec_list *list);
3624
3625 static void visit_block(struct nir_to_llvm_context *ctx, nir_block *block)
3626 {
3627 LLVMBasicBlockRef llvm_block = LLVMGetInsertBlock(ctx->builder);
3628 nir_foreach_instr(instr, block)
3629 {
3630 switch (instr->type) {
3631 case nir_instr_type_alu:
3632 visit_alu(ctx, nir_instr_as_alu(instr));
3633 break;
3634 case nir_instr_type_load_const:
3635 visit_load_const(ctx, nir_instr_as_load_const(instr));
3636 break;
3637 case nir_instr_type_intrinsic:
3638 visit_intrinsic(ctx, nir_instr_as_intrinsic(instr));
3639 break;
3640 case nir_instr_type_tex:
3641 visit_tex(ctx, nir_instr_as_tex(instr));
3642 break;
3643 case nir_instr_type_phi:
3644 visit_phi(ctx, nir_instr_as_phi(instr));
3645 break;
3646 case nir_instr_type_ssa_undef:
3647 visit_ssa_undef(ctx, nir_instr_as_ssa_undef(instr));
3648 break;
3649 case nir_instr_type_jump:
3650 visit_jump(ctx, nir_instr_as_jump(instr));
3651 break;
3652 default:
3653 fprintf(stderr, "Unknown NIR instr type: ");
3654 nir_print_instr(instr, stderr);
3655 fprintf(stderr, "\n");
3656 abort();
3657 }
3658 }
3659
3660 _mesa_hash_table_insert(ctx->defs, block, llvm_block);
3661 }
3662
3663 static void visit_if(struct nir_to_llvm_context *ctx, nir_if *if_stmt)
3664 {
3665 LLVMValueRef value = get_src(ctx, if_stmt->condition);
3666
3667 LLVMBasicBlockRef merge_block =
3668 LLVMAppendBasicBlockInContext(ctx->context, ctx->main_function, "");
3669 LLVMBasicBlockRef if_block =
3670 LLVMAppendBasicBlockInContext(ctx->context, ctx->main_function, "");
3671 LLVMBasicBlockRef else_block = merge_block;
3672 if (!exec_list_is_empty(&if_stmt->else_list))
3673 else_block = LLVMAppendBasicBlockInContext(
3674 ctx->context, ctx->main_function, "");
3675
3676 LLVMValueRef cond = LLVMBuildICmp(ctx->builder, LLVMIntNE, value,
3677 LLVMConstInt(ctx->i32, 0, false), "");
3678 LLVMBuildCondBr(ctx->builder, cond, if_block, else_block);
3679
3680 LLVMPositionBuilderAtEnd(ctx->builder, if_block);
3681 visit_cf_list(ctx, &if_stmt->then_list);
3682 if (LLVMGetInsertBlock(ctx->builder))
3683 LLVMBuildBr(ctx->builder, merge_block);
3684
3685 if (!exec_list_is_empty(&if_stmt->else_list)) {
3686 LLVMPositionBuilderAtEnd(ctx->builder, else_block);
3687 visit_cf_list(ctx, &if_stmt->else_list);
3688 if (LLVMGetInsertBlock(ctx->builder))
3689 LLVMBuildBr(ctx->builder, merge_block);
3690 }
3691
3692 LLVMPositionBuilderAtEnd(ctx->builder, merge_block);
3693 }
3694
3695 static void visit_loop(struct nir_to_llvm_context *ctx, nir_loop *loop)
3696 {
3697 LLVMBasicBlockRef continue_parent = ctx->continue_block;
3698 LLVMBasicBlockRef break_parent = ctx->break_block;
3699
3700 ctx->continue_block =
3701 LLVMAppendBasicBlockInContext(ctx->context, ctx->main_function, "");
3702 ctx->break_block =
3703 LLVMAppendBasicBlockInContext(ctx->context, ctx->main_function, "");
3704
3705 LLVMBuildBr(ctx->builder, ctx->continue_block);
3706 LLVMPositionBuilderAtEnd(ctx->builder, ctx->continue_block);
3707 visit_cf_list(ctx, &loop->body);
3708
3709 if (LLVMGetInsertBlock(ctx->builder))
3710 LLVMBuildBr(ctx->builder, ctx->continue_block);
3711 LLVMPositionBuilderAtEnd(ctx->builder, ctx->break_block);
3712
3713 ctx->continue_block = continue_parent;
3714 ctx->break_block = break_parent;
3715 }
3716
3717 static void visit_cf_list(struct nir_to_llvm_context *ctx,
3718 struct exec_list *list)
3719 {
3720 foreach_list_typed(nir_cf_node, node, node, list)
3721 {
3722 switch (node->type) {
3723 case nir_cf_node_block:
3724 visit_block(ctx, nir_cf_node_as_block(node));
3725 break;
3726
3727 case nir_cf_node_if:
3728 visit_if(ctx, nir_cf_node_as_if(node));
3729 break;
3730
3731 case nir_cf_node_loop:
3732 visit_loop(ctx, nir_cf_node_as_loop(node));
3733 break;
3734
3735 default:
3736 assert(0);
3737 }
3738 }
3739 }
3740
3741 static void
3742 handle_vs_input_decl(struct nir_to_llvm_context *ctx,
3743 struct nir_variable *variable)
3744 {
3745 LLVMValueRef t_list_ptr = ctx->vertex_buffers;
3746 LLVMValueRef t_offset;
3747 LLVMValueRef t_list;
3748 LLVMValueRef args[3];
3749 LLVMValueRef input;
3750 LLVMValueRef buffer_index;
3751 int index = variable->data.location - VERT_ATTRIB_GENERIC0;
3752 int idx = variable->data.location;
3753 unsigned attrib_count = glsl_count_attribute_slots(variable->type, true);
3754
3755 variable->data.driver_location = idx * 4;
3756
3757 if (ctx->options->key.vs.instance_rate_inputs & (1u << index)) {
3758 buffer_index = LLVMBuildAdd(ctx->builder, ctx->instance_id,
3759 ctx->start_instance, "");
3760 ctx->shader_info->vs.vgpr_comp_cnt = MAX2(3,
3761 ctx->shader_info->vs.vgpr_comp_cnt);
3762 } else
3763 buffer_index = LLVMBuildAdd(ctx->builder, ctx->vertex_id,
3764 ctx->base_vertex, "");
3765
3766 for (unsigned i = 0; i < attrib_count; ++i, ++idx) {
3767 t_offset = LLVMConstInt(ctx->i32, index + i, false);
3768
3769 t_list = build_indexed_load_const(ctx, t_list_ptr, t_offset);
3770 args[0] = t_list;
3771 args[1] = LLVMConstInt(ctx->i32, 0, false);
3772 args[2] = buffer_index;
3773 input = emit_llvm_intrinsic(ctx,
3774 "llvm.SI.vs.load.input", ctx->v4f32, args, 3,
3775 LLVMReadNoneAttribute | LLVMNoUnwindAttribute);
3776
3777 for (unsigned chan = 0; chan < 4; chan++) {
3778 LLVMValueRef llvm_chan = LLVMConstInt(ctx->i32, chan, false);
3779 ctx->inputs[radeon_llvm_reg_index_soa(idx, chan)] =
3780 to_integer(ctx, LLVMBuildExtractElement(ctx->builder,
3781 input, llvm_chan, ""));
3782 }
3783 }
3784 }
3785
3786
3787 static void interp_fs_input(struct nir_to_llvm_context *ctx,
3788 unsigned attr,
3789 LLVMValueRef interp_param,
3790 LLVMValueRef prim_mask,
3791 LLVMValueRef result[4])
3792 {
3793 const char *intr_name;
3794 LLVMValueRef attr_number;
3795 unsigned chan;
3796
3797 attr_number = LLVMConstInt(ctx->i32, attr, false);
3798
3799 /* fs.constant returns the param from the middle vertex, so it's not
3800 * really useful for flat shading. It's meant to be used for custom
3801 * interpolation (but the intrinsic can't fetch from the other two
3802 * vertices).
3803 *
3804 * Luckily, it doesn't matter, because we rely on the FLAT_SHADE state
3805 * to do the right thing. The only reason we use fs.constant is that
3806 * fs.interp cannot be used on integers, because they can be equal
3807 * to NaN.
3808 */
3809 intr_name = interp_param ? "llvm.SI.fs.interp" : "llvm.SI.fs.constant";
3810
3811 for (chan = 0; chan < 4; chan++) {
3812 LLVMValueRef args[4];
3813 LLVMValueRef llvm_chan = LLVMConstInt(ctx->i32, chan, false);
3814
3815 args[0] = llvm_chan;
3816 args[1] = attr_number;
3817 args[2] = prim_mask;
3818 args[3] = interp_param;
3819 result[chan] = emit_llvm_intrinsic(ctx, intr_name,
3820 ctx->f32, args, args[3] ? 4 : 3,
3821 LLVMReadNoneAttribute | LLVMNoUnwindAttribute);
3822 }
3823 }
3824
3825 static void
3826 handle_fs_input_decl(struct nir_to_llvm_context *ctx,
3827 struct nir_variable *variable)
3828 {
3829 int idx = variable->data.location;
3830 unsigned attrib_count = glsl_count_attribute_slots(variable->type, false);
3831 LLVMValueRef interp;
3832
3833 variable->data.driver_location = idx * 4;
3834 ctx->input_mask |= ((1ull << attrib_count) - 1) << variable->data.location;
3835
3836 if (glsl_get_base_type(glsl_without_array(variable->type)) == GLSL_TYPE_FLOAT)
3837 interp = lookup_interp_param(ctx, variable->data.interpolation, INTERP_CENTER);
3838 else
3839 interp = NULL;
3840
3841 for (unsigned i = 0; i < attrib_count; ++i)
3842 ctx->inputs[radeon_llvm_reg_index_soa(idx + i, 0)] = interp;
3843
3844 }
3845
3846 static void
3847 handle_shader_input_decl(struct nir_to_llvm_context *ctx,
3848 struct nir_variable *variable)
3849 {
3850 switch (ctx->stage) {
3851 case MESA_SHADER_VERTEX:
3852 handle_vs_input_decl(ctx, variable);
3853 break;
3854 case MESA_SHADER_FRAGMENT:
3855 handle_fs_input_decl(ctx, variable);
3856 break;
3857 default:
3858 break;
3859 }
3860
3861 }
3862
3863 static void
3864 handle_fs_inputs_pre(struct nir_to_llvm_context *ctx,
3865 struct nir_shader *nir)
3866 {
3867 unsigned index = 0;
3868 for (unsigned i = 0; i < RADEON_LLVM_MAX_INPUTS; ++i) {
3869 LLVMValueRef interp_param;
3870 LLVMValueRef *inputs = ctx->inputs +radeon_llvm_reg_index_soa(i, 0);
3871
3872 if (!(ctx->input_mask & (1ull << i)))
3873 continue;
3874
3875 if (i >= VARYING_SLOT_VAR0 || i == VARYING_SLOT_PNTC) {
3876 interp_param = *inputs;
3877 interp_fs_input(ctx, index, interp_param, ctx->prim_mask,
3878 inputs);
3879
3880 if (!interp_param)
3881 ctx->shader_info->fs.flat_shaded_mask |= 1u << index;
3882 ++index;
3883 } else if (i == VARYING_SLOT_POS) {
3884 for(int i = 0; i < 3; ++i)
3885 inputs[i] = ctx->frag_pos[i];
3886
3887 inputs[3] = emit_fdiv(ctx, ctx->f32one, ctx->frag_pos[3]);
3888 }
3889 }
3890 ctx->shader_info->fs.num_interp = index;
3891 if (ctx->input_mask & (1 << VARYING_SLOT_PNTC))
3892 ctx->shader_info->fs.has_pcoord = true;
3893 ctx->shader_info->fs.input_mask = ctx->input_mask >> VARYING_SLOT_VAR0;
3894 }
3895
3896 static LLVMValueRef
3897 ac_build_alloca(struct nir_to_llvm_context *ctx,
3898 LLVMTypeRef type,
3899 const char *name)
3900 {
3901 LLVMBuilderRef builder = ctx->builder;
3902 LLVMBasicBlockRef current_block = LLVMGetInsertBlock(builder);
3903 LLVMValueRef function = LLVMGetBasicBlockParent(current_block);
3904 LLVMBasicBlockRef first_block = LLVMGetEntryBasicBlock(function);
3905 LLVMValueRef first_instr = LLVMGetFirstInstruction(first_block);
3906 LLVMBuilderRef first_builder = LLVMCreateBuilderInContext(ctx->context);
3907 LLVMValueRef res;
3908
3909 if (first_instr) {
3910 LLVMPositionBuilderBefore(first_builder, first_instr);
3911 } else {
3912 LLVMPositionBuilderAtEnd(first_builder, first_block);
3913 }
3914
3915 res = LLVMBuildAlloca(first_builder, type, name);
3916 LLVMBuildStore(builder, LLVMConstNull(type), res);
3917
3918 LLVMDisposeBuilder(first_builder);
3919
3920 return res;
3921 }
3922
3923 static LLVMValueRef si_build_alloca_undef(struct nir_to_llvm_context *ctx,
3924 LLVMTypeRef type,
3925 const char *name)
3926 {
3927 LLVMValueRef ptr = ac_build_alloca(ctx, type, name);
3928 LLVMBuildStore(ctx->builder, LLVMGetUndef(type), ptr);
3929 return ptr;
3930 }
3931
3932 static void
3933 handle_shader_output_decl(struct nir_to_llvm_context *ctx,
3934 struct nir_variable *variable)
3935 {
3936 int idx = variable->data.location;
3937 unsigned attrib_count = glsl_count_attribute_slots(variable->type, false);
3938
3939 variable->data.driver_location = idx * 4;
3940
3941 if (ctx->stage == MESA_SHADER_VERTEX) {
3942
3943 if (idx == VARYING_SLOT_CLIP_DIST0 ||
3944 idx == VARYING_SLOT_CULL_DIST0) {
3945 int length = glsl_get_length(variable->type);
3946 if (idx == VARYING_SLOT_CLIP_DIST0) {
3947 ctx->shader_info->vs.clip_dist_mask = (1 << length) - 1;
3948 ctx->num_clips = length;
3949 } else if (idx == VARYING_SLOT_CULL_DIST0) {
3950 ctx->shader_info->vs.cull_dist_mask = (1 << length) - 1;
3951 ctx->num_culls = length;
3952 }
3953 if (length > 4)
3954 attrib_count = 2;
3955 else
3956 attrib_count = 1;
3957 }
3958 }
3959
3960 for (unsigned i = 0; i < attrib_count; ++i) {
3961 for (unsigned chan = 0; chan < 4; chan++) {
3962 ctx->outputs[radeon_llvm_reg_index_soa(idx + i, chan)] =
3963 si_build_alloca_undef(ctx, ctx->f32, "");
3964 }
3965 }
3966 ctx->output_mask |= ((1ull << attrib_count) - 1) << variable->data.location;
3967 }
3968
3969 static void
3970 setup_locals(struct nir_to_llvm_context *ctx,
3971 struct nir_function *func)
3972 {
3973 int i, j;
3974 ctx->num_locals = 0;
3975 nir_foreach_variable(variable, &func->impl->locals) {
3976 unsigned attrib_count = glsl_count_attribute_slots(variable->type, false);
3977 variable->data.driver_location = ctx->num_locals * 4;
3978 ctx->num_locals += attrib_count;
3979 }
3980 ctx->locals = malloc(4 * ctx->num_locals * sizeof(LLVMValueRef));
3981 if (!ctx->locals)
3982 return;
3983
3984 for (i = 0; i < ctx->num_locals; i++) {
3985 for (j = 0; j < 4; j++) {
3986 ctx->locals[i * 4 + j] =
3987 si_build_alloca_undef(ctx, ctx->f32, "temp");
3988 }
3989 }
3990 }
3991
3992 static LLVMValueRef
3993 emit_float_saturate(struct nir_to_llvm_context *ctx, LLVMValueRef v, float lo, float hi)
3994 {
3995 v = to_float(ctx, v);
3996 v = emit_intrin_2f_param(ctx, "llvm.maxnum.f32", v, LLVMConstReal(ctx->f32, lo));
3997 return emit_intrin_2f_param(ctx, "llvm.minnum.f32", v, LLVMConstReal(ctx->f32, hi));
3998 }
3999
4000
4001 static LLVMValueRef emit_pack_int16(struct nir_to_llvm_context *ctx,
4002 LLVMValueRef src0, LLVMValueRef src1)
4003 {
4004 LLVMValueRef const16 = LLVMConstInt(ctx->i32, 16, false);
4005 LLVMValueRef comp[2];
4006
4007 comp[0] = LLVMBuildAnd(ctx->builder, src0, LLVMConstInt(ctx-> i32, 65535, 0), "");
4008 comp[1] = LLVMBuildAnd(ctx->builder, src1, LLVMConstInt(ctx-> i32, 65535, 0), "");
4009 comp[1] = LLVMBuildShl(ctx->builder, comp[1], const16, "");
4010 return LLVMBuildOr(ctx->builder, comp[0], comp[1], "");
4011 }
4012
4013 /* Initialize arguments for the shader export intrinsic */
4014 static void
4015 si_llvm_init_export_args(struct nir_to_llvm_context *ctx,
4016 LLVMValueRef *values,
4017 unsigned target,
4018 LLVMValueRef *args)
4019 {
4020 /* Default is 0xf. Adjusted below depending on the format. */
4021 args[0] = LLVMConstInt(ctx->i32, target != V_008DFC_SQ_EXP_NULL ? 0xf : 0, false);
4022 /* Specify whether the EXEC mask represents the valid mask */
4023 args[1] = LLVMConstInt(ctx->i32, 0, false);
4024
4025 /* Specify whether this is the last export */
4026 args[2] = LLVMConstInt(ctx->i32, 0, false);
4027 /* Specify the target we are exporting */
4028 args[3] = LLVMConstInt(ctx->i32, target, false);
4029
4030 args[4] = LLVMConstInt(ctx->i32, 0, false); /* COMPR flag */
4031 args[5] = LLVMGetUndef(ctx->f32);
4032 args[6] = LLVMGetUndef(ctx->f32);
4033 args[7] = LLVMGetUndef(ctx->f32);
4034 args[8] = LLVMGetUndef(ctx->f32);
4035
4036 if (!values)
4037 return;
4038
4039 if (ctx->stage == MESA_SHADER_FRAGMENT && target >= V_008DFC_SQ_EXP_MRT) {
4040 LLVMValueRef val[4];
4041 unsigned index = target - V_008DFC_SQ_EXP_MRT;
4042 unsigned col_format = (ctx->options->key.fs.col_format >> (4 * index)) & 0xf;
4043 bool is_int8 = (ctx->options->key.fs.is_int8 >> index) & 1;
4044
4045 switch(col_format) {
4046 case V_028714_SPI_SHADER_ZERO:
4047 args[0] = LLVMConstInt(ctx->i32, 0x0, 0);
4048 args[3] = LLVMConstInt(ctx->i32, V_008DFC_SQ_EXP_NULL, 0);
4049 break;
4050
4051 case V_028714_SPI_SHADER_32_R:
4052 args[0] = LLVMConstInt(ctx->i32, 0x1, 0);
4053 args[5] = values[0];
4054 break;
4055
4056 case V_028714_SPI_SHADER_32_GR:
4057 args[0] = LLVMConstInt(ctx->i32, 0x3, 0);
4058 args[5] = values[0];
4059 args[6] = values[1];
4060 break;
4061
4062 case V_028714_SPI_SHADER_32_AR:
4063 args[0] = LLVMConstInt(ctx->i32, 0x9, 0);
4064 args[5] = values[0];
4065 args[8] = values[3];
4066 break;
4067
4068 case V_028714_SPI_SHADER_FP16_ABGR:
4069 args[4] = ctx->i32one;
4070
4071 for (unsigned chan = 0; chan < 2; chan++) {
4072 LLVMValueRef pack_args[2] = {
4073 values[2 * chan],
4074 values[2 * chan + 1]
4075 };
4076 LLVMValueRef packed;
4077
4078 packed = emit_llvm_intrinsic(ctx, "llvm.SI.packf16",
4079 ctx->i32, pack_args, 2,
4080 LLVMReadNoneAttribute);
4081 args[chan + 5] = packed;
4082 }
4083 break;
4084
4085 case V_028714_SPI_SHADER_UNORM16_ABGR:
4086 for (unsigned chan = 0; chan < 4; chan++) {
4087 val[chan] = emit_float_saturate(ctx, values[chan], 0, 1);
4088 val[chan] = LLVMBuildFMul(ctx->builder, val[chan],
4089 LLVMConstReal(ctx->f32, 65535), "");
4090 val[chan] = LLVMBuildFAdd(ctx->builder, val[chan],
4091 LLVMConstReal(ctx->f32, 0.5), "");
4092 val[chan] = LLVMBuildFPToUI(ctx->builder, val[chan],
4093 ctx->i32, "");
4094 }
4095
4096 args[4] = ctx->i32one;
4097 args[5] = emit_pack_int16(ctx, val[0], val[1]);
4098 args[6] = emit_pack_int16(ctx, val[2], val[3]);
4099 break;
4100
4101 case V_028714_SPI_SHADER_SNORM16_ABGR:
4102 for (unsigned chan = 0; chan < 4; chan++) {
4103 val[chan] = emit_float_saturate(ctx, values[chan], -1, 1);
4104 val[chan] = LLVMBuildFMul(ctx->builder, val[chan],
4105 LLVMConstReal(ctx->f32, 32767), "");
4106
4107 /* If positive, add 0.5, else add -0.5. */
4108 val[chan] = LLVMBuildFAdd(ctx->builder, val[chan],
4109 LLVMBuildSelect(ctx->builder,
4110 LLVMBuildFCmp(ctx->builder, LLVMRealOGE,
4111 val[chan], ctx->f32zero, ""),
4112 LLVMConstReal(ctx->f32, 0.5),
4113 LLVMConstReal(ctx->f32, -0.5), ""), "");
4114 val[chan] = LLVMBuildFPToSI(ctx->builder, val[chan], ctx->i32, "");
4115 }
4116
4117 args[4] = ctx->i32one;
4118 args[5] = emit_pack_int16(ctx, val[0], val[1]);
4119 args[6] = emit_pack_int16(ctx, val[2], val[3]);
4120 break;
4121
4122 case V_028714_SPI_SHADER_UINT16_ABGR: {
4123 LLVMValueRef max = LLVMConstInt(ctx->i32, is_int8 ? 255 : 65535, 0);
4124
4125 for (unsigned chan = 0; chan < 4; chan++) {
4126 val[chan] = to_integer(ctx, values[chan]);
4127 val[chan] = emit_minmax_int(ctx, LLVMIntULT, val[chan], max);
4128 }
4129
4130 args[4] = ctx->i32one;
4131 args[5] = emit_pack_int16(ctx, val[0], val[1]);
4132 args[6] = emit_pack_int16(ctx, val[2], val[3]);
4133 break;
4134 }
4135
4136 case V_028714_SPI_SHADER_SINT16_ABGR: {
4137 LLVMValueRef max = LLVMConstInt(ctx->i32, is_int8 ? 127 : 32767, 0);
4138 LLVMValueRef min = LLVMConstInt(ctx->i32, is_int8 ? -128 : -32768, 0);
4139
4140 /* Clamp. */
4141 for (unsigned chan = 0; chan < 4; chan++) {
4142 val[chan] = to_integer(ctx, values[chan]);
4143 val[chan] = emit_minmax_int(ctx, LLVMIntSLT, val[chan], max);
4144 val[chan] = emit_minmax_int(ctx, LLVMIntSGT, val[chan], min);
4145 }
4146
4147 args[4] = ctx->i32one;
4148 args[5] = emit_pack_int16(ctx, val[0], val[1]);
4149 args[6] = emit_pack_int16(ctx, val[2], val[3]);
4150 break;
4151 }
4152
4153 default:
4154 case V_028714_SPI_SHADER_32_ABGR:
4155 memcpy(&args[5], values, sizeof(values[0]) * 4);
4156 break;
4157 }
4158 } else
4159 memcpy(&args[5], values, sizeof(values[0]) * 4);
4160
4161 for (unsigned i = 5; i < 9; ++i)
4162 args[i] = to_float(ctx, args[i]);
4163 }
4164
4165 static void
4166 handle_vs_outputs_post(struct nir_to_llvm_context *ctx,
4167 struct nir_shader *nir)
4168 {
4169 uint32_t param_count = 0;
4170 unsigned target;
4171 unsigned pos_idx, num_pos_exports = 0;
4172 LLVMValueRef args[9];
4173 LLVMValueRef pos_args[4][9] = { { 0 } };
4174 LLVMValueRef psize_value = 0;
4175 int i;
4176 const uint64_t clip_mask = ctx->output_mask & ((1ull << VARYING_SLOT_CLIP_DIST0) |
4177 (1ull << VARYING_SLOT_CLIP_DIST1) |
4178 (1ull << VARYING_SLOT_CULL_DIST0) |
4179 (1ull << VARYING_SLOT_CULL_DIST1));
4180
4181 if (clip_mask) {
4182 LLVMValueRef slots[8];
4183 unsigned j;
4184
4185 if (ctx->shader_info->vs.cull_dist_mask)
4186 ctx->shader_info->vs.cull_dist_mask <<= ctx->num_clips;
4187
4188 i = VARYING_SLOT_CLIP_DIST0;
4189 for (j = 0; j < ctx->num_clips; j++)
4190 slots[j] = to_float(ctx, LLVMBuildLoad(ctx->builder,
4191 ctx->outputs[radeon_llvm_reg_index_soa(i, j)], ""));
4192 i = VARYING_SLOT_CULL_DIST0;
4193 for (j = 0; j < ctx->num_culls; j++)
4194 slots[ctx->num_clips + j] = to_float(ctx, LLVMBuildLoad(ctx->builder,
4195 ctx->outputs[radeon_llvm_reg_index_soa(i, j)], ""));
4196
4197 for (i = ctx->num_clips + ctx->num_culls; i < 8; i++)
4198 slots[i] = LLVMGetUndef(ctx->f32);
4199
4200 if (ctx->num_clips + ctx->num_culls > 4) {
4201 target = V_008DFC_SQ_EXP_POS + 3;
4202 si_llvm_init_export_args(ctx, &slots[4], target, args);
4203 memcpy(pos_args[target - V_008DFC_SQ_EXP_POS],
4204 args, sizeof(args));
4205 }
4206
4207 target = V_008DFC_SQ_EXP_POS + 2;
4208 si_llvm_init_export_args(ctx, &slots[0], target, args);
4209 memcpy(pos_args[target - V_008DFC_SQ_EXP_POS],
4210 args, sizeof(args));
4211
4212 }
4213
4214 for (unsigned i = 0; i < RADEON_LLVM_MAX_OUTPUTS; ++i) {
4215 LLVMValueRef values[4];
4216 if (!(ctx->output_mask & (1ull << i)))
4217 continue;
4218
4219 for (unsigned j = 0; j < 4; j++)
4220 values[j] = to_float(ctx, LLVMBuildLoad(ctx->builder,
4221 ctx->outputs[radeon_llvm_reg_index_soa(i, j)], ""));
4222
4223 if (i == VARYING_SLOT_POS) {
4224 target = V_008DFC_SQ_EXP_POS;
4225 } else if (i == VARYING_SLOT_CLIP_DIST0 ||
4226 i == VARYING_SLOT_CLIP_DIST1 ||
4227 i == VARYING_SLOT_CULL_DIST0 ||
4228 i == VARYING_SLOT_CULL_DIST1) {
4229 continue;
4230 } else if (i == VARYING_SLOT_PSIZ) {
4231 ctx->shader_info->vs.writes_pointsize = true;
4232 psize_value = values[0];
4233 continue;
4234 } else if (i >= VARYING_SLOT_VAR0) {
4235 ctx->shader_info->vs.export_mask |= 1u << (i - VARYING_SLOT_VAR0);
4236 target = V_008DFC_SQ_EXP_PARAM + param_count;
4237 param_count++;
4238 }
4239
4240 si_llvm_init_export_args(ctx, values, target, args);
4241
4242 if (target >= V_008DFC_SQ_EXP_POS &&
4243 target <= (V_008DFC_SQ_EXP_POS + 3)) {
4244 memcpy(pos_args[target - V_008DFC_SQ_EXP_POS],
4245 args, sizeof(args));
4246 } else {
4247 emit_llvm_intrinsic(ctx,
4248 "llvm.SI.export",
4249 LLVMVoidTypeInContext(ctx->context),
4250 args, 9, 0);
4251 }
4252 }
4253
4254 /* We need to add the position output manually if it's missing. */
4255 if (!pos_args[0][0]) {
4256 pos_args[0][0] = LLVMConstInt(ctx->i32, 0xf, false);
4257 pos_args[0][1] = ctx->i32zero; /* EXEC mask */
4258 pos_args[0][2] = ctx->i32zero; /* last export? */
4259 pos_args[0][3] = LLVMConstInt(ctx->i32, V_008DFC_SQ_EXP_POS, false);
4260 pos_args[0][4] = ctx->i32zero; /* COMPR flag */
4261 pos_args[0][5] = ctx->f32zero; /* X */
4262 pos_args[0][6] = ctx->f32zero; /* Y */
4263 pos_args[0][7] = ctx->f32zero; /* Z */
4264 pos_args[0][8] = ctx->f32one; /* W */
4265 }
4266
4267 if (ctx->shader_info->vs.writes_pointsize == true) {
4268 pos_args[1][0] = LLVMConstInt(ctx->i32, (ctx->shader_info->vs.writes_pointsize == true), false); /* writemask */
4269 pos_args[1][1] = ctx->i32zero; /* EXEC mask */
4270 pos_args[1][2] = ctx->i32zero; /* last export? */
4271 pos_args[1][3] = LLVMConstInt(ctx->i32, V_008DFC_SQ_EXP_POS + 1, false);
4272 pos_args[1][4] = ctx->i32zero; /* COMPR flag */
4273 pos_args[1][5] = ctx->f32zero; /* X */
4274 pos_args[1][6] = ctx->f32zero; /* Y */
4275 pos_args[1][7] = ctx->f32zero; /* Z */
4276 pos_args[1][8] = ctx->f32zero; /* W */
4277
4278 if (ctx->shader_info->vs.writes_pointsize == true)
4279 pos_args[1][5] = psize_value;
4280 }
4281 for (i = 0; i < 4; i++) {
4282 if (pos_args[i][0])
4283 num_pos_exports++;
4284 }
4285
4286 pos_idx = 0;
4287 for (i = 0; i < 4; i++) {
4288 if (!pos_args[i][0])
4289 continue;
4290
4291 /* Specify the target we are exporting */
4292 pos_args[i][3] = LLVMConstInt(ctx->i32, V_008DFC_SQ_EXP_POS + pos_idx++, false);
4293 if (pos_idx == num_pos_exports)
4294 pos_args[i][2] = ctx->i32one;
4295 emit_llvm_intrinsic(ctx,
4296 "llvm.SI.export",
4297 LLVMVoidTypeInContext(ctx->context),
4298 pos_args[i], 9, 0);
4299 }
4300
4301 ctx->shader_info->vs.pos_exports = num_pos_exports;
4302 ctx->shader_info->vs.param_exports = param_count;
4303 }
4304
4305 static void
4306 si_export_mrt_color(struct nir_to_llvm_context *ctx,
4307 LLVMValueRef *color, unsigned param, bool is_last)
4308 {
4309 LLVMValueRef args[9];
4310 /* Export */
4311 si_llvm_init_export_args(ctx, color, param,
4312 args);
4313
4314 if (is_last) {
4315 args[1] = ctx->i32one; /* whether the EXEC mask is valid */
4316 args[2] = ctx->i32one; /* DONE bit */
4317 } else if (args[0] == ctx->i32zero)
4318 return; /* unnecessary NULL export */
4319
4320 emit_llvm_intrinsic(ctx, "llvm.SI.export",
4321 ctx->voidt, args, 9, 0);
4322 }
4323
4324 static void
4325 si_export_mrt_z(struct nir_to_llvm_context *ctx,
4326 LLVMValueRef depth, LLVMValueRef stencil,
4327 LLVMValueRef samplemask)
4328 {
4329 LLVMValueRef args[9];
4330 unsigned mask = 0;
4331 args[1] = ctx->i32one; /* whether the EXEC mask is valid */
4332 args[2] = ctx->i32one; /* DONE bit */
4333 /* Specify the target we are exporting */
4334 args[3] = LLVMConstInt(ctx->i32, V_008DFC_SQ_EXP_MRTZ, false);
4335
4336 args[4] = ctx->i32zero; /* COMP flag */
4337 args[5] = LLVMGetUndef(ctx->f32); /* R, depth */
4338 args[6] = LLVMGetUndef(ctx->f32); /* G, stencil test val[0:7], stencil op val[8:15] */
4339 args[7] = LLVMGetUndef(ctx->f32); /* B, sample mask */
4340 args[8] = LLVMGetUndef(ctx->f32); /* A, alpha to mask */
4341
4342 if (depth) {
4343 args[5] = depth;
4344 mask |= 0x1;
4345 }
4346
4347 if (stencil) {
4348 args[6] = stencil;
4349 mask |= 0x2;
4350 }
4351
4352 if (samplemask) {
4353 args[7] = samplemask;
4354 mask |= 0x04;
4355 }
4356
4357 /* SI (except OLAND) has a bug that it only looks
4358 * at the X writemask component. */
4359 if (ctx->options->chip_class == SI &&
4360 ctx->options->family != CHIP_OLAND)
4361 mask |= 0x01;
4362
4363 args[0] = LLVMConstInt(ctx->i32, mask, false);
4364 emit_llvm_intrinsic(ctx, "llvm.SI.export",
4365 ctx->voidt, args, 9, 0);
4366 }
4367
4368 static void
4369 handle_fs_outputs_post(struct nir_to_llvm_context *ctx,
4370 struct nir_shader *nir)
4371 {
4372 unsigned index = 0;
4373 LLVMValueRef depth = NULL, stencil = NULL, samplemask = NULL;
4374
4375 for (unsigned i = 0; i < RADEON_LLVM_MAX_OUTPUTS; ++i) {
4376 LLVMValueRef values[4];
4377
4378 if (!(ctx->output_mask & (1ull << i)))
4379 continue;
4380
4381 if (i == FRAG_RESULT_DEPTH) {
4382 ctx->shader_info->fs.writes_z = true;
4383 depth = to_float(ctx, LLVMBuildLoad(ctx->builder,
4384 ctx->outputs[radeon_llvm_reg_index_soa(i, 0)], ""));
4385 } else if (i == FRAG_RESULT_STENCIL) {
4386 ctx->shader_info->fs.writes_stencil = true;
4387 stencil = to_float(ctx, LLVMBuildLoad(ctx->builder,
4388 ctx->outputs[radeon_llvm_reg_index_soa(i, 0)], ""));
4389 } else {
4390 bool last = false;
4391 for (unsigned j = 0; j < 4; j++)
4392 values[j] = to_float(ctx, LLVMBuildLoad(ctx->builder,
4393 ctx->outputs[radeon_llvm_reg_index_soa(i, j)], ""));
4394
4395 if (!ctx->shader_info->fs.writes_z && !ctx->shader_info->fs.writes_stencil)
4396 last = ctx->output_mask <= ((1ull << (i + 1)) - 1);
4397
4398 si_export_mrt_color(ctx, values, V_008DFC_SQ_EXP_MRT + index, last);
4399 index++;
4400 }
4401 }
4402
4403 if (depth || stencil)
4404 si_export_mrt_z(ctx, depth, stencil, samplemask);
4405 else if (!index)
4406 si_export_mrt_color(ctx, NULL, V_008DFC_SQ_EXP_NULL, true);
4407
4408 ctx->shader_info->fs.output_mask = index ? ((1ull << index) - 1) : 0;
4409 }
4410
4411 static void
4412 handle_shader_outputs_post(struct nir_to_llvm_context *ctx,
4413 struct nir_shader *nir)
4414 {
4415 switch (ctx->stage) {
4416 case MESA_SHADER_VERTEX:
4417 handle_vs_outputs_post(ctx, nir);
4418 break;
4419 case MESA_SHADER_FRAGMENT:
4420 handle_fs_outputs_post(ctx, nir);
4421 break;
4422 default:
4423 break;
4424 }
4425 }
4426
4427 static void
4428 handle_shared_compute_var(struct nir_to_llvm_context *ctx,
4429 struct nir_variable *variable, uint32_t *offset, int idx)
4430 {
4431 unsigned size = glsl_count_attribute_slots(variable->type, false);
4432 variable->data.driver_location = *offset;
4433 *offset += size;
4434 }
4435
4436 static void ac_llvm_finalize_module(struct nir_to_llvm_context * ctx)
4437 {
4438 LLVMPassManagerRef passmgr;
4439 /* Create the pass manager */
4440 passmgr = LLVMCreateFunctionPassManagerForModule(
4441 ctx->module);
4442
4443 /* This pass should eliminate all the load and store instructions */
4444 LLVMAddPromoteMemoryToRegisterPass(passmgr);
4445
4446 /* Add some optimization passes */
4447 LLVMAddScalarReplAggregatesPass(passmgr);
4448 LLVMAddLICMPass(passmgr);
4449 LLVMAddAggressiveDCEPass(passmgr);
4450 LLVMAddCFGSimplificationPass(passmgr);
4451 LLVMAddInstructionCombiningPass(passmgr);
4452
4453 /* Run the pass */
4454 LLVMInitializeFunctionPassManager(passmgr);
4455 LLVMRunFunctionPassManager(passmgr, ctx->main_function);
4456 LLVMFinalizeFunctionPassManager(passmgr);
4457
4458 LLVMDisposeBuilder(ctx->builder);
4459 LLVMDisposePassManager(passmgr);
4460 }
4461
4462 static
4463 LLVMModuleRef ac_translate_nir_to_llvm(LLVMTargetMachineRef tm,
4464 struct nir_shader *nir,
4465 struct ac_shader_variant_info *shader_info,
4466 const struct ac_nir_compiler_options *options)
4467 {
4468 struct nir_to_llvm_context ctx = {0};
4469 struct nir_function *func;
4470 ctx.options = options;
4471 ctx.shader_info = shader_info;
4472 ctx.context = LLVMContextCreate();
4473 ctx.module = LLVMModuleCreateWithNameInContext("shader", ctx.context);
4474
4475 memset(shader_info, 0, sizeof(*shader_info));
4476
4477 LLVMSetTarget(ctx.module, "amdgcn--");
4478 setup_types(&ctx);
4479
4480 ctx.builder = LLVMCreateBuilderInContext(ctx.context);
4481 ctx.stage = nir->stage;
4482
4483 create_function(&ctx, nir);
4484
4485 if (nir->stage == MESA_SHADER_COMPUTE) {
4486 int num_shared = 0;
4487 nir_foreach_variable(variable, &nir->shared)
4488 num_shared++;
4489 if (num_shared) {
4490 int idx = 0;
4491 uint32_t shared_size = 0;
4492 LLVMValueRef var;
4493 LLVMTypeRef i8p = LLVMPointerType(ctx.i8, LOCAL_ADDR_SPACE);
4494 nir_foreach_variable(variable, &nir->shared) {
4495 handle_shared_compute_var(&ctx, variable, &shared_size, idx);
4496 idx++;
4497 }
4498
4499 shared_size *= 4;
4500 var = LLVMAddGlobalInAddressSpace(ctx.module,
4501 LLVMArrayType(ctx.i8, shared_size),
4502 "compute_lds",
4503 LOCAL_ADDR_SPACE);
4504 LLVMSetAlignment(var, 4);
4505 ctx.shared_memory = LLVMBuildBitCast(ctx.builder, var, i8p, "");
4506 }
4507 }
4508
4509 nir_foreach_variable(variable, &nir->inputs)
4510 handle_shader_input_decl(&ctx, variable);
4511
4512 if (nir->stage == MESA_SHADER_FRAGMENT)
4513 handle_fs_inputs_pre(&ctx, nir);
4514
4515 nir_foreach_variable(variable, &nir->outputs)
4516 handle_shader_output_decl(&ctx, variable);
4517
4518 ctx.defs = _mesa_hash_table_create(NULL, _mesa_hash_pointer,
4519 _mesa_key_pointer_equal);
4520 ctx.phis = _mesa_hash_table_create(NULL, _mesa_hash_pointer,
4521 _mesa_key_pointer_equal);
4522
4523 func = (struct nir_function *)exec_list_get_head(&nir->functions);
4524
4525 setup_locals(&ctx, func);
4526
4527 visit_cf_list(&ctx, &func->impl->body);
4528 phi_post_pass(&ctx);
4529
4530 handle_shader_outputs_post(&ctx, nir);
4531 LLVMBuildRetVoid(ctx.builder);
4532
4533 ac_llvm_finalize_module(&ctx);
4534 free(ctx.locals);
4535 ralloc_free(ctx.defs);
4536 ralloc_free(ctx.phis);
4537
4538 return ctx.module;
4539 }
4540
4541 static void ac_diagnostic_handler(LLVMDiagnosticInfoRef di, void *context)
4542 {
4543 unsigned *retval = (unsigned *)context;
4544 LLVMDiagnosticSeverity severity = LLVMGetDiagInfoSeverity(di);
4545 char *description = LLVMGetDiagInfoDescription(di);
4546
4547 if (severity == LLVMDSError) {
4548 *retval = 1;
4549 fprintf(stderr, "LLVM triggered Diagnostic Handler: %s\n",
4550 description);
4551 }
4552
4553 LLVMDisposeMessage(description);
4554 }
4555
4556 static unsigned ac_llvm_compile(LLVMModuleRef M,
4557 struct ac_shader_binary *binary,
4558 LLVMTargetMachineRef tm)
4559 {
4560 unsigned retval = 0;
4561 char *err;
4562 LLVMContextRef llvm_ctx;
4563 LLVMMemoryBufferRef out_buffer;
4564 unsigned buffer_size;
4565 const char *buffer_data;
4566 LLVMBool mem_err;
4567
4568 /* Setup Diagnostic Handler*/
4569 llvm_ctx = LLVMGetModuleContext(M);
4570
4571 LLVMContextSetDiagnosticHandler(llvm_ctx, ac_diagnostic_handler,
4572 &retval);
4573
4574 /* Compile IR*/
4575 mem_err = LLVMTargetMachineEmitToMemoryBuffer(tm, M, LLVMObjectFile,
4576 &err, &out_buffer);
4577
4578 /* Process Errors/Warnings */
4579 if (mem_err) {
4580 fprintf(stderr, "%s: %s", __FUNCTION__, err);
4581 free(err);
4582 retval = 1;
4583 goto out;
4584 }
4585
4586 /* Extract Shader Code*/
4587 buffer_size = LLVMGetBufferSize(out_buffer);
4588 buffer_data = LLVMGetBufferStart(out_buffer);
4589
4590 ac_elf_read(buffer_data, buffer_size, binary);
4591
4592 /* Clean up */
4593 LLVMDisposeMemoryBuffer(out_buffer);
4594
4595 out:
4596 return retval;
4597 }
4598
4599 void ac_compile_nir_shader(LLVMTargetMachineRef tm,
4600 struct ac_shader_binary *binary,
4601 struct ac_shader_config *config,
4602 struct ac_shader_variant_info *shader_info,
4603 struct nir_shader *nir,
4604 const struct ac_nir_compiler_options *options,
4605 bool dump_shader)
4606 {
4607
4608 LLVMModuleRef llvm_module = ac_translate_nir_to_llvm(tm, nir, shader_info,
4609 options);
4610 if (dump_shader)
4611 LLVMDumpModule(llvm_module);
4612
4613 memset(binary, 0, sizeof(*binary));
4614 int v = ac_llvm_compile(llvm_module, binary, tm);
4615 if (v) {
4616 fprintf(stderr, "compile failed\n");
4617 }
4618
4619 if (dump_shader)
4620 fprintf(stderr, "disasm:\n%s\n", binary->disasm_string);
4621
4622 ac_shader_binary_read_config(binary, config, 0);
4623
4624 LLVMContextRef ctx = LLVMGetModuleContext(llvm_module);
4625 LLVMDisposeModule(llvm_module);
4626 LLVMContextDispose(ctx);
4627
4628 if (nir->stage == MESA_SHADER_FRAGMENT) {
4629 shader_info->num_input_vgprs = 0;
4630 if (G_0286CC_PERSP_SAMPLE_ENA(config->spi_ps_input_addr))
4631 shader_info->num_input_vgprs += 2;
4632 if (G_0286CC_PERSP_CENTER_ENA(config->spi_ps_input_addr))
4633 shader_info->num_input_vgprs += 2;
4634 if (G_0286CC_PERSP_CENTROID_ENA(config->spi_ps_input_addr))
4635 shader_info->num_input_vgprs += 2;
4636 if (G_0286CC_PERSP_PULL_MODEL_ENA(config->spi_ps_input_addr))
4637 shader_info->num_input_vgprs += 3;
4638 if (G_0286CC_LINEAR_SAMPLE_ENA(config->spi_ps_input_addr))
4639 shader_info->num_input_vgprs += 2;
4640 if (G_0286CC_LINEAR_CENTER_ENA(config->spi_ps_input_addr))
4641 shader_info->num_input_vgprs += 2;
4642 if (G_0286CC_LINEAR_CENTROID_ENA(config->spi_ps_input_addr))
4643 shader_info->num_input_vgprs += 2;
4644 if (G_0286CC_LINE_STIPPLE_TEX_ENA(config->spi_ps_input_addr))
4645 shader_info->num_input_vgprs += 1;
4646 if (G_0286CC_POS_X_FLOAT_ENA(config->spi_ps_input_addr))
4647 shader_info->num_input_vgprs += 1;
4648 if (G_0286CC_POS_Y_FLOAT_ENA(config->spi_ps_input_addr))
4649 shader_info->num_input_vgprs += 1;
4650 if (G_0286CC_POS_Z_FLOAT_ENA(config->spi_ps_input_addr))
4651 shader_info->num_input_vgprs += 1;
4652 if (G_0286CC_POS_W_FLOAT_ENA(config->spi_ps_input_addr))
4653 shader_info->num_input_vgprs += 1;
4654 if (G_0286CC_FRONT_FACE_ENA(config->spi_ps_input_addr))
4655 shader_info->num_input_vgprs += 1;
4656 if (G_0286CC_ANCILLARY_ENA(config->spi_ps_input_addr))
4657 shader_info->num_input_vgprs += 1;
4658 if (G_0286CC_SAMPLE_COVERAGE_ENA(config->spi_ps_input_addr))
4659 shader_info->num_input_vgprs += 1;
4660 if (G_0286CC_POS_FIXED_PT_ENA(config->spi_ps_input_addr))
4661 shader_info->num_input_vgprs += 1;
4662 }
4663 config->num_vgprs = MAX2(config->num_vgprs, shader_info->num_input_vgprs);
4664
4665 /* +3 for scratch wave offset and VCC */
4666 config->num_sgprs = MAX2(config->num_sgprs,
4667 shader_info->num_input_sgprs + 3);
4668 if (nir->stage == MESA_SHADER_COMPUTE) {
4669 for (int i = 0; i < 3; ++i)
4670 shader_info->cs.block_size[i] = nir->info->cs.local_size[i];
4671 }
4672
4673 if (nir->stage == MESA_SHADER_FRAGMENT)
4674 shader_info->fs.early_fragment_test = nir->info->fs.early_fragment_tests;
4675 }