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[mesa.git] / src / amd / common / ac_nir_to_llvm.c
1 /*
2 * Copyright © 2016 Bas Nieuwenhuizen
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
21 * IN THE SOFTWARE.
22 */
23
24 #include "ac_nir_to_llvm.h"
25 #include "ac_llvm_build.h"
26 #include "ac_llvm_util.h"
27 #include "ac_binary.h"
28 #include "sid.h"
29 #include "nir/nir.h"
30 #include "nir/nir_deref.h"
31 #include "util/bitscan.h"
32 #include "util/u_math.h"
33 #include "ac_shader_abi.h"
34 #include "ac_shader_util.h"
35
36 struct ac_nir_context {
37 struct ac_llvm_context ac;
38 struct ac_shader_abi *abi;
39
40 gl_shader_stage stage;
41
42 LLVMValueRef *ssa_defs;
43
44 struct hash_table *defs;
45 struct hash_table *phis;
46 struct hash_table *vars;
47
48 LLVMValueRef main_function;
49 LLVMBasicBlockRef continue_block;
50 LLVMBasicBlockRef break_block;
51
52 int num_locals;
53 LLVMValueRef *locals;
54 };
55
56 static LLVMValueRef get_sampler_desc(struct ac_nir_context *ctx,
57 nir_deref_instr *deref_instr,
58 enum ac_descriptor_type desc_type,
59 const nir_tex_instr *instr,
60 bool image, bool write);
61
62 static void
63 build_store_values_extended(struct ac_llvm_context *ac,
64 LLVMValueRef *values,
65 unsigned value_count,
66 unsigned value_stride,
67 LLVMValueRef vec)
68 {
69 LLVMBuilderRef builder = ac->builder;
70 unsigned i;
71
72 for (i = 0; i < value_count; i++) {
73 LLVMValueRef ptr = values[i * value_stride];
74 LLVMValueRef index = LLVMConstInt(ac->i32, i, false);
75 LLVMValueRef value = LLVMBuildExtractElement(builder, vec, index, "");
76 LLVMBuildStore(builder, value, ptr);
77 }
78 }
79
80 static enum ac_image_dim
81 get_ac_sampler_dim(const struct ac_llvm_context *ctx, enum glsl_sampler_dim dim,
82 bool is_array)
83 {
84 switch (dim) {
85 case GLSL_SAMPLER_DIM_1D:
86 if (ctx->chip_class >= GFX9)
87 return is_array ? ac_image_2darray : ac_image_2d;
88 return is_array ? ac_image_1darray : ac_image_1d;
89 case GLSL_SAMPLER_DIM_2D:
90 case GLSL_SAMPLER_DIM_RECT:
91 case GLSL_SAMPLER_DIM_EXTERNAL:
92 return is_array ? ac_image_2darray : ac_image_2d;
93 case GLSL_SAMPLER_DIM_3D:
94 return ac_image_3d;
95 case GLSL_SAMPLER_DIM_CUBE:
96 return ac_image_cube;
97 case GLSL_SAMPLER_DIM_MS:
98 return is_array ? ac_image_2darraymsaa : ac_image_2dmsaa;
99 case GLSL_SAMPLER_DIM_SUBPASS:
100 return ac_image_2darray;
101 case GLSL_SAMPLER_DIM_SUBPASS_MS:
102 return ac_image_2darraymsaa;
103 default:
104 unreachable("bad sampler dim");
105 }
106 }
107
108 static enum ac_image_dim
109 get_ac_image_dim(const struct ac_llvm_context *ctx, enum glsl_sampler_dim sdim,
110 bool is_array)
111 {
112 enum ac_image_dim dim = get_ac_sampler_dim(ctx, sdim, is_array);
113
114 if (dim == ac_image_cube ||
115 (ctx->chip_class <= VI && dim == ac_image_3d))
116 dim = ac_image_2darray;
117
118 return dim;
119 }
120
121 static LLVMTypeRef get_def_type(struct ac_nir_context *ctx,
122 const nir_ssa_def *def)
123 {
124 LLVMTypeRef type = LLVMIntTypeInContext(ctx->ac.context, def->bit_size);
125 if (def->num_components > 1) {
126 type = LLVMVectorType(type, def->num_components);
127 }
128 return type;
129 }
130
131 static LLVMValueRef get_src(struct ac_nir_context *nir, nir_src src)
132 {
133 assert(src.is_ssa);
134 return nir->ssa_defs[src.ssa->index];
135 }
136
137 static LLVMValueRef
138 get_memory_ptr(struct ac_nir_context *ctx, nir_src src)
139 {
140 LLVMValueRef ptr = get_src(ctx, src);
141 ptr = LLVMBuildGEP(ctx->ac.builder, ctx->ac.lds, &ptr, 1, "");
142 int addr_space = LLVMGetPointerAddressSpace(LLVMTypeOf(ptr));
143
144 return LLVMBuildBitCast(ctx->ac.builder, ptr,
145 LLVMPointerType(ctx->ac.i32, addr_space), "");
146 }
147
148 static LLVMBasicBlockRef get_block(struct ac_nir_context *nir,
149 const struct nir_block *b)
150 {
151 struct hash_entry *entry = _mesa_hash_table_search(nir->defs, b);
152 return (LLVMBasicBlockRef)entry->data;
153 }
154
155 static LLVMValueRef get_alu_src(struct ac_nir_context *ctx,
156 nir_alu_src src,
157 unsigned num_components)
158 {
159 LLVMValueRef value = get_src(ctx, src.src);
160 bool need_swizzle = false;
161
162 assert(value);
163 unsigned src_components = ac_get_llvm_num_components(value);
164 for (unsigned i = 0; i < num_components; ++i) {
165 assert(src.swizzle[i] < src_components);
166 if (src.swizzle[i] != i)
167 need_swizzle = true;
168 }
169
170 if (need_swizzle || num_components != src_components) {
171 LLVMValueRef masks[] = {
172 LLVMConstInt(ctx->ac.i32, src.swizzle[0], false),
173 LLVMConstInt(ctx->ac.i32, src.swizzle[1], false),
174 LLVMConstInt(ctx->ac.i32, src.swizzle[2], false),
175 LLVMConstInt(ctx->ac.i32, src.swizzle[3], false)};
176
177 if (src_components > 1 && num_components == 1) {
178 value = LLVMBuildExtractElement(ctx->ac.builder, value,
179 masks[0], "");
180 } else if (src_components == 1 && num_components > 1) {
181 LLVMValueRef values[] = {value, value, value, value};
182 value = ac_build_gather_values(&ctx->ac, values, num_components);
183 } else {
184 LLVMValueRef swizzle = LLVMConstVector(masks, num_components);
185 value = LLVMBuildShuffleVector(ctx->ac.builder, value, value,
186 swizzle, "");
187 }
188 }
189 assert(!src.negate);
190 assert(!src.abs);
191 return value;
192 }
193
194 static LLVMValueRef emit_int_cmp(struct ac_llvm_context *ctx,
195 LLVMIntPredicate pred, LLVMValueRef src0,
196 LLVMValueRef src1)
197 {
198 LLVMValueRef result = LLVMBuildICmp(ctx->builder, pred, src0, src1, "");
199 return LLVMBuildSelect(ctx->builder, result,
200 LLVMConstInt(ctx->i32, 0xFFFFFFFF, false),
201 ctx->i32_0, "");
202 }
203
204 static LLVMValueRef emit_float_cmp(struct ac_llvm_context *ctx,
205 LLVMRealPredicate pred, LLVMValueRef src0,
206 LLVMValueRef src1)
207 {
208 LLVMValueRef result;
209 src0 = ac_to_float(ctx, src0);
210 src1 = ac_to_float(ctx, src1);
211 result = LLVMBuildFCmp(ctx->builder, pred, src0, src1, "");
212 return LLVMBuildSelect(ctx->builder, result,
213 LLVMConstInt(ctx->i32, 0xFFFFFFFF, false),
214 ctx->i32_0, "");
215 }
216
217 static LLVMValueRef emit_intrin_1f_param(struct ac_llvm_context *ctx,
218 const char *intrin,
219 LLVMTypeRef result_type,
220 LLVMValueRef src0)
221 {
222 char name[64];
223 LLVMValueRef params[] = {
224 ac_to_float(ctx, src0),
225 };
226
227 MAYBE_UNUSED const int length = snprintf(name, sizeof(name), "%s.f%d", intrin,
228 ac_get_elem_bits(ctx, result_type));
229 assert(length < sizeof(name));
230 return ac_build_intrinsic(ctx, name, result_type, params, 1, AC_FUNC_ATTR_READNONE);
231 }
232
233 static LLVMValueRef emit_intrin_2f_param(struct ac_llvm_context *ctx,
234 const char *intrin,
235 LLVMTypeRef result_type,
236 LLVMValueRef src0, LLVMValueRef src1)
237 {
238 char name[64];
239 LLVMValueRef params[] = {
240 ac_to_float(ctx, src0),
241 ac_to_float(ctx, src1),
242 };
243
244 MAYBE_UNUSED const int length = snprintf(name, sizeof(name), "%s.f%d", intrin,
245 ac_get_elem_bits(ctx, result_type));
246 assert(length < sizeof(name));
247 return ac_build_intrinsic(ctx, name, result_type, params, 2, AC_FUNC_ATTR_READNONE);
248 }
249
250 static LLVMValueRef emit_intrin_3f_param(struct ac_llvm_context *ctx,
251 const char *intrin,
252 LLVMTypeRef result_type,
253 LLVMValueRef src0, LLVMValueRef src1, LLVMValueRef src2)
254 {
255 char name[64];
256 LLVMValueRef params[] = {
257 ac_to_float(ctx, src0),
258 ac_to_float(ctx, src1),
259 ac_to_float(ctx, src2),
260 };
261
262 MAYBE_UNUSED const int length = snprintf(name, sizeof(name), "%s.f%d", intrin,
263 ac_get_elem_bits(ctx, result_type));
264 assert(length < sizeof(name));
265 return ac_build_intrinsic(ctx, name, result_type, params, 3, AC_FUNC_ATTR_READNONE);
266 }
267
268 static LLVMValueRef emit_bcsel(struct ac_llvm_context *ctx,
269 LLVMValueRef src0, LLVMValueRef src1, LLVMValueRef src2)
270 {
271 LLVMValueRef v = LLVMBuildICmp(ctx->builder, LLVMIntNE, src0,
272 ctx->i32_0, "");
273 return LLVMBuildSelect(ctx->builder, v,
274 ac_to_integer_or_pointer(ctx, src1),
275 ac_to_integer_or_pointer(ctx, src2), "");
276 }
277
278 static LLVMValueRef emit_minmax_int(struct ac_llvm_context *ctx,
279 LLVMIntPredicate pred,
280 LLVMValueRef src0, LLVMValueRef src1)
281 {
282 return LLVMBuildSelect(ctx->builder,
283 LLVMBuildICmp(ctx->builder, pred, src0, src1, ""),
284 src0,
285 src1, "");
286
287 }
288 static LLVMValueRef emit_iabs(struct ac_llvm_context *ctx,
289 LLVMValueRef src0)
290 {
291 return emit_minmax_int(ctx, LLVMIntSGT, src0,
292 LLVMBuildNeg(ctx->builder, src0, ""));
293 }
294
295 static LLVMValueRef emit_uint_carry(struct ac_llvm_context *ctx,
296 const char *intrin,
297 LLVMValueRef src0, LLVMValueRef src1)
298 {
299 LLVMTypeRef ret_type;
300 LLVMTypeRef types[] = { ctx->i32, ctx->i1 };
301 LLVMValueRef res;
302 LLVMValueRef params[] = { src0, src1 };
303 ret_type = LLVMStructTypeInContext(ctx->context, types,
304 2, true);
305
306 res = ac_build_intrinsic(ctx, intrin, ret_type,
307 params, 2, AC_FUNC_ATTR_READNONE);
308
309 res = LLVMBuildExtractValue(ctx->builder, res, 1, "");
310 res = LLVMBuildZExt(ctx->builder, res, ctx->i32, "");
311 return res;
312 }
313
314 static LLVMValueRef emit_b2f(struct ac_llvm_context *ctx,
315 LLVMValueRef src0,
316 unsigned bitsize)
317 {
318 LLVMValueRef result = LLVMBuildAnd(ctx->builder, src0,
319 LLVMBuildBitCast(ctx->builder, LLVMConstReal(ctx->f32, 1.0), ctx->i32, ""),
320 "");
321 result = LLVMBuildBitCast(ctx->builder, result, ctx->f32, "");
322
323 if (bitsize == 32)
324 return result;
325
326 return LLVMBuildFPExt(ctx->builder, result, ctx->f64, "");
327 }
328
329 static LLVMValueRef emit_f2b(struct ac_llvm_context *ctx,
330 LLVMValueRef src0)
331 {
332 src0 = ac_to_float(ctx, src0);
333 LLVMValueRef zero = LLVMConstNull(LLVMTypeOf(src0));
334 return LLVMBuildSExt(ctx->builder,
335 LLVMBuildFCmp(ctx->builder, LLVMRealUNE, src0, zero, ""),
336 ctx->i32, "");
337 }
338
339 static LLVMValueRef emit_b2i(struct ac_llvm_context *ctx,
340 LLVMValueRef src0,
341 unsigned bitsize)
342 {
343 LLVMValueRef result = LLVMBuildAnd(ctx->builder, src0, ctx->i32_1, "");
344
345 if (bitsize == 32)
346 return result;
347
348 return LLVMBuildZExt(ctx->builder, result, ctx->i64, "");
349 }
350
351 static LLVMValueRef emit_i2b(struct ac_llvm_context *ctx,
352 LLVMValueRef src0)
353 {
354 LLVMValueRef zero = LLVMConstNull(LLVMTypeOf(src0));
355 return LLVMBuildSExt(ctx->builder,
356 LLVMBuildICmp(ctx->builder, LLVMIntNE, src0, zero, ""),
357 ctx->i32, "");
358 }
359
360 static LLVMValueRef emit_f2f16(struct ac_llvm_context *ctx,
361 LLVMValueRef src0)
362 {
363 LLVMValueRef result;
364 LLVMValueRef cond = NULL;
365
366 src0 = ac_to_float(ctx, src0);
367 result = LLVMBuildFPTrunc(ctx->builder, src0, ctx->f16, "");
368
369 if (ctx->chip_class >= VI) {
370 LLVMValueRef args[2];
371 /* Check if the result is a denormal - and flush to 0 if so. */
372 args[0] = result;
373 args[1] = LLVMConstInt(ctx->i32, N_SUBNORMAL | P_SUBNORMAL, false);
374 cond = ac_build_intrinsic(ctx, "llvm.amdgcn.class.f16", ctx->i1, args, 2, AC_FUNC_ATTR_READNONE);
375 }
376
377 /* need to convert back up to f32 */
378 result = LLVMBuildFPExt(ctx->builder, result, ctx->f32, "");
379
380 if (ctx->chip_class >= VI)
381 result = LLVMBuildSelect(ctx->builder, cond, ctx->f32_0, result, "");
382 else {
383 /* for SI/CIK */
384 /* 0x38800000 is smallest half float value (2^-14) in 32-bit float,
385 * so compare the result and flush to 0 if it's smaller.
386 */
387 LLVMValueRef temp, cond2;
388 temp = emit_intrin_1f_param(ctx, "llvm.fabs", ctx->f32, result);
389 cond = LLVMBuildFCmp(ctx->builder, LLVMRealUGT,
390 LLVMBuildBitCast(ctx->builder, LLVMConstInt(ctx->i32, 0x38800000, false), ctx->f32, ""),
391 temp, "");
392 cond2 = LLVMBuildFCmp(ctx->builder, LLVMRealUNE,
393 temp, ctx->f32_0, "");
394 cond = LLVMBuildAnd(ctx->builder, cond, cond2, "");
395 result = LLVMBuildSelect(ctx->builder, cond, ctx->f32_0, result, "");
396 }
397 return result;
398 }
399
400 static LLVMValueRef emit_umul_high(struct ac_llvm_context *ctx,
401 LLVMValueRef src0, LLVMValueRef src1)
402 {
403 LLVMValueRef dst64, result;
404 src0 = LLVMBuildZExt(ctx->builder, src0, ctx->i64, "");
405 src1 = LLVMBuildZExt(ctx->builder, src1, ctx->i64, "");
406
407 dst64 = LLVMBuildMul(ctx->builder, src0, src1, "");
408 dst64 = LLVMBuildLShr(ctx->builder, dst64, LLVMConstInt(ctx->i64, 32, false), "");
409 result = LLVMBuildTrunc(ctx->builder, dst64, ctx->i32, "");
410 return result;
411 }
412
413 static LLVMValueRef emit_imul_high(struct ac_llvm_context *ctx,
414 LLVMValueRef src0, LLVMValueRef src1)
415 {
416 LLVMValueRef dst64, result;
417 src0 = LLVMBuildSExt(ctx->builder, src0, ctx->i64, "");
418 src1 = LLVMBuildSExt(ctx->builder, src1, ctx->i64, "");
419
420 dst64 = LLVMBuildMul(ctx->builder, src0, src1, "");
421 dst64 = LLVMBuildAShr(ctx->builder, dst64, LLVMConstInt(ctx->i64, 32, false), "");
422 result = LLVMBuildTrunc(ctx->builder, dst64, ctx->i32, "");
423 return result;
424 }
425
426 static LLVMValueRef emit_bitfield_extract(struct ac_llvm_context *ctx,
427 bool is_signed,
428 const LLVMValueRef srcs[3])
429 {
430 LLVMValueRef result;
431
432 /* FIXME: LLVM 7+ returns incorrect result when count is 0.
433 * https://bugs.freedesktop.org/show_bug.cgi?id=107276
434 */
435 LLVMValueRef zero = ctx->i32_0;
436 LLVMValueRef icond1 = LLVMBuildICmp(ctx->builder, LLVMIntEQ, srcs[2], LLVMConstInt(ctx->i32, 32, false), "");
437 LLVMValueRef icond2 = LLVMBuildICmp(ctx->builder, LLVMIntEQ, srcs[2], zero, "");
438
439 result = ac_build_bfe(ctx, srcs[0], srcs[1], srcs[2], is_signed);
440 result = LLVMBuildSelect(ctx->builder, icond1, srcs[0], result, "");
441 result = LLVMBuildSelect(ctx->builder, icond2, zero, result, "");
442
443 return result;
444 }
445
446 static LLVMValueRef emit_bitfield_insert(struct ac_llvm_context *ctx,
447 LLVMValueRef src0, LLVMValueRef src1,
448 LLVMValueRef src2, LLVMValueRef src3)
449 {
450 LLVMValueRef bfi_args[3], result;
451
452 bfi_args[0] = LLVMBuildShl(ctx->builder,
453 LLVMBuildSub(ctx->builder,
454 LLVMBuildShl(ctx->builder,
455 ctx->i32_1,
456 src3, ""),
457 ctx->i32_1, ""),
458 src2, "");
459 bfi_args[1] = LLVMBuildShl(ctx->builder, src1, src2, "");
460 bfi_args[2] = src0;
461
462 LLVMValueRef icond = LLVMBuildICmp(ctx->builder, LLVMIntEQ, src3, LLVMConstInt(ctx->i32, 32, false), "");
463
464 /* Calculate:
465 * (arg0 & arg1) | (~arg0 & arg2) = arg2 ^ (arg0 & (arg1 ^ arg2)
466 * Use the right-hand side, which the LLVM backend can convert to V_BFI.
467 */
468 result = LLVMBuildXor(ctx->builder, bfi_args[2],
469 LLVMBuildAnd(ctx->builder, bfi_args[0],
470 LLVMBuildXor(ctx->builder, bfi_args[1], bfi_args[2], ""), ""), "");
471
472 result = LLVMBuildSelect(ctx->builder, icond, src1, result, "");
473 return result;
474 }
475
476 static LLVMValueRef emit_pack_half_2x16(struct ac_llvm_context *ctx,
477 LLVMValueRef src0)
478 {
479 LLVMValueRef comp[2];
480
481 src0 = ac_to_float(ctx, src0);
482 comp[0] = LLVMBuildExtractElement(ctx->builder, src0, ctx->i32_0, "");
483 comp[1] = LLVMBuildExtractElement(ctx->builder, src0, ctx->i32_1, "");
484
485 return LLVMBuildBitCast(ctx->builder, ac_build_cvt_pkrtz_f16(ctx, comp),
486 ctx->i32, "");
487 }
488
489 static LLVMValueRef emit_unpack_half_2x16(struct ac_llvm_context *ctx,
490 LLVMValueRef src0)
491 {
492 LLVMValueRef const16 = LLVMConstInt(ctx->i32, 16, false);
493 LLVMValueRef temps[2], val;
494 int i;
495
496 for (i = 0; i < 2; i++) {
497 val = i == 1 ? LLVMBuildLShr(ctx->builder, src0, const16, "") : src0;
498 val = LLVMBuildTrunc(ctx->builder, val, ctx->i16, "");
499 val = LLVMBuildBitCast(ctx->builder, val, ctx->f16, "");
500 temps[i] = LLVMBuildFPExt(ctx->builder, val, ctx->f32, "");
501 }
502 return ac_build_gather_values(ctx, temps, 2);
503 }
504
505 static LLVMValueRef emit_ddxy(struct ac_nir_context *ctx,
506 nir_op op,
507 LLVMValueRef src0)
508 {
509 unsigned mask;
510 int idx;
511 LLVMValueRef result;
512
513 if (op == nir_op_fddx_fine)
514 mask = AC_TID_MASK_LEFT;
515 else if (op == nir_op_fddy_fine)
516 mask = AC_TID_MASK_TOP;
517 else
518 mask = AC_TID_MASK_TOP_LEFT;
519
520 /* for DDX we want to next X pixel, DDY next Y pixel. */
521 if (op == nir_op_fddx_fine ||
522 op == nir_op_fddx_coarse ||
523 op == nir_op_fddx)
524 idx = 1;
525 else
526 idx = 2;
527
528 result = ac_build_ddxy(&ctx->ac, mask, idx, src0);
529 return result;
530 }
531
532 /*
533 * this takes an I,J coordinate pair,
534 * and works out the X and Y derivatives.
535 * it returns DDX(I), DDX(J), DDY(I), DDY(J).
536 */
537 static LLVMValueRef emit_ddxy_interp(
538 struct ac_nir_context *ctx,
539 LLVMValueRef interp_ij)
540 {
541 LLVMValueRef result[4], a;
542 unsigned i;
543
544 for (i = 0; i < 2; i++) {
545 a = LLVMBuildExtractElement(ctx->ac.builder, interp_ij,
546 LLVMConstInt(ctx->ac.i32, i, false), "");
547 result[i] = emit_ddxy(ctx, nir_op_fddx, a);
548 result[2+i] = emit_ddxy(ctx, nir_op_fddy, a);
549 }
550 return ac_build_gather_values(&ctx->ac, result, 4);
551 }
552
553 static void visit_alu(struct ac_nir_context *ctx, const nir_alu_instr *instr)
554 {
555 LLVMValueRef src[4], result = NULL;
556 unsigned num_components = instr->dest.dest.ssa.num_components;
557 unsigned src_components;
558 LLVMTypeRef def_type = get_def_type(ctx, &instr->dest.dest.ssa);
559
560 assert(nir_op_infos[instr->op].num_inputs <= ARRAY_SIZE(src));
561 switch (instr->op) {
562 case nir_op_vec2:
563 case nir_op_vec3:
564 case nir_op_vec4:
565 src_components = 1;
566 break;
567 case nir_op_pack_half_2x16:
568 src_components = 2;
569 break;
570 case nir_op_unpack_half_2x16:
571 src_components = 1;
572 break;
573 case nir_op_cube_face_coord:
574 case nir_op_cube_face_index:
575 src_components = 3;
576 break;
577 default:
578 src_components = num_components;
579 break;
580 }
581 for (unsigned i = 0; i < nir_op_infos[instr->op].num_inputs; i++)
582 src[i] = get_alu_src(ctx, instr->src[i], src_components);
583
584 switch (instr->op) {
585 case nir_op_fmov:
586 case nir_op_imov:
587 result = src[0];
588 break;
589 case nir_op_fneg:
590 src[0] = ac_to_float(&ctx->ac, src[0]);
591 result = LLVMBuildFNeg(ctx->ac.builder, src[0], "");
592 break;
593 case nir_op_ineg:
594 result = LLVMBuildNeg(ctx->ac.builder, src[0], "");
595 break;
596 case nir_op_inot:
597 result = LLVMBuildNot(ctx->ac.builder, src[0], "");
598 break;
599 case nir_op_iadd:
600 result = LLVMBuildAdd(ctx->ac.builder, src[0], src[1], "");
601 break;
602 case nir_op_fadd:
603 src[0] = ac_to_float(&ctx->ac, src[0]);
604 src[1] = ac_to_float(&ctx->ac, src[1]);
605 result = LLVMBuildFAdd(ctx->ac.builder, src[0], src[1], "");
606 break;
607 case nir_op_fsub:
608 src[0] = ac_to_float(&ctx->ac, src[0]);
609 src[1] = ac_to_float(&ctx->ac, src[1]);
610 result = LLVMBuildFSub(ctx->ac.builder, src[0], src[1], "");
611 break;
612 case nir_op_isub:
613 result = LLVMBuildSub(ctx->ac.builder, src[0], src[1], "");
614 break;
615 case nir_op_imul:
616 result = LLVMBuildMul(ctx->ac.builder, src[0], src[1], "");
617 break;
618 case nir_op_imod:
619 result = LLVMBuildSRem(ctx->ac.builder, src[0], src[1], "");
620 break;
621 case nir_op_umod:
622 result = LLVMBuildURem(ctx->ac.builder, src[0], src[1], "");
623 break;
624 case nir_op_fmod:
625 src[0] = ac_to_float(&ctx->ac, src[0]);
626 src[1] = ac_to_float(&ctx->ac, src[1]);
627 result = ac_build_fdiv(&ctx->ac, src[0], src[1]);
628 result = emit_intrin_1f_param(&ctx->ac, "llvm.floor",
629 ac_to_float_type(&ctx->ac, def_type), result);
630 result = LLVMBuildFMul(ctx->ac.builder, src[1] , result, "");
631 result = LLVMBuildFSub(ctx->ac.builder, src[0], result, "");
632 break;
633 case nir_op_frem:
634 src[0] = ac_to_float(&ctx->ac, src[0]);
635 src[1] = ac_to_float(&ctx->ac, src[1]);
636 result = LLVMBuildFRem(ctx->ac.builder, src[0], src[1], "");
637 break;
638 case nir_op_irem:
639 result = LLVMBuildSRem(ctx->ac.builder, src[0], src[1], "");
640 break;
641 case nir_op_idiv:
642 result = LLVMBuildSDiv(ctx->ac.builder, src[0], src[1], "");
643 break;
644 case nir_op_udiv:
645 result = LLVMBuildUDiv(ctx->ac.builder, src[0], src[1], "");
646 break;
647 case nir_op_fmul:
648 src[0] = ac_to_float(&ctx->ac, src[0]);
649 src[1] = ac_to_float(&ctx->ac, src[1]);
650 result = LLVMBuildFMul(ctx->ac.builder, src[0], src[1], "");
651 break;
652 case nir_op_frcp:
653 src[0] = ac_to_float(&ctx->ac, src[0]);
654 result = ac_build_fdiv(&ctx->ac, instr->dest.dest.ssa.bit_size == 32 ? ctx->ac.f32_1 : ctx->ac.f64_1,
655 src[0]);
656 break;
657 case nir_op_iand:
658 result = LLVMBuildAnd(ctx->ac.builder, src[0], src[1], "");
659 break;
660 case nir_op_ior:
661 result = LLVMBuildOr(ctx->ac.builder, src[0], src[1], "");
662 break;
663 case nir_op_ixor:
664 result = LLVMBuildXor(ctx->ac.builder, src[0], src[1], "");
665 break;
666 case nir_op_ishl:
667 result = LLVMBuildShl(ctx->ac.builder, src[0],
668 LLVMBuildZExt(ctx->ac.builder, src[1],
669 LLVMTypeOf(src[0]), ""),
670 "");
671 break;
672 case nir_op_ishr:
673 result = LLVMBuildAShr(ctx->ac.builder, src[0],
674 LLVMBuildZExt(ctx->ac.builder, src[1],
675 LLVMTypeOf(src[0]), ""),
676 "");
677 break;
678 case nir_op_ushr:
679 result = LLVMBuildLShr(ctx->ac.builder, src[0],
680 LLVMBuildZExt(ctx->ac.builder, src[1],
681 LLVMTypeOf(src[0]), ""),
682 "");
683 break;
684 case nir_op_ilt32:
685 result = emit_int_cmp(&ctx->ac, LLVMIntSLT, src[0], src[1]);
686 break;
687 case nir_op_ine32:
688 result = emit_int_cmp(&ctx->ac, LLVMIntNE, src[0], src[1]);
689 break;
690 case nir_op_ieq32:
691 result = emit_int_cmp(&ctx->ac, LLVMIntEQ, src[0], src[1]);
692 break;
693 case nir_op_ige32:
694 result = emit_int_cmp(&ctx->ac, LLVMIntSGE, src[0], src[1]);
695 break;
696 case nir_op_ult32:
697 result = emit_int_cmp(&ctx->ac, LLVMIntULT, src[0], src[1]);
698 break;
699 case nir_op_uge32:
700 result = emit_int_cmp(&ctx->ac, LLVMIntUGE, src[0], src[1]);
701 break;
702 case nir_op_feq32:
703 result = emit_float_cmp(&ctx->ac, LLVMRealOEQ, src[0], src[1]);
704 break;
705 case nir_op_fne32:
706 result = emit_float_cmp(&ctx->ac, LLVMRealUNE, src[0], src[1]);
707 break;
708 case nir_op_flt32:
709 result = emit_float_cmp(&ctx->ac, LLVMRealOLT, src[0], src[1]);
710 break;
711 case nir_op_fge32:
712 result = emit_float_cmp(&ctx->ac, LLVMRealOGE, src[0], src[1]);
713 break;
714 case nir_op_fabs:
715 result = emit_intrin_1f_param(&ctx->ac, "llvm.fabs",
716 ac_to_float_type(&ctx->ac, def_type), src[0]);
717 break;
718 case nir_op_iabs:
719 result = emit_iabs(&ctx->ac, src[0]);
720 break;
721 case nir_op_imax:
722 result = emit_minmax_int(&ctx->ac, LLVMIntSGT, src[0], src[1]);
723 break;
724 case nir_op_imin:
725 result = emit_minmax_int(&ctx->ac, LLVMIntSLT, src[0], src[1]);
726 break;
727 case nir_op_umax:
728 result = emit_minmax_int(&ctx->ac, LLVMIntUGT, src[0], src[1]);
729 break;
730 case nir_op_umin:
731 result = emit_minmax_int(&ctx->ac, LLVMIntULT, src[0], src[1]);
732 break;
733 case nir_op_isign:
734 result = ac_build_isign(&ctx->ac, src[0],
735 instr->dest.dest.ssa.bit_size);
736 break;
737 case nir_op_fsign:
738 src[0] = ac_to_float(&ctx->ac, src[0]);
739 result = ac_build_fsign(&ctx->ac, src[0],
740 instr->dest.dest.ssa.bit_size);
741 break;
742 case nir_op_ffloor:
743 result = emit_intrin_1f_param(&ctx->ac, "llvm.floor",
744 ac_to_float_type(&ctx->ac, def_type), src[0]);
745 break;
746 case nir_op_ftrunc:
747 result = emit_intrin_1f_param(&ctx->ac, "llvm.trunc",
748 ac_to_float_type(&ctx->ac, def_type), src[0]);
749 break;
750 case nir_op_fceil:
751 result = emit_intrin_1f_param(&ctx->ac, "llvm.ceil",
752 ac_to_float_type(&ctx->ac, def_type), src[0]);
753 break;
754 case nir_op_fround_even:
755 result = emit_intrin_1f_param(&ctx->ac, "llvm.rint",
756 ac_to_float_type(&ctx->ac, def_type),src[0]);
757 break;
758 case nir_op_ffract:
759 src[0] = ac_to_float(&ctx->ac, src[0]);
760 result = ac_build_fract(&ctx->ac, src[0],
761 instr->dest.dest.ssa.bit_size);
762 break;
763 case nir_op_fsin:
764 result = emit_intrin_1f_param(&ctx->ac, "llvm.sin",
765 ac_to_float_type(&ctx->ac, def_type), src[0]);
766 break;
767 case nir_op_fcos:
768 result = emit_intrin_1f_param(&ctx->ac, "llvm.cos",
769 ac_to_float_type(&ctx->ac, def_type), src[0]);
770 break;
771 case nir_op_fsqrt:
772 result = emit_intrin_1f_param(&ctx->ac, "llvm.sqrt",
773 ac_to_float_type(&ctx->ac, def_type), src[0]);
774 break;
775 case nir_op_fexp2:
776 result = emit_intrin_1f_param(&ctx->ac, "llvm.exp2",
777 ac_to_float_type(&ctx->ac, def_type), src[0]);
778 break;
779 case nir_op_flog2:
780 result = emit_intrin_1f_param(&ctx->ac, "llvm.log2",
781 ac_to_float_type(&ctx->ac, def_type), src[0]);
782 break;
783 case nir_op_frsq:
784 result = emit_intrin_1f_param(&ctx->ac, "llvm.sqrt",
785 ac_to_float_type(&ctx->ac, def_type), src[0]);
786 result = ac_build_fdiv(&ctx->ac, instr->dest.dest.ssa.bit_size == 32 ? ctx->ac.f32_1 : ctx->ac.f64_1,
787 result);
788 break;
789 case nir_op_frexp_exp:
790 src[0] = ac_to_float(&ctx->ac, src[0]);
791 result = ac_build_intrinsic(&ctx->ac, "llvm.amdgcn.frexp.exp.i32.f64",
792 ctx->ac.i32, src, 1, AC_FUNC_ATTR_READNONE);
793
794 break;
795 case nir_op_frexp_sig:
796 src[0] = ac_to_float(&ctx->ac, src[0]);
797 result = ac_build_intrinsic(&ctx->ac, "llvm.amdgcn.frexp.mant.f64",
798 ctx->ac.f64, src, 1, AC_FUNC_ATTR_READNONE);
799 break;
800 case nir_op_fmax:
801 result = emit_intrin_2f_param(&ctx->ac, "llvm.maxnum",
802 ac_to_float_type(&ctx->ac, def_type), src[0], src[1]);
803 if (ctx->ac.chip_class < GFX9 &&
804 instr->dest.dest.ssa.bit_size == 32) {
805 /* Only pre-GFX9 chips do not flush denorms. */
806 result = emit_intrin_1f_param(&ctx->ac, "llvm.canonicalize",
807 ac_to_float_type(&ctx->ac, def_type),
808 result);
809 }
810 break;
811 case nir_op_fmin:
812 result = emit_intrin_2f_param(&ctx->ac, "llvm.minnum",
813 ac_to_float_type(&ctx->ac, def_type), src[0], src[1]);
814 if (ctx->ac.chip_class < GFX9 &&
815 instr->dest.dest.ssa.bit_size == 32) {
816 /* Only pre-GFX9 chips do not flush denorms. */
817 result = emit_intrin_1f_param(&ctx->ac, "llvm.canonicalize",
818 ac_to_float_type(&ctx->ac, def_type),
819 result);
820 }
821 break;
822 case nir_op_ffma:
823 result = emit_intrin_3f_param(&ctx->ac, "llvm.fmuladd",
824 ac_to_float_type(&ctx->ac, def_type), src[0], src[1], src[2]);
825 break;
826 case nir_op_ldexp:
827 src[0] = ac_to_float(&ctx->ac, src[0]);
828 if (ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[0])) == 32)
829 result = ac_build_intrinsic(&ctx->ac, "llvm.amdgcn.ldexp.f32", ctx->ac.f32, src, 2, AC_FUNC_ATTR_READNONE);
830 else
831 result = ac_build_intrinsic(&ctx->ac, "llvm.amdgcn.ldexp.f64", ctx->ac.f64, src, 2, AC_FUNC_ATTR_READNONE);
832 break;
833 case nir_op_ibitfield_extract:
834 result = emit_bitfield_extract(&ctx->ac, true, src);
835 break;
836 case nir_op_ubitfield_extract:
837 result = emit_bitfield_extract(&ctx->ac, false, src);
838 break;
839 case nir_op_bitfield_insert:
840 result = emit_bitfield_insert(&ctx->ac, src[0], src[1], src[2], src[3]);
841 break;
842 case nir_op_bitfield_reverse:
843 result = ac_build_bitfield_reverse(&ctx->ac, src[0]);
844 break;
845 case nir_op_bit_count:
846 result = ac_build_bit_count(&ctx->ac, src[0]);
847 break;
848 case nir_op_vec2:
849 case nir_op_vec3:
850 case nir_op_vec4:
851 for (unsigned i = 0; i < nir_op_infos[instr->op].num_inputs; i++)
852 src[i] = ac_to_integer(&ctx->ac, src[i]);
853 result = ac_build_gather_values(&ctx->ac, src, num_components);
854 break;
855 case nir_op_f2i16:
856 case nir_op_f2i32:
857 case nir_op_f2i64:
858 src[0] = ac_to_float(&ctx->ac, src[0]);
859 result = LLVMBuildFPToSI(ctx->ac.builder, src[0], def_type, "");
860 break;
861 case nir_op_f2u16:
862 case nir_op_f2u32:
863 case nir_op_f2u64:
864 src[0] = ac_to_float(&ctx->ac, src[0]);
865 result = LLVMBuildFPToUI(ctx->ac.builder, src[0], def_type, "");
866 break;
867 case nir_op_i2f16:
868 case nir_op_i2f32:
869 case nir_op_i2f64:
870 src[0] = ac_to_integer(&ctx->ac, src[0]);
871 result = LLVMBuildSIToFP(ctx->ac.builder, src[0], ac_to_float_type(&ctx->ac, def_type), "");
872 break;
873 case nir_op_u2f16:
874 case nir_op_u2f32:
875 case nir_op_u2f64:
876 src[0] = ac_to_integer(&ctx->ac, src[0]);
877 result = LLVMBuildUIToFP(ctx->ac.builder, src[0], ac_to_float_type(&ctx->ac, def_type), "");
878 break;
879 case nir_op_f2f16_rtz:
880 src[0] = ac_to_float(&ctx->ac, src[0]);
881 LLVMValueRef param[2] = { src[0], ctx->ac.f32_0 };
882 result = ac_build_cvt_pkrtz_f16(&ctx->ac, param);
883 result = LLVMBuildExtractElement(ctx->ac.builder, result, ctx->ac.i32_0, "");
884 break;
885 case nir_op_f2f16_rtne:
886 case nir_op_f2f16:
887 case nir_op_f2f32:
888 case nir_op_f2f64:
889 src[0] = ac_to_float(&ctx->ac, src[0]);
890 if (ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[0])) < ac_get_elem_bits(&ctx->ac, def_type))
891 result = LLVMBuildFPExt(ctx->ac.builder, src[0], ac_to_float_type(&ctx->ac, def_type), "");
892 else
893 result = LLVMBuildFPTrunc(ctx->ac.builder, src[0], ac_to_float_type(&ctx->ac, def_type), "");
894 break;
895 case nir_op_u2u16:
896 case nir_op_u2u32:
897 case nir_op_u2u64:
898 src[0] = ac_to_integer(&ctx->ac, src[0]);
899 if (ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[0])) < ac_get_elem_bits(&ctx->ac, def_type))
900 result = LLVMBuildZExt(ctx->ac.builder, src[0], def_type, "");
901 else
902 result = LLVMBuildTrunc(ctx->ac.builder, src[0], def_type, "");
903 break;
904 case nir_op_i2i16:
905 case nir_op_i2i32:
906 case nir_op_i2i64:
907 src[0] = ac_to_integer(&ctx->ac, src[0]);
908 if (ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[0])) < ac_get_elem_bits(&ctx->ac, def_type))
909 result = LLVMBuildSExt(ctx->ac.builder, src[0], def_type, "");
910 else
911 result = LLVMBuildTrunc(ctx->ac.builder, src[0], def_type, "");
912 break;
913 case nir_op_b32csel:
914 result = emit_bcsel(&ctx->ac, src[0], src[1], src[2]);
915 break;
916 case nir_op_find_lsb:
917 src[0] = ac_to_integer(&ctx->ac, src[0]);
918 result = ac_find_lsb(&ctx->ac, ctx->ac.i32, src[0]);
919 break;
920 case nir_op_ufind_msb:
921 src[0] = ac_to_integer(&ctx->ac, src[0]);
922 result = ac_build_umsb(&ctx->ac, src[0], ctx->ac.i32);
923 break;
924 case nir_op_ifind_msb:
925 src[0] = ac_to_integer(&ctx->ac, src[0]);
926 result = ac_build_imsb(&ctx->ac, src[0], ctx->ac.i32);
927 break;
928 case nir_op_uadd_carry:
929 src[0] = ac_to_integer(&ctx->ac, src[0]);
930 src[1] = ac_to_integer(&ctx->ac, src[1]);
931 result = emit_uint_carry(&ctx->ac, "llvm.uadd.with.overflow.i32", src[0], src[1]);
932 break;
933 case nir_op_usub_borrow:
934 src[0] = ac_to_integer(&ctx->ac, src[0]);
935 src[1] = ac_to_integer(&ctx->ac, src[1]);
936 result = emit_uint_carry(&ctx->ac, "llvm.usub.with.overflow.i32", src[0], src[1]);
937 break;
938 case nir_op_b2f16:
939 case nir_op_b2f32:
940 case nir_op_b2f64:
941 result = emit_b2f(&ctx->ac, src[0], instr->dest.dest.ssa.bit_size);
942 break;
943 case nir_op_f2b32:
944 result = emit_f2b(&ctx->ac, src[0]);
945 break;
946 case nir_op_b2i16:
947 case nir_op_b2i32:
948 case nir_op_b2i64:
949 result = emit_b2i(&ctx->ac, src[0], instr->dest.dest.ssa.bit_size);
950 break;
951 case nir_op_i2b32:
952 src[0] = ac_to_integer(&ctx->ac, src[0]);
953 result = emit_i2b(&ctx->ac, src[0]);
954 break;
955 case nir_op_fquantize2f16:
956 result = emit_f2f16(&ctx->ac, src[0]);
957 break;
958 case nir_op_umul_high:
959 src[0] = ac_to_integer(&ctx->ac, src[0]);
960 src[1] = ac_to_integer(&ctx->ac, src[1]);
961 result = emit_umul_high(&ctx->ac, src[0], src[1]);
962 break;
963 case nir_op_imul_high:
964 src[0] = ac_to_integer(&ctx->ac, src[0]);
965 src[1] = ac_to_integer(&ctx->ac, src[1]);
966 result = emit_imul_high(&ctx->ac, src[0], src[1]);
967 break;
968 case nir_op_pack_half_2x16:
969 result = emit_pack_half_2x16(&ctx->ac, src[0]);
970 break;
971 case nir_op_unpack_half_2x16:
972 result = emit_unpack_half_2x16(&ctx->ac, src[0]);
973 break;
974 case nir_op_fddx:
975 case nir_op_fddy:
976 case nir_op_fddx_fine:
977 case nir_op_fddy_fine:
978 case nir_op_fddx_coarse:
979 case nir_op_fddy_coarse:
980 result = emit_ddxy(ctx, instr->op, src[0]);
981 break;
982
983 case nir_op_unpack_64_2x32_split_x: {
984 assert(ac_get_llvm_num_components(src[0]) == 1);
985 LLVMValueRef tmp = LLVMBuildBitCast(ctx->ac.builder, src[0],
986 ctx->ac.v2i32,
987 "");
988 result = LLVMBuildExtractElement(ctx->ac.builder, tmp,
989 ctx->ac.i32_0, "");
990 break;
991 }
992
993 case nir_op_unpack_64_2x32_split_y: {
994 assert(ac_get_llvm_num_components(src[0]) == 1);
995 LLVMValueRef tmp = LLVMBuildBitCast(ctx->ac.builder, src[0],
996 ctx->ac.v2i32,
997 "");
998 result = LLVMBuildExtractElement(ctx->ac.builder, tmp,
999 ctx->ac.i32_1, "");
1000 break;
1001 }
1002
1003 case nir_op_pack_64_2x32_split: {
1004 LLVMValueRef tmp = LLVMGetUndef(ctx->ac.v2i32);
1005 tmp = ac_build_gather_values(&ctx->ac, src, 2);
1006 result = LLVMBuildBitCast(ctx->ac.builder, tmp, ctx->ac.i64, "");
1007 break;
1008 }
1009
1010 case nir_op_cube_face_coord: {
1011 src[0] = ac_to_float(&ctx->ac, src[0]);
1012 LLVMValueRef results[2];
1013 LLVMValueRef in[3];
1014 for (unsigned chan = 0; chan < 3; chan++)
1015 in[chan] = ac_llvm_extract_elem(&ctx->ac, src[0], chan);
1016 results[0] = ac_build_intrinsic(&ctx->ac, "llvm.amdgcn.cubetc",
1017 ctx->ac.f32, in, 3, AC_FUNC_ATTR_READNONE);
1018 results[1] = ac_build_intrinsic(&ctx->ac, "llvm.amdgcn.cubesc",
1019 ctx->ac.f32, in, 3, AC_FUNC_ATTR_READNONE);
1020 result = ac_build_gather_values(&ctx->ac, results, 2);
1021 break;
1022 }
1023
1024 case nir_op_cube_face_index: {
1025 src[0] = ac_to_float(&ctx->ac, src[0]);
1026 LLVMValueRef in[3];
1027 for (unsigned chan = 0; chan < 3; chan++)
1028 in[chan] = ac_llvm_extract_elem(&ctx->ac, src[0], chan);
1029 result = ac_build_intrinsic(&ctx->ac, "llvm.amdgcn.cubeid",
1030 ctx->ac.f32, in, 3, AC_FUNC_ATTR_READNONE);
1031 break;
1032 }
1033
1034 case nir_op_fmin3:
1035 result = emit_intrin_2f_param(&ctx->ac, "llvm.minnum",
1036 ac_to_float_type(&ctx->ac, def_type), src[0], src[1]);
1037 result = emit_intrin_2f_param(&ctx->ac, "llvm.minnum",
1038 ac_to_float_type(&ctx->ac, def_type), result, src[2]);
1039 break;
1040 case nir_op_umin3:
1041 result = emit_minmax_int(&ctx->ac, LLVMIntULT, src[0], src[1]);
1042 result = emit_minmax_int(&ctx->ac, LLVMIntULT, result, src[2]);
1043 break;
1044 case nir_op_imin3:
1045 result = emit_minmax_int(&ctx->ac, LLVMIntSLT, src[0], src[1]);
1046 result = emit_minmax_int(&ctx->ac, LLVMIntSLT, result, src[2]);
1047 break;
1048 case nir_op_fmax3:
1049 result = emit_intrin_2f_param(&ctx->ac, "llvm.maxnum",
1050 ac_to_float_type(&ctx->ac, def_type), src[0], src[1]);
1051 result = emit_intrin_2f_param(&ctx->ac, "llvm.maxnum",
1052 ac_to_float_type(&ctx->ac, def_type), result, src[2]);
1053 break;
1054 case nir_op_umax3:
1055 result = emit_minmax_int(&ctx->ac, LLVMIntUGT, src[0], src[1]);
1056 result = emit_minmax_int(&ctx->ac, LLVMIntUGT, result, src[2]);
1057 break;
1058 case nir_op_imax3:
1059 result = emit_minmax_int(&ctx->ac, LLVMIntSGT, src[0], src[1]);
1060 result = emit_minmax_int(&ctx->ac, LLVMIntSGT, result, src[2]);
1061 break;
1062 case nir_op_fmed3: {
1063 LLVMValueRef tmp1 = emit_intrin_2f_param(&ctx->ac, "llvm.minnum",
1064 ac_to_float_type(&ctx->ac, def_type), src[0], src[1]);
1065 LLVMValueRef tmp2 = emit_intrin_2f_param(&ctx->ac, "llvm.maxnum",
1066 ac_to_float_type(&ctx->ac, def_type), src[0], src[1]);
1067 tmp2 = emit_intrin_2f_param(&ctx->ac, "llvm.minnum",
1068 ac_to_float_type(&ctx->ac, def_type), tmp2, src[2]);
1069 result = emit_intrin_2f_param(&ctx->ac, "llvm.maxnum",
1070 ac_to_float_type(&ctx->ac, def_type), tmp1, tmp2);
1071 break;
1072 }
1073 case nir_op_imed3: {
1074 LLVMValueRef tmp1 = emit_minmax_int(&ctx->ac, LLVMIntSLT, src[0], src[1]);
1075 LLVMValueRef tmp2 = emit_minmax_int(&ctx->ac, LLVMIntSGT, src[0], src[1]);
1076 tmp2 = emit_minmax_int(&ctx->ac, LLVMIntSLT, tmp2, src[2]);
1077 result = emit_minmax_int(&ctx->ac, LLVMIntSGT, tmp1, tmp2);
1078 break;
1079 }
1080 case nir_op_umed3: {
1081 LLVMValueRef tmp1 = emit_minmax_int(&ctx->ac, LLVMIntULT, src[0], src[1]);
1082 LLVMValueRef tmp2 = emit_minmax_int(&ctx->ac, LLVMIntUGT, src[0], src[1]);
1083 tmp2 = emit_minmax_int(&ctx->ac, LLVMIntULT, tmp2, src[2]);
1084 result = emit_minmax_int(&ctx->ac, LLVMIntUGT, tmp1, tmp2);
1085 break;
1086 }
1087
1088 default:
1089 fprintf(stderr, "Unknown NIR alu instr: ");
1090 nir_print_instr(&instr->instr, stderr);
1091 fprintf(stderr, "\n");
1092 abort();
1093 }
1094
1095 if (result) {
1096 assert(instr->dest.dest.is_ssa);
1097 result = ac_to_integer_or_pointer(&ctx->ac, result);
1098 ctx->ssa_defs[instr->dest.dest.ssa.index] = result;
1099 }
1100 }
1101
1102 static void visit_load_const(struct ac_nir_context *ctx,
1103 const nir_load_const_instr *instr)
1104 {
1105 LLVMValueRef values[4], value = NULL;
1106 LLVMTypeRef element_type =
1107 LLVMIntTypeInContext(ctx->ac.context, instr->def.bit_size);
1108
1109 for (unsigned i = 0; i < instr->def.num_components; ++i) {
1110 switch (instr->def.bit_size) {
1111 case 16:
1112 values[i] = LLVMConstInt(element_type,
1113 instr->value.u16[i], false);
1114 break;
1115 case 32:
1116 values[i] = LLVMConstInt(element_type,
1117 instr->value.u32[i], false);
1118 break;
1119 case 64:
1120 values[i] = LLVMConstInt(element_type,
1121 instr->value.u64[i], false);
1122 break;
1123 default:
1124 fprintf(stderr,
1125 "unsupported nir load_const bit_size: %d\n",
1126 instr->def.bit_size);
1127 abort();
1128 }
1129 }
1130 if (instr->def.num_components > 1) {
1131 value = LLVMConstVector(values, instr->def.num_components);
1132 } else
1133 value = values[0];
1134
1135 ctx->ssa_defs[instr->def.index] = value;
1136 }
1137
1138 static LLVMValueRef
1139 get_buffer_size(struct ac_nir_context *ctx, LLVMValueRef descriptor, bool in_elements)
1140 {
1141 LLVMValueRef size =
1142 LLVMBuildExtractElement(ctx->ac.builder, descriptor,
1143 LLVMConstInt(ctx->ac.i32, 2, false), "");
1144
1145 /* VI only */
1146 if (ctx->ac.chip_class == VI && in_elements) {
1147 /* On VI, the descriptor contains the size in bytes,
1148 * but TXQ must return the size in elements.
1149 * The stride is always non-zero for resources using TXQ.
1150 */
1151 LLVMValueRef stride =
1152 LLVMBuildExtractElement(ctx->ac.builder, descriptor,
1153 ctx->ac.i32_1, "");
1154 stride = LLVMBuildLShr(ctx->ac.builder, stride,
1155 LLVMConstInt(ctx->ac.i32, 16, false), "");
1156 stride = LLVMBuildAnd(ctx->ac.builder, stride,
1157 LLVMConstInt(ctx->ac.i32, 0x3fff, false), "");
1158
1159 size = LLVMBuildUDiv(ctx->ac.builder, size, stride, "");
1160 }
1161 return size;
1162 }
1163
1164 static LLVMValueRef lower_gather4_integer(struct ac_llvm_context *ctx,
1165 nir_variable *var,
1166 struct ac_image_args *args,
1167 const nir_tex_instr *instr)
1168 {
1169 const struct glsl_type *type = glsl_without_array(var->type);
1170 enum glsl_base_type stype = glsl_get_sampler_result_type(type);
1171 LLVMValueRef half_texel[2];
1172 LLVMValueRef compare_cube_wa = NULL;
1173 LLVMValueRef result;
1174
1175 //TODO Rect
1176 {
1177 struct ac_image_args txq_args = { 0 };
1178
1179 txq_args.dim = get_ac_sampler_dim(ctx, instr->sampler_dim, instr->is_array);
1180 txq_args.opcode = ac_image_get_resinfo;
1181 txq_args.dmask = 0xf;
1182 txq_args.lod = ctx->i32_0;
1183 txq_args.resource = args->resource;
1184 txq_args.attributes = AC_FUNC_ATTR_READNONE;
1185 LLVMValueRef size = ac_build_image_opcode(ctx, &txq_args);
1186
1187 for (unsigned c = 0; c < 2; c++) {
1188 half_texel[c] = LLVMBuildExtractElement(ctx->builder, size,
1189 LLVMConstInt(ctx->i32, c, false), "");
1190 half_texel[c] = LLVMBuildUIToFP(ctx->builder, half_texel[c], ctx->f32, "");
1191 half_texel[c] = ac_build_fdiv(ctx, ctx->f32_1, half_texel[c]);
1192 half_texel[c] = LLVMBuildFMul(ctx->builder, half_texel[c],
1193 LLVMConstReal(ctx->f32, -0.5), "");
1194 }
1195 }
1196
1197 LLVMValueRef orig_coords[2] = { args->coords[0], args->coords[1] };
1198
1199 for (unsigned c = 0; c < 2; c++) {
1200 LLVMValueRef tmp;
1201 tmp = LLVMBuildBitCast(ctx->builder, args->coords[c], ctx->f32, "");
1202 args->coords[c] = LLVMBuildFAdd(ctx->builder, tmp, half_texel[c], "");
1203 }
1204
1205 /*
1206 * Apparantly cube has issue with integer types that the workaround doesn't solve,
1207 * so this tests if the format is 8_8_8_8 and an integer type do an alternate
1208 * workaround by sampling using a scaled type and converting.
1209 * This is taken from amdgpu-pro shaders.
1210 */
1211 /* NOTE this produces some ugly code compared to amdgpu-pro,
1212 * LLVM ends up dumping SGPRs into VGPRs to deal with the compare/select,
1213 * and then reads them back. -pro generates two selects,
1214 * one s_cmp for the descriptor rewriting
1215 * one v_cmp for the coordinate and result changes.
1216 */
1217 if (instr->sampler_dim == GLSL_SAMPLER_DIM_CUBE) {
1218 LLVMValueRef tmp, tmp2;
1219
1220 /* workaround 8/8/8/8 uint/sint cube gather bug */
1221 /* first detect it then change to a scaled read and f2i */
1222 tmp = LLVMBuildExtractElement(ctx->builder, args->resource, ctx->i32_1, "");
1223 tmp2 = tmp;
1224
1225 /* extract the DATA_FORMAT */
1226 tmp = ac_build_bfe(ctx, tmp, LLVMConstInt(ctx->i32, 20, false),
1227 LLVMConstInt(ctx->i32, 6, false), false);
1228
1229 /* is the DATA_FORMAT == 8_8_8_8 */
1230 compare_cube_wa = LLVMBuildICmp(ctx->builder, LLVMIntEQ, tmp, LLVMConstInt(ctx->i32, V_008F14_IMG_DATA_FORMAT_8_8_8_8, false), "");
1231
1232 if (stype == GLSL_TYPE_UINT)
1233 /* Create a NUM FORMAT - 0x2 or 0x4 - USCALED or UINT */
1234 tmp = LLVMBuildSelect(ctx->builder, compare_cube_wa, LLVMConstInt(ctx->i32, 0x8000000, false),
1235 LLVMConstInt(ctx->i32, 0x10000000, false), "");
1236 else
1237 /* Create a NUM FORMAT - 0x3 or 0x5 - SSCALED or SINT */
1238 tmp = LLVMBuildSelect(ctx->builder, compare_cube_wa, LLVMConstInt(ctx->i32, 0xc000000, false),
1239 LLVMConstInt(ctx->i32, 0x14000000, false), "");
1240
1241 /* replace the NUM FORMAT in the descriptor */
1242 tmp2 = LLVMBuildAnd(ctx->builder, tmp2, LLVMConstInt(ctx->i32, C_008F14_NUM_FORMAT_GFX6, false), "");
1243 tmp2 = LLVMBuildOr(ctx->builder, tmp2, tmp, "");
1244
1245 args->resource = LLVMBuildInsertElement(ctx->builder, args->resource, tmp2, ctx->i32_1, "");
1246
1247 /* don't modify the coordinates for this case */
1248 for (unsigned c = 0; c < 2; ++c)
1249 args->coords[c] = LLVMBuildSelect(
1250 ctx->builder, compare_cube_wa,
1251 orig_coords[c], args->coords[c], "");
1252 }
1253
1254 args->attributes = AC_FUNC_ATTR_READNONE;
1255 result = ac_build_image_opcode(ctx, args);
1256
1257 if (instr->sampler_dim == GLSL_SAMPLER_DIM_CUBE) {
1258 LLVMValueRef tmp, tmp2;
1259
1260 /* if the cube workaround is in place, f2i the result. */
1261 for (unsigned c = 0; c < 4; c++) {
1262 tmp = LLVMBuildExtractElement(ctx->builder, result, LLVMConstInt(ctx->i32, c, false), "");
1263 if (stype == GLSL_TYPE_UINT)
1264 tmp2 = LLVMBuildFPToUI(ctx->builder, tmp, ctx->i32, "");
1265 else
1266 tmp2 = LLVMBuildFPToSI(ctx->builder, tmp, ctx->i32, "");
1267 tmp = LLVMBuildBitCast(ctx->builder, tmp, ctx->i32, "");
1268 tmp2 = LLVMBuildBitCast(ctx->builder, tmp2, ctx->i32, "");
1269 tmp = LLVMBuildSelect(ctx->builder, compare_cube_wa, tmp2, tmp, "");
1270 tmp = LLVMBuildBitCast(ctx->builder, tmp, ctx->f32, "");
1271 result = LLVMBuildInsertElement(ctx->builder, result, tmp, LLVMConstInt(ctx->i32, c, false), "");
1272 }
1273 }
1274 return result;
1275 }
1276
1277 static nir_deref_instr *get_tex_texture_deref(const nir_tex_instr *instr)
1278 {
1279 nir_deref_instr *texture_deref_instr = NULL;
1280
1281 for (unsigned i = 0; i < instr->num_srcs; i++) {
1282 switch (instr->src[i].src_type) {
1283 case nir_tex_src_texture_deref:
1284 texture_deref_instr = nir_src_as_deref(instr->src[i].src);
1285 break;
1286 default:
1287 break;
1288 }
1289 }
1290 return texture_deref_instr;
1291 }
1292
1293 static LLVMValueRef build_tex_intrinsic(struct ac_nir_context *ctx,
1294 const nir_tex_instr *instr,
1295 struct ac_image_args *args)
1296 {
1297 if (instr->sampler_dim == GLSL_SAMPLER_DIM_BUF) {
1298 unsigned mask = nir_ssa_def_components_read(&instr->dest.ssa);
1299
1300 if (ctx->abi->gfx9_stride_size_workaround) {
1301 return ac_build_buffer_load_format_gfx9_safe(&ctx->ac,
1302 args->resource,
1303 args->coords[0],
1304 ctx->ac.i32_0,
1305 util_last_bit(mask),
1306 false, true);
1307 } else {
1308 return ac_build_buffer_load_format(&ctx->ac,
1309 args->resource,
1310 args->coords[0],
1311 ctx->ac.i32_0,
1312 util_last_bit(mask),
1313 false, true);
1314 }
1315 }
1316
1317 args->opcode = ac_image_sample;
1318
1319 switch (instr->op) {
1320 case nir_texop_txf:
1321 case nir_texop_txf_ms:
1322 case nir_texop_samples_identical:
1323 args->opcode = args->level_zero ||
1324 instr->sampler_dim == GLSL_SAMPLER_DIM_MS ?
1325 ac_image_load : ac_image_load_mip;
1326 args->level_zero = false;
1327 break;
1328 case nir_texop_txs:
1329 case nir_texop_query_levels:
1330 args->opcode = ac_image_get_resinfo;
1331 if (!args->lod)
1332 args->lod = ctx->ac.i32_0;
1333 args->level_zero = false;
1334 break;
1335 case nir_texop_tex:
1336 if (ctx->stage != MESA_SHADER_FRAGMENT) {
1337 assert(!args->lod);
1338 args->level_zero = true;
1339 }
1340 break;
1341 case nir_texop_tg4:
1342 args->opcode = ac_image_gather4;
1343 args->level_zero = true;
1344 break;
1345 case nir_texop_lod:
1346 args->opcode = ac_image_get_lod;
1347 break;
1348 default:
1349 break;
1350 }
1351
1352 if (instr->op == nir_texop_tg4 && ctx->ac.chip_class <= VI) {
1353 nir_deref_instr *texture_deref_instr = get_tex_texture_deref(instr);
1354 nir_variable *var = nir_deref_instr_get_variable(texture_deref_instr);
1355 const struct glsl_type *type = glsl_without_array(var->type);
1356 enum glsl_base_type stype = glsl_get_sampler_result_type(type);
1357 if (stype == GLSL_TYPE_UINT || stype == GLSL_TYPE_INT) {
1358 return lower_gather4_integer(&ctx->ac, var, args, instr);
1359 }
1360 }
1361
1362 /* Fixup for GFX9 which allocates 1D textures as 2D. */
1363 if (instr->op == nir_texop_lod && ctx->ac.chip_class >= GFX9) {
1364 if ((args->dim == ac_image_2darray ||
1365 args->dim == ac_image_2d) && !args->coords[1]) {
1366 args->coords[1] = ctx->ac.i32_0;
1367 }
1368 }
1369
1370 args->attributes = AC_FUNC_ATTR_READNONE;
1371 return ac_build_image_opcode(&ctx->ac, args);
1372 }
1373
1374 static LLVMValueRef visit_vulkan_resource_reindex(struct ac_nir_context *ctx,
1375 nir_intrinsic_instr *instr)
1376 {
1377 LLVMValueRef ptr = get_src(ctx, instr->src[0]);
1378 LLVMValueRef index = get_src(ctx, instr->src[1]);
1379
1380 LLVMValueRef result = LLVMBuildGEP(ctx->ac.builder, ptr, &index, 1, "");
1381 LLVMSetMetadata(result, ctx->ac.uniform_md_kind, ctx->ac.empty_md);
1382 return result;
1383 }
1384
1385 static LLVMValueRef visit_load_push_constant(struct ac_nir_context *ctx,
1386 nir_intrinsic_instr *instr)
1387 {
1388 LLVMValueRef ptr, addr;
1389
1390 addr = LLVMConstInt(ctx->ac.i32, nir_intrinsic_base(instr), 0);
1391 addr = LLVMBuildAdd(ctx->ac.builder, addr,
1392 get_src(ctx, instr->src[0]), "");
1393
1394 ptr = ac_build_gep0(&ctx->ac, ctx->abi->push_constants, addr);
1395
1396 if (instr->dest.ssa.bit_size == 16) {
1397 unsigned load_dwords = instr->dest.ssa.num_components / 2 + 1;
1398 LLVMTypeRef vec_type = LLVMVectorType(LLVMInt16TypeInContext(ctx->ac.context), 2 * load_dwords);
1399 ptr = ac_cast_ptr(&ctx->ac, ptr, vec_type);
1400 LLVMValueRef res = LLVMBuildLoad(ctx->ac.builder, ptr, "");
1401 res = LLVMBuildBitCast(ctx->ac.builder, res, vec_type, "");
1402 LLVMValueRef cond = LLVMBuildLShr(ctx->ac.builder, addr, ctx->ac.i32_1, "");
1403 cond = LLVMBuildTrunc(ctx->ac.builder, cond, ctx->ac.i1, "");
1404 LLVMValueRef mask[] = { LLVMConstInt(ctx->ac.i32, 0, false), LLVMConstInt(ctx->ac.i32, 1, false),
1405 LLVMConstInt(ctx->ac.i32, 2, false), LLVMConstInt(ctx->ac.i32, 3, false),
1406 LLVMConstInt(ctx->ac.i32, 4, false)};
1407 LLVMValueRef swizzle_aligned = LLVMConstVector(&mask[0], instr->dest.ssa.num_components);
1408 LLVMValueRef swizzle_unaligned = LLVMConstVector(&mask[1], instr->dest.ssa.num_components);
1409 LLVMValueRef shuffle_aligned = LLVMBuildShuffleVector(ctx->ac.builder, res, res, swizzle_aligned, "");
1410 LLVMValueRef shuffle_unaligned = LLVMBuildShuffleVector(ctx->ac.builder, res, res, swizzle_unaligned, "");
1411 res = LLVMBuildSelect(ctx->ac.builder, cond, shuffle_unaligned, shuffle_aligned, "");
1412 return LLVMBuildBitCast(ctx->ac.builder, res, get_def_type(ctx, &instr->dest.ssa), "");
1413 }
1414
1415 ptr = ac_cast_ptr(&ctx->ac, ptr, get_def_type(ctx, &instr->dest.ssa));
1416
1417 return LLVMBuildLoad(ctx->ac.builder, ptr, "");
1418 }
1419
1420 static LLVMValueRef visit_get_buffer_size(struct ac_nir_context *ctx,
1421 const nir_intrinsic_instr *instr)
1422 {
1423 LLVMValueRef index = get_src(ctx, instr->src[0]);
1424
1425 return get_buffer_size(ctx, ctx->abi->load_ssbo(ctx->abi, index, false), false);
1426 }
1427
1428 static uint32_t widen_mask(uint32_t mask, unsigned multiplier)
1429 {
1430 uint32_t new_mask = 0;
1431 for(unsigned i = 0; i < 32 && (1u << i) <= mask; ++i)
1432 if (mask & (1u << i))
1433 new_mask |= ((1u << multiplier) - 1u) << (i * multiplier);
1434 return new_mask;
1435 }
1436
1437 static LLVMValueRef extract_vector_range(struct ac_llvm_context *ctx, LLVMValueRef src,
1438 unsigned start, unsigned count)
1439 {
1440 LLVMValueRef mask[] = {
1441 ctx->i32_0, ctx->i32_1,
1442 LLVMConstInt(ctx->i32, 2, false), LLVMConstInt(ctx->i32, 3, false) };
1443
1444 unsigned src_elements = ac_get_llvm_num_components(src);
1445
1446 if (count == src_elements) {
1447 assert(start == 0);
1448 return src;
1449 } else if (count == 1) {
1450 assert(start < src_elements);
1451 return LLVMBuildExtractElement(ctx->builder, src, mask[start], "");
1452 } else {
1453 assert(start + count <= src_elements);
1454 assert(count <= 4);
1455 LLVMValueRef swizzle = LLVMConstVector(&mask[start], count);
1456 return LLVMBuildShuffleVector(ctx->builder, src, src, swizzle, "");
1457 }
1458 }
1459
1460 static void visit_store_ssbo(struct ac_nir_context *ctx,
1461 nir_intrinsic_instr *instr)
1462 {
1463 const char *store_name;
1464 LLVMValueRef src_data = get_src(ctx, instr->src[0]);
1465 int elem_size_bytes = ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src_data)) / 8;
1466 unsigned writemask = nir_intrinsic_write_mask(instr);
1467 enum gl_access_qualifier access = nir_intrinsic_access(instr);
1468 LLVMValueRef glc = ctx->ac.i1false;
1469
1470 if (access & (ACCESS_VOLATILE | ACCESS_COHERENT))
1471 glc = ctx->ac.i1true;
1472
1473 LLVMValueRef rsrc = ctx->abi->load_ssbo(ctx->abi,
1474 get_src(ctx, instr->src[1]), true);
1475 LLVMValueRef base_data = ac_to_float(&ctx->ac, src_data);
1476 base_data = ac_trim_vector(&ctx->ac, base_data, instr->num_components);
1477 LLVMValueRef base_offset = get_src(ctx, instr->src[2]);
1478
1479 while (writemask) {
1480 int start, count;
1481 LLVMValueRef data, offset;
1482 LLVMTypeRef data_type;
1483
1484 u_bit_scan_consecutive_range(&writemask, &start, &count);
1485
1486 /* Due to an LLVM limitation, split 3-element writes
1487 * into a 2-element and a 1-element write. */
1488 if (count == 3) {
1489 writemask |= 1 << (start + 2);
1490 count = 2;
1491 }
1492 int num_bytes = count * elem_size_bytes; /* count in bytes */
1493
1494 /* we can only store 4 DWords at the same time.
1495 * can only happen for 64 Bit vectors. */
1496 if (num_bytes > 16) {
1497 writemask |= ((1u << (count - 2)) - 1u) << (start + 2);
1498 count = 2;
1499 num_bytes = 16;
1500 }
1501
1502 /* check alignment of 16 Bit stores */
1503 if (elem_size_bytes == 2 && num_bytes > 2 && (start % 2) == 1) {
1504 writemask |= ((1u << (count - 1)) - 1u) << (start + 1);
1505 count = 1;
1506 num_bytes = 2;
1507 }
1508 data = extract_vector_range(&ctx->ac, base_data, start, count);
1509
1510 if (start == 0) {
1511 offset = base_offset;
1512 } else {
1513 offset = LLVMBuildAdd(ctx->ac.builder, base_offset,
1514 LLVMConstInt(ctx->ac.i32, start * elem_size_bytes, false), "");
1515 }
1516 if (num_bytes == 2) {
1517 store_name = "llvm.amdgcn.tbuffer.store.i32";
1518 data_type = ctx->ac.i32;
1519 LLVMValueRef tbuffer_params[] = {
1520 data,
1521 rsrc,
1522 ctx->ac.i32_0, /* vindex */
1523 offset, /* voffset */
1524 ctx->ac.i32_0,
1525 ctx->ac.i32_0,
1526 LLVMConstInt(ctx->ac.i32, 2, false), // dfmt (= 16bit)
1527 LLVMConstInt(ctx->ac.i32, 4, false), // nfmt (= uint)
1528 glc,
1529 ctx->ac.i1false,
1530 };
1531 ac_build_intrinsic(&ctx->ac, store_name,
1532 ctx->ac.voidt, tbuffer_params, 10, 0);
1533 } else {
1534 switch (num_bytes) {
1535 case 16: /* v4f32 */
1536 store_name = "llvm.amdgcn.buffer.store.v4f32";
1537 data_type = ctx->ac.v4f32;
1538 break;
1539 case 8: /* v2f32 */
1540 store_name = "llvm.amdgcn.buffer.store.v2f32";
1541 data_type = ctx->ac.v2f32;
1542 break;
1543 case 4: /* f32 */
1544 store_name = "llvm.amdgcn.buffer.store.f32";
1545 data_type = ctx->ac.f32;
1546 break;
1547 default:
1548 unreachable("Malformed vector store.");
1549 }
1550 data = LLVMBuildBitCast(ctx->ac.builder, data, data_type, "");
1551 LLVMValueRef params[] = {
1552 data,
1553 rsrc,
1554 ctx->ac.i32_0, /* vindex */
1555 offset,
1556 glc,
1557 ctx->ac.i1false, /* slc */
1558 };
1559 ac_build_intrinsic(&ctx->ac, store_name,
1560 ctx->ac.voidt, params, 6, 0);
1561 }
1562 }
1563 }
1564
1565 static LLVMValueRef visit_atomic_ssbo(struct ac_nir_context *ctx,
1566 const nir_intrinsic_instr *instr)
1567 {
1568 const char *name;
1569 LLVMValueRef params[6];
1570 int arg_count = 0;
1571
1572 if (instr->intrinsic == nir_intrinsic_ssbo_atomic_comp_swap) {
1573 params[arg_count++] = ac_llvm_extract_elem(&ctx->ac, get_src(ctx, instr->src[3]), 0);
1574 }
1575 params[arg_count++] = ac_llvm_extract_elem(&ctx->ac, get_src(ctx, instr->src[2]), 0);
1576 params[arg_count++] = ctx->abi->load_ssbo(ctx->abi,
1577 get_src(ctx, instr->src[0]),
1578 true);
1579 params[arg_count++] = ctx->ac.i32_0; /* vindex */
1580 params[arg_count++] = get_src(ctx, instr->src[1]); /* voffset */
1581 params[arg_count++] = ctx->ac.i1false; /* slc */
1582
1583 switch (instr->intrinsic) {
1584 case nir_intrinsic_ssbo_atomic_add:
1585 name = "llvm.amdgcn.buffer.atomic.add";
1586 break;
1587 case nir_intrinsic_ssbo_atomic_imin:
1588 name = "llvm.amdgcn.buffer.atomic.smin";
1589 break;
1590 case nir_intrinsic_ssbo_atomic_umin:
1591 name = "llvm.amdgcn.buffer.atomic.umin";
1592 break;
1593 case nir_intrinsic_ssbo_atomic_imax:
1594 name = "llvm.amdgcn.buffer.atomic.smax";
1595 break;
1596 case nir_intrinsic_ssbo_atomic_umax:
1597 name = "llvm.amdgcn.buffer.atomic.umax";
1598 break;
1599 case nir_intrinsic_ssbo_atomic_and:
1600 name = "llvm.amdgcn.buffer.atomic.and";
1601 break;
1602 case nir_intrinsic_ssbo_atomic_or:
1603 name = "llvm.amdgcn.buffer.atomic.or";
1604 break;
1605 case nir_intrinsic_ssbo_atomic_xor:
1606 name = "llvm.amdgcn.buffer.atomic.xor";
1607 break;
1608 case nir_intrinsic_ssbo_atomic_exchange:
1609 name = "llvm.amdgcn.buffer.atomic.swap";
1610 break;
1611 case nir_intrinsic_ssbo_atomic_comp_swap:
1612 name = "llvm.amdgcn.buffer.atomic.cmpswap";
1613 break;
1614 default:
1615 abort();
1616 }
1617
1618 return ac_build_intrinsic(&ctx->ac, name, ctx->ac.i32, params, arg_count, 0);
1619 }
1620
1621 static LLVMValueRef visit_load_buffer(struct ac_nir_context *ctx,
1622 const nir_intrinsic_instr *instr)
1623 {
1624 int elem_size_bytes = instr->dest.ssa.bit_size / 8;
1625 int num_components = instr->num_components;
1626 enum gl_access_qualifier access = nir_intrinsic_access(instr);
1627 LLVMValueRef glc = ctx->ac.i1false;
1628
1629 if (access & (ACCESS_VOLATILE | ACCESS_COHERENT))
1630 glc = ctx->ac.i1true;
1631
1632 LLVMValueRef offset = get_src(ctx, instr->src[1]);
1633 LLVMValueRef rsrc = ctx->abi->load_ssbo(ctx->abi,
1634 get_src(ctx, instr->src[0]), false);
1635 LLVMValueRef vindex = ctx->ac.i32_0;
1636
1637 LLVMTypeRef def_type = get_def_type(ctx, &instr->dest.ssa);
1638 LLVMTypeRef def_elem_type = num_components > 1 ? LLVMGetElementType(def_type) : def_type;
1639
1640 LLVMValueRef results[4];
1641 for (int i = 0; i < num_components;) {
1642 int num_elems = num_components - i;
1643 if (elem_size_bytes < 4 && nir_intrinsic_align(instr) % 4 != 0)
1644 num_elems = 1;
1645 if (num_elems * elem_size_bytes > 16)
1646 num_elems = 16 / elem_size_bytes;
1647 int load_bytes = num_elems * elem_size_bytes;
1648
1649 LLVMValueRef immoffset = LLVMConstInt(ctx->ac.i32, i * elem_size_bytes, false);
1650
1651 LLVMValueRef ret;
1652 if (load_bytes == 2) {
1653 ret = ac_build_tbuffer_load_short(&ctx->ac,
1654 rsrc,
1655 vindex,
1656 offset,
1657 ctx->ac.i32_0,
1658 immoffset,
1659 glc);
1660 } else {
1661 const char *load_name;
1662 LLVMTypeRef data_type;
1663 switch (load_bytes) {
1664 case 16:
1665 case 12:
1666 load_name = "llvm.amdgcn.buffer.load.v4f32";
1667 data_type = ctx->ac.v4f32;
1668 break;
1669 case 8:
1670 case 6:
1671 load_name = "llvm.amdgcn.buffer.load.v2f32";
1672 data_type = ctx->ac.v2f32;
1673 break;
1674 case 4:
1675 load_name = "llvm.amdgcn.buffer.load.f32";
1676 data_type = ctx->ac.f32;
1677 break;
1678 default:
1679 unreachable("Malformed load buffer.");
1680 }
1681 LLVMValueRef params[] = {
1682 rsrc,
1683 vindex,
1684 LLVMBuildAdd(ctx->ac.builder, offset, immoffset, ""),
1685 glc,
1686 ctx->ac.i1false,
1687 };
1688 ret = ac_build_intrinsic(&ctx->ac, load_name, data_type, params, 5, 0);
1689 }
1690
1691 LLVMTypeRef byte_vec = LLVMVectorType(ctx->ac.i8, ac_get_type_size(LLVMTypeOf(ret)));
1692 ret = LLVMBuildBitCast(ctx->ac.builder, ret, byte_vec, "");
1693 ret = ac_trim_vector(&ctx->ac, ret, load_bytes);
1694
1695 LLVMTypeRef ret_type = LLVMVectorType(def_elem_type, num_elems);
1696 ret = LLVMBuildBitCast(ctx->ac.builder, ret, ret_type, "");
1697
1698 for (unsigned j = 0; j < num_elems; j++) {
1699 results[i + j] = LLVMBuildExtractElement(ctx->ac.builder, ret, LLVMConstInt(ctx->ac.i32, j, false), "");
1700 }
1701 i += num_elems;
1702 }
1703
1704 return ac_build_gather_values(&ctx->ac, results, num_components);
1705 }
1706
1707 static LLVMValueRef visit_load_ubo_buffer(struct ac_nir_context *ctx,
1708 const nir_intrinsic_instr *instr)
1709 {
1710 LLVMValueRef ret;
1711 LLVMValueRef rsrc = get_src(ctx, instr->src[0]);
1712 LLVMValueRef offset = get_src(ctx, instr->src[1]);
1713 int num_components = instr->num_components;
1714
1715 if (ctx->abi->load_ubo)
1716 rsrc = ctx->abi->load_ubo(ctx->abi, rsrc);
1717
1718 if (instr->dest.ssa.bit_size == 64)
1719 num_components *= 2;
1720
1721 if (instr->dest.ssa.bit_size == 16) {
1722 LLVMValueRef results[num_components];
1723 for (unsigned i = 0; i < num_components; ++i) {
1724 results[i] = ac_build_tbuffer_load_short(&ctx->ac,
1725 rsrc,
1726 ctx->ac.i32_0,
1727 offset,
1728 ctx->ac.i32_0,
1729 LLVMConstInt(ctx->ac.i32, 2 * i, 0),
1730 ctx->ac.i1false);
1731 }
1732 ret = ac_build_gather_values(&ctx->ac, results, num_components);
1733 } else {
1734 ret = ac_build_buffer_load(&ctx->ac, rsrc, num_components, NULL, offset,
1735 NULL, 0, false, false, true, true);
1736
1737 ret = ac_trim_vector(&ctx->ac, ret, num_components);
1738 }
1739
1740 return LLVMBuildBitCast(ctx->ac.builder, ret,
1741 get_def_type(ctx, &instr->dest.ssa), "");
1742 }
1743
1744 static void
1745 get_deref_offset(struct ac_nir_context *ctx, nir_deref_instr *instr,
1746 bool vs_in, unsigned *vertex_index_out,
1747 LLVMValueRef *vertex_index_ref,
1748 unsigned *const_out, LLVMValueRef *indir_out)
1749 {
1750 nir_variable *var = nir_deref_instr_get_variable(instr);
1751 nir_deref_path path;
1752 unsigned idx_lvl = 1;
1753
1754 nir_deref_path_init(&path, instr, NULL);
1755
1756 if (vertex_index_out != NULL || vertex_index_ref != NULL) {
1757 if (vertex_index_ref) {
1758 *vertex_index_ref = get_src(ctx, path.path[idx_lvl]->arr.index);
1759 if (vertex_index_out)
1760 *vertex_index_out = 0;
1761 } else {
1762 nir_const_value *v = nir_src_as_const_value(path.path[idx_lvl]->arr.index);
1763 assert(v);
1764 *vertex_index_out = v->u32[0];
1765 }
1766 ++idx_lvl;
1767 }
1768
1769 uint32_t const_offset = 0;
1770 LLVMValueRef offset = NULL;
1771
1772 if (var->data.compact) {
1773 assert(instr->deref_type == nir_deref_type_array);
1774 nir_const_value *v = nir_src_as_const_value(instr->arr.index);
1775 assert(v);
1776 const_offset = v->u32[0];
1777 goto out;
1778 }
1779
1780 for (; path.path[idx_lvl]; ++idx_lvl) {
1781 const struct glsl_type *parent_type = path.path[idx_lvl - 1]->type;
1782 if (path.path[idx_lvl]->deref_type == nir_deref_type_struct) {
1783 unsigned index = path.path[idx_lvl]->strct.index;
1784
1785 for (unsigned i = 0; i < index; i++) {
1786 const struct glsl_type *ft = glsl_get_struct_field(parent_type, i);
1787 const_offset += glsl_count_attribute_slots(ft, vs_in);
1788 }
1789 } else if(path.path[idx_lvl]->deref_type == nir_deref_type_array) {
1790 unsigned size = glsl_count_attribute_slots(path.path[idx_lvl]->type, vs_in);
1791 LLVMValueRef array_off = LLVMBuildMul(ctx->ac.builder, LLVMConstInt(ctx->ac.i32, size, 0),
1792 get_src(ctx, path.path[idx_lvl]->arr.index), "");
1793 if (offset)
1794 offset = LLVMBuildAdd(ctx->ac.builder, offset, array_off, "");
1795 else
1796 offset = array_off;
1797 } else
1798 unreachable("Uhandled deref type in get_deref_instr_offset");
1799 }
1800
1801 out:
1802 nir_deref_path_finish(&path);
1803
1804 if (const_offset && offset)
1805 offset = LLVMBuildAdd(ctx->ac.builder, offset,
1806 LLVMConstInt(ctx->ac.i32, const_offset, 0),
1807 "");
1808
1809 *const_out = const_offset;
1810 *indir_out = offset;
1811 }
1812
1813 static LLVMValueRef load_tess_varyings(struct ac_nir_context *ctx,
1814 nir_intrinsic_instr *instr,
1815 bool load_inputs)
1816 {
1817 LLVMValueRef result;
1818 LLVMValueRef vertex_index = NULL;
1819 LLVMValueRef indir_index = NULL;
1820 unsigned const_index = 0;
1821
1822 nir_variable *var = nir_deref_instr_get_variable(nir_instr_as_deref(instr->src[0].ssa->parent_instr));
1823
1824 unsigned location = var->data.location;
1825 unsigned driver_location = var->data.driver_location;
1826 const bool is_patch = var->data.patch;
1827 const bool is_compact = var->data.compact;
1828
1829 get_deref_offset(ctx, nir_instr_as_deref(instr->src[0].ssa->parent_instr),
1830 false, NULL, is_patch ? NULL : &vertex_index,
1831 &const_index, &indir_index);
1832
1833 LLVMTypeRef dest_type = get_def_type(ctx, &instr->dest.ssa);
1834
1835 LLVMTypeRef src_component_type;
1836 if (LLVMGetTypeKind(dest_type) == LLVMVectorTypeKind)
1837 src_component_type = LLVMGetElementType(dest_type);
1838 else
1839 src_component_type = dest_type;
1840
1841 result = ctx->abi->load_tess_varyings(ctx->abi, src_component_type,
1842 vertex_index, indir_index,
1843 const_index, location, driver_location,
1844 var->data.location_frac,
1845 instr->num_components,
1846 is_patch, is_compact, load_inputs);
1847 if (instr->dest.ssa.bit_size == 16) {
1848 result = ac_to_integer(&ctx->ac, result);
1849 result = LLVMBuildTrunc(ctx->ac.builder, result, dest_type, "");
1850 }
1851 return LLVMBuildBitCast(ctx->ac.builder, result, dest_type, "");
1852 }
1853
1854 static LLVMValueRef visit_load_var(struct ac_nir_context *ctx,
1855 nir_intrinsic_instr *instr)
1856 {
1857 nir_variable *var = nir_deref_instr_get_variable(nir_instr_as_deref(instr->src[0].ssa->parent_instr));
1858
1859 LLVMValueRef values[8];
1860 int idx = 0;
1861 int ve = instr->dest.ssa.num_components;
1862 unsigned comp = 0;
1863 LLVMValueRef indir_index;
1864 LLVMValueRef ret;
1865 unsigned const_index;
1866 unsigned stride = 4;
1867 int mode = nir_var_shared;
1868
1869 if (var) {
1870 bool vs_in = ctx->stage == MESA_SHADER_VERTEX &&
1871 var->data.mode == nir_var_shader_in;
1872 if (var->data.compact)
1873 stride = 1;
1874 idx = var->data.driver_location;
1875 comp = var->data.location_frac;
1876 mode = var->data.mode;
1877
1878 get_deref_offset(ctx, nir_instr_as_deref(instr->src[0].ssa->parent_instr), vs_in, NULL, NULL,
1879 &const_index, &indir_index);
1880 }
1881
1882 if (instr->dest.ssa.bit_size == 64)
1883 ve *= 2;
1884
1885 switch (mode) {
1886 case nir_var_shader_in:
1887 if (ctx->stage == MESA_SHADER_TESS_CTRL ||
1888 ctx->stage == MESA_SHADER_TESS_EVAL) {
1889 return load_tess_varyings(ctx, instr, true);
1890 }
1891
1892 if (ctx->stage == MESA_SHADER_GEOMETRY) {
1893 LLVMTypeRef type = LLVMIntTypeInContext(ctx->ac.context, instr->dest.ssa.bit_size);
1894 LLVMValueRef indir_index;
1895 unsigned const_index, vertex_index;
1896 get_deref_offset(ctx, nir_instr_as_deref(instr->src[0].ssa->parent_instr),
1897 false, &vertex_index, NULL, &const_index, &indir_index);
1898
1899 return ctx->abi->load_inputs(ctx->abi, var->data.location,
1900 var->data.driver_location,
1901 var->data.location_frac,
1902 instr->num_components, vertex_index, const_index, type);
1903 }
1904
1905 for (unsigned chan = comp; chan < ve + comp; chan++) {
1906 if (indir_index) {
1907 unsigned count = glsl_count_attribute_slots(
1908 var->type,
1909 ctx->stage == MESA_SHADER_VERTEX);
1910 count -= chan / 4;
1911 LLVMValueRef tmp_vec = ac_build_gather_values_extended(
1912 &ctx->ac, ctx->abi->inputs + idx + chan, count,
1913 stride, false, true);
1914
1915 values[chan] = LLVMBuildExtractElement(ctx->ac.builder,
1916 tmp_vec,
1917 indir_index, "");
1918 } else
1919 values[chan] = ctx->abi->inputs[idx + chan + const_index * stride];
1920 }
1921 break;
1922 case nir_var_local:
1923 for (unsigned chan = 0; chan < ve; chan++) {
1924 if (indir_index) {
1925 unsigned count = glsl_count_attribute_slots(
1926 var->type, false);
1927 count -= chan / 4;
1928 LLVMValueRef tmp_vec = ac_build_gather_values_extended(
1929 &ctx->ac, ctx->locals + idx + chan, count,
1930 stride, true, true);
1931
1932 values[chan] = LLVMBuildExtractElement(ctx->ac.builder,
1933 tmp_vec,
1934 indir_index, "");
1935 } else {
1936 values[chan] = LLVMBuildLoad(ctx->ac.builder, ctx->locals[idx + chan + const_index * stride], "");
1937 }
1938 }
1939 break;
1940 case nir_var_shared: {
1941 LLVMValueRef address = get_src(ctx, instr->src[0]);
1942 LLVMValueRef val = LLVMBuildLoad(ctx->ac.builder, address, "");
1943 return LLVMBuildBitCast(ctx->ac.builder, val,
1944 get_def_type(ctx, &instr->dest.ssa),
1945 "");
1946 }
1947 case nir_var_shader_out:
1948 if (ctx->stage == MESA_SHADER_TESS_CTRL) {
1949 return load_tess_varyings(ctx, instr, false);
1950 }
1951
1952 for (unsigned chan = comp; chan < ve + comp; chan++) {
1953 if (indir_index) {
1954 unsigned count = glsl_count_attribute_slots(
1955 var->type, false);
1956 count -= chan / 4;
1957 LLVMValueRef tmp_vec = ac_build_gather_values_extended(
1958 &ctx->ac, ctx->abi->outputs + idx + chan, count,
1959 stride, true, true);
1960
1961 values[chan] = LLVMBuildExtractElement(ctx->ac.builder,
1962 tmp_vec,
1963 indir_index, "");
1964 } else {
1965 values[chan] = LLVMBuildLoad(ctx->ac.builder,
1966 ctx->abi->outputs[idx + chan + const_index * stride],
1967 "");
1968 }
1969 }
1970 break;
1971 default:
1972 unreachable("unhandle variable mode");
1973 }
1974 ret = ac_build_varying_gather_values(&ctx->ac, values, ve, comp);
1975 return LLVMBuildBitCast(ctx->ac.builder, ret, get_def_type(ctx, &instr->dest.ssa), "");
1976 }
1977
1978 static void
1979 visit_store_var(struct ac_nir_context *ctx,
1980 nir_intrinsic_instr *instr)
1981 {
1982 nir_variable *var = nir_deref_instr_get_variable(nir_instr_as_deref(instr->src[0].ssa->parent_instr));
1983
1984 LLVMValueRef temp_ptr, value;
1985 int idx = var->data.driver_location;
1986 unsigned comp = var->data.location_frac;
1987 LLVMValueRef src = ac_to_float(&ctx->ac, get_src(ctx, instr->src[1]));
1988 int writemask = instr->const_index[0];
1989 LLVMValueRef indir_index;
1990 unsigned const_index;
1991
1992 get_deref_offset(ctx, nir_instr_as_deref(instr->src[0].ssa->parent_instr), false,
1993 NULL, NULL, &const_index, &indir_index);
1994
1995 if (ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src)) == 64) {
1996
1997 src = LLVMBuildBitCast(ctx->ac.builder, src,
1998 LLVMVectorType(ctx->ac.f32, ac_get_llvm_num_components(src) * 2),
1999 "");
2000
2001 writemask = widen_mask(writemask, 2);
2002 }
2003
2004 writemask = writemask << comp;
2005
2006 switch (var->data.mode) {
2007 case nir_var_shader_out:
2008
2009 if (ctx->stage == MESA_SHADER_TESS_CTRL) {
2010 LLVMValueRef vertex_index = NULL;
2011 LLVMValueRef indir_index = NULL;
2012 unsigned const_index = 0;
2013 const bool is_patch = var->data.patch;
2014
2015 get_deref_offset(ctx, nir_instr_as_deref(instr->src[0].ssa->parent_instr),
2016 false, NULL, is_patch ? NULL : &vertex_index,
2017 &const_index, &indir_index);
2018
2019 ctx->abi->store_tcs_outputs(ctx->abi, var,
2020 vertex_index, indir_index,
2021 const_index, src, writemask);
2022 return;
2023 }
2024
2025 for (unsigned chan = 0; chan < 8; chan++) {
2026 int stride = 4;
2027 if (!(writemask & (1 << chan)))
2028 continue;
2029
2030 value = ac_llvm_extract_elem(&ctx->ac, src, chan - comp);
2031
2032 if (var->data.compact)
2033 stride = 1;
2034 if (indir_index) {
2035 unsigned count = glsl_count_attribute_slots(
2036 var->type, false);
2037 count -= chan / 4;
2038 LLVMValueRef tmp_vec = ac_build_gather_values_extended(
2039 &ctx->ac, ctx->abi->outputs + idx + chan, count,
2040 stride, true, true);
2041
2042 tmp_vec = LLVMBuildInsertElement(ctx->ac.builder, tmp_vec,
2043 value, indir_index, "");
2044 build_store_values_extended(&ctx->ac, ctx->abi->outputs + idx + chan,
2045 count, stride, tmp_vec);
2046
2047 } else {
2048 temp_ptr = ctx->abi->outputs[idx + chan + const_index * stride];
2049
2050 LLVMBuildStore(ctx->ac.builder, value, temp_ptr);
2051 }
2052 }
2053 break;
2054 case nir_var_local:
2055 for (unsigned chan = 0; chan < 8; chan++) {
2056 if (!(writemask & (1 << chan)))
2057 continue;
2058
2059 value = ac_llvm_extract_elem(&ctx->ac, src, chan);
2060 if (indir_index) {
2061 unsigned count = glsl_count_attribute_slots(
2062 var->type, false);
2063 count -= chan / 4;
2064 LLVMValueRef tmp_vec = ac_build_gather_values_extended(
2065 &ctx->ac, ctx->locals + idx + chan, count,
2066 4, true, true);
2067
2068 tmp_vec = LLVMBuildInsertElement(ctx->ac.builder, tmp_vec,
2069 value, indir_index, "");
2070 build_store_values_extended(&ctx->ac, ctx->locals + idx + chan,
2071 count, 4, tmp_vec);
2072 } else {
2073 temp_ptr = ctx->locals[idx + chan + const_index * 4];
2074
2075 LLVMBuildStore(ctx->ac.builder, value, temp_ptr);
2076 }
2077 }
2078 break;
2079 case nir_var_shared: {
2080 int writemask = instr->const_index[0];
2081 LLVMValueRef address = get_src(ctx, instr->src[0]);
2082 LLVMValueRef val = get_src(ctx, instr->src[1]);
2083 if (util_is_power_of_two_nonzero(writemask)) {
2084 val = LLVMBuildBitCast(
2085 ctx->ac.builder, val,
2086 LLVMGetElementType(LLVMTypeOf(address)), "");
2087 LLVMBuildStore(ctx->ac.builder, val, address);
2088 } else {
2089 for (unsigned chan = 0; chan < 4; chan++) {
2090 if (!(writemask & (1 << chan)))
2091 continue;
2092 LLVMValueRef ptr =
2093 LLVMBuildStructGEP(ctx->ac.builder,
2094 address, chan, "");
2095 LLVMValueRef src = ac_llvm_extract_elem(&ctx->ac, val,
2096 chan);
2097 src = LLVMBuildBitCast(
2098 ctx->ac.builder, src,
2099 LLVMGetElementType(LLVMTypeOf(ptr)), "");
2100 LLVMBuildStore(ctx->ac.builder, src, ptr);
2101 }
2102 }
2103 break;
2104 }
2105 default:
2106 break;
2107 }
2108 }
2109
2110 static int image_type_to_components_count(enum glsl_sampler_dim dim, bool array)
2111 {
2112 switch (dim) {
2113 case GLSL_SAMPLER_DIM_BUF:
2114 return 1;
2115 case GLSL_SAMPLER_DIM_1D:
2116 return array ? 2 : 1;
2117 case GLSL_SAMPLER_DIM_2D:
2118 return array ? 3 : 2;
2119 case GLSL_SAMPLER_DIM_MS:
2120 return array ? 4 : 3;
2121 case GLSL_SAMPLER_DIM_3D:
2122 case GLSL_SAMPLER_DIM_CUBE:
2123 return 3;
2124 case GLSL_SAMPLER_DIM_RECT:
2125 case GLSL_SAMPLER_DIM_SUBPASS:
2126 return 2;
2127 case GLSL_SAMPLER_DIM_SUBPASS_MS:
2128 return 3;
2129 default:
2130 break;
2131 }
2132 return 0;
2133 }
2134
2135
2136 /* Adjust the sample index according to FMASK.
2137 *
2138 * For uncompressed MSAA surfaces, FMASK should return 0x76543210,
2139 * which is the identity mapping. Each nibble says which physical sample
2140 * should be fetched to get that sample.
2141 *
2142 * For example, 0x11111100 means there are only 2 samples stored and
2143 * the second sample covers 3/4 of the pixel. When reading samples 0
2144 * and 1, return physical sample 0 (determined by the first two 0s
2145 * in FMASK), otherwise return physical sample 1.
2146 *
2147 * The sample index should be adjusted as follows:
2148 * sample_index = (fmask >> (sample_index * 4)) & 0xF;
2149 */
2150 static LLVMValueRef adjust_sample_index_using_fmask(struct ac_llvm_context *ctx,
2151 LLVMValueRef coord_x, LLVMValueRef coord_y,
2152 LLVMValueRef coord_z,
2153 LLVMValueRef sample_index,
2154 LLVMValueRef fmask_desc_ptr)
2155 {
2156 struct ac_image_args args = {0};
2157 LLVMValueRef res;
2158
2159 args.coords[0] = coord_x;
2160 args.coords[1] = coord_y;
2161 if (coord_z)
2162 args.coords[2] = coord_z;
2163
2164 args.opcode = ac_image_load;
2165 args.dim = coord_z ? ac_image_2darray : ac_image_2d;
2166 args.resource = fmask_desc_ptr;
2167 args.dmask = 0xf;
2168 args.attributes = AC_FUNC_ATTR_READNONE;
2169
2170 res = ac_build_image_opcode(ctx, &args);
2171
2172 res = ac_to_integer(ctx, res);
2173 LLVMValueRef four = LLVMConstInt(ctx->i32, 4, false);
2174 LLVMValueRef F = LLVMConstInt(ctx->i32, 0xf, false);
2175
2176 LLVMValueRef fmask = LLVMBuildExtractElement(ctx->builder,
2177 res,
2178 ctx->i32_0, "");
2179
2180 LLVMValueRef sample_index4 =
2181 LLVMBuildMul(ctx->builder, sample_index, four, "");
2182 LLVMValueRef shifted_fmask =
2183 LLVMBuildLShr(ctx->builder, fmask, sample_index4, "");
2184 LLVMValueRef final_sample =
2185 LLVMBuildAnd(ctx->builder, shifted_fmask, F, "");
2186
2187 /* Don't rewrite the sample index if WORD1.DATA_FORMAT of the FMASK
2188 * resource descriptor is 0 (invalid),
2189 */
2190 LLVMValueRef fmask_desc =
2191 LLVMBuildBitCast(ctx->builder, fmask_desc_ptr,
2192 ctx->v8i32, "");
2193
2194 LLVMValueRef fmask_word1 =
2195 LLVMBuildExtractElement(ctx->builder, fmask_desc,
2196 ctx->i32_1, "");
2197
2198 LLVMValueRef word1_is_nonzero =
2199 LLVMBuildICmp(ctx->builder, LLVMIntNE,
2200 fmask_word1, ctx->i32_0, "");
2201
2202 /* Replace the MSAA sample index. */
2203 sample_index =
2204 LLVMBuildSelect(ctx->builder, word1_is_nonzero,
2205 final_sample, sample_index, "");
2206 return sample_index;
2207 }
2208
2209 static nir_variable *get_image_variable(const nir_intrinsic_instr *instr)
2210 {
2211 assert(instr->src[0].is_ssa);
2212 return nir_deref_instr_get_variable(nir_instr_as_deref(instr->src[0].ssa->parent_instr));
2213 }
2214
2215 static LLVMValueRef get_image_descriptor(struct ac_nir_context *ctx,
2216 const nir_intrinsic_instr *instr,
2217 enum ac_descriptor_type desc_type,
2218 bool write)
2219 {
2220 return get_sampler_desc(ctx, nir_instr_as_deref(instr->src[0].ssa->parent_instr), desc_type, NULL, true, write);
2221 }
2222
2223 static void get_image_coords(struct ac_nir_context *ctx,
2224 const nir_intrinsic_instr *instr,
2225 struct ac_image_args *args)
2226 {
2227 const struct glsl_type *type = glsl_without_array(get_image_variable(instr)->type);
2228
2229 LLVMValueRef src0 = get_src(ctx, instr->src[1]);
2230 LLVMValueRef masks[] = {
2231 LLVMConstInt(ctx->ac.i32, 0, false), LLVMConstInt(ctx->ac.i32, 1, false),
2232 LLVMConstInt(ctx->ac.i32, 2, false), LLVMConstInt(ctx->ac.i32, 3, false),
2233 };
2234 LLVMValueRef sample_index = ac_llvm_extract_elem(&ctx->ac, get_src(ctx, instr->src[2]), 0);
2235
2236 int count;
2237 enum glsl_sampler_dim dim = glsl_get_sampler_dim(type);
2238 bool is_array = glsl_sampler_type_is_array(type);
2239 bool add_frag_pos = (dim == GLSL_SAMPLER_DIM_SUBPASS ||
2240 dim == GLSL_SAMPLER_DIM_SUBPASS_MS);
2241 bool is_ms = (dim == GLSL_SAMPLER_DIM_MS ||
2242 dim == GLSL_SAMPLER_DIM_SUBPASS_MS);
2243 bool gfx9_1d = ctx->ac.chip_class >= GFX9 && dim == GLSL_SAMPLER_DIM_1D;
2244 count = image_type_to_components_count(dim, is_array);
2245
2246 if (is_ms) {
2247 LLVMValueRef fmask_load_address[3];
2248 int chan;
2249
2250 fmask_load_address[0] = LLVMBuildExtractElement(ctx->ac.builder, src0, masks[0], "");
2251 fmask_load_address[1] = LLVMBuildExtractElement(ctx->ac.builder, src0, masks[1], "");
2252 if (is_array)
2253 fmask_load_address[2] = LLVMBuildExtractElement(ctx->ac.builder, src0, masks[2], "");
2254 else
2255 fmask_load_address[2] = NULL;
2256 if (add_frag_pos) {
2257 for (chan = 0; chan < 2; ++chan)
2258 fmask_load_address[chan] =
2259 LLVMBuildAdd(ctx->ac.builder, fmask_load_address[chan],
2260 LLVMBuildFPToUI(ctx->ac.builder, ctx->abi->frag_pos[chan],
2261 ctx->ac.i32, ""), "");
2262 fmask_load_address[2] = ac_to_integer(&ctx->ac, ctx->abi->inputs[ac_llvm_reg_index_soa(VARYING_SLOT_LAYER, 0)]);
2263 }
2264 sample_index = adjust_sample_index_using_fmask(&ctx->ac,
2265 fmask_load_address[0],
2266 fmask_load_address[1],
2267 fmask_load_address[2],
2268 sample_index,
2269 get_sampler_desc(ctx, nir_instr_as_deref(instr->src[0].ssa->parent_instr),
2270 AC_DESC_FMASK, NULL, false, false));
2271 }
2272 if (count == 1 && !gfx9_1d) {
2273 if (instr->src[1].ssa->num_components)
2274 args->coords[0] = LLVMBuildExtractElement(ctx->ac.builder, src0, masks[0], "");
2275 else
2276 args->coords[0] = src0;
2277 } else {
2278 int chan;
2279 if (is_ms)
2280 count--;
2281 for (chan = 0; chan < count; ++chan) {
2282 args->coords[chan] = ac_llvm_extract_elem(&ctx->ac, src0, chan);
2283 }
2284 if (add_frag_pos) {
2285 for (chan = 0; chan < 2; ++chan) {
2286 args->coords[chan] = LLVMBuildAdd(
2287 ctx->ac.builder, args->coords[chan],
2288 LLVMBuildFPToUI(
2289 ctx->ac.builder, ctx->abi->frag_pos[chan],
2290 ctx->ac.i32, ""), "");
2291 }
2292 args->coords[2] = ac_to_integer(&ctx->ac,
2293 ctx->abi->inputs[ac_llvm_reg_index_soa(VARYING_SLOT_LAYER, 0)]);
2294 count++;
2295 }
2296
2297 if (gfx9_1d) {
2298 if (is_array) {
2299 args->coords[2] = args->coords[1];
2300 args->coords[1] = ctx->ac.i32_0;
2301 } else
2302 args->coords[1] = ctx->ac.i32_0;
2303 count++;
2304 }
2305
2306 if (is_ms) {
2307 args->coords[count] = sample_index;
2308 count++;
2309 }
2310 }
2311 }
2312
2313 static LLVMValueRef get_image_buffer_descriptor(struct ac_nir_context *ctx,
2314 const nir_intrinsic_instr *instr, bool write)
2315 {
2316 LLVMValueRef rsrc = get_image_descriptor(ctx, instr, AC_DESC_BUFFER, write);
2317 if (ctx->abi->gfx9_stride_size_workaround) {
2318 LLVMValueRef elem_count = LLVMBuildExtractElement(ctx->ac.builder, rsrc, LLVMConstInt(ctx->ac.i32, 2, 0), "");
2319 LLVMValueRef stride = LLVMBuildExtractElement(ctx->ac.builder, rsrc, LLVMConstInt(ctx->ac.i32, 1, 0), "");
2320 stride = LLVMBuildLShr(ctx->ac.builder, stride, LLVMConstInt(ctx->ac.i32, 16, 0), "");
2321
2322 LLVMValueRef new_elem_count = LLVMBuildSelect(ctx->ac.builder,
2323 LLVMBuildICmp(ctx->ac.builder, LLVMIntUGT, elem_count, stride, ""),
2324 elem_count, stride, "");
2325
2326 rsrc = LLVMBuildInsertElement(ctx->ac.builder, rsrc, new_elem_count,
2327 LLVMConstInt(ctx->ac.i32, 2, 0), "");
2328 }
2329 return rsrc;
2330 }
2331
2332 static LLVMValueRef visit_image_load(struct ac_nir_context *ctx,
2333 const nir_intrinsic_instr *instr)
2334 {
2335 LLVMValueRef res;
2336 const nir_variable *var = get_image_variable(instr);
2337 const struct glsl_type *type = var->type;
2338
2339 type = glsl_without_array(type);
2340
2341 const enum glsl_sampler_dim dim = glsl_get_sampler_dim(type);
2342 if (dim == GLSL_SAMPLER_DIM_BUF) {
2343 unsigned mask = nir_ssa_def_components_read(&instr->dest.ssa);
2344 unsigned num_channels = util_last_bit(mask);
2345 LLVMValueRef rsrc, vindex;
2346
2347 rsrc = get_image_buffer_descriptor(ctx, instr, false);
2348 vindex = LLVMBuildExtractElement(ctx->ac.builder, get_src(ctx, instr->src[1]),
2349 ctx->ac.i32_0, "");
2350
2351 /* TODO: set "glc" and "can_speculate" when OpenGL needs it. */
2352 res = ac_build_buffer_load_format(&ctx->ac, rsrc, vindex,
2353 ctx->ac.i32_0, num_channels,
2354 false, false);
2355 res = ac_build_expand_to_vec4(&ctx->ac, res, num_channels);
2356
2357 res = ac_trim_vector(&ctx->ac, res, instr->dest.ssa.num_components);
2358 res = ac_to_integer(&ctx->ac, res);
2359 } else {
2360 struct ac_image_args args = {};
2361 args.opcode = ac_image_load;
2362 get_image_coords(ctx, instr, &args);
2363 args.resource = get_image_descriptor(ctx, instr, AC_DESC_IMAGE, false);
2364 args.dim = get_ac_image_dim(&ctx->ac, glsl_get_sampler_dim(type),
2365 glsl_sampler_type_is_array(type));
2366 args.dmask = 15;
2367 args.attributes = AC_FUNC_ATTR_READONLY;
2368 if (var->data.image.access & (ACCESS_VOLATILE | ACCESS_COHERENT))
2369 args.cache_policy |= ac_glc;
2370
2371 res = ac_build_image_opcode(&ctx->ac, &args);
2372 }
2373 return ac_to_integer(&ctx->ac, res);
2374 }
2375
2376 static void visit_image_store(struct ac_nir_context *ctx,
2377 nir_intrinsic_instr *instr)
2378 {
2379 LLVMValueRef params[8];
2380 const nir_variable *var = get_image_variable(instr);
2381 const struct glsl_type *type = glsl_without_array(var->type);
2382 const enum glsl_sampler_dim dim = glsl_get_sampler_dim(type);
2383 LLVMValueRef glc = ctx->ac.i1false;
2384 bool force_glc = ctx->ac.chip_class == SI;
2385 if (force_glc)
2386 glc = ctx->ac.i1true;
2387
2388 if (dim == GLSL_SAMPLER_DIM_BUF) {
2389 LLVMValueRef rsrc = get_image_buffer_descriptor(ctx, instr, true);
2390
2391 params[0] = ac_to_float(&ctx->ac, get_src(ctx, instr->src[3])); /* data */
2392 params[1] = rsrc;
2393 params[2] = LLVMBuildExtractElement(ctx->ac.builder, get_src(ctx, instr->src[1]),
2394 ctx->ac.i32_0, ""); /* vindex */
2395 params[3] = ctx->ac.i32_0; /* voffset */
2396 if (HAVE_LLVM >= 0x800) {
2397 params[4] = ctx->ac.i32_0; /* soffset */
2398 params[5] = glc ? ctx->ac.i32_1 : ctx->ac.i32_0;
2399 ac_build_intrinsic(&ctx->ac, "llvm.amdgcn.struct.buffer.store.format.v4f32", ctx->ac.voidt,
2400 params, 6, 0);
2401 } else {
2402 params[4] = glc; /* glc */
2403 params[5] = ctx->ac.i1false; /* slc */
2404 ac_build_intrinsic(&ctx->ac, "llvm.amdgcn.buffer.store.format.v4f32", ctx->ac.voidt,
2405 params, 6, 0);
2406 }
2407 } else {
2408 struct ac_image_args args = {};
2409 args.opcode = ac_image_store;
2410 args.data[0] = ac_to_float(&ctx->ac, get_src(ctx, instr->src[3]));
2411 get_image_coords(ctx, instr, &args);
2412 args.resource = get_image_descriptor(ctx, instr, AC_DESC_IMAGE, true);
2413 args.dim = get_ac_image_dim(&ctx->ac, glsl_get_sampler_dim(type),
2414 glsl_sampler_type_is_array(type));
2415 args.dmask = 15;
2416 if (force_glc || (var->data.image.access & (ACCESS_VOLATILE | ACCESS_COHERENT)))
2417 args.cache_policy |= ac_glc;
2418
2419 ac_build_image_opcode(&ctx->ac, &args);
2420 }
2421
2422 }
2423
2424 static LLVMValueRef visit_image_atomic(struct ac_nir_context *ctx,
2425 const nir_intrinsic_instr *instr)
2426 {
2427 LLVMValueRef params[7];
2428 int param_count = 0;
2429 const nir_variable *var = get_image_variable(instr);
2430
2431 bool cmpswap = instr->intrinsic == nir_intrinsic_image_deref_atomic_comp_swap;
2432 const char *atomic_name;
2433 char intrinsic_name[64];
2434 enum ac_atomic_op atomic_subop;
2435 const struct glsl_type *type = glsl_without_array(var->type);
2436 MAYBE_UNUSED int length;
2437
2438 bool is_unsigned = glsl_get_sampler_result_type(type) == GLSL_TYPE_UINT;
2439
2440 switch (instr->intrinsic) {
2441 case nir_intrinsic_image_deref_atomic_add:
2442 atomic_name = "add";
2443 atomic_subop = ac_atomic_add;
2444 break;
2445 case nir_intrinsic_image_deref_atomic_min:
2446 atomic_name = is_unsigned ? "umin" : "smin";
2447 atomic_subop = is_unsigned ? ac_atomic_umin : ac_atomic_smin;
2448 break;
2449 case nir_intrinsic_image_deref_atomic_max:
2450 atomic_name = is_unsigned ? "umax" : "smax";
2451 atomic_subop = is_unsigned ? ac_atomic_umax : ac_atomic_smax;
2452 break;
2453 case nir_intrinsic_image_deref_atomic_and:
2454 atomic_name = "and";
2455 atomic_subop = ac_atomic_and;
2456 break;
2457 case nir_intrinsic_image_deref_atomic_or:
2458 atomic_name = "or";
2459 atomic_subop = ac_atomic_or;
2460 break;
2461 case nir_intrinsic_image_deref_atomic_xor:
2462 atomic_name = "xor";
2463 atomic_subop = ac_atomic_xor;
2464 break;
2465 case nir_intrinsic_image_deref_atomic_exchange:
2466 atomic_name = "swap";
2467 atomic_subop = ac_atomic_swap;
2468 break;
2469 case nir_intrinsic_image_deref_atomic_comp_swap:
2470 atomic_name = "cmpswap";
2471 atomic_subop = 0; /* not used */
2472 break;
2473 default:
2474 abort();
2475 }
2476
2477 if (cmpswap)
2478 params[param_count++] = get_src(ctx, instr->src[4]);
2479 params[param_count++] = get_src(ctx, instr->src[3]);
2480
2481 if (glsl_get_sampler_dim(type) == GLSL_SAMPLER_DIM_BUF) {
2482 params[param_count++] = get_image_buffer_descriptor(ctx, instr, true);
2483 params[param_count++] = LLVMBuildExtractElement(ctx->ac.builder, get_src(ctx, instr->src[1]),
2484 ctx->ac.i32_0, ""); /* vindex */
2485 params[param_count++] = ctx->ac.i32_0; /* voffset */
2486 if (HAVE_LLVM >= 0x800) {
2487 params[param_count++] = ctx->ac.i32_0; /* soffset */
2488 params[param_count++] = ctx->ac.i32_0; /* slc */
2489
2490 length = snprintf(intrinsic_name, sizeof(intrinsic_name),
2491 "llvm.amdgcn.struct.buffer.atomic.%s.i32", atomic_name);
2492 } else {
2493 params[param_count++] = ctx->ac.i1false; /* slc */
2494
2495 length = snprintf(intrinsic_name, sizeof(intrinsic_name),
2496 "llvm.amdgcn.buffer.atomic.%s", atomic_name);
2497 }
2498
2499 assert(length < sizeof(intrinsic_name));
2500 return ac_build_intrinsic(&ctx->ac, intrinsic_name, ctx->ac.i32,
2501 params, param_count, 0);
2502 } else {
2503 struct ac_image_args args = {};
2504 args.opcode = cmpswap ? ac_image_atomic_cmpswap : ac_image_atomic;
2505 args.atomic = atomic_subop;
2506 args.data[0] = params[0];
2507 if (cmpswap)
2508 args.data[1] = params[1];
2509 get_image_coords(ctx, instr, &args);
2510 args.resource = get_image_descriptor(ctx, instr, AC_DESC_IMAGE, true);
2511 args.dim = get_ac_image_dim(&ctx->ac, glsl_get_sampler_dim(type),
2512 glsl_sampler_type_is_array(type));
2513
2514 return ac_build_image_opcode(&ctx->ac, &args);
2515 }
2516 }
2517
2518 static LLVMValueRef visit_image_samples(struct ac_nir_context *ctx,
2519 const nir_intrinsic_instr *instr)
2520 {
2521 const nir_variable *var = get_image_variable(instr);
2522 const struct glsl_type *type = glsl_without_array(var->type);
2523
2524 struct ac_image_args args = { 0 };
2525 args.dim = get_ac_sampler_dim(&ctx->ac, glsl_get_sampler_dim(type),
2526 glsl_sampler_type_is_array(type));
2527 args.dmask = 0xf;
2528 args.resource = get_image_descriptor(ctx, instr, AC_DESC_IMAGE, false);
2529 args.opcode = ac_image_get_resinfo;
2530 args.lod = ctx->ac.i32_0;
2531 args.attributes = AC_FUNC_ATTR_READNONE;
2532
2533 return ac_build_image_opcode(&ctx->ac, &args);
2534 }
2535
2536 static LLVMValueRef visit_image_size(struct ac_nir_context *ctx,
2537 const nir_intrinsic_instr *instr)
2538 {
2539 LLVMValueRef res;
2540 const nir_variable *var = get_image_variable(instr);
2541 const struct glsl_type *type = glsl_without_array(var->type);
2542
2543 if (glsl_get_sampler_dim(type) == GLSL_SAMPLER_DIM_BUF)
2544 return get_buffer_size(ctx, get_image_descriptor(ctx, instr, AC_DESC_BUFFER, false), true);
2545
2546 struct ac_image_args args = { 0 };
2547
2548 args.dim = get_ac_image_dim(&ctx->ac, glsl_get_sampler_dim(type),
2549 glsl_sampler_type_is_array(type));
2550 args.dmask = 0xf;
2551 args.resource = get_image_descriptor(ctx, instr, AC_DESC_IMAGE, false);
2552 args.opcode = ac_image_get_resinfo;
2553 args.lod = ctx->ac.i32_0;
2554 args.attributes = AC_FUNC_ATTR_READNONE;
2555
2556 res = ac_build_image_opcode(&ctx->ac, &args);
2557
2558 LLVMValueRef two = LLVMConstInt(ctx->ac.i32, 2, false);
2559
2560 if (glsl_get_sampler_dim(type) == GLSL_SAMPLER_DIM_CUBE &&
2561 glsl_sampler_type_is_array(type)) {
2562 LLVMValueRef six = LLVMConstInt(ctx->ac.i32, 6, false);
2563 LLVMValueRef z = LLVMBuildExtractElement(ctx->ac.builder, res, two, "");
2564 z = LLVMBuildSDiv(ctx->ac.builder, z, six, "");
2565 res = LLVMBuildInsertElement(ctx->ac.builder, res, z, two, "");
2566 }
2567 if (ctx->ac.chip_class >= GFX9 &&
2568 glsl_get_sampler_dim(type) == GLSL_SAMPLER_DIM_1D &&
2569 glsl_sampler_type_is_array(type)) {
2570 LLVMValueRef layers = LLVMBuildExtractElement(ctx->ac.builder, res, two, "");
2571 res = LLVMBuildInsertElement(ctx->ac.builder, res, layers,
2572 ctx->ac.i32_1, "");
2573
2574 }
2575 return res;
2576 }
2577
2578 static void emit_membar(struct ac_llvm_context *ac,
2579 const nir_intrinsic_instr *instr)
2580 {
2581 unsigned waitcnt = NOOP_WAITCNT;
2582
2583 switch (instr->intrinsic) {
2584 case nir_intrinsic_memory_barrier:
2585 case nir_intrinsic_group_memory_barrier:
2586 waitcnt &= VM_CNT & LGKM_CNT;
2587 break;
2588 case nir_intrinsic_memory_barrier_atomic_counter:
2589 case nir_intrinsic_memory_barrier_buffer:
2590 case nir_intrinsic_memory_barrier_image:
2591 waitcnt &= VM_CNT;
2592 break;
2593 case nir_intrinsic_memory_barrier_shared:
2594 waitcnt &= LGKM_CNT;
2595 break;
2596 default:
2597 break;
2598 }
2599 if (waitcnt != NOOP_WAITCNT)
2600 ac_build_waitcnt(ac, waitcnt);
2601 }
2602
2603 void ac_emit_barrier(struct ac_llvm_context *ac, gl_shader_stage stage)
2604 {
2605 /* SI only (thanks to a hw bug workaround):
2606 * The real barrier instruction isn’t needed, because an entire patch
2607 * always fits into a single wave.
2608 */
2609 if (ac->chip_class == SI && stage == MESA_SHADER_TESS_CTRL) {
2610 ac_build_waitcnt(ac, LGKM_CNT & VM_CNT);
2611 return;
2612 }
2613 ac_build_s_barrier(ac);
2614 }
2615
2616 static void emit_discard(struct ac_nir_context *ctx,
2617 const nir_intrinsic_instr *instr)
2618 {
2619 LLVMValueRef cond;
2620
2621 if (instr->intrinsic == nir_intrinsic_discard_if) {
2622 cond = LLVMBuildICmp(ctx->ac.builder, LLVMIntEQ,
2623 get_src(ctx, instr->src[0]),
2624 ctx->ac.i32_0, "");
2625 } else {
2626 assert(instr->intrinsic == nir_intrinsic_discard);
2627 cond = ctx->ac.i1false;
2628 }
2629
2630 ctx->abi->emit_kill(ctx->abi, cond);
2631 }
2632
2633 static LLVMValueRef
2634 visit_load_helper_invocation(struct ac_nir_context *ctx)
2635 {
2636 LLVMValueRef result = ac_build_intrinsic(&ctx->ac,
2637 "llvm.amdgcn.ps.live",
2638 ctx->ac.i1, NULL, 0,
2639 AC_FUNC_ATTR_READNONE);
2640 result = LLVMBuildNot(ctx->ac.builder, result, "");
2641 return LLVMBuildSExt(ctx->ac.builder, result, ctx->ac.i32, "");
2642 }
2643
2644 static LLVMValueRef
2645 visit_load_local_invocation_index(struct ac_nir_context *ctx)
2646 {
2647 LLVMValueRef result;
2648 LLVMValueRef thread_id = ac_get_thread_id(&ctx->ac);
2649 result = LLVMBuildAnd(ctx->ac.builder, ctx->abi->tg_size,
2650 LLVMConstInt(ctx->ac.i32, 0xfc0, false), "");
2651
2652 return LLVMBuildAdd(ctx->ac.builder, result, thread_id, "");
2653 }
2654
2655 static LLVMValueRef
2656 visit_load_subgroup_id(struct ac_nir_context *ctx)
2657 {
2658 if (ctx->stage == MESA_SHADER_COMPUTE) {
2659 LLVMValueRef result;
2660 result = LLVMBuildAnd(ctx->ac.builder, ctx->abi->tg_size,
2661 LLVMConstInt(ctx->ac.i32, 0xfc0, false), "");
2662 return LLVMBuildLShr(ctx->ac.builder, result, LLVMConstInt(ctx->ac.i32, 6, false), "");
2663 } else {
2664 return LLVMConstInt(ctx->ac.i32, 0, false);
2665 }
2666 }
2667
2668 static LLVMValueRef
2669 visit_load_num_subgroups(struct ac_nir_context *ctx)
2670 {
2671 if (ctx->stage == MESA_SHADER_COMPUTE) {
2672 return LLVMBuildAnd(ctx->ac.builder, ctx->abi->tg_size,
2673 LLVMConstInt(ctx->ac.i32, 0x3f, false), "");
2674 } else {
2675 return LLVMConstInt(ctx->ac.i32, 1, false);
2676 }
2677 }
2678
2679 static LLVMValueRef
2680 visit_first_invocation(struct ac_nir_context *ctx)
2681 {
2682 LLVMValueRef active_set = ac_build_ballot(&ctx->ac, ctx->ac.i32_1);
2683
2684 /* The second argument is whether cttz(0) should be defined, but we do not care. */
2685 LLVMValueRef args[] = {active_set, ctx->ac.i1false};
2686 LLVMValueRef result = ac_build_intrinsic(&ctx->ac,
2687 "llvm.cttz.i64",
2688 ctx->ac.i64, args, 2,
2689 AC_FUNC_ATTR_NOUNWIND |
2690 AC_FUNC_ATTR_READNONE);
2691
2692 return LLVMBuildTrunc(ctx->ac.builder, result, ctx->ac.i32, "");
2693 }
2694
2695 static LLVMValueRef
2696 visit_load_shared(struct ac_nir_context *ctx,
2697 const nir_intrinsic_instr *instr)
2698 {
2699 LLVMValueRef values[4], derived_ptr, index, ret;
2700
2701 LLVMValueRef ptr = get_memory_ptr(ctx, instr->src[0]);
2702
2703 for (int chan = 0; chan < instr->num_components; chan++) {
2704 index = LLVMConstInt(ctx->ac.i32, chan, 0);
2705 derived_ptr = LLVMBuildGEP(ctx->ac.builder, ptr, &index, 1, "");
2706 values[chan] = LLVMBuildLoad(ctx->ac.builder, derived_ptr, "");
2707 }
2708
2709 ret = ac_build_gather_values(&ctx->ac, values, instr->num_components);
2710 return LLVMBuildBitCast(ctx->ac.builder, ret, get_def_type(ctx, &instr->dest.ssa), "");
2711 }
2712
2713 static void
2714 visit_store_shared(struct ac_nir_context *ctx,
2715 const nir_intrinsic_instr *instr)
2716 {
2717 LLVMValueRef derived_ptr, data,index;
2718 LLVMBuilderRef builder = ctx->ac.builder;
2719
2720 LLVMValueRef ptr = get_memory_ptr(ctx, instr->src[1]);
2721 LLVMValueRef src = get_src(ctx, instr->src[0]);
2722
2723 int writemask = nir_intrinsic_write_mask(instr);
2724 for (int chan = 0; chan < 4; chan++) {
2725 if (!(writemask & (1 << chan))) {
2726 continue;
2727 }
2728 data = ac_llvm_extract_elem(&ctx->ac, src, chan);
2729 index = LLVMConstInt(ctx->ac.i32, chan, 0);
2730 derived_ptr = LLVMBuildGEP(builder, ptr, &index, 1, "");
2731 LLVMBuildStore(builder, data, derived_ptr);
2732 }
2733 }
2734
2735 static LLVMValueRef visit_var_atomic(struct ac_nir_context *ctx,
2736 const nir_intrinsic_instr *instr,
2737 LLVMValueRef ptr, int src_idx)
2738 {
2739 LLVMValueRef result;
2740 LLVMValueRef src = get_src(ctx, instr->src[src_idx]);
2741
2742 if (instr->intrinsic == nir_intrinsic_shared_atomic_comp_swap ||
2743 instr->intrinsic == nir_intrinsic_deref_atomic_comp_swap) {
2744 LLVMValueRef src1 = get_src(ctx, instr->src[src_idx + 1]);
2745 result = LLVMBuildAtomicCmpXchg(ctx->ac.builder,
2746 ptr, src, src1,
2747 LLVMAtomicOrderingSequentiallyConsistent,
2748 LLVMAtomicOrderingSequentiallyConsistent,
2749 false);
2750 result = LLVMBuildExtractValue(ctx->ac.builder, result, 0, "");
2751 } else {
2752 LLVMAtomicRMWBinOp op;
2753 switch (instr->intrinsic) {
2754 case nir_intrinsic_shared_atomic_add:
2755 case nir_intrinsic_deref_atomic_add:
2756 op = LLVMAtomicRMWBinOpAdd;
2757 break;
2758 case nir_intrinsic_shared_atomic_umin:
2759 case nir_intrinsic_deref_atomic_umin:
2760 op = LLVMAtomicRMWBinOpUMin;
2761 break;
2762 case nir_intrinsic_shared_atomic_umax:
2763 case nir_intrinsic_deref_atomic_umax:
2764 op = LLVMAtomicRMWBinOpUMax;
2765 break;
2766 case nir_intrinsic_shared_atomic_imin:
2767 case nir_intrinsic_deref_atomic_imin:
2768 op = LLVMAtomicRMWBinOpMin;
2769 break;
2770 case nir_intrinsic_shared_atomic_imax:
2771 case nir_intrinsic_deref_atomic_imax:
2772 op = LLVMAtomicRMWBinOpMax;
2773 break;
2774 case nir_intrinsic_shared_atomic_and:
2775 case nir_intrinsic_deref_atomic_and:
2776 op = LLVMAtomicRMWBinOpAnd;
2777 break;
2778 case nir_intrinsic_shared_atomic_or:
2779 case nir_intrinsic_deref_atomic_or:
2780 op = LLVMAtomicRMWBinOpOr;
2781 break;
2782 case nir_intrinsic_shared_atomic_xor:
2783 case nir_intrinsic_deref_atomic_xor:
2784 op = LLVMAtomicRMWBinOpXor;
2785 break;
2786 case nir_intrinsic_shared_atomic_exchange:
2787 case nir_intrinsic_deref_atomic_exchange:
2788 op = LLVMAtomicRMWBinOpXchg;
2789 break;
2790 default:
2791 return NULL;
2792 }
2793
2794 result = LLVMBuildAtomicRMW(ctx->ac.builder, op, ptr, ac_to_integer(&ctx->ac, src),
2795 LLVMAtomicOrderingSequentiallyConsistent,
2796 false);
2797 }
2798 return result;
2799 }
2800
2801 static LLVMValueRef load_sample_pos(struct ac_nir_context *ctx)
2802 {
2803 LLVMValueRef values[2];
2804 LLVMValueRef pos[2];
2805
2806 pos[0] = ac_to_float(&ctx->ac, ctx->abi->frag_pos[0]);
2807 pos[1] = ac_to_float(&ctx->ac, ctx->abi->frag_pos[1]);
2808
2809 values[0] = ac_build_fract(&ctx->ac, pos[0], 32);
2810 values[1] = ac_build_fract(&ctx->ac, pos[1], 32);
2811 return ac_build_gather_values(&ctx->ac, values, 2);
2812 }
2813
2814 static LLVMValueRef visit_interp(struct ac_nir_context *ctx,
2815 const nir_intrinsic_instr *instr)
2816 {
2817 LLVMValueRef result[4];
2818 LLVMValueRef interp_param, attr_number;
2819 unsigned location;
2820 unsigned chan;
2821 LLVMValueRef src_c0 = NULL;
2822 LLVMValueRef src_c1 = NULL;
2823 LLVMValueRef src0 = NULL;
2824
2825 nir_variable *var = nir_deref_instr_get_variable(nir_instr_as_deref(instr->src[0].ssa->parent_instr));
2826 int input_index = var->data.location - VARYING_SLOT_VAR0;
2827 switch (instr->intrinsic) {
2828 case nir_intrinsic_interp_deref_at_centroid:
2829 location = INTERP_CENTROID;
2830 break;
2831 case nir_intrinsic_interp_deref_at_sample:
2832 case nir_intrinsic_interp_deref_at_offset:
2833 location = INTERP_CENTER;
2834 src0 = get_src(ctx, instr->src[1]);
2835 break;
2836 default:
2837 break;
2838 }
2839
2840 if (instr->intrinsic == nir_intrinsic_interp_deref_at_offset) {
2841 src_c0 = ac_to_float(&ctx->ac, LLVMBuildExtractElement(ctx->ac.builder, src0, ctx->ac.i32_0, ""));
2842 src_c1 = ac_to_float(&ctx->ac, LLVMBuildExtractElement(ctx->ac.builder, src0, ctx->ac.i32_1, ""));
2843 } else if (instr->intrinsic == nir_intrinsic_interp_deref_at_sample) {
2844 LLVMValueRef sample_position;
2845 LLVMValueRef halfval = LLVMConstReal(ctx->ac.f32, 0.5f);
2846
2847 /* fetch sample ID */
2848 sample_position = ctx->abi->load_sample_position(ctx->abi, src0);
2849
2850 src_c0 = LLVMBuildExtractElement(ctx->ac.builder, sample_position, ctx->ac.i32_0, "");
2851 src_c0 = LLVMBuildFSub(ctx->ac.builder, src_c0, halfval, "");
2852 src_c1 = LLVMBuildExtractElement(ctx->ac.builder, sample_position, ctx->ac.i32_1, "");
2853 src_c1 = LLVMBuildFSub(ctx->ac.builder, src_c1, halfval, "");
2854 }
2855 interp_param = ctx->abi->lookup_interp_param(ctx->abi, var->data.interpolation, location);
2856 attr_number = LLVMConstInt(ctx->ac.i32, input_index, false);
2857
2858 if (location == INTERP_CENTER) {
2859 LLVMValueRef ij_out[2];
2860 LLVMValueRef ddxy_out = emit_ddxy_interp(ctx, interp_param);
2861
2862 /*
2863 * take the I then J parameters, and the DDX/Y for it, and
2864 * calculate the IJ inputs for the interpolator.
2865 * temp1 = ddx * offset/sample.x + I;
2866 * interp_param.I = ddy * offset/sample.y + temp1;
2867 * temp1 = ddx * offset/sample.x + J;
2868 * interp_param.J = ddy * offset/sample.y + temp1;
2869 */
2870 for (unsigned i = 0; i < 2; i++) {
2871 LLVMValueRef ix_ll = LLVMConstInt(ctx->ac.i32, i, false);
2872 LLVMValueRef iy_ll = LLVMConstInt(ctx->ac.i32, i + 2, false);
2873 LLVMValueRef ddx_el = LLVMBuildExtractElement(ctx->ac.builder,
2874 ddxy_out, ix_ll, "");
2875 LLVMValueRef ddy_el = LLVMBuildExtractElement(ctx->ac.builder,
2876 ddxy_out, iy_ll, "");
2877 LLVMValueRef interp_el = LLVMBuildExtractElement(ctx->ac.builder,
2878 interp_param, ix_ll, "");
2879 LLVMValueRef temp1, temp2;
2880
2881 interp_el = LLVMBuildBitCast(ctx->ac.builder, interp_el,
2882 ctx->ac.f32, "");
2883
2884 temp1 = ac_build_fmad(&ctx->ac, ddx_el, src_c0, interp_el);
2885 temp2 = ac_build_fmad(&ctx->ac, ddy_el, src_c1, temp1);
2886
2887 ij_out[i] = LLVMBuildBitCast(ctx->ac.builder,
2888 temp2, ctx->ac.i32, "");
2889 }
2890 interp_param = ac_build_gather_values(&ctx->ac, ij_out, 2);
2891
2892 }
2893
2894 for (chan = 0; chan < 4; chan++) {
2895 LLVMValueRef llvm_chan = LLVMConstInt(ctx->ac.i32, chan, false);
2896
2897 if (interp_param) {
2898 interp_param = LLVMBuildBitCast(ctx->ac.builder,
2899 interp_param, ctx->ac.v2f32, "");
2900 LLVMValueRef i = LLVMBuildExtractElement(
2901 ctx->ac.builder, interp_param, ctx->ac.i32_0, "");
2902 LLVMValueRef j = LLVMBuildExtractElement(
2903 ctx->ac.builder, interp_param, ctx->ac.i32_1, "");
2904
2905 result[chan] = ac_build_fs_interp(&ctx->ac,
2906 llvm_chan, attr_number,
2907 ctx->abi->prim_mask, i, j);
2908 } else {
2909 result[chan] = ac_build_fs_interp_mov(&ctx->ac,
2910 LLVMConstInt(ctx->ac.i32, 2, false),
2911 llvm_chan, attr_number,
2912 ctx->abi->prim_mask);
2913 }
2914 }
2915 return ac_build_varying_gather_values(&ctx->ac, result, instr->num_components,
2916 var->data.location_frac);
2917 }
2918
2919 static void visit_intrinsic(struct ac_nir_context *ctx,
2920 nir_intrinsic_instr *instr)
2921 {
2922 LLVMValueRef result = NULL;
2923
2924 switch (instr->intrinsic) {
2925 case nir_intrinsic_ballot:
2926 result = ac_build_ballot(&ctx->ac, get_src(ctx, instr->src[0]));
2927 break;
2928 case nir_intrinsic_read_invocation:
2929 result = ac_build_readlane(&ctx->ac, get_src(ctx, instr->src[0]),
2930 get_src(ctx, instr->src[1]));
2931 break;
2932 case nir_intrinsic_read_first_invocation:
2933 result = ac_build_readlane(&ctx->ac, get_src(ctx, instr->src[0]), NULL);
2934 break;
2935 case nir_intrinsic_load_subgroup_invocation:
2936 result = ac_get_thread_id(&ctx->ac);
2937 break;
2938 case nir_intrinsic_load_work_group_id: {
2939 LLVMValueRef values[3];
2940
2941 for (int i = 0; i < 3; i++) {
2942 values[i] = ctx->abi->workgroup_ids[i] ?
2943 ctx->abi->workgroup_ids[i] : ctx->ac.i32_0;
2944 }
2945
2946 result = ac_build_gather_values(&ctx->ac, values, 3);
2947 break;
2948 }
2949 case nir_intrinsic_load_base_vertex:
2950 case nir_intrinsic_load_first_vertex:
2951 result = ctx->abi->load_base_vertex(ctx->abi);
2952 break;
2953 case nir_intrinsic_load_local_group_size:
2954 result = ctx->abi->load_local_group_size(ctx->abi);
2955 break;
2956 case nir_intrinsic_load_vertex_id:
2957 result = LLVMBuildAdd(ctx->ac.builder, ctx->abi->vertex_id,
2958 ctx->abi->base_vertex, "");
2959 break;
2960 case nir_intrinsic_load_vertex_id_zero_base: {
2961 result = ctx->abi->vertex_id;
2962 break;
2963 }
2964 case nir_intrinsic_load_local_invocation_id: {
2965 result = ctx->abi->local_invocation_ids;
2966 break;
2967 }
2968 case nir_intrinsic_load_base_instance:
2969 result = ctx->abi->start_instance;
2970 break;
2971 case nir_intrinsic_load_draw_id:
2972 result = ctx->abi->draw_id;
2973 break;
2974 case nir_intrinsic_load_view_index:
2975 result = ctx->abi->view_index;
2976 break;
2977 case nir_intrinsic_load_invocation_id:
2978 if (ctx->stage == MESA_SHADER_TESS_CTRL)
2979 result = ac_unpack_param(&ctx->ac, ctx->abi->tcs_rel_ids, 8, 5);
2980 else
2981 result = ctx->abi->gs_invocation_id;
2982 break;
2983 case nir_intrinsic_load_primitive_id:
2984 if (ctx->stage == MESA_SHADER_GEOMETRY) {
2985 result = ctx->abi->gs_prim_id;
2986 } else if (ctx->stage == MESA_SHADER_TESS_CTRL) {
2987 result = ctx->abi->tcs_patch_id;
2988 } else if (ctx->stage == MESA_SHADER_TESS_EVAL) {
2989 result = ctx->abi->tes_patch_id;
2990 } else
2991 fprintf(stderr, "Unknown primitive id intrinsic: %d", ctx->stage);
2992 break;
2993 case nir_intrinsic_load_sample_id:
2994 result = ac_unpack_param(&ctx->ac, ctx->abi->ancillary, 8, 4);
2995 break;
2996 case nir_intrinsic_load_sample_pos:
2997 result = load_sample_pos(ctx);
2998 break;
2999 case nir_intrinsic_load_sample_mask_in:
3000 result = ctx->abi->load_sample_mask_in(ctx->abi);
3001 break;
3002 case nir_intrinsic_load_frag_coord: {
3003 LLVMValueRef values[4] = {
3004 ctx->abi->frag_pos[0],
3005 ctx->abi->frag_pos[1],
3006 ctx->abi->frag_pos[2],
3007 ac_build_fdiv(&ctx->ac, ctx->ac.f32_1, ctx->abi->frag_pos[3])
3008 };
3009 result = ac_build_gather_values(&ctx->ac, values, 4);
3010 break;
3011 }
3012 case nir_intrinsic_load_front_face:
3013 result = ctx->abi->front_face;
3014 break;
3015 case nir_intrinsic_load_helper_invocation:
3016 result = visit_load_helper_invocation(ctx);
3017 break;
3018 case nir_intrinsic_load_instance_id:
3019 result = ctx->abi->instance_id;
3020 break;
3021 case nir_intrinsic_load_num_work_groups:
3022 result = ctx->abi->num_work_groups;
3023 break;
3024 case nir_intrinsic_load_local_invocation_index:
3025 result = visit_load_local_invocation_index(ctx);
3026 break;
3027 case nir_intrinsic_load_subgroup_id:
3028 result = visit_load_subgroup_id(ctx);
3029 break;
3030 case nir_intrinsic_load_num_subgroups:
3031 result = visit_load_num_subgroups(ctx);
3032 break;
3033 case nir_intrinsic_first_invocation:
3034 result = visit_first_invocation(ctx);
3035 break;
3036 case nir_intrinsic_load_push_constant:
3037 result = visit_load_push_constant(ctx, instr);
3038 break;
3039 case nir_intrinsic_vulkan_resource_index: {
3040 LLVMValueRef index = get_src(ctx, instr->src[0]);
3041 unsigned desc_set = nir_intrinsic_desc_set(instr);
3042 unsigned binding = nir_intrinsic_binding(instr);
3043
3044 result = ctx->abi->load_resource(ctx->abi, index, desc_set,
3045 binding);
3046 break;
3047 }
3048 case nir_intrinsic_vulkan_resource_reindex:
3049 result = visit_vulkan_resource_reindex(ctx, instr);
3050 break;
3051 case nir_intrinsic_store_ssbo:
3052 visit_store_ssbo(ctx, instr);
3053 break;
3054 case nir_intrinsic_load_ssbo:
3055 result = visit_load_buffer(ctx, instr);
3056 break;
3057 case nir_intrinsic_ssbo_atomic_add:
3058 case nir_intrinsic_ssbo_atomic_imin:
3059 case nir_intrinsic_ssbo_atomic_umin:
3060 case nir_intrinsic_ssbo_atomic_imax:
3061 case nir_intrinsic_ssbo_atomic_umax:
3062 case nir_intrinsic_ssbo_atomic_and:
3063 case nir_intrinsic_ssbo_atomic_or:
3064 case nir_intrinsic_ssbo_atomic_xor:
3065 case nir_intrinsic_ssbo_atomic_exchange:
3066 case nir_intrinsic_ssbo_atomic_comp_swap:
3067 result = visit_atomic_ssbo(ctx, instr);
3068 break;
3069 case nir_intrinsic_load_ubo:
3070 result = visit_load_ubo_buffer(ctx, instr);
3071 break;
3072 case nir_intrinsic_get_buffer_size:
3073 result = visit_get_buffer_size(ctx, instr);
3074 break;
3075 case nir_intrinsic_load_deref:
3076 result = visit_load_var(ctx, instr);
3077 break;
3078 case nir_intrinsic_store_deref:
3079 visit_store_var(ctx, instr);
3080 break;
3081 case nir_intrinsic_load_shared:
3082 result = visit_load_shared(ctx, instr);
3083 break;
3084 case nir_intrinsic_store_shared:
3085 visit_store_shared(ctx, instr);
3086 break;
3087 case nir_intrinsic_image_deref_samples:
3088 result = visit_image_samples(ctx, instr);
3089 break;
3090 case nir_intrinsic_image_deref_load:
3091 result = visit_image_load(ctx, instr);
3092 break;
3093 case nir_intrinsic_image_deref_store:
3094 visit_image_store(ctx, instr);
3095 break;
3096 case nir_intrinsic_image_deref_atomic_add:
3097 case nir_intrinsic_image_deref_atomic_min:
3098 case nir_intrinsic_image_deref_atomic_max:
3099 case nir_intrinsic_image_deref_atomic_and:
3100 case nir_intrinsic_image_deref_atomic_or:
3101 case nir_intrinsic_image_deref_atomic_xor:
3102 case nir_intrinsic_image_deref_atomic_exchange:
3103 case nir_intrinsic_image_deref_atomic_comp_swap:
3104 result = visit_image_atomic(ctx, instr);
3105 break;
3106 case nir_intrinsic_image_deref_size:
3107 result = visit_image_size(ctx, instr);
3108 break;
3109 case nir_intrinsic_shader_clock:
3110 result = ac_build_shader_clock(&ctx->ac);
3111 break;
3112 case nir_intrinsic_discard:
3113 case nir_intrinsic_discard_if:
3114 emit_discard(ctx, instr);
3115 break;
3116 case nir_intrinsic_memory_barrier:
3117 case nir_intrinsic_group_memory_barrier:
3118 case nir_intrinsic_memory_barrier_atomic_counter:
3119 case nir_intrinsic_memory_barrier_buffer:
3120 case nir_intrinsic_memory_barrier_image:
3121 case nir_intrinsic_memory_barrier_shared:
3122 emit_membar(&ctx->ac, instr);
3123 break;
3124 case nir_intrinsic_barrier:
3125 ac_emit_barrier(&ctx->ac, ctx->stage);
3126 break;
3127 case nir_intrinsic_shared_atomic_add:
3128 case nir_intrinsic_shared_atomic_imin:
3129 case nir_intrinsic_shared_atomic_umin:
3130 case nir_intrinsic_shared_atomic_imax:
3131 case nir_intrinsic_shared_atomic_umax:
3132 case nir_intrinsic_shared_atomic_and:
3133 case nir_intrinsic_shared_atomic_or:
3134 case nir_intrinsic_shared_atomic_xor:
3135 case nir_intrinsic_shared_atomic_exchange:
3136 case nir_intrinsic_shared_atomic_comp_swap: {
3137 LLVMValueRef ptr = get_memory_ptr(ctx, instr->src[0]);
3138 result = visit_var_atomic(ctx, instr, ptr, 1);
3139 break;
3140 }
3141 case nir_intrinsic_deref_atomic_add:
3142 case nir_intrinsic_deref_atomic_imin:
3143 case nir_intrinsic_deref_atomic_umin:
3144 case nir_intrinsic_deref_atomic_imax:
3145 case nir_intrinsic_deref_atomic_umax:
3146 case nir_intrinsic_deref_atomic_and:
3147 case nir_intrinsic_deref_atomic_or:
3148 case nir_intrinsic_deref_atomic_xor:
3149 case nir_intrinsic_deref_atomic_exchange:
3150 case nir_intrinsic_deref_atomic_comp_swap: {
3151 LLVMValueRef ptr = get_src(ctx, instr->src[0]);
3152 result = visit_var_atomic(ctx, instr, ptr, 1);
3153 break;
3154 }
3155 case nir_intrinsic_interp_deref_at_centroid:
3156 case nir_intrinsic_interp_deref_at_sample:
3157 case nir_intrinsic_interp_deref_at_offset:
3158 result = visit_interp(ctx, instr);
3159 break;
3160 case nir_intrinsic_emit_vertex:
3161 ctx->abi->emit_vertex(ctx->abi, nir_intrinsic_stream_id(instr), ctx->abi->outputs);
3162 break;
3163 case nir_intrinsic_end_primitive:
3164 ctx->abi->emit_primitive(ctx->abi, nir_intrinsic_stream_id(instr));
3165 break;
3166 case nir_intrinsic_load_tess_coord:
3167 result = ctx->abi->load_tess_coord(ctx->abi);
3168 break;
3169 case nir_intrinsic_load_tess_level_outer:
3170 result = ctx->abi->load_tess_level(ctx->abi, VARYING_SLOT_TESS_LEVEL_OUTER);
3171 break;
3172 case nir_intrinsic_load_tess_level_inner:
3173 result = ctx->abi->load_tess_level(ctx->abi, VARYING_SLOT_TESS_LEVEL_INNER);
3174 break;
3175 case nir_intrinsic_load_patch_vertices_in:
3176 result = ctx->abi->load_patch_vertices_in(ctx->abi);
3177 break;
3178 case nir_intrinsic_vote_all: {
3179 LLVMValueRef tmp = ac_build_vote_all(&ctx->ac, get_src(ctx, instr->src[0]));
3180 result = LLVMBuildSExt(ctx->ac.builder, tmp, ctx->ac.i32, "");
3181 break;
3182 }
3183 case nir_intrinsic_vote_any: {
3184 LLVMValueRef tmp = ac_build_vote_any(&ctx->ac, get_src(ctx, instr->src[0]));
3185 result = LLVMBuildSExt(ctx->ac.builder, tmp, ctx->ac.i32, "");
3186 break;
3187 }
3188 case nir_intrinsic_shuffle:
3189 result = ac_build_shuffle(&ctx->ac, get_src(ctx, instr->src[0]),
3190 get_src(ctx, instr->src[1]));
3191 break;
3192 case nir_intrinsic_reduce:
3193 result = ac_build_reduce(&ctx->ac,
3194 get_src(ctx, instr->src[0]),
3195 instr->const_index[0],
3196 instr->const_index[1]);
3197 break;
3198 case nir_intrinsic_inclusive_scan:
3199 result = ac_build_inclusive_scan(&ctx->ac,
3200 get_src(ctx, instr->src[0]),
3201 instr->const_index[0]);
3202 break;
3203 case nir_intrinsic_exclusive_scan:
3204 result = ac_build_exclusive_scan(&ctx->ac,
3205 get_src(ctx, instr->src[0]),
3206 instr->const_index[0]);
3207 break;
3208 case nir_intrinsic_quad_broadcast: {
3209 unsigned lane = nir_src_as_const_value(instr->src[1])->u32[0];
3210 result = ac_build_quad_swizzle(&ctx->ac, get_src(ctx, instr->src[0]),
3211 lane, lane, lane, lane);
3212 break;
3213 }
3214 case nir_intrinsic_quad_swap_horizontal:
3215 result = ac_build_quad_swizzle(&ctx->ac, get_src(ctx, instr->src[0]), 1, 0, 3 ,2);
3216 break;
3217 case nir_intrinsic_quad_swap_vertical:
3218 result = ac_build_quad_swizzle(&ctx->ac, get_src(ctx, instr->src[0]), 2, 3, 0 ,1);
3219 break;
3220 case nir_intrinsic_quad_swap_diagonal:
3221 result = ac_build_quad_swizzle(&ctx->ac, get_src(ctx, instr->src[0]), 3, 2, 1 ,0);
3222 break;
3223 default:
3224 fprintf(stderr, "Unknown intrinsic: ");
3225 nir_print_instr(&instr->instr, stderr);
3226 fprintf(stderr, "\n");
3227 break;
3228 }
3229 if (result) {
3230 ctx->ssa_defs[instr->dest.ssa.index] = result;
3231 }
3232 }
3233
3234 static LLVMValueRef get_sampler_desc(struct ac_nir_context *ctx,
3235 nir_deref_instr *deref_instr,
3236 enum ac_descriptor_type desc_type,
3237 const nir_tex_instr *tex_instr,
3238 bool image, bool write)
3239 {
3240 LLVMValueRef index = NULL;
3241 unsigned constant_index = 0;
3242 unsigned descriptor_set;
3243 unsigned base_index;
3244 bool bindless = false;
3245
3246 if (!deref_instr) {
3247 assert(tex_instr && !image);
3248 descriptor_set = 0;
3249 base_index = tex_instr->sampler_index;
3250 } else {
3251 while(deref_instr->deref_type != nir_deref_type_var) {
3252 unsigned array_size = glsl_get_aoa_size(deref_instr->type);
3253 if (!array_size)
3254 array_size = 1;
3255
3256 assert(deref_instr->deref_type == nir_deref_type_array);
3257 nir_const_value *const_value = nir_src_as_const_value(deref_instr->arr.index);
3258 if (const_value) {
3259 constant_index += array_size * const_value->u32[0];
3260 } else {
3261 LLVMValueRef indirect = get_src(ctx, deref_instr->arr.index);
3262
3263 indirect = LLVMBuildMul(ctx->ac.builder, indirect,
3264 LLVMConstInt(ctx->ac.i32, array_size, false), "");
3265
3266 if (!index)
3267 index = indirect;
3268 else
3269 index = LLVMBuildAdd(ctx->ac.builder, index, indirect, "");
3270 }
3271
3272 deref_instr = nir_src_as_deref(deref_instr->parent);
3273 }
3274 descriptor_set = deref_instr->var->data.descriptor_set;
3275 base_index = deref_instr->var->data.binding;
3276 }
3277
3278 return ctx->abi->load_sampler_desc(ctx->abi,
3279 descriptor_set,
3280 base_index,
3281 constant_index, index,
3282 desc_type, image, write, bindless);
3283 }
3284
3285 /* Disable anisotropic filtering if BASE_LEVEL == LAST_LEVEL.
3286 *
3287 * SI-CI:
3288 * If BASE_LEVEL == LAST_LEVEL, the shader must disable anisotropic
3289 * filtering manually. The driver sets img7 to a mask clearing
3290 * MAX_ANISO_RATIO if BASE_LEVEL == LAST_LEVEL. The shader must do:
3291 * s_and_b32 samp0, samp0, img7
3292 *
3293 * VI:
3294 * The ANISO_OVERRIDE sampler field enables this fix in TA.
3295 */
3296 static LLVMValueRef sici_fix_sampler_aniso(struct ac_nir_context *ctx,
3297 LLVMValueRef res, LLVMValueRef samp)
3298 {
3299 LLVMBuilderRef builder = ctx->ac.builder;
3300 LLVMValueRef img7, samp0;
3301
3302 if (ctx->ac.chip_class >= VI)
3303 return samp;
3304
3305 img7 = LLVMBuildExtractElement(builder, res,
3306 LLVMConstInt(ctx->ac.i32, 7, 0), "");
3307 samp0 = LLVMBuildExtractElement(builder, samp,
3308 LLVMConstInt(ctx->ac.i32, 0, 0), "");
3309 samp0 = LLVMBuildAnd(builder, samp0, img7, "");
3310 return LLVMBuildInsertElement(builder, samp, samp0,
3311 LLVMConstInt(ctx->ac.i32, 0, 0), "");
3312 }
3313
3314 static void tex_fetch_ptrs(struct ac_nir_context *ctx,
3315 nir_tex_instr *instr,
3316 LLVMValueRef *res_ptr, LLVMValueRef *samp_ptr,
3317 LLVMValueRef *fmask_ptr)
3318 {
3319 nir_deref_instr *texture_deref_instr = NULL;
3320 nir_deref_instr *sampler_deref_instr = NULL;
3321
3322 for (unsigned i = 0; i < instr->num_srcs; i++) {
3323 switch (instr->src[i].src_type) {
3324 case nir_tex_src_texture_deref:
3325 texture_deref_instr = nir_src_as_deref(instr->src[i].src);
3326 break;
3327 case nir_tex_src_sampler_deref:
3328 sampler_deref_instr = nir_src_as_deref(instr->src[i].src);
3329 break;
3330 default:
3331 break;
3332 }
3333 }
3334
3335 if (!sampler_deref_instr)
3336 sampler_deref_instr = texture_deref_instr;
3337
3338 if (instr->sampler_dim == GLSL_SAMPLER_DIM_BUF)
3339 *res_ptr = get_sampler_desc(ctx, texture_deref_instr, AC_DESC_BUFFER, instr, false, false);
3340 else
3341 *res_ptr = get_sampler_desc(ctx, texture_deref_instr, AC_DESC_IMAGE, instr, false, false);
3342 if (samp_ptr) {
3343 *samp_ptr = get_sampler_desc(ctx, sampler_deref_instr, AC_DESC_SAMPLER, instr, false, false);
3344 if (instr->sampler_dim < GLSL_SAMPLER_DIM_RECT)
3345 *samp_ptr = sici_fix_sampler_aniso(ctx, *res_ptr, *samp_ptr);
3346 }
3347 if (fmask_ptr && (instr->op == nir_texop_txf_ms ||
3348 instr->op == nir_texop_samples_identical))
3349 *fmask_ptr = get_sampler_desc(ctx, texture_deref_instr, AC_DESC_FMASK, instr, false, false);
3350 }
3351
3352 static LLVMValueRef apply_round_slice(struct ac_llvm_context *ctx,
3353 LLVMValueRef coord)
3354 {
3355 coord = ac_to_float(ctx, coord);
3356 coord = ac_build_round(ctx, coord);
3357 coord = ac_to_integer(ctx, coord);
3358 return coord;
3359 }
3360
3361 static void visit_tex(struct ac_nir_context *ctx, nir_tex_instr *instr)
3362 {
3363 LLVMValueRef result = NULL;
3364 struct ac_image_args args = { 0 };
3365 LLVMValueRef fmask_ptr = NULL, sample_index = NULL;
3366 LLVMValueRef ddx = NULL, ddy = NULL;
3367 unsigned offset_src = 0;
3368
3369 tex_fetch_ptrs(ctx, instr, &args.resource, &args.sampler, &fmask_ptr);
3370
3371 for (unsigned i = 0; i < instr->num_srcs; i++) {
3372 switch (instr->src[i].src_type) {
3373 case nir_tex_src_coord: {
3374 LLVMValueRef coord = get_src(ctx, instr->src[i].src);
3375 for (unsigned chan = 0; chan < instr->coord_components; ++chan)
3376 args.coords[chan] = ac_llvm_extract_elem(&ctx->ac, coord, chan);
3377 break;
3378 }
3379 case nir_tex_src_projector:
3380 break;
3381 case nir_tex_src_comparator:
3382 if (instr->is_shadow)
3383 args.compare = get_src(ctx, instr->src[i].src);
3384 break;
3385 case nir_tex_src_offset:
3386 args.offset = get_src(ctx, instr->src[i].src);
3387 offset_src = i;
3388 break;
3389 case nir_tex_src_bias:
3390 if (instr->op == nir_texop_txb)
3391 args.bias = get_src(ctx, instr->src[i].src);
3392 break;
3393 case nir_tex_src_lod: {
3394 nir_const_value *val = nir_src_as_const_value(instr->src[i].src);
3395
3396 if (val && val->i32[0] == 0)
3397 args.level_zero = true;
3398 else
3399 args.lod = get_src(ctx, instr->src[i].src);
3400 break;
3401 }
3402 case nir_tex_src_ms_index:
3403 sample_index = get_src(ctx, instr->src[i].src);
3404 break;
3405 case nir_tex_src_ms_mcs:
3406 break;
3407 case nir_tex_src_ddx:
3408 ddx = get_src(ctx, instr->src[i].src);
3409 break;
3410 case nir_tex_src_ddy:
3411 ddy = get_src(ctx, instr->src[i].src);
3412 break;
3413 case nir_tex_src_texture_offset:
3414 case nir_tex_src_sampler_offset:
3415 case nir_tex_src_plane:
3416 default:
3417 break;
3418 }
3419 }
3420
3421 if (instr->op == nir_texop_txs && instr->sampler_dim == GLSL_SAMPLER_DIM_BUF) {
3422 result = get_buffer_size(ctx, args.resource, true);
3423 goto write_result;
3424 }
3425
3426 if (instr->op == nir_texop_texture_samples) {
3427 LLVMValueRef res, samples, is_msaa;
3428 res = LLVMBuildBitCast(ctx->ac.builder, args.resource, ctx->ac.v8i32, "");
3429 samples = LLVMBuildExtractElement(ctx->ac.builder, res,
3430 LLVMConstInt(ctx->ac.i32, 3, false), "");
3431 is_msaa = LLVMBuildLShr(ctx->ac.builder, samples,
3432 LLVMConstInt(ctx->ac.i32, 28, false), "");
3433 is_msaa = LLVMBuildAnd(ctx->ac.builder, is_msaa,
3434 LLVMConstInt(ctx->ac.i32, 0xe, false), "");
3435 is_msaa = LLVMBuildICmp(ctx->ac.builder, LLVMIntEQ, is_msaa,
3436 LLVMConstInt(ctx->ac.i32, 0xe, false), "");
3437
3438 samples = LLVMBuildLShr(ctx->ac.builder, samples,
3439 LLVMConstInt(ctx->ac.i32, 16, false), "");
3440 samples = LLVMBuildAnd(ctx->ac.builder, samples,
3441 LLVMConstInt(ctx->ac.i32, 0xf, false), "");
3442 samples = LLVMBuildShl(ctx->ac.builder, ctx->ac.i32_1,
3443 samples, "");
3444 samples = LLVMBuildSelect(ctx->ac.builder, is_msaa, samples,
3445 ctx->ac.i32_1, "");
3446 result = samples;
3447 goto write_result;
3448 }
3449
3450 if (args.offset && instr->op != nir_texop_txf) {
3451 LLVMValueRef offset[3], pack;
3452 for (unsigned chan = 0; chan < 3; ++chan)
3453 offset[chan] = ctx->ac.i32_0;
3454
3455 unsigned num_components = ac_get_llvm_num_components(args.offset);
3456 for (unsigned chan = 0; chan < num_components; chan++) {
3457 offset[chan] = ac_llvm_extract_elem(&ctx->ac, args.offset, chan);
3458 offset[chan] = LLVMBuildAnd(ctx->ac.builder, offset[chan],
3459 LLVMConstInt(ctx->ac.i32, 0x3f, false), "");
3460 if (chan)
3461 offset[chan] = LLVMBuildShl(ctx->ac.builder, offset[chan],
3462 LLVMConstInt(ctx->ac.i32, chan * 8, false), "");
3463 }
3464 pack = LLVMBuildOr(ctx->ac.builder, offset[0], offset[1], "");
3465 pack = LLVMBuildOr(ctx->ac.builder, pack, offset[2], "");
3466 args.offset = pack;
3467 }
3468
3469 /* TC-compatible HTILE on radeonsi promotes Z16 and Z24 to Z32_FLOAT,
3470 * so the depth comparison value isn't clamped for Z16 and
3471 * Z24 anymore. Do it manually here.
3472 *
3473 * It's unnecessary if the original texture format was
3474 * Z32_FLOAT, but we don't know that here.
3475 */
3476 if (args.compare && ctx->ac.chip_class == VI && ctx->abi->clamp_shadow_reference)
3477 args.compare = ac_build_clamp(&ctx->ac, ac_to_float(&ctx->ac, args.compare));
3478
3479 /* pack derivatives */
3480 if (ddx || ddy) {
3481 int num_src_deriv_channels, num_dest_deriv_channels;
3482 switch (instr->sampler_dim) {
3483 case GLSL_SAMPLER_DIM_3D:
3484 case GLSL_SAMPLER_DIM_CUBE:
3485 num_src_deriv_channels = 3;
3486 num_dest_deriv_channels = 3;
3487 break;
3488 case GLSL_SAMPLER_DIM_2D:
3489 default:
3490 num_src_deriv_channels = 2;
3491 num_dest_deriv_channels = 2;
3492 break;
3493 case GLSL_SAMPLER_DIM_1D:
3494 num_src_deriv_channels = 1;
3495 if (ctx->ac.chip_class >= GFX9) {
3496 num_dest_deriv_channels = 2;
3497 } else {
3498 num_dest_deriv_channels = 1;
3499 }
3500 break;
3501 }
3502
3503 for (unsigned i = 0; i < num_src_deriv_channels; i++) {
3504 args.derivs[i] = ac_to_float(&ctx->ac,
3505 ac_llvm_extract_elem(&ctx->ac, ddx, i));
3506 args.derivs[num_dest_deriv_channels + i] = ac_to_float(&ctx->ac,
3507 ac_llvm_extract_elem(&ctx->ac, ddy, i));
3508 }
3509 for (unsigned i = num_src_deriv_channels; i < num_dest_deriv_channels; i++) {
3510 args.derivs[i] = ctx->ac.f32_0;
3511 args.derivs[num_dest_deriv_channels + i] = ctx->ac.f32_0;
3512 }
3513 }
3514
3515 if (instr->sampler_dim == GLSL_SAMPLER_DIM_CUBE && args.coords[0]) {
3516 for (unsigned chan = 0; chan < instr->coord_components; chan++)
3517 args.coords[chan] = ac_to_float(&ctx->ac, args.coords[chan]);
3518 if (instr->coord_components == 3)
3519 args.coords[3] = LLVMGetUndef(ctx->ac.f32);
3520 ac_prepare_cube_coords(&ctx->ac,
3521 instr->op == nir_texop_txd, instr->is_array,
3522 instr->op == nir_texop_lod, args.coords, args.derivs);
3523 }
3524
3525 /* Texture coordinates fixups */
3526 if (instr->coord_components > 1 &&
3527 instr->sampler_dim == GLSL_SAMPLER_DIM_1D &&
3528 instr->is_array &&
3529 instr->op != nir_texop_txf) {
3530 args.coords[1] = apply_round_slice(&ctx->ac, args.coords[1]);
3531 }
3532
3533 if (instr->coord_components > 2 &&
3534 (instr->sampler_dim == GLSL_SAMPLER_DIM_2D ||
3535 instr->sampler_dim == GLSL_SAMPLER_DIM_MS ||
3536 instr->sampler_dim == GLSL_SAMPLER_DIM_SUBPASS ||
3537 instr->sampler_dim == GLSL_SAMPLER_DIM_SUBPASS_MS) &&
3538 instr->is_array &&
3539 instr->op != nir_texop_txf && instr->op != nir_texop_txf_ms) {
3540 args.coords[2] = apply_round_slice(&ctx->ac, args.coords[2]);
3541 }
3542
3543 if (ctx->ac.chip_class >= GFX9 &&
3544 instr->sampler_dim == GLSL_SAMPLER_DIM_1D &&
3545 instr->op != nir_texop_lod) {
3546 LLVMValueRef filler;
3547 if (instr->op == nir_texop_txf)
3548 filler = ctx->ac.i32_0;
3549 else
3550 filler = LLVMConstReal(ctx->ac.f32, 0.5);
3551
3552 if (instr->is_array)
3553 args.coords[2] = args.coords[1];
3554 args.coords[1] = filler;
3555 }
3556
3557 /* Pack sample index */
3558 if (instr->op == nir_texop_txf_ms && sample_index)
3559 args.coords[instr->coord_components] = sample_index;
3560
3561 if (instr->op == nir_texop_samples_identical) {
3562 struct ac_image_args txf_args = { 0 };
3563 memcpy(txf_args.coords, args.coords, sizeof(txf_args.coords));
3564
3565 txf_args.dmask = 0xf;
3566 txf_args.resource = fmask_ptr;
3567 txf_args.dim = instr->is_array ? ac_image_2darray : ac_image_2d;
3568 result = build_tex_intrinsic(ctx, instr, &txf_args);
3569
3570 result = LLVMBuildExtractElement(ctx->ac.builder, result, ctx->ac.i32_0, "");
3571 result = emit_int_cmp(&ctx->ac, LLVMIntEQ, result, ctx->ac.i32_0);
3572 goto write_result;
3573 }
3574
3575 if (instr->sampler_dim == GLSL_SAMPLER_DIM_MS &&
3576 instr->op != nir_texop_txs) {
3577 unsigned sample_chan = instr->is_array ? 3 : 2;
3578 args.coords[sample_chan] = adjust_sample_index_using_fmask(
3579 &ctx->ac, args.coords[0], args.coords[1],
3580 instr->is_array ? args.coords[2] : NULL,
3581 args.coords[sample_chan], fmask_ptr);
3582 }
3583
3584 if (args.offset && instr->op == nir_texop_txf) {
3585 nir_const_value *const_offset =
3586 nir_src_as_const_value(instr->src[offset_src].src);
3587 int num_offsets = instr->src[offset_src].src.ssa->num_components;
3588 assert(const_offset);
3589 num_offsets = MIN2(num_offsets, instr->coord_components);
3590 for (unsigned i = 0; i < num_offsets; ++i) {
3591 args.coords[i] = LLVMBuildAdd(
3592 ctx->ac.builder, args.coords[i],
3593 LLVMConstInt(ctx->ac.i32, const_offset->i32[i], false), "");
3594 }
3595 args.offset = NULL;
3596 }
3597
3598 /* TODO TG4 support */
3599 args.dmask = 0xf;
3600 if (instr->op == nir_texop_tg4) {
3601 if (instr->is_shadow)
3602 args.dmask = 1;
3603 else
3604 args.dmask = 1 << instr->component;
3605 }
3606
3607 if (instr->sampler_dim != GLSL_SAMPLER_DIM_BUF)
3608 args.dim = get_ac_sampler_dim(&ctx->ac, instr->sampler_dim, instr->is_array);
3609 result = build_tex_intrinsic(ctx, instr, &args);
3610
3611 if (instr->op == nir_texop_query_levels)
3612 result = LLVMBuildExtractElement(ctx->ac.builder, result, LLVMConstInt(ctx->ac.i32, 3, false), "");
3613 else if (instr->is_shadow && instr->is_new_style_shadow &&
3614 instr->op != nir_texop_txs && instr->op != nir_texop_lod &&
3615 instr->op != nir_texop_tg4)
3616 result = LLVMBuildExtractElement(ctx->ac.builder, result, ctx->ac.i32_0, "");
3617 else if (instr->op == nir_texop_txs &&
3618 instr->sampler_dim == GLSL_SAMPLER_DIM_CUBE &&
3619 instr->is_array) {
3620 LLVMValueRef two = LLVMConstInt(ctx->ac.i32, 2, false);
3621 LLVMValueRef six = LLVMConstInt(ctx->ac.i32, 6, false);
3622 LLVMValueRef z = LLVMBuildExtractElement(ctx->ac.builder, result, two, "");
3623 z = LLVMBuildSDiv(ctx->ac.builder, z, six, "");
3624 result = LLVMBuildInsertElement(ctx->ac.builder, result, z, two, "");
3625 } else if (ctx->ac.chip_class >= GFX9 &&
3626 instr->op == nir_texop_txs &&
3627 instr->sampler_dim == GLSL_SAMPLER_DIM_1D &&
3628 instr->is_array) {
3629 LLVMValueRef two = LLVMConstInt(ctx->ac.i32, 2, false);
3630 LLVMValueRef layers = LLVMBuildExtractElement(ctx->ac.builder, result, two, "");
3631 result = LLVMBuildInsertElement(ctx->ac.builder, result, layers,
3632 ctx->ac.i32_1, "");
3633 } else if (instr->dest.ssa.num_components != 4)
3634 result = ac_trim_vector(&ctx->ac, result, instr->dest.ssa.num_components);
3635
3636 write_result:
3637 if (result) {
3638 assert(instr->dest.is_ssa);
3639 result = ac_to_integer(&ctx->ac, result);
3640 ctx->ssa_defs[instr->dest.ssa.index] = result;
3641 }
3642 }
3643
3644
3645 static void visit_phi(struct ac_nir_context *ctx, nir_phi_instr *instr)
3646 {
3647 LLVMTypeRef type = get_def_type(ctx, &instr->dest.ssa);
3648 LLVMValueRef result = LLVMBuildPhi(ctx->ac.builder, type, "");
3649
3650 ctx->ssa_defs[instr->dest.ssa.index] = result;
3651 _mesa_hash_table_insert(ctx->phis, instr, result);
3652 }
3653
3654 static void visit_post_phi(struct ac_nir_context *ctx,
3655 nir_phi_instr *instr,
3656 LLVMValueRef llvm_phi)
3657 {
3658 nir_foreach_phi_src(src, instr) {
3659 LLVMBasicBlockRef block = get_block(ctx, src->pred);
3660 LLVMValueRef llvm_src = get_src(ctx, src->src);
3661
3662 LLVMAddIncoming(llvm_phi, &llvm_src, &block, 1);
3663 }
3664 }
3665
3666 static void phi_post_pass(struct ac_nir_context *ctx)
3667 {
3668 hash_table_foreach(ctx->phis, entry) {
3669 visit_post_phi(ctx, (nir_phi_instr*)entry->key,
3670 (LLVMValueRef)entry->data);
3671 }
3672 }
3673
3674
3675 static void visit_ssa_undef(struct ac_nir_context *ctx,
3676 const nir_ssa_undef_instr *instr)
3677 {
3678 unsigned num_components = instr->def.num_components;
3679 LLVMTypeRef type = LLVMIntTypeInContext(ctx->ac.context, instr->def.bit_size);
3680 LLVMValueRef undef;
3681
3682 if (num_components == 1)
3683 undef = LLVMGetUndef(type);
3684 else {
3685 undef = LLVMGetUndef(LLVMVectorType(type, num_components));
3686 }
3687 ctx->ssa_defs[instr->def.index] = undef;
3688 }
3689
3690 static void visit_jump(struct ac_llvm_context *ctx,
3691 const nir_jump_instr *instr)
3692 {
3693 switch (instr->type) {
3694 case nir_jump_break:
3695 ac_build_break(ctx);
3696 break;
3697 case nir_jump_continue:
3698 ac_build_continue(ctx);
3699 break;
3700 default:
3701 fprintf(stderr, "Unknown NIR jump instr: ");
3702 nir_print_instr(&instr->instr, stderr);
3703 fprintf(stderr, "\n");
3704 abort();
3705 }
3706 }
3707
3708 static void visit_deref(struct ac_nir_context *ctx,
3709 nir_deref_instr *instr)
3710 {
3711 if (instr->mode != nir_var_shared)
3712 return;
3713
3714 LLVMValueRef result = NULL;
3715 switch(instr->deref_type) {
3716 case nir_deref_type_var: {
3717 struct hash_entry *entry = _mesa_hash_table_search(ctx->vars, instr->var);
3718 result = entry->data;
3719 break;
3720 }
3721 case nir_deref_type_struct:
3722 result = ac_build_gep0(&ctx->ac, get_src(ctx, instr->parent),
3723 LLVMConstInt(ctx->ac.i32, instr->strct.index, 0));
3724 break;
3725 case nir_deref_type_array:
3726 result = ac_build_gep0(&ctx->ac, get_src(ctx, instr->parent),
3727 get_src(ctx, instr->arr.index));
3728 break;
3729 case nir_deref_type_cast:
3730 result = get_src(ctx, instr->parent);
3731 break;
3732 default:
3733 unreachable("Unhandled deref_instr deref type");
3734 }
3735
3736 ctx->ssa_defs[instr->dest.ssa.index] = result;
3737 }
3738
3739 static void visit_cf_list(struct ac_nir_context *ctx,
3740 struct exec_list *list);
3741
3742 static void visit_block(struct ac_nir_context *ctx, nir_block *block)
3743 {
3744 LLVMBasicBlockRef llvm_block = LLVMGetInsertBlock(ctx->ac.builder);
3745 nir_foreach_instr(instr, block)
3746 {
3747 switch (instr->type) {
3748 case nir_instr_type_alu:
3749 visit_alu(ctx, nir_instr_as_alu(instr));
3750 break;
3751 case nir_instr_type_load_const:
3752 visit_load_const(ctx, nir_instr_as_load_const(instr));
3753 break;
3754 case nir_instr_type_intrinsic:
3755 visit_intrinsic(ctx, nir_instr_as_intrinsic(instr));
3756 break;
3757 case nir_instr_type_tex:
3758 visit_tex(ctx, nir_instr_as_tex(instr));
3759 break;
3760 case nir_instr_type_phi:
3761 visit_phi(ctx, nir_instr_as_phi(instr));
3762 break;
3763 case nir_instr_type_ssa_undef:
3764 visit_ssa_undef(ctx, nir_instr_as_ssa_undef(instr));
3765 break;
3766 case nir_instr_type_jump:
3767 visit_jump(&ctx->ac, nir_instr_as_jump(instr));
3768 break;
3769 case nir_instr_type_deref:
3770 visit_deref(ctx, nir_instr_as_deref(instr));
3771 break;
3772 default:
3773 fprintf(stderr, "Unknown NIR instr type: ");
3774 nir_print_instr(instr, stderr);
3775 fprintf(stderr, "\n");
3776 abort();
3777 }
3778 }
3779
3780 _mesa_hash_table_insert(ctx->defs, block, llvm_block);
3781 }
3782
3783 static void visit_if(struct ac_nir_context *ctx, nir_if *if_stmt)
3784 {
3785 LLVMValueRef value = get_src(ctx, if_stmt->condition);
3786
3787 nir_block *then_block =
3788 (nir_block *) exec_list_get_head(&if_stmt->then_list);
3789
3790 ac_build_uif(&ctx->ac, value, then_block->index);
3791
3792 visit_cf_list(ctx, &if_stmt->then_list);
3793
3794 if (!exec_list_is_empty(&if_stmt->else_list)) {
3795 nir_block *else_block =
3796 (nir_block *) exec_list_get_head(&if_stmt->else_list);
3797
3798 ac_build_else(&ctx->ac, else_block->index);
3799 visit_cf_list(ctx, &if_stmt->else_list);
3800 }
3801
3802 ac_build_endif(&ctx->ac, then_block->index);
3803 }
3804
3805 static void visit_loop(struct ac_nir_context *ctx, nir_loop *loop)
3806 {
3807 nir_block *first_loop_block =
3808 (nir_block *) exec_list_get_head(&loop->body);
3809
3810 ac_build_bgnloop(&ctx->ac, first_loop_block->index);
3811
3812 visit_cf_list(ctx, &loop->body);
3813
3814 ac_build_endloop(&ctx->ac, first_loop_block->index);
3815 }
3816
3817 static void visit_cf_list(struct ac_nir_context *ctx,
3818 struct exec_list *list)
3819 {
3820 foreach_list_typed(nir_cf_node, node, node, list)
3821 {
3822 switch (node->type) {
3823 case nir_cf_node_block:
3824 visit_block(ctx, nir_cf_node_as_block(node));
3825 break;
3826
3827 case nir_cf_node_if:
3828 visit_if(ctx, nir_cf_node_as_if(node));
3829 break;
3830
3831 case nir_cf_node_loop:
3832 visit_loop(ctx, nir_cf_node_as_loop(node));
3833 break;
3834
3835 default:
3836 assert(0);
3837 }
3838 }
3839 }
3840
3841 void
3842 ac_handle_shader_output_decl(struct ac_llvm_context *ctx,
3843 struct ac_shader_abi *abi,
3844 struct nir_shader *nir,
3845 struct nir_variable *variable,
3846 gl_shader_stage stage)
3847 {
3848 unsigned output_loc = variable->data.driver_location / 4;
3849 unsigned attrib_count = glsl_count_attribute_slots(variable->type, false);
3850
3851 /* tess ctrl has it's own load/store paths for outputs */
3852 if (stage == MESA_SHADER_TESS_CTRL)
3853 return;
3854
3855 if (stage == MESA_SHADER_VERTEX ||
3856 stage == MESA_SHADER_TESS_EVAL ||
3857 stage == MESA_SHADER_GEOMETRY) {
3858 int idx = variable->data.location + variable->data.index;
3859 if (idx == VARYING_SLOT_CLIP_DIST0) {
3860 int length = nir->info.clip_distance_array_size +
3861 nir->info.cull_distance_array_size;
3862
3863 if (length > 4)
3864 attrib_count = 2;
3865 else
3866 attrib_count = 1;
3867 }
3868 }
3869
3870 bool is_16bit = glsl_type_is_16bit(variable->type);
3871 LLVMTypeRef type = is_16bit ? ctx->f16 : ctx->f32;
3872 for (unsigned i = 0; i < attrib_count; ++i) {
3873 for (unsigned chan = 0; chan < 4; chan++) {
3874 abi->outputs[ac_llvm_reg_index_soa(output_loc + i, chan)] =
3875 ac_build_alloca_undef(ctx, type, "");
3876 }
3877 }
3878 }
3879
3880 static LLVMTypeRef
3881 glsl_base_to_llvm_type(struct ac_llvm_context *ac,
3882 enum glsl_base_type type)
3883 {
3884 switch (type) {
3885 case GLSL_TYPE_INT:
3886 case GLSL_TYPE_UINT:
3887 case GLSL_TYPE_BOOL:
3888 case GLSL_TYPE_SUBROUTINE:
3889 return ac->i32;
3890 case GLSL_TYPE_FLOAT: /* TODO handle mediump */
3891 return ac->f32;
3892 case GLSL_TYPE_INT64:
3893 case GLSL_TYPE_UINT64:
3894 return ac->i64;
3895 case GLSL_TYPE_DOUBLE:
3896 return ac->f64;
3897 default:
3898 unreachable("unknown GLSL type");
3899 }
3900 }
3901
3902 static LLVMTypeRef
3903 glsl_to_llvm_type(struct ac_llvm_context *ac,
3904 const struct glsl_type *type)
3905 {
3906 if (glsl_type_is_scalar(type)) {
3907 return glsl_base_to_llvm_type(ac, glsl_get_base_type(type));
3908 }
3909
3910 if (glsl_type_is_vector(type)) {
3911 return LLVMVectorType(
3912 glsl_base_to_llvm_type(ac, glsl_get_base_type(type)),
3913 glsl_get_vector_elements(type));
3914 }
3915
3916 if (glsl_type_is_matrix(type)) {
3917 return LLVMArrayType(
3918 glsl_to_llvm_type(ac, glsl_get_column_type(type)),
3919 glsl_get_matrix_columns(type));
3920 }
3921
3922 if (glsl_type_is_array(type)) {
3923 return LLVMArrayType(
3924 glsl_to_llvm_type(ac, glsl_get_array_element(type)),
3925 glsl_get_length(type));
3926 }
3927
3928 assert(glsl_type_is_struct(type));
3929
3930 LLVMTypeRef member_types[glsl_get_length(type)];
3931
3932 for (unsigned i = 0; i < glsl_get_length(type); i++) {
3933 member_types[i] =
3934 glsl_to_llvm_type(ac,
3935 glsl_get_struct_field(type, i));
3936 }
3937
3938 return LLVMStructTypeInContext(ac->context, member_types,
3939 glsl_get_length(type), false);
3940 }
3941
3942 static void
3943 setup_locals(struct ac_nir_context *ctx,
3944 struct nir_function *func)
3945 {
3946 int i, j;
3947 ctx->num_locals = 0;
3948 nir_foreach_variable(variable, &func->impl->locals) {
3949 unsigned attrib_count = glsl_count_attribute_slots(variable->type, false);
3950 variable->data.driver_location = ctx->num_locals * 4;
3951 variable->data.location_frac = 0;
3952 ctx->num_locals += attrib_count;
3953 }
3954 ctx->locals = malloc(4 * ctx->num_locals * sizeof(LLVMValueRef));
3955 if (!ctx->locals)
3956 return;
3957
3958 for (i = 0; i < ctx->num_locals; i++) {
3959 for (j = 0; j < 4; j++) {
3960 ctx->locals[i * 4 + j] =
3961 ac_build_alloca_undef(&ctx->ac, ctx->ac.f32, "temp");
3962 }
3963 }
3964 }
3965
3966 static void
3967 setup_shared(struct ac_nir_context *ctx,
3968 struct nir_shader *nir)
3969 {
3970 nir_foreach_variable(variable, &nir->shared) {
3971 LLVMValueRef shared =
3972 LLVMAddGlobalInAddressSpace(
3973 ctx->ac.module, glsl_to_llvm_type(&ctx->ac, variable->type),
3974 variable->name ? variable->name : "",
3975 AC_ADDR_SPACE_LDS);
3976 _mesa_hash_table_insert(ctx->vars, variable, shared);
3977 }
3978 }
3979
3980 void ac_nir_translate(struct ac_llvm_context *ac, struct ac_shader_abi *abi,
3981 struct nir_shader *nir)
3982 {
3983 struct ac_nir_context ctx = {};
3984 struct nir_function *func;
3985
3986 ctx.ac = *ac;
3987 ctx.abi = abi;
3988
3989 ctx.stage = nir->info.stage;
3990
3991 ctx.main_function = LLVMGetBasicBlockParent(LLVMGetInsertBlock(ctx.ac.builder));
3992
3993 nir_foreach_variable(variable, &nir->outputs)
3994 ac_handle_shader_output_decl(&ctx.ac, ctx.abi, nir, variable,
3995 ctx.stage);
3996
3997 ctx.defs = _mesa_hash_table_create(NULL, _mesa_hash_pointer,
3998 _mesa_key_pointer_equal);
3999 ctx.phis = _mesa_hash_table_create(NULL, _mesa_hash_pointer,
4000 _mesa_key_pointer_equal);
4001 ctx.vars = _mesa_hash_table_create(NULL, _mesa_hash_pointer,
4002 _mesa_key_pointer_equal);
4003
4004 func = (struct nir_function *)exec_list_get_head(&nir->functions);
4005
4006 nir_index_ssa_defs(func->impl);
4007 ctx.ssa_defs = calloc(func->impl->ssa_alloc, sizeof(LLVMValueRef));
4008
4009 setup_locals(&ctx, func);
4010
4011 if (nir->info.stage == MESA_SHADER_COMPUTE)
4012 setup_shared(&ctx, nir);
4013
4014 visit_cf_list(&ctx, &func->impl->body);
4015 phi_post_pass(&ctx);
4016
4017 if (nir->info.stage != MESA_SHADER_COMPUTE)
4018 ctx.abi->emit_outputs(ctx.abi, AC_LLVM_MAX_OUTPUTS,
4019 ctx.abi->outputs);
4020
4021 free(ctx.locals);
4022 free(ctx.ssa_defs);
4023 ralloc_free(ctx.defs);
4024 ralloc_free(ctx.phis);
4025 ralloc_free(ctx.vars);
4026 }
4027
4028 void
4029 ac_lower_indirect_derefs(struct nir_shader *nir, enum chip_class chip_class)
4030 {
4031 /* While it would be nice not to have this flag, we are constrained
4032 * by the reality that LLVM 5.0 doesn't have working VGPR indexing
4033 * on GFX9.
4034 */
4035 bool llvm_has_working_vgpr_indexing = chip_class <= VI;
4036
4037 /* TODO: Indirect indexing of GS inputs is unimplemented.
4038 *
4039 * TCS and TES load inputs directly from LDS or offchip memory, so
4040 * indirect indexing is trivial.
4041 */
4042 nir_variable_mode indirect_mask = 0;
4043 if (nir->info.stage == MESA_SHADER_GEOMETRY ||
4044 (nir->info.stage != MESA_SHADER_TESS_CTRL &&
4045 nir->info.stage != MESA_SHADER_TESS_EVAL &&
4046 !llvm_has_working_vgpr_indexing)) {
4047 indirect_mask |= nir_var_shader_in;
4048 }
4049 if (!llvm_has_working_vgpr_indexing &&
4050 nir->info.stage != MESA_SHADER_TESS_CTRL)
4051 indirect_mask |= nir_var_shader_out;
4052
4053 /* TODO: We shouldn't need to do this, however LLVM isn't currently
4054 * smart enough to handle indirects without causing excess spilling
4055 * causing the gpu to hang.
4056 *
4057 * See the following thread for more details of the problem:
4058 * https://lists.freedesktop.org/archives/mesa-dev/2017-July/162106.html
4059 */
4060 indirect_mask |= nir_var_local;
4061
4062 nir_lower_indirect_derefs(nir, indirect_mask);
4063 }