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ac/nir: move all RADV related code to radv_nir_to_llvm.c
[mesa.git] / src / amd / common / ac_nir_to_llvm.c
1 /*
2 * Copyright © 2016 Bas Nieuwenhuizen
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
21 * IN THE SOFTWARE.
22 */
23
24 #include "ac_nir_to_llvm.h"
25 #include "ac_llvm_build.h"
26 #include "ac_llvm_util.h"
27 #include "ac_binary.h"
28 #include "sid.h"
29 #include "nir/nir.h"
30 #include "../vulkan/radv_descriptor_set.h"
31 #include "util/bitscan.h"
32 #include <llvm-c/Transforms/Scalar.h>
33 #include "ac_shader_abi.h"
34 #include "ac_shader_info.h"
35 #include "ac_shader_util.h"
36 #include "ac_exp_param.h"
37
38 struct ac_nir_context {
39 struct ac_llvm_context ac;
40 struct ac_shader_abi *abi;
41
42 gl_shader_stage stage;
43
44 struct hash_table *defs;
45 struct hash_table *phis;
46 struct hash_table *vars;
47
48 LLVMValueRef main_function;
49 LLVMBasicBlockRef continue_block;
50 LLVMBasicBlockRef break_block;
51
52 int num_locals;
53 LLVMValueRef *locals;
54 };
55
56 static LLVMValueRef get_sampler_desc(struct ac_nir_context *ctx,
57 const nir_deref_var *deref,
58 enum ac_descriptor_type desc_type,
59 const nir_tex_instr *instr,
60 bool image, bool write);
61
62 static void
63 build_store_values_extended(struct ac_llvm_context *ac,
64 LLVMValueRef *values,
65 unsigned value_count,
66 unsigned value_stride,
67 LLVMValueRef vec)
68 {
69 LLVMBuilderRef builder = ac->builder;
70 unsigned i;
71
72 for (i = 0; i < value_count; i++) {
73 LLVMValueRef ptr = values[i * value_stride];
74 LLVMValueRef index = LLVMConstInt(ac->i32, i, false);
75 LLVMValueRef value = LLVMBuildExtractElement(builder, vec, index, "");
76 LLVMBuildStore(builder, value, ptr);
77 }
78 }
79
80 static LLVMTypeRef get_def_type(struct ac_nir_context *ctx,
81 const nir_ssa_def *def)
82 {
83 LLVMTypeRef type = LLVMIntTypeInContext(ctx->ac.context, def->bit_size);
84 if (def->num_components > 1) {
85 type = LLVMVectorType(type, def->num_components);
86 }
87 return type;
88 }
89
90 static LLVMValueRef get_src(struct ac_nir_context *nir, nir_src src)
91 {
92 assert(src.is_ssa);
93 struct hash_entry *entry = _mesa_hash_table_search(nir->defs, src.ssa);
94 return (LLVMValueRef)entry->data;
95 }
96
97 static LLVMValueRef
98 get_memory_ptr(struct ac_nir_context *ctx, nir_src src)
99 {
100 LLVMValueRef ptr = get_src(ctx, src);
101 ptr = LLVMBuildGEP(ctx->ac.builder, ctx->ac.lds, &ptr, 1, "");
102 int addr_space = LLVMGetPointerAddressSpace(LLVMTypeOf(ptr));
103
104 return LLVMBuildBitCast(ctx->ac.builder, ptr,
105 LLVMPointerType(ctx->ac.i32, addr_space), "");
106 }
107
108 static LLVMBasicBlockRef get_block(struct ac_nir_context *nir,
109 const struct nir_block *b)
110 {
111 struct hash_entry *entry = _mesa_hash_table_search(nir->defs, b);
112 return (LLVMBasicBlockRef)entry->data;
113 }
114
115 static LLVMValueRef get_alu_src(struct ac_nir_context *ctx,
116 nir_alu_src src,
117 unsigned num_components)
118 {
119 LLVMValueRef value = get_src(ctx, src.src);
120 bool need_swizzle = false;
121
122 assert(value);
123 unsigned src_components = ac_get_llvm_num_components(value);
124 for (unsigned i = 0; i < num_components; ++i) {
125 assert(src.swizzle[i] < src_components);
126 if (src.swizzle[i] != i)
127 need_swizzle = true;
128 }
129
130 if (need_swizzle || num_components != src_components) {
131 LLVMValueRef masks[] = {
132 LLVMConstInt(ctx->ac.i32, src.swizzle[0], false),
133 LLVMConstInt(ctx->ac.i32, src.swizzle[1], false),
134 LLVMConstInt(ctx->ac.i32, src.swizzle[2], false),
135 LLVMConstInt(ctx->ac.i32, src.swizzle[3], false)};
136
137 if (src_components > 1 && num_components == 1) {
138 value = LLVMBuildExtractElement(ctx->ac.builder, value,
139 masks[0], "");
140 } else if (src_components == 1 && num_components > 1) {
141 LLVMValueRef values[] = {value, value, value, value};
142 value = ac_build_gather_values(&ctx->ac, values, num_components);
143 } else {
144 LLVMValueRef swizzle = LLVMConstVector(masks, num_components);
145 value = LLVMBuildShuffleVector(ctx->ac.builder, value, value,
146 swizzle, "");
147 }
148 }
149 assert(!src.negate);
150 assert(!src.abs);
151 return value;
152 }
153
154 static LLVMValueRef emit_int_cmp(struct ac_llvm_context *ctx,
155 LLVMIntPredicate pred, LLVMValueRef src0,
156 LLVMValueRef src1)
157 {
158 LLVMValueRef result = LLVMBuildICmp(ctx->builder, pred, src0, src1, "");
159 return LLVMBuildSelect(ctx->builder, result,
160 LLVMConstInt(ctx->i32, 0xFFFFFFFF, false),
161 ctx->i32_0, "");
162 }
163
164 static LLVMValueRef emit_float_cmp(struct ac_llvm_context *ctx,
165 LLVMRealPredicate pred, LLVMValueRef src0,
166 LLVMValueRef src1)
167 {
168 LLVMValueRef result;
169 src0 = ac_to_float(ctx, src0);
170 src1 = ac_to_float(ctx, src1);
171 result = LLVMBuildFCmp(ctx->builder, pred, src0, src1, "");
172 return LLVMBuildSelect(ctx->builder, result,
173 LLVMConstInt(ctx->i32, 0xFFFFFFFF, false),
174 ctx->i32_0, "");
175 }
176
177 static LLVMValueRef emit_intrin_1f_param(struct ac_llvm_context *ctx,
178 const char *intrin,
179 LLVMTypeRef result_type,
180 LLVMValueRef src0)
181 {
182 char name[64];
183 LLVMValueRef params[] = {
184 ac_to_float(ctx, src0),
185 };
186
187 MAYBE_UNUSED const int length = snprintf(name, sizeof(name), "%s.f%d", intrin,
188 ac_get_elem_bits(ctx, result_type));
189 assert(length < sizeof(name));
190 return ac_build_intrinsic(ctx, name, result_type, params, 1, AC_FUNC_ATTR_READNONE);
191 }
192
193 static LLVMValueRef emit_intrin_2f_param(struct ac_llvm_context *ctx,
194 const char *intrin,
195 LLVMTypeRef result_type,
196 LLVMValueRef src0, LLVMValueRef src1)
197 {
198 char name[64];
199 LLVMValueRef params[] = {
200 ac_to_float(ctx, src0),
201 ac_to_float(ctx, src1),
202 };
203
204 MAYBE_UNUSED const int length = snprintf(name, sizeof(name), "%s.f%d", intrin,
205 ac_get_elem_bits(ctx, result_type));
206 assert(length < sizeof(name));
207 return ac_build_intrinsic(ctx, name, result_type, params, 2, AC_FUNC_ATTR_READNONE);
208 }
209
210 static LLVMValueRef emit_intrin_3f_param(struct ac_llvm_context *ctx,
211 const char *intrin,
212 LLVMTypeRef result_type,
213 LLVMValueRef src0, LLVMValueRef src1, LLVMValueRef src2)
214 {
215 char name[64];
216 LLVMValueRef params[] = {
217 ac_to_float(ctx, src0),
218 ac_to_float(ctx, src1),
219 ac_to_float(ctx, src2),
220 };
221
222 MAYBE_UNUSED const int length = snprintf(name, sizeof(name), "%s.f%d", intrin,
223 ac_get_elem_bits(ctx, result_type));
224 assert(length < sizeof(name));
225 return ac_build_intrinsic(ctx, name, result_type, params, 3, AC_FUNC_ATTR_READNONE);
226 }
227
228 static LLVMValueRef emit_bcsel(struct ac_llvm_context *ctx,
229 LLVMValueRef src0, LLVMValueRef src1, LLVMValueRef src2)
230 {
231 LLVMValueRef v = LLVMBuildICmp(ctx->builder, LLVMIntNE, src0,
232 ctx->i32_0, "");
233 return LLVMBuildSelect(ctx->builder, v, ac_to_integer(ctx, src1),
234 ac_to_integer(ctx, src2), "");
235 }
236
237 static LLVMValueRef emit_minmax_int(struct ac_llvm_context *ctx,
238 LLVMIntPredicate pred,
239 LLVMValueRef src0, LLVMValueRef src1)
240 {
241 return LLVMBuildSelect(ctx->builder,
242 LLVMBuildICmp(ctx->builder, pred, src0, src1, ""),
243 src0,
244 src1, "");
245
246 }
247 static LLVMValueRef emit_iabs(struct ac_llvm_context *ctx,
248 LLVMValueRef src0)
249 {
250 return emit_minmax_int(ctx, LLVMIntSGT, src0,
251 LLVMBuildNeg(ctx->builder, src0, ""));
252 }
253
254 static LLVMValueRef emit_uint_carry(struct ac_llvm_context *ctx,
255 const char *intrin,
256 LLVMValueRef src0, LLVMValueRef src1)
257 {
258 LLVMTypeRef ret_type;
259 LLVMTypeRef types[] = { ctx->i32, ctx->i1 };
260 LLVMValueRef res;
261 LLVMValueRef params[] = { src0, src1 };
262 ret_type = LLVMStructTypeInContext(ctx->context, types,
263 2, true);
264
265 res = ac_build_intrinsic(ctx, intrin, ret_type,
266 params, 2, AC_FUNC_ATTR_READNONE);
267
268 res = LLVMBuildExtractValue(ctx->builder, res, 1, "");
269 res = LLVMBuildZExt(ctx->builder, res, ctx->i32, "");
270 return res;
271 }
272
273 static LLVMValueRef emit_b2f(struct ac_llvm_context *ctx,
274 LLVMValueRef src0)
275 {
276 return LLVMBuildAnd(ctx->builder, src0, LLVMBuildBitCast(ctx->builder, LLVMConstReal(ctx->f32, 1.0), ctx->i32, ""), "");
277 }
278
279 static LLVMValueRef emit_f2b(struct ac_llvm_context *ctx,
280 LLVMValueRef src0)
281 {
282 src0 = ac_to_float(ctx, src0);
283 LLVMValueRef zero = LLVMConstNull(LLVMTypeOf(src0));
284 return LLVMBuildSExt(ctx->builder,
285 LLVMBuildFCmp(ctx->builder, LLVMRealUNE, src0, zero, ""),
286 ctx->i32, "");
287 }
288
289 static LLVMValueRef emit_b2i(struct ac_llvm_context *ctx,
290 LLVMValueRef src0,
291 unsigned bitsize)
292 {
293 LLVMValueRef result = LLVMBuildAnd(ctx->builder, src0, ctx->i32_1, "");
294
295 if (bitsize == 32)
296 return result;
297
298 return LLVMBuildZExt(ctx->builder, result, ctx->i64, "");
299 }
300
301 static LLVMValueRef emit_i2b(struct ac_llvm_context *ctx,
302 LLVMValueRef src0)
303 {
304 LLVMValueRef zero = LLVMConstNull(LLVMTypeOf(src0));
305 return LLVMBuildSExt(ctx->builder,
306 LLVMBuildICmp(ctx->builder, LLVMIntNE, src0, zero, ""),
307 ctx->i32, "");
308 }
309
310 static LLVMValueRef emit_f2f16(struct ac_llvm_context *ctx,
311 LLVMValueRef src0)
312 {
313 LLVMValueRef result;
314 LLVMValueRef cond = NULL;
315
316 src0 = ac_to_float(ctx, src0);
317 result = LLVMBuildFPTrunc(ctx->builder, src0, ctx->f16, "");
318
319 if (ctx->chip_class >= VI) {
320 LLVMValueRef args[2];
321 /* Check if the result is a denormal - and flush to 0 if so. */
322 args[0] = result;
323 args[1] = LLVMConstInt(ctx->i32, N_SUBNORMAL | P_SUBNORMAL, false);
324 cond = ac_build_intrinsic(ctx, "llvm.amdgcn.class.f16", ctx->i1, args, 2, AC_FUNC_ATTR_READNONE);
325 }
326
327 /* need to convert back up to f32 */
328 result = LLVMBuildFPExt(ctx->builder, result, ctx->f32, "");
329
330 if (ctx->chip_class >= VI)
331 result = LLVMBuildSelect(ctx->builder, cond, ctx->f32_0, result, "");
332 else {
333 /* for SI/CIK */
334 /* 0x38800000 is smallest half float value (2^-14) in 32-bit float,
335 * so compare the result and flush to 0 if it's smaller.
336 */
337 LLVMValueRef temp, cond2;
338 temp = emit_intrin_1f_param(ctx, "llvm.fabs", ctx->f32, result);
339 cond = LLVMBuildFCmp(ctx->builder, LLVMRealUGT,
340 LLVMBuildBitCast(ctx->builder, LLVMConstInt(ctx->i32, 0x38800000, false), ctx->f32, ""),
341 temp, "");
342 cond2 = LLVMBuildFCmp(ctx->builder, LLVMRealUNE,
343 temp, ctx->f32_0, "");
344 cond = LLVMBuildAnd(ctx->builder, cond, cond2, "");
345 result = LLVMBuildSelect(ctx->builder, cond, ctx->f32_0, result, "");
346 }
347 return result;
348 }
349
350 static LLVMValueRef emit_umul_high(struct ac_llvm_context *ctx,
351 LLVMValueRef src0, LLVMValueRef src1)
352 {
353 LLVMValueRef dst64, result;
354 src0 = LLVMBuildZExt(ctx->builder, src0, ctx->i64, "");
355 src1 = LLVMBuildZExt(ctx->builder, src1, ctx->i64, "");
356
357 dst64 = LLVMBuildMul(ctx->builder, src0, src1, "");
358 dst64 = LLVMBuildLShr(ctx->builder, dst64, LLVMConstInt(ctx->i64, 32, false), "");
359 result = LLVMBuildTrunc(ctx->builder, dst64, ctx->i32, "");
360 return result;
361 }
362
363 static LLVMValueRef emit_imul_high(struct ac_llvm_context *ctx,
364 LLVMValueRef src0, LLVMValueRef src1)
365 {
366 LLVMValueRef dst64, result;
367 src0 = LLVMBuildSExt(ctx->builder, src0, ctx->i64, "");
368 src1 = LLVMBuildSExt(ctx->builder, src1, ctx->i64, "");
369
370 dst64 = LLVMBuildMul(ctx->builder, src0, src1, "");
371 dst64 = LLVMBuildAShr(ctx->builder, dst64, LLVMConstInt(ctx->i64, 32, false), "");
372 result = LLVMBuildTrunc(ctx->builder, dst64, ctx->i32, "");
373 return result;
374 }
375
376 static LLVMValueRef emit_bitfield_extract(struct ac_llvm_context *ctx,
377 bool is_signed,
378 const LLVMValueRef srcs[3])
379 {
380 LLVMValueRef result;
381 LLVMValueRef icond = LLVMBuildICmp(ctx->builder, LLVMIntEQ, srcs[2], LLVMConstInt(ctx->i32, 32, false), "");
382
383 result = ac_build_bfe(ctx, srcs[0], srcs[1], srcs[2], is_signed);
384 result = LLVMBuildSelect(ctx->builder, icond, srcs[0], result, "");
385 return result;
386 }
387
388 static LLVMValueRef emit_bitfield_insert(struct ac_llvm_context *ctx,
389 LLVMValueRef src0, LLVMValueRef src1,
390 LLVMValueRef src2, LLVMValueRef src3)
391 {
392 LLVMValueRef bfi_args[3], result;
393
394 bfi_args[0] = LLVMBuildShl(ctx->builder,
395 LLVMBuildSub(ctx->builder,
396 LLVMBuildShl(ctx->builder,
397 ctx->i32_1,
398 src3, ""),
399 ctx->i32_1, ""),
400 src2, "");
401 bfi_args[1] = LLVMBuildShl(ctx->builder, src1, src2, "");
402 bfi_args[2] = src0;
403
404 LLVMValueRef icond = LLVMBuildICmp(ctx->builder, LLVMIntEQ, src3, LLVMConstInt(ctx->i32, 32, false), "");
405
406 /* Calculate:
407 * (arg0 & arg1) | (~arg0 & arg2) = arg2 ^ (arg0 & (arg1 ^ arg2)
408 * Use the right-hand side, which the LLVM backend can convert to V_BFI.
409 */
410 result = LLVMBuildXor(ctx->builder, bfi_args[2],
411 LLVMBuildAnd(ctx->builder, bfi_args[0],
412 LLVMBuildXor(ctx->builder, bfi_args[1], bfi_args[2], ""), ""), "");
413
414 result = LLVMBuildSelect(ctx->builder, icond, src1, result, "");
415 return result;
416 }
417
418 static LLVMValueRef emit_pack_half_2x16(struct ac_llvm_context *ctx,
419 LLVMValueRef src0)
420 {
421 LLVMValueRef comp[2];
422
423 src0 = ac_to_float(ctx, src0);
424 comp[0] = LLVMBuildExtractElement(ctx->builder, src0, ctx->i32_0, "");
425 comp[1] = LLVMBuildExtractElement(ctx->builder, src0, ctx->i32_1, "");
426
427 return ac_build_cvt_pkrtz_f16(ctx, comp);
428 }
429
430 static LLVMValueRef emit_unpack_half_2x16(struct ac_llvm_context *ctx,
431 LLVMValueRef src0)
432 {
433 LLVMValueRef const16 = LLVMConstInt(ctx->i32, 16, false);
434 LLVMValueRef temps[2], result, val;
435 int i;
436
437 for (i = 0; i < 2; i++) {
438 val = i == 1 ? LLVMBuildLShr(ctx->builder, src0, const16, "") : src0;
439 val = LLVMBuildTrunc(ctx->builder, val, ctx->i16, "");
440 val = LLVMBuildBitCast(ctx->builder, val, ctx->f16, "");
441 temps[i] = LLVMBuildFPExt(ctx->builder, val, ctx->f32, "");
442 }
443
444 result = LLVMBuildInsertElement(ctx->builder, LLVMGetUndef(ctx->v2f32), temps[0],
445 ctx->i32_0, "");
446 result = LLVMBuildInsertElement(ctx->builder, result, temps[1],
447 ctx->i32_1, "");
448 return result;
449 }
450
451 static LLVMValueRef emit_ddxy(struct ac_nir_context *ctx,
452 nir_op op,
453 LLVMValueRef src0)
454 {
455 unsigned mask;
456 int idx;
457 LLVMValueRef result;
458
459 if (op == nir_op_fddx_fine)
460 mask = AC_TID_MASK_LEFT;
461 else if (op == nir_op_fddy_fine)
462 mask = AC_TID_MASK_TOP;
463 else
464 mask = AC_TID_MASK_TOP_LEFT;
465
466 /* for DDX we want to next X pixel, DDY next Y pixel. */
467 if (op == nir_op_fddx_fine ||
468 op == nir_op_fddx_coarse ||
469 op == nir_op_fddx)
470 idx = 1;
471 else
472 idx = 2;
473
474 result = ac_build_ddxy(&ctx->ac, mask, idx, src0);
475 return result;
476 }
477
478 /*
479 * this takes an I,J coordinate pair,
480 * and works out the X and Y derivatives.
481 * it returns DDX(I), DDX(J), DDY(I), DDY(J).
482 */
483 static LLVMValueRef emit_ddxy_interp(
484 struct ac_nir_context *ctx,
485 LLVMValueRef interp_ij)
486 {
487 LLVMValueRef result[4], a;
488 unsigned i;
489
490 for (i = 0; i < 2; i++) {
491 a = LLVMBuildExtractElement(ctx->ac.builder, interp_ij,
492 LLVMConstInt(ctx->ac.i32, i, false), "");
493 result[i] = emit_ddxy(ctx, nir_op_fddx, a);
494 result[2+i] = emit_ddxy(ctx, nir_op_fddy, a);
495 }
496 return ac_build_gather_values(&ctx->ac, result, 4);
497 }
498
499 static void visit_alu(struct ac_nir_context *ctx, const nir_alu_instr *instr)
500 {
501 LLVMValueRef src[4], result = NULL;
502 unsigned num_components = instr->dest.dest.ssa.num_components;
503 unsigned src_components;
504 LLVMTypeRef def_type = get_def_type(ctx, &instr->dest.dest.ssa);
505
506 assert(nir_op_infos[instr->op].num_inputs <= ARRAY_SIZE(src));
507 switch (instr->op) {
508 case nir_op_vec2:
509 case nir_op_vec3:
510 case nir_op_vec4:
511 src_components = 1;
512 break;
513 case nir_op_pack_half_2x16:
514 src_components = 2;
515 break;
516 case nir_op_unpack_half_2x16:
517 src_components = 1;
518 break;
519 case nir_op_cube_face_coord:
520 case nir_op_cube_face_index:
521 src_components = 3;
522 break;
523 default:
524 src_components = num_components;
525 break;
526 }
527 for (unsigned i = 0; i < nir_op_infos[instr->op].num_inputs; i++)
528 src[i] = get_alu_src(ctx, instr->src[i], src_components);
529
530 switch (instr->op) {
531 case nir_op_fmov:
532 case nir_op_imov:
533 result = src[0];
534 break;
535 case nir_op_fneg:
536 src[0] = ac_to_float(&ctx->ac, src[0]);
537 result = LLVMBuildFNeg(ctx->ac.builder, src[0], "");
538 break;
539 case nir_op_ineg:
540 result = LLVMBuildNeg(ctx->ac.builder, src[0], "");
541 break;
542 case nir_op_inot:
543 result = LLVMBuildNot(ctx->ac.builder, src[0], "");
544 break;
545 case nir_op_iadd:
546 result = LLVMBuildAdd(ctx->ac.builder, src[0], src[1], "");
547 break;
548 case nir_op_fadd:
549 src[0] = ac_to_float(&ctx->ac, src[0]);
550 src[1] = ac_to_float(&ctx->ac, src[1]);
551 result = LLVMBuildFAdd(ctx->ac.builder, src[0], src[1], "");
552 break;
553 case nir_op_fsub:
554 src[0] = ac_to_float(&ctx->ac, src[0]);
555 src[1] = ac_to_float(&ctx->ac, src[1]);
556 result = LLVMBuildFSub(ctx->ac.builder, src[0], src[1], "");
557 break;
558 case nir_op_isub:
559 result = LLVMBuildSub(ctx->ac.builder, src[0], src[1], "");
560 break;
561 case nir_op_imul:
562 result = LLVMBuildMul(ctx->ac.builder, src[0], src[1], "");
563 break;
564 case nir_op_imod:
565 result = LLVMBuildSRem(ctx->ac.builder, src[0], src[1], "");
566 break;
567 case nir_op_umod:
568 result = LLVMBuildURem(ctx->ac.builder, src[0], src[1], "");
569 break;
570 case nir_op_fmod:
571 src[0] = ac_to_float(&ctx->ac, src[0]);
572 src[1] = ac_to_float(&ctx->ac, src[1]);
573 result = ac_build_fdiv(&ctx->ac, src[0], src[1]);
574 result = emit_intrin_1f_param(&ctx->ac, "llvm.floor",
575 ac_to_float_type(&ctx->ac, def_type), result);
576 result = LLVMBuildFMul(ctx->ac.builder, src[1] , result, "");
577 result = LLVMBuildFSub(ctx->ac.builder, src[0], result, "");
578 break;
579 case nir_op_frem:
580 src[0] = ac_to_float(&ctx->ac, src[0]);
581 src[1] = ac_to_float(&ctx->ac, src[1]);
582 result = LLVMBuildFRem(ctx->ac.builder, src[0], src[1], "");
583 break;
584 case nir_op_irem:
585 result = LLVMBuildSRem(ctx->ac.builder, src[0], src[1], "");
586 break;
587 case nir_op_idiv:
588 result = LLVMBuildSDiv(ctx->ac.builder, src[0], src[1], "");
589 break;
590 case nir_op_udiv:
591 result = LLVMBuildUDiv(ctx->ac.builder, src[0], src[1], "");
592 break;
593 case nir_op_fmul:
594 src[0] = ac_to_float(&ctx->ac, src[0]);
595 src[1] = ac_to_float(&ctx->ac, src[1]);
596 result = LLVMBuildFMul(ctx->ac.builder, src[0], src[1], "");
597 break;
598 case nir_op_frcp:
599 src[0] = ac_to_float(&ctx->ac, src[0]);
600 result = ac_build_fdiv(&ctx->ac, instr->dest.dest.ssa.bit_size == 32 ? ctx->ac.f32_1 : ctx->ac.f64_1,
601 src[0]);
602 break;
603 case nir_op_iand:
604 result = LLVMBuildAnd(ctx->ac.builder, src[0], src[1], "");
605 break;
606 case nir_op_ior:
607 result = LLVMBuildOr(ctx->ac.builder, src[0], src[1], "");
608 break;
609 case nir_op_ixor:
610 result = LLVMBuildXor(ctx->ac.builder, src[0], src[1], "");
611 break;
612 case nir_op_ishl:
613 result = LLVMBuildShl(ctx->ac.builder, src[0],
614 LLVMBuildZExt(ctx->ac.builder, src[1],
615 LLVMTypeOf(src[0]), ""),
616 "");
617 break;
618 case nir_op_ishr:
619 result = LLVMBuildAShr(ctx->ac.builder, src[0],
620 LLVMBuildZExt(ctx->ac.builder, src[1],
621 LLVMTypeOf(src[0]), ""),
622 "");
623 break;
624 case nir_op_ushr:
625 result = LLVMBuildLShr(ctx->ac.builder, src[0],
626 LLVMBuildZExt(ctx->ac.builder, src[1],
627 LLVMTypeOf(src[0]), ""),
628 "");
629 break;
630 case nir_op_ilt:
631 result = emit_int_cmp(&ctx->ac, LLVMIntSLT, src[0], src[1]);
632 break;
633 case nir_op_ine:
634 result = emit_int_cmp(&ctx->ac, LLVMIntNE, src[0], src[1]);
635 break;
636 case nir_op_ieq:
637 result = emit_int_cmp(&ctx->ac, LLVMIntEQ, src[0], src[1]);
638 break;
639 case nir_op_ige:
640 result = emit_int_cmp(&ctx->ac, LLVMIntSGE, src[0], src[1]);
641 break;
642 case nir_op_ult:
643 result = emit_int_cmp(&ctx->ac, LLVMIntULT, src[0], src[1]);
644 break;
645 case nir_op_uge:
646 result = emit_int_cmp(&ctx->ac, LLVMIntUGE, src[0], src[1]);
647 break;
648 case nir_op_feq:
649 result = emit_float_cmp(&ctx->ac, LLVMRealOEQ, src[0], src[1]);
650 break;
651 case nir_op_fne:
652 result = emit_float_cmp(&ctx->ac, LLVMRealUNE, src[0], src[1]);
653 break;
654 case nir_op_flt:
655 result = emit_float_cmp(&ctx->ac, LLVMRealOLT, src[0], src[1]);
656 break;
657 case nir_op_fge:
658 result = emit_float_cmp(&ctx->ac, LLVMRealOGE, src[0], src[1]);
659 break;
660 case nir_op_fabs:
661 result = emit_intrin_1f_param(&ctx->ac, "llvm.fabs",
662 ac_to_float_type(&ctx->ac, def_type), src[0]);
663 break;
664 case nir_op_iabs:
665 result = emit_iabs(&ctx->ac, src[0]);
666 break;
667 case nir_op_imax:
668 result = emit_minmax_int(&ctx->ac, LLVMIntSGT, src[0], src[1]);
669 break;
670 case nir_op_imin:
671 result = emit_minmax_int(&ctx->ac, LLVMIntSLT, src[0], src[1]);
672 break;
673 case nir_op_umax:
674 result = emit_minmax_int(&ctx->ac, LLVMIntUGT, src[0], src[1]);
675 break;
676 case nir_op_umin:
677 result = emit_minmax_int(&ctx->ac, LLVMIntULT, src[0], src[1]);
678 break;
679 case nir_op_isign:
680 result = ac_build_isign(&ctx->ac, src[0],
681 instr->dest.dest.ssa.bit_size);
682 break;
683 case nir_op_fsign:
684 src[0] = ac_to_float(&ctx->ac, src[0]);
685 result = ac_build_fsign(&ctx->ac, src[0],
686 instr->dest.dest.ssa.bit_size);
687 break;
688 case nir_op_ffloor:
689 result = emit_intrin_1f_param(&ctx->ac, "llvm.floor",
690 ac_to_float_type(&ctx->ac, def_type), src[0]);
691 break;
692 case nir_op_ftrunc:
693 result = emit_intrin_1f_param(&ctx->ac, "llvm.trunc",
694 ac_to_float_type(&ctx->ac, def_type), src[0]);
695 break;
696 case nir_op_fceil:
697 result = emit_intrin_1f_param(&ctx->ac, "llvm.ceil",
698 ac_to_float_type(&ctx->ac, def_type), src[0]);
699 break;
700 case nir_op_fround_even:
701 result = emit_intrin_1f_param(&ctx->ac, "llvm.rint",
702 ac_to_float_type(&ctx->ac, def_type),src[0]);
703 break;
704 case nir_op_ffract:
705 src[0] = ac_to_float(&ctx->ac, src[0]);
706 result = ac_build_fract(&ctx->ac, src[0],
707 instr->dest.dest.ssa.bit_size);
708 break;
709 case nir_op_fsin:
710 result = emit_intrin_1f_param(&ctx->ac, "llvm.sin",
711 ac_to_float_type(&ctx->ac, def_type), src[0]);
712 break;
713 case nir_op_fcos:
714 result = emit_intrin_1f_param(&ctx->ac, "llvm.cos",
715 ac_to_float_type(&ctx->ac, def_type), src[0]);
716 break;
717 case nir_op_fsqrt:
718 result = emit_intrin_1f_param(&ctx->ac, "llvm.sqrt",
719 ac_to_float_type(&ctx->ac, def_type), src[0]);
720 break;
721 case nir_op_fexp2:
722 result = emit_intrin_1f_param(&ctx->ac, "llvm.exp2",
723 ac_to_float_type(&ctx->ac, def_type), src[0]);
724 break;
725 case nir_op_flog2:
726 result = emit_intrin_1f_param(&ctx->ac, "llvm.log2",
727 ac_to_float_type(&ctx->ac, def_type), src[0]);
728 break;
729 case nir_op_frsq:
730 result = emit_intrin_1f_param(&ctx->ac, "llvm.sqrt",
731 ac_to_float_type(&ctx->ac, def_type), src[0]);
732 result = ac_build_fdiv(&ctx->ac, instr->dest.dest.ssa.bit_size == 32 ? ctx->ac.f32_1 : ctx->ac.f64_1,
733 result);
734 break;
735 case nir_op_fmax:
736 result = emit_intrin_2f_param(&ctx->ac, "llvm.maxnum",
737 ac_to_float_type(&ctx->ac, def_type), src[0], src[1]);
738 if (ctx->ac.chip_class < GFX9 &&
739 instr->dest.dest.ssa.bit_size == 32) {
740 /* Only pre-GFX9 chips do not flush denorms. */
741 result = emit_intrin_1f_param(&ctx->ac, "llvm.canonicalize",
742 ac_to_float_type(&ctx->ac, def_type),
743 result);
744 }
745 break;
746 case nir_op_fmin:
747 result = emit_intrin_2f_param(&ctx->ac, "llvm.minnum",
748 ac_to_float_type(&ctx->ac, def_type), src[0], src[1]);
749 if (ctx->ac.chip_class < GFX9 &&
750 instr->dest.dest.ssa.bit_size == 32) {
751 /* Only pre-GFX9 chips do not flush denorms. */
752 result = emit_intrin_1f_param(&ctx->ac, "llvm.canonicalize",
753 ac_to_float_type(&ctx->ac, def_type),
754 result);
755 }
756 break;
757 case nir_op_ffma:
758 result = emit_intrin_3f_param(&ctx->ac, "llvm.fmuladd",
759 ac_to_float_type(&ctx->ac, def_type), src[0], src[1], src[2]);
760 break;
761 case nir_op_ldexp:
762 src[0] = ac_to_float(&ctx->ac, src[0]);
763 if (ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[0])) == 32)
764 result = ac_build_intrinsic(&ctx->ac, "llvm.amdgcn.ldexp.f32", ctx->ac.f32, src, 2, AC_FUNC_ATTR_READNONE);
765 else
766 result = ac_build_intrinsic(&ctx->ac, "llvm.amdgcn.ldexp.f64", ctx->ac.f64, src, 2, AC_FUNC_ATTR_READNONE);
767 break;
768 case nir_op_ibitfield_extract:
769 result = emit_bitfield_extract(&ctx->ac, true, src);
770 break;
771 case nir_op_ubitfield_extract:
772 result = emit_bitfield_extract(&ctx->ac, false, src);
773 break;
774 case nir_op_bitfield_insert:
775 result = emit_bitfield_insert(&ctx->ac, src[0], src[1], src[2], src[3]);
776 break;
777 case nir_op_bitfield_reverse:
778 result = ac_build_intrinsic(&ctx->ac, "llvm.bitreverse.i32", ctx->ac.i32, src, 1, AC_FUNC_ATTR_READNONE);
779 break;
780 case nir_op_bit_count:
781 if (ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[0])) == 32)
782 result = ac_build_intrinsic(&ctx->ac, "llvm.ctpop.i32", ctx->ac.i32, src, 1, AC_FUNC_ATTR_READNONE);
783 else {
784 result = ac_build_intrinsic(&ctx->ac, "llvm.ctpop.i64", ctx->ac.i64, src, 1, AC_FUNC_ATTR_READNONE);
785 result = LLVMBuildTrunc(ctx->ac.builder, result, ctx->ac.i32, "");
786 }
787 break;
788 case nir_op_vec2:
789 case nir_op_vec3:
790 case nir_op_vec4:
791 for (unsigned i = 0; i < nir_op_infos[instr->op].num_inputs; i++)
792 src[i] = ac_to_integer(&ctx->ac, src[i]);
793 result = ac_build_gather_values(&ctx->ac, src, num_components);
794 break;
795 case nir_op_f2i32:
796 case nir_op_f2i64:
797 src[0] = ac_to_float(&ctx->ac, src[0]);
798 result = LLVMBuildFPToSI(ctx->ac.builder, src[0], def_type, "");
799 break;
800 case nir_op_f2u32:
801 case nir_op_f2u64:
802 src[0] = ac_to_float(&ctx->ac, src[0]);
803 result = LLVMBuildFPToUI(ctx->ac.builder, src[0], def_type, "");
804 break;
805 case nir_op_i2f32:
806 case nir_op_i2f64:
807 src[0] = ac_to_integer(&ctx->ac, src[0]);
808 result = LLVMBuildSIToFP(ctx->ac.builder, src[0], ac_to_float_type(&ctx->ac, def_type), "");
809 break;
810 case nir_op_u2f32:
811 case nir_op_u2f64:
812 src[0] = ac_to_integer(&ctx->ac, src[0]);
813 result = LLVMBuildUIToFP(ctx->ac.builder, src[0], ac_to_float_type(&ctx->ac, def_type), "");
814 break;
815 case nir_op_f2f64:
816 src[0] = ac_to_float(&ctx->ac, src[0]);
817 result = LLVMBuildFPExt(ctx->ac.builder, src[0], ac_to_float_type(&ctx->ac, def_type), "");
818 break;
819 case nir_op_f2f32:
820 src[0] = ac_to_float(&ctx->ac, src[0]);
821 result = LLVMBuildFPTrunc(ctx->ac.builder, src[0], ac_to_float_type(&ctx->ac, def_type), "");
822 break;
823 case nir_op_u2u32:
824 case nir_op_u2u64:
825 src[0] = ac_to_integer(&ctx->ac, src[0]);
826 if (ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[0])) < ac_get_elem_bits(&ctx->ac, def_type))
827 result = LLVMBuildZExt(ctx->ac.builder, src[0], def_type, "");
828 else
829 result = LLVMBuildTrunc(ctx->ac.builder, src[0], def_type, "");
830 break;
831 case nir_op_i2i32:
832 case nir_op_i2i64:
833 src[0] = ac_to_integer(&ctx->ac, src[0]);
834 if (ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[0])) < ac_get_elem_bits(&ctx->ac, def_type))
835 result = LLVMBuildSExt(ctx->ac.builder, src[0], def_type, "");
836 else
837 result = LLVMBuildTrunc(ctx->ac.builder, src[0], def_type, "");
838 break;
839 case nir_op_bcsel:
840 result = emit_bcsel(&ctx->ac, src[0], src[1], src[2]);
841 break;
842 case nir_op_find_lsb:
843 src[0] = ac_to_integer(&ctx->ac, src[0]);
844 result = ac_find_lsb(&ctx->ac, ctx->ac.i32, src[0]);
845 break;
846 case nir_op_ufind_msb:
847 src[0] = ac_to_integer(&ctx->ac, src[0]);
848 result = ac_build_umsb(&ctx->ac, src[0], ctx->ac.i32);
849 break;
850 case nir_op_ifind_msb:
851 src[0] = ac_to_integer(&ctx->ac, src[0]);
852 result = ac_build_imsb(&ctx->ac, src[0], ctx->ac.i32);
853 break;
854 case nir_op_uadd_carry:
855 src[0] = ac_to_integer(&ctx->ac, src[0]);
856 src[1] = ac_to_integer(&ctx->ac, src[1]);
857 result = emit_uint_carry(&ctx->ac, "llvm.uadd.with.overflow.i32", src[0], src[1]);
858 break;
859 case nir_op_usub_borrow:
860 src[0] = ac_to_integer(&ctx->ac, src[0]);
861 src[1] = ac_to_integer(&ctx->ac, src[1]);
862 result = emit_uint_carry(&ctx->ac, "llvm.usub.with.overflow.i32", src[0], src[1]);
863 break;
864 case nir_op_b2f:
865 result = emit_b2f(&ctx->ac, src[0]);
866 break;
867 case nir_op_f2b:
868 result = emit_f2b(&ctx->ac, src[0]);
869 break;
870 case nir_op_b2i:
871 result = emit_b2i(&ctx->ac, src[0], instr->dest.dest.ssa.bit_size);
872 break;
873 case nir_op_i2b:
874 src[0] = ac_to_integer(&ctx->ac, src[0]);
875 result = emit_i2b(&ctx->ac, src[0]);
876 break;
877 case nir_op_fquantize2f16:
878 result = emit_f2f16(&ctx->ac, src[0]);
879 break;
880 case nir_op_umul_high:
881 src[0] = ac_to_integer(&ctx->ac, src[0]);
882 src[1] = ac_to_integer(&ctx->ac, src[1]);
883 result = emit_umul_high(&ctx->ac, src[0], src[1]);
884 break;
885 case nir_op_imul_high:
886 src[0] = ac_to_integer(&ctx->ac, src[0]);
887 src[1] = ac_to_integer(&ctx->ac, src[1]);
888 result = emit_imul_high(&ctx->ac, src[0], src[1]);
889 break;
890 case nir_op_pack_half_2x16:
891 result = emit_pack_half_2x16(&ctx->ac, src[0]);
892 break;
893 case nir_op_unpack_half_2x16:
894 result = emit_unpack_half_2x16(&ctx->ac, src[0]);
895 break;
896 case nir_op_fddx:
897 case nir_op_fddy:
898 case nir_op_fddx_fine:
899 case nir_op_fddy_fine:
900 case nir_op_fddx_coarse:
901 case nir_op_fddy_coarse:
902 result = emit_ddxy(ctx, instr->op, src[0]);
903 break;
904
905 case nir_op_unpack_64_2x32_split_x: {
906 assert(ac_get_llvm_num_components(src[0]) == 1);
907 LLVMValueRef tmp = LLVMBuildBitCast(ctx->ac.builder, src[0],
908 ctx->ac.v2i32,
909 "");
910 result = LLVMBuildExtractElement(ctx->ac.builder, tmp,
911 ctx->ac.i32_0, "");
912 break;
913 }
914
915 case nir_op_unpack_64_2x32_split_y: {
916 assert(ac_get_llvm_num_components(src[0]) == 1);
917 LLVMValueRef tmp = LLVMBuildBitCast(ctx->ac.builder, src[0],
918 ctx->ac.v2i32,
919 "");
920 result = LLVMBuildExtractElement(ctx->ac.builder, tmp,
921 ctx->ac.i32_1, "");
922 break;
923 }
924
925 case nir_op_pack_64_2x32_split: {
926 LLVMValueRef tmp = LLVMGetUndef(ctx->ac.v2i32);
927 tmp = LLVMBuildInsertElement(ctx->ac.builder, tmp,
928 src[0], ctx->ac.i32_0, "");
929 tmp = LLVMBuildInsertElement(ctx->ac.builder, tmp,
930 src[1], ctx->ac.i32_1, "");
931 result = LLVMBuildBitCast(ctx->ac.builder, tmp, ctx->ac.i64, "");
932 break;
933 }
934
935 case nir_op_cube_face_coord: {
936 src[0] = ac_to_float(&ctx->ac, src[0]);
937 LLVMValueRef results[2];
938 LLVMValueRef in[3];
939 for (unsigned chan = 0; chan < 3; chan++)
940 in[chan] = ac_llvm_extract_elem(&ctx->ac, src[0], chan);
941 results[0] = ac_build_intrinsic(&ctx->ac, "llvm.amdgcn.cubetc",
942 ctx->ac.f32, in, 3, AC_FUNC_ATTR_READNONE);
943 results[1] = ac_build_intrinsic(&ctx->ac, "llvm.amdgcn.cubesc",
944 ctx->ac.f32, in, 3, AC_FUNC_ATTR_READNONE);
945 result = ac_build_gather_values(&ctx->ac, results, 2);
946 break;
947 }
948
949 case nir_op_cube_face_index: {
950 src[0] = ac_to_float(&ctx->ac, src[0]);
951 LLVMValueRef in[3];
952 for (unsigned chan = 0; chan < 3; chan++)
953 in[chan] = ac_llvm_extract_elem(&ctx->ac, src[0], chan);
954 result = ac_build_intrinsic(&ctx->ac, "llvm.amdgcn.cubeid",
955 ctx->ac.f32, in, 3, AC_FUNC_ATTR_READNONE);
956 break;
957 }
958
959 default:
960 fprintf(stderr, "Unknown NIR alu instr: ");
961 nir_print_instr(&instr->instr, stderr);
962 fprintf(stderr, "\n");
963 abort();
964 }
965
966 if (result) {
967 assert(instr->dest.dest.is_ssa);
968 result = ac_to_integer(&ctx->ac, result);
969 _mesa_hash_table_insert(ctx->defs, &instr->dest.dest.ssa,
970 result);
971 }
972 }
973
974 static void visit_load_const(struct ac_nir_context *ctx,
975 const nir_load_const_instr *instr)
976 {
977 LLVMValueRef values[4], value = NULL;
978 LLVMTypeRef element_type =
979 LLVMIntTypeInContext(ctx->ac.context, instr->def.bit_size);
980
981 for (unsigned i = 0; i < instr->def.num_components; ++i) {
982 switch (instr->def.bit_size) {
983 case 32:
984 values[i] = LLVMConstInt(element_type,
985 instr->value.u32[i], false);
986 break;
987 case 64:
988 values[i] = LLVMConstInt(element_type,
989 instr->value.u64[i], false);
990 break;
991 default:
992 fprintf(stderr,
993 "unsupported nir load_const bit_size: %d\n",
994 instr->def.bit_size);
995 abort();
996 }
997 }
998 if (instr->def.num_components > 1) {
999 value = LLVMConstVector(values, instr->def.num_components);
1000 } else
1001 value = values[0];
1002
1003 _mesa_hash_table_insert(ctx->defs, &instr->def, value);
1004 }
1005
1006 static LLVMValueRef
1007 get_buffer_size(struct ac_nir_context *ctx, LLVMValueRef descriptor, bool in_elements)
1008 {
1009 LLVMValueRef size =
1010 LLVMBuildExtractElement(ctx->ac.builder, descriptor,
1011 LLVMConstInt(ctx->ac.i32, 2, false), "");
1012
1013 /* VI only */
1014 if (ctx->ac.chip_class == VI && in_elements) {
1015 /* On VI, the descriptor contains the size in bytes,
1016 * but TXQ must return the size in elements.
1017 * The stride is always non-zero for resources using TXQ.
1018 */
1019 LLVMValueRef stride =
1020 LLVMBuildExtractElement(ctx->ac.builder, descriptor,
1021 ctx->ac.i32_1, "");
1022 stride = LLVMBuildLShr(ctx->ac.builder, stride,
1023 LLVMConstInt(ctx->ac.i32, 16, false), "");
1024 stride = LLVMBuildAnd(ctx->ac.builder, stride,
1025 LLVMConstInt(ctx->ac.i32, 0x3fff, false), "");
1026
1027 size = LLVMBuildUDiv(ctx->ac.builder, size, stride, "");
1028 }
1029 return size;
1030 }
1031
1032 /**
1033 * Given the i32 or vNi32 \p type, generate the textual name (e.g. for use with
1034 * intrinsic names).
1035 */
1036 static void build_int_type_name(
1037 LLVMTypeRef type,
1038 char *buf, unsigned bufsize)
1039 {
1040 assert(bufsize >= 6);
1041
1042 if (LLVMGetTypeKind(type) == LLVMVectorTypeKind)
1043 snprintf(buf, bufsize, "v%ui32",
1044 LLVMGetVectorSize(type));
1045 else
1046 strcpy(buf, "i32");
1047 }
1048
1049 static LLVMValueRef radv_lower_gather4_integer(struct ac_llvm_context *ctx,
1050 struct ac_image_args *args,
1051 const nir_tex_instr *instr)
1052 {
1053 enum glsl_base_type stype = glsl_get_sampler_result_type(instr->texture->var->type);
1054 LLVMValueRef coord = args->addr;
1055 LLVMValueRef half_texel[2];
1056 LLVMValueRef compare_cube_wa = NULL;
1057 LLVMValueRef result;
1058 int c;
1059 unsigned coord_vgpr_index = (unsigned)args->offset + (unsigned)args->compare;
1060
1061 //TODO Rect
1062 {
1063 struct ac_image_args txq_args = { 0 };
1064
1065 txq_args.da = instr->is_array || instr->sampler_dim == GLSL_SAMPLER_DIM_CUBE;
1066 txq_args.opcode = ac_image_get_resinfo;
1067 txq_args.dmask = 0xf;
1068 txq_args.addr = ctx->i32_0;
1069 txq_args.resource = args->resource;
1070 LLVMValueRef size = ac_build_image_opcode(ctx, &txq_args);
1071
1072 for (c = 0; c < 2; c++) {
1073 half_texel[c] = LLVMBuildExtractElement(ctx->builder, size,
1074 LLVMConstInt(ctx->i32, c, false), "");
1075 half_texel[c] = LLVMBuildUIToFP(ctx->builder, half_texel[c], ctx->f32, "");
1076 half_texel[c] = ac_build_fdiv(ctx, ctx->f32_1, half_texel[c]);
1077 half_texel[c] = LLVMBuildFMul(ctx->builder, half_texel[c],
1078 LLVMConstReal(ctx->f32, -0.5), "");
1079 }
1080 }
1081
1082 LLVMValueRef orig_coords = args->addr;
1083
1084 for (c = 0; c < 2; c++) {
1085 LLVMValueRef tmp;
1086 LLVMValueRef index = LLVMConstInt(ctx->i32, coord_vgpr_index + c, 0);
1087 tmp = LLVMBuildExtractElement(ctx->builder, coord, index, "");
1088 tmp = LLVMBuildBitCast(ctx->builder, tmp, ctx->f32, "");
1089 tmp = LLVMBuildFAdd(ctx->builder, tmp, half_texel[c], "");
1090 tmp = LLVMBuildBitCast(ctx->builder, tmp, ctx->i32, "");
1091 coord = LLVMBuildInsertElement(ctx->builder, coord, tmp, index, "");
1092 }
1093
1094
1095 /*
1096 * Apparantly cube has issue with integer types that the workaround doesn't solve,
1097 * so this tests if the format is 8_8_8_8 and an integer type do an alternate
1098 * workaround by sampling using a scaled type and converting.
1099 * This is taken from amdgpu-pro shaders.
1100 */
1101 /* NOTE this produces some ugly code compared to amdgpu-pro,
1102 * LLVM ends up dumping SGPRs into VGPRs to deal with the compare/select,
1103 * and then reads them back. -pro generates two selects,
1104 * one s_cmp for the descriptor rewriting
1105 * one v_cmp for the coordinate and result changes.
1106 */
1107 if (instr->sampler_dim == GLSL_SAMPLER_DIM_CUBE) {
1108 LLVMValueRef tmp, tmp2;
1109
1110 /* workaround 8/8/8/8 uint/sint cube gather bug */
1111 /* first detect it then change to a scaled read and f2i */
1112 tmp = LLVMBuildExtractElement(ctx->builder, args->resource, ctx->i32_1, "");
1113 tmp2 = tmp;
1114
1115 /* extract the DATA_FORMAT */
1116 tmp = ac_build_bfe(ctx, tmp, LLVMConstInt(ctx->i32, 20, false),
1117 LLVMConstInt(ctx->i32, 6, false), false);
1118
1119 /* is the DATA_FORMAT == 8_8_8_8 */
1120 compare_cube_wa = LLVMBuildICmp(ctx->builder, LLVMIntEQ, tmp, LLVMConstInt(ctx->i32, V_008F14_IMG_DATA_FORMAT_8_8_8_8, false), "");
1121
1122 if (stype == GLSL_TYPE_UINT)
1123 /* Create a NUM FORMAT - 0x2 or 0x4 - USCALED or UINT */
1124 tmp = LLVMBuildSelect(ctx->builder, compare_cube_wa, LLVMConstInt(ctx->i32, 0x8000000, false),
1125 LLVMConstInt(ctx->i32, 0x10000000, false), "");
1126 else
1127 /* Create a NUM FORMAT - 0x3 or 0x5 - SSCALED or SINT */
1128 tmp = LLVMBuildSelect(ctx->builder, compare_cube_wa, LLVMConstInt(ctx->i32, 0xc000000, false),
1129 LLVMConstInt(ctx->i32, 0x14000000, false), "");
1130
1131 /* replace the NUM FORMAT in the descriptor */
1132 tmp2 = LLVMBuildAnd(ctx->builder, tmp2, LLVMConstInt(ctx->i32, C_008F14_NUM_FORMAT_GFX6, false), "");
1133 tmp2 = LLVMBuildOr(ctx->builder, tmp2, tmp, "");
1134
1135 args->resource = LLVMBuildInsertElement(ctx->builder, args->resource, tmp2, ctx->i32_1, "");
1136
1137 /* don't modify the coordinates for this case */
1138 coord = LLVMBuildSelect(ctx->builder, compare_cube_wa, orig_coords, coord, "");
1139 }
1140 args->addr = coord;
1141 result = ac_build_image_opcode(ctx, args);
1142
1143 if (instr->sampler_dim == GLSL_SAMPLER_DIM_CUBE) {
1144 LLVMValueRef tmp, tmp2;
1145
1146 /* if the cube workaround is in place, f2i the result. */
1147 for (c = 0; c < 4; c++) {
1148 tmp = LLVMBuildExtractElement(ctx->builder, result, LLVMConstInt(ctx->i32, c, false), "");
1149 if (stype == GLSL_TYPE_UINT)
1150 tmp2 = LLVMBuildFPToUI(ctx->builder, tmp, ctx->i32, "");
1151 else
1152 tmp2 = LLVMBuildFPToSI(ctx->builder, tmp, ctx->i32, "");
1153 tmp = LLVMBuildBitCast(ctx->builder, tmp, ctx->i32, "");
1154 tmp2 = LLVMBuildBitCast(ctx->builder, tmp2, ctx->i32, "");
1155 tmp = LLVMBuildSelect(ctx->builder, compare_cube_wa, tmp2, tmp, "");
1156 tmp = LLVMBuildBitCast(ctx->builder, tmp, ctx->f32, "");
1157 result = LLVMBuildInsertElement(ctx->builder, result, tmp, LLVMConstInt(ctx->i32, c, false), "");
1158 }
1159 }
1160 return result;
1161 }
1162
1163 static LLVMValueRef build_tex_intrinsic(struct ac_nir_context *ctx,
1164 const nir_tex_instr *instr,
1165 bool lod_is_zero,
1166 struct ac_image_args *args)
1167 {
1168 if (instr->sampler_dim == GLSL_SAMPLER_DIM_BUF) {
1169 unsigned mask = nir_ssa_def_components_read(&instr->dest.ssa);
1170
1171 return ac_build_buffer_load_format(&ctx->ac,
1172 args->resource,
1173 args->addr,
1174 ctx->ac.i32_0,
1175 util_last_bit(mask),
1176 false, true);
1177 }
1178
1179 args->opcode = ac_image_sample;
1180 args->compare = instr->is_shadow;
1181
1182 switch (instr->op) {
1183 case nir_texop_txf:
1184 case nir_texop_txf_ms:
1185 case nir_texop_samples_identical:
1186 args->opcode = lod_is_zero ||
1187 instr->sampler_dim == GLSL_SAMPLER_DIM_MS ?
1188 ac_image_load : ac_image_load_mip;
1189 args->compare = false;
1190 args->offset = false;
1191 break;
1192 case nir_texop_txb:
1193 args->bias = true;
1194 break;
1195 case nir_texop_txl:
1196 if (lod_is_zero)
1197 args->level_zero = true;
1198 else
1199 args->lod = true;
1200 break;
1201 case nir_texop_txs:
1202 case nir_texop_query_levels:
1203 args->opcode = ac_image_get_resinfo;
1204 break;
1205 case nir_texop_tex:
1206 if (ctx->stage != MESA_SHADER_FRAGMENT)
1207 args->level_zero = true;
1208 break;
1209 case nir_texop_txd:
1210 args->deriv = true;
1211 break;
1212 case nir_texop_tg4:
1213 args->opcode = ac_image_gather4;
1214 args->level_zero = true;
1215 break;
1216 case nir_texop_lod:
1217 args->opcode = ac_image_get_lod;
1218 args->compare = false;
1219 args->offset = false;
1220 break;
1221 default:
1222 break;
1223 }
1224
1225 if (instr->op == nir_texop_tg4 && ctx->ac.chip_class <= VI) {
1226 enum glsl_base_type stype = glsl_get_sampler_result_type(instr->texture->var->type);
1227 if (stype == GLSL_TYPE_UINT || stype == GLSL_TYPE_INT) {
1228 return radv_lower_gather4_integer(&ctx->ac, args, instr);
1229 }
1230 }
1231 return ac_build_image_opcode(&ctx->ac, args);
1232 }
1233
1234 static LLVMValueRef visit_vulkan_resource_reindex(struct ac_nir_context *ctx,
1235 nir_intrinsic_instr *instr)
1236 {
1237 LLVMValueRef ptr = get_src(ctx, instr->src[0]);
1238 LLVMValueRef index = get_src(ctx, instr->src[1]);
1239
1240 LLVMValueRef result = LLVMBuildGEP(ctx->ac.builder, ptr, &index, 1, "");
1241 LLVMSetMetadata(result, ctx->ac.uniform_md_kind, ctx->ac.empty_md);
1242 return result;
1243 }
1244
1245 static LLVMValueRef visit_load_push_constant(struct ac_nir_context *ctx,
1246 nir_intrinsic_instr *instr)
1247 {
1248 LLVMValueRef ptr, addr;
1249
1250 addr = LLVMConstInt(ctx->ac.i32, nir_intrinsic_base(instr), 0);
1251 addr = LLVMBuildAdd(ctx->ac.builder, addr,
1252 get_src(ctx, instr->src[0]), "");
1253
1254 ptr = ac_build_gep0(&ctx->ac, ctx->abi->push_constants, addr);
1255 ptr = ac_cast_ptr(&ctx->ac, ptr, get_def_type(ctx, &instr->dest.ssa));
1256
1257 return LLVMBuildLoad(ctx->ac.builder, ptr, "");
1258 }
1259
1260 static LLVMValueRef visit_get_buffer_size(struct ac_nir_context *ctx,
1261 const nir_intrinsic_instr *instr)
1262 {
1263 LLVMValueRef index = get_src(ctx, instr->src[0]);
1264
1265 return get_buffer_size(ctx, ctx->abi->load_ssbo(ctx->abi, index, false), false);
1266 }
1267
1268 static uint32_t widen_mask(uint32_t mask, unsigned multiplier)
1269 {
1270 uint32_t new_mask = 0;
1271 for(unsigned i = 0; i < 32 && (1u << i) <= mask; ++i)
1272 if (mask & (1u << i))
1273 new_mask |= ((1u << multiplier) - 1u) << (i * multiplier);
1274 return new_mask;
1275 }
1276
1277 static LLVMValueRef extract_vector_range(struct ac_llvm_context *ctx, LLVMValueRef src,
1278 unsigned start, unsigned count)
1279 {
1280 LLVMTypeRef type = LLVMTypeOf(src);
1281
1282 if (LLVMGetTypeKind(type) != LLVMVectorTypeKind) {
1283 assert(start == 0);
1284 assert(count == 1);
1285 return src;
1286 }
1287
1288 unsigned src_elements = LLVMGetVectorSize(type);
1289 assert(start < src_elements);
1290 assert(start + count <= src_elements);
1291
1292 if (start == 0 && count == src_elements)
1293 return src;
1294
1295 if (count == 1)
1296 return LLVMBuildExtractElement(ctx->builder, src, LLVMConstInt(ctx->i32, start, false), "");
1297
1298 assert(count <= 8);
1299 LLVMValueRef indices[8];
1300 for (unsigned i = 0; i < count; ++i)
1301 indices[i] = LLVMConstInt(ctx->i32, start + i, false);
1302
1303 LLVMValueRef swizzle = LLVMConstVector(indices, count);
1304 return LLVMBuildShuffleVector(ctx->builder, src, src, swizzle, "");
1305 }
1306
1307 static void visit_store_ssbo(struct ac_nir_context *ctx,
1308 nir_intrinsic_instr *instr)
1309 {
1310 const char *store_name;
1311 LLVMValueRef src_data = get_src(ctx, instr->src[0]);
1312 LLVMTypeRef data_type = ctx->ac.f32;
1313 int elem_size_mult = ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src_data)) / 32;
1314 int components_32bit = elem_size_mult * instr->num_components;
1315 unsigned writemask = nir_intrinsic_write_mask(instr);
1316 LLVMValueRef base_data, base_offset;
1317 LLVMValueRef params[6];
1318
1319 params[1] = ctx->abi->load_ssbo(ctx->abi,
1320 get_src(ctx, instr->src[1]), true);
1321 params[2] = ctx->ac.i32_0; /* vindex */
1322 params[4] = ctx->ac.i1false; /* glc */
1323 params[5] = ctx->ac.i1false; /* slc */
1324
1325 if (components_32bit > 1)
1326 data_type = LLVMVectorType(ctx->ac.f32, components_32bit);
1327
1328 writemask = widen_mask(writemask, elem_size_mult);
1329
1330 base_data = ac_to_float(&ctx->ac, src_data);
1331 base_data = ac_trim_vector(&ctx->ac, base_data, instr->num_components);
1332 base_data = LLVMBuildBitCast(ctx->ac.builder, base_data,
1333 data_type, "");
1334 base_offset = get_src(ctx, instr->src[2]); /* voffset */
1335 while (writemask) {
1336 int start, count;
1337 LLVMValueRef data;
1338 LLVMValueRef offset;
1339
1340 u_bit_scan_consecutive_range(&writemask, &start, &count);
1341
1342 /* Due to an LLVM limitation, split 3-element writes
1343 * into a 2-element and a 1-element write. */
1344 if (count == 3) {
1345 writemask |= 1 << (start + 2);
1346 count = 2;
1347 }
1348
1349 if (count > 4) {
1350 writemask |= ((1u << (count - 4)) - 1u) << (start + 4);
1351 count = 4;
1352 }
1353
1354 if (count == 4) {
1355 store_name = "llvm.amdgcn.buffer.store.v4f32";
1356 } else if (count == 2) {
1357 store_name = "llvm.amdgcn.buffer.store.v2f32";
1358
1359 } else {
1360 assert(count == 1);
1361 store_name = "llvm.amdgcn.buffer.store.f32";
1362 }
1363 data = extract_vector_range(&ctx->ac, base_data, start, count);
1364
1365 offset = base_offset;
1366 if (start != 0) {
1367 offset = LLVMBuildAdd(ctx->ac.builder, offset, LLVMConstInt(ctx->ac.i32, start * 4, false), "");
1368 }
1369 params[0] = data;
1370 params[3] = offset;
1371 ac_build_intrinsic(&ctx->ac, store_name,
1372 ctx->ac.voidt, params, 6, 0);
1373 }
1374 }
1375
1376 static LLVMValueRef visit_atomic_ssbo(struct ac_nir_context *ctx,
1377 const nir_intrinsic_instr *instr)
1378 {
1379 const char *name;
1380 LLVMValueRef params[6];
1381 int arg_count = 0;
1382
1383 if (instr->intrinsic == nir_intrinsic_ssbo_atomic_comp_swap) {
1384 params[arg_count++] = ac_llvm_extract_elem(&ctx->ac, get_src(ctx, instr->src[3]), 0);
1385 }
1386 params[arg_count++] = ac_llvm_extract_elem(&ctx->ac, get_src(ctx, instr->src[2]), 0);
1387 params[arg_count++] = ctx->abi->load_ssbo(ctx->abi,
1388 get_src(ctx, instr->src[0]),
1389 true);
1390 params[arg_count++] = ctx->ac.i32_0; /* vindex */
1391 params[arg_count++] = get_src(ctx, instr->src[1]); /* voffset */
1392 params[arg_count++] = LLVMConstInt(ctx->ac.i1, 0, false); /* slc */
1393
1394 switch (instr->intrinsic) {
1395 case nir_intrinsic_ssbo_atomic_add:
1396 name = "llvm.amdgcn.buffer.atomic.add";
1397 break;
1398 case nir_intrinsic_ssbo_atomic_imin:
1399 name = "llvm.amdgcn.buffer.atomic.smin";
1400 break;
1401 case nir_intrinsic_ssbo_atomic_umin:
1402 name = "llvm.amdgcn.buffer.atomic.umin";
1403 break;
1404 case nir_intrinsic_ssbo_atomic_imax:
1405 name = "llvm.amdgcn.buffer.atomic.smax";
1406 break;
1407 case nir_intrinsic_ssbo_atomic_umax:
1408 name = "llvm.amdgcn.buffer.atomic.umax";
1409 break;
1410 case nir_intrinsic_ssbo_atomic_and:
1411 name = "llvm.amdgcn.buffer.atomic.and";
1412 break;
1413 case nir_intrinsic_ssbo_atomic_or:
1414 name = "llvm.amdgcn.buffer.atomic.or";
1415 break;
1416 case nir_intrinsic_ssbo_atomic_xor:
1417 name = "llvm.amdgcn.buffer.atomic.xor";
1418 break;
1419 case nir_intrinsic_ssbo_atomic_exchange:
1420 name = "llvm.amdgcn.buffer.atomic.swap";
1421 break;
1422 case nir_intrinsic_ssbo_atomic_comp_swap:
1423 name = "llvm.amdgcn.buffer.atomic.cmpswap";
1424 break;
1425 default:
1426 abort();
1427 }
1428
1429 return ac_build_intrinsic(&ctx->ac, name, ctx->ac.i32, params, arg_count, 0);
1430 }
1431
1432 static LLVMValueRef visit_load_buffer(struct ac_nir_context *ctx,
1433 const nir_intrinsic_instr *instr)
1434 {
1435 LLVMValueRef results[2];
1436 int load_components;
1437 int num_components = instr->num_components;
1438 if (instr->dest.ssa.bit_size == 64)
1439 num_components *= 2;
1440
1441 for (int i = 0; i < num_components; i += load_components) {
1442 load_components = MIN2(num_components - i, 4);
1443 const char *load_name;
1444 LLVMTypeRef data_type = ctx->ac.f32;
1445 LLVMValueRef offset = LLVMConstInt(ctx->ac.i32, i * 4, false);
1446 offset = LLVMBuildAdd(ctx->ac.builder, get_src(ctx, instr->src[1]), offset, "");
1447
1448 if (load_components == 3)
1449 data_type = LLVMVectorType(ctx->ac.f32, 4);
1450 else if (load_components > 1)
1451 data_type = LLVMVectorType(ctx->ac.f32, load_components);
1452
1453 if (load_components >= 3)
1454 load_name = "llvm.amdgcn.buffer.load.v4f32";
1455 else if (load_components == 2)
1456 load_name = "llvm.amdgcn.buffer.load.v2f32";
1457 else if (load_components == 1)
1458 load_name = "llvm.amdgcn.buffer.load.f32";
1459 else
1460 unreachable("unhandled number of components");
1461
1462 LLVMValueRef params[] = {
1463 ctx->abi->load_ssbo(ctx->abi,
1464 get_src(ctx, instr->src[0]),
1465 false),
1466 ctx->ac.i32_0,
1467 offset,
1468 ctx->ac.i1false,
1469 ctx->ac.i1false,
1470 };
1471
1472 results[i > 0 ? 1 : 0] = ac_build_intrinsic(&ctx->ac, load_name, data_type, params, 5, 0);
1473 }
1474
1475 assume(results[0]);
1476 LLVMValueRef ret = results[0];
1477 if (num_components > 4 || num_components == 3) {
1478 LLVMValueRef masks[] = {
1479 LLVMConstInt(ctx->ac.i32, 0, false), LLVMConstInt(ctx->ac.i32, 1, false),
1480 LLVMConstInt(ctx->ac.i32, 2, false), LLVMConstInt(ctx->ac.i32, 3, false),
1481 LLVMConstInt(ctx->ac.i32, 4, false), LLVMConstInt(ctx->ac.i32, 5, false),
1482 LLVMConstInt(ctx->ac.i32, 6, false), LLVMConstInt(ctx->ac.i32, 7, false)
1483 };
1484
1485 LLVMValueRef swizzle = LLVMConstVector(masks, num_components);
1486 ret = LLVMBuildShuffleVector(ctx->ac.builder, results[0],
1487 results[num_components > 4 ? 1 : 0], swizzle, "");
1488 }
1489
1490 return LLVMBuildBitCast(ctx->ac.builder, ret,
1491 get_def_type(ctx, &instr->dest.ssa), "");
1492 }
1493
1494 static LLVMValueRef visit_load_ubo_buffer(struct ac_nir_context *ctx,
1495 const nir_intrinsic_instr *instr)
1496 {
1497 LLVMValueRef ret;
1498 LLVMValueRef rsrc = get_src(ctx, instr->src[0]);
1499 LLVMValueRef offset = get_src(ctx, instr->src[1]);
1500 int num_components = instr->num_components;
1501
1502 if (ctx->abi->load_ubo)
1503 rsrc = ctx->abi->load_ubo(ctx->abi, rsrc);
1504
1505 if (instr->dest.ssa.bit_size == 64)
1506 num_components *= 2;
1507
1508 ret = ac_build_buffer_load(&ctx->ac, rsrc, num_components, NULL, offset,
1509 NULL, 0, false, false, true, true);
1510 ret = ac_trim_vector(&ctx->ac, ret, num_components);
1511 return LLVMBuildBitCast(ctx->ac.builder, ret,
1512 get_def_type(ctx, &instr->dest.ssa), "");
1513 }
1514
1515 static void
1516 get_deref_offset(struct ac_nir_context *ctx, nir_deref_var *deref,
1517 bool vs_in, unsigned *vertex_index_out,
1518 LLVMValueRef *vertex_index_ref,
1519 unsigned *const_out, LLVMValueRef *indir_out)
1520 {
1521 unsigned const_offset = 0;
1522 nir_deref *tail = &deref->deref;
1523 LLVMValueRef offset = NULL;
1524
1525 if (vertex_index_out != NULL || vertex_index_ref != NULL) {
1526 tail = tail->child;
1527 nir_deref_array *deref_array = nir_deref_as_array(tail);
1528 if (vertex_index_out)
1529 *vertex_index_out = deref_array->base_offset;
1530
1531 if (vertex_index_ref) {
1532 LLVMValueRef vtx = LLVMConstInt(ctx->ac.i32, deref_array->base_offset, false);
1533 if (deref_array->deref_array_type == nir_deref_array_type_indirect) {
1534 vtx = LLVMBuildAdd(ctx->ac.builder, vtx, get_src(ctx, deref_array->indirect), "");
1535 }
1536 *vertex_index_ref = vtx;
1537 }
1538 }
1539
1540 if (deref->var->data.compact) {
1541 assert(tail->child->deref_type == nir_deref_type_array);
1542 assert(glsl_type_is_scalar(glsl_without_array(deref->var->type)));
1543 nir_deref_array *deref_array = nir_deref_as_array(tail->child);
1544 /* We always lower indirect dereferences for "compact" array vars. */
1545 assert(deref_array->deref_array_type == nir_deref_array_type_direct);
1546
1547 const_offset = deref_array->base_offset;
1548 goto out;
1549 }
1550
1551 while (tail->child != NULL) {
1552 const struct glsl_type *parent_type = tail->type;
1553 tail = tail->child;
1554
1555 if (tail->deref_type == nir_deref_type_array) {
1556 nir_deref_array *deref_array = nir_deref_as_array(tail);
1557 LLVMValueRef index, stride, local_offset;
1558 unsigned size = glsl_count_attribute_slots(tail->type, vs_in);
1559
1560 const_offset += size * deref_array->base_offset;
1561 if (deref_array->deref_array_type == nir_deref_array_type_direct)
1562 continue;
1563
1564 assert(deref_array->deref_array_type == nir_deref_array_type_indirect);
1565 index = get_src(ctx, deref_array->indirect);
1566 stride = LLVMConstInt(ctx->ac.i32, size, 0);
1567 local_offset = LLVMBuildMul(ctx->ac.builder, stride, index, "");
1568
1569 if (offset)
1570 offset = LLVMBuildAdd(ctx->ac.builder, offset, local_offset, "");
1571 else
1572 offset = local_offset;
1573 } else if (tail->deref_type == nir_deref_type_struct) {
1574 nir_deref_struct *deref_struct = nir_deref_as_struct(tail);
1575
1576 for (unsigned i = 0; i < deref_struct->index; i++) {
1577 const struct glsl_type *ft = glsl_get_struct_field(parent_type, i);
1578 const_offset += glsl_count_attribute_slots(ft, vs_in);
1579 }
1580 } else
1581 unreachable("unsupported deref type");
1582
1583 }
1584 out:
1585 if (const_offset && offset)
1586 offset = LLVMBuildAdd(ctx->ac.builder, offset,
1587 LLVMConstInt(ctx->ac.i32, const_offset, 0),
1588 "");
1589
1590 *const_out = const_offset;
1591 *indir_out = offset;
1592 }
1593
1594 static LLVMValueRef
1595 build_gep_for_deref(struct ac_nir_context *ctx,
1596 nir_deref_var *deref)
1597 {
1598 struct hash_entry *entry = _mesa_hash_table_search(ctx->vars, deref->var);
1599 assert(entry->data);
1600 LLVMValueRef val = entry->data;
1601 nir_deref *tail = deref->deref.child;
1602 while (tail != NULL) {
1603 LLVMValueRef offset;
1604 switch (tail->deref_type) {
1605 case nir_deref_type_array: {
1606 nir_deref_array *array = nir_deref_as_array(tail);
1607 offset = LLVMConstInt(ctx->ac.i32, array->base_offset, 0);
1608 if (array->deref_array_type ==
1609 nir_deref_array_type_indirect) {
1610 offset = LLVMBuildAdd(ctx->ac.builder, offset,
1611 get_src(ctx,
1612 array->indirect),
1613 "");
1614 }
1615 break;
1616 }
1617 case nir_deref_type_struct: {
1618 nir_deref_struct *deref_struct =
1619 nir_deref_as_struct(tail);
1620 offset = LLVMConstInt(ctx->ac.i32,
1621 deref_struct->index, 0);
1622 break;
1623 }
1624 default:
1625 unreachable("bad deref type");
1626 }
1627 val = ac_build_gep0(&ctx->ac, val, offset);
1628 tail = tail->child;
1629 }
1630 return val;
1631 }
1632
1633 static LLVMValueRef load_tess_varyings(struct ac_nir_context *ctx,
1634 nir_intrinsic_instr *instr,
1635 bool load_inputs)
1636 {
1637 LLVMValueRef result;
1638 LLVMValueRef vertex_index = NULL;
1639 LLVMValueRef indir_index = NULL;
1640 unsigned const_index = 0;
1641 unsigned location = instr->variables[0]->var->data.location;
1642 unsigned driver_location = instr->variables[0]->var->data.driver_location;
1643 const bool is_patch = instr->variables[0]->var->data.patch;
1644 const bool is_compact = instr->variables[0]->var->data.compact;
1645
1646 get_deref_offset(ctx, instr->variables[0],
1647 false, NULL, is_patch ? NULL : &vertex_index,
1648 &const_index, &indir_index);
1649
1650 LLVMTypeRef dest_type = get_def_type(ctx, &instr->dest.ssa);
1651
1652 LLVMTypeRef src_component_type;
1653 if (LLVMGetTypeKind(dest_type) == LLVMVectorTypeKind)
1654 src_component_type = LLVMGetElementType(dest_type);
1655 else
1656 src_component_type = dest_type;
1657
1658 result = ctx->abi->load_tess_varyings(ctx->abi, src_component_type,
1659 vertex_index, indir_index,
1660 const_index, location, driver_location,
1661 instr->variables[0]->var->data.location_frac,
1662 instr->num_components,
1663 is_patch, is_compact, load_inputs);
1664 return LLVMBuildBitCast(ctx->ac.builder, result, dest_type, "");
1665 }
1666
1667 static LLVMValueRef visit_load_var(struct ac_nir_context *ctx,
1668 nir_intrinsic_instr *instr)
1669 {
1670 LLVMValueRef values[8];
1671 int idx = instr->variables[0]->var->data.driver_location;
1672 int ve = instr->dest.ssa.num_components;
1673 unsigned comp = instr->variables[0]->var->data.location_frac;
1674 LLVMValueRef indir_index;
1675 LLVMValueRef ret;
1676 unsigned const_index;
1677 unsigned stride = instr->variables[0]->var->data.compact ? 1 : 4;
1678 bool vs_in = ctx->stage == MESA_SHADER_VERTEX &&
1679 instr->variables[0]->var->data.mode == nir_var_shader_in;
1680 get_deref_offset(ctx, instr->variables[0], vs_in, NULL, NULL,
1681 &const_index, &indir_index);
1682
1683 if (instr->dest.ssa.bit_size == 64)
1684 ve *= 2;
1685
1686 switch (instr->variables[0]->var->data.mode) {
1687 case nir_var_shader_in:
1688 if (ctx->stage == MESA_SHADER_TESS_CTRL ||
1689 ctx->stage == MESA_SHADER_TESS_EVAL) {
1690 return load_tess_varyings(ctx, instr, true);
1691 }
1692
1693 if (ctx->stage == MESA_SHADER_GEOMETRY) {
1694 LLVMTypeRef type = LLVMIntTypeInContext(ctx->ac.context, instr->dest.ssa.bit_size);
1695 LLVMValueRef indir_index;
1696 unsigned const_index, vertex_index;
1697 get_deref_offset(ctx, instr->variables[0],
1698 false, &vertex_index, NULL,
1699 &const_index, &indir_index);
1700
1701 return ctx->abi->load_inputs(ctx->abi, instr->variables[0]->var->data.location,
1702 instr->variables[0]->var->data.driver_location,
1703 instr->variables[0]->var->data.location_frac,
1704 instr->num_components, vertex_index, const_index, type);
1705 }
1706
1707 for (unsigned chan = comp; chan < ve + comp; chan++) {
1708 if (indir_index) {
1709 unsigned count = glsl_count_attribute_slots(
1710 instr->variables[0]->var->type,
1711 ctx->stage == MESA_SHADER_VERTEX);
1712 count -= chan / 4;
1713 LLVMValueRef tmp_vec = ac_build_gather_values_extended(
1714 &ctx->ac, ctx->abi->inputs + idx + chan, count,
1715 stride, false, true);
1716
1717 values[chan] = LLVMBuildExtractElement(ctx->ac.builder,
1718 tmp_vec,
1719 indir_index, "");
1720 } else
1721 values[chan] = ctx->abi->inputs[idx + chan + const_index * stride];
1722 }
1723 break;
1724 case nir_var_local:
1725 for (unsigned chan = 0; chan < ve; chan++) {
1726 if (indir_index) {
1727 unsigned count = glsl_count_attribute_slots(
1728 instr->variables[0]->var->type, false);
1729 count -= chan / 4;
1730 LLVMValueRef tmp_vec = ac_build_gather_values_extended(
1731 &ctx->ac, ctx->locals + idx + chan, count,
1732 stride, true, true);
1733
1734 values[chan] = LLVMBuildExtractElement(ctx->ac.builder,
1735 tmp_vec,
1736 indir_index, "");
1737 } else {
1738 values[chan] = LLVMBuildLoad(ctx->ac.builder, ctx->locals[idx + chan + const_index * stride], "");
1739 }
1740 }
1741 break;
1742 case nir_var_shared: {
1743 LLVMValueRef address = build_gep_for_deref(ctx,
1744 instr->variables[0]);
1745 LLVMValueRef val = LLVMBuildLoad(ctx->ac.builder, address, "");
1746 return LLVMBuildBitCast(ctx->ac.builder, val,
1747 get_def_type(ctx, &instr->dest.ssa),
1748 "");
1749 }
1750 case nir_var_shader_out:
1751 if (ctx->stage == MESA_SHADER_TESS_CTRL) {
1752 return load_tess_varyings(ctx, instr, false);
1753 }
1754
1755 for (unsigned chan = comp; chan < ve + comp; chan++) {
1756 if (indir_index) {
1757 unsigned count = glsl_count_attribute_slots(
1758 instr->variables[0]->var->type, false);
1759 count -= chan / 4;
1760 LLVMValueRef tmp_vec = ac_build_gather_values_extended(
1761 &ctx->ac, ctx->abi->outputs + idx + chan, count,
1762 stride, true, true);
1763
1764 values[chan] = LLVMBuildExtractElement(ctx->ac.builder,
1765 tmp_vec,
1766 indir_index, "");
1767 } else {
1768 values[chan] = LLVMBuildLoad(ctx->ac.builder,
1769 ctx->abi->outputs[idx + chan + const_index * stride],
1770 "");
1771 }
1772 }
1773 break;
1774 default:
1775 unreachable("unhandle variable mode");
1776 }
1777 ret = ac_build_varying_gather_values(&ctx->ac, values, ve, comp);
1778 return LLVMBuildBitCast(ctx->ac.builder, ret, get_def_type(ctx, &instr->dest.ssa), "");
1779 }
1780
1781 static void
1782 visit_store_var(struct ac_nir_context *ctx,
1783 nir_intrinsic_instr *instr)
1784 {
1785 LLVMValueRef temp_ptr, value;
1786 int idx = instr->variables[0]->var->data.driver_location;
1787 unsigned comp = instr->variables[0]->var->data.location_frac;
1788 LLVMValueRef src = ac_to_float(&ctx->ac, get_src(ctx, instr->src[0]));
1789 int writemask = instr->const_index[0] << comp;
1790 LLVMValueRef indir_index;
1791 unsigned const_index;
1792 get_deref_offset(ctx, instr->variables[0], false,
1793 NULL, NULL, &const_index, &indir_index);
1794
1795 if (ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src)) == 64) {
1796
1797 src = LLVMBuildBitCast(ctx->ac.builder, src,
1798 LLVMVectorType(ctx->ac.f32, ac_get_llvm_num_components(src) * 2),
1799 "");
1800
1801 writemask = widen_mask(writemask, 2);
1802 }
1803
1804 switch (instr->variables[0]->var->data.mode) {
1805 case nir_var_shader_out:
1806
1807 if (ctx->stage == MESA_SHADER_TESS_CTRL) {
1808 LLVMValueRef vertex_index = NULL;
1809 LLVMValueRef indir_index = NULL;
1810 unsigned const_index = 0;
1811 const unsigned location = instr->variables[0]->var->data.location;
1812 const unsigned driver_location = instr->variables[0]->var->data.driver_location;
1813 const unsigned comp = instr->variables[0]->var->data.location_frac;
1814 const bool is_patch = instr->variables[0]->var->data.patch;
1815 const bool is_compact = instr->variables[0]->var->data.compact;
1816
1817 get_deref_offset(ctx, instr->variables[0],
1818 false, NULL, is_patch ? NULL : &vertex_index,
1819 &const_index, &indir_index);
1820
1821 ctx->abi->store_tcs_outputs(ctx->abi, vertex_index, indir_index,
1822 const_index, location, driver_location,
1823 src, comp, is_patch, is_compact, writemask);
1824 return;
1825 }
1826
1827 for (unsigned chan = 0; chan < 8; chan++) {
1828 int stride = 4;
1829 if (!(writemask & (1 << chan)))
1830 continue;
1831
1832 value = ac_llvm_extract_elem(&ctx->ac, src, chan - comp);
1833
1834 if (instr->variables[0]->var->data.compact)
1835 stride = 1;
1836 if (indir_index) {
1837 unsigned count = glsl_count_attribute_slots(
1838 instr->variables[0]->var->type, false);
1839 count -= chan / 4;
1840 LLVMValueRef tmp_vec = ac_build_gather_values_extended(
1841 &ctx->ac, ctx->abi->outputs + idx + chan, count,
1842 stride, true, true);
1843
1844 tmp_vec = LLVMBuildInsertElement(ctx->ac.builder, tmp_vec,
1845 value, indir_index, "");
1846 build_store_values_extended(&ctx->ac, ctx->abi->outputs + idx + chan,
1847 count, stride, tmp_vec);
1848
1849 } else {
1850 temp_ptr = ctx->abi->outputs[idx + chan + const_index * stride];
1851
1852 LLVMBuildStore(ctx->ac.builder, value, temp_ptr);
1853 }
1854 }
1855 break;
1856 case nir_var_local:
1857 for (unsigned chan = 0; chan < 8; chan++) {
1858 if (!(writemask & (1 << chan)))
1859 continue;
1860
1861 value = ac_llvm_extract_elem(&ctx->ac, src, chan);
1862 if (indir_index) {
1863 unsigned count = glsl_count_attribute_slots(
1864 instr->variables[0]->var->type, false);
1865 count -= chan / 4;
1866 LLVMValueRef tmp_vec = ac_build_gather_values_extended(
1867 &ctx->ac, ctx->locals + idx + chan, count,
1868 4, true, true);
1869
1870 tmp_vec = LLVMBuildInsertElement(ctx->ac.builder, tmp_vec,
1871 value, indir_index, "");
1872 build_store_values_extended(&ctx->ac, ctx->locals + idx + chan,
1873 count, 4, tmp_vec);
1874 } else {
1875 temp_ptr = ctx->locals[idx + chan + const_index * 4];
1876
1877 LLVMBuildStore(ctx->ac.builder, value, temp_ptr);
1878 }
1879 }
1880 break;
1881 case nir_var_shared: {
1882 int writemask = instr->const_index[0];
1883 LLVMValueRef address = build_gep_for_deref(ctx,
1884 instr->variables[0]);
1885 LLVMValueRef val = get_src(ctx, instr->src[0]);
1886 unsigned components =
1887 glsl_get_vector_elements(
1888 nir_deref_tail(&instr->variables[0]->deref)->type);
1889 if (writemask == (1 << components) - 1) {
1890 val = LLVMBuildBitCast(
1891 ctx->ac.builder, val,
1892 LLVMGetElementType(LLVMTypeOf(address)), "");
1893 LLVMBuildStore(ctx->ac.builder, val, address);
1894 } else {
1895 for (unsigned chan = 0; chan < 4; chan++) {
1896 if (!(writemask & (1 << chan)))
1897 continue;
1898 LLVMValueRef ptr =
1899 LLVMBuildStructGEP(ctx->ac.builder,
1900 address, chan, "");
1901 LLVMValueRef src = ac_llvm_extract_elem(&ctx->ac, val,
1902 chan);
1903 src = LLVMBuildBitCast(
1904 ctx->ac.builder, src,
1905 LLVMGetElementType(LLVMTypeOf(ptr)), "");
1906 LLVMBuildStore(ctx->ac.builder, src, ptr);
1907 }
1908 }
1909 break;
1910 }
1911 default:
1912 break;
1913 }
1914 }
1915
1916 static int image_type_to_components_count(enum glsl_sampler_dim dim, bool array)
1917 {
1918 switch (dim) {
1919 case GLSL_SAMPLER_DIM_BUF:
1920 return 1;
1921 case GLSL_SAMPLER_DIM_1D:
1922 return array ? 2 : 1;
1923 case GLSL_SAMPLER_DIM_2D:
1924 return array ? 3 : 2;
1925 case GLSL_SAMPLER_DIM_MS:
1926 return array ? 4 : 3;
1927 case GLSL_SAMPLER_DIM_3D:
1928 case GLSL_SAMPLER_DIM_CUBE:
1929 return 3;
1930 case GLSL_SAMPLER_DIM_RECT:
1931 case GLSL_SAMPLER_DIM_SUBPASS:
1932 return 2;
1933 case GLSL_SAMPLER_DIM_SUBPASS_MS:
1934 return 3;
1935 default:
1936 break;
1937 }
1938 return 0;
1939 }
1940
1941 static bool
1942 glsl_is_array_image(const struct glsl_type *type)
1943 {
1944 const enum glsl_sampler_dim dim = glsl_get_sampler_dim(type);
1945
1946 if (glsl_sampler_type_is_array(type))
1947 return true;
1948
1949 return dim == GLSL_SAMPLER_DIM_CUBE ||
1950 dim == GLSL_SAMPLER_DIM_3D ||
1951 dim == GLSL_SAMPLER_DIM_SUBPASS ||
1952 dim == GLSL_SAMPLER_DIM_SUBPASS_MS;
1953 }
1954
1955
1956 /* Adjust the sample index according to FMASK.
1957 *
1958 * For uncompressed MSAA surfaces, FMASK should return 0x76543210,
1959 * which is the identity mapping. Each nibble says which physical sample
1960 * should be fetched to get that sample.
1961 *
1962 * For example, 0x11111100 means there are only 2 samples stored and
1963 * the second sample covers 3/4 of the pixel. When reading samples 0
1964 * and 1, return physical sample 0 (determined by the first two 0s
1965 * in FMASK), otherwise return physical sample 1.
1966 *
1967 * The sample index should be adjusted as follows:
1968 * sample_index = (fmask >> (sample_index * 4)) & 0xF;
1969 */
1970 static LLVMValueRef adjust_sample_index_using_fmask(struct ac_llvm_context *ctx,
1971 LLVMValueRef coord_x, LLVMValueRef coord_y,
1972 LLVMValueRef coord_z,
1973 LLVMValueRef sample_index,
1974 LLVMValueRef fmask_desc_ptr)
1975 {
1976 LLVMValueRef fmask_load_address[4];
1977 LLVMValueRef res;
1978
1979 fmask_load_address[0] = coord_x;
1980 fmask_load_address[1] = coord_y;
1981 if (coord_z) {
1982 fmask_load_address[2] = coord_z;
1983 fmask_load_address[3] = LLVMGetUndef(ctx->i32);
1984 }
1985
1986 struct ac_image_args args = {0};
1987
1988 args.opcode = ac_image_load;
1989 args.da = coord_z ? true : false;
1990 args.resource = fmask_desc_ptr;
1991 args.dmask = 0xf;
1992 args.addr = ac_build_gather_values(ctx, fmask_load_address, coord_z ? 4 : 2);
1993
1994 res = ac_build_image_opcode(ctx, &args);
1995
1996 res = ac_to_integer(ctx, res);
1997 LLVMValueRef four = LLVMConstInt(ctx->i32, 4, false);
1998 LLVMValueRef F = LLVMConstInt(ctx->i32, 0xf, false);
1999
2000 LLVMValueRef fmask = LLVMBuildExtractElement(ctx->builder,
2001 res,
2002 ctx->i32_0, "");
2003
2004 LLVMValueRef sample_index4 =
2005 LLVMBuildMul(ctx->builder, sample_index, four, "");
2006 LLVMValueRef shifted_fmask =
2007 LLVMBuildLShr(ctx->builder, fmask, sample_index4, "");
2008 LLVMValueRef final_sample =
2009 LLVMBuildAnd(ctx->builder, shifted_fmask, F, "");
2010
2011 /* Don't rewrite the sample index if WORD1.DATA_FORMAT of the FMASK
2012 * resource descriptor is 0 (invalid),
2013 */
2014 LLVMValueRef fmask_desc =
2015 LLVMBuildBitCast(ctx->builder, fmask_desc_ptr,
2016 ctx->v8i32, "");
2017
2018 LLVMValueRef fmask_word1 =
2019 LLVMBuildExtractElement(ctx->builder, fmask_desc,
2020 ctx->i32_1, "");
2021
2022 LLVMValueRef word1_is_nonzero =
2023 LLVMBuildICmp(ctx->builder, LLVMIntNE,
2024 fmask_word1, ctx->i32_0, "");
2025
2026 /* Replace the MSAA sample index. */
2027 sample_index =
2028 LLVMBuildSelect(ctx->builder, word1_is_nonzero,
2029 final_sample, sample_index, "");
2030 return sample_index;
2031 }
2032
2033 static LLVMValueRef get_image_coords(struct ac_nir_context *ctx,
2034 const nir_intrinsic_instr *instr)
2035 {
2036 const struct glsl_type *type = glsl_without_array(instr->variables[0]->var->type);
2037
2038 LLVMValueRef src0 = get_src(ctx, instr->src[0]);
2039 LLVMValueRef coords[4];
2040 LLVMValueRef masks[] = {
2041 LLVMConstInt(ctx->ac.i32, 0, false), LLVMConstInt(ctx->ac.i32, 1, false),
2042 LLVMConstInt(ctx->ac.i32, 2, false), LLVMConstInt(ctx->ac.i32, 3, false),
2043 };
2044 LLVMValueRef res;
2045 LLVMValueRef sample_index = ac_llvm_extract_elem(&ctx->ac, get_src(ctx, instr->src[1]), 0);
2046
2047 int count;
2048 enum glsl_sampler_dim dim = glsl_get_sampler_dim(type);
2049 bool is_array = glsl_sampler_type_is_array(type);
2050 bool add_frag_pos = (dim == GLSL_SAMPLER_DIM_SUBPASS ||
2051 dim == GLSL_SAMPLER_DIM_SUBPASS_MS);
2052 bool is_ms = (dim == GLSL_SAMPLER_DIM_MS ||
2053 dim == GLSL_SAMPLER_DIM_SUBPASS_MS);
2054 bool gfx9_1d = ctx->ac.chip_class >= GFX9 && dim == GLSL_SAMPLER_DIM_1D;
2055 count = image_type_to_components_count(dim, is_array);
2056
2057 if (is_ms) {
2058 LLVMValueRef fmask_load_address[3];
2059 int chan;
2060
2061 fmask_load_address[0] = LLVMBuildExtractElement(ctx->ac.builder, src0, masks[0], "");
2062 fmask_load_address[1] = LLVMBuildExtractElement(ctx->ac.builder, src0, masks[1], "");
2063 if (is_array)
2064 fmask_load_address[2] = LLVMBuildExtractElement(ctx->ac.builder, src0, masks[2], "");
2065 else
2066 fmask_load_address[2] = NULL;
2067 if (add_frag_pos) {
2068 for (chan = 0; chan < 2; ++chan)
2069 fmask_load_address[chan] =
2070 LLVMBuildAdd(ctx->ac.builder, fmask_load_address[chan],
2071 LLVMBuildFPToUI(ctx->ac.builder, ctx->abi->frag_pos[chan],
2072 ctx->ac.i32, ""), "");
2073 fmask_load_address[2] = ac_to_integer(&ctx->ac, ctx->abi->inputs[radeon_llvm_reg_index_soa(VARYING_SLOT_LAYER, 0)]);
2074 }
2075 sample_index = adjust_sample_index_using_fmask(&ctx->ac,
2076 fmask_load_address[0],
2077 fmask_load_address[1],
2078 fmask_load_address[2],
2079 sample_index,
2080 get_sampler_desc(ctx, instr->variables[0], AC_DESC_FMASK, NULL, true, false));
2081 }
2082 if (count == 1 && !gfx9_1d) {
2083 if (instr->src[0].ssa->num_components)
2084 res = LLVMBuildExtractElement(ctx->ac.builder, src0, masks[0], "");
2085 else
2086 res = src0;
2087 } else {
2088 int chan;
2089 if (is_ms)
2090 count--;
2091 for (chan = 0; chan < count; ++chan) {
2092 coords[chan] = ac_llvm_extract_elem(&ctx->ac, src0, chan);
2093 }
2094 if (add_frag_pos) {
2095 for (chan = 0; chan < 2; ++chan)
2096 coords[chan] = LLVMBuildAdd(ctx->ac.builder, coords[chan], LLVMBuildFPToUI(ctx->ac.builder, ctx->abi->frag_pos[chan],
2097 ctx->ac.i32, ""), "");
2098 coords[2] = ac_to_integer(&ctx->ac, ctx->abi->inputs[radeon_llvm_reg_index_soa(VARYING_SLOT_LAYER, 0)]);
2099 count++;
2100 }
2101
2102 if (gfx9_1d) {
2103 if (is_array) {
2104 coords[2] = coords[1];
2105 coords[1] = ctx->ac.i32_0;
2106 } else
2107 coords[1] = ctx->ac.i32_0;
2108 count++;
2109 }
2110
2111 if (is_ms) {
2112 coords[count] = sample_index;
2113 count++;
2114 }
2115
2116 if (count == 3) {
2117 coords[3] = LLVMGetUndef(ctx->ac.i32);
2118 count = 4;
2119 }
2120 res = ac_build_gather_values(&ctx->ac, coords, count);
2121 }
2122 return res;
2123 }
2124
2125 static LLVMValueRef visit_image_load(struct ac_nir_context *ctx,
2126 const nir_intrinsic_instr *instr)
2127 {
2128 LLVMValueRef params[7];
2129 LLVMValueRef res;
2130 char intrinsic_name[64];
2131 const nir_variable *var = instr->variables[0]->var;
2132 const struct glsl_type *type = var->type;
2133
2134 if(instr->variables[0]->deref.child)
2135 type = instr->variables[0]->deref.child->type;
2136
2137 type = glsl_without_array(type);
2138
2139 const enum glsl_sampler_dim dim = glsl_get_sampler_dim(type);
2140 if (dim == GLSL_SAMPLER_DIM_BUF) {
2141 unsigned mask = nir_ssa_def_components_read(&instr->dest.ssa);
2142 unsigned num_channels = util_last_bit(mask);
2143 LLVMValueRef rsrc, vindex;
2144
2145 rsrc = get_sampler_desc(ctx, instr->variables[0], AC_DESC_BUFFER, NULL, true, false);
2146 vindex = LLVMBuildExtractElement(ctx->ac.builder, get_src(ctx, instr->src[0]),
2147 ctx->ac.i32_0, "");
2148
2149 /* TODO: set "glc" and "can_speculate" when OpenGL needs it. */
2150 res = ac_build_buffer_load_format(&ctx->ac, rsrc, vindex,
2151 ctx->ac.i32_0, num_channels,
2152 false, false);
2153 res = ac_build_expand_to_vec4(&ctx->ac, res, num_channels);
2154
2155 res = ac_trim_vector(&ctx->ac, res, instr->dest.ssa.num_components);
2156 res = ac_to_integer(&ctx->ac, res);
2157 } else {
2158 LLVMValueRef da = glsl_is_array_image(type) ? ctx->ac.i1true : ctx->ac.i1false;
2159 LLVMValueRef slc = ctx->ac.i1false;
2160
2161 params[0] = get_image_coords(ctx, instr);
2162 params[1] = get_sampler_desc(ctx, instr->variables[0], AC_DESC_IMAGE, NULL, true, false);
2163 params[2] = LLVMConstInt(ctx->ac.i32, 15, false); /* dmask */
2164 params[3] = (var->data.image._volatile || var->data.image.coherent) ?
2165 ctx->ac.i1true : ctx->ac.i1false;
2166 params[4] = slc;
2167 params[5] = ctx->ac.i1false;
2168 params[6] = da;
2169
2170 ac_get_image_intr_name("llvm.amdgcn.image.load",
2171 ctx->ac.v4f32, /* vdata */
2172 LLVMTypeOf(params[0]), /* coords */
2173 LLVMTypeOf(params[1]), /* rsrc */
2174 intrinsic_name, sizeof(intrinsic_name));
2175
2176 res = ac_build_intrinsic(&ctx->ac, intrinsic_name, ctx->ac.v4f32,
2177 params, 7, AC_FUNC_ATTR_READONLY);
2178 }
2179 return ac_to_integer(&ctx->ac, res);
2180 }
2181
2182 static void visit_image_store(struct ac_nir_context *ctx,
2183 nir_intrinsic_instr *instr)
2184 {
2185 LLVMValueRef params[8];
2186 char intrinsic_name[64];
2187 const nir_variable *var = instr->variables[0]->var;
2188 const struct glsl_type *type = glsl_without_array(var->type);
2189 const enum glsl_sampler_dim dim = glsl_get_sampler_dim(type);
2190 LLVMValueRef glc = ctx->ac.i1false;
2191 bool force_glc = ctx->ac.chip_class == SI;
2192 if (force_glc)
2193 glc = ctx->ac.i1true;
2194
2195 if (dim == GLSL_SAMPLER_DIM_BUF) {
2196 params[0] = ac_to_float(&ctx->ac, get_src(ctx, instr->src[2])); /* data */
2197 params[1] = get_sampler_desc(ctx, instr->variables[0], AC_DESC_BUFFER, NULL, true, true);
2198 params[2] = LLVMBuildExtractElement(ctx->ac.builder, get_src(ctx, instr->src[0]),
2199 ctx->ac.i32_0, ""); /* vindex */
2200 params[3] = ctx->ac.i32_0; /* voffset */
2201 params[4] = glc; /* glc */
2202 params[5] = ctx->ac.i1false; /* slc */
2203 ac_build_intrinsic(&ctx->ac, "llvm.amdgcn.buffer.store.format.v4f32", ctx->ac.voidt,
2204 params, 6, 0);
2205 } else {
2206 LLVMValueRef da = glsl_is_array_image(type) ? ctx->ac.i1true : ctx->ac.i1false;
2207 LLVMValueRef slc = ctx->ac.i1false;
2208
2209 params[0] = ac_to_float(&ctx->ac, get_src(ctx, instr->src[2]));
2210 params[1] = get_image_coords(ctx, instr); /* coords */
2211 params[2] = get_sampler_desc(ctx, instr->variables[0], AC_DESC_IMAGE, NULL, true, true);
2212 params[3] = LLVMConstInt(ctx->ac.i32, 15, false); /* dmask */
2213 params[4] = (force_glc || var->data.image._volatile || var->data.image.coherent) ?
2214 ctx->ac.i1true : ctx->ac.i1false;
2215 params[5] = slc;
2216 params[6] = ctx->ac.i1false;
2217 params[7] = da;
2218
2219 ac_get_image_intr_name("llvm.amdgcn.image.store",
2220 LLVMTypeOf(params[0]), /* vdata */
2221 LLVMTypeOf(params[1]), /* coords */
2222 LLVMTypeOf(params[2]), /* rsrc */
2223 intrinsic_name, sizeof(intrinsic_name));
2224
2225 ac_build_intrinsic(&ctx->ac, intrinsic_name, ctx->ac.voidt,
2226 params, 8, 0);
2227 }
2228
2229 }
2230
2231 static LLVMValueRef visit_image_atomic(struct ac_nir_context *ctx,
2232 const nir_intrinsic_instr *instr)
2233 {
2234 LLVMValueRef params[7];
2235 int param_count = 0;
2236 const nir_variable *var = instr->variables[0]->var;
2237
2238 const char *atomic_name;
2239 char intrinsic_name[41];
2240 const struct glsl_type *type = glsl_without_array(var->type);
2241 MAYBE_UNUSED int length;
2242
2243 bool is_unsigned = glsl_get_sampler_result_type(type) == GLSL_TYPE_UINT;
2244
2245 switch (instr->intrinsic) {
2246 case nir_intrinsic_image_atomic_add:
2247 atomic_name = "add";
2248 break;
2249 case nir_intrinsic_image_atomic_min:
2250 atomic_name = is_unsigned ? "umin" : "smin";
2251 break;
2252 case nir_intrinsic_image_atomic_max:
2253 atomic_name = is_unsigned ? "umax" : "smax";
2254 break;
2255 case nir_intrinsic_image_atomic_and:
2256 atomic_name = "and";
2257 break;
2258 case nir_intrinsic_image_atomic_or:
2259 atomic_name = "or";
2260 break;
2261 case nir_intrinsic_image_atomic_xor:
2262 atomic_name = "xor";
2263 break;
2264 case nir_intrinsic_image_atomic_exchange:
2265 atomic_name = "swap";
2266 break;
2267 case nir_intrinsic_image_atomic_comp_swap:
2268 atomic_name = "cmpswap";
2269 break;
2270 default:
2271 abort();
2272 }
2273
2274 if (instr->intrinsic == nir_intrinsic_image_atomic_comp_swap)
2275 params[param_count++] = get_src(ctx, instr->src[3]);
2276 params[param_count++] = get_src(ctx, instr->src[2]);
2277
2278 if (glsl_get_sampler_dim(type) == GLSL_SAMPLER_DIM_BUF) {
2279 params[param_count++] = get_sampler_desc(ctx, instr->variables[0], AC_DESC_BUFFER,
2280 NULL, true, true);
2281 params[param_count++] = LLVMBuildExtractElement(ctx->ac.builder, get_src(ctx, instr->src[0]),
2282 ctx->ac.i32_0, ""); /* vindex */
2283 params[param_count++] = ctx->ac.i32_0; /* voffset */
2284 params[param_count++] = ctx->ac.i1false; /* slc */
2285
2286 length = snprintf(intrinsic_name, sizeof(intrinsic_name),
2287 "llvm.amdgcn.buffer.atomic.%s", atomic_name);
2288 } else {
2289 char coords_type[8];
2290
2291 LLVMValueRef coords = params[param_count++] = get_image_coords(ctx, instr);
2292 params[param_count++] = get_sampler_desc(ctx, instr->variables[0], AC_DESC_IMAGE,
2293 NULL, true, true);
2294 params[param_count++] = ctx->ac.i1false; /* r128 */
2295 params[param_count++] = glsl_is_array_image(type) ? ctx->ac.i1true : ctx->ac.i1false; /* da */
2296 params[param_count++] = ctx->ac.i1false; /* slc */
2297
2298 build_int_type_name(LLVMTypeOf(coords),
2299 coords_type, sizeof(coords_type));
2300
2301 length = snprintf(intrinsic_name, sizeof(intrinsic_name),
2302 "llvm.amdgcn.image.atomic.%s.%s", atomic_name, coords_type);
2303 }
2304
2305 assert(length < sizeof(intrinsic_name));
2306 return ac_build_intrinsic(&ctx->ac, intrinsic_name, ctx->ac.i32, params, param_count, 0);
2307 }
2308
2309 static LLVMValueRef visit_image_samples(struct ac_nir_context *ctx,
2310 const nir_intrinsic_instr *instr)
2311 {
2312 const nir_variable *var = instr->variables[0]->var;
2313 const struct glsl_type *type = glsl_without_array(var->type);
2314
2315 struct ac_image_args args = { 0 };
2316 args.da = glsl_is_array_image(type);
2317 args.dmask = 0xf;
2318 args.resource = get_sampler_desc(ctx, instr->variables[0],
2319 AC_DESC_IMAGE, NULL, true, false);
2320 args.opcode = ac_image_get_resinfo;
2321 args.addr = ctx->ac.i32_0;
2322
2323 return ac_build_image_opcode(&ctx->ac, &args);
2324 }
2325
2326 static LLVMValueRef visit_image_size(struct ac_nir_context *ctx,
2327 const nir_intrinsic_instr *instr)
2328 {
2329 LLVMValueRef res;
2330 const nir_variable *var = instr->variables[0]->var;
2331 const struct glsl_type *type = glsl_without_array(var->type);
2332
2333 if (glsl_get_sampler_dim(type) == GLSL_SAMPLER_DIM_BUF)
2334 return get_buffer_size(ctx,
2335 get_sampler_desc(ctx, instr->variables[0],
2336 AC_DESC_BUFFER, NULL, true, false), true);
2337
2338 struct ac_image_args args = { 0 };
2339
2340 args.da = glsl_is_array_image(type);
2341 args.dmask = 0xf;
2342 args.resource = get_sampler_desc(ctx, instr->variables[0], AC_DESC_IMAGE, NULL, true, false);
2343 args.opcode = ac_image_get_resinfo;
2344 args.addr = ctx->ac.i32_0;
2345
2346 res = ac_build_image_opcode(&ctx->ac, &args);
2347
2348 LLVMValueRef two = LLVMConstInt(ctx->ac.i32, 2, false);
2349
2350 if (glsl_get_sampler_dim(type) == GLSL_SAMPLER_DIM_CUBE &&
2351 glsl_sampler_type_is_array(type)) {
2352 LLVMValueRef six = LLVMConstInt(ctx->ac.i32, 6, false);
2353 LLVMValueRef z = LLVMBuildExtractElement(ctx->ac.builder, res, two, "");
2354 z = LLVMBuildSDiv(ctx->ac.builder, z, six, "");
2355 res = LLVMBuildInsertElement(ctx->ac.builder, res, z, two, "");
2356 }
2357 if (ctx->ac.chip_class >= GFX9 &&
2358 glsl_get_sampler_dim(type) == GLSL_SAMPLER_DIM_1D &&
2359 glsl_sampler_type_is_array(type)) {
2360 LLVMValueRef layers = LLVMBuildExtractElement(ctx->ac.builder, res, two, "");
2361 res = LLVMBuildInsertElement(ctx->ac.builder, res, layers,
2362 ctx->ac.i32_1, "");
2363
2364 }
2365 return res;
2366 }
2367
2368 #define NOOP_WAITCNT 0xf7f
2369 #define LGKM_CNT 0x07f
2370 #define VM_CNT 0xf70
2371
2372 static void emit_membar(struct ac_llvm_context *ac,
2373 const nir_intrinsic_instr *instr)
2374 {
2375 unsigned waitcnt = NOOP_WAITCNT;
2376
2377 switch (instr->intrinsic) {
2378 case nir_intrinsic_memory_barrier:
2379 case nir_intrinsic_group_memory_barrier:
2380 waitcnt &= VM_CNT & LGKM_CNT;
2381 break;
2382 case nir_intrinsic_memory_barrier_atomic_counter:
2383 case nir_intrinsic_memory_barrier_buffer:
2384 case nir_intrinsic_memory_barrier_image:
2385 waitcnt &= VM_CNT;
2386 break;
2387 case nir_intrinsic_memory_barrier_shared:
2388 waitcnt &= LGKM_CNT;
2389 break;
2390 default:
2391 break;
2392 }
2393 if (waitcnt != NOOP_WAITCNT)
2394 ac_build_waitcnt(ac, waitcnt);
2395 }
2396
2397 void ac_emit_barrier(struct ac_llvm_context *ac, gl_shader_stage stage)
2398 {
2399 /* SI only (thanks to a hw bug workaround):
2400 * The real barrier instruction isn’t needed, because an entire patch
2401 * always fits into a single wave.
2402 */
2403 if (ac->chip_class == SI && stage == MESA_SHADER_TESS_CTRL) {
2404 ac_build_waitcnt(ac, LGKM_CNT & VM_CNT);
2405 return;
2406 }
2407 ac_build_intrinsic(ac, "llvm.amdgcn.s.barrier",
2408 ac->voidt, NULL, 0, AC_FUNC_ATTR_CONVERGENT);
2409 }
2410
2411 static void emit_discard(struct ac_nir_context *ctx,
2412 const nir_intrinsic_instr *instr)
2413 {
2414 LLVMValueRef cond;
2415
2416 if (instr->intrinsic == nir_intrinsic_discard_if) {
2417 cond = LLVMBuildICmp(ctx->ac.builder, LLVMIntEQ,
2418 get_src(ctx, instr->src[0]),
2419 ctx->ac.i32_0, "");
2420 } else {
2421 assert(instr->intrinsic == nir_intrinsic_discard);
2422 cond = LLVMConstInt(ctx->ac.i1, false, 0);
2423 }
2424
2425 ctx->abi->emit_kill(ctx->abi, cond);
2426 }
2427
2428 static LLVMValueRef
2429 visit_load_helper_invocation(struct ac_nir_context *ctx)
2430 {
2431 LLVMValueRef result = ac_build_intrinsic(&ctx->ac,
2432 "llvm.amdgcn.ps.live",
2433 ctx->ac.i1, NULL, 0,
2434 AC_FUNC_ATTR_READNONE);
2435 result = LLVMBuildNot(ctx->ac.builder, result, "");
2436 return LLVMBuildSExt(ctx->ac.builder, result, ctx->ac.i32, "");
2437 }
2438
2439 static LLVMValueRef
2440 visit_load_local_invocation_index(struct ac_nir_context *ctx)
2441 {
2442 LLVMValueRef result;
2443 LLVMValueRef thread_id = ac_get_thread_id(&ctx->ac);
2444 result = LLVMBuildAnd(ctx->ac.builder, ctx->abi->tg_size,
2445 LLVMConstInt(ctx->ac.i32, 0xfc0, false), "");
2446
2447 return LLVMBuildAdd(ctx->ac.builder, result, thread_id, "");
2448 }
2449
2450 static LLVMValueRef
2451 visit_load_subgroup_id(struct ac_nir_context *ctx)
2452 {
2453 if (ctx->stage == MESA_SHADER_COMPUTE) {
2454 LLVMValueRef result;
2455 result = LLVMBuildAnd(ctx->ac.builder, ctx->abi->tg_size,
2456 LLVMConstInt(ctx->ac.i32, 0xfc0, false), "");
2457 return LLVMBuildLShr(ctx->ac.builder, result, LLVMConstInt(ctx->ac.i32, 6, false), "");
2458 } else {
2459 return LLVMConstInt(ctx->ac.i32, 0, false);
2460 }
2461 }
2462
2463 static LLVMValueRef
2464 visit_load_num_subgroups(struct ac_nir_context *ctx)
2465 {
2466 if (ctx->stage == MESA_SHADER_COMPUTE) {
2467 return LLVMBuildAnd(ctx->ac.builder, ctx->abi->tg_size,
2468 LLVMConstInt(ctx->ac.i32, 0x3f, false), "");
2469 } else {
2470 return LLVMConstInt(ctx->ac.i32, 1, false);
2471 }
2472 }
2473
2474 static LLVMValueRef
2475 visit_first_invocation(struct ac_nir_context *ctx)
2476 {
2477 LLVMValueRef active_set = ac_build_ballot(&ctx->ac, ctx->ac.i32_1);
2478
2479 /* The second argument is whether cttz(0) should be defined, but we do not care. */
2480 LLVMValueRef args[] = {active_set, LLVMConstInt(ctx->ac.i1, 0, false)};
2481 LLVMValueRef result = ac_build_intrinsic(&ctx->ac,
2482 "llvm.cttz.i64",
2483 ctx->ac.i64, args, 2,
2484 AC_FUNC_ATTR_NOUNWIND |
2485 AC_FUNC_ATTR_READNONE);
2486
2487 return LLVMBuildTrunc(ctx->ac.builder, result, ctx->ac.i32, "");
2488 }
2489
2490 static LLVMValueRef
2491 visit_load_shared(struct ac_nir_context *ctx,
2492 const nir_intrinsic_instr *instr)
2493 {
2494 LLVMValueRef values[4], derived_ptr, index, ret;
2495
2496 LLVMValueRef ptr = get_memory_ptr(ctx, instr->src[0]);
2497
2498 for (int chan = 0; chan < instr->num_components; chan++) {
2499 index = LLVMConstInt(ctx->ac.i32, chan, 0);
2500 derived_ptr = LLVMBuildGEP(ctx->ac.builder, ptr, &index, 1, "");
2501 values[chan] = LLVMBuildLoad(ctx->ac.builder, derived_ptr, "");
2502 }
2503
2504 ret = ac_build_gather_values(&ctx->ac, values, instr->num_components);
2505 return LLVMBuildBitCast(ctx->ac.builder, ret, get_def_type(ctx, &instr->dest.ssa), "");
2506 }
2507
2508 static void
2509 visit_store_shared(struct ac_nir_context *ctx,
2510 const nir_intrinsic_instr *instr)
2511 {
2512 LLVMValueRef derived_ptr, data,index;
2513 LLVMBuilderRef builder = ctx->ac.builder;
2514
2515 LLVMValueRef ptr = get_memory_ptr(ctx, instr->src[1]);
2516 LLVMValueRef src = get_src(ctx, instr->src[0]);
2517
2518 int writemask = nir_intrinsic_write_mask(instr);
2519 for (int chan = 0; chan < 4; chan++) {
2520 if (!(writemask & (1 << chan))) {
2521 continue;
2522 }
2523 data = ac_llvm_extract_elem(&ctx->ac, src, chan);
2524 index = LLVMConstInt(ctx->ac.i32, chan, 0);
2525 derived_ptr = LLVMBuildGEP(builder, ptr, &index, 1, "");
2526 LLVMBuildStore(builder, data, derived_ptr);
2527 }
2528 }
2529
2530 static LLVMValueRef visit_var_atomic(struct ac_nir_context *ctx,
2531 const nir_intrinsic_instr *instr,
2532 LLVMValueRef ptr, int src_idx)
2533 {
2534 LLVMValueRef result;
2535 LLVMValueRef src = get_src(ctx, instr->src[src_idx]);
2536
2537 if (instr->intrinsic == nir_intrinsic_var_atomic_comp_swap ||
2538 instr->intrinsic == nir_intrinsic_shared_atomic_comp_swap) {
2539 LLVMValueRef src1 = get_src(ctx, instr->src[src_idx + 1]);
2540 result = LLVMBuildAtomicCmpXchg(ctx->ac.builder,
2541 ptr, src, src1,
2542 LLVMAtomicOrderingSequentiallyConsistent,
2543 LLVMAtomicOrderingSequentiallyConsistent,
2544 false);
2545 } else {
2546 LLVMAtomicRMWBinOp op;
2547 switch (instr->intrinsic) {
2548 case nir_intrinsic_var_atomic_add:
2549 case nir_intrinsic_shared_atomic_add:
2550 op = LLVMAtomicRMWBinOpAdd;
2551 break;
2552 case nir_intrinsic_var_atomic_umin:
2553 case nir_intrinsic_shared_atomic_umin:
2554 op = LLVMAtomicRMWBinOpUMin;
2555 break;
2556 case nir_intrinsic_var_atomic_umax:
2557 case nir_intrinsic_shared_atomic_umax:
2558 op = LLVMAtomicRMWBinOpUMax;
2559 break;
2560 case nir_intrinsic_var_atomic_imin:
2561 case nir_intrinsic_shared_atomic_imin:
2562 op = LLVMAtomicRMWBinOpMin;
2563 break;
2564 case nir_intrinsic_var_atomic_imax:
2565 case nir_intrinsic_shared_atomic_imax:
2566 op = LLVMAtomicRMWBinOpMax;
2567 break;
2568 case nir_intrinsic_var_atomic_and:
2569 case nir_intrinsic_shared_atomic_and:
2570 op = LLVMAtomicRMWBinOpAnd;
2571 break;
2572 case nir_intrinsic_var_atomic_or:
2573 case nir_intrinsic_shared_atomic_or:
2574 op = LLVMAtomicRMWBinOpOr;
2575 break;
2576 case nir_intrinsic_var_atomic_xor:
2577 case nir_intrinsic_shared_atomic_xor:
2578 op = LLVMAtomicRMWBinOpXor;
2579 break;
2580 case nir_intrinsic_var_atomic_exchange:
2581 case nir_intrinsic_shared_atomic_exchange:
2582 op = LLVMAtomicRMWBinOpXchg;
2583 break;
2584 default:
2585 return NULL;
2586 }
2587
2588 result = LLVMBuildAtomicRMW(ctx->ac.builder, op, ptr, ac_to_integer(&ctx->ac, src),
2589 LLVMAtomicOrderingSequentiallyConsistent,
2590 false);
2591 }
2592 return result;
2593 }
2594
2595 static LLVMValueRef load_sample_pos(struct ac_nir_context *ctx)
2596 {
2597 LLVMValueRef values[2];
2598 LLVMValueRef pos[2];
2599
2600 pos[0] = ac_to_float(&ctx->ac, ctx->abi->frag_pos[0]);
2601 pos[1] = ac_to_float(&ctx->ac, ctx->abi->frag_pos[1]);
2602
2603 values[0] = ac_build_fract(&ctx->ac, pos[0], 32);
2604 values[1] = ac_build_fract(&ctx->ac, pos[1], 32);
2605 return ac_build_gather_values(&ctx->ac, values, 2);
2606 }
2607
2608 static LLVMValueRef visit_interp(struct ac_nir_context *ctx,
2609 const nir_intrinsic_instr *instr)
2610 {
2611 LLVMValueRef result[4];
2612 LLVMValueRef interp_param, attr_number;
2613 unsigned location;
2614 unsigned chan;
2615 LLVMValueRef src_c0 = NULL;
2616 LLVMValueRef src_c1 = NULL;
2617 LLVMValueRef src0 = NULL;
2618 int input_index = instr->variables[0]->var->data.location - VARYING_SLOT_VAR0;
2619 switch (instr->intrinsic) {
2620 case nir_intrinsic_interp_var_at_centroid:
2621 location = INTERP_CENTROID;
2622 break;
2623 case nir_intrinsic_interp_var_at_sample:
2624 case nir_intrinsic_interp_var_at_offset:
2625 location = INTERP_CENTER;
2626 src0 = get_src(ctx, instr->src[0]);
2627 break;
2628 default:
2629 break;
2630 }
2631
2632 if (instr->intrinsic == nir_intrinsic_interp_var_at_offset) {
2633 src_c0 = ac_to_float(&ctx->ac, LLVMBuildExtractElement(ctx->ac.builder, src0, ctx->ac.i32_0, ""));
2634 src_c1 = ac_to_float(&ctx->ac, LLVMBuildExtractElement(ctx->ac.builder, src0, ctx->ac.i32_1, ""));
2635 } else if (instr->intrinsic == nir_intrinsic_interp_var_at_sample) {
2636 LLVMValueRef sample_position;
2637 LLVMValueRef halfval = LLVMConstReal(ctx->ac.f32, 0.5f);
2638
2639 /* fetch sample ID */
2640 sample_position = ctx->abi->load_sample_position(ctx->abi, src0);
2641
2642 src_c0 = LLVMBuildExtractElement(ctx->ac.builder, sample_position, ctx->ac.i32_0, "");
2643 src_c0 = LLVMBuildFSub(ctx->ac.builder, src_c0, halfval, "");
2644 src_c1 = LLVMBuildExtractElement(ctx->ac.builder, sample_position, ctx->ac.i32_1, "");
2645 src_c1 = LLVMBuildFSub(ctx->ac.builder, src_c1, halfval, "");
2646 }
2647 interp_param = ctx->abi->lookup_interp_param(ctx->abi, instr->variables[0]->var->data.interpolation, location);
2648 attr_number = LLVMConstInt(ctx->ac.i32, input_index, false);
2649
2650 if (location == INTERP_CENTER) {
2651 LLVMValueRef ij_out[2];
2652 LLVMValueRef ddxy_out = emit_ddxy_interp(ctx, interp_param);
2653
2654 /*
2655 * take the I then J parameters, and the DDX/Y for it, and
2656 * calculate the IJ inputs for the interpolator.
2657 * temp1 = ddx * offset/sample.x + I;
2658 * interp_param.I = ddy * offset/sample.y + temp1;
2659 * temp1 = ddx * offset/sample.x + J;
2660 * interp_param.J = ddy * offset/sample.y + temp1;
2661 */
2662 for (unsigned i = 0; i < 2; i++) {
2663 LLVMValueRef ix_ll = LLVMConstInt(ctx->ac.i32, i, false);
2664 LLVMValueRef iy_ll = LLVMConstInt(ctx->ac.i32, i + 2, false);
2665 LLVMValueRef ddx_el = LLVMBuildExtractElement(ctx->ac.builder,
2666 ddxy_out, ix_ll, "");
2667 LLVMValueRef ddy_el = LLVMBuildExtractElement(ctx->ac.builder,
2668 ddxy_out, iy_ll, "");
2669 LLVMValueRef interp_el = LLVMBuildExtractElement(ctx->ac.builder,
2670 interp_param, ix_ll, "");
2671 LLVMValueRef temp1, temp2;
2672
2673 interp_el = LLVMBuildBitCast(ctx->ac.builder, interp_el,
2674 ctx->ac.f32, "");
2675
2676 temp1 = LLVMBuildFMul(ctx->ac.builder, ddx_el, src_c0, "");
2677 temp1 = LLVMBuildFAdd(ctx->ac.builder, temp1, interp_el, "");
2678
2679 temp2 = LLVMBuildFMul(ctx->ac.builder, ddy_el, src_c1, "");
2680 temp2 = LLVMBuildFAdd(ctx->ac.builder, temp2, temp1, "");
2681
2682 ij_out[i] = LLVMBuildBitCast(ctx->ac.builder,
2683 temp2, ctx->ac.i32, "");
2684 }
2685 interp_param = ac_build_gather_values(&ctx->ac, ij_out, 2);
2686
2687 }
2688
2689 for (chan = 0; chan < 4; chan++) {
2690 LLVMValueRef llvm_chan = LLVMConstInt(ctx->ac.i32, chan, false);
2691
2692 if (interp_param) {
2693 interp_param = LLVMBuildBitCast(ctx->ac.builder,
2694 interp_param, ctx->ac.v2f32, "");
2695 LLVMValueRef i = LLVMBuildExtractElement(
2696 ctx->ac.builder, interp_param, ctx->ac.i32_0, "");
2697 LLVMValueRef j = LLVMBuildExtractElement(
2698 ctx->ac.builder, interp_param, ctx->ac.i32_1, "");
2699
2700 result[chan] = ac_build_fs_interp(&ctx->ac,
2701 llvm_chan, attr_number,
2702 ctx->abi->prim_mask, i, j);
2703 } else {
2704 result[chan] = ac_build_fs_interp_mov(&ctx->ac,
2705 LLVMConstInt(ctx->ac.i32, 2, false),
2706 llvm_chan, attr_number,
2707 ctx->abi->prim_mask);
2708 }
2709 }
2710 return ac_build_varying_gather_values(&ctx->ac, result, instr->num_components,
2711 instr->variables[0]->var->data.location_frac);
2712 }
2713
2714 static void visit_intrinsic(struct ac_nir_context *ctx,
2715 nir_intrinsic_instr *instr)
2716 {
2717 LLVMValueRef result = NULL;
2718
2719 switch (instr->intrinsic) {
2720 case nir_intrinsic_ballot:
2721 result = ac_build_ballot(&ctx->ac, get_src(ctx, instr->src[0]));
2722 break;
2723 case nir_intrinsic_read_invocation:
2724 case nir_intrinsic_read_first_invocation: {
2725 LLVMValueRef args[2];
2726
2727 /* Value */
2728 args[0] = get_src(ctx, instr->src[0]);
2729
2730 unsigned num_args;
2731 const char *intr_name;
2732 if (instr->intrinsic == nir_intrinsic_read_invocation) {
2733 num_args = 2;
2734 intr_name = "llvm.amdgcn.readlane";
2735
2736 /* Invocation */
2737 args[1] = get_src(ctx, instr->src[1]);
2738 } else {
2739 num_args = 1;
2740 intr_name = "llvm.amdgcn.readfirstlane";
2741 }
2742
2743 /* We currently have no other way to prevent LLVM from lifting the icmp
2744 * calls to a dominating basic block.
2745 */
2746 ac_build_optimization_barrier(&ctx->ac, &args[0]);
2747
2748 result = ac_build_intrinsic(&ctx->ac, intr_name,
2749 ctx->ac.i32, args, num_args,
2750 AC_FUNC_ATTR_READNONE |
2751 AC_FUNC_ATTR_CONVERGENT);
2752 break;
2753 }
2754 case nir_intrinsic_load_subgroup_invocation:
2755 result = ac_get_thread_id(&ctx->ac);
2756 break;
2757 case nir_intrinsic_load_work_group_id: {
2758 LLVMValueRef values[3];
2759
2760 for (int i = 0; i < 3; i++) {
2761 values[i] = ctx->abi->workgroup_ids[i] ?
2762 ctx->abi->workgroup_ids[i] : ctx->ac.i32_0;
2763 }
2764
2765 result = ac_build_gather_values(&ctx->ac, values, 3);
2766 break;
2767 }
2768 case nir_intrinsic_load_base_vertex: {
2769 result = ctx->abi->load_base_vertex(ctx->abi);
2770 break;
2771 }
2772 case nir_intrinsic_load_local_group_size:
2773 result = ctx->abi->load_local_group_size(ctx->abi);
2774 break;
2775 case nir_intrinsic_load_vertex_id:
2776 result = LLVMBuildAdd(ctx->ac.builder, ctx->abi->vertex_id,
2777 ctx->abi->base_vertex, "");
2778 break;
2779 case nir_intrinsic_load_vertex_id_zero_base: {
2780 result = ctx->abi->vertex_id;
2781 break;
2782 }
2783 case nir_intrinsic_load_local_invocation_id: {
2784 result = ctx->abi->local_invocation_ids;
2785 break;
2786 }
2787 case nir_intrinsic_load_base_instance:
2788 result = ctx->abi->start_instance;
2789 break;
2790 case nir_intrinsic_load_draw_id:
2791 result = ctx->abi->draw_id;
2792 break;
2793 case nir_intrinsic_load_view_index:
2794 result = ctx->abi->view_index;
2795 break;
2796 case nir_intrinsic_load_invocation_id:
2797 if (ctx->stage == MESA_SHADER_TESS_CTRL)
2798 result = ac_unpack_param(&ctx->ac, ctx->abi->tcs_rel_ids, 8, 5);
2799 else
2800 result = ctx->abi->gs_invocation_id;
2801 break;
2802 case nir_intrinsic_load_primitive_id:
2803 if (ctx->stage == MESA_SHADER_GEOMETRY) {
2804 result = ctx->abi->gs_prim_id;
2805 } else if (ctx->stage == MESA_SHADER_TESS_CTRL) {
2806 result = ctx->abi->tcs_patch_id;
2807 } else if (ctx->stage == MESA_SHADER_TESS_EVAL) {
2808 result = ctx->abi->tes_patch_id;
2809 } else
2810 fprintf(stderr, "Unknown primitive id intrinsic: %d", ctx->stage);
2811 break;
2812 case nir_intrinsic_load_sample_id:
2813 result = ac_unpack_param(&ctx->ac, ctx->abi->ancillary, 8, 4);
2814 break;
2815 case nir_intrinsic_load_sample_pos:
2816 result = load_sample_pos(ctx);
2817 break;
2818 case nir_intrinsic_load_sample_mask_in:
2819 result = ctx->abi->load_sample_mask_in(ctx->abi);
2820 break;
2821 case nir_intrinsic_load_frag_coord: {
2822 LLVMValueRef values[4] = {
2823 ctx->abi->frag_pos[0],
2824 ctx->abi->frag_pos[1],
2825 ctx->abi->frag_pos[2],
2826 ac_build_fdiv(&ctx->ac, ctx->ac.f32_1, ctx->abi->frag_pos[3])
2827 };
2828 result = ac_build_gather_values(&ctx->ac, values, 4);
2829 break;
2830 }
2831 case nir_intrinsic_load_front_face:
2832 result = ctx->abi->front_face;
2833 break;
2834 case nir_intrinsic_load_helper_invocation:
2835 result = visit_load_helper_invocation(ctx);
2836 break;
2837 case nir_intrinsic_load_instance_id:
2838 result = ctx->abi->instance_id;
2839 break;
2840 case nir_intrinsic_load_num_work_groups:
2841 result = ctx->abi->num_work_groups;
2842 break;
2843 case nir_intrinsic_load_local_invocation_index:
2844 result = visit_load_local_invocation_index(ctx);
2845 break;
2846 case nir_intrinsic_load_subgroup_id:
2847 result = visit_load_subgroup_id(ctx);
2848 break;
2849 case nir_intrinsic_load_num_subgroups:
2850 result = visit_load_num_subgroups(ctx);
2851 break;
2852 case nir_intrinsic_first_invocation:
2853 result = visit_first_invocation(ctx);
2854 break;
2855 case nir_intrinsic_load_push_constant:
2856 result = visit_load_push_constant(ctx, instr);
2857 break;
2858 case nir_intrinsic_vulkan_resource_index: {
2859 LLVMValueRef index = get_src(ctx, instr->src[0]);
2860 unsigned desc_set = nir_intrinsic_desc_set(instr);
2861 unsigned binding = nir_intrinsic_binding(instr);
2862
2863 result = ctx->abi->load_resource(ctx->abi, index, desc_set,
2864 binding);
2865 break;
2866 }
2867 case nir_intrinsic_vulkan_resource_reindex:
2868 result = visit_vulkan_resource_reindex(ctx, instr);
2869 break;
2870 case nir_intrinsic_store_ssbo:
2871 visit_store_ssbo(ctx, instr);
2872 break;
2873 case nir_intrinsic_load_ssbo:
2874 result = visit_load_buffer(ctx, instr);
2875 break;
2876 case nir_intrinsic_ssbo_atomic_add:
2877 case nir_intrinsic_ssbo_atomic_imin:
2878 case nir_intrinsic_ssbo_atomic_umin:
2879 case nir_intrinsic_ssbo_atomic_imax:
2880 case nir_intrinsic_ssbo_atomic_umax:
2881 case nir_intrinsic_ssbo_atomic_and:
2882 case nir_intrinsic_ssbo_atomic_or:
2883 case nir_intrinsic_ssbo_atomic_xor:
2884 case nir_intrinsic_ssbo_atomic_exchange:
2885 case nir_intrinsic_ssbo_atomic_comp_swap:
2886 result = visit_atomic_ssbo(ctx, instr);
2887 break;
2888 case nir_intrinsic_load_ubo:
2889 result = visit_load_ubo_buffer(ctx, instr);
2890 break;
2891 case nir_intrinsic_get_buffer_size:
2892 result = visit_get_buffer_size(ctx, instr);
2893 break;
2894 case nir_intrinsic_load_var:
2895 result = visit_load_var(ctx, instr);
2896 break;
2897 case nir_intrinsic_store_var:
2898 visit_store_var(ctx, instr);
2899 break;
2900 case nir_intrinsic_load_shared:
2901 result = visit_load_shared(ctx, instr);
2902 break;
2903 case nir_intrinsic_store_shared:
2904 visit_store_shared(ctx, instr);
2905 break;
2906 case nir_intrinsic_image_samples:
2907 result = visit_image_samples(ctx, instr);
2908 break;
2909 case nir_intrinsic_image_load:
2910 result = visit_image_load(ctx, instr);
2911 break;
2912 case nir_intrinsic_image_store:
2913 visit_image_store(ctx, instr);
2914 break;
2915 case nir_intrinsic_image_atomic_add:
2916 case nir_intrinsic_image_atomic_min:
2917 case nir_intrinsic_image_atomic_max:
2918 case nir_intrinsic_image_atomic_and:
2919 case nir_intrinsic_image_atomic_or:
2920 case nir_intrinsic_image_atomic_xor:
2921 case nir_intrinsic_image_atomic_exchange:
2922 case nir_intrinsic_image_atomic_comp_swap:
2923 result = visit_image_atomic(ctx, instr);
2924 break;
2925 case nir_intrinsic_image_size:
2926 result = visit_image_size(ctx, instr);
2927 break;
2928 case nir_intrinsic_shader_clock:
2929 result = ac_build_shader_clock(&ctx->ac);
2930 break;
2931 case nir_intrinsic_discard:
2932 case nir_intrinsic_discard_if:
2933 emit_discard(ctx, instr);
2934 break;
2935 case nir_intrinsic_memory_barrier:
2936 case nir_intrinsic_group_memory_barrier:
2937 case nir_intrinsic_memory_barrier_atomic_counter:
2938 case nir_intrinsic_memory_barrier_buffer:
2939 case nir_intrinsic_memory_barrier_image:
2940 case nir_intrinsic_memory_barrier_shared:
2941 emit_membar(&ctx->ac, instr);
2942 break;
2943 case nir_intrinsic_barrier:
2944 ac_emit_barrier(&ctx->ac, ctx->stage);
2945 break;
2946 case nir_intrinsic_shared_atomic_add:
2947 case nir_intrinsic_shared_atomic_imin:
2948 case nir_intrinsic_shared_atomic_umin:
2949 case nir_intrinsic_shared_atomic_imax:
2950 case nir_intrinsic_shared_atomic_umax:
2951 case nir_intrinsic_shared_atomic_and:
2952 case nir_intrinsic_shared_atomic_or:
2953 case nir_intrinsic_shared_atomic_xor:
2954 case nir_intrinsic_shared_atomic_exchange:
2955 case nir_intrinsic_shared_atomic_comp_swap: {
2956 LLVMValueRef ptr = get_memory_ptr(ctx, instr->src[0]);
2957 result = visit_var_atomic(ctx, instr, ptr, 1);
2958 break;
2959 }
2960 case nir_intrinsic_var_atomic_add:
2961 case nir_intrinsic_var_atomic_imin:
2962 case nir_intrinsic_var_atomic_umin:
2963 case nir_intrinsic_var_atomic_imax:
2964 case nir_intrinsic_var_atomic_umax:
2965 case nir_intrinsic_var_atomic_and:
2966 case nir_intrinsic_var_atomic_or:
2967 case nir_intrinsic_var_atomic_xor:
2968 case nir_intrinsic_var_atomic_exchange:
2969 case nir_intrinsic_var_atomic_comp_swap: {
2970 LLVMValueRef ptr = build_gep_for_deref(ctx, instr->variables[0]);
2971 result = visit_var_atomic(ctx, instr, ptr, 0);
2972 break;
2973 }
2974 case nir_intrinsic_interp_var_at_centroid:
2975 case nir_intrinsic_interp_var_at_sample:
2976 case nir_intrinsic_interp_var_at_offset:
2977 result = visit_interp(ctx, instr);
2978 break;
2979 case nir_intrinsic_emit_vertex:
2980 ctx->abi->emit_vertex(ctx->abi, nir_intrinsic_stream_id(instr), ctx->abi->outputs);
2981 break;
2982 case nir_intrinsic_end_primitive:
2983 ctx->abi->emit_primitive(ctx->abi, nir_intrinsic_stream_id(instr));
2984 break;
2985 case nir_intrinsic_load_tess_coord:
2986 result = ctx->abi->load_tess_coord(ctx->abi);
2987 break;
2988 case nir_intrinsic_load_tess_level_outer:
2989 result = ctx->abi->load_tess_level(ctx->abi, VARYING_SLOT_TESS_LEVEL_OUTER);
2990 break;
2991 case nir_intrinsic_load_tess_level_inner:
2992 result = ctx->abi->load_tess_level(ctx->abi, VARYING_SLOT_TESS_LEVEL_INNER);
2993 break;
2994 case nir_intrinsic_load_patch_vertices_in:
2995 result = ctx->abi->load_patch_vertices_in(ctx->abi);
2996 break;
2997 case nir_intrinsic_vote_all: {
2998 LLVMValueRef tmp = ac_build_vote_all(&ctx->ac, get_src(ctx, instr->src[0]));
2999 result = LLVMBuildSExt(ctx->ac.builder, tmp, ctx->ac.i32, "");
3000 break;
3001 }
3002 case nir_intrinsic_vote_any: {
3003 LLVMValueRef tmp = ac_build_vote_any(&ctx->ac, get_src(ctx, instr->src[0]));
3004 result = LLVMBuildSExt(ctx->ac.builder, tmp, ctx->ac.i32, "");
3005 break;
3006 }
3007 default:
3008 fprintf(stderr, "Unknown intrinsic: ");
3009 nir_print_instr(&instr->instr, stderr);
3010 fprintf(stderr, "\n");
3011 break;
3012 }
3013 if (result) {
3014 _mesa_hash_table_insert(ctx->defs, &instr->dest.ssa, result);
3015 }
3016 }
3017
3018 static LLVMValueRef get_sampler_desc(struct ac_nir_context *ctx,
3019 const nir_deref_var *deref,
3020 enum ac_descriptor_type desc_type,
3021 const nir_tex_instr *tex_instr,
3022 bool image, bool write)
3023 {
3024 LLVMValueRef index = NULL;
3025 unsigned constant_index = 0;
3026 unsigned descriptor_set;
3027 unsigned base_index;
3028
3029 if (!deref) {
3030 assert(tex_instr && !image);
3031 descriptor_set = 0;
3032 base_index = tex_instr->sampler_index;
3033 } else {
3034 const nir_deref *tail = &deref->deref;
3035 while (tail->child) {
3036 const nir_deref_array *child = nir_deref_as_array(tail->child);
3037 unsigned array_size = glsl_get_aoa_size(tail->child->type);
3038
3039 if (!array_size)
3040 array_size = 1;
3041
3042 assert(child->deref_array_type != nir_deref_array_type_wildcard);
3043
3044 if (child->deref_array_type == nir_deref_array_type_indirect) {
3045 LLVMValueRef indirect = get_src(ctx, child->indirect);
3046
3047 indirect = LLVMBuildMul(ctx->ac.builder, indirect,
3048 LLVMConstInt(ctx->ac.i32, array_size, false), "");
3049
3050 if (!index)
3051 index = indirect;
3052 else
3053 index = LLVMBuildAdd(ctx->ac.builder, index, indirect, "");
3054 }
3055
3056 constant_index += child->base_offset * array_size;
3057
3058 tail = &child->deref;
3059 }
3060 descriptor_set = deref->var->data.descriptor_set;
3061 base_index = deref->var->data.binding;
3062 }
3063
3064 return ctx->abi->load_sampler_desc(ctx->abi,
3065 descriptor_set,
3066 base_index,
3067 constant_index, index,
3068 desc_type, image, write);
3069 }
3070
3071 static void set_tex_fetch_args(struct ac_llvm_context *ctx,
3072 struct ac_image_args *args,
3073 const nir_tex_instr *instr,
3074 nir_texop op,
3075 LLVMValueRef res_ptr, LLVMValueRef samp_ptr,
3076 LLVMValueRef *param, unsigned count,
3077 unsigned dmask)
3078 {
3079 unsigned is_rect = 0;
3080 bool da = instr->is_array || instr->sampler_dim == GLSL_SAMPLER_DIM_CUBE;
3081
3082 if (op == nir_texop_lod)
3083 da = false;
3084 /* Pad to power of two vector */
3085 while (count < util_next_power_of_two(count))
3086 param[count++] = LLVMGetUndef(ctx->i32);
3087
3088 if (count > 1)
3089 args->addr = ac_build_gather_values(ctx, param, count);
3090 else
3091 args->addr = param[0];
3092
3093 args->resource = res_ptr;
3094 args->sampler = samp_ptr;
3095
3096 if (instr->sampler_dim == GLSL_SAMPLER_DIM_BUF && op == nir_texop_txf) {
3097 args->addr = param[0];
3098 return;
3099 }
3100
3101 args->dmask = dmask;
3102 args->unorm = is_rect;
3103 args->da = da;
3104 }
3105
3106 /* Disable anisotropic filtering if BASE_LEVEL == LAST_LEVEL.
3107 *
3108 * SI-CI:
3109 * If BASE_LEVEL == LAST_LEVEL, the shader must disable anisotropic
3110 * filtering manually. The driver sets img7 to a mask clearing
3111 * MAX_ANISO_RATIO if BASE_LEVEL == LAST_LEVEL. The shader must do:
3112 * s_and_b32 samp0, samp0, img7
3113 *
3114 * VI:
3115 * The ANISO_OVERRIDE sampler field enables this fix in TA.
3116 */
3117 static LLVMValueRef sici_fix_sampler_aniso(struct ac_nir_context *ctx,
3118 LLVMValueRef res, LLVMValueRef samp)
3119 {
3120 LLVMBuilderRef builder = ctx->ac.builder;
3121 LLVMValueRef img7, samp0;
3122
3123 if (ctx->ac.chip_class >= VI)
3124 return samp;
3125
3126 img7 = LLVMBuildExtractElement(builder, res,
3127 LLVMConstInt(ctx->ac.i32, 7, 0), "");
3128 samp0 = LLVMBuildExtractElement(builder, samp,
3129 LLVMConstInt(ctx->ac.i32, 0, 0), "");
3130 samp0 = LLVMBuildAnd(builder, samp0, img7, "");
3131 return LLVMBuildInsertElement(builder, samp, samp0,
3132 LLVMConstInt(ctx->ac.i32, 0, 0), "");
3133 }
3134
3135 static void tex_fetch_ptrs(struct ac_nir_context *ctx,
3136 nir_tex_instr *instr,
3137 LLVMValueRef *res_ptr, LLVMValueRef *samp_ptr,
3138 LLVMValueRef *fmask_ptr)
3139 {
3140 if (instr->sampler_dim == GLSL_SAMPLER_DIM_BUF)
3141 *res_ptr = get_sampler_desc(ctx, instr->texture, AC_DESC_BUFFER, instr, false, false);
3142 else
3143 *res_ptr = get_sampler_desc(ctx, instr->texture, AC_DESC_IMAGE, instr, false, false);
3144 if (samp_ptr) {
3145 if (instr->sampler)
3146 *samp_ptr = get_sampler_desc(ctx, instr->sampler, AC_DESC_SAMPLER, instr, false, false);
3147 else
3148 *samp_ptr = get_sampler_desc(ctx, instr->texture, AC_DESC_SAMPLER, instr, false, false);
3149 if (instr->sampler_dim < GLSL_SAMPLER_DIM_RECT)
3150 *samp_ptr = sici_fix_sampler_aniso(ctx, *res_ptr, *samp_ptr);
3151 }
3152 if (fmask_ptr && !instr->sampler && (instr->op == nir_texop_txf_ms ||
3153 instr->op == nir_texop_samples_identical))
3154 *fmask_ptr = get_sampler_desc(ctx, instr->texture, AC_DESC_FMASK, instr, false, false);
3155 }
3156
3157 static LLVMValueRef apply_round_slice(struct ac_llvm_context *ctx,
3158 LLVMValueRef coord)
3159 {
3160 coord = ac_to_float(ctx, coord);
3161 coord = ac_build_intrinsic(ctx, "llvm.rint.f32", ctx->f32, &coord, 1, 0);
3162 coord = ac_to_integer(ctx, coord);
3163 return coord;
3164 }
3165
3166 static void visit_tex(struct ac_nir_context *ctx, nir_tex_instr *instr)
3167 {
3168 LLVMValueRef result = NULL;
3169 struct ac_image_args args = { 0 };
3170 unsigned dmask = 0xf;
3171 LLVMValueRef address[16];
3172 LLVMValueRef coords[5];
3173 LLVMValueRef coord = NULL, lod = NULL, comparator = NULL;
3174 LLVMValueRef bias = NULL, offsets = NULL;
3175 LLVMValueRef res_ptr, samp_ptr, fmask_ptr = NULL, sample_index = NULL;
3176 LLVMValueRef ddx = NULL, ddy = NULL;
3177 LLVMValueRef derivs[6];
3178 unsigned chan, count = 0;
3179 unsigned const_src = 0, num_deriv_comp = 0;
3180 bool lod_is_zero = false;
3181
3182 tex_fetch_ptrs(ctx, instr, &res_ptr, &samp_ptr, &fmask_ptr);
3183
3184 for (unsigned i = 0; i < instr->num_srcs; i++) {
3185 switch (instr->src[i].src_type) {
3186 case nir_tex_src_coord:
3187 coord = get_src(ctx, instr->src[i].src);
3188 break;
3189 case nir_tex_src_projector:
3190 break;
3191 case nir_tex_src_comparator:
3192 comparator = get_src(ctx, instr->src[i].src);
3193 break;
3194 case nir_tex_src_offset:
3195 offsets = get_src(ctx, instr->src[i].src);
3196 const_src = i;
3197 break;
3198 case nir_tex_src_bias:
3199 bias = get_src(ctx, instr->src[i].src);
3200 break;
3201 case nir_tex_src_lod: {
3202 nir_const_value *val = nir_src_as_const_value(instr->src[i].src);
3203
3204 if (val && val->i32[0] == 0)
3205 lod_is_zero = true;
3206 lod = get_src(ctx, instr->src[i].src);
3207 break;
3208 }
3209 case nir_tex_src_ms_index:
3210 sample_index = get_src(ctx, instr->src[i].src);
3211 break;
3212 case nir_tex_src_ms_mcs:
3213 break;
3214 case nir_tex_src_ddx:
3215 ddx = get_src(ctx, instr->src[i].src);
3216 num_deriv_comp = instr->src[i].src.ssa->num_components;
3217 break;
3218 case nir_tex_src_ddy:
3219 ddy = get_src(ctx, instr->src[i].src);
3220 break;
3221 case nir_tex_src_texture_offset:
3222 case nir_tex_src_sampler_offset:
3223 case nir_tex_src_plane:
3224 default:
3225 break;
3226 }
3227 }
3228
3229 if (instr->op == nir_texop_txs && instr->sampler_dim == GLSL_SAMPLER_DIM_BUF) {
3230 result = get_buffer_size(ctx, res_ptr, true);
3231 goto write_result;
3232 }
3233
3234 if (instr->op == nir_texop_texture_samples) {
3235 LLVMValueRef res, samples, is_msaa;
3236 res = LLVMBuildBitCast(ctx->ac.builder, res_ptr, ctx->ac.v8i32, "");
3237 samples = LLVMBuildExtractElement(ctx->ac.builder, res,
3238 LLVMConstInt(ctx->ac.i32, 3, false), "");
3239 is_msaa = LLVMBuildLShr(ctx->ac.builder, samples,
3240 LLVMConstInt(ctx->ac.i32, 28, false), "");
3241 is_msaa = LLVMBuildAnd(ctx->ac.builder, is_msaa,
3242 LLVMConstInt(ctx->ac.i32, 0xe, false), "");
3243 is_msaa = LLVMBuildICmp(ctx->ac.builder, LLVMIntEQ, is_msaa,
3244 LLVMConstInt(ctx->ac.i32, 0xe, false), "");
3245
3246 samples = LLVMBuildLShr(ctx->ac.builder, samples,
3247 LLVMConstInt(ctx->ac.i32, 16, false), "");
3248 samples = LLVMBuildAnd(ctx->ac.builder, samples,
3249 LLVMConstInt(ctx->ac.i32, 0xf, false), "");
3250 samples = LLVMBuildShl(ctx->ac.builder, ctx->ac.i32_1,
3251 samples, "");
3252 samples = LLVMBuildSelect(ctx->ac.builder, is_msaa, samples,
3253 ctx->ac.i32_1, "");
3254 result = samples;
3255 goto write_result;
3256 }
3257
3258 if (coord)
3259 for (chan = 0; chan < instr->coord_components; chan++)
3260 coords[chan] = ac_llvm_extract_elem(&ctx->ac, coord, chan);
3261
3262 if (offsets && instr->op != nir_texop_txf) {
3263 LLVMValueRef offset[3], pack;
3264 for (chan = 0; chan < 3; ++chan)
3265 offset[chan] = ctx->ac.i32_0;
3266
3267 args.offset = true;
3268 for (chan = 0; chan < ac_get_llvm_num_components(offsets); chan++) {
3269 offset[chan] = ac_llvm_extract_elem(&ctx->ac, offsets, chan);
3270 offset[chan] = LLVMBuildAnd(ctx->ac.builder, offset[chan],
3271 LLVMConstInt(ctx->ac.i32, 0x3f, false), "");
3272 if (chan)
3273 offset[chan] = LLVMBuildShl(ctx->ac.builder, offset[chan],
3274 LLVMConstInt(ctx->ac.i32, chan * 8, false), "");
3275 }
3276 pack = LLVMBuildOr(ctx->ac.builder, offset[0], offset[1], "");
3277 pack = LLVMBuildOr(ctx->ac.builder, pack, offset[2], "");
3278 address[count++] = pack;
3279
3280 }
3281 /* pack LOD bias value */
3282 if (instr->op == nir_texop_txb && bias) {
3283 address[count++] = bias;
3284 }
3285
3286 /* Pack depth comparison value */
3287 if (instr->is_shadow && comparator) {
3288 LLVMValueRef z = ac_to_float(&ctx->ac,
3289 ac_llvm_extract_elem(&ctx->ac, comparator, 0));
3290
3291 /* TC-compatible HTILE on radeonsi promotes Z16 and Z24 to Z32_FLOAT,
3292 * so the depth comparison value isn't clamped for Z16 and
3293 * Z24 anymore. Do it manually here.
3294 *
3295 * It's unnecessary if the original texture format was
3296 * Z32_FLOAT, but we don't know that here.
3297 */
3298 if (ctx->ac.chip_class == VI && ctx->abi->clamp_shadow_reference)
3299 z = ac_build_clamp(&ctx->ac, z);
3300
3301 address[count++] = z;
3302 }
3303
3304 /* pack derivatives */
3305 if (ddx || ddy) {
3306 int num_src_deriv_channels, num_dest_deriv_channels;
3307 switch (instr->sampler_dim) {
3308 case GLSL_SAMPLER_DIM_3D:
3309 case GLSL_SAMPLER_DIM_CUBE:
3310 num_deriv_comp = 3;
3311 num_src_deriv_channels = 3;
3312 num_dest_deriv_channels = 3;
3313 break;
3314 case GLSL_SAMPLER_DIM_2D:
3315 default:
3316 num_src_deriv_channels = 2;
3317 num_dest_deriv_channels = 2;
3318 num_deriv_comp = 2;
3319 break;
3320 case GLSL_SAMPLER_DIM_1D:
3321 num_src_deriv_channels = 1;
3322 if (ctx->ac.chip_class >= GFX9) {
3323 num_dest_deriv_channels = 2;
3324 num_deriv_comp = 2;
3325 } else {
3326 num_dest_deriv_channels = 1;
3327 num_deriv_comp = 1;
3328 }
3329 break;
3330 }
3331
3332 for (unsigned i = 0; i < num_src_deriv_channels; i++) {
3333 derivs[i] = ac_to_float(&ctx->ac, ac_llvm_extract_elem(&ctx->ac, ddx, i));
3334 derivs[num_dest_deriv_channels + i] = ac_to_float(&ctx->ac, ac_llvm_extract_elem(&ctx->ac, ddy, i));
3335 }
3336 for (unsigned i = num_src_deriv_channels; i < num_dest_deriv_channels; i++) {
3337 derivs[i] = ctx->ac.f32_0;
3338 derivs[num_dest_deriv_channels + i] = ctx->ac.f32_0;
3339 }
3340 }
3341
3342 if (instr->sampler_dim == GLSL_SAMPLER_DIM_CUBE && coord) {
3343 for (chan = 0; chan < instr->coord_components; chan++)
3344 coords[chan] = ac_to_float(&ctx->ac, coords[chan]);
3345 if (instr->coord_components == 3)
3346 coords[3] = LLVMGetUndef(ctx->ac.f32);
3347 ac_prepare_cube_coords(&ctx->ac,
3348 instr->op == nir_texop_txd, instr->is_array,
3349 instr->op == nir_texop_lod, coords, derivs);
3350 if (num_deriv_comp)
3351 num_deriv_comp--;
3352 }
3353
3354 if (ddx || ddy) {
3355 for (unsigned i = 0; i < num_deriv_comp * 2; i++)
3356 address[count++] = derivs[i];
3357 }
3358
3359 /* Pack texture coordinates */
3360 if (coord) {
3361 address[count++] = coords[0];
3362 if (instr->coord_components > 1) {
3363 if (instr->sampler_dim == GLSL_SAMPLER_DIM_1D && instr->is_array && instr->op != nir_texop_txf) {
3364 coords[1] = apply_round_slice(&ctx->ac, coords[1]);
3365 }
3366 address[count++] = coords[1];
3367 }
3368 if (instr->coord_components > 2) {
3369 if ((instr->sampler_dim == GLSL_SAMPLER_DIM_2D ||
3370 instr->sampler_dim == GLSL_SAMPLER_DIM_MS ||
3371 instr->sampler_dim == GLSL_SAMPLER_DIM_SUBPASS ||
3372 instr->sampler_dim == GLSL_SAMPLER_DIM_SUBPASS_MS) &&
3373 instr->is_array &&
3374 instr->op != nir_texop_txf && instr->op != nir_texop_txf_ms) {
3375 coords[2] = apply_round_slice(&ctx->ac, coords[2]);
3376 }
3377 address[count++] = coords[2];
3378 }
3379
3380 if (ctx->ac.chip_class >= GFX9) {
3381 LLVMValueRef filler;
3382 if (instr->op == nir_texop_txf)
3383 filler = ctx->ac.i32_0;
3384 else
3385 filler = LLVMConstReal(ctx->ac.f32, 0.5);
3386
3387 if (instr->sampler_dim == GLSL_SAMPLER_DIM_1D) {
3388 /* No nir_texop_lod, because it does not take a slice
3389 * even with array textures. */
3390 if (instr->is_array && instr->op != nir_texop_lod ) {
3391 address[count] = address[count - 1];
3392 address[count - 1] = filler;
3393 count++;
3394 } else
3395 address[count++] = filler;
3396 }
3397 }
3398 }
3399
3400 /* Pack LOD */
3401 if (lod && ((instr->op == nir_texop_txl || instr->op == nir_texop_txf) && !lod_is_zero)) {
3402 address[count++] = lod;
3403 } else if (instr->op == nir_texop_txf_ms && sample_index) {
3404 address[count++] = sample_index;
3405 } else if(instr->op == nir_texop_txs) {
3406 count = 0;
3407 if (lod)
3408 address[count++] = lod;
3409 else
3410 address[count++] = ctx->ac.i32_0;
3411 }
3412
3413 for (chan = 0; chan < count; chan++) {
3414 address[chan] = LLVMBuildBitCast(ctx->ac.builder,
3415 address[chan], ctx->ac.i32, "");
3416 }
3417
3418 if (instr->op == nir_texop_samples_identical) {
3419 LLVMValueRef txf_address[4];
3420 struct ac_image_args txf_args = { 0 };
3421 unsigned txf_count = count;
3422 memcpy(txf_address, address, sizeof(txf_address));
3423
3424 if (!instr->is_array)
3425 txf_address[2] = ctx->ac.i32_0;
3426 txf_address[3] = ctx->ac.i32_0;
3427
3428 set_tex_fetch_args(&ctx->ac, &txf_args, instr, nir_texop_txf,
3429 fmask_ptr, NULL,
3430 txf_address, txf_count, 0xf);
3431
3432 result = build_tex_intrinsic(ctx, instr, false, &txf_args);
3433
3434 result = LLVMBuildExtractElement(ctx->ac.builder, result, ctx->ac.i32_0, "");
3435 result = emit_int_cmp(&ctx->ac, LLVMIntEQ, result, ctx->ac.i32_0);
3436 goto write_result;
3437 }
3438
3439 if (instr->sampler_dim == GLSL_SAMPLER_DIM_MS &&
3440 instr->op != nir_texop_txs) {
3441 unsigned sample_chan = instr->is_array ? 3 : 2;
3442 address[sample_chan] = adjust_sample_index_using_fmask(&ctx->ac,
3443 address[0],
3444 address[1],
3445 instr->is_array ? address[2] : NULL,
3446 address[sample_chan],
3447 fmask_ptr);
3448 }
3449
3450 if (offsets && instr->op == nir_texop_txf) {
3451 nir_const_value *const_offset =
3452 nir_src_as_const_value(instr->src[const_src].src);
3453 int num_offsets = instr->src[const_src].src.ssa->num_components;
3454 assert(const_offset);
3455 num_offsets = MIN2(num_offsets, instr->coord_components);
3456 if (num_offsets > 2)
3457 address[2] = LLVMBuildAdd(ctx->ac.builder,
3458 address[2], LLVMConstInt(ctx->ac.i32, const_offset->i32[2], false), "");
3459 if (num_offsets > 1)
3460 address[1] = LLVMBuildAdd(ctx->ac.builder,
3461 address[1], LLVMConstInt(ctx->ac.i32, const_offset->i32[1], false), "");
3462 address[0] = LLVMBuildAdd(ctx->ac.builder,
3463 address[0], LLVMConstInt(ctx->ac.i32, const_offset->i32[0], false), "");
3464
3465 }
3466
3467 /* TODO TG4 support */
3468 if (instr->op == nir_texop_tg4) {
3469 if (instr->is_shadow)
3470 dmask = 1;
3471 else
3472 dmask = 1 << instr->component;
3473 }
3474 set_tex_fetch_args(&ctx->ac, &args, instr, instr->op,
3475 res_ptr, samp_ptr, address, count, dmask);
3476
3477 result = build_tex_intrinsic(ctx, instr, lod_is_zero, &args);
3478
3479 if (instr->op == nir_texop_query_levels)
3480 result = LLVMBuildExtractElement(ctx->ac.builder, result, LLVMConstInt(ctx->ac.i32, 3, false), "");
3481 else if (instr->is_shadow && instr->is_new_style_shadow &&
3482 instr->op != nir_texop_txs && instr->op != nir_texop_lod &&
3483 instr->op != nir_texop_tg4)
3484 result = LLVMBuildExtractElement(ctx->ac.builder, result, ctx->ac.i32_0, "");
3485 else if (instr->op == nir_texop_txs &&
3486 instr->sampler_dim == GLSL_SAMPLER_DIM_CUBE &&
3487 instr->is_array) {
3488 LLVMValueRef two = LLVMConstInt(ctx->ac.i32, 2, false);
3489 LLVMValueRef six = LLVMConstInt(ctx->ac.i32, 6, false);
3490 LLVMValueRef z = LLVMBuildExtractElement(ctx->ac.builder, result, two, "");
3491 z = LLVMBuildSDiv(ctx->ac.builder, z, six, "");
3492 result = LLVMBuildInsertElement(ctx->ac.builder, result, z, two, "");
3493 } else if (ctx->ac.chip_class >= GFX9 &&
3494 instr->op == nir_texop_txs &&
3495 instr->sampler_dim == GLSL_SAMPLER_DIM_1D &&
3496 instr->is_array) {
3497 LLVMValueRef two = LLVMConstInt(ctx->ac.i32, 2, false);
3498 LLVMValueRef layers = LLVMBuildExtractElement(ctx->ac.builder, result, two, "");
3499 result = LLVMBuildInsertElement(ctx->ac.builder, result, layers,
3500 ctx->ac.i32_1, "");
3501 } else if (instr->dest.ssa.num_components != 4)
3502 result = ac_trim_vector(&ctx->ac, result, instr->dest.ssa.num_components);
3503
3504 write_result:
3505 if (result) {
3506 assert(instr->dest.is_ssa);
3507 result = ac_to_integer(&ctx->ac, result);
3508 _mesa_hash_table_insert(ctx->defs, &instr->dest.ssa, result);
3509 }
3510 }
3511
3512
3513 static void visit_phi(struct ac_nir_context *ctx, nir_phi_instr *instr)
3514 {
3515 LLVMTypeRef type = get_def_type(ctx, &instr->dest.ssa);
3516 LLVMValueRef result = LLVMBuildPhi(ctx->ac.builder, type, "");
3517
3518 _mesa_hash_table_insert(ctx->defs, &instr->dest.ssa, result);
3519 _mesa_hash_table_insert(ctx->phis, instr, result);
3520 }
3521
3522 static void visit_post_phi(struct ac_nir_context *ctx,
3523 nir_phi_instr *instr,
3524 LLVMValueRef llvm_phi)
3525 {
3526 nir_foreach_phi_src(src, instr) {
3527 LLVMBasicBlockRef block = get_block(ctx, src->pred);
3528 LLVMValueRef llvm_src = get_src(ctx, src->src);
3529
3530 LLVMAddIncoming(llvm_phi, &llvm_src, &block, 1);
3531 }
3532 }
3533
3534 static void phi_post_pass(struct ac_nir_context *ctx)
3535 {
3536 struct hash_entry *entry;
3537 hash_table_foreach(ctx->phis, entry) {
3538 visit_post_phi(ctx, (nir_phi_instr*)entry->key,
3539 (LLVMValueRef)entry->data);
3540 }
3541 }
3542
3543
3544 static void visit_ssa_undef(struct ac_nir_context *ctx,
3545 const nir_ssa_undef_instr *instr)
3546 {
3547 unsigned num_components = instr->def.num_components;
3548 LLVMTypeRef type = LLVMIntTypeInContext(ctx->ac.context, instr->def.bit_size);
3549 LLVMValueRef undef;
3550
3551 if (num_components == 1)
3552 undef = LLVMGetUndef(type);
3553 else {
3554 undef = LLVMGetUndef(LLVMVectorType(type, num_components));
3555 }
3556 _mesa_hash_table_insert(ctx->defs, &instr->def, undef);
3557 }
3558
3559 static void visit_jump(struct ac_llvm_context *ctx,
3560 const nir_jump_instr *instr)
3561 {
3562 switch (instr->type) {
3563 case nir_jump_break:
3564 ac_build_break(ctx);
3565 break;
3566 case nir_jump_continue:
3567 ac_build_continue(ctx);
3568 break;
3569 default:
3570 fprintf(stderr, "Unknown NIR jump instr: ");
3571 nir_print_instr(&instr->instr, stderr);
3572 fprintf(stderr, "\n");
3573 abort();
3574 }
3575 }
3576
3577 static void visit_cf_list(struct ac_nir_context *ctx,
3578 struct exec_list *list);
3579
3580 static void visit_block(struct ac_nir_context *ctx, nir_block *block)
3581 {
3582 LLVMBasicBlockRef llvm_block = LLVMGetInsertBlock(ctx->ac.builder);
3583 nir_foreach_instr(instr, block)
3584 {
3585 switch (instr->type) {
3586 case nir_instr_type_alu:
3587 visit_alu(ctx, nir_instr_as_alu(instr));
3588 break;
3589 case nir_instr_type_load_const:
3590 visit_load_const(ctx, nir_instr_as_load_const(instr));
3591 break;
3592 case nir_instr_type_intrinsic:
3593 visit_intrinsic(ctx, nir_instr_as_intrinsic(instr));
3594 break;
3595 case nir_instr_type_tex:
3596 visit_tex(ctx, nir_instr_as_tex(instr));
3597 break;
3598 case nir_instr_type_phi:
3599 visit_phi(ctx, nir_instr_as_phi(instr));
3600 break;
3601 case nir_instr_type_ssa_undef:
3602 visit_ssa_undef(ctx, nir_instr_as_ssa_undef(instr));
3603 break;
3604 case nir_instr_type_jump:
3605 visit_jump(&ctx->ac, nir_instr_as_jump(instr));
3606 break;
3607 default:
3608 fprintf(stderr, "Unknown NIR instr type: ");
3609 nir_print_instr(instr, stderr);
3610 fprintf(stderr, "\n");
3611 abort();
3612 }
3613 }
3614
3615 _mesa_hash_table_insert(ctx->defs, block, llvm_block);
3616 }
3617
3618 static void visit_if(struct ac_nir_context *ctx, nir_if *if_stmt)
3619 {
3620 LLVMValueRef value = get_src(ctx, if_stmt->condition);
3621
3622 nir_block *then_block =
3623 (nir_block *) exec_list_get_head(&if_stmt->then_list);
3624
3625 ac_build_uif(&ctx->ac, value, then_block->index);
3626
3627 visit_cf_list(ctx, &if_stmt->then_list);
3628
3629 if (!exec_list_is_empty(&if_stmt->else_list)) {
3630 nir_block *else_block =
3631 (nir_block *) exec_list_get_head(&if_stmt->else_list);
3632
3633 ac_build_else(&ctx->ac, else_block->index);
3634 visit_cf_list(ctx, &if_stmt->else_list);
3635 }
3636
3637 ac_build_endif(&ctx->ac, then_block->index);
3638 }
3639
3640 static void visit_loop(struct ac_nir_context *ctx, nir_loop *loop)
3641 {
3642 nir_block *first_loop_block =
3643 (nir_block *) exec_list_get_head(&loop->body);
3644
3645 ac_build_bgnloop(&ctx->ac, first_loop_block->index);
3646
3647 visit_cf_list(ctx, &loop->body);
3648
3649 ac_build_endloop(&ctx->ac, first_loop_block->index);
3650 }
3651
3652 static void visit_cf_list(struct ac_nir_context *ctx,
3653 struct exec_list *list)
3654 {
3655 foreach_list_typed(nir_cf_node, node, node, list)
3656 {
3657 switch (node->type) {
3658 case nir_cf_node_block:
3659 visit_block(ctx, nir_cf_node_as_block(node));
3660 break;
3661
3662 case nir_cf_node_if:
3663 visit_if(ctx, nir_cf_node_as_if(node));
3664 break;
3665
3666 case nir_cf_node_loop:
3667 visit_loop(ctx, nir_cf_node_as_loop(node));
3668 break;
3669
3670 default:
3671 assert(0);
3672 }
3673 }
3674 }
3675
3676 void
3677 ac_handle_shader_output_decl(struct ac_llvm_context *ctx,
3678 struct ac_shader_abi *abi,
3679 struct nir_shader *nir,
3680 struct nir_variable *variable,
3681 gl_shader_stage stage)
3682 {
3683 unsigned output_loc = variable->data.driver_location / 4;
3684 unsigned attrib_count = glsl_count_attribute_slots(variable->type, false);
3685
3686 /* tess ctrl has it's own load/store paths for outputs */
3687 if (stage == MESA_SHADER_TESS_CTRL)
3688 return;
3689
3690 if (stage == MESA_SHADER_VERTEX ||
3691 stage == MESA_SHADER_TESS_EVAL ||
3692 stage == MESA_SHADER_GEOMETRY) {
3693 int idx = variable->data.location + variable->data.index;
3694 if (idx == VARYING_SLOT_CLIP_DIST0) {
3695 int length = nir->info.clip_distance_array_size +
3696 nir->info.cull_distance_array_size;
3697
3698 if (length > 4)
3699 attrib_count = 2;
3700 else
3701 attrib_count = 1;
3702 }
3703 }
3704
3705 for (unsigned i = 0; i < attrib_count; ++i) {
3706 for (unsigned chan = 0; chan < 4; chan++) {
3707 abi->outputs[radeon_llvm_reg_index_soa(output_loc + i, chan)] =
3708 ac_build_alloca_undef(ctx, ctx->f32, "");
3709 }
3710 }
3711 }
3712
3713 static LLVMTypeRef
3714 glsl_base_to_llvm_type(struct ac_llvm_context *ac,
3715 enum glsl_base_type type)
3716 {
3717 switch (type) {
3718 case GLSL_TYPE_INT:
3719 case GLSL_TYPE_UINT:
3720 case GLSL_TYPE_BOOL:
3721 case GLSL_TYPE_SUBROUTINE:
3722 return ac->i32;
3723 case GLSL_TYPE_FLOAT: /* TODO handle mediump */
3724 return ac->f32;
3725 case GLSL_TYPE_INT64:
3726 case GLSL_TYPE_UINT64:
3727 return ac->i64;
3728 case GLSL_TYPE_DOUBLE:
3729 return ac->f64;
3730 default:
3731 unreachable("unknown GLSL type");
3732 }
3733 }
3734
3735 static LLVMTypeRef
3736 glsl_to_llvm_type(struct ac_llvm_context *ac,
3737 const struct glsl_type *type)
3738 {
3739 if (glsl_type_is_scalar(type)) {
3740 return glsl_base_to_llvm_type(ac, glsl_get_base_type(type));
3741 }
3742
3743 if (glsl_type_is_vector(type)) {
3744 return LLVMVectorType(
3745 glsl_base_to_llvm_type(ac, glsl_get_base_type(type)),
3746 glsl_get_vector_elements(type));
3747 }
3748
3749 if (glsl_type_is_matrix(type)) {
3750 return LLVMArrayType(
3751 glsl_to_llvm_type(ac, glsl_get_column_type(type)),
3752 glsl_get_matrix_columns(type));
3753 }
3754
3755 if (glsl_type_is_array(type)) {
3756 return LLVMArrayType(
3757 glsl_to_llvm_type(ac, glsl_get_array_element(type)),
3758 glsl_get_length(type));
3759 }
3760
3761 assert(glsl_type_is_struct(type));
3762
3763 LLVMTypeRef member_types[glsl_get_length(type)];
3764
3765 for (unsigned i = 0; i < glsl_get_length(type); i++) {
3766 member_types[i] =
3767 glsl_to_llvm_type(ac,
3768 glsl_get_struct_field(type, i));
3769 }
3770
3771 return LLVMStructTypeInContext(ac->context, member_types,
3772 glsl_get_length(type), false);
3773 }
3774
3775 static void
3776 setup_locals(struct ac_nir_context *ctx,
3777 struct nir_function *func)
3778 {
3779 int i, j;
3780 ctx->num_locals = 0;
3781 nir_foreach_variable(variable, &func->impl->locals) {
3782 unsigned attrib_count = glsl_count_attribute_slots(variable->type, false);
3783 variable->data.driver_location = ctx->num_locals * 4;
3784 variable->data.location_frac = 0;
3785 ctx->num_locals += attrib_count;
3786 }
3787 ctx->locals = malloc(4 * ctx->num_locals * sizeof(LLVMValueRef));
3788 if (!ctx->locals)
3789 return;
3790
3791 for (i = 0; i < ctx->num_locals; i++) {
3792 for (j = 0; j < 4; j++) {
3793 ctx->locals[i * 4 + j] =
3794 ac_build_alloca_undef(&ctx->ac, ctx->ac.f32, "temp");
3795 }
3796 }
3797 }
3798
3799 static void
3800 setup_shared(struct ac_nir_context *ctx,
3801 struct nir_shader *nir)
3802 {
3803 nir_foreach_variable(variable, &nir->shared) {
3804 LLVMValueRef shared =
3805 LLVMAddGlobalInAddressSpace(
3806 ctx->ac.module, glsl_to_llvm_type(&ctx->ac, variable->type),
3807 variable->name ? variable->name : "",
3808 AC_LOCAL_ADDR_SPACE);
3809 _mesa_hash_table_insert(ctx->vars, variable, shared);
3810 }
3811 }
3812
3813 void ac_nir_translate(struct ac_llvm_context *ac, struct ac_shader_abi *abi,
3814 struct nir_shader *nir)
3815 {
3816 struct ac_nir_context ctx = {};
3817 struct nir_function *func;
3818
3819 /* Last minute passes for both radv & radeonsi */
3820 ac_lower_subgroups(nir);
3821
3822 ctx.ac = *ac;
3823 ctx.abi = abi;
3824
3825 ctx.stage = nir->info.stage;
3826
3827 ctx.main_function = LLVMGetBasicBlockParent(LLVMGetInsertBlock(ctx.ac.builder));
3828
3829 nir_foreach_variable(variable, &nir->outputs)
3830 ac_handle_shader_output_decl(&ctx.ac, ctx.abi, nir, variable,
3831 ctx.stage);
3832
3833 ctx.defs = _mesa_hash_table_create(NULL, _mesa_hash_pointer,
3834 _mesa_key_pointer_equal);
3835 ctx.phis = _mesa_hash_table_create(NULL, _mesa_hash_pointer,
3836 _mesa_key_pointer_equal);
3837 ctx.vars = _mesa_hash_table_create(NULL, _mesa_hash_pointer,
3838 _mesa_key_pointer_equal);
3839
3840 func = (struct nir_function *)exec_list_get_head(&nir->functions);
3841
3842 setup_locals(&ctx, func);
3843
3844 if (nir->info.stage == MESA_SHADER_COMPUTE)
3845 setup_shared(&ctx, nir);
3846
3847 visit_cf_list(&ctx, &func->impl->body);
3848 phi_post_pass(&ctx);
3849
3850 if (nir->info.stage != MESA_SHADER_COMPUTE)
3851 ctx.abi->emit_outputs(ctx.abi, AC_LLVM_MAX_OUTPUTS,
3852 ctx.abi->outputs);
3853
3854 free(ctx.locals);
3855 ralloc_free(ctx.defs);
3856 ralloc_free(ctx.phis);
3857 ralloc_free(ctx.vars);
3858 }
3859
3860 void
3861 ac_lower_indirect_derefs(struct nir_shader *nir, enum chip_class chip_class)
3862 {
3863 /* While it would be nice not to have this flag, we are constrained
3864 * by the reality that LLVM 5.0 doesn't have working VGPR indexing
3865 * on GFX9.
3866 */
3867 bool llvm_has_working_vgpr_indexing = chip_class <= VI;
3868
3869 /* TODO: Indirect indexing of GS inputs is unimplemented.
3870 *
3871 * TCS and TES load inputs directly from LDS or offchip memory, so
3872 * indirect indexing is trivial.
3873 */
3874 nir_variable_mode indirect_mask = 0;
3875 if (nir->info.stage == MESA_SHADER_GEOMETRY ||
3876 (nir->info.stage != MESA_SHADER_TESS_CTRL &&
3877 nir->info.stage != MESA_SHADER_TESS_EVAL &&
3878 !llvm_has_working_vgpr_indexing)) {
3879 indirect_mask |= nir_var_shader_in;
3880 }
3881 if (!llvm_has_working_vgpr_indexing &&
3882 nir->info.stage != MESA_SHADER_TESS_CTRL)
3883 indirect_mask |= nir_var_shader_out;
3884
3885 /* TODO: We shouldn't need to do this, however LLVM isn't currently
3886 * smart enough to handle indirects without causing excess spilling
3887 * causing the gpu to hang.
3888 *
3889 * See the following thread for more details of the problem:
3890 * https://lists.freedesktop.org/archives/mesa-dev/2017-July/162106.html
3891 */
3892 indirect_mask |= nir_var_local;
3893
3894 nir_lower_indirect_derefs(nir, indirect_mask);
3895 }