2 * Copyright © 2016 Bas Nieuwenhuizen
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
24 #include "ac_nir_to_llvm.h"
25 #include "ac_llvm_build.h"
26 #include "ac_llvm_util.h"
27 #include "ac_binary.h"
30 #include "../vulkan/radv_descriptor_set.h"
31 #include "util/bitscan.h"
32 #include <llvm-c/Transforms/Scalar.h>
33 #include "ac_shader_info.h"
34 enum radeon_llvm_calling_convention
{
35 RADEON_LLVM_AMDGPU_VS
= 87,
36 RADEON_LLVM_AMDGPU_GS
= 88,
37 RADEON_LLVM_AMDGPU_PS
= 89,
38 RADEON_LLVM_AMDGPU_CS
= 90,
41 #define CONST_ADDR_SPACE 2
42 #define LOCAL_ADDR_SPACE 3
44 #define RADEON_LLVM_MAX_INPUTS (VARYING_SLOT_VAR31 + 1)
45 #define RADEON_LLVM_MAX_OUTPUTS (VARYING_SLOT_VAR31 + 1)
54 struct nir_to_llvm_context
{
55 struct ac_llvm_context ac
;
56 const struct ac_nir_compiler_options
*options
;
57 struct ac_shader_variant_info
*shader_info
;
59 LLVMContextRef context
;
61 LLVMBuilderRef builder
;
62 LLVMValueRef main_function
;
64 struct hash_table
*defs
;
65 struct hash_table
*phis
;
67 LLVMValueRef descriptor_sets
[AC_UD_MAX_SETS
];
68 LLVMValueRef ring_offsets
;
69 LLVMValueRef push_constants
;
70 LLVMValueRef num_work_groups
;
71 LLVMValueRef workgroup_ids
;
72 LLVMValueRef local_invocation_ids
;
75 LLVMValueRef vertex_buffers
;
76 LLVMValueRef base_vertex
;
77 LLVMValueRef start_instance
;
78 LLVMValueRef draw_index
;
79 LLVMValueRef vertex_id
;
80 LLVMValueRef rel_auto_id
;
81 LLVMValueRef vs_prim_id
;
82 LLVMValueRef instance_id
;
83 LLVMValueRef ls_out_layout
;
84 LLVMValueRef es2gs_offset
;
86 LLVMValueRef tcs_offchip_layout
;
87 LLVMValueRef tcs_out_offsets
;
88 LLVMValueRef tcs_out_layout
;
89 LLVMValueRef tcs_in_layout
;
91 LLVMValueRef tess_factor_offset
;
92 LLVMValueRef tcs_patch_id
;
93 LLVMValueRef tcs_rel_ids
;
94 LLVMValueRef tes_rel_patch_id
;
95 LLVMValueRef tes_patch_id
;
99 LLVMValueRef gsvs_ring_stride
;
100 LLVMValueRef gsvs_num_entries
;
101 LLVMValueRef gs2vs_offset
;
102 LLVMValueRef gs_wave_id
;
103 LLVMValueRef gs_vtx_offset
[6];
104 LLVMValueRef gs_prim_id
, gs_invocation_id
;
106 LLVMValueRef esgs_ring
;
107 LLVMValueRef gsvs_ring
;
108 LLVMValueRef hs_ring_tess_offchip
;
109 LLVMValueRef hs_ring_tess_factor
;
111 LLVMValueRef prim_mask
;
112 LLVMValueRef sample_pos_offset
;
113 LLVMValueRef persp_sample
, persp_center
, persp_centroid
;
114 LLVMValueRef linear_sample
, linear_center
, linear_centroid
;
115 LLVMValueRef front_face
;
116 LLVMValueRef ancillary
;
117 LLVMValueRef sample_coverage
;
118 LLVMValueRef frag_pos
[4];
120 LLVMBasicBlockRef continue_block
;
121 LLVMBasicBlockRef break_block
;
141 LLVMValueRef i1false
;
142 LLVMValueRef i32zero
;
144 LLVMValueRef f32zero
;
146 LLVMValueRef v4f32empty
;
148 unsigned uniform_md_kind
;
149 LLVMValueRef empty_md
;
150 gl_shader_stage stage
;
153 LLVMValueRef inputs
[RADEON_LLVM_MAX_INPUTS
* 4];
154 LLVMValueRef outputs
[RADEON_LLVM_MAX_OUTPUTS
* 4];
156 LLVMValueRef shared_memory
;
158 uint64_t output_mask
;
160 LLVMValueRef
*locals
;
162 uint8_t num_output_clips
;
163 uint8_t num_output_culls
;
165 bool has_ds_bpermute
;
167 bool is_gs_copy_shader
;
168 LLVMValueRef gs_next_vertex
;
169 unsigned gs_max_out_vertices
;
171 unsigned tes_primitive_mode
;
172 uint64_t tess_outputs_written
;
173 uint64_t tess_patch_outputs_written
;
176 static LLVMValueRef
get_sampler_desc(struct nir_to_llvm_context
*ctx
,
177 nir_deref_var
*deref
,
178 enum desc_type desc_type
);
179 static unsigned radeon_llvm_reg_index_soa(unsigned index
, unsigned chan
)
181 return (index
* 4) + chan
;
184 static unsigned shader_io_get_unique_index(gl_varying_slot slot
)
186 /* handle patch indices separate */
187 if (slot
== VARYING_SLOT_TESS_LEVEL_OUTER
)
189 if (slot
== VARYING_SLOT_TESS_LEVEL_INNER
)
191 if (slot
>= VARYING_SLOT_PATCH0
&& slot
<= VARYING_SLOT_TESS_MAX
)
192 return 2 + (slot
- VARYING_SLOT_PATCH0
);
194 if (slot
== VARYING_SLOT_POS
)
196 if (slot
== VARYING_SLOT_PSIZ
)
198 if (slot
== VARYING_SLOT_CLIP_DIST0
)
200 /* 3 is reserved for clip dist as well */
201 if (slot
>= VARYING_SLOT_VAR0
&& slot
<= VARYING_SLOT_VAR31
)
202 return 4 + (slot
- VARYING_SLOT_VAR0
);
203 unreachable("illegal slot in get unique index\n");
206 static unsigned llvm_get_type_size(LLVMTypeRef type
)
208 LLVMTypeKind kind
= LLVMGetTypeKind(type
);
211 case LLVMIntegerTypeKind
:
212 return LLVMGetIntTypeWidth(type
) / 8;
213 case LLVMFloatTypeKind
:
215 case LLVMPointerTypeKind
:
217 case LLVMVectorTypeKind
:
218 return LLVMGetVectorSize(type
) *
219 llvm_get_type_size(LLVMGetElementType(type
));
226 static void set_llvm_calling_convention(LLVMValueRef func
,
227 gl_shader_stage stage
)
229 enum radeon_llvm_calling_convention calling_conv
;
232 case MESA_SHADER_VERTEX
:
233 case MESA_SHADER_TESS_CTRL
:
234 case MESA_SHADER_TESS_EVAL
:
235 calling_conv
= RADEON_LLVM_AMDGPU_VS
;
237 case MESA_SHADER_GEOMETRY
:
238 calling_conv
= RADEON_LLVM_AMDGPU_GS
;
240 case MESA_SHADER_FRAGMENT
:
241 calling_conv
= RADEON_LLVM_AMDGPU_PS
;
243 case MESA_SHADER_COMPUTE
:
244 calling_conv
= RADEON_LLVM_AMDGPU_CS
;
247 unreachable("Unhandle shader type");
250 LLVMSetFunctionCallConv(func
, calling_conv
);
254 create_llvm_function(LLVMContextRef ctx
, LLVMModuleRef module
,
255 LLVMBuilderRef builder
, LLVMTypeRef
*return_types
,
256 unsigned num_return_elems
, LLVMTypeRef
*param_types
,
257 unsigned param_count
, unsigned array_params_mask
,
258 unsigned sgpr_params
, bool unsafe_math
)
260 LLVMTypeRef main_function_type
, ret_type
;
261 LLVMBasicBlockRef main_function_body
;
263 if (num_return_elems
)
264 ret_type
= LLVMStructTypeInContext(ctx
, return_types
,
265 num_return_elems
, true);
267 ret_type
= LLVMVoidTypeInContext(ctx
);
269 /* Setup the function */
271 LLVMFunctionType(ret_type
, param_types
, param_count
, 0);
272 LLVMValueRef main_function
=
273 LLVMAddFunction(module
, "main", main_function_type
);
275 LLVMAppendBasicBlockInContext(ctx
, main_function
, "main_body");
276 LLVMPositionBuilderAtEnd(builder
, main_function_body
);
278 LLVMSetFunctionCallConv(main_function
, RADEON_LLVM_AMDGPU_CS
);
279 for (unsigned i
= 0; i
< sgpr_params
; ++i
) {
280 if (array_params_mask
& (1 << i
)) {
281 LLVMValueRef P
= LLVMGetParam(main_function
, i
);
282 ac_add_function_attr(ctx
, main_function
, i
+ 1, AC_FUNC_ATTR_BYVAL
);
283 ac_add_attr_dereferenceable(P
, UINT64_MAX
);
286 ac_add_function_attr(ctx
, main_function
, i
+ 1, AC_FUNC_ATTR_INREG
);
291 /* These were copied from some LLVM test. */
292 LLVMAddTargetDependentFunctionAttr(main_function
,
293 "less-precise-fpmad",
295 LLVMAddTargetDependentFunctionAttr(main_function
,
298 LLVMAddTargetDependentFunctionAttr(main_function
,
301 LLVMAddTargetDependentFunctionAttr(main_function
,
305 return main_function
;
308 static LLVMTypeRef
const_array(LLVMTypeRef elem_type
, int num_elements
)
310 return LLVMPointerType(LLVMArrayType(elem_type
, num_elements
),
314 static LLVMValueRef
get_shared_memory_ptr(struct nir_to_llvm_context
*ctx
,
322 offset
= LLVMConstInt(ctx
->i32
, idx
* 16, false);
324 ptr
= ctx
->shared_memory
;
325 ptr
= LLVMBuildGEP(ctx
->builder
, ptr
, &offset
, 1, "");
326 addr_space
= LLVMGetPointerAddressSpace(LLVMTypeOf(ptr
));
327 ptr
= LLVMBuildBitCast(ctx
->builder
, ptr
, LLVMPointerType(type
, addr_space
), "");
331 static LLVMTypeRef
to_integer_type_scalar(struct nir_to_llvm_context
*ctx
, LLVMTypeRef t
)
333 if (t
== ctx
->f16
|| t
== ctx
->i16
)
335 else if (t
== ctx
->f32
|| t
== ctx
->i32
)
337 else if (t
== ctx
->f64
|| t
== ctx
->i64
)
340 unreachable("Unhandled integer size");
343 static LLVMTypeRef
to_integer_type(struct nir_to_llvm_context
*ctx
, LLVMTypeRef t
)
345 if (LLVMGetTypeKind(t
) == LLVMVectorTypeKind
) {
346 LLVMTypeRef elem_type
= LLVMGetElementType(t
);
347 return LLVMVectorType(to_integer_type_scalar(ctx
, elem_type
),
348 LLVMGetVectorSize(t
));
350 return to_integer_type_scalar(ctx
, t
);
353 static LLVMValueRef
to_integer(struct nir_to_llvm_context
*ctx
, LLVMValueRef v
)
355 LLVMTypeRef type
= LLVMTypeOf(v
);
356 return LLVMBuildBitCast(ctx
->builder
, v
, to_integer_type(ctx
, type
), "");
359 static LLVMTypeRef
to_float_type_scalar(struct nir_to_llvm_context
*ctx
, LLVMTypeRef t
)
361 if (t
== ctx
->i16
|| t
== ctx
->f16
)
363 else if (t
== ctx
->i32
|| t
== ctx
->f32
)
365 else if (t
== ctx
->i64
|| t
== ctx
->f64
)
368 unreachable("Unhandled float size");
371 static LLVMTypeRef
to_float_type(struct nir_to_llvm_context
*ctx
, LLVMTypeRef t
)
373 if (LLVMGetTypeKind(t
) == LLVMVectorTypeKind
) {
374 LLVMTypeRef elem_type
= LLVMGetElementType(t
);
375 return LLVMVectorType(to_float_type_scalar(ctx
, elem_type
),
376 LLVMGetVectorSize(t
));
378 return to_float_type_scalar(ctx
, t
);
381 static LLVMValueRef
to_float(struct nir_to_llvm_context
*ctx
, LLVMValueRef v
)
383 LLVMTypeRef type
= LLVMTypeOf(v
);
384 return LLVMBuildBitCast(ctx
->builder
, v
, to_float_type(ctx
, type
), "");
387 static int get_elem_bits(struct nir_to_llvm_context
*ctx
, LLVMTypeRef type
)
389 if (LLVMGetTypeKind(type
) == LLVMVectorTypeKind
)
390 type
= LLVMGetElementType(type
);
392 if (LLVMGetTypeKind(type
) == LLVMIntegerTypeKind
)
393 return LLVMGetIntTypeWidth(type
);
395 if (type
== ctx
->f16
)
397 if (type
== ctx
->f32
)
399 if (type
== ctx
->f64
)
402 unreachable("Unhandled type kind in get_elem_bits");
405 static LLVMValueRef
unpack_param(struct nir_to_llvm_context
*ctx
,
406 LLVMValueRef param
, unsigned rshift
,
409 LLVMValueRef value
= param
;
411 value
= LLVMBuildLShr(ctx
->builder
, value
,
412 LLVMConstInt(ctx
->i32
, rshift
, false), "");
414 if (rshift
+ bitwidth
< 32) {
415 unsigned mask
= (1 << bitwidth
) - 1;
416 value
= LLVMBuildAnd(ctx
->builder
, value
,
417 LLVMConstInt(ctx
->i32
, mask
, false), "");
422 static LLVMValueRef
get_rel_patch_id(struct nir_to_llvm_context
*ctx
)
424 switch (ctx
->stage
) {
425 case MESA_SHADER_TESS_CTRL
:
426 return unpack_param(ctx
, ctx
->tcs_rel_ids
, 0, 8);
427 case MESA_SHADER_TESS_EVAL
:
428 return ctx
->tes_rel_patch_id
;
431 unreachable("Illegal stage");
435 /* Tessellation shaders pass outputs to the next shader using LDS.
437 * LS outputs = TCS inputs
438 * TCS outputs = TES inputs
441 * - TCS inputs for patch 0
442 * - TCS inputs for patch 1
443 * - TCS inputs for patch 2 = get_tcs_in_current_patch_offset (if RelPatchID==2)
445 * - TCS outputs for patch 0 = get_tcs_out_patch0_offset
446 * - Per-patch TCS outputs for patch 0 = get_tcs_out_patch0_patch_data_offset
447 * - TCS outputs for patch 1
448 * - Per-patch TCS outputs for patch 1
449 * - TCS outputs for patch 2 = get_tcs_out_current_patch_offset (if RelPatchID==2)
450 * - Per-patch TCS outputs for patch 2 = get_tcs_out_current_patch_data_offset (if RelPatchID==2)
453 * All three shaders VS(LS), TCS, TES share the same LDS space.
456 get_tcs_in_patch_stride(struct nir_to_llvm_context
*ctx
)
458 if (ctx
->stage
== MESA_SHADER_VERTEX
)
459 return unpack_param(ctx
, ctx
->ls_out_layout
, 0, 13);
460 else if (ctx
->stage
== MESA_SHADER_TESS_CTRL
)
461 return unpack_param(ctx
, ctx
->tcs_in_layout
, 0, 13);
469 get_tcs_out_patch_stride(struct nir_to_llvm_context
*ctx
)
471 return unpack_param(ctx
, ctx
->tcs_out_layout
, 0, 13);
475 get_tcs_out_patch0_offset(struct nir_to_llvm_context
*ctx
)
477 return LLVMBuildMul(ctx
->builder
,
478 unpack_param(ctx
, ctx
->tcs_out_offsets
, 0, 16),
479 LLVMConstInt(ctx
->i32
, 4, false), "");
483 get_tcs_out_patch0_patch_data_offset(struct nir_to_llvm_context
*ctx
)
485 return LLVMBuildMul(ctx
->builder
,
486 unpack_param(ctx
, ctx
->tcs_out_offsets
, 16, 16),
487 LLVMConstInt(ctx
->i32
, 4, false), "");
491 get_tcs_in_current_patch_offset(struct nir_to_llvm_context
*ctx
)
493 LLVMValueRef patch_stride
= get_tcs_in_patch_stride(ctx
);
494 LLVMValueRef rel_patch_id
= get_rel_patch_id(ctx
);
496 return LLVMBuildMul(ctx
->builder
, patch_stride
, rel_patch_id
, "");
500 get_tcs_out_current_patch_offset(struct nir_to_llvm_context
*ctx
)
502 LLVMValueRef patch0_offset
= get_tcs_out_patch0_offset(ctx
);
503 LLVMValueRef patch_stride
= get_tcs_out_patch_stride(ctx
);
504 LLVMValueRef rel_patch_id
= get_rel_patch_id(ctx
);
506 return LLVMBuildAdd(ctx
->builder
, patch0_offset
,
507 LLVMBuildMul(ctx
->builder
, patch_stride
,
513 get_tcs_out_current_patch_data_offset(struct nir_to_llvm_context
*ctx
)
515 LLVMValueRef patch0_patch_data_offset
=
516 get_tcs_out_patch0_patch_data_offset(ctx
);
517 LLVMValueRef patch_stride
= get_tcs_out_patch_stride(ctx
);
518 LLVMValueRef rel_patch_id
= get_rel_patch_id(ctx
);
520 return LLVMBuildAdd(ctx
->builder
, patch0_patch_data_offset
,
521 LLVMBuildMul(ctx
->builder
, patch_stride
,
526 static void set_userdata_location(struct ac_userdata_info
*ud_info
, uint8_t sgpr_idx
, uint8_t num_sgprs
)
528 ud_info
->sgpr_idx
= sgpr_idx
;
529 ud_info
->num_sgprs
= num_sgprs
;
530 ud_info
->indirect
= false;
531 ud_info
->indirect_offset
= 0;
534 static void set_userdata_location_shader(struct nir_to_llvm_context
*ctx
,
535 int idx
, uint8_t sgpr_idx
, uint8_t num_sgprs
)
537 set_userdata_location(&ctx
->shader_info
->user_sgprs_locs
.shader_data
[idx
], sgpr_idx
, num_sgprs
);
541 static void set_userdata_location_indirect(struct ac_userdata_info
*ud_info
, uint8_t sgpr_idx
, uint8_t num_sgprs
,
542 uint32_t indirect_offset
)
544 ud_info
->sgpr_idx
= sgpr_idx
;
545 ud_info
->num_sgprs
= num_sgprs
;
546 ud_info
->indirect
= true;
547 ud_info
->indirect_offset
= indirect_offset
;
550 static void declare_tess_lds(struct nir_to_llvm_context
*ctx
)
552 unsigned lds_size
= ctx
->options
->chip_class
>= CIK
? 65536 : 32768;
553 ctx
->lds
= LLVMBuildIntToPtr(ctx
->builder
, ctx
->i32zero
,
554 LLVMPointerType(LLVMArrayType(ctx
->i32
, lds_size
/ 4), LOCAL_ADDR_SPACE
),
558 struct user_sgpr_info
{
559 bool need_ring_offsets
;
561 bool indirect_all_descriptor_sets
;
564 static void allocate_user_sgprs(struct nir_to_llvm_context
*ctx
,
565 struct user_sgpr_info
*user_sgpr_info
)
567 memset(user_sgpr_info
, 0, sizeof(struct user_sgpr_info
));
569 /* until we sort out scratch/global buffers always assign ring offsets for gs/vs/es */
570 if (ctx
->stage
== MESA_SHADER_GEOMETRY
||
571 ctx
->stage
== MESA_SHADER_VERTEX
||
572 ctx
->stage
== MESA_SHADER_TESS_CTRL
||
573 ctx
->stage
== MESA_SHADER_TESS_EVAL
||
574 ctx
->is_gs_copy_shader
)
575 user_sgpr_info
->need_ring_offsets
= true;
577 if (ctx
->stage
== MESA_SHADER_FRAGMENT
&&
578 ctx
->shader_info
->info
.ps
.needs_sample_positions
)
579 user_sgpr_info
->need_ring_offsets
= true;
581 /* 2 user sgprs will nearly always be allocated for scratch/rings */
582 if (ctx
->options
->supports_spill
|| user_sgpr_info
->need_ring_offsets
) {
583 user_sgpr_info
->sgpr_count
+= 2;
586 switch (ctx
->stage
) {
587 case MESA_SHADER_COMPUTE
:
588 user_sgpr_info
->sgpr_count
+= ctx
->shader_info
->info
.cs
.grid_components_used
;
590 case MESA_SHADER_FRAGMENT
:
591 user_sgpr_info
->sgpr_count
+= ctx
->shader_info
->info
.ps
.needs_sample_positions
;
593 case MESA_SHADER_VERTEX
:
594 if (!ctx
->is_gs_copy_shader
) {
595 user_sgpr_info
->sgpr_count
+= ctx
->shader_info
->info
.vs
.has_vertex_buffers
? 2 : 0;
596 if (ctx
->shader_info
->info
.vs
.needs_draw_id
) {
597 user_sgpr_info
->sgpr_count
+= 3;
599 user_sgpr_info
->sgpr_count
+= 2;
602 if (ctx
->options
->key
.vs
.as_ls
)
603 user_sgpr_info
->sgpr_count
++;
605 case MESA_SHADER_TESS_CTRL
:
606 user_sgpr_info
->sgpr_count
+= 4;
608 case MESA_SHADER_TESS_EVAL
:
609 user_sgpr_info
->sgpr_count
+= 1;
611 case MESA_SHADER_GEOMETRY
:
612 user_sgpr_info
->sgpr_count
+= 2;
618 if (ctx
->shader_info
->info
.needs_push_constants
)
619 user_sgpr_info
->sgpr_count
+= 2;
621 uint32_t remaining_sgprs
= 16 - user_sgpr_info
->sgpr_count
;
622 if (remaining_sgprs
/ 2 < util_bitcount(ctx
->shader_info
->info
.desc_set_used_mask
)) {
623 fprintf(stderr
, "radv: TODO: add support for indirect sgprs\n");
624 /* need to add support for indirect descriptor sets */
626 user_sgpr_info
->sgpr_count
+= 2;
627 user_sgpr_info
->indirect_all_descriptor_sets
= true;
629 user_sgpr_info
->sgpr_count
+= util_bitcount(ctx
->shader_info
->info
.desc_set_used_mask
) * 2;
633 static void create_function(struct nir_to_llvm_context
*ctx
)
635 LLVMTypeRef arg_types
[23];
636 unsigned arg_idx
= 0;
637 unsigned array_params_mask
= 0;
638 unsigned sgpr_count
= 0, user_sgpr_count
;
640 unsigned num_sets
= ctx
->options
->layout
? ctx
->options
->layout
->num_sets
: 0;
641 unsigned user_sgpr_idx
;
642 struct user_sgpr_info user_sgpr_info
;
644 allocate_user_sgprs(ctx
, &user_sgpr_info
);
645 if (user_sgpr_info
.need_ring_offsets
&& !ctx
->options
->supports_spill
) {
646 arg_types
[arg_idx
++] = const_array(ctx
->v16i8
, 16); /* address of rings */
649 /* 1 for each descriptor set */
650 if (!user_sgpr_info
.indirect_all_descriptor_sets
) {
651 for (unsigned i
= 0; i
< num_sets
; ++i
) {
652 if (ctx
->options
->layout
->set
[i
].layout
->shader_stages
& (1 << ctx
->stage
)) {
653 array_params_mask
|= (1 << arg_idx
);
654 arg_types
[arg_idx
++] = const_array(ctx
->i8
, 1024 * 1024);
658 array_params_mask
|= (1 << arg_idx
);
659 arg_types
[arg_idx
++] = const_array(const_array(ctx
->i8
, 1024 * 1024), 32);
662 if (ctx
->shader_info
->info
.needs_push_constants
) {
663 /* 1 for push constants and dynamic descriptors */
664 array_params_mask
|= (1 << arg_idx
);
665 arg_types
[arg_idx
++] = const_array(ctx
->i8
, 1024 * 1024);
668 switch (ctx
->stage
) {
669 case MESA_SHADER_COMPUTE
:
670 if (ctx
->shader_info
->info
.cs
.grid_components_used
)
671 arg_types
[arg_idx
++] = LLVMVectorType(ctx
->i32
, ctx
->shader_info
->info
.cs
.grid_components_used
); /* grid size */
672 user_sgpr_count
= arg_idx
;
673 arg_types
[arg_idx
++] = LLVMVectorType(ctx
->i32
, 3);
674 arg_types
[arg_idx
++] = ctx
->i32
;
675 sgpr_count
= arg_idx
;
677 arg_types
[arg_idx
++] = LLVMVectorType(ctx
->i32
, 3);
679 case MESA_SHADER_VERTEX
:
680 if (!ctx
->is_gs_copy_shader
) {
681 if (ctx
->shader_info
->info
.vs
.has_vertex_buffers
)
682 arg_types
[arg_idx
++] = const_array(ctx
->v16i8
, 16); /* vertex buffers */
683 arg_types
[arg_idx
++] = ctx
->i32
; // base vertex
684 arg_types
[arg_idx
++] = ctx
->i32
; // start instance
685 if (ctx
->shader_info
->info
.vs
.needs_draw_id
)
686 arg_types
[arg_idx
++] = ctx
->i32
; // draw index
688 user_sgpr_count
= arg_idx
;
689 if (ctx
->options
->key
.vs
.as_es
)
690 arg_types
[arg_idx
++] = ctx
->i32
; //es2gs offset
691 else if (ctx
->options
->key
.vs
.as_ls
) {
692 arg_types
[arg_idx
++] = ctx
->i32
; //ls out layout
695 sgpr_count
= arg_idx
;
696 arg_types
[arg_idx
++] = ctx
->i32
; // vertex id
697 if (!ctx
->is_gs_copy_shader
) {
698 arg_types
[arg_idx
++] = ctx
->i32
; // rel auto id
699 arg_types
[arg_idx
++] = ctx
->i32
; // vs prim id
700 arg_types
[arg_idx
++] = ctx
->i32
; // instance id
703 case MESA_SHADER_TESS_CTRL
:
704 arg_types
[arg_idx
++] = ctx
->i32
; // tcs offchip layout
705 arg_types
[arg_idx
++] = ctx
->i32
; // tcs out offsets
706 arg_types
[arg_idx
++] = ctx
->i32
; // tcs out layout
707 arg_types
[arg_idx
++] = ctx
->i32
; // tcs in layout
708 user_sgpr_count
= arg_idx
;
709 arg_types
[arg_idx
++] = ctx
->i32
; // param oc lds
710 arg_types
[arg_idx
++] = ctx
->i32
; // tess factor offset
711 sgpr_count
= arg_idx
;
712 arg_types
[arg_idx
++] = ctx
->i32
; // patch id
713 arg_types
[arg_idx
++] = ctx
->i32
; // rel ids;
715 case MESA_SHADER_TESS_EVAL
:
716 arg_types
[arg_idx
++] = ctx
->i32
; // tcs offchip layout
717 user_sgpr_count
= arg_idx
;
718 if (ctx
->options
->key
.tes
.as_es
) {
719 arg_types
[arg_idx
++] = ctx
->i32
; // OC LDS
720 arg_types
[arg_idx
++] = ctx
->i32
; //
721 arg_types
[arg_idx
++] = ctx
->i32
; // es2gs offset
723 arg_types
[arg_idx
++] = ctx
->i32
; //
724 arg_types
[arg_idx
++] = ctx
->i32
; // OC LDS
726 sgpr_count
= arg_idx
;
727 arg_types
[arg_idx
++] = ctx
->f32
; // tes_u
728 arg_types
[arg_idx
++] = ctx
->f32
; // tes_v
729 arg_types
[arg_idx
++] = ctx
->i32
; // tes rel patch id
730 arg_types
[arg_idx
++] = ctx
->i32
; // tes patch id
732 case MESA_SHADER_GEOMETRY
:
733 arg_types
[arg_idx
++] = ctx
->i32
; // gsvs stride
734 arg_types
[arg_idx
++] = ctx
->i32
; // gsvs num entires
735 user_sgpr_count
= arg_idx
;
736 arg_types
[arg_idx
++] = ctx
->i32
; // gs2vs offset
737 arg_types
[arg_idx
++] = ctx
->i32
; // wave id
738 sgpr_count
= arg_idx
;
739 arg_types
[arg_idx
++] = ctx
->i32
; // vtx0
740 arg_types
[arg_idx
++] = ctx
->i32
; // vtx1
741 arg_types
[arg_idx
++] = ctx
->i32
; // prim id
742 arg_types
[arg_idx
++] = ctx
->i32
; // vtx2
743 arg_types
[arg_idx
++] = ctx
->i32
; // vtx3
744 arg_types
[arg_idx
++] = ctx
->i32
; // vtx4
745 arg_types
[arg_idx
++] = ctx
->i32
; // vtx5
746 arg_types
[arg_idx
++] = ctx
->i32
; // GS instance id
748 case MESA_SHADER_FRAGMENT
:
749 if (ctx
->shader_info
->info
.ps
.needs_sample_positions
)
750 arg_types
[arg_idx
++] = ctx
->i32
; /* sample position offset */
751 user_sgpr_count
= arg_idx
;
752 arg_types
[arg_idx
++] = ctx
->i32
; /* prim mask */
753 sgpr_count
= arg_idx
;
754 arg_types
[arg_idx
++] = ctx
->v2i32
; /* persp sample */
755 arg_types
[arg_idx
++] = ctx
->v2i32
; /* persp center */
756 arg_types
[arg_idx
++] = ctx
->v2i32
; /* persp centroid */
757 arg_types
[arg_idx
++] = ctx
->v3i32
; /* persp pull model */
758 arg_types
[arg_idx
++] = ctx
->v2i32
; /* linear sample */
759 arg_types
[arg_idx
++] = ctx
->v2i32
; /* linear center */
760 arg_types
[arg_idx
++] = ctx
->v2i32
; /* linear centroid */
761 arg_types
[arg_idx
++] = ctx
->f32
; /* line stipple tex */
762 arg_types
[arg_idx
++] = ctx
->f32
; /* pos x float */
763 arg_types
[arg_idx
++] = ctx
->f32
; /* pos y float */
764 arg_types
[arg_idx
++] = ctx
->f32
; /* pos z float */
765 arg_types
[arg_idx
++] = ctx
->f32
; /* pos w float */
766 arg_types
[arg_idx
++] = ctx
->i32
; /* front face */
767 arg_types
[arg_idx
++] = ctx
->i32
; /* ancillary */
768 arg_types
[arg_idx
++] = ctx
->i32
; /* sample coverage */
769 arg_types
[arg_idx
++] = ctx
->i32
; /* fixed pt */
772 unreachable("Shader stage not implemented");
775 ctx
->main_function
= create_llvm_function(
776 ctx
->context
, ctx
->module
, ctx
->builder
, NULL
, 0, arg_types
,
777 arg_idx
, array_params_mask
, sgpr_count
, ctx
->options
->unsafe_math
);
778 set_llvm_calling_convention(ctx
->main_function
, ctx
->stage
);
780 ctx
->shader_info
->num_input_sgprs
= 0;
781 ctx
->shader_info
->num_input_vgprs
= 0;
783 ctx
->shader_info
->num_user_sgprs
= ctx
->options
->supports_spill
? 2 : 0;
784 for (i
= 0; i
< user_sgpr_count
; i
++)
785 ctx
->shader_info
->num_user_sgprs
+= llvm_get_type_size(arg_types
[i
]) / 4;
787 ctx
->shader_info
->num_input_sgprs
= ctx
->shader_info
->num_user_sgprs
;
788 for (; i
< sgpr_count
; i
++)
789 ctx
->shader_info
->num_input_sgprs
+= llvm_get_type_size(arg_types
[i
]) / 4;
791 if (ctx
->stage
!= MESA_SHADER_FRAGMENT
)
792 for (; i
< arg_idx
; ++i
)
793 ctx
->shader_info
->num_input_vgprs
+= llvm_get_type_size(arg_types
[i
]) / 4;
798 if (ctx
->options
->supports_spill
|| user_sgpr_info
.need_ring_offsets
) {
799 set_userdata_location_shader(ctx
, AC_UD_SCRATCH_RING_OFFSETS
, user_sgpr_idx
, 2);
801 if (ctx
->options
->supports_spill
) {
802 ctx
->ring_offsets
= ac_build_intrinsic(&ctx
->ac
, "llvm.amdgcn.implicit.buffer.ptr",
803 LLVMPointerType(ctx
->i8
, CONST_ADDR_SPACE
),
804 NULL
, 0, AC_FUNC_ATTR_READNONE
);
805 ctx
->ring_offsets
= LLVMBuildBitCast(ctx
->builder
, ctx
->ring_offsets
,
806 const_array(ctx
->v16i8
, 16), "");
808 ctx
->ring_offsets
= LLVMGetParam(ctx
->main_function
, arg_idx
++);
811 if (!user_sgpr_info
.indirect_all_descriptor_sets
) {
812 for (unsigned i
= 0; i
< num_sets
; ++i
) {
813 if (ctx
->options
->layout
->set
[i
].layout
->shader_stages
& (1 << ctx
->stage
)) {
814 set_userdata_location(&ctx
->shader_info
->user_sgprs_locs
.descriptor_sets
[i
], user_sgpr_idx
, 2);
816 ctx
->descriptor_sets
[i
] =
817 LLVMGetParam(ctx
->main_function
, arg_idx
++);
819 ctx
->descriptor_sets
[i
] = NULL
;
822 uint32_t desc_sgpr_idx
= user_sgpr_idx
;
823 LLVMValueRef desc_sets
= LLVMGetParam(ctx
->main_function
, arg_idx
++);
824 set_userdata_location_shader(ctx
, AC_UD_INDIRECT_DESCRIPTOR_SETS
, user_sgpr_idx
, 2);
827 for (unsigned i
= 0; i
< num_sets
; ++i
) {
828 if (ctx
->options
->layout
->set
[i
].layout
->shader_stages
& (1 << ctx
->stage
)) {
829 set_userdata_location_indirect(&ctx
->shader_info
->user_sgprs_locs
.descriptor_sets
[i
], desc_sgpr_idx
, 2, i
* 8);
830 ctx
->descriptor_sets
[i
] = ac_build_indexed_load_const(&ctx
->ac
, desc_sets
, LLVMConstInt(ctx
->i32
, i
, false));
833 ctx
->descriptor_sets
[i
] = NULL
;
835 ctx
->shader_info
->need_indirect_descriptor_sets
= true;
838 if (ctx
->shader_info
->info
.needs_push_constants
) {
839 ctx
->push_constants
= LLVMGetParam(ctx
->main_function
, arg_idx
++);
840 set_userdata_location_shader(ctx
, AC_UD_PUSH_CONSTANTS
, user_sgpr_idx
, 2);
844 switch (ctx
->stage
) {
845 case MESA_SHADER_COMPUTE
:
846 if (ctx
->shader_info
->info
.cs
.grid_components_used
) {
847 set_userdata_location_shader(ctx
, AC_UD_CS_GRID_SIZE
, user_sgpr_idx
, ctx
->shader_info
->info
.cs
.grid_components_used
);
848 user_sgpr_idx
+= ctx
->shader_info
->info
.cs
.grid_components_used
;
849 ctx
->num_work_groups
=
850 LLVMGetParam(ctx
->main_function
, arg_idx
++);
853 LLVMGetParam(ctx
->main_function
, arg_idx
++);
855 LLVMGetParam(ctx
->main_function
, arg_idx
++);
856 ctx
->local_invocation_ids
=
857 LLVMGetParam(ctx
->main_function
, arg_idx
++);
859 case MESA_SHADER_VERTEX
:
860 if (!ctx
->is_gs_copy_shader
) {
861 if (ctx
->shader_info
->info
.vs
.has_vertex_buffers
) {
862 set_userdata_location_shader(ctx
, AC_UD_VS_VERTEX_BUFFERS
, user_sgpr_idx
, 2);
864 ctx
->vertex_buffers
= LLVMGetParam(ctx
->main_function
, arg_idx
++);
867 if (ctx
->shader_info
->info
.vs
.needs_draw_id
)
870 set_userdata_location_shader(ctx
, AC_UD_VS_BASE_VERTEX_START_INSTANCE
, user_sgpr_idx
, vs_num
);
871 user_sgpr_idx
+= vs_num
;
873 ctx
->base_vertex
= LLVMGetParam(ctx
->main_function
, arg_idx
++);
874 ctx
->start_instance
= LLVMGetParam(ctx
->main_function
, arg_idx
++);
875 if (ctx
->shader_info
->info
.vs
.needs_draw_id
)
876 ctx
->draw_index
= LLVMGetParam(ctx
->main_function
, arg_idx
++);
878 if (ctx
->options
->key
.vs
.as_es
)
879 ctx
->es2gs_offset
= LLVMGetParam(ctx
->main_function
, arg_idx
++);
880 else if (ctx
->options
->key
.vs
.as_ls
) {
881 set_userdata_location_shader(ctx
, AC_UD_VS_LS_TCS_IN_LAYOUT
, user_sgpr_idx
, 1);
883 ctx
->ls_out_layout
= LLVMGetParam(ctx
->main_function
, arg_idx
++);
885 ctx
->vertex_id
= LLVMGetParam(ctx
->main_function
, arg_idx
++);
886 if (!ctx
->is_gs_copy_shader
) {
887 ctx
->rel_auto_id
= LLVMGetParam(ctx
->main_function
, arg_idx
++);
888 ctx
->vs_prim_id
= LLVMGetParam(ctx
->main_function
, arg_idx
++);
889 ctx
->instance_id
= LLVMGetParam(ctx
->main_function
, arg_idx
++);
891 if (ctx
->options
->key
.vs
.as_ls
)
892 declare_tess_lds(ctx
);
894 case MESA_SHADER_TESS_CTRL
:
895 set_userdata_location_shader(ctx
, AC_UD_TCS_OFFCHIP_LAYOUT
, user_sgpr_idx
, 4);
897 ctx
->tcs_offchip_layout
= LLVMGetParam(ctx
->main_function
, arg_idx
++);
898 ctx
->tcs_out_offsets
= LLVMGetParam(ctx
->main_function
, arg_idx
++);
899 ctx
->tcs_out_layout
= LLVMGetParam(ctx
->main_function
, arg_idx
++);
900 ctx
->tcs_in_layout
= LLVMGetParam(ctx
->main_function
, arg_idx
++);
901 ctx
->oc_lds
= LLVMGetParam(ctx
->main_function
, arg_idx
++);
902 ctx
->tess_factor_offset
= LLVMGetParam(ctx
->main_function
, arg_idx
++);
903 ctx
->tcs_patch_id
= LLVMGetParam(ctx
->main_function
, arg_idx
++);
904 ctx
->tcs_rel_ids
= LLVMGetParam(ctx
->main_function
, arg_idx
++);
906 declare_tess_lds(ctx
);
908 case MESA_SHADER_TESS_EVAL
:
909 set_userdata_location_shader(ctx
, AC_UD_TES_OFFCHIP_LAYOUT
, user_sgpr_idx
, 1);
911 ctx
->tcs_offchip_layout
= LLVMGetParam(ctx
->main_function
, arg_idx
++);
912 if (ctx
->options
->key
.tes
.as_es
) {
913 ctx
->oc_lds
= LLVMGetParam(ctx
->main_function
, arg_idx
++);
915 ctx
->es2gs_offset
= LLVMGetParam(ctx
->main_function
, arg_idx
++);
918 ctx
->oc_lds
= LLVMGetParam(ctx
->main_function
, arg_idx
++);
920 ctx
->tes_u
= LLVMGetParam(ctx
->main_function
, arg_idx
++);
921 ctx
->tes_v
= LLVMGetParam(ctx
->main_function
, arg_idx
++);
922 ctx
->tes_rel_patch_id
= LLVMGetParam(ctx
->main_function
, arg_idx
++);
923 ctx
->tes_patch_id
= LLVMGetParam(ctx
->main_function
, arg_idx
++);
925 case MESA_SHADER_GEOMETRY
:
926 set_userdata_location_shader(ctx
, AC_UD_GS_VS_RING_STRIDE_ENTRIES
, user_sgpr_idx
, 2);
928 ctx
->gsvs_ring_stride
= LLVMGetParam(ctx
->main_function
, arg_idx
++);
929 ctx
->gsvs_num_entries
= LLVMGetParam(ctx
->main_function
, arg_idx
++);
930 ctx
->gs2vs_offset
= LLVMGetParam(ctx
->main_function
, arg_idx
++);
931 ctx
->gs_wave_id
= LLVMGetParam(ctx
->main_function
, arg_idx
++);
932 ctx
->gs_vtx_offset
[0] = LLVMGetParam(ctx
->main_function
, arg_idx
++);
933 ctx
->gs_vtx_offset
[1] = LLVMGetParam(ctx
->main_function
, arg_idx
++);
934 ctx
->gs_prim_id
= LLVMGetParam(ctx
->main_function
, arg_idx
++);
935 ctx
->gs_vtx_offset
[2] = LLVMGetParam(ctx
->main_function
, arg_idx
++);
936 ctx
->gs_vtx_offset
[3] = LLVMGetParam(ctx
->main_function
, arg_idx
++);
937 ctx
->gs_vtx_offset
[4] = LLVMGetParam(ctx
->main_function
, arg_idx
++);
938 ctx
->gs_vtx_offset
[5] = LLVMGetParam(ctx
->main_function
, arg_idx
++);
939 ctx
->gs_invocation_id
= LLVMGetParam(ctx
->main_function
, arg_idx
++);
941 case MESA_SHADER_FRAGMENT
:
942 if (ctx
->shader_info
->info
.ps
.needs_sample_positions
) {
943 set_userdata_location_shader(ctx
, AC_UD_PS_SAMPLE_POS_OFFSET
, user_sgpr_idx
, 1);
945 ctx
->sample_pos_offset
= LLVMGetParam(ctx
->main_function
, arg_idx
++);
947 ctx
->prim_mask
= LLVMGetParam(ctx
->main_function
, arg_idx
++);
948 ctx
->persp_sample
= LLVMGetParam(ctx
->main_function
, arg_idx
++);
949 ctx
->persp_center
= LLVMGetParam(ctx
->main_function
, arg_idx
++);
950 ctx
->persp_centroid
= LLVMGetParam(ctx
->main_function
, arg_idx
++);
952 ctx
->linear_sample
= LLVMGetParam(ctx
->main_function
, arg_idx
++);
953 ctx
->linear_center
= LLVMGetParam(ctx
->main_function
, arg_idx
++);
954 ctx
->linear_centroid
= LLVMGetParam(ctx
->main_function
, arg_idx
++);
955 arg_idx
++; /* line stipple */
956 ctx
->frag_pos
[0] = LLVMGetParam(ctx
->main_function
, arg_idx
++);
957 ctx
->frag_pos
[1] = LLVMGetParam(ctx
->main_function
, arg_idx
++);
958 ctx
->frag_pos
[2] = LLVMGetParam(ctx
->main_function
, arg_idx
++);
959 ctx
->frag_pos
[3] = LLVMGetParam(ctx
->main_function
, arg_idx
++);
960 ctx
->front_face
= LLVMGetParam(ctx
->main_function
, arg_idx
++);
961 ctx
->ancillary
= LLVMGetParam(ctx
->main_function
, arg_idx
++);
962 ctx
->sample_coverage
= LLVMGetParam(ctx
->main_function
, arg_idx
++);
965 unreachable("Shader stage not implemented");
969 static void setup_types(struct nir_to_llvm_context
*ctx
)
971 LLVMValueRef args
[4];
973 ctx
->voidt
= LLVMVoidTypeInContext(ctx
->context
);
974 ctx
->i1
= LLVMIntTypeInContext(ctx
->context
, 1);
975 ctx
->i8
= LLVMIntTypeInContext(ctx
->context
, 8);
976 ctx
->i16
= LLVMIntTypeInContext(ctx
->context
, 16);
977 ctx
->i32
= LLVMIntTypeInContext(ctx
->context
, 32);
978 ctx
->i64
= LLVMIntTypeInContext(ctx
->context
, 64);
979 ctx
->v2i32
= LLVMVectorType(ctx
->i32
, 2);
980 ctx
->v3i32
= LLVMVectorType(ctx
->i32
, 3);
981 ctx
->v4i32
= LLVMVectorType(ctx
->i32
, 4);
982 ctx
->v8i32
= LLVMVectorType(ctx
->i32
, 8);
983 ctx
->f32
= LLVMFloatTypeInContext(ctx
->context
);
984 ctx
->f16
= LLVMHalfTypeInContext(ctx
->context
);
985 ctx
->f64
= LLVMDoubleTypeInContext(ctx
->context
);
986 ctx
->v2f32
= LLVMVectorType(ctx
->f32
, 2);
987 ctx
->v4f32
= LLVMVectorType(ctx
->f32
, 4);
988 ctx
->v16i8
= LLVMVectorType(ctx
->i8
, 16);
990 ctx
->i1false
= LLVMConstInt(ctx
->i1
, 0, false);
991 ctx
->i1true
= LLVMConstInt(ctx
->i1
, 1, false);
992 ctx
->i32zero
= LLVMConstInt(ctx
->i32
, 0, false);
993 ctx
->i32one
= LLVMConstInt(ctx
->i32
, 1, false);
994 ctx
->f32zero
= LLVMConstReal(ctx
->f32
, 0.0);
995 ctx
->f32one
= LLVMConstReal(ctx
->f32
, 1.0);
997 args
[0] = ctx
->f32zero
;
998 args
[1] = ctx
->f32zero
;
999 args
[2] = ctx
->f32zero
;
1000 args
[3] = ctx
->f32one
;
1001 ctx
->v4f32empty
= LLVMConstVector(args
, 4);
1003 ctx
->uniform_md_kind
=
1004 LLVMGetMDKindIDInContext(ctx
->context
, "amdgpu.uniform", 14);
1005 ctx
->empty_md
= LLVMMDNodeInContext(ctx
->context
, NULL
, 0);
1007 args
[0] = LLVMConstReal(ctx
->f32
, 2.5);
1010 static int get_llvm_num_components(LLVMValueRef value
)
1012 LLVMTypeRef type
= LLVMTypeOf(value
);
1013 unsigned num_components
= LLVMGetTypeKind(type
) == LLVMVectorTypeKind
1014 ? LLVMGetVectorSize(type
)
1016 return num_components
;
1019 static LLVMValueRef
llvm_extract_elem(struct nir_to_llvm_context
*ctx
,
1023 int count
= get_llvm_num_components(value
);
1025 assert(index
< count
);
1029 return LLVMBuildExtractElement(ctx
->builder
, value
,
1030 LLVMConstInt(ctx
->i32
, index
, false), "");
1033 static LLVMValueRef
trim_vector(struct nir_to_llvm_context
*ctx
,
1034 LLVMValueRef value
, unsigned count
)
1036 unsigned num_components
= get_llvm_num_components(value
);
1037 if (count
== num_components
)
1040 LLVMValueRef masks
[] = {
1041 LLVMConstInt(ctx
->i32
, 0, false), LLVMConstInt(ctx
->i32
, 1, false),
1042 LLVMConstInt(ctx
->i32
, 2, false), LLVMConstInt(ctx
->i32
, 3, false)};
1045 return LLVMBuildExtractElement(ctx
->builder
, value
, masks
[0],
1048 LLVMValueRef swizzle
= LLVMConstVector(masks
, count
);
1049 return LLVMBuildShuffleVector(ctx
->builder
, value
, value
, swizzle
, "");
1053 build_store_values_extended(struct nir_to_llvm_context
*ctx
,
1054 LLVMValueRef
*values
,
1055 unsigned value_count
,
1056 unsigned value_stride
,
1059 LLVMBuilderRef builder
= ctx
->builder
;
1062 if (value_count
== 1) {
1063 LLVMBuildStore(builder
, vec
, values
[0]);
1067 for (i
= 0; i
< value_count
; i
++) {
1068 LLVMValueRef ptr
= values
[i
* value_stride
];
1069 LLVMValueRef index
= LLVMConstInt(ctx
->i32
, i
, false);
1070 LLVMValueRef value
= LLVMBuildExtractElement(builder
, vec
, index
, "");
1071 LLVMBuildStore(builder
, value
, ptr
);
1075 static LLVMTypeRef
get_def_type(struct nir_to_llvm_context
*ctx
,
1078 LLVMTypeRef type
= LLVMIntTypeInContext(ctx
->context
, def
->bit_size
);
1079 if (def
->num_components
> 1) {
1080 type
= LLVMVectorType(type
, def
->num_components
);
1085 static LLVMValueRef
get_src(struct nir_to_llvm_context
*ctx
, nir_src src
)
1088 struct hash_entry
*entry
= _mesa_hash_table_search(ctx
->defs
, src
.ssa
);
1089 return (LLVMValueRef
)entry
->data
;
1093 static LLVMBasicBlockRef
get_block(struct nir_to_llvm_context
*ctx
,
1094 struct nir_block
*b
)
1096 struct hash_entry
*entry
= _mesa_hash_table_search(ctx
->defs
, b
);
1097 return (LLVMBasicBlockRef
)entry
->data
;
1100 static LLVMValueRef
get_alu_src(struct nir_to_llvm_context
*ctx
,
1102 unsigned num_components
)
1104 LLVMValueRef value
= get_src(ctx
, src
.src
);
1105 bool need_swizzle
= false;
1108 LLVMTypeRef type
= LLVMTypeOf(value
);
1109 unsigned src_components
= LLVMGetTypeKind(type
) == LLVMVectorTypeKind
1110 ? LLVMGetVectorSize(type
)
1113 for (unsigned i
= 0; i
< num_components
; ++i
) {
1114 assert(src
.swizzle
[i
] < src_components
);
1115 if (src
.swizzle
[i
] != i
)
1116 need_swizzle
= true;
1119 if (need_swizzle
|| num_components
!= src_components
) {
1120 LLVMValueRef masks
[] = {
1121 LLVMConstInt(ctx
->i32
, src
.swizzle
[0], false),
1122 LLVMConstInt(ctx
->i32
, src
.swizzle
[1], false),
1123 LLVMConstInt(ctx
->i32
, src
.swizzle
[2], false),
1124 LLVMConstInt(ctx
->i32
, src
.swizzle
[3], false)};
1126 if (src_components
> 1 && num_components
== 1) {
1127 value
= LLVMBuildExtractElement(ctx
->builder
, value
,
1129 } else if (src_components
== 1 && num_components
> 1) {
1130 LLVMValueRef values
[] = {value
, value
, value
, value
};
1131 value
= ac_build_gather_values(&ctx
->ac
, values
, num_components
);
1133 LLVMValueRef swizzle
= LLVMConstVector(masks
, num_components
);
1134 value
= LLVMBuildShuffleVector(ctx
->builder
, value
, value
,
1138 assert(!src
.negate
);
1143 static LLVMValueRef
emit_int_cmp(struct nir_to_llvm_context
*ctx
,
1144 LLVMIntPredicate pred
, LLVMValueRef src0
,
1147 LLVMValueRef result
= LLVMBuildICmp(ctx
->builder
, pred
, src0
, src1
, "");
1148 return LLVMBuildSelect(ctx
->builder
, result
,
1149 LLVMConstInt(ctx
->i32
, 0xFFFFFFFF, false),
1150 LLVMConstInt(ctx
->i32
, 0, false), "");
1153 static LLVMValueRef
emit_float_cmp(struct nir_to_llvm_context
*ctx
,
1154 LLVMRealPredicate pred
, LLVMValueRef src0
,
1157 LLVMValueRef result
;
1158 src0
= to_float(ctx
, src0
);
1159 src1
= to_float(ctx
, src1
);
1160 result
= LLVMBuildFCmp(ctx
->builder
, pred
, src0
, src1
, "");
1161 return LLVMBuildSelect(ctx
->builder
, result
,
1162 LLVMConstInt(ctx
->i32
, 0xFFFFFFFF, false),
1163 LLVMConstInt(ctx
->i32
, 0, false), "");
1166 static LLVMValueRef
emit_intrin_1f_param(struct nir_to_llvm_context
*ctx
,
1168 LLVMTypeRef result_type
,
1172 LLVMValueRef params
[] = {
1173 to_float(ctx
, src0
),
1176 sprintf(name
, "%s.f%d", intrin
, get_elem_bits(ctx
, result_type
));
1177 return ac_build_intrinsic(&ctx
->ac
, name
, result_type
, params
, 1, AC_FUNC_ATTR_READNONE
);
1180 static LLVMValueRef
emit_intrin_2f_param(struct nir_to_llvm_context
*ctx
,
1182 LLVMTypeRef result_type
,
1183 LLVMValueRef src0
, LLVMValueRef src1
)
1186 LLVMValueRef params
[] = {
1187 to_float(ctx
, src0
),
1188 to_float(ctx
, src1
),
1191 sprintf(name
, "%s.f%d", intrin
, get_elem_bits(ctx
, result_type
));
1192 return ac_build_intrinsic(&ctx
->ac
, name
, result_type
, params
, 2, AC_FUNC_ATTR_READNONE
);
1195 static LLVMValueRef
emit_intrin_3f_param(struct nir_to_llvm_context
*ctx
,
1197 LLVMTypeRef result_type
,
1198 LLVMValueRef src0
, LLVMValueRef src1
, LLVMValueRef src2
)
1201 LLVMValueRef params
[] = {
1202 to_float(ctx
, src0
),
1203 to_float(ctx
, src1
),
1204 to_float(ctx
, src2
),
1207 sprintf(name
, "%s.f%d", intrin
, get_elem_bits(ctx
, result_type
));
1208 return ac_build_intrinsic(&ctx
->ac
, name
, result_type
, params
, 3, AC_FUNC_ATTR_READNONE
);
1211 static LLVMValueRef
emit_bcsel(struct nir_to_llvm_context
*ctx
,
1212 LLVMValueRef src0
, LLVMValueRef src1
, LLVMValueRef src2
)
1214 LLVMValueRef v
= LLVMBuildICmp(ctx
->builder
, LLVMIntNE
, src0
,
1216 return LLVMBuildSelect(ctx
->builder
, v
, src1
, src2
, "");
1219 static LLVMValueRef
emit_find_lsb(struct nir_to_llvm_context
*ctx
,
1222 LLVMValueRef params
[2] = {
1225 /* The value of 1 means that ffs(x=0) = undef, so LLVM won't
1226 * add special code to check for x=0. The reason is that
1227 * the LLVM behavior for x=0 is different from what we
1230 * The hardware already implements the correct behavior.
1232 LLVMConstInt(ctx
->i32
, 1, false),
1234 return ac_build_intrinsic(&ctx
->ac
, "llvm.cttz.i32", ctx
->i32
, params
, 2, AC_FUNC_ATTR_READNONE
);
1237 static LLVMValueRef
emit_ifind_msb(struct nir_to_llvm_context
*ctx
,
1240 return ac_build_imsb(&ctx
->ac
, src0
, ctx
->i32
);
1243 static LLVMValueRef
emit_ufind_msb(struct nir_to_llvm_context
*ctx
,
1246 return ac_build_umsb(&ctx
->ac
, src0
, ctx
->i32
);
1249 static LLVMValueRef
emit_minmax_int(struct nir_to_llvm_context
*ctx
,
1250 LLVMIntPredicate pred
,
1251 LLVMValueRef src0
, LLVMValueRef src1
)
1253 return LLVMBuildSelect(ctx
->builder
,
1254 LLVMBuildICmp(ctx
->builder
, pred
, src0
, src1
, ""),
1259 static LLVMValueRef
emit_iabs(struct nir_to_llvm_context
*ctx
,
1262 return emit_minmax_int(ctx
, LLVMIntSGT
, src0
,
1263 LLVMBuildNeg(ctx
->builder
, src0
, ""));
1266 static LLVMValueRef
emit_fsign(struct nir_to_llvm_context
*ctx
,
1269 LLVMValueRef cmp
, val
;
1271 cmp
= LLVMBuildFCmp(ctx
->builder
, LLVMRealOGT
, src0
, ctx
->f32zero
, "");
1272 val
= LLVMBuildSelect(ctx
->builder
, cmp
, ctx
->f32one
, src0
, "");
1273 cmp
= LLVMBuildFCmp(ctx
->builder
, LLVMRealOGE
, val
, ctx
->f32zero
, "");
1274 val
= LLVMBuildSelect(ctx
->builder
, cmp
, val
, LLVMConstReal(ctx
->f32
, -1.0), "");
1278 static LLVMValueRef
emit_isign(struct nir_to_llvm_context
*ctx
,
1281 LLVMValueRef cmp
, val
;
1283 cmp
= LLVMBuildICmp(ctx
->builder
, LLVMIntSGT
, src0
, ctx
->i32zero
, "");
1284 val
= LLVMBuildSelect(ctx
->builder
, cmp
, ctx
->i32one
, src0
, "");
1285 cmp
= LLVMBuildICmp(ctx
->builder
, LLVMIntSGE
, val
, ctx
->i32zero
, "");
1286 val
= LLVMBuildSelect(ctx
->builder
, cmp
, val
, LLVMConstInt(ctx
->i32
, -1, true), "");
1290 static LLVMValueRef
emit_ffract(struct nir_to_llvm_context
*ctx
,
1293 const char *intr
= "llvm.floor.f32";
1294 LLVMValueRef fsrc0
= to_float(ctx
, src0
);
1295 LLVMValueRef params
[] = {
1298 LLVMValueRef floor
= ac_build_intrinsic(&ctx
->ac
, intr
,
1299 ctx
->f32
, params
, 1,
1300 AC_FUNC_ATTR_READNONE
);
1301 return LLVMBuildFSub(ctx
->builder
, fsrc0
, floor
, "");
1304 static LLVMValueRef
emit_uint_carry(struct nir_to_llvm_context
*ctx
,
1306 LLVMValueRef src0
, LLVMValueRef src1
)
1308 LLVMTypeRef ret_type
;
1309 LLVMTypeRef types
[] = { ctx
->i32
, ctx
->i1
};
1311 LLVMValueRef params
[] = { src0
, src1
};
1312 ret_type
= LLVMStructTypeInContext(ctx
->context
, types
,
1315 res
= ac_build_intrinsic(&ctx
->ac
, intrin
, ret_type
,
1316 params
, 2, AC_FUNC_ATTR_READNONE
);
1318 res
= LLVMBuildExtractValue(ctx
->builder
, res
, 1, "");
1319 res
= LLVMBuildZExt(ctx
->builder
, res
, ctx
->i32
, "");
1323 static LLVMValueRef
emit_b2f(struct nir_to_llvm_context
*ctx
,
1326 return LLVMBuildAnd(ctx
->builder
, src0
, LLVMBuildBitCast(ctx
->builder
, LLVMConstReal(ctx
->f32
, 1.0), ctx
->i32
, ""), "");
1329 static LLVMValueRef
emit_umul_high(struct nir_to_llvm_context
*ctx
,
1330 LLVMValueRef src0
, LLVMValueRef src1
)
1332 LLVMValueRef dst64
, result
;
1333 src0
= LLVMBuildZExt(ctx
->builder
, src0
, ctx
->i64
, "");
1334 src1
= LLVMBuildZExt(ctx
->builder
, src1
, ctx
->i64
, "");
1336 dst64
= LLVMBuildMul(ctx
->builder
, src0
, src1
, "");
1337 dst64
= LLVMBuildLShr(ctx
->builder
, dst64
, LLVMConstInt(ctx
->i64
, 32, false), "");
1338 result
= LLVMBuildTrunc(ctx
->builder
, dst64
, ctx
->i32
, "");
1342 static LLVMValueRef
emit_imul_high(struct nir_to_llvm_context
*ctx
,
1343 LLVMValueRef src0
, LLVMValueRef src1
)
1345 LLVMValueRef dst64
, result
;
1346 src0
= LLVMBuildSExt(ctx
->builder
, src0
, ctx
->i64
, "");
1347 src1
= LLVMBuildSExt(ctx
->builder
, src1
, ctx
->i64
, "");
1349 dst64
= LLVMBuildMul(ctx
->builder
, src0
, src1
, "");
1350 dst64
= LLVMBuildAShr(ctx
->builder
, dst64
, LLVMConstInt(ctx
->i64
, 32, false), "");
1351 result
= LLVMBuildTrunc(ctx
->builder
, dst64
, ctx
->i32
, "");
1355 static LLVMValueRef
emit_bitfield_extract(struct nir_to_llvm_context
*ctx
,
1357 LLVMValueRef srcs
[3])
1359 LLVMValueRef result
;
1360 LLVMValueRef icond
= LLVMBuildICmp(ctx
->builder
, LLVMIntEQ
, srcs
[2], LLVMConstInt(ctx
->i32
, 32, false), "");
1362 result
= ac_build_bfe(&ctx
->ac
, srcs
[0], srcs
[1], srcs
[2], is_signed
);
1363 result
= LLVMBuildSelect(ctx
->builder
, icond
, srcs
[0], result
, "");
1367 static LLVMValueRef
emit_bitfield_insert(struct nir_to_llvm_context
*ctx
,
1368 LLVMValueRef src0
, LLVMValueRef src1
,
1369 LLVMValueRef src2
, LLVMValueRef src3
)
1371 LLVMValueRef bfi_args
[3], result
;
1373 bfi_args
[0] = LLVMBuildShl(ctx
->builder
,
1374 LLVMBuildSub(ctx
->builder
,
1375 LLVMBuildShl(ctx
->builder
,
1380 bfi_args
[1] = LLVMBuildShl(ctx
->builder
, src1
, src2
, "");
1383 LLVMValueRef icond
= LLVMBuildICmp(ctx
->builder
, LLVMIntEQ
, src3
, LLVMConstInt(ctx
->i32
, 32, false), "");
1386 * (arg0 & arg1) | (~arg0 & arg2) = arg2 ^ (arg0 & (arg1 ^ arg2)
1387 * Use the right-hand side, which the LLVM backend can convert to V_BFI.
1389 result
= LLVMBuildXor(ctx
->builder
, bfi_args
[2],
1390 LLVMBuildAnd(ctx
->builder
, bfi_args
[0],
1391 LLVMBuildXor(ctx
->builder
, bfi_args
[1], bfi_args
[2], ""), ""), "");
1393 result
= LLVMBuildSelect(ctx
->builder
, icond
, src1
, result
, "");
1397 static LLVMValueRef
emit_pack_half_2x16(struct nir_to_llvm_context
*ctx
,
1400 LLVMValueRef const16
= LLVMConstInt(ctx
->i32
, 16, false);
1402 LLVMValueRef comp
[2];
1404 src0
= to_float(ctx
, src0
);
1405 comp
[0] = LLVMBuildExtractElement(ctx
->builder
, src0
, ctx
->i32zero
, "");
1406 comp
[1] = LLVMBuildExtractElement(ctx
->builder
, src0
, ctx
->i32one
, "");
1407 for (i
= 0; i
< 2; i
++) {
1408 comp
[i
] = LLVMBuildFPTrunc(ctx
->builder
, comp
[i
], ctx
->f16
, "");
1409 comp
[i
] = LLVMBuildBitCast(ctx
->builder
, comp
[i
], ctx
->i16
, "");
1410 comp
[i
] = LLVMBuildZExt(ctx
->builder
, comp
[i
], ctx
->i32
, "");
1413 comp
[1] = LLVMBuildShl(ctx
->builder
, comp
[1], const16
, "");
1414 comp
[0] = LLVMBuildOr(ctx
->builder
, comp
[0], comp
[1], "");
1419 static LLVMValueRef
emit_unpack_half_2x16(struct nir_to_llvm_context
*ctx
,
1422 LLVMValueRef const16
= LLVMConstInt(ctx
->i32
, 16, false);
1423 LLVMValueRef temps
[2], result
, val
;
1426 for (i
= 0; i
< 2; i
++) {
1427 val
= i
== 1 ? LLVMBuildLShr(ctx
->builder
, src0
, const16
, "") : src0
;
1428 val
= LLVMBuildTrunc(ctx
->builder
, val
, ctx
->i16
, "");
1429 val
= LLVMBuildBitCast(ctx
->builder
, val
, ctx
->f16
, "");
1430 temps
[i
] = LLVMBuildFPExt(ctx
->builder
, val
, ctx
->f32
, "");
1433 result
= LLVMBuildInsertElement(ctx
->builder
, LLVMGetUndef(ctx
->v2f32
), temps
[0],
1435 result
= LLVMBuildInsertElement(ctx
->builder
, result
, temps
[1],
1440 static LLVMValueRef
emit_ddxy(struct nir_to_llvm_context
*ctx
,
1446 LLVMValueRef result
;
1447 ctx
->has_ddxy
= true;
1449 if (!ctx
->lds
&& !ctx
->has_ds_bpermute
)
1450 ctx
->lds
= LLVMAddGlobalInAddressSpace(ctx
->module
,
1451 LLVMArrayType(ctx
->i32
, 64),
1452 "ddxy_lds", LOCAL_ADDR_SPACE
);
1454 if (op
== nir_op_fddx_fine
|| op
== nir_op_fddx
)
1455 mask
= AC_TID_MASK_LEFT
;
1456 else if (op
== nir_op_fddy_fine
|| op
== nir_op_fddy
)
1457 mask
= AC_TID_MASK_TOP
;
1459 mask
= AC_TID_MASK_TOP_LEFT
;
1461 /* for DDX we want to next X pixel, DDY next Y pixel. */
1462 if (op
== nir_op_fddx_fine
||
1463 op
== nir_op_fddx_coarse
||
1469 result
= ac_build_ddxy(&ctx
->ac
, ctx
->has_ds_bpermute
,
1470 mask
, idx
, ctx
->lds
,
1476 * this takes an I,J coordinate pair,
1477 * and works out the X and Y derivatives.
1478 * it returns DDX(I), DDX(J), DDY(I), DDY(J).
1480 static LLVMValueRef
emit_ddxy_interp(
1481 struct nir_to_llvm_context
*ctx
,
1482 LLVMValueRef interp_ij
)
1484 LLVMValueRef result
[4], a
;
1487 for (i
= 0; i
< 2; i
++) {
1488 a
= LLVMBuildExtractElement(ctx
->builder
, interp_ij
,
1489 LLVMConstInt(ctx
->i32
, i
, false), "");
1490 result
[i
] = emit_ddxy(ctx
, nir_op_fddx
, a
);
1491 result
[2+i
] = emit_ddxy(ctx
, nir_op_fddy
, a
);
1493 return ac_build_gather_values(&ctx
->ac
, result
, 4);
1496 static void visit_alu(struct nir_to_llvm_context
*ctx
, nir_alu_instr
*instr
)
1498 LLVMValueRef src
[4], result
= NULL
;
1499 unsigned num_components
= instr
->dest
.dest
.ssa
.num_components
;
1500 unsigned src_components
;
1501 LLVMTypeRef def_type
= get_def_type(ctx
, &instr
->dest
.dest
.ssa
);
1503 assert(nir_op_infos
[instr
->op
].num_inputs
<= ARRAY_SIZE(src
));
1504 switch (instr
->op
) {
1510 case nir_op_pack_half_2x16
:
1513 case nir_op_unpack_half_2x16
:
1517 src_components
= num_components
;
1520 for (unsigned i
= 0; i
< nir_op_infos
[instr
->op
].num_inputs
; i
++)
1521 src
[i
] = get_alu_src(ctx
, instr
->src
[i
], src_components
);
1523 switch (instr
->op
) {
1529 src
[0] = to_float(ctx
, src
[0]);
1530 result
= LLVMBuildFNeg(ctx
->builder
, src
[0], "");
1533 result
= LLVMBuildNeg(ctx
->builder
, src
[0], "");
1536 result
= LLVMBuildNot(ctx
->builder
, src
[0], "");
1539 result
= LLVMBuildAdd(ctx
->builder
, src
[0], src
[1], "");
1542 src
[0] = to_float(ctx
, src
[0]);
1543 src
[1] = to_float(ctx
, src
[1]);
1544 result
= LLVMBuildFAdd(ctx
->builder
, src
[0], src
[1], "");
1547 src
[0] = to_float(ctx
, src
[0]);
1548 src
[1] = to_float(ctx
, src
[1]);
1549 result
= LLVMBuildFSub(ctx
->builder
, src
[0], src
[1], "");
1552 result
= LLVMBuildSub(ctx
->builder
, src
[0], src
[1], "");
1555 result
= LLVMBuildMul(ctx
->builder
, src
[0], src
[1], "");
1558 result
= LLVMBuildSRem(ctx
->builder
, src
[0], src
[1], "");
1561 result
= LLVMBuildURem(ctx
->builder
, src
[0], src
[1], "");
1564 src
[0] = to_float(ctx
, src
[0]);
1565 src
[1] = to_float(ctx
, src
[1]);
1566 result
= ac_build_fdiv(&ctx
->ac
, src
[0], src
[1]);
1567 result
= emit_intrin_1f_param(ctx
, "llvm.floor",
1568 to_float_type(ctx
, def_type
), result
);
1569 result
= LLVMBuildFMul(ctx
->builder
, src
[1] , result
, "");
1570 result
= LLVMBuildFSub(ctx
->builder
, src
[0], result
, "");
1573 src
[0] = to_float(ctx
, src
[0]);
1574 src
[1] = to_float(ctx
, src
[1]);
1575 result
= LLVMBuildFRem(ctx
->builder
, src
[0], src
[1], "");
1578 result
= LLVMBuildSRem(ctx
->builder
, src
[0], src
[1], "");
1581 result
= LLVMBuildSDiv(ctx
->builder
, src
[0], src
[1], "");
1584 result
= LLVMBuildUDiv(ctx
->builder
, src
[0], src
[1], "");
1587 src
[0] = to_float(ctx
, src
[0]);
1588 src
[1] = to_float(ctx
, src
[1]);
1589 result
= LLVMBuildFMul(ctx
->builder
, src
[0], src
[1], "");
1592 src
[0] = to_float(ctx
, src
[0]);
1593 src
[1] = to_float(ctx
, src
[1]);
1594 result
= ac_build_fdiv(&ctx
->ac
, src
[0], src
[1]);
1597 src
[0] = to_float(ctx
, src
[0]);
1598 result
= ac_build_fdiv(&ctx
->ac
, ctx
->f32one
, src
[0]);
1601 result
= LLVMBuildAnd(ctx
->builder
, src
[0], src
[1], "");
1604 result
= LLVMBuildOr(ctx
->builder
, src
[0], src
[1], "");
1607 result
= LLVMBuildXor(ctx
->builder
, src
[0], src
[1], "");
1610 result
= LLVMBuildShl(ctx
->builder
, src
[0], src
[1], "");
1613 result
= LLVMBuildAShr(ctx
->builder
, src
[0], src
[1], "");
1616 result
= LLVMBuildLShr(ctx
->builder
, src
[0], src
[1], "");
1619 result
= emit_int_cmp(ctx
, LLVMIntSLT
, src
[0], src
[1]);
1622 result
= emit_int_cmp(ctx
, LLVMIntNE
, src
[0], src
[1]);
1625 result
= emit_int_cmp(ctx
, LLVMIntEQ
, src
[0], src
[1]);
1628 result
= emit_int_cmp(ctx
, LLVMIntSGE
, src
[0], src
[1]);
1631 result
= emit_int_cmp(ctx
, LLVMIntULT
, src
[0], src
[1]);
1634 result
= emit_int_cmp(ctx
, LLVMIntUGE
, src
[0], src
[1]);
1637 result
= emit_float_cmp(ctx
, LLVMRealUEQ
, src
[0], src
[1]);
1640 result
= emit_float_cmp(ctx
, LLVMRealUNE
, src
[0], src
[1]);
1643 result
= emit_float_cmp(ctx
, LLVMRealULT
, src
[0], src
[1]);
1646 result
= emit_float_cmp(ctx
, LLVMRealUGE
, src
[0], src
[1]);
1649 result
= emit_intrin_1f_param(ctx
, "llvm.fabs",
1650 to_float_type(ctx
, def_type
), src
[0]);
1653 result
= emit_iabs(ctx
, src
[0]);
1656 result
= emit_minmax_int(ctx
, LLVMIntSGT
, src
[0], src
[1]);
1659 result
= emit_minmax_int(ctx
, LLVMIntSLT
, src
[0], src
[1]);
1662 result
= emit_minmax_int(ctx
, LLVMIntUGT
, src
[0], src
[1]);
1665 result
= emit_minmax_int(ctx
, LLVMIntULT
, src
[0], src
[1]);
1668 result
= emit_isign(ctx
, src
[0]);
1671 src
[0] = to_float(ctx
, src
[0]);
1672 result
= emit_fsign(ctx
, src
[0]);
1675 result
= emit_intrin_1f_param(ctx
, "llvm.floor",
1676 to_float_type(ctx
, def_type
), src
[0]);
1679 result
= emit_intrin_1f_param(ctx
, "llvm.trunc",
1680 to_float_type(ctx
, def_type
), src
[0]);
1683 result
= emit_intrin_1f_param(ctx
, "llvm.ceil",
1684 to_float_type(ctx
, def_type
), src
[0]);
1686 case nir_op_fround_even
:
1687 result
= emit_intrin_1f_param(ctx
, "llvm.rint",
1688 to_float_type(ctx
, def_type
),src
[0]);
1691 result
= emit_ffract(ctx
, src
[0]);
1694 result
= emit_intrin_1f_param(ctx
, "llvm.sin",
1695 to_float_type(ctx
, def_type
), src
[0]);
1698 result
= emit_intrin_1f_param(ctx
, "llvm.cos",
1699 to_float_type(ctx
, def_type
), src
[0]);
1702 result
= emit_intrin_1f_param(ctx
, "llvm.sqrt",
1703 to_float_type(ctx
, def_type
), src
[0]);
1706 result
= emit_intrin_1f_param(ctx
, "llvm.exp2",
1707 to_float_type(ctx
, def_type
), src
[0]);
1710 result
= emit_intrin_1f_param(ctx
, "llvm.log2",
1711 to_float_type(ctx
, def_type
), src
[0]);
1714 result
= emit_intrin_1f_param(ctx
, "llvm.sqrt",
1715 to_float_type(ctx
, def_type
), src
[0]);
1716 result
= ac_build_fdiv(&ctx
->ac
, ctx
->f32one
, result
);
1719 result
= emit_intrin_2f_param(ctx
, "llvm.pow",
1720 to_float_type(ctx
, def_type
), src
[0], src
[1]);
1723 result
= emit_intrin_2f_param(ctx
, "llvm.maxnum",
1724 to_float_type(ctx
, def_type
), src
[0], src
[1]);
1727 result
= emit_intrin_2f_param(ctx
, "llvm.minnum",
1728 to_float_type(ctx
, def_type
), src
[0], src
[1]);
1731 result
= emit_intrin_3f_param(ctx
, "llvm.fma",
1732 to_float_type(ctx
, def_type
), src
[0], src
[1], src
[2]);
1734 case nir_op_ibitfield_extract
:
1735 result
= emit_bitfield_extract(ctx
, true, src
);
1737 case nir_op_ubitfield_extract
:
1738 result
= emit_bitfield_extract(ctx
, false, src
);
1740 case nir_op_bitfield_insert
:
1741 result
= emit_bitfield_insert(ctx
, src
[0], src
[1], src
[2], src
[3]);
1743 case nir_op_bitfield_reverse
:
1744 result
= ac_build_intrinsic(&ctx
->ac
, "llvm.bitreverse.i32", ctx
->i32
, src
, 1, AC_FUNC_ATTR_READNONE
);
1746 case nir_op_bit_count
:
1747 result
= ac_build_intrinsic(&ctx
->ac
, "llvm.ctpop.i32", ctx
->i32
, src
, 1, AC_FUNC_ATTR_READNONE
);
1752 for (unsigned i
= 0; i
< nir_op_infos
[instr
->op
].num_inputs
; i
++)
1753 src
[i
] = to_integer(ctx
, src
[i
]);
1754 result
= ac_build_gather_values(&ctx
->ac
, src
, num_components
);
1758 src
[0] = to_float(ctx
, src
[0]);
1759 result
= LLVMBuildFPToSI(ctx
->builder
, src
[0], def_type
, "");
1763 src
[0] = to_float(ctx
, src
[0]);
1764 result
= LLVMBuildFPToUI(ctx
->builder
, src
[0], def_type
, "");
1768 result
= LLVMBuildSIToFP(ctx
->builder
, src
[0], to_float_type(ctx
, def_type
), "");
1772 result
= LLVMBuildUIToFP(ctx
->builder
, src
[0], to_float_type(ctx
, def_type
), "");
1775 result
= LLVMBuildFPExt(ctx
->builder
, src
[0], to_float_type(ctx
, def_type
), "");
1778 result
= LLVMBuildFPTrunc(ctx
->builder
, src
[0], to_float_type(ctx
, def_type
), "");
1782 if (get_elem_bits(ctx
, LLVMTypeOf(src
[0])) < get_elem_bits(ctx
, def_type
))
1783 result
= LLVMBuildZExt(ctx
->builder
, src
[0], def_type
, "");
1785 result
= LLVMBuildTrunc(ctx
->builder
, src
[0], def_type
, "");
1789 if (get_elem_bits(ctx
, LLVMTypeOf(src
[0])) < get_elem_bits(ctx
, def_type
))
1790 result
= LLVMBuildSExt(ctx
->builder
, src
[0], def_type
, "");
1792 result
= LLVMBuildTrunc(ctx
->builder
, src
[0], def_type
, "");
1795 result
= emit_bcsel(ctx
, src
[0], src
[1], src
[2]);
1797 case nir_op_find_lsb
:
1798 result
= emit_find_lsb(ctx
, src
[0]);
1800 case nir_op_ufind_msb
:
1801 result
= emit_ufind_msb(ctx
, src
[0]);
1803 case nir_op_ifind_msb
:
1804 result
= emit_ifind_msb(ctx
, src
[0]);
1806 case nir_op_uadd_carry
:
1807 result
= emit_uint_carry(ctx
, "llvm.uadd.with.overflow.i32", src
[0], src
[1]);
1809 case nir_op_usub_borrow
:
1810 result
= emit_uint_carry(ctx
, "llvm.usub.with.overflow.i32", src
[0], src
[1]);
1813 result
= emit_b2f(ctx
, src
[0]);
1815 case nir_op_fquantize2f16
:
1816 src
[0] = to_float(ctx
, src
[0]);
1817 result
= LLVMBuildFPTrunc(ctx
->builder
, src
[0], ctx
->f16
, "");
1818 /* need to convert back up to f32 */
1819 result
= LLVMBuildFPExt(ctx
->builder
, result
, ctx
->f32
, "");
1821 case nir_op_umul_high
:
1822 result
= emit_umul_high(ctx
, src
[0], src
[1]);
1824 case nir_op_imul_high
:
1825 result
= emit_imul_high(ctx
, src
[0], src
[1]);
1827 case nir_op_pack_half_2x16
:
1828 result
= emit_pack_half_2x16(ctx
, src
[0]);
1830 case nir_op_unpack_half_2x16
:
1831 result
= emit_unpack_half_2x16(ctx
, src
[0]);
1835 case nir_op_fddx_fine
:
1836 case nir_op_fddy_fine
:
1837 case nir_op_fddx_coarse
:
1838 case nir_op_fddy_coarse
:
1839 result
= emit_ddxy(ctx
, instr
->op
, src
[0]);
1842 fprintf(stderr
, "Unknown NIR alu instr: ");
1843 nir_print_instr(&instr
->instr
, stderr
);
1844 fprintf(stderr
, "\n");
1849 assert(instr
->dest
.dest
.is_ssa
);
1850 result
= to_integer(ctx
, result
);
1851 _mesa_hash_table_insert(ctx
->defs
, &instr
->dest
.dest
.ssa
,
1856 static void visit_load_const(struct nir_to_llvm_context
*ctx
,
1857 nir_load_const_instr
*instr
)
1859 LLVMValueRef values
[4], value
= NULL
;
1860 LLVMTypeRef element_type
=
1861 LLVMIntTypeInContext(ctx
->context
, instr
->def
.bit_size
);
1863 for (unsigned i
= 0; i
< instr
->def
.num_components
; ++i
) {
1864 switch (instr
->def
.bit_size
) {
1866 values
[i
] = LLVMConstInt(element_type
,
1867 instr
->value
.u32
[i
], false);
1870 values
[i
] = LLVMConstInt(element_type
,
1871 instr
->value
.u64
[i
], false);
1875 "unsupported nir load_const bit_size: %d\n",
1876 instr
->def
.bit_size
);
1880 if (instr
->def
.num_components
> 1) {
1881 value
= LLVMConstVector(values
, instr
->def
.num_components
);
1885 _mesa_hash_table_insert(ctx
->defs
, &instr
->def
, value
);
1888 static LLVMValueRef
cast_ptr(struct nir_to_llvm_context
*ctx
, LLVMValueRef ptr
,
1891 int addr_space
= LLVMGetPointerAddressSpace(LLVMTypeOf(ptr
));
1892 return LLVMBuildBitCast(ctx
->builder
, ptr
,
1893 LLVMPointerType(type
, addr_space
), "");
1897 get_buffer_size(struct nir_to_llvm_context
*ctx
, LLVMValueRef descriptor
, bool in_elements
)
1900 LLVMBuildExtractElement(ctx
->builder
, descriptor
,
1901 LLVMConstInt(ctx
->i32
, 2, false), "");
1904 if (ctx
->options
->chip_class
>= VI
&& in_elements
) {
1905 /* On VI, the descriptor contains the size in bytes,
1906 * but TXQ must return the size in elements.
1907 * The stride is always non-zero for resources using TXQ.
1909 LLVMValueRef stride
=
1910 LLVMBuildExtractElement(ctx
->builder
, descriptor
,
1911 LLVMConstInt(ctx
->i32
, 1, false), "");
1912 stride
= LLVMBuildLShr(ctx
->builder
, stride
,
1913 LLVMConstInt(ctx
->i32
, 16, false), "");
1914 stride
= LLVMBuildAnd(ctx
->builder
, stride
,
1915 LLVMConstInt(ctx
->i32
, 0x3fff, false), "");
1917 size
= LLVMBuildUDiv(ctx
->builder
, size
, stride
, "");
1923 * Given the i32 or vNi32 \p type, generate the textual name (e.g. for use with
1926 static void build_int_type_name(
1928 char *buf
, unsigned bufsize
)
1930 assert(bufsize
>= 6);
1932 if (LLVMGetTypeKind(type
) == LLVMVectorTypeKind
)
1933 snprintf(buf
, bufsize
, "v%ui32",
1934 LLVMGetVectorSize(type
));
1939 static LLVMValueRef
radv_lower_gather4_integer(struct nir_to_llvm_context
*ctx
,
1940 struct ac_image_args
*args
,
1941 nir_tex_instr
*instr
)
1943 enum glsl_base_type stype
= glsl_get_sampler_result_type(instr
->texture
->var
->type
);
1944 LLVMValueRef coord
= args
->addr
;
1945 LLVMValueRef half_texel
[2];
1946 LLVMValueRef compare_cube_wa
;
1947 LLVMValueRef result
;
1949 unsigned coord_vgpr_index
= (unsigned)args
->offset
+ (unsigned)args
->compare
;
1953 struct ac_image_args txq_args
= { 0 };
1955 txq_args
.da
= instr
->is_array
|| instr
->sampler_dim
== GLSL_SAMPLER_DIM_CUBE
;
1956 txq_args
.opcode
= ac_image_get_resinfo
;
1957 txq_args
.dmask
= 0xf;
1958 txq_args
.addr
= ctx
->i32zero
;
1959 txq_args
.resource
= args
->resource
;
1960 LLVMValueRef size
= ac_build_image_opcode(&ctx
->ac
, &txq_args
);
1962 for (c
= 0; c
< 2; c
++) {
1963 half_texel
[c
] = LLVMBuildExtractElement(ctx
->builder
, size
,
1964 LLVMConstInt(ctx
->i32
, c
, false), "");
1965 half_texel
[c
] = LLVMBuildUIToFP(ctx
->builder
, half_texel
[c
], ctx
->f32
, "");
1966 half_texel
[c
] = ac_build_fdiv(&ctx
->ac
, ctx
->f32one
, half_texel
[c
]);
1967 half_texel
[c
] = LLVMBuildFMul(ctx
->builder
, half_texel
[c
],
1968 LLVMConstReal(ctx
->f32
, -0.5), "");
1972 LLVMValueRef orig_coords
= args
->addr
;
1974 for (c
= 0; c
< 2; c
++) {
1976 LLVMValueRef index
= LLVMConstInt(ctx
->i32
, coord_vgpr_index
+ c
, 0);
1977 tmp
= LLVMBuildExtractElement(ctx
->builder
, coord
, index
, "");
1978 tmp
= LLVMBuildBitCast(ctx
->builder
, tmp
, ctx
->f32
, "");
1979 tmp
= LLVMBuildFAdd(ctx
->builder
, tmp
, half_texel
[c
], "");
1980 tmp
= LLVMBuildBitCast(ctx
->builder
, tmp
, ctx
->i32
, "");
1981 coord
= LLVMBuildInsertElement(ctx
->builder
, coord
, tmp
, index
, "");
1986 * Apparantly cube has issue with integer types that the workaround doesn't solve,
1987 * so this tests if the format is 8_8_8_8 and an integer type do an alternate
1988 * workaround by sampling using a scaled type and converting.
1989 * This is taken from amdgpu-pro shaders.
1991 /* NOTE this produces some ugly code compared to amdgpu-pro,
1992 * LLVM ends up dumping SGPRs into VGPRs to deal with the compare/select,
1993 * and then reads them back. -pro generates two selects,
1994 * one s_cmp for the descriptor rewriting
1995 * one v_cmp for the coordinate and result changes.
1997 if (instr
->sampler_dim
== GLSL_SAMPLER_DIM_CUBE
) {
1998 LLVMValueRef tmp
, tmp2
;
2000 /* workaround 8/8/8/8 uint/sint cube gather bug */
2001 /* first detect it then change to a scaled read and f2i */
2002 tmp
= LLVMBuildExtractElement(ctx
->builder
, args
->resource
, ctx
->i32one
, "");
2005 /* extract the DATA_FORMAT */
2006 tmp
= ac_build_bfe(&ctx
->ac
, tmp
, LLVMConstInt(ctx
->i32
, 20, false),
2007 LLVMConstInt(ctx
->i32
, 6, false), false);
2009 /* is the DATA_FORMAT == 8_8_8_8 */
2010 compare_cube_wa
= LLVMBuildICmp(ctx
->builder
, LLVMIntEQ
, tmp
, LLVMConstInt(ctx
->i32
, V_008F14_IMG_DATA_FORMAT_8_8_8_8
, false), "");
2012 if (stype
== GLSL_TYPE_UINT
)
2013 /* Create a NUM FORMAT - 0x2 or 0x4 - USCALED or UINT */
2014 tmp
= LLVMBuildSelect(ctx
->builder
, compare_cube_wa
, LLVMConstInt(ctx
->i32
, 0x8000000, false),
2015 LLVMConstInt(ctx
->i32
, 0x10000000, false), "");
2017 /* Create a NUM FORMAT - 0x3 or 0x5 - SSCALED or SINT */
2018 tmp
= LLVMBuildSelect(ctx
->builder
, compare_cube_wa
, LLVMConstInt(ctx
->i32
, 0xc000000, false),
2019 LLVMConstInt(ctx
->i32
, 0x14000000, false), "");
2021 /* replace the NUM FORMAT in the descriptor */
2022 tmp2
= LLVMBuildAnd(ctx
->builder
, tmp2
, LLVMConstInt(ctx
->i32
, C_008F14_NUM_FORMAT_GFX6
, false), "");
2023 tmp2
= LLVMBuildOr(ctx
->builder
, tmp2
, tmp
, "");
2025 args
->resource
= LLVMBuildInsertElement(ctx
->builder
, args
->resource
, tmp2
, ctx
->i32one
, "");
2027 /* don't modify the coordinates for this case */
2028 coord
= LLVMBuildSelect(ctx
->builder
, compare_cube_wa
, orig_coords
, coord
, "");
2031 result
= ac_build_image_opcode(&ctx
->ac
, args
);
2033 if (instr
->sampler_dim
== GLSL_SAMPLER_DIM_CUBE
) {
2034 LLVMValueRef tmp
, tmp2
;
2036 /* if the cube workaround is in place, f2i the result. */
2037 for (c
= 0; c
< 4; c
++) {
2038 tmp
= LLVMBuildExtractElement(ctx
->builder
, result
, LLVMConstInt(ctx
->i32
, c
, false), "");
2039 if (stype
== GLSL_TYPE_UINT
)
2040 tmp2
= LLVMBuildFPToUI(ctx
->builder
, tmp
, ctx
->i32
, "");
2042 tmp2
= LLVMBuildFPToSI(ctx
->builder
, tmp
, ctx
->i32
, "");
2043 tmp
= LLVMBuildBitCast(ctx
->builder
, tmp
, ctx
->i32
, "");
2044 tmp2
= LLVMBuildBitCast(ctx
->builder
, tmp2
, ctx
->i32
, "");
2045 tmp
= LLVMBuildSelect(ctx
->builder
, compare_cube_wa
, tmp2
, tmp
, "");
2046 tmp
= LLVMBuildBitCast(ctx
->builder
, tmp
, ctx
->f32
, "");
2047 result
= LLVMBuildInsertElement(ctx
->builder
, result
, tmp
, LLVMConstInt(ctx
->i32
, c
, false), "");
2053 static LLVMValueRef
build_tex_intrinsic(struct nir_to_llvm_context
*ctx
,
2054 nir_tex_instr
*instr
,
2055 struct ac_image_args
*args
)
2057 if (instr
->sampler_dim
== GLSL_SAMPLER_DIM_BUF
) {
2058 return ac_build_buffer_load_format(&ctx
->ac
,
2061 LLVMConstInt(ctx
->i32
, 0, false),
2065 args
->opcode
= ac_image_sample
;
2066 args
->compare
= instr
->is_shadow
;
2068 switch (instr
->op
) {
2070 case nir_texop_txf_ms
:
2071 case nir_texop_samples_identical
:
2072 args
->opcode
= instr
->sampler_dim
== GLSL_SAMPLER_DIM_MS
? ac_image_load
: ac_image_load_mip
;
2073 args
->compare
= false;
2074 args
->offset
= false;
2083 case nir_texop_query_levels
:
2084 args
->opcode
= ac_image_get_resinfo
;
2087 if (ctx
->stage
!= MESA_SHADER_FRAGMENT
)
2088 args
->level_zero
= true;
2094 args
->opcode
= ac_image_gather4
;
2095 args
->level_zero
= true;
2098 args
->opcode
= ac_image_get_lod
;
2099 args
->compare
= false;
2100 args
->offset
= false;
2106 if (instr
->op
== nir_texop_tg4
) {
2107 enum glsl_base_type stype
= glsl_get_sampler_result_type(instr
->texture
->var
->type
);
2108 if (stype
== GLSL_TYPE_UINT
|| stype
== GLSL_TYPE_INT
) {
2109 return radv_lower_gather4_integer(ctx
, args
, instr
);
2112 return ac_build_image_opcode(&ctx
->ac
, args
);
2115 static LLVMValueRef
visit_vulkan_resource_index(struct nir_to_llvm_context
*ctx
,
2116 nir_intrinsic_instr
*instr
)
2118 LLVMValueRef index
= get_src(ctx
, instr
->src
[0]);
2119 unsigned desc_set
= nir_intrinsic_desc_set(instr
);
2120 unsigned binding
= nir_intrinsic_binding(instr
);
2121 LLVMValueRef desc_ptr
= ctx
->descriptor_sets
[desc_set
];
2122 struct radv_pipeline_layout
*pipeline_layout
= ctx
->options
->layout
;
2123 struct radv_descriptor_set_layout
*layout
= pipeline_layout
->set
[desc_set
].layout
;
2124 unsigned base_offset
= layout
->binding
[binding
].offset
;
2125 LLVMValueRef offset
, stride
;
2127 if (layout
->binding
[binding
].type
== VK_DESCRIPTOR_TYPE_UNIFORM_BUFFER_DYNAMIC
||
2128 layout
->binding
[binding
].type
== VK_DESCRIPTOR_TYPE_STORAGE_BUFFER_DYNAMIC
) {
2129 unsigned idx
= pipeline_layout
->set
[desc_set
].dynamic_offset_start
+
2130 layout
->binding
[binding
].dynamic_offset_offset
;
2131 desc_ptr
= ctx
->push_constants
;
2132 base_offset
= pipeline_layout
->push_constant_size
+ 16 * idx
;
2133 stride
= LLVMConstInt(ctx
->i32
, 16, false);
2135 stride
= LLVMConstInt(ctx
->i32
, layout
->binding
[binding
].size
, false);
2137 offset
= LLVMConstInt(ctx
->i32
, base_offset
, false);
2138 index
= LLVMBuildMul(ctx
->builder
, index
, stride
, "");
2139 offset
= LLVMBuildAdd(ctx
->builder
, offset
, index
, "");
2141 desc_ptr
= ac_build_gep0(&ctx
->ac
, desc_ptr
, offset
);
2142 desc_ptr
= cast_ptr(ctx
, desc_ptr
, ctx
->v4i32
);
2143 LLVMSetMetadata(desc_ptr
, ctx
->uniform_md_kind
, ctx
->empty_md
);
2145 return LLVMBuildLoad(ctx
->builder
, desc_ptr
, "");
2148 static LLVMValueRef
visit_load_push_constant(struct nir_to_llvm_context
*ctx
,
2149 nir_intrinsic_instr
*instr
)
2151 LLVMValueRef ptr
, addr
;
2153 addr
= LLVMConstInt(ctx
->i32
, nir_intrinsic_base(instr
), 0);
2154 addr
= LLVMBuildAdd(ctx
->builder
, addr
, get_src(ctx
, instr
->src
[0]), "");
2156 ptr
= ac_build_gep0(&ctx
->ac
, ctx
->push_constants
, addr
);
2157 ptr
= cast_ptr(ctx
, ptr
, get_def_type(ctx
, &instr
->dest
.ssa
));
2159 return LLVMBuildLoad(ctx
->builder
, ptr
, "");
2162 static LLVMValueRef
visit_get_buffer_size(struct nir_to_llvm_context
*ctx
,
2163 nir_intrinsic_instr
*instr
)
2165 LLVMValueRef desc
= get_src(ctx
, instr
->src
[0]);
2167 return get_buffer_size(ctx
, desc
, false);
2169 static void visit_store_ssbo(struct nir_to_llvm_context
*ctx
,
2170 nir_intrinsic_instr
*instr
)
2172 const char *store_name
;
2173 LLVMValueRef src_data
= get_src(ctx
, instr
->src
[0]);
2174 LLVMTypeRef data_type
= ctx
->f32
;
2175 int elem_size_mult
= get_elem_bits(ctx
, LLVMTypeOf(src_data
)) / 32;
2176 int components_32bit
= elem_size_mult
* instr
->num_components
;
2177 unsigned writemask
= nir_intrinsic_write_mask(instr
);
2178 LLVMValueRef base_data
, base_offset
;
2179 LLVMValueRef params
[6];
2181 if (ctx
->stage
== MESA_SHADER_FRAGMENT
)
2182 ctx
->shader_info
->fs
.writes_memory
= true;
2184 params
[1] = get_src(ctx
, instr
->src
[1]);
2185 params
[2] = LLVMConstInt(ctx
->i32
, 0, false); /* vindex */
2186 params
[4] = ctx
->i1false
; /* glc */
2187 params
[5] = ctx
->i1false
; /* slc */
2189 if (components_32bit
> 1)
2190 data_type
= LLVMVectorType(ctx
->f32
, components_32bit
);
2192 base_data
= to_float(ctx
, src_data
);
2193 base_data
= trim_vector(ctx
, base_data
, instr
->num_components
);
2194 base_data
= LLVMBuildBitCast(ctx
->builder
, base_data
,
2196 base_offset
= get_src(ctx
, instr
->src
[2]); /* voffset */
2200 LLVMValueRef offset
;
2202 u_bit_scan_consecutive_range(&writemask
, &start
, &count
);
2204 /* Due to an LLVM limitation, split 3-element writes
2205 * into a 2-element and a 1-element write. */
2207 writemask
|= 1 << (start
+ 2);
2211 start
*= elem_size_mult
;
2212 count
*= elem_size_mult
;
2215 writemask
|= ((1u << (count
- 4)) - 1u) << (start
+ 4);
2220 store_name
= "llvm.amdgcn.buffer.store.v4f32";
2222 } else if (count
== 2) {
2223 tmp
= LLVMBuildExtractElement(ctx
->builder
,
2224 base_data
, LLVMConstInt(ctx
->i32
, start
, false), "");
2225 data
= LLVMBuildInsertElement(ctx
->builder
, LLVMGetUndef(ctx
->v2f32
), tmp
,
2228 tmp
= LLVMBuildExtractElement(ctx
->builder
,
2229 base_data
, LLVMConstInt(ctx
->i32
, start
+ 1, false), "");
2230 data
= LLVMBuildInsertElement(ctx
->builder
, data
, tmp
,
2232 store_name
= "llvm.amdgcn.buffer.store.v2f32";
2236 if (get_llvm_num_components(base_data
) > 1)
2237 data
= LLVMBuildExtractElement(ctx
->builder
, base_data
,
2238 LLVMConstInt(ctx
->i32
, start
, false), "");
2241 store_name
= "llvm.amdgcn.buffer.store.f32";
2244 offset
= base_offset
;
2246 offset
= LLVMBuildAdd(ctx
->builder
, offset
, LLVMConstInt(ctx
->i32
, start
* 4, false), "");
2250 ac_build_intrinsic(&ctx
->ac
, store_name
,
2251 ctx
->voidt
, params
, 6, 0);
2255 static LLVMValueRef
visit_atomic_ssbo(struct nir_to_llvm_context
*ctx
,
2256 nir_intrinsic_instr
*instr
)
2259 LLVMValueRef params
[6];
2261 if (ctx
->stage
== MESA_SHADER_FRAGMENT
)
2262 ctx
->shader_info
->fs
.writes_memory
= true;
2264 if (instr
->intrinsic
== nir_intrinsic_ssbo_atomic_comp_swap
) {
2265 params
[arg_count
++] = llvm_extract_elem(ctx
, get_src(ctx
, instr
->src
[3]), 0);
2267 params
[arg_count
++] = llvm_extract_elem(ctx
, get_src(ctx
, instr
->src
[2]), 0);
2268 params
[arg_count
++] = get_src(ctx
, instr
->src
[0]);
2269 params
[arg_count
++] = LLVMConstInt(ctx
->i32
, 0, false); /* vindex */
2270 params
[arg_count
++] = get_src(ctx
, instr
->src
[1]); /* voffset */
2271 params
[arg_count
++] = ctx
->i1false
; /* slc */
2273 switch (instr
->intrinsic
) {
2274 case nir_intrinsic_ssbo_atomic_add
:
2275 name
= "llvm.amdgcn.buffer.atomic.add";
2277 case nir_intrinsic_ssbo_atomic_imin
:
2278 name
= "llvm.amdgcn.buffer.atomic.smin";
2280 case nir_intrinsic_ssbo_atomic_umin
:
2281 name
= "llvm.amdgcn.buffer.atomic.umin";
2283 case nir_intrinsic_ssbo_atomic_imax
:
2284 name
= "llvm.amdgcn.buffer.atomic.smax";
2286 case nir_intrinsic_ssbo_atomic_umax
:
2287 name
= "llvm.amdgcn.buffer.atomic.umax";
2289 case nir_intrinsic_ssbo_atomic_and
:
2290 name
= "llvm.amdgcn.buffer.atomic.and";
2292 case nir_intrinsic_ssbo_atomic_or
:
2293 name
= "llvm.amdgcn.buffer.atomic.or";
2295 case nir_intrinsic_ssbo_atomic_xor
:
2296 name
= "llvm.amdgcn.buffer.atomic.xor";
2298 case nir_intrinsic_ssbo_atomic_exchange
:
2299 name
= "llvm.amdgcn.buffer.atomic.swap";
2301 case nir_intrinsic_ssbo_atomic_comp_swap
:
2302 name
= "llvm.amdgcn.buffer.atomic.cmpswap";
2308 return ac_build_intrinsic(&ctx
->ac
, name
, ctx
->i32
, params
, arg_count
, 0);
2311 static LLVMValueRef
visit_load_buffer(struct nir_to_llvm_context
*ctx
,
2312 nir_intrinsic_instr
*instr
)
2314 LLVMValueRef results
[2];
2315 int load_components
;
2316 int num_components
= instr
->num_components
;
2317 if (instr
->dest
.ssa
.bit_size
== 64)
2318 num_components
*= 2;
2320 for (int i
= 0; i
< num_components
; i
+= load_components
) {
2321 load_components
= MIN2(num_components
- i
, 4);
2322 const char *load_name
;
2323 LLVMTypeRef data_type
= ctx
->f32
;
2324 LLVMValueRef offset
= LLVMConstInt(ctx
->i32
, i
* 4, false);
2325 offset
= LLVMBuildAdd(ctx
->builder
, get_src(ctx
, instr
->src
[1]), offset
, "");
2327 if (load_components
== 3)
2328 data_type
= LLVMVectorType(ctx
->f32
, 4);
2329 else if (load_components
> 1)
2330 data_type
= LLVMVectorType(ctx
->f32
, load_components
);
2332 if (load_components
>= 3)
2333 load_name
= "llvm.amdgcn.buffer.load.v4f32";
2334 else if (load_components
== 2)
2335 load_name
= "llvm.amdgcn.buffer.load.v2f32";
2336 else if (load_components
== 1)
2337 load_name
= "llvm.amdgcn.buffer.load.f32";
2339 unreachable("unhandled number of components");
2341 LLVMValueRef params
[] = {
2342 get_src(ctx
, instr
->src
[0]),
2343 LLVMConstInt(ctx
->i32
, 0, false),
2349 results
[i
] = ac_build_intrinsic(&ctx
->ac
, load_name
, data_type
, params
, 5, 0);
2353 LLVMValueRef ret
= results
[0];
2354 if (num_components
> 4 || num_components
== 3) {
2355 LLVMValueRef masks
[] = {
2356 LLVMConstInt(ctx
->i32
, 0, false), LLVMConstInt(ctx
->i32
, 1, false),
2357 LLVMConstInt(ctx
->i32
, 2, false), LLVMConstInt(ctx
->i32
, 3, false),
2358 LLVMConstInt(ctx
->i32
, 4, false), LLVMConstInt(ctx
->i32
, 5, false),
2359 LLVMConstInt(ctx
->i32
, 6, false), LLVMConstInt(ctx
->i32
, 7, false)
2362 LLVMValueRef swizzle
= LLVMConstVector(masks
, num_components
);
2363 ret
= LLVMBuildShuffleVector(ctx
->builder
, results
[0],
2364 results
[num_components
> 4 ? 1 : 0], swizzle
, "");
2367 return LLVMBuildBitCast(ctx
->builder
, ret
,
2368 get_def_type(ctx
, &instr
->dest
.ssa
), "");
2371 static LLVMValueRef
visit_load_ubo_buffer(struct nir_to_llvm_context
*ctx
,
2372 nir_intrinsic_instr
*instr
)
2374 LLVMValueRef results
[8], ret
;
2375 LLVMValueRef rsrc
= get_src(ctx
, instr
->src
[0]);
2376 LLVMValueRef offset
= get_src(ctx
, instr
->src
[1]);
2377 int num_components
= instr
->num_components
;
2379 rsrc
= LLVMBuildBitCast(ctx
->builder
, rsrc
, LLVMVectorType(ctx
->i8
, 16), "");
2381 if (instr
->dest
.ssa
.bit_size
== 64)
2382 num_components
*= 2;
2384 for (unsigned i
= 0; i
< num_components
; ++i
) {
2385 LLVMValueRef params
[] = {
2387 LLVMBuildAdd(ctx
->builder
, LLVMConstInt(ctx
->i32
, 4 * i
, 0),
2390 results
[i
] = ac_build_intrinsic(&ctx
->ac
, "llvm.SI.load.const", ctx
->f32
,
2392 AC_FUNC_ATTR_READNONE
|
2393 AC_FUNC_ATTR_LEGACY
);
2397 ret
= ac_build_gather_values(&ctx
->ac
, results
, instr
->num_components
);
2398 return LLVMBuildBitCast(ctx
->builder
, ret
,
2399 get_def_type(ctx
, &instr
->dest
.ssa
), "");
2403 radv_get_deref_offset(struct nir_to_llvm_context
*ctx
, nir_deref_var
*deref
,
2404 bool vs_in
, unsigned *vertex_index_out
,
2405 LLVMValueRef
*vertex_index_ref
,
2406 unsigned *const_out
, LLVMValueRef
*indir_out
)
2408 unsigned const_offset
= 0;
2409 nir_deref
*tail
= &deref
->deref
;
2410 LLVMValueRef offset
= NULL
;
2412 if (vertex_index_out
!= NULL
|| vertex_index_ref
!= NULL
) {
2414 nir_deref_array
*deref_array
= nir_deref_as_array(tail
);
2415 if (vertex_index_out
)
2416 *vertex_index_out
= deref_array
->base_offset
;
2418 if (vertex_index_ref
) {
2419 LLVMValueRef vtx
= LLVMConstInt(ctx
->i32
, deref_array
->base_offset
, false);
2420 if (deref_array
->deref_array_type
== nir_deref_array_type_indirect
) {
2421 vtx
= LLVMBuildAdd(ctx
->builder
, vtx
, get_src(ctx
, deref_array
->indirect
), "");
2423 *vertex_index_ref
= vtx
;
2427 if (deref
->var
->data
.compact
) {
2428 assert(tail
->child
->deref_type
== nir_deref_type_array
);
2429 assert(glsl_type_is_scalar(glsl_without_array(deref
->var
->type
)));
2430 nir_deref_array
*deref_array
= nir_deref_as_array(tail
->child
);
2431 /* We always lower indirect dereferences for "compact" array vars. */
2432 assert(deref_array
->deref_array_type
== nir_deref_array_type_direct
);
2434 const_offset
= deref_array
->base_offset
;
2438 while (tail
->child
!= NULL
) {
2439 const struct glsl_type
*parent_type
= tail
->type
;
2442 if (tail
->deref_type
== nir_deref_type_array
) {
2443 nir_deref_array
*deref_array
= nir_deref_as_array(tail
);
2444 LLVMValueRef index
, stride
, local_offset
;
2445 unsigned size
= glsl_count_attribute_slots(tail
->type
, vs_in
);
2447 const_offset
+= size
* deref_array
->base_offset
;
2448 if (deref_array
->deref_array_type
== nir_deref_array_type_direct
)
2451 assert(deref_array
->deref_array_type
== nir_deref_array_type_indirect
);
2452 index
= get_src(ctx
, deref_array
->indirect
);
2453 stride
= LLVMConstInt(ctx
->i32
, size
, 0);
2454 local_offset
= LLVMBuildMul(ctx
->builder
, stride
, index
, "");
2457 offset
= LLVMBuildAdd(ctx
->builder
, offset
, local_offset
, "");
2459 offset
= local_offset
;
2460 } else if (tail
->deref_type
== nir_deref_type_struct
) {
2461 nir_deref_struct
*deref_struct
= nir_deref_as_struct(tail
);
2463 for (unsigned i
= 0; i
< deref_struct
->index
; i
++) {
2464 const struct glsl_type
*ft
= glsl_get_struct_field(parent_type
, i
);
2465 const_offset
+= glsl_count_attribute_slots(ft
, vs_in
);
2468 unreachable("unsupported deref type");
2472 if (const_offset
&& offset
)
2473 offset
= LLVMBuildAdd(ctx
->builder
, offset
,
2474 LLVMConstInt(ctx
->i32
, const_offset
, 0),
2477 *const_out
= const_offset
;
2478 *indir_out
= offset
;
2482 lds_load(struct nir_to_llvm_context
*ctx
,
2483 LLVMValueRef dw_addr
)
2486 value
= ac_build_indexed_load(&ctx
->ac
, ctx
->lds
, dw_addr
, false);
2491 lds_store(struct nir_to_llvm_context
*ctx
,
2492 LLVMValueRef dw_addr
, LLVMValueRef value
)
2494 value
= LLVMBuildBitCast(ctx
->builder
, value
, ctx
->i32
, "");
2495 ac_build_indexed_store(&ctx
->ac
, ctx
->lds
,
2499 /* The offchip buffer layout for TCS->TES is
2501 * - attribute 0 of patch 0 vertex 0
2502 * - attribute 0 of patch 0 vertex 1
2503 * - attribute 0 of patch 0 vertex 2
2505 * - attribute 0 of patch 1 vertex 0
2506 * - attribute 0 of patch 1 vertex 1
2508 * - attribute 1 of patch 0 vertex 0
2509 * - attribute 1 of patch 0 vertex 1
2511 * - per patch attribute 0 of patch 0
2512 * - per patch attribute 0 of patch 1
2515 * Note that every attribute has 4 components.
2517 static LLVMValueRef
get_tcs_tes_buffer_address(struct nir_to_llvm_context
*ctx
,
2518 LLVMValueRef vertex_index
,
2519 LLVMValueRef param_index
)
2521 LLVMValueRef base_addr
, vertices_per_patch
, num_patches
, total_vertices
;
2522 LLVMValueRef param_stride
, constant16
;
2523 LLVMValueRef rel_patch_id
= get_rel_patch_id(ctx
);
2525 vertices_per_patch
= unpack_param(ctx
, ctx
->tcs_offchip_layout
, 9, 6);
2526 num_patches
= unpack_param(ctx
, ctx
->tcs_offchip_layout
, 0, 9);
2527 total_vertices
= LLVMBuildMul(ctx
->builder
, vertices_per_patch
,
2530 constant16
= LLVMConstInt(ctx
->i32
, 16, false);
2532 base_addr
= LLVMBuildMul(ctx
->builder
, rel_patch_id
,
2533 vertices_per_patch
, "");
2535 base_addr
= LLVMBuildAdd(ctx
->builder
, base_addr
,
2538 param_stride
= total_vertices
;
2540 base_addr
= rel_patch_id
;
2541 param_stride
= num_patches
;
2544 base_addr
= LLVMBuildAdd(ctx
->builder
, base_addr
,
2545 LLVMBuildMul(ctx
->builder
, param_index
,
2546 param_stride
, ""), "");
2548 base_addr
= LLVMBuildMul(ctx
->builder
, base_addr
, constant16
, "");
2550 if (!vertex_index
) {
2551 LLVMValueRef patch_data_offset
=
2552 unpack_param(ctx
, ctx
->tcs_offchip_layout
, 16, 16);
2554 base_addr
= LLVMBuildAdd(ctx
->builder
, base_addr
,
2555 patch_data_offset
, "");
2560 static LLVMValueRef
get_tcs_tes_buffer_address_params(struct nir_to_llvm_context
*ctx
,
2562 unsigned const_index
,
2564 LLVMValueRef vertex_index
,
2565 LLVMValueRef indir_index
)
2567 LLVMValueRef param_index
;
2570 param_index
= LLVMBuildAdd(ctx
->builder
, LLVMConstInt(ctx
->i32
, param
, false),
2573 if (const_index
&& !is_compact
)
2574 param
+= const_index
;
2575 param_index
= LLVMConstInt(ctx
->i32
, param
, false);
2577 return get_tcs_tes_buffer_address(ctx
, vertex_index
, param_index
);
2581 mark_tess_output(struct nir_to_llvm_context
*ctx
,
2582 bool is_patch
, uint32_t param
)
2586 ctx
->tess_patch_outputs_written
|= (1ull << param
);
2588 ctx
->tess_outputs_written
|= (1ull << param
);
2592 get_dw_address(struct nir_to_llvm_context
*ctx
,
2593 LLVMValueRef dw_addr
,
2595 unsigned const_index
,
2596 bool compact_const_index
,
2597 LLVMValueRef vertex_index
,
2598 LLVMValueRef stride
,
2599 LLVMValueRef indir_index
)
2604 dw_addr
= LLVMBuildAdd(ctx
->builder
, dw_addr
,
2605 LLVMBuildMul(ctx
->builder
,
2611 dw_addr
= LLVMBuildAdd(ctx
->builder
, dw_addr
,
2612 LLVMBuildMul(ctx
->builder
, indir_index
,
2613 LLVMConstInt(ctx
->i32
, 4, false), ""), "");
2614 else if (const_index
&& !compact_const_index
)
2615 dw_addr
= LLVMBuildAdd(ctx
->builder
, dw_addr
,
2616 LLVMConstInt(ctx
->i32
, const_index
, false), "");
2618 dw_addr
= LLVMBuildAdd(ctx
->builder
, dw_addr
,
2619 LLVMConstInt(ctx
->i32
, param
* 4, false), "");
2621 if (const_index
&& compact_const_index
)
2622 dw_addr
= LLVMBuildAdd(ctx
->builder
, dw_addr
,
2623 LLVMConstInt(ctx
->i32
, const_index
, false), "");
2628 load_tcs_input(struct nir_to_llvm_context
*ctx
,
2629 nir_intrinsic_instr
*instr
)
2631 LLVMValueRef dw_addr
, stride
;
2632 unsigned const_index
;
2633 LLVMValueRef vertex_index
;
2634 LLVMValueRef indir_index
;
2636 LLVMValueRef value
[4], result
;
2637 const bool per_vertex
= nir_is_per_vertex_io(instr
->variables
[0]->var
, ctx
->stage
);
2638 const bool is_compact
= instr
->variables
[0]->var
->data
.compact
;
2639 param
= shader_io_get_unique_index(instr
->variables
[0]->var
->data
.location
);
2640 radv_get_deref_offset(ctx
, instr
->variables
[0],
2641 false, NULL
, per_vertex
? &vertex_index
: NULL
,
2642 &const_index
, &indir_index
);
2644 stride
= unpack_param(ctx
, ctx
->tcs_in_layout
, 13, 8);
2645 dw_addr
= get_tcs_in_current_patch_offset(ctx
);
2646 dw_addr
= get_dw_address(ctx
, dw_addr
, param
, const_index
, is_compact
, vertex_index
, stride
,
2649 for (unsigned i
= 0; i
< instr
->num_components
; i
++) {
2650 value
[i
] = lds_load(ctx
, dw_addr
);
2651 dw_addr
= LLVMBuildAdd(ctx
->builder
, dw_addr
,
2654 result
= ac_build_gather_values(&ctx
->ac
, value
, instr
->num_components
);
2655 result
= LLVMBuildBitCast(ctx
->builder
, result
, get_def_type(ctx
, &instr
->dest
.ssa
), "");
2660 load_tcs_output(struct nir_to_llvm_context
*ctx
,
2661 nir_intrinsic_instr
*instr
)
2663 LLVMValueRef dw_addr
, stride
;
2664 LLVMValueRef value
[4], result
;
2665 LLVMValueRef vertex_index
= NULL
;
2666 LLVMValueRef indir_index
= NULL
;
2667 unsigned const_index
= 0;
2669 const bool per_vertex
= nir_is_per_vertex_io(instr
->variables
[0]->var
, ctx
->stage
);
2670 const bool is_compact
= instr
->variables
[0]->var
->data
.compact
;
2671 param
= shader_io_get_unique_index(instr
->variables
[0]->var
->data
.location
);
2672 radv_get_deref_offset(ctx
, instr
->variables
[0],
2673 false, NULL
, per_vertex
? &vertex_index
: NULL
,
2674 &const_index
, &indir_index
);
2676 if (!instr
->variables
[0]->var
->data
.patch
) {
2677 stride
= unpack_param(ctx
, ctx
->tcs_out_layout
, 13, 8);
2678 dw_addr
= get_tcs_out_current_patch_offset(ctx
);
2680 dw_addr
= get_tcs_out_current_patch_data_offset(ctx
);
2683 dw_addr
= get_dw_address(ctx
, dw_addr
, param
, const_index
, is_compact
, vertex_index
, stride
,
2686 for (unsigned i
= 0; i
< instr
->num_components
; i
++) {
2687 value
[i
] = lds_load(ctx
, dw_addr
);
2688 dw_addr
= LLVMBuildAdd(ctx
->builder
, dw_addr
,
2691 result
= ac_build_gather_values(&ctx
->ac
, value
, instr
->num_components
);
2692 result
= LLVMBuildBitCast(ctx
->builder
, result
, get_def_type(ctx
, &instr
->dest
.ssa
), "");
2697 store_tcs_output(struct nir_to_llvm_context
*ctx
,
2698 nir_intrinsic_instr
*instr
,
2702 LLVMValueRef stride
, dw_addr
;
2703 LLVMValueRef buf_addr
= NULL
;
2704 LLVMValueRef vertex_index
= NULL
;
2705 LLVMValueRef indir_index
= NULL
;
2706 unsigned const_index
= 0;
2708 const bool per_vertex
= nir_is_per_vertex_io(instr
->variables
[0]->var
, ctx
->stage
);
2709 const bool is_compact
= instr
->variables
[0]->var
->data
.compact
;
2711 radv_get_deref_offset(ctx
, instr
->variables
[0],
2712 false, NULL
, per_vertex
? &vertex_index
: NULL
,
2713 &const_index
, &indir_index
);
2715 param
= shader_io_get_unique_index(instr
->variables
[0]->var
->data
.location
);
2716 if (instr
->variables
[0]->var
->data
.location
== VARYING_SLOT_CLIP_DIST0
&&
2717 is_compact
&& const_index
> 3) {
2722 if (!instr
->variables
[0]->var
->data
.patch
) {
2723 stride
= unpack_param(ctx
, ctx
->tcs_out_layout
, 13, 8);
2724 dw_addr
= get_tcs_out_current_patch_offset(ctx
);
2726 dw_addr
= get_tcs_out_current_patch_data_offset(ctx
);
2729 mark_tess_output(ctx
, instr
->variables
[0]->var
->data
.patch
, param
);
2731 dw_addr
= get_dw_address(ctx
, dw_addr
, param
, const_index
, is_compact
, vertex_index
, stride
,
2733 buf_addr
= get_tcs_tes_buffer_address_params(ctx
, param
, const_index
, is_compact
,
2734 vertex_index
, indir_index
);
2736 unsigned base
= is_compact
? const_index
: 0;
2737 for (unsigned chan
= 0; chan
< 8; chan
++) {
2738 bool is_tess_factor
= false;
2739 if (!(writemask
& (1 << chan
)))
2741 LLVMValueRef value
= llvm_extract_elem(ctx
, src
, chan
);
2743 lds_store(ctx
, dw_addr
, value
);
2745 if (instr
->variables
[0]->var
->data
.location
== VARYING_SLOT_TESS_LEVEL_INNER
||
2746 instr
->variables
[0]->var
->data
.location
== VARYING_SLOT_TESS_LEVEL_OUTER
)
2747 is_tess_factor
= true;
2749 if (!is_tess_factor
&& writemask
!= 0xF)
2750 ac_build_buffer_store_dword(&ctx
->ac
, ctx
->hs_ring_tess_offchip
, value
, 1,
2751 buf_addr
, ctx
->oc_lds
,
2752 4 * (base
+ chan
), 1, 0, true, false);
2754 dw_addr
= LLVMBuildAdd(ctx
->builder
, dw_addr
,
2758 if (writemask
== 0xF) {
2759 ac_build_buffer_store_dword(&ctx
->ac
, ctx
->hs_ring_tess_offchip
, src
, 4,
2760 buf_addr
, ctx
->oc_lds
,
2761 (base
* 4), 1, 0, true, false);
2766 load_tes_input(struct nir_to_llvm_context
*ctx
,
2767 nir_intrinsic_instr
*instr
)
2769 LLVMValueRef buf_addr
;
2770 LLVMValueRef result
;
2771 LLVMValueRef vertex_index
= NULL
;
2772 LLVMValueRef indir_index
= NULL
;
2773 unsigned const_index
= 0;
2775 const bool per_vertex
= nir_is_per_vertex_io(instr
->variables
[0]->var
, ctx
->stage
);
2776 const bool is_compact
= instr
->variables
[0]->var
->data
.compact
;
2778 radv_get_deref_offset(ctx
, instr
->variables
[0],
2779 false, NULL
, per_vertex
? &vertex_index
: NULL
,
2780 &const_index
, &indir_index
);
2781 param
= shader_io_get_unique_index(instr
->variables
[0]->var
->data
.location
);
2782 if (instr
->variables
[0]->var
->data
.location
== VARYING_SLOT_CLIP_DIST0
&&
2783 is_compact
&& const_index
> 3) {
2787 buf_addr
= get_tcs_tes_buffer_address_params(ctx
, param
, const_index
,
2788 is_compact
, vertex_index
, indir_index
);
2790 result
= ac_build_buffer_load(&ctx
->ac
, ctx
->hs_ring_tess_offchip
, instr
->num_components
, NULL
,
2791 buf_addr
, ctx
->oc_lds
, is_compact
? (4 * const_index
) : 0, 1, 0, true);
2792 result
= trim_vector(ctx
, result
, instr
->num_components
);
2793 result
= LLVMBuildBitCast(ctx
->builder
, result
, get_def_type(ctx
, &instr
->dest
.ssa
), "");
2798 load_gs_input(struct nir_to_llvm_context
*ctx
,
2799 nir_intrinsic_instr
*instr
)
2801 LLVMValueRef indir_index
, vtx_offset
;
2802 unsigned const_index
;
2803 LLVMValueRef args
[9];
2804 unsigned param
, vtx_offset_param
;
2805 LLVMValueRef value
[4], result
;
2806 unsigned vertex_index
;
2807 radv_get_deref_offset(ctx
, instr
->variables
[0],
2808 false, &vertex_index
, NULL
,
2809 &const_index
, &indir_index
);
2810 vtx_offset_param
= vertex_index
;
2811 assert(vtx_offset_param
< 6);
2812 vtx_offset
= LLVMBuildMul(ctx
->builder
, ctx
->gs_vtx_offset
[vtx_offset_param
],
2813 LLVMConstInt(ctx
->i32
, 4, false), "");
2815 param
= shader_io_get_unique_index(instr
->variables
[0]->var
->data
.location
);
2816 for (unsigned i
= 0; i
< instr
->num_components
; i
++) {
2818 args
[0] = ctx
->esgs_ring
;
2819 args
[1] = vtx_offset
;
2820 args
[2] = LLVMConstInt(ctx
->i32
, (param
* 4 + i
+ const_index
) * 256, false);
2821 args
[3] = ctx
->i32zero
;
2822 args
[4] = ctx
->i32one
; /* OFFEN */
2823 args
[5] = ctx
->i32zero
; /* IDXEN */
2824 args
[6] = ctx
->i32one
; /* GLC */
2825 args
[7] = ctx
->i32zero
; /* SLC */
2826 args
[8] = ctx
->i32zero
; /* TFE */
2828 value
[i
] = ac_build_intrinsic(&ctx
->ac
, "llvm.SI.buffer.load.dword.i32.i32",
2830 AC_FUNC_ATTR_READONLY
|
2831 AC_FUNC_ATTR_LEGACY
);
2833 result
= ac_build_gather_values(&ctx
->ac
, value
, instr
->num_components
);
2838 static LLVMValueRef
visit_load_var(struct nir_to_llvm_context
*ctx
,
2839 nir_intrinsic_instr
*instr
)
2841 LLVMValueRef values
[8];
2842 int idx
= instr
->variables
[0]->var
->data
.driver_location
;
2843 int ve
= instr
->dest
.ssa
.num_components
;
2844 LLVMValueRef indir_index
;
2846 unsigned const_index
;
2847 bool vs_in
= ctx
->stage
== MESA_SHADER_VERTEX
&&
2848 instr
->variables
[0]->var
->data
.mode
== nir_var_shader_in
;
2849 radv_get_deref_offset(ctx
, instr
->variables
[0], vs_in
, NULL
, NULL
,
2850 &const_index
, &indir_index
);
2852 if (instr
->dest
.ssa
.bit_size
== 64)
2855 switch (instr
->variables
[0]->var
->data
.mode
) {
2856 case nir_var_shader_in
:
2857 if (ctx
->stage
== MESA_SHADER_TESS_CTRL
)
2858 return load_tcs_input(ctx
, instr
);
2859 if (ctx
->stage
== MESA_SHADER_TESS_EVAL
)
2860 return load_tes_input(ctx
, instr
);
2861 if (ctx
->stage
== MESA_SHADER_GEOMETRY
) {
2862 return load_gs_input(ctx
, instr
);
2864 for (unsigned chan
= 0; chan
< ve
; chan
++) {
2866 unsigned count
= glsl_count_attribute_slots(
2867 instr
->variables
[0]->var
->type
,
2868 ctx
->stage
== MESA_SHADER_VERTEX
);
2870 LLVMValueRef tmp_vec
= ac_build_gather_values_extended(
2871 &ctx
->ac
, ctx
->inputs
+ idx
+ chan
, count
,
2874 values
[chan
] = LLVMBuildExtractElement(ctx
->builder
,
2878 values
[chan
] = ctx
->inputs
[idx
+ chan
+ const_index
* 4];
2882 for (unsigned chan
= 0; chan
< ve
; chan
++) {
2884 unsigned count
= glsl_count_attribute_slots(
2885 instr
->variables
[0]->var
->type
, false);
2887 LLVMValueRef tmp_vec
= ac_build_gather_values_extended(
2888 &ctx
->ac
, ctx
->locals
+ idx
+ chan
, count
,
2891 values
[chan
] = LLVMBuildExtractElement(ctx
->builder
,
2895 values
[chan
] = LLVMBuildLoad(ctx
->builder
, ctx
->locals
[idx
+ chan
+ const_index
* 4], "");
2899 case nir_var_shader_out
:
2900 if (ctx
->stage
== MESA_SHADER_TESS_CTRL
)
2901 return load_tcs_output(ctx
, instr
);
2902 for (unsigned chan
= 0; chan
< ve
; chan
++) {
2904 unsigned count
= glsl_count_attribute_slots(
2905 instr
->variables
[0]->var
->type
, false);
2907 LLVMValueRef tmp_vec
= ac_build_gather_values_extended(
2908 &ctx
->ac
, ctx
->outputs
+ idx
+ chan
, count
,
2911 values
[chan
] = LLVMBuildExtractElement(ctx
->builder
,
2915 values
[chan
] = LLVMBuildLoad(ctx
->builder
,
2916 ctx
->outputs
[idx
+ chan
+ const_index
* 4],
2921 case nir_var_shared
: {
2922 LLVMValueRef ptr
= get_shared_memory_ptr(ctx
, idx
, ctx
->i32
);
2923 LLVMValueRef derived_ptr
;
2926 indir_index
= LLVMBuildMul(ctx
->builder
, indir_index
, LLVMConstInt(ctx
->i32
, 4, false), "");
2928 for (unsigned chan
= 0; chan
< ve
; chan
++) {
2929 LLVMValueRef index
= LLVMConstInt(ctx
->i32
, chan
, false);
2931 index
= LLVMBuildAdd(ctx
->builder
, index
, indir_index
, "");
2932 derived_ptr
= LLVMBuildGEP(ctx
->builder
, ptr
, &index
, 1, "");
2934 values
[chan
] = LLVMBuildLoad(ctx
->builder
, derived_ptr
, "");
2939 unreachable("unhandle variable mode");
2941 ret
= ac_build_gather_values(&ctx
->ac
, values
, ve
);
2942 return LLVMBuildBitCast(ctx
->builder
, ret
, get_def_type(ctx
, &instr
->dest
.ssa
), "");
2946 visit_store_var(struct nir_to_llvm_context
*ctx
,
2947 nir_intrinsic_instr
*instr
)
2949 LLVMValueRef temp_ptr
, value
;
2950 int idx
= instr
->variables
[0]->var
->data
.driver_location
;
2951 LLVMValueRef src
= to_float(ctx
, get_src(ctx
, instr
->src
[0]));
2952 int writemask
= instr
->const_index
[0];
2953 LLVMValueRef indir_index
;
2954 unsigned const_index
;
2955 radv_get_deref_offset(ctx
, instr
->variables
[0], false,
2956 NULL
, NULL
, &const_index
, &indir_index
);
2958 if (get_elem_bits(ctx
, LLVMTypeOf(src
)) == 64) {
2959 int old_writemask
= writemask
;
2961 src
= LLVMBuildBitCast(ctx
->builder
, src
,
2962 LLVMVectorType(ctx
->f32
, get_llvm_num_components(src
) * 2),
2966 for (unsigned chan
= 0; chan
< 4; chan
++) {
2967 if (old_writemask
& (1 << chan
))
2968 writemask
|= 3u << (2 * chan
);
2972 switch (instr
->variables
[0]->var
->data
.mode
) {
2973 case nir_var_shader_out
:
2975 if (ctx
->stage
== MESA_SHADER_TESS_CTRL
) {
2976 store_tcs_output(ctx
, instr
, src
, writemask
);
2980 for (unsigned chan
= 0; chan
< 8; chan
++) {
2982 if (!(writemask
& (1 << chan
)))
2985 value
= llvm_extract_elem(ctx
, src
, chan
);
2987 if (instr
->variables
[0]->var
->data
.compact
)
2990 unsigned count
= glsl_count_attribute_slots(
2991 instr
->variables
[0]->var
->type
, false);
2993 LLVMValueRef tmp_vec
= ac_build_gather_values_extended(
2994 &ctx
->ac
, ctx
->outputs
+ idx
+ chan
, count
,
2997 if (get_llvm_num_components(tmp_vec
) > 1) {
2998 tmp_vec
= LLVMBuildInsertElement(ctx
->builder
, tmp_vec
,
2999 value
, indir_index
, "");
3002 build_store_values_extended(ctx
, ctx
->outputs
+ idx
+ chan
,
3003 count
, stride
, tmp_vec
);
3006 temp_ptr
= ctx
->outputs
[idx
+ chan
+ const_index
* stride
];
3008 LLVMBuildStore(ctx
->builder
, value
, temp_ptr
);
3013 for (unsigned chan
= 0; chan
< 8; chan
++) {
3014 if (!(writemask
& (1 << chan
)))
3017 value
= llvm_extract_elem(ctx
, src
, chan
);
3019 unsigned count
= glsl_count_attribute_slots(
3020 instr
->variables
[0]->var
->type
, false);
3022 LLVMValueRef tmp_vec
= ac_build_gather_values_extended(
3023 &ctx
->ac
, ctx
->locals
+ idx
+ chan
, count
,
3026 tmp_vec
= LLVMBuildInsertElement(ctx
->builder
, tmp_vec
,
3027 value
, indir_index
, "");
3028 build_store_values_extended(ctx
, ctx
->locals
+ idx
+ chan
,
3031 temp_ptr
= ctx
->locals
[idx
+ chan
+ const_index
* 4];
3033 LLVMBuildStore(ctx
->builder
, value
, temp_ptr
);
3037 case nir_var_shared
: {
3038 LLVMValueRef ptr
= get_shared_memory_ptr(ctx
, idx
, ctx
->i32
);
3041 indir_index
= LLVMBuildMul(ctx
->builder
, indir_index
, LLVMConstInt(ctx
->i32
, 4, false), "");
3043 for (unsigned chan
= 0; chan
< 8; chan
++) {
3044 if (!(writemask
& (1 << chan
)))
3046 LLVMValueRef index
= LLVMConstInt(ctx
->i32
, chan
, false);
3047 LLVMValueRef derived_ptr
;
3050 index
= LLVMBuildAdd(ctx
->builder
, index
, indir_index
, "");
3052 value
= llvm_extract_elem(ctx
, src
, chan
);
3053 derived_ptr
= LLVMBuildGEP(ctx
->builder
, ptr
, &index
, 1, "");
3054 LLVMBuildStore(ctx
->builder
,
3055 to_integer(ctx
, value
), derived_ptr
);
3064 static int image_type_to_components_count(enum glsl_sampler_dim dim
, bool array
)
3067 case GLSL_SAMPLER_DIM_BUF
:
3069 case GLSL_SAMPLER_DIM_1D
:
3070 return array
? 2 : 1;
3071 case GLSL_SAMPLER_DIM_2D
:
3072 return array
? 3 : 2;
3073 case GLSL_SAMPLER_DIM_MS
:
3074 return array
? 4 : 3;
3075 case GLSL_SAMPLER_DIM_3D
:
3076 case GLSL_SAMPLER_DIM_CUBE
:
3078 case GLSL_SAMPLER_DIM_RECT
:
3079 case GLSL_SAMPLER_DIM_SUBPASS
:
3081 case GLSL_SAMPLER_DIM_SUBPASS_MS
:
3091 /* Adjust the sample index according to FMASK.
3093 * For uncompressed MSAA surfaces, FMASK should return 0x76543210,
3094 * which is the identity mapping. Each nibble says which physical sample
3095 * should be fetched to get that sample.
3097 * For example, 0x11111100 means there are only 2 samples stored and
3098 * the second sample covers 3/4 of the pixel. When reading samples 0
3099 * and 1, return physical sample 0 (determined by the first two 0s
3100 * in FMASK), otherwise return physical sample 1.
3102 * The sample index should be adjusted as follows:
3103 * sample_index = (fmask >> (sample_index * 4)) & 0xF;
3105 static LLVMValueRef
adjust_sample_index_using_fmask(struct nir_to_llvm_context
*ctx
,
3106 LLVMValueRef coord_x
, LLVMValueRef coord_y
,
3107 LLVMValueRef coord_z
,
3108 LLVMValueRef sample_index
,
3109 LLVMValueRef fmask_desc_ptr
)
3111 LLVMValueRef fmask_load_address
[4];
3114 fmask_load_address
[0] = coord_x
;
3115 fmask_load_address
[1] = coord_y
;
3117 fmask_load_address
[2] = coord_z
;
3118 fmask_load_address
[3] = LLVMGetUndef(ctx
->i32
);
3121 struct ac_image_args args
= {0};
3123 args
.opcode
= ac_image_load
;
3124 args
.da
= coord_z
? true : false;
3125 args
.resource
= fmask_desc_ptr
;
3127 args
.addr
= ac_build_gather_values(&ctx
->ac
, fmask_load_address
, coord_z
? 4 : 2);
3129 res
= ac_build_image_opcode(&ctx
->ac
, &args
);
3131 res
= to_integer(ctx
, res
);
3132 LLVMValueRef four
= LLVMConstInt(ctx
->i32
, 4, false);
3133 LLVMValueRef F
= LLVMConstInt(ctx
->i32
, 0xf, false);
3135 LLVMValueRef fmask
= LLVMBuildExtractElement(ctx
->builder
,
3139 LLVMValueRef sample_index4
=
3140 LLVMBuildMul(ctx
->builder
, sample_index
, four
, "");
3141 LLVMValueRef shifted_fmask
=
3142 LLVMBuildLShr(ctx
->builder
, fmask
, sample_index4
, "");
3143 LLVMValueRef final_sample
=
3144 LLVMBuildAnd(ctx
->builder
, shifted_fmask
, F
, "");
3146 /* Don't rewrite the sample index if WORD1.DATA_FORMAT of the FMASK
3147 * resource descriptor is 0 (invalid),
3149 LLVMValueRef fmask_desc
=
3150 LLVMBuildBitCast(ctx
->builder
, fmask_desc_ptr
,
3153 LLVMValueRef fmask_word1
=
3154 LLVMBuildExtractElement(ctx
->builder
, fmask_desc
,
3157 LLVMValueRef word1_is_nonzero
=
3158 LLVMBuildICmp(ctx
->builder
, LLVMIntNE
,
3159 fmask_word1
, ctx
->i32zero
, "");
3161 /* Replace the MSAA sample index. */
3163 LLVMBuildSelect(ctx
->builder
, word1_is_nonzero
,
3164 final_sample
, sample_index
, "");
3165 return sample_index
;
3168 static LLVMValueRef
get_image_coords(struct nir_to_llvm_context
*ctx
,
3169 nir_intrinsic_instr
*instr
)
3171 const struct glsl_type
*type
= instr
->variables
[0]->var
->type
;
3172 if(instr
->variables
[0]->deref
.child
)
3173 type
= instr
->variables
[0]->deref
.child
->type
;
3175 LLVMValueRef src0
= get_src(ctx
, instr
->src
[0]);
3176 LLVMValueRef coords
[4];
3177 LLVMValueRef masks
[] = {
3178 LLVMConstInt(ctx
->i32
, 0, false), LLVMConstInt(ctx
->i32
, 1, false),
3179 LLVMConstInt(ctx
->i32
, 2, false), LLVMConstInt(ctx
->i32
, 3, false),
3182 LLVMValueRef sample_index
= llvm_extract_elem(ctx
, get_src(ctx
, instr
->src
[1]), 0);
3185 enum glsl_sampler_dim dim
= glsl_get_sampler_dim(type
);
3186 bool add_frag_pos
= (dim
== GLSL_SAMPLER_DIM_SUBPASS
||
3187 dim
== GLSL_SAMPLER_DIM_SUBPASS_MS
);
3188 bool is_ms
= (dim
== GLSL_SAMPLER_DIM_MS
||
3189 dim
== GLSL_SAMPLER_DIM_SUBPASS_MS
);
3191 count
= image_type_to_components_count(dim
,
3192 glsl_sampler_type_is_array(type
));
3195 LLVMValueRef fmask_load_address
[3];
3198 fmask_load_address
[0] = LLVMBuildExtractElement(ctx
->builder
, src0
, masks
[0], "");
3199 fmask_load_address
[1] = LLVMBuildExtractElement(ctx
->builder
, src0
, masks
[1], "");
3200 if (glsl_sampler_type_is_array(type
))
3201 fmask_load_address
[2] = LLVMBuildExtractElement(ctx
->builder
, src0
, masks
[2], "");
3203 fmask_load_address
[2] = NULL
;
3205 for (chan
= 0; chan
< 2; ++chan
)
3206 fmask_load_address
[chan
] = LLVMBuildAdd(ctx
->builder
, fmask_load_address
[chan
], LLVMBuildFPToUI(ctx
->builder
, ctx
->frag_pos
[chan
], ctx
->i32
, ""), "");
3208 sample_index
= adjust_sample_index_using_fmask(ctx
,
3209 fmask_load_address
[0],
3210 fmask_load_address
[1],
3211 fmask_load_address
[2],
3213 get_sampler_desc(ctx
, instr
->variables
[0], DESC_FMASK
));
3216 if (instr
->src
[0].ssa
->num_components
)
3217 res
= LLVMBuildExtractElement(ctx
->builder
, src0
, masks
[0], "");
3224 for (chan
= 0; chan
< count
; ++chan
) {
3225 coords
[chan
] = LLVMBuildExtractElement(ctx
->builder
, src0
, masks
[chan
], "");
3229 for (chan
= 0; chan
< count
; ++chan
)
3230 coords
[chan
] = LLVMBuildAdd(ctx
->builder
, coords
[chan
], LLVMBuildFPToUI(ctx
->builder
, ctx
->frag_pos
[chan
], ctx
->i32
, ""), "");
3233 coords
[count
] = sample_index
;
3238 coords
[3] = LLVMGetUndef(ctx
->i32
);
3241 res
= ac_build_gather_values(&ctx
->ac
, coords
, count
);
3246 static LLVMValueRef
visit_image_load(struct nir_to_llvm_context
*ctx
,
3247 nir_intrinsic_instr
*instr
)
3249 LLVMValueRef params
[7];
3251 char intrinsic_name
[64];
3252 const nir_variable
*var
= instr
->variables
[0]->var
;
3253 const struct glsl_type
*type
= var
->type
;
3254 if(instr
->variables
[0]->deref
.child
)
3255 type
= instr
->variables
[0]->deref
.child
->type
;
3257 type
= glsl_without_array(type
);
3258 if (glsl_get_sampler_dim(type
) == GLSL_SAMPLER_DIM_BUF
) {
3259 params
[0] = get_sampler_desc(ctx
, instr
->variables
[0], DESC_BUFFER
);
3260 params
[1] = LLVMBuildExtractElement(ctx
->builder
, get_src(ctx
, instr
->src
[0]),
3261 LLVMConstInt(ctx
->i32
, 0, false), ""); /* vindex */
3262 params
[2] = LLVMConstInt(ctx
->i32
, 0, false); /* voffset */
3263 params
[3] = ctx
->i1false
; /* glc */
3264 params
[4] = ctx
->i1false
; /* slc */
3265 res
= ac_build_intrinsic(&ctx
->ac
, "llvm.amdgcn.buffer.load.format.v4f32", ctx
->v4f32
,
3268 res
= trim_vector(ctx
, res
, instr
->dest
.ssa
.num_components
);
3269 res
= to_integer(ctx
, res
);
3271 bool is_da
= glsl_sampler_type_is_array(type
) ||
3272 glsl_get_sampler_dim(type
) == GLSL_SAMPLER_DIM_CUBE
;
3273 LLVMValueRef da
= is_da
? ctx
->i1true
: ctx
->i1false
;
3274 LLVMValueRef glc
= ctx
->i1false
;
3275 LLVMValueRef slc
= ctx
->i1false
;
3277 params
[0] = get_image_coords(ctx
, instr
);
3278 params
[1] = get_sampler_desc(ctx
, instr
->variables
[0], DESC_IMAGE
);
3279 params
[2] = LLVMConstInt(ctx
->i32
, 15, false); /* dmask */
3280 if (HAVE_LLVM
<= 0x0309) {
3281 params
[3] = ctx
->i1false
; /* r128 */
3286 LLVMValueRef lwe
= ctx
->i1false
;
3293 ac_get_image_intr_name("llvm.amdgcn.image.load",
3294 ctx
->v4f32
, /* vdata */
3295 LLVMTypeOf(params
[0]), /* coords */
3296 LLVMTypeOf(params
[1]), /* rsrc */
3297 intrinsic_name
, sizeof(intrinsic_name
));
3299 res
= ac_build_intrinsic(&ctx
->ac
, intrinsic_name
, ctx
->v4f32
,
3300 params
, 7, AC_FUNC_ATTR_READONLY
);
3302 return to_integer(ctx
, res
);
3305 static void visit_image_store(struct nir_to_llvm_context
*ctx
,
3306 nir_intrinsic_instr
*instr
)
3308 LLVMValueRef params
[8];
3309 char intrinsic_name
[64];
3310 const nir_variable
*var
= instr
->variables
[0]->var
;
3311 const struct glsl_type
*type
= glsl_without_array(var
->type
);
3313 if (ctx
->stage
== MESA_SHADER_FRAGMENT
)
3314 ctx
->shader_info
->fs
.writes_memory
= true;
3316 if (glsl_get_sampler_dim(type
) == GLSL_SAMPLER_DIM_BUF
) {
3317 params
[0] = to_float(ctx
, get_src(ctx
, instr
->src
[2])); /* data */
3318 params
[1] = get_sampler_desc(ctx
, instr
->variables
[0], DESC_BUFFER
);
3319 params
[2] = LLVMBuildExtractElement(ctx
->builder
, get_src(ctx
, instr
->src
[0]),
3320 LLVMConstInt(ctx
->i32
, 0, false), ""); /* vindex */
3321 params
[3] = LLVMConstInt(ctx
->i32
, 0, false); /* voffset */
3322 params
[4] = ctx
->i1false
; /* glc */
3323 params
[5] = ctx
->i1false
; /* slc */
3324 ac_build_intrinsic(&ctx
->ac
, "llvm.amdgcn.buffer.store.format.v4f32", ctx
->voidt
,
3327 bool is_da
= glsl_sampler_type_is_array(type
) ||
3328 glsl_get_sampler_dim(type
) == GLSL_SAMPLER_DIM_CUBE
;
3329 LLVMValueRef da
= is_da
? ctx
->i1true
: ctx
->i1false
;
3330 LLVMValueRef glc
= ctx
->i1false
;
3331 LLVMValueRef slc
= ctx
->i1false
;
3333 params
[0] = to_float(ctx
, get_src(ctx
, instr
->src
[2]));
3334 params
[1] = get_image_coords(ctx
, instr
); /* coords */
3335 params
[2] = get_sampler_desc(ctx
, instr
->variables
[0], DESC_IMAGE
);
3336 params
[3] = LLVMConstInt(ctx
->i32
, 15, false); /* dmask */
3337 if (HAVE_LLVM
<= 0x0309) {
3338 params
[4] = ctx
->i1false
; /* r128 */
3343 LLVMValueRef lwe
= ctx
->i1false
;
3350 ac_get_image_intr_name("llvm.amdgcn.image.store",
3351 LLVMTypeOf(params
[0]), /* vdata */
3352 LLVMTypeOf(params
[1]), /* coords */
3353 LLVMTypeOf(params
[2]), /* rsrc */
3354 intrinsic_name
, sizeof(intrinsic_name
));
3356 ac_build_intrinsic(&ctx
->ac
, intrinsic_name
, ctx
->voidt
,
3362 static LLVMValueRef
visit_image_atomic(struct nir_to_llvm_context
*ctx
,
3363 nir_intrinsic_instr
*instr
)
3365 LLVMValueRef params
[6];
3366 int param_count
= 0;
3367 const nir_variable
*var
= instr
->variables
[0]->var
;
3369 const char *base_name
= "llvm.amdgcn.image.atomic";
3370 const char *atomic_name
;
3371 LLVMValueRef coords
;
3372 char intrinsic_name
[32], coords_type
[8];
3373 const struct glsl_type
*type
= glsl_without_array(var
->type
);
3375 if (ctx
->stage
== MESA_SHADER_FRAGMENT
)
3376 ctx
->shader_info
->fs
.writes_memory
= true;
3378 params
[param_count
++] = get_src(ctx
, instr
->src
[2]);
3379 if (instr
->intrinsic
== nir_intrinsic_image_atomic_comp_swap
)
3380 params
[param_count
++] = get_src(ctx
, instr
->src
[3]);
3382 if (glsl_get_sampler_dim(type
) == GLSL_SAMPLER_DIM_BUF
) {
3383 params
[param_count
++] = get_sampler_desc(ctx
, instr
->variables
[0], DESC_BUFFER
);
3384 coords
= params
[param_count
++] = LLVMBuildExtractElement(ctx
->builder
, get_src(ctx
, instr
->src
[0]),
3385 LLVMConstInt(ctx
->i32
, 0, false), ""); /* vindex */
3386 params
[param_count
++] = ctx
->i32zero
; /* voffset */
3387 params
[param_count
++] = ctx
->i1false
; /* glc */
3388 params
[param_count
++] = ctx
->i1false
; /* slc */
3390 bool da
= glsl_sampler_type_is_array(type
) ||
3391 glsl_get_sampler_dim(type
) == GLSL_SAMPLER_DIM_CUBE
;
3393 coords
= params
[param_count
++] = get_image_coords(ctx
, instr
);
3394 params
[param_count
++] = get_sampler_desc(ctx
, instr
->variables
[0], DESC_IMAGE
);
3395 params
[param_count
++] = ctx
->i1false
; /* r128 */
3396 params
[param_count
++] = da
? ctx
->i1true
: ctx
->i1false
; /* da */
3397 params
[param_count
++] = ctx
->i1false
; /* slc */
3400 switch (instr
->intrinsic
) {
3401 case nir_intrinsic_image_atomic_add
:
3402 atomic_name
= "add";
3404 case nir_intrinsic_image_atomic_min
:
3405 atomic_name
= "smin";
3407 case nir_intrinsic_image_atomic_max
:
3408 atomic_name
= "smax";
3410 case nir_intrinsic_image_atomic_and
:
3411 atomic_name
= "and";
3413 case nir_intrinsic_image_atomic_or
:
3416 case nir_intrinsic_image_atomic_xor
:
3417 atomic_name
= "xor";
3419 case nir_intrinsic_image_atomic_exchange
:
3420 atomic_name
= "swap";
3422 case nir_intrinsic_image_atomic_comp_swap
:
3423 atomic_name
= "cmpswap";
3428 build_int_type_name(LLVMTypeOf(coords
),
3429 coords_type
, sizeof(coords_type
));
3431 snprintf(intrinsic_name
, sizeof(intrinsic_name
),
3432 "%s.%s.%s", base_name
, atomic_name
, coords_type
);
3433 return ac_build_intrinsic(&ctx
->ac
, intrinsic_name
, ctx
->i32
, params
, param_count
, 0);
3436 static LLVMValueRef
visit_image_size(struct nir_to_llvm_context
*ctx
,
3437 nir_intrinsic_instr
*instr
)
3440 const nir_variable
*var
= instr
->variables
[0]->var
;
3441 const struct glsl_type
*type
= instr
->variables
[0]->var
->type
;
3442 bool da
= glsl_sampler_type_is_array(var
->type
) ||
3443 glsl_get_sampler_dim(var
->type
) == GLSL_SAMPLER_DIM_CUBE
;
3444 if(instr
->variables
[0]->deref
.child
)
3445 type
= instr
->variables
[0]->deref
.child
->type
;
3447 if (glsl_get_sampler_dim(type
) == GLSL_SAMPLER_DIM_BUF
)
3448 return get_buffer_size(ctx
, get_sampler_desc(ctx
, instr
->variables
[0], DESC_BUFFER
), true);
3450 struct ac_image_args args
= { 0 };
3454 args
.resource
= get_sampler_desc(ctx
, instr
->variables
[0], DESC_IMAGE
);
3455 args
.opcode
= ac_image_get_resinfo
;
3456 args
.addr
= ctx
->i32zero
;
3458 res
= ac_build_image_opcode(&ctx
->ac
, &args
);
3460 if (glsl_get_sampler_dim(type
) == GLSL_SAMPLER_DIM_CUBE
&&
3461 glsl_sampler_type_is_array(type
)) {
3462 LLVMValueRef two
= LLVMConstInt(ctx
->i32
, 2, false);
3463 LLVMValueRef six
= LLVMConstInt(ctx
->i32
, 6, false);
3464 LLVMValueRef z
= LLVMBuildExtractElement(ctx
->builder
, res
, two
, "");
3465 z
= LLVMBuildSDiv(ctx
->builder
, z
, six
, "");
3466 res
= LLVMBuildInsertElement(ctx
->builder
, res
, z
, two
, "");
3471 #define NOOP_WAITCNT 0xf7f
3472 #define LGKM_CNT 0x07f
3473 #define VM_CNT 0xf70
3475 static void emit_waitcnt(struct nir_to_llvm_context
*ctx
,
3478 LLVMValueRef args
[1] = {
3479 LLVMConstInt(ctx
->i32
, simm16
, false),
3481 ac_build_intrinsic(&ctx
->ac
, "llvm.amdgcn.s.waitcnt",
3482 ctx
->voidt
, args
, 1, 0);
3485 static void emit_barrier(struct nir_to_llvm_context
*ctx
)
3487 /* SI only (thanks to a hw bug workaround):
3488 * The real barrier instruction isn’t needed, because an entire patch
3489 * always fits into a single wave.
3491 if (ctx
->options
->chip_class
== SI
&&
3492 ctx
->stage
== MESA_SHADER_TESS_CTRL
) {
3493 emit_waitcnt(ctx
, LGKM_CNT
& VM_CNT
);
3496 ac_build_intrinsic(&ctx
->ac
, "llvm.amdgcn.s.barrier",
3497 ctx
->voidt
, NULL
, 0, AC_FUNC_ATTR_CONVERGENT
);
3500 static void emit_discard_if(struct nir_to_llvm_context
*ctx
,
3501 nir_intrinsic_instr
*instr
)
3504 ctx
->shader_info
->fs
.can_discard
= true;
3506 cond
= LLVMBuildICmp(ctx
->builder
, LLVMIntNE
,
3507 get_src(ctx
, instr
->src
[0]),
3510 cond
= LLVMBuildSelect(ctx
->builder
, cond
,
3511 LLVMConstReal(ctx
->f32
, -1.0f
),
3513 ac_build_kill(&ctx
->ac
, cond
);
3517 visit_load_local_invocation_index(struct nir_to_llvm_context
*ctx
)
3519 LLVMValueRef result
;
3520 LLVMValueRef thread_id
= ac_get_thread_id(&ctx
->ac
);
3521 result
= LLVMBuildAnd(ctx
->builder
, ctx
->tg_size
,
3522 LLVMConstInt(ctx
->i32
, 0xfc0, false), "");
3524 return LLVMBuildAdd(ctx
->builder
, result
, thread_id
, "");
3527 static LLVMValueRef
visit_var_atomic(struct nir_to_llvm_context
*ctx
,
3528 nir_intrinsic_instr
*instr
)
3530 LLVMValueRef ptr
, result
;
3531 int idx
= instr
->variables
[0]->var
->data
.driver_location
;
3532 LLVMValueRef src
= get_src(ctx
, instr
->src
[0]);
3533 ptr
= get_shared_memory_ptr(ctx
, idx
, ctx
->i32
);
3535 if (instr
->intrinsic
== nir_intrinsic_var_atomic_comp_swap
) {
3536 LLVMValueRef src1
= get_src(ctx
, instr
->src
[1]);
3537 result
= LLVMBuildAtomicCmpXchg(ctx
->builder
,
3539 LLVMAtomicOrderingSequentiallyConsistent
,
3540 LLVMAtomicOrderingSequentiallyConsistent
,
3543 LLVMAtomicRMWBinOp op
;
3544 switch (instr
->intrinsic
) {
3545 case nir_intrinsic_var_atomic_add
:
3546 op
= LLVMAtomicRMWBinOpAdd
;
3548 case nir_intrinsic_var_atomic_umin
:
3549 op
= LLVMAtomicRMWBinOpUMin
;
3551 case nir_intrinsic_var_atomic_umax
:
3552 op
= LLVMAtomicRMWBinOpUMax
;
3554 case nir_intrinsic_var_atomic_imin
:
3555 op
= LLVMAtomicRMWBinOpMin
;
3557 case nir_intrinsic_var_atomic_imax
:
3558 op
= LLVMAtomicRMWBinOpMax
;
3560 case nir_intrinsic_var_atomic_and
:
3561 op
= LLVMAtomicRMWBinOpAnd
;
3563 case nir_intrinsic_var_atomic_or
:
3564 op
= LLVMAtomicRMWBinOpOr
;
3566 case nir_intrinsic_var_atomic_xor
:
3567 op
= LLVMAtomicRMWBinOpXor
;
3569 case nir_intrinsic_var_atomic_exchange
:
3570 op
= LLVMAtomicRMWBinOpXchg
;
3576 result
= LLVMBuildAtomicRMW(ctx
->builder
, op
, ptr
, to_integer(ctx
, src
),
3577 LLVMAtomicOrderingSequentiallyConsistent
,
3583 #define INTERP_CENTER 0
3584 #define INTERP_CENTROID 1
3585 #define INTERP_SAMPLE 2
3587 static LLVMValueRef
lookup_interp_param(struct nir_to_llvm_context
*ctx
,
3588 enum glsl_interp_mode interp
, unsigned location
)
3591 case INTERP_MODE_FLAT
:
3594 case INTERP_MODE_SMOOTH
:
3595 case INTERP_MODE_NONE
:
3596 if (location
== INTERP_CENTER
)
3597 return ctx
->persp_center
;
3598 else if (location
== INTERP_CENTROID
)
3599 return ctx
->persp_centroid
;
3600 else if (location
== INTERP_SAMPLE
)
3601 return ctx
->persp_sample
;
3603 case INTERP_MODE_NOPERSPECTIVE
:
3604 if (location
== INTERP_CENTER
)
3605 return ctx
->linear_center
;
3606 else if (location
== INTERP_CENTROID
)
3607 return ctx
->linear_centroid
;
3608 else if (location
== INTERP_SAMPLE
)
3609 return ctx
->linear_sample
;
3615 static LLVMValueRef
load_sample_position(struct nir_to_llvm_context
*ctx
,
3616 LLVMValueRef sample_id
)
3618 LLVMValueRef result
;
3619 LLVMValueRef ptr
= ac_build_gep0(&ctx
->ac
, ctx
->ring_offsets
, LLVMConstInt(ctx
->i32
, RING_PS_SAMPLE_POSITIONS
, false));
3621 ptr
= LLVMBuildBitCast(ctx
->builder
, ptr
,
3622 const_array(ctx
->v2f32
, 64), "");
3624 sample_id
= LLVMBuildAdd(ctx
->builder
, sample_id
, ctx
->sample_pos_offset
, "");
3625 result
= ac_build_indexed_load(&ctx
->ac
, ptr
, sample_id
, false);
3630 static LLVMValueRef
load_sample_pos(struct nir_to_llvm_context
*ctx
)
3632 LLVMValueRef values
[2];
3634 values
[0] = emit_ffract(ctx
, ctx
->frag_pos
[0]);
3635 values
[1] = emit_ffract(ctx
, ctx
->frag_pos
[1]);
3636 return ac_build_gather_values(&ctx
->ac
, values
, 2);
3639 static LLVMValueRef
visit_interp(struct nir_to_llvm_context
*ctx
,
3640 nir_intrinsic_instr
*instr
)
3642 LLVMValueRef result
[2];
3643 LLVMValueRef interp_param
, attr_number
;
3646 LLVMValueRef src_c0
, src_c1
;
3648 int input_index
= instr
->variables
[0]->var
->data
.location
- VARYING_SLOT_VAR0
;
3649 switch (instr
->intrinsic
) {
3650 case nir_intrinsic_interp_var_at_centroid
:
3651 location
= INTERP_CENTROID
;
3653 case nir_intrinsic_interp_var_at_sample
:
3654 case nir_intrinsic_interp_var_at_offset
:
3655 location
= INTERP_CENTER
;
3656 src0
= get_src(ctx
, instr
->src
[0]);
3662 if (instr
->intrinsic
== nir_intrinsic_interp_var_at_offset
) {
3663 src_c0
= to_float(ctx
, LLVMBuildExtractElement(ctx
->builder
, src0
, ctx
->i32zero
, ""));
3664 src_c1
= to_float(ctx
, LLVMBuildExtractElement(ctx
->builder
, src0
, ctx
->i32one
, ""));
3665 } else if (instr
->intrinsic
== nir_intrinsic_interp_var_at_sample
) {
3666 LLVMValueRef sample_position
;
3667 LLVMValueRef halfval
= LLVMConstReal(ctx
->f32
, 0.5f
);
3669 /* fetch sample ID */
3670 sample_position
= load_sample_position(ctx
, src0
);
3672 src_c0
= LLVMBuildExtractElement(ctx
->builder
, sample_position
, ctx
->i32zero
, "");
3673 src_c0
= LLVMBuildFSub(ctx
->builder
, src_c0
, halfval
, "");
3674 src_c1
= LLVMBuildExtractElement(ctx
->builder
, sample_position
, ctx
->i32one
, "");
3675 src_c1
= LLVMBuildFSub(ctx
->builder
, src_c1
, halfval
, "");
3677 interp_param
= lookup_interp_param(ctx
, instr
->variables
[0]->var
->data
.interpolation
, location
);
3678 attr_number
= LLVMConstInt(ctx
->i32
, input_index
, false);
3680 if (location
== INTERP_SAMPLE
|| location
== INTERP_CENTER
) {
3681 LLVMValueRef ij_out
[2];
3682 LLVMValueRef ddxy_out
= emit_ddxy_interp(ctx
, interp_param
);
3685 * take the I then J parameters, and the DDX/Y for it, and
3686 * calculate the IJ inputs for the interpolator.
3687 * temp1 = ddx * offset/sample.x + I;
3688 * interp_param.I = ddy * offset/sample.y + temp1;
3689 * temp1 = ddx * offset/sample.x + J;
3690 * interp_param.J = ddy * offset/sample.y + temp1;
3692 for (unsigned i
= 0; i
< 2; i
++) {
3693 LLVMValueRef ix_ll
= LLVMConstInt(ctx
->i32
, i
, false);
3694 LLVMValueRef iy_ll
= LLVMConstInt(ctx
->i32
, i
+ 2, false);
3695 LLVMValueRef ddx_el
= LLVMBuildExtractElement(ctx
->builder
,
3696 ddxy_out
, ix_ll
, "");
3697 LLVMValueRef ddy_el
= LLVMBuildExtractElement(ctx
->builder
,
3698 ddxy_out
, iy_ll
, "");
3699 LLVMValueRef interp_el
= LLVMBuildExtractElement(ctx
->builder
,
3700 interp_param
, ix_ll
, "");
3701 LLVMValueRef temp1
, temp2
;
3703 interp_el
= LLVMBuildBitCast(ctx
->builder
, interp_el
,
3706 temp1
= LLVMBuildFMul(ctx
->builder
, ddx_el
, src_c0
, "");
3707 temp1
= LLVMBuildFAdd(ctx
->builder
, temp1
, interp_el
, "");
3709 temp2
= LLVMBuildFMul(ctx
->builder
, ddy_el
, src_c1
, "");
3710 temp2
= LLVMBuildFAdd(ctx
->builder
, temp2
, temp1
, "");
3712 ij_out
[i
] = LLVMBuildBitCast(ctx
->builder
,
3713 temp2
, ctx
->i32
, "");
3715 interp_param
= ac_build_gather_values(&ctx
->ac
, ij_out
, 2);
3719 for (chan
= 0; chan
< 2; chan
++) {
3720 LLVMValueRef llvm_chan
= LLVMConstInt(ctx
->i32
, chan
, false);
3723 interp_param
= LLVMBuildBitCast(ctx
->builder
,
3724 interp_param
, LLVMVectorType(ctx
->f32
, 2), "");
3725 LLVMValueRef i
= LLVMBuildExtractElement(
3726 ctx
->builder
, interp_param
, ctx
->i32zero
, "");
3727 LLVMValueRef j
= LLVMBuildExtractElement(
3728 ctx
->builder
, interp_param
, ctx
->i32one
, "");
3730 result
[chan
] = ac_build_fs_interp(&ctx
->ac
,
3731 llvm_chan
, attr_number
,
3732 ctx
->prim_mask
, i
, j
);
3734 result
[chan
] = ac_build_fs_interp_mov(&ctx
->ac
,
3735 LLVMConstInt(ctx
->i32
, 2, false),
3736 llvm_chan
, attr_number
,
3740 return ac_build_gather_values(&ctx
->ac
, result
, 2);
3744 visit_emit_vertex(struct nir_to_llvm_context
*ctx
,
3745 nir_intrinsic_instr
*instr
)
3747 LLVMValueRef gs_next_vertex
;
3748 LLVMValueRef can_emit
, kill
;
3751 assert(instr
->const_index
[0] == 0);
3752 /* Write vertex attribute values to GSVS ring */
3753 gs_next_vertex
= LLVMBuildLoad(ctx
->builder
,
3754 ctx
->gs_next_vertex
,
3757 /* If this thread has already emitted the declared maximum number of
3758 * vertices, kill it: excessive vertex emissions are not supposed to
3759 * have any effect, and GS threads have no externally observable
3760 * effects other than emitting vertices.
3762 can_emit
= LLVMBuildICmp(ctx
->builder
, LLVMIntULT
, gs_next_vertex
,
3763 LLVMConstInt(ctx
->i32
, ctx
->gs_max_out_vertices
, false), "");
3765 kill
= LLVMBuildSelect(ctx
->builder
, can_emit
,
3766 LLVMConstReal(ctx
->f32
, 1.0f
),
3767 LLVMConstReal(ctx
->f32
, -1.0f
), "");
3768 ac_build_kill(&ctx
->ac
, kill
);
3770 /* loop num outputs */
3772 for (unsigned i
= 0; i
< RADEON_LLVM_MAX_OUTPUTS
; ++i
) {
3773 LLVMValueRef
*out_ptr
= &ctx
->outputs
[i
* 4];
3778 if (!(ctx
->output_mask
& (1ull << i
)))
3781 if (i
== VARYING_SLOT_CLIP_DIST0
) {
3782 /* pack clip and cull into a single set of slots */
3783 length
= ctx
->num_output_clips
+ ctx
->num_output_culls
;
3787 for (unsigned j
= 0; j
< length
; j
++) {
3788 LLVMValueRef out_val
= LLVMBuildLoad(ctx
->builder
,
3790 LLVMValueRef voffset
= LLVMConstInt(ctx
->i32
, (slot
* 4 + j
) * ctx
->gs_max_out_vertices
, false);
3791 voffset
= LLVMBuildAdd(ctx
->builder
, voffset
, gs_next_vertex
, "");
3792 voffset
= LLVMBuildMul(ctx
->builder
, voffset
, LLVMConstInt(ctx
->i32
, 4, false), "");
3794 out_val
= LLVMBuildBitCast(ctx
->builder
, out_val
, ctx
->i32
, "");
3796 ac_build_buffer_store_dword(&ctx
->ac
, ctx
->gsvs_ring
,
3798 voffset
, ctx
->gs2vs_offset
, 0,
3804 gs_next_vertex
= LLVMBuildAdd(ctx
->builder
, gs_next_vertex
,
3806 LLVMBuildStore(ctx
->builder
, gs_next_vertex
, ctx
->gs_next_vertex
);
3808 ac_build_sendmsg(&ctx
->ac
, AC_SENDMSG_GS_OP_EMIT
| AC_SENDMSG_GS
| (0 << 8), ctx
->gs_wave_id
);
3812 visit_end_primitive(struct nir_to_llvm_context
*ctx
,
3813 nir_intrinsic_instr
*instr
)
3815 ac_build_sendmsg(&ctx
->ac
, AC_SENDMSG_GS_OP_CUT
| AC_SENDMSG_GS
| (0 << 8), ctx
->gs_wave_id
);
3819 visit_load_tess_coord(struct nir_to_llvm_context
*ctx
,
3820 nir_intrinsic_instr
*instr
)
3822 LLVMValueRef coord
[4] = {
3829 if (ctx
->tes_primitive_mode
== GL_TRIANGLES
)
3830 coord
[2] = LLVMBuildFSub(ctx
->builder
, ctx
->f32one
,
3831 LLVMBuildFAdd(ctx
->builder
, coord
[0], coord
[1], ""), "");
3833 LLVMValueRef result
= ac_build_gather_values(&ctx
->ac
, coord
, instr
->num_components
);
3834 return LLVMBuildBitCast(ctx
->builder
, result
,
3835 get_def_type(ctx
, &instr
->dest
.ssa
), "");
3838 static void visit_intrinsic(struct nir_to_llvm_context
*ctx
,
3839 nir_intrinsic_instr
*instr
)
3841 LLVMValueRef result
= NULL
;
3843 switch (instr
->intrinsic
) {
3844 case nir_intrinsic_load_work_group_id
: {
3845 result
= ctx
->workgroup_ids
;
3848 case nir_intrinsic_load_base_vertex
: {
3849 result
= ctx
->base_vertex
;
3852 case nir_intrinsic_load_vertex_id_zero_base
: {
3853 result
= ctx
->vertex_id
;
3856 case nir_intrinsic_load_local_invocation_id
: {
3857 result
= ctx
->local_invocation_ids
;
3860 case nir_intrinsic_load_base_instance
:
3861 result
= ctx
->start_instance
;
3863 case nir_intrinsic_load_draw_id
:
3864 result
= ctx
->draw_index
;
3866 case nir_intrinsic_load_invocation_id
:
3867 if (ctx
->stage
== MESA_SHADER_TESS_CTRL
)
3868 result
= unpack_param(ctx
, ctx
->tcs_rel_ids
, 8, 5);
3870 result
= ctx
->gs_invocation_id
;
3872 case nir_intrinsic_load_primitive_id
:
3873 if (ctx
->stage
== MESA_SHADER_GEOMETRY
)
3874 result
= ctx
->gs_prim_id
;
3875 else if (ctx
->stage
== MESA_SHADER_TESS_CTRL
)
3876 result
= ctx
->tcs_patch_id
;
3877 else if (ctx
->stage
== MESA_SHADER_TESS_EVAL
)
3878 result
= ctx
->tes_patch_id
;
3880 fprintf(stderr
, "Unknown primitive id intrinsic: %d", ctx
->stage
);
3882 case nir_intrinsic_load_sample_id
:
3883 ctx
->shader_info
->fs
.force_persample
= true;
3884 result
= unpack_param(ctx
, ctx
->ancillary
, 8, 4);
3886 case nir_intrinsic_load_sample_pos
:
3887 ctx
->shader_info
->fs
.force_persample
= true;
3888 result
= load_sample_pos(ctx
);
3890 case nir_intrinsic_load_sample_mask_in
:
3891 result
= ctx
->sample_coverage
;
3893 case nir_intrinsic_load_front_face
:
3894 result
= ctx
->front_face
;
3896 case nir_intrinsic_load_instance_id
:
3897 result
= ctx
->instance_id
;
3898 ctx
->shader_info
->vs
.vgpr_comp_cnt
= MAX2(3,
3899 ctx
->shader_info
->vs
.vgpr_comp_cnt
);
3901 case nir_intrinsic_load_num_work_groups
:
3902 result
= ctx
->num_work_groups
;
3904 case nir_intrinsic_load_local_invocation_index
:
3905 result
= visit_load_local_invocation_index(ctx
);
3907 case nir_intrinsic_load_push_constant
:
3908 result
= visit_load_push_constant(ctx
, instr
);
3910 case nir_intrinsic_vulkan_resource_index
:
3911 result
= visit_vulkan_resource_index(ctx
, instr
);
3913 case nir_intrinsic_store_ssbo
:
3914 visit_store_ssbo(ctx
, instr
);
3916 case nir_intrinsic_load_ssbo
:
3917 result
= visit_load_buffer(ctx
, instr
);
3919 case nir_intrinsic_ssbo_atomic_add
:
3920 case nir_intrinsic_ssbo_atomic_imin
:
3921 case nir_intrinsic_ssbo_atomic_umin
:
3922 case nir_intrinsic_ssbo_atomic_imax
:
3923 case nir_intrinsic_ssbo_atomic_umax
:
3924 case nir_intrinsic_ssbo_atomic_and
:
3925 case nir_intrinsic_ssbo_atomic_or
:
3926 case nir_intrinsic_ssbo_atomic_xor
:
3927 case nir_intrinsic_ssbo_atomic_exchange
:
3928 case nir_intrinsic_ssbo_atomic_comp_swap
:
3929 result
= visit_atomic_ssbo(ctx
, instr
);
3931 case nir_intrinsic_load_ubo
:
3932 result
= visit_load_ubo_buffer(ctx
, instr
);
3934 case nir_intrinsic_get_buffer_size
:
3935 result
= visit_get_buffer_size(ctx
, instr
);
3937 case nir_intrinsic_load_var
:
3938 result
= visit_load_var(ctx
, instr
);
3940 case nir_intrinsic_store_var
:
3941 visit_store_var(ctx
, instr
);
3943 case nir_intrinsic_image_load
:
3944 result
= visit_image_load(ctx
, instr
);
3946 case nir_intrinsic_image_store
:
3947 visit_image_store(ctx
, instr
);
3949 case nir_intrinsic_image_atomic_add
:
3950 case nir_intrinsic_image_atomic_min
:
3951 case nir_intrinsic_image_atomic_max
:
3952 case nir_intrinsic_image_atomic_and
:
3953 case nir_intrinsic_image_atomic_or
:
3954 case nir_intrinsic_image_atomic_xor
:
3955 case nir_intrinsic_image_atomic_exchange
:
3956 case nir_intrinsic_image_atomic_comp_swap
:
3957 result
= visit_image_atomic(ctx
, instr
);
3959 case nir_intrinsic_image_size
:
3960 result
= visit_image_size(ctx
, instr
);
3962 case nir_intrinsic_discard
:
3963 ctx
->shader_info
->fs
.can_discard
= true;
3964 ac_build_intrinsic(&ctx
->ac
, "llvm.AMDGPU.kilp",
3966 NULL
, 0, AC_FUNC_ATTR_LEGACY
);
3968 case nir_intrinsic_discard_if
:
3969 emit_discard_if(ctx
, instr
);
3971 case nir_intrinsic_memory_barrier
:
3972 emit_waitcnt(ctx
, VM_CNT
);
3974 case nir_intrinsic_barrier
:
3977 case nir_intrinsic_var_atomic_add
:
3978 case nir_intrinsic_var_atomic_imin
:
3979 case nir_intrinsic_var_atomic_umin
:
3980 case nir_intrinsic_var_atomic_imax
:
3981 case nir_intrinsic_var_atomic_umax
:
3982 case nir_intrinsic_var_atomic_and
:
3983 case nir_intrinsic_var_atomic_or
:
3984 case nir_intrinsic_var_atomic_xor
:
3985 case nir_intrinsic_var_atomic_exchange
:
3986 case nir_intrinsic_var_atomic_comp_swap
:
3987 result
= visit_var_atomic(ctx
, instr
);
3989 case nir_intrinsic_interp_var_at_centroid
:
3990 case nir_intrinsic_interp_var_at_sample
:
3991 case nir_intrinsic_interp_var_at_offset
:
3992 result
= visit_interp(ctx
, instr
);
3994 case nir_intrinsic_emit_vertex
:
3995 visit_emit_vertex(ctx
, instr
);
3997 case nir_intrinsic_end_primitive
:
3998 visit_end_primitive(ctx
, instr
);
4000 case nir_intrinsic_load_tess_coord
:
4001 result
= visit_load_tess_coord(ctx
, instr
);
4003 case nir_intrinsic_load_patch_vertices_in
:
4004 result
= LLVMConstInt(ctx
->i32
, ctx
->options
->key
.tcs
.input_vertices
, false);
4007 fprintf(stderr
, "Unknown intrinsic: ");
4008 nir_print_instr(&instr
->instr
, stderr
);
4009 fprintf(stderr
, "\n");
4013 _mesa_hash_table_insert(ctx
->defs
, &instr
->dest
.ssa
, result
);
4017 static LLVMValueRef
get_sampler_desc(struct nir_to_llvm_context
*ctx
,
4018 nir_deref_var
*deref
,
4019 enum desc_type desc_type
)
4021 unsigned desc_set
= deref
->var
->data
.descriptor_set
;
4022 LLVMValueRef list
= ctx
->descriptor_sets
[desc_set
];
4023 struct radv_descriptor_set_layout
*layout
= ctx
->options
->layout
->set
[desc_set
].layout
;
4024 struct radv_descriptor_set_binding_layout
*binding
= layout
->binding
+ deref
->var
->data
.binding
;
4025 unsigned offset
= binding
->offset
;
4026 unsigned stride
= binding
->size
;
4028 LLVMBuilderRef builder
= ctx
->builder
;
4030 LLVMValueRef index
= NULL
;
4031 unsigned constant_index
= 0;
4033 assert(deref
->var
->data
.binding
< layout
->binding_count
);
4035 switch (desc_type
) {
4047 if (binding
->type
== VK_DESCRIPTOR_TYPE_COMBINED_IMAGE_SAMPLER
)
4057 unreachable("invalid desc_type\n");
4060 if (deref
->deref
.child
) {
4061 nir_deref_array
*child
= (nir_deref_array
*)deref
->deref
.child
;
4063 assert(child
->deref_array_type
!= nir_deref_array_type_wildcard
);
4064 offset
+= child
->base_offset
* stride
;
4065 if (child
->deref_array_type
== nir_deref_array_type_indirect
) {
4066 index
= get_src(ctx
, child
->indirect
);
4069 constant_index
= child
->base_offset
;
4071 if (desc_type
== DESC_SAMPLER
&& binding
->immutable_samplers_offset
&&
4072 (!index
|| binding
->immutable_samplers_equal
)) {
4073 if (binding
->immutable_samplers_equal
)
4076 const uint32_t *samplers
= radv_immutable_samplers(layout
, binding
);
4078 LLVMValueRef constants
[] = {
4079 LLVMConstInt(ctx
->i32
, samplers
[constant_index
* 4 + 0], 0),
4080 LLVMConstInt(ctx
->i32
, samplers
[constant_index
* 4 + 1], 0),
4081 LLVMConstInt(ctx
->i32
, samplers
[constant_index
* 4 + 2], 0),
4082 LLVMConstInt(ctx
->i32
, samplers
[constant_index
* 4 + 3], 0),
4084 return ac_build_gather_values(&ctx
->ac
, constants
, 4);
4087 assert(stride
% type_size
== 0);
4090 index
= ctx
->i32zero
;
4092 index
= LLVMBuildMul(builder
, index
, LLVMConstInt(ctx
->i32
, stride
/ type_size
, 0), "");
4094 list
= ac_build_gep0(&ctx
->ac
, list
, LLVMConstInt(ctx
->i32
, offset
, 0));
4095 list
= LLVMBuildPointerCast(builder
, list
, const_array(type
, 0), "");
4097 return ac_build_indexed_load_const(&ctx
->ac
, list
, index
);
4100 static void set_tex_fetch_args(struct nir_to_llvm_context
*ctx
,
4101 struct ac_image_args
*args
,
4102 nir_tex_instr
*instr
,
4104 LLVMValueRef res_ptr
, LLVMValueRef samp_ptr
,
4105 LLVMValueRef
*param
, unsigned count
,
4108 unsigned is_rect
= 0;
4109 bool da
= instr
->is_array
|| instr
->sampler_dim
== GLSL_SAMPLER_DIM_CUBE
;
4111 if (op
== nir_texop_lod
)
4113 /* Pad to power of two vector */
4114 while (count
< util_next_power_of_two(count
))
4115 param
[count
++] = LLVMGetUndef(ctx
->i32
);
4118 args
->addr
= ac_build_gather_values(&ctx
->ac
, param
, count
);
4120 args
->addr
= param
[0];
4122 args
->resource
= res_ptr
;
4123 args
->sampler
= samp_ptr
;
4125 if (instr
->sampler_dim
== GLSL_SAMPLER_DIM_BUF
&& op
== nir_texop_txf
) {
4126 args
->addr
= param
[0];
4130 args
->dmask
= dmask
;
4131 args
->unorm
= is_rect
;
4135 /* Disable anisotropic filtering if BASE_LEVEL == LAST_LEVEL.
4138 * If BASE_LEVEL == LAST_LEVEL, the shader must disable anisotropic
4139 * filtering manually. The driver sets img7 to a mask clearing
4140 * MAX_ANISO_RATIO if BASE_LEVEL == LAST_LEVEL. The shader must do:
4141 * s_and_b32 samp0, samp0, img7
4144 * The ANISO_OVERRIDE sampler field enables this fix in TA.
4146 static LLVMValueRef
sici_fix_sampler_aniso(struct nir_to_llvm_context
*ctx
,
4147 LLVMValueRef res
, LLVMValueRef samp
)
4149 LLVMBuilderRef builder
= ctx
->builder
;
4150 LLVMValueRef img7
, samp0
;
4152 if (ctx
->options
->chip_class
>= VI
)
4155 img7
= LLVMBuildExtractElement(builder
, res
,
4156 LLVMConstInt(ctx
->i32
, 7, 0), "");
4157 samp0
= LLVMBuildExtractElement(builder
, samp
,
4158 LLVMConstInt(ctx
->i32
, 0, 0), "");
4159 samp0
= LLVMBuildAnd(builder
, samp0
, img7
, "");
4160 return LLVMBuildInsertElement(builder
, samp
, samp0
,
4161 LLVMConstInt(ctx
->i32
, 0, 0), "");
4164 static void tex_fetch_ptrs(struct nir_to_llvm_context
*ctx
,
4165 nir_tex_instr
*instr
,
4166 LLVMValueRef
*res_ptr
, LLVMValueRef
*samp_ptr
,
4167 LLVMValueRef
*fmask_ptr
)
4169 if (instr
->sampler_dim
== GLSL_SAMPLER_DIM_BUF
)
4170 *res_ptr
= get_sampler_desc(ctx
, instr
->texture
, DESC_BUFFER
);
4172 *res_ptr
= get_sampler_desc(ctx
, instr
->texture
, DESC_IMAGE
);
4175 *samp_ptr
= get_sampler_desc(ctx
, instr
->sampler
, DESC_SAMPLER
);
4177 *samp_ptr
= get_sampler_desc(ctx
, instr
->texture
, DESC_SAMPLER
);
4178 if (instr
->sampler_dim
< GLSL_SAMPLER_DIM_RECT
)
4179 *samp_ptr
= sici_fix_sampler_aniso(ctx
, *res_ptr
, *samp_ptr
);
4181 if (fmask_ptr
&& !instr
->sampler
&& (instr
->op
== nir_texop_txf_ms
||
4182 instr
->op
== nir_texop_samples_identical
))
4183 *fmask_ptr
= get_sampler_desc(ctx
, instr
->texture
, DESC_FMASK
);
4186 static LLVMValueRef
apply_round_slice(struct nir_to_llvm_context
*ctx
,
4189 coord
= to_float(ctx
, coord
);
4190 coord
= ac_build_intrinsic(&ctx
->ac
, "llvm.rint.f32", ctx
->f32
, &coord
, 1, 0);
4191 coord
= to_integer(ctx
, coord
);
4195 static void visit_tex(struct nir_to_llvm_context
*ctx
, nir_tex_instr
*instr
)
4197 LLVMValueRef result
= NULL
;
4198 struct ac_image_args args
= { 0 };
4199 unsigned dmask
= 0xf;
4200 LLVMValueRef address
[16];
4201 LLVMValueRef coords
[5];
4202 LLVMValueRef coord
= NULL
, lod
= NULL
, comparator
= NULL
;
4203 LLVMValueRef bias
= NULL
, offsets
= NULL
;
4204 LLVMValueRef res_ptr
, samp_ptr
, fmask_ptr
= NULL
, sample_index
= NULL
;
4205 LLVMValueRef ddx
= NULL
, ddy
= NULL
;
4206 LLVMValueRef derivs
[6];
4207 unsigned chan
, count
= 0;
4208 unsigned const_src
= 0, num_deriv_comp
= 0;
4210 tex_fetch_ptrs(ctx
, instr
, &res_ptr
, &samp_ptr
, &fmask_ptr
);
4212 for (unsigned i
= 0; i
< instr
->num_srcs
; i
++) {
4213 switch (instr
->src
[i
].src_type
) {
4214 case nir_tex_src_coord
:
4215 coord
= get_src(ctx
, instr
->src
[i
].src
);
4217 case nir_tex_src_projector
:
4219 case nir_tex_src_comparator
:
4220 comparator
= get_src(ctx
, instr
->src
[i
].src
);
4222 case nir_tex_src_offset
:
4223 offsets
= get_src(ctx
, instr
->src
[i
].src
);
4226 case nir_tex_src_bias
:
4227 bias
= get_src(ctx
, instr
->src
[i
].src
);
4229 case nir_tex_src_lod
:
4230 lod
= get_src(ctx
, instr
->src
[i
].src
);
4232 case nir_tex_src_ms_index
:
4233 sample_index
= get_src(ctx
, instr
->src
[i
].src
);
4235 case nir_tex_src_ms_mcs
:
4237 case nir_tex_src_ddx
:
4238 ddx
= get_src(ctx
, instr
->src
[i
].src
);
4239 num_deriv_comp
= instr
->src
[i
].src
.ssa
->num_components
;
4241 case nir_tex_src_ddy
:
4242 ddy
= get_src(ctx
, instr
->src
[i
].src
);
4244 case nir_tex_src_texture_offset
:
4245 case nir_tex_src_sampler_offset
:
4246 case nir_tex_src_plane
:
4252 if (instr
->op
== nir_texop_txs
&& instr
->sampler_dim
== GLSL_SAMPLER_DIM_BUF
) {
4253 result
= get_buffer_size(ctx
, res_ptr
, true);
4257 if (instr
->op
== nir_texop_texture_samples
) {
4258 LLVMValueRef res
, samples
, is_msaa
;
4259 res
= LLVMBuildBitCast(ctx
->builder
, res_ptr
, ctx
->v8i32
, "");
4260 samples
= LLVMBuildExtractElement(ctx
->builder
, res
,
4261 LLVMConstInt(ctx
->i32
, 3, false), "");
4262 is_msaa
= LLVMBuildLShr(ctx
->builder
, samples
,
4263 LLVMConstInt(ctx
->i32
, 28, false), "");
4264 is_msaa
= LLVMBuildAnd(ctx
->builder
, is_msaa
,
4265 LLVMConstInt(ctx
->i32
, 0xe, false), "");
4266 is_msaa
= LLVMBuildICmp(ctx
->builder
, LLVMIntEQ
, is_msaa
,
4267 LLVMConstInt(ctx
->i32
, 0xe, false), "");
4269 samples
= LLVMBuildLShr(ctx
->builder
, samples
,
4270 LLVMConstInt(ctx
->i32
, 16, false), "");
4271 samples
= LLVMBuildAnd(ctx
->builder
, samples
,
4272 LLVMConstInt(ctx
->i32
, 0xf, false), "");
4273 samples
= LLVMBuildShl(ctx
->builder
, ctx
->i32one
,
4275 samples
= LLVMBuildSelect(ctx
->builder
, is_msaa
, samples
,
4282 for (chan
= 0; chan
< instr
->coord_components
; chan
++)
4283 coords
[chan
] = llvm_extract_elem(ctx
, coord
, chan
);
4285 if (offsets
&& instr
->op
!= nir_texop_txf
) {
4286 LLVMValueRef offset
[3], pack
;
4287 for (chan
= 0; chan
< 3; ++chan
)
4288 offset
[chan
] = ctx
->i32zero
;
4291 for (chan
= 0; chan
< get_llvm_num_components(offsets
); chan
++) {
4292 offset
[chan
] = llvm_extract_elem(ctx
, offsets
, chan
);
4293 offset
[chan
] = LLVMBuildAnd(ctx
->builder
, offset
[chan
],
4294 LLVMConstInt(ctx
->i32
, 0x3f, false), "");
4296 offset
[chan
] = LLVMBuildShl(ctx
->builder
, offset
[chan
],
4297 LLVMConstInt(ctx
->i32
, chan
* 8, false), "");
4299 pack
= LLVMBuildOr(ctx
->builder
, offset
[0], offset
[1], "");
4300 pack
= LLVMBuildOr(ctx
->builder
, pack
, offset
[2], "");
4301 address
[count
++] = pack
;
4304 /* pack LOD bias value */
4305 if (instr
->op
== nir_texop_txb
&& bias
) {
4306 address
[count
++] = bias
;
4309 /* Pack depth comparison value */
4310 if (instr
->is_shadow
&& comparator
) {
4311 address
[count
++] = llvm_extract_elem(ctx
, comparator
, 0);
4314 /* pack derivatives */
4316 switch (instr
->sampler_dim
) {
4317 case GLSL_SAMPLER_DIM_3D
:
4318 case GLSL_SAMPLER_DIM_CUBE
:
4321 case GLSL_SAMPLER_DIM_2D
:
4325 case GLSL_SAMPLER_DIM_1D
:
4330 for (unsigned i
= 0; i
< num_deriv_comp
; i
++) {
4331 derivs
[i
] = to_float(ctx
, llvm_extract_elem(ctx
, ddx
, i
));
4332 derivs
[num_deriv_comp
+ i
] = to_float(ctx
, llvm_extract_elem(ctx
, ddy
, i
));
4336 if (instr
->sampler_dim
== GLSL_SAMPLER_DIM_CUBE
&& coord
) {
4337 if (instr
->is_array
&& instr
->op
!= nir_texop_lod
)
4338 coords
[3] = apply_round_slice(ctx
, coords
[3]);
4339 for (chan
= 0; chan
< instr
->coord_components
; chan
++)
4340 coords
[chan
] = to_float(ctx
, coords
[chan
]);
4341 if (instr
->coord_components
== 3)
4342 coords
[3] = LLVMGetUndef(ctx
->f32
);
4343 ac_prepare_cube_coords(&ctx
->ac
,
4344 instr
->op
== nir_texop_txd
, instr
->is_array
,
4351 for (unsigned i
= 0; i
< num_deriv_comp
* 2; i
++)
4352 address
[count
++] = derivs
[i
];
4355 /* Pack texture coordinates */
4357 address
[count
++] = coords
[0];
4358 if (instr
->coord_components
> 1) {
4359 if (instr
->sampler_dim
== GLSL_SAMPLER_DIM_1D
&& instr
->is_array
&& instr
->op
!= nir_texop_txf
) {
4360 coords
[1] = apply_round_slice(ctx
, coords
[1]);
4362 address
[count
++] = coords
[1];
4364 if (instr
->coord_components
> 2) {
4365 /* This seems like a bit of a hack - but it passes Vulkan CTS with it */
4366 if (instr
->sampler_dim
!= GLSL_SAMPLER_DIM_3D
&&
4367 instr
->sampler_dim
!= GLSL_SAMPLER_DIM_CUBE
&&
4368 instr
->op
!= nir_texop_txf
) {
4369 coords
[2] = apply_round_slice(ctx
, coords
[2]);
4371 address
[count
++] = coords
[2];
4376 if ((instr
->op
== nir_texop_txl
|| instr
->op
== nir_texop_txf
) && lod
) {
4377 address
[count
++] = lod
;
4378 } else if (instr
->op
== nir_texop_txf_ms
&& sample_index
) {
4379 address
[count
++] = sample_index
;
4380 } else if(instr
->op
== nir_texop_txs
) {
4383 address
[count
++] = lod
;
4385 address
[count
++] = ctx
->i32zero
;
4388 for (chan
= 0; chan
< count
; chan
++) {
4389 address
[chan
] = LLVMBuildBitCast(ctx
->builder
,
4390 address
[chan
], ctx
->i32
, "");
4393 if (instr
->op
== nir_texop_samples_identical
) {
4394 LLVMValueRef txf_address
[4];
4395 struct ac_image_args txf_args
= { 0 };
4396 unsigned txf_count
= count
;
4397 memcpy(txf_address
, address
, sizeof(txf_address
));
4399 if (!instr
->is_array
)
4400 txf_address
[2] = ctx
->i32zero
;
4401 txf_address
[3] = ctx
->i32zero
;
4403 set_tex_fetch_args(ctx
, &txf_args
, instr
, nir_texop_txf
,
4405 txf_address
, txf_count
, 0xf);
4407 result
= build_tex_intrinsic(ctx
, instr
, &txf_args
);
4409 result
= LLVMBuildExtractElement(ctx
->builder
, result
, ctx
->i32zero
, "");
4410 result
= emit_int_cmp(ctx
, LLVMIntEQ
, result
, ctx
->i32zero
);
4414 if (instr
->sampler_dim
== GLSL_SAMPLER_DIM_MS
&&
4415 instr
->op
!= nir_texop_txs
) {
4416 unsigned sample_chan
= instr
->is_array
? 3 : 2;
4417 address
[sample_chan
] = adjust_sample_index_using_fmask(ctx
,
4420 instr
->is_array
? address
[2] : NULL
,
4421 address
[sample_chan
],
4425 if (offsets
&& instr
->op
== nir_texop_txf
) {
4426 nir_const_value
*const_offset
=
4427 nir_src_as_const_value(instr
->src
[const_src
].src
);
4428 int num_offsets
= instr
->src
[const_src
].src
.ssa
->num_components
;
4429 assert(const_offset
);
4430 num_offsets
= MIN2(num_offsets
, instr
->coord_components
);
4431 if (num_offsets
> 2)
4432 address
[2] = LLVMBuildAdd(ctx
->builder
,
4433 address
[2], LLVMConstInt(ctx
->i32
, const_offset
->i32
[2], false), "");
4434 if (num_offsets
> 1)
4435 address
[1] = LLVMBuildAdd(ctx
->builder
,
4436 address
[1], LLVMConstInt(ctx
->i32
, const_offset
->i32
[1], false), "");
4437 address
[0] = LLVMBuildAdd(ctx
->builder
,
4438 address
[0], LLVMConstInt(ctx
->i32
, const_offset
->i32
[0], false), "");
4442 /* TODO TG4 support */
4443 if (instr
->op
== nir_texop_tg4
) {
4444 if (instr
->is_shadow
)
4447 dmask
= 1 << instr
->component
;
4449 set_tex_fetch_args(ctx
, &args
, instr
, instr
->op
,
4450 res_ptr
, samp_ptr
, address
, count
, dmask
);
4452 result
= build_tex_intrinsic(ctx
, instr
, &args
);
4454 if (instr
->op
== nir_texop_query_levels
)
4455 result
= LLVMBuildExtractElement(ctx
->builder
, result
, LLVMConstInt(ctx
->i32
, 3, false), "");
4456 else if (instr
->is_shadow
&& instr
->op
!= nir_texop_txs
&& instr
->op
!= nir_texop_lod
&& instr
->op
!= nir_texop_tg4
)
4457 result
= LLVMBuildExtractElement(ctx
->builder
, result
, ctx
->i32zero
, "");
4458 else if (instr
->op
== nir_texop_txs
&&
4459 instr
->sampler_dim
== GLSL_SAMPLER_DIM_CUBE
&&
4461 LLVMValueRef two
= LLVMConstInt(ctx
->i32
, 2, false);
4462 LLVMValueRef six
= LLVMConstInt(ctx
->i32
, 6, false);
4463 LLVMValueRef z
= LLVMBuildExtractElement(ctx
->builder
, result
, two
, "");
4464 z
= LLVMBuildSDiv(ctx
->builder
, z
, six
, "");
4465 result
= LLVMBuildInsertElement(ctx
->builder
, result
, z
, two
, "");
4466 } else if (instr
->dest
.ssa
.num_components
!= 4)
4467 result
= trim_vector(ctx
, result
, instr
->dest
.ssa
.num_components
);
4471 assert(instr
->dest
.is_ssa
);
4472 result
= to_integer(ctx
, result
);
4473 _mesa_hash_table_insert(ctx
->defs
, &instr
->dest
.ssa
, result
);
4478 static void visit_phi(struct nir_to_llvm_context
*ctx
, nir_phi_instr
*instr
)
4480 LLVMTypeRef type
= get_def_type(ctx
, &instr
->dest
.ssa
);
4481 LLVMValueRef result
= LLVMBuildPhi(ctx
->builder
, type
, "");
4483 _mesa_hash_table_insert(ctx
->defs
, &instr
->dest
.ssa
, result
);
4484 _mesa_hash_table_insert(ctx
->phis
, instr
, result
);
4487 static void visit_post_phi(struct nir_to_llvm_context
*ctx
,
4488 nir_phi_instr
*instr
,
4489 LLVMValueRef llvm_phi
)
4491 nir_foreach_phi_src(src
, instr
) {
4492 LLVMBasicBlockRef block
= get_block(ctx
, src
->pred
);
4493 LLVMValueRef llvm_src
= get_src(ctx
, src
->src
);
4495 LLVMAddIncoming(llvm_phi
, &llvm_src
, &block
, 1);
4499 static void phi_post_pass(struct nir_to_llvm_context
*ctx
)
4501 struct hash_entry
*entry
;
4502 hash_table_foreach(ctx
->phis
, entry
) {
4503 visit_post_phi(ctx
, (nir_phi_instr
*)entry
->key
,
4504 (LLVMValueRef
)entry
->data
);
4509 static void visit_ssa_undef(struct nir_to_llvm_context
*ctx
,
4510 nir_ssa_undef_instr
*instr
)
4512 unsigned num_components
= instr
->def
.num_components
;
4515 if (num_components
== 1)
4516 undef
= LLVMGetUndef(ctx
->i32
);
4518 undef
= LLVMGetUndef(LLVMVectorType(ctx
->i32
, num_components
));
4520 _mesa_hash_table_insert(ctx
->defs
, &instr
->def
, undef
);
4523 static void visit_jump(struct nir_to_llvm_context
*ctx
,
4524 nir_jump_instr
*instr
)
4526 switch (instr
->type
) {
4527 case nir_jump_break
:
4528 LLVMBuildBr(ctx
->builder
, ctx
->break_block
);
4529 LLVMClearInsertionPosition(ctx
->builder
);
4531 case nir_jump_continue
:
4532 LLVMBuildBr(ctx
->builder
, ctx
->continue_block
);
4533 LLVMClearInsertionPosition(ctx
->builder
);
4536 fprintf(stderr
, "Unknown NIR jump instr: ");
4537 nir_print_instr(&instr
->instr
, stderr
);
4538 fprintf(stderr
, "\n");
4543 static void visit_cf_list(struct nir_to_llvm_context
*ctx
,
4544 struct exec_list
*list
);
4546 static void visit_block(struct nir_to_llvm_context
*ctx
, nir_block
*block
)
4548 LLVMBasicBlockRef llvm_block
= LLVMGetInsertBlock(ctx
->builder
);
4549 nir_foreach_instr(instr
, block
)
4551 switch (instr
->type
) {
4552 case nir_instr_type_alu
:
4553 visit_alu(ctx
, nir_instr_as_alu(instr
));
4555 case nir_instr_type_load_const
:
4556 visit_load_const(ctx
, nir_instr_as_load_const(instr
));
4558 case nir_instr_type_intrinsic
:
4559 visit_intrinsic(ctx
, nir_instr_as_intrinsic(instr
));
4561 case nir_instr_type_tex
:
4562 visit_tex(ctx
, nir_instr_as_tex(instr
));
4564 case nir_instr_type_phi
:
4565 visit_phi(ctx
, nir_instr_as_phi(instr
));
4567 case nir_instr_type_ssa_undef
:
4568 visit_ssa_undef(ctx
, nir_instr_as_ssa_undef(instr
));
4570 case nir_instr_type_jump
:
4571 visit_jump(ctx
, nir_instr_as_jump(instr
));
4574 fprintf(stderr
, "Unknown NIR instr type: ");
4575 nir_print_instr(instr
, stderr
);
4576 fprintf(stderr
, "\n");
4581 _mesa_hash_table_insert(ctx
->defs
, block
, llvm_block
);
4584 static void visit_if(struct nir_to_llvm_context
*ctx
, nir_if
*if_stmt
)
4586 LLVMValueRef value
= get_src(ctx
, if_stmt
->condition
);
4588 LLVMBasicBlockRef merge_block
=
4589 LLVMAppendBasicBlockInContext(ctx
->context
, ctx
->main_function
, "");
4590 LLVMBasicBlockRef if_block
=
4591 LLVMAppendBasicBlockInContext(ctx
->context
, ctx
->main_function
, "");
4592 LLVMBasicBlockRef else_block
= merge_block
;
4593 if (!exec_list_is_empty(&if_stmt
->else_list
))
4594 else_block
= LLVMAppendBasicBlockInContext(
4595 ctx
->context
, ctx
->main_function
, "");
4597 LLVMValueRef cond
= LLVMBuildICmp(ctx
->builder
, LLVMIntNE
, value
,
4598 LLVMConstInt(ctx
->i32
, 0, false), "");
4599 LLVMBuildCondBr(ctx
->builder
, cond
, if_block
, else_block
);
4601 LLVMPositionBuilderAtEnd(ctx
->builder
, if_block
);
4602 visit_cf_list(ctx
, &if_stmt
->then_list
);
4603 if (LLVMGetInsertBlock(ctx
->builder
))
4604 LLVMBuildBr(ctx
->builder
, merge_block
);
4606 if (!exec_list_is_empty(&if_stmt
->else_list
)) {
4607 LLVMPositionBuilderAtEnd(ctx
->builder
, else_block
);
4608 visit_cf_list(ctx
, &if_stmt
->else_list
);
4609 if (LLVMGetInsertBlock(ctx
->builder
))
4610 LLVMBuildBr(ctx
->builder
, merge_block
);
4613 LLVMPositionBuilderAtEnd(ctx
->builder
, merge_block
);
4616 static void visit_loop(struct nir_to_llvm_context
*ctx
, nir_loop
*loop
)
4618 LLVMBasicBlockRef continue_parent
= ctx
->continue_block
;
4619 LLVMBasicBlockRef break_parent
= ctx
->break_block
;
4621 ctx
->continue_block
=
4622 LLVMAppendBasicBlockInContext(ctx
->context
, ctx
->main_function
, "");
4624 LLVMAppendBasicBlockInContext(ctx
->context
, ctx
->main_function
, "");
4626 LLVMBuildBr(ctx
->builder
, ctx
->continue_block
);
4627 LLVMPositionBuilderAtEnd(ctx
->builder
, ctx
->continue_block
);
4628 visit_cf_list(ctx
, &loop
->body
);
4630 if (LLVMGetInsertBlock(ctx
->builder
))
4631 LLVMBuildBr(ctx
->builder
, ctx
->continue_block
);
4632 LLVMPositionBuilderAtEnd(ctx
->builder
, ctx
->break_block
);
4634 ctx
->continue_block
= continue_parent
;
4635 ctx
->break_block
= break_parent
;
4638 static void visit_cf_list(struct nir_to_llvm_context
*ctx
,
4639 struct exec_list
*list
)
4641 foreach_list_typed(nir_cf_node
, node
, node
, list
)
4643 switch (node
->type
) {
4644 case nir_cf_node_block
:
4645 visit_block(ctx
, nir_cf_node_as_block(node
));
4648 case nir_cf_node_if
:
4649 visit_if(ctx
, nir_cf_node_as_if(node
));
4652 case nir_cf_node_loop
:
4653 visit_loop(ctx
, nir_cf_node_as_loop(node
));
4663 handle_vs_input_decl(struct nir_to_llvm_context
*ctx
,
4664 struct nir_variable
*variable
)
4666 LLVMValueRef t_list_ptr
= ctx
->vertex_buffers
;
4667 LLVMValueRef t_offset
;
4668 LLVMValueRef t_list
;
4670 LLVMValueRef buffer_index
;
4671 int index
= variable
->data
.location
- VERT_ATTRIB_GENERIC0
;
4672 int idx
= variable
->data
.location
;
4673 unsigned attrib_count
= glsl_count_attribute_slots(variable
->type
, true);
4675 variable
->data
.driver_location
= idx
* 4;
4677 if (ctx
->options
->key
.vs
.instance_rate_inputs
& (1u << index
)) {
4678 buffer_index
= LLVMBuildAdd(ctx
->builder
, ctx
->instance_id
,
4679 ctx
->start_instance
, "");
4680 ctx
->shader_info
->vs
.vgpr_comp_cnt
= MAX2(3,
4681 ctx
->shader_info
->vs
.vgpr_comp_cnt
);
4683 buffer_index
= LLVMBuildAdd(ctx
->builder
, ctx
->vertex_id
,
4684 ctx
->base_vertex
, "");
4686 for (unsigned i
= 0; i
< attrib_count
; ++i
, ++idx
) {
4687 t_offset
= LLVMConstInt(ctx
->i32
, index
+ i
, false);
4689 t_list
= ac_build_indexed_load_const(&ctx
->ac
, t_list_ptr
, t_offset
);
4691 input
= ac_build_buffer_load_format(&ctx
->ac
, t_list
,
4693 LLVMConstInt(ctx
->i32
, 0, false),
4696 for (unsigned chan
= 0; chan
< 4; chan
++) {
4697 LLVMValueRef llvm_chan
= LLVMConstInt(ctx
->i32
, chan
, false);
4698 ctx
->inputs
[radeon_llvm_reg_index_soa(idx
, chan
)] =
4699 to_integer(ctx
, LLVMBuildExtractElement(ctx
->builder
,
4700 input
, llvm_chan
, ""));
4705 static void interp_fs_input(struct nir_to_llvm_context
*ctx
,
4707 LLVMValueRef interp_param
,
4708 LLVMValueRef prim_mask
,
4709 LLVMValueRef result
[4])
4711 LLVMValueRef attr_number
;
4714 bool interp
= interp_param
!= NULL
;
4716 attr_number
= LLVMConstInt(ctx
->i32
, attr
, false);
4718 /* fs.constant returns the param from the middle vertex, so it's not
4719 * really useful for flat shading. It's meant to be used for custom
4720 * interpolation (but the intrinsic can't fetch from the other two
4723 * Luckily, it doesn't matter, because we rely on the FLAT_SHADE state
4724 * to do the right thing. The only reason we use fs.constant is that
4725 * fs.interp cannot be used on integers, because they can be equal
4729 interp_param
= LLVMBuildBitCast(ctx
->builder
, interp_param
,
4730 LLVMVectorType(ctx
->f32
, 2), "");
4732 i
= LLVMBuildExtractElement(ctx
->builder
, interp_param
,
4734 j
= LLVMBuildExtractElement(ctx
->builder
, interp_param
,
4738 for (chan
= 0; chan
< 4; chan
++) {
4739 LLVMValueRef llvm_chan
= LLVMConstInt(ctx
->i32
, chan
, false);
4742 result
[chan
] = ac_build_fs_interp(&ctx
->ac
,
4747 result
[chan
] = ac_build_fs_interp_mov(&ctx
->ac
,
4748 LLVMConstInt(ctx
->i32
, 2, false),
4757 handle_fs_input_decl(struct nir_to_llvm_context
*ctx
,
4758 struct nir_variable
*variable
)
4760 int idx
= variable
->data
.location
;
4761 unsigned attrib_count
= glsl_count_attribute_slots(variable
->type
, false);
4762 LLVMValueRef interp
;
4764 variable
->data
.driver_location
= idx
* 4;
4765 ctx
->input_mask
|= ((1ull << attrib_count
) - 1) << variable
->data
.location
;
4767 if (glsl_get_base_type(glsl_without_array(variable
->type
)) == GLSL_TYPE_FLOAT
) {
4768 unsigned interp_type
;
4769 if (variable
->data
.sample
) {
4770 interp_type
= INTERP_SAMPLE
;
4771 ctx
->shader_info
->fs
.force_persample
= true;
4772 } else if (variable
->data
.centroid
)
4773 interp_type
= INTERP_CENTROID
;
4775 interp_type
= INTERP_CENTER
;
4777 interp
= lookup_interp_param(ctx
, variable
->data
.interpolation
, interp_type
);
4781 for (unsigned i
= 0; i
< attrib_count
; ++i
)
4782 ctx
->inputs
[radeon_llvm_reg_index_soa(idx
+ i
, 0)] = interp
;
4787 handle_shader_input_decl(struct nir_to_llvm_context
*ctx
,
4788 struct nir_variable
*variable
)
4790 switch (ctx
->stage
) {
4791 case MESA_SHADER_VERTEX
:
4792 handle_vs_input_decl(ctx
, variable
);
4794 case MESA_SHADER_FRAGMENT
:
4795 handle_fs_input_decl(ctx
, variable
);
4804 handle_fs_inputs_pre(struct nir_to_llvm_context
*ctx
,
4805 struct nir_shader
*nir
)
4808 for (unsigned i
= 0; i
< RADEON_LLVM_MAX_INPUTS
; ++i
) {
4809 LLVMValueRef interp_param
;
4810 LLVMValueRef
*inputs
= ctx
->inputs
+radeon_llvm_reg_index_soa(i
, 0);
4812 if (!(ctx
->input_mask
& (1ull << i
)))
4815 if (i
>= VARYING_SLOT_VAR0
|| i
== VARYING_SLOT_PNTC
||
4816 i
== VARYING_SLOT_PRIMITIVE_ID
|| i
== VARYING_SLOT_LAYER
) {
4817 interp_param
= *inputs
;
4818 interp_fs_input(ctx
, index
, interp_param
, ctx
->prim_mask
,
4822 ctx
->shader_info
->fs
.flat_shaded_mask
|= 1u << index
;
4824 } else if (i
== VARYING_SLOT_POS
) {
4825 for(int i
= 0; i
< 3; ++i
)
4826 inputs
[i
] = ctx
->frag_pos
[i
];
4828 inputs
[3] = ac_build_fdiv(&ctx
->ac
, ctx
->f32one
, ctx
->frag_pos
[3]);
4831 ctx
->shader_info
->fs
.num_interp
= index
;
4832 if (ctx
->input_mask
& (1 << VARYING_SLOT_PNTC
))
4833 ctx
->shader_info
->fs
.has_pcoord
= true;
4834 if (ctx
->input_mask
& (1 << VARYING_SLOT_PRIMITIVE_ID
))
4835 ctx
->shader_info
->fs
.prim_id_input
= true;
4836 if (ctx
->input_mask
& (1 << VARYING_SLOT_LAYER
))
4837 ctx
->shader_info
->fs
.layer_input
= true;
4838 ctx
->shader_info
->fs
.input_mask
= ctx
->input_mask
>> VARYING_SLOT_VAR0
;
4842 ac_build_alloca(struct nir_to_llvm_context
*ctx
,
4846 LLVMBuilderRef builder
= ctx
->builder
;
4847 LLVMBasicBlockRef current_block
= LLVMGetInsertBlock(builder
);
4848 LLVMValueRef function
= LLVMGetBasicBlockParent(current_block
);
4849 LLVMBasicBlockRef first_block
= LLVMGetEntryBasicBlock(function
);
4850 LLVMValueRef first_instr
= LLVMGetFirstInstruction(first_block
);
4851 LLVMBuilderRef first_builder
= LLVMCreateBuilderInContext(ctx
->context
);
4855 LLVMPositionBuilderBefore(first_builder
, first_instr
);
4857 LLVMPositionBuilderAtEnd(first_builder
, first_block
);
4860 res
= LLVMBuildAlloca(first_builder
, type
, name
);
4861 LLVMBuildStore(builder
, LLVMConstNull(type
), res
);
4863 LLVMDisposeBuilder(first_builder
);
4868 static LLVMValueRef
si_build_alloca_undef(struct nir_to_llvm_context
*ctx
,
4872 LLVMValueRef ptr
= ac_build_alloca(ctx
, type
, name
);
4873 LLVMBuildStore(ctx
->builder
, LLVMGetUndef(type
), ptr
);
4878 handle_shader_output_decl(struct nir_to_llvm_context
*ctx
,
4879 struct nir_variable
*variable
)
4881 int idx
= variable
->data
.location
+ variable
->data
.index
;
4882 unsigned attrib_count
= glsl_count_attribute_slots(variable
->type
, false);
4883 uint64_t mask_attribs
;
4884 variable
->data
.driver_location
= idx
* 4;
4886 /* tess ctrl has it's own load/store paths for outputs */
4887 if (ctx
->stage
== MESA_SHADER_TESS_CTRL
)
4890 mask_attribs
= ((1ull << attrib_count
) - 1) << idx
;
4891 if (ctx
->stage
== MESA_SHADER_VERTEX
||
4892 ctx
->stage
== MESA_SHADER_TESS_EVAL
||
4893 ctx
->stage
== MESA_SHADER_GEOMETRY
) {
4894 if (idx
== VARYING_SLOT_CLIP_DIST0
) {
4895 int length
= ctx
->num_output_clips
+ ctx
->num_output_culls
;
4896 if (ctx
->stage
== MESA_SHADER_VERTEX
) {
4897 ctx
->shader_info
->vs
.outinfo
.clip_dist_mask
= (1 << ctx
->num_output_clips
) - 1;
4898 ctx
->shader_info
->vs
.outinfo
.cull_dist_mask
= (1 << ctx
->num_output_culls
) - 1;
4900 if (ctx
->stage
== MESA_SHADER_TESS_EVAL
) {
4901 ctx
->shader_info
->tes
.outinfo
.clip_dist_mask
= (1 << ctx
->num_output_clips
) - 1;
4902 ctx
->shader_info
->tes
.outinfo
.cull_dist_mask
= (1 << ctx
->num_output_culls
) - 1;
4909 mask_attribs
= 1ull << idx
;
4913 for (unsigned i
= 0; i
< attrib_count
; ++i
) {
4914 for (unsigned chan
= 0; chan
< 4; chan
++) {
4915 ctx
->outputs
[radeon_llvm_reg_index_soa(idx
+ i
, chan
)] =
4916 si_build_alloca_undef(ctx
, ctx
->f32
, "");
4919 ctx
->output_mask
|= mask_attribs
;
4923 setup_locals(struct nir_to_llvm_context
*ctx
,
4924 struct nir_function
*func
)
4927 ctx
->num_locals
= 0;
4928 nir_foreach_variable(variable
, &func
->impl
->locals
) {
4929 unsigned attrib_count
= glsl_count_attribute_slots(variable
->type
, false);
4930 variable
->data
.driver_location
= ctx
->num_locals
* 4;
4931 ctx
->num_locals
+= attrib_count
;
4933 ctx
->locals
= malloc(4 * ctx
->num_locals
* sizeof(LLVMValueRef
));
4937 for (i
= 0; i
< ctx
->num_locals
; i
++) {
4938 for (j
= 0; j
< 4; j
++) {
4939 ctx
->locals
[i
* 4 + j
] =
4940 si_build_alloca_undef(ctx
, ctx
->f32
, "temp");
4946 emit_float_saturate(struct nir_to_llvm_context
*ctx
, LLVMValueRef v
, float lo
, float hi
)
4948 v
= to_float(ctx
, v
);
4949 v
= emit_intrin_2f_param(ctx
, "llvm.maxnum.f32", ctx
->f32
, v
, LLVMConstReal(ctx
->f32
, lo
));
4950 return emit_intrin_2f_param(ctx
, "llvm.minnum.f32", ctx
->f32
, v
, LLVMConstReal(ctx
->f32
, hi
));
4954 static LLVMValueRef
emit_pack_int16(struct nir_to_llvm_context
*ctx
,
4955 LLVMValueRef src0
, LLVMValueRef src1
)
4957 LLVMValueRef const16
= LLVMConstInt(ctx
->i32
, 16, false);
4958 LLVMValueRef comp
[2];
4960 comp
[0] = LLVMBuildAnd(ctx
->builder
, src0
, LLVMConstInt(ctx
-> i32
, 65535, 0), "");
4961 comp
[1] = LLVMBuildAnd(ctx
->builder
, src1
, LLVMConstInt(ctx
-> i32
, 65535, 0), "");
4962 comp
[1] = LLVMBuildShl(ctx
->builder
, comp
[1], const16
, "");
4963 return LLVMBuildOr(ctx
->builder
, comp
[0], comp
[1], "");
4966 /* Initialize arguments for the shader export intrinsic */
4968 si_llvm_init_export_args(struct nir_to_llvm_context
*ctx
,
4969 LLVMValueRef
*values
,
4971 struct ac_export_args
*args
)
4973 /* Default is 0xf. Adjusted below depending on the format. */
4974 args
->enabled_channels
= 0xf;
4976 /* Specify whether the EXEC mask represents the valid mask */
4977 args
->valid_mask
= 0;
4979 /* Specify whether this is the last export */
4982 /* Specify the target we are exporting */
4983 args
->target
= target
;
4985 args
->compr
= false;
4986 args
->out
[0] = LLVMGetUndef(ctx
->f32
);
4987 args
->out
[1] = LLVMGetUndef(ctx
->f32
);
4988 args
->out
[2] = LLVMGetUndef(ctx
->f32
);
4989 args
->out
[3] = LLVMGetUndef(ctx
->f32
);
4994 if (ctx
->stage
== MESA_SHADER_FRAGMENT
&& target
>= V_008DFC_SQ_EXP_MRT
) {
4995 LLVMValueRef val
[4];
4996 unsigned index
= target
- V_008DFC_SQ_EXP_MRT
;
4997 unsigned col_format
= (ctx
->options
->key
.fs
.col_format
>> (4 * index
)) & 0xf;
4998 bool is_int8
= (ctx
->options
->key
.fs
.is_int8
>> index
) & 1;
5000 switch(col_format
) {
5001 case V_028714_SPI_SHADER_ZERO
:
5002 args
->enabled_channels
= 0; /* writemask */
5003 args
->target
= V_008DFC_SQ_EXP_NULL
;
5006 case V_028714_SPI_SHADER_32_R
:
5007 args
->enabled_channels
= 1;
5008 args
->out
[0] = values
[0];
5011 case V_028714_SPI_SHADER_32_GR
:
5012 args
->enabled_channels
= 0x3;
5013 args
->out
[0] = values
[0];
5014 args
->out
[1] = values
[1];
5017 case V_028714_SPI_SHADER_32_AR
:
5018 args
->enabled_channels
= 0x9;
5019 args
->out
[0] = values
[0];
5020 args
->out
[3] = values
[3];
5023 case V_028714_SPI_SHADER_FP16_ABGR
:
5026 for (unsigned chan
= 0; chan
< 2; chan
++) {
5027 LLVMValueRef pack_args
[2] = {
5029 values
[2 * chan
+ 1]
5031 LLVMValueRef packed
;
5033 packed
= ac_build_cvt_pkrtz_f16(&ctx
->ac
, pack_args
);
5034 args
->out
[chan
] = packed
;
5038 case V_028714_SPI_SHADER_UNORM16_ABGR
:
5039 for (unsigned chan
= 0; chan
< 4; chan
++) {
5040 val
[chan
] = ac_build_clamp(&ctx
->ac
, values
[chan
]);
5041 val
[chan
] = LLVMBuildFMul(ctx
->builder
, val
[chan
],
5042 LLVMConstReal(ctx
->f32
, 65535), "");
5043 val
[chan
] = LLVMBuildFAdd(ctx
->builder
, val
[chan
],
5044 LLVMConstReal(ctx
->f32
, 0.5), "");
5045 val
[chan
] = LLVMBuildFPToUI(ctx
->builder
, val
[chan
],
5050 args
->out
[0] = emit_pack_int16(ctx
, val
[0], val
[1]);
5051 args
->out
[1] = emit_pack_int16(ctx
, val
[2], val
[3]);
5054 case V_028714_SPI_SHADER_SNORM16_ABGR
:
5055 for (unsigned chan
= 0; chan
< 4; chan
++) {
5056 val
[chan
] = emit_float_saturate(ctx
, values
[chan
], -1, 1);
5057 val
[chan
] = LLVMBuildFMul(ctx
->builder
, val
[chan
],
5058 LLVMConstReal(ctx
->f32
, 32767), "");
5060 /* If positive, add 0.5, else add -0.5. */
5061 val
[chan
] = LLVMBuildFAdd(ctx
->builder
, val
[chan
],
5062 LLVMBuildSelect(ctx
->builder
,
5063 LLVMBuildFCmp(ctx
->builder
, LLVMRealOGE
,
5064 val
[chan
], ctx
->f32zero
, ""),
5065 LLVMConstReal(ctx
->f32
, 0.5),
5066 LLVMConstReal(ctx
->f32
, -0.5), ""), "");
5067 val
[chan
] = LLVMBuildFPToSI(ctx
->builder
, val
[chan
], ctx
->i32
, "");
5071 args
->out
[0] = emit_pack_int16(ctx
, val
[0], val
[1]);
5072 args
->out
[1] = emit_pack_int16(ctx
, val
[2], val
[3]);
5075 case V_028714_SPI_SHADER_UINT16_ABGR
: {
5076 LLVMValueRef max
= LLVMConstInt(ctx
->i32
, is_int8
? 255 : 65535, 0);
5078 for (unsigned chan
= 0; chan
< 4; chan
++) {
5079 val
[chan
] = to_integer(ctx
, values
[chan
]);
5080 val
[chan
] = emit_minmax_int(ctx
, LLVMIntULT
, val
[chan
], max
);
5084 args
->out
[0] = emit_pack_int16(ctx
, val
[0], val
[1]);
5085 args
->out
[1] = emit_pack_int16(ctx
, val
[2], val
[3]);
5089 case V_028714_SPI_SHADER_SINT16_ABGR
: {
5090 LLVMValueRef max
= LLVMConstInt(ctx
->i32
, is_int8
? 127 : 32767, 0);
5091 LLVMValueRef min
= LLVMConstInt(ctx
->i32
, is_int8
? -128 : -32768, 0);
5094 for (unsigned chan
= 0; chan
< 4; chan
++) {
5095 val
[chan
] = to_integer(ctx
, values
[chan
]);
5096 val
[chan
] = emit_minmax_int(ctx
, LLVMIntSLT
, val
[chan
], max
);
5097 val
[chan
] = emit_minmax_int(ctx
, LLVMIntSGT
, val
[chan
], min
);
5101 args
->out
[0] = emit_pack_int16(ctx
, val
[0], val
[1]);
5102 args
->out
[1] = emit_pack_int16(ctx
, val
[2], val
[3]);
5107 case V_028714_SPI_SHADER_32_ABGR
:
5108 memcpy(&args
->out
[0], values
, sizeof(values
[0]) * 4);
5112 memcpy(&args
->out
[0], values
, sizeof(values
[0]) * 4);
5114 for (unsigned i
= 0; i
< 4; ++i
)
5115 args
->out
[i
] = to_float(ctx
, args
->out
[i
]);
5119 handle_vs_outputs_post(struct nir_to_llvm_context
*ctx
,
5120 struct ac_vs_output_info
*outinfo
)
5122 uint32_t param_count
= 0;
5124 unsigned pos_idx
, num_pos_exports
= 0;
5125 struct ac_export_args args
, pos_args
[4] = {};
5126 LLVMValueRef psize_value
= NULL
, layer_value
= NULL
, viewport_index_value
= NULL
;
5129 outinfo
->prim_id_output
= 0xffffffff;
5130 outinfo
->layer_output
= 0xffffffff;
5131 if (ctx
->output_mask
& (1ull << VARYING_SLOT_CLIP_DIST0
)) {
5132 LLVMValueRef slots
[8];
5135 if (outinfo
->cull_dist_mask
)
5136 outinfo
->cull_dist_mask
<<= ctx
->num_output_clips
;
5138 i
= VARYING_SLOT_CLIP_DIST0
;
5139 for (j
= 0; j
< ctx
->num_output_clips
+ ctx
->num_output_culls
; j
++)
5140 slots
[j
] = to_float(ctx
, LLVMBuildLoad(ctx
->builder
,
5141 ctx
->outputs
[radeon_llvm_reg_index_soa(i
, j
)], ""));
5143 for (i
= ctx
->num_output_clips
+ ctx
->num_output_culls
; i
< 8; i
++)
5144 slots
[i
] = LLVMGetUndef(ctx
->f32
);
5146 if (ctx
->num_output_clips
+ ctx
->num_output_culls
> 4) {
5147 target
= V_008DFC_SQ_EXP_POS
+ 3;
5148 si_llvm_init_export_args(ctx
, &slots
[4], target
, &args
);
5149 memcpy(&pos_args
[target
- V_008DFC_SQ_EXP_POS
],
5150 &args
, sizeof(args
));
5153 target
= V_008DFC_SQ_EXP_POS
+ 2;
5154 si_llvm_init_export_args(ctx
, &slots
[0], target
, &args
);
5155 memcpy(&pos_args
[target
- V_008DFC_SQ_EXP_POS
],
5156 &args
, sizeof(args
));
5160 for (unsigned i
= 0; i
< RADEON_LLVM_MAX_OUTPUTS
; ++i
) {
5161 LLVMValueRef values
[4];
5162 if (!(ctx
->output_mask
& (1ull << i
)))
5165 for (unsigned j
= 0; j
< 4; j
++)
5166 values
[j
] = to_float(ctx
, LLVMBuildLoad(ctx
->builder
,
5167 ctx
->outputs
[radeon_llvm_reg_index_soa(i
, j
)], ""));
5169 if (i
== VARYING_SLOT_POS
) {
5170 target
= V_008DFC_SQ_EXP_POS
;
5171 } else if (i
== VARYING_SLOT_CLIP_DIST0
) {
5173 } else if (i
== VARYING_SLOT_PSIZ
) {
5174 outinfo
->writes_pointsize
= true;
5175 psize_value
= values
[0];
5177 } else if (i
== VARYING_SLOT_LAYER
) {
5178 outinfo
->writes_layer
= true;
5179 layer_value
= values
[0];
5180 outinfo
->layer_output
= param_count
;
5181 target
= V_008DFC_SQ_EXP_PARAM
+ param_count
;
5183 } else if (i
== VARYING_SLOT_VIEWPORT
) {
5184 outinfo
->writes_viewport_index
= true;
5185 viewport_index_value
= values
[0];
5187 } else if (i
== VARYING_SLOT_PRIMITIVE_ID
) {
5188 outinfo
->prim_id_output
= param_count
;
5189 target
= V_008DFC_SQ_EXP_PARAM
+ param_count
;
5191 } else if (i
>= VARYING_SLOT_VAR0
) {
5192 outinfo
->export_mask
|= 1u << (i
- VARYING_SLOT_VAR0
);
5193 target
= V_008DFC_SQ_EXP_PARAM
+ param_count
;
5197 si_llvm_init_export_args(ctx
, values
, target
, &args
);
5199 if (target
>= V_008DFC_SQ_EXP_POS
&&
5200 target
<= (V_008DFC_SQ_EXP_POS
+ 3)) {
5201 memcpy(&pos_args
[target
- V_008DFC_SQ_EXP_POS
],
5202 &args
, sizeof(args
));
5204 ac_build_export(&ctx
->ac
, &args
);
5208 /* We need to add the position output manually if it's missing. */
5209 if (!pos_args
[0].out
[0]) {
5210 pos_args
[0].enabled_channels
= 0xf;
5211 pos_args
[0].valid_mask
= 0;
5212 pos_args
[0].done
= 0;
5213 pos_args
[0].target
= V_008DFC_SQ_EXP_POS
;
5214 pos_args
[0].compr
= 0;
5215 pos_args
[0].out
[0] = ctx
->f32zero
; /* X */
5216 pos_args
[0].out
[1] = ctx
->f32zero
; /* Y */
5217 pos_args
[0].out
[2] = ctx
->f32zero
; /* Z */
5218 pos_args
[0].out
[3] = ctx
->f32one
; /* W */
5221 uint32_t mask
= ((outinfo
->writes_pointsize
== true ? 1 : 0) |
5222 (outinfo
->writes_layer
== true ? 4 : 0) |
5223 (outinfo
->writes_viewport_index
== true ? 8 : 0));
5225 pos_args
[1].enabled_channels
= mask
;
5226 pos_args
[1].valid_mask
= 0;
5227 pos_args
[1].done
= 0;
5228 pos_args
[1].target
= V_008DFC_SQ_EXP_POS
+ 1;
5229 pos_args
[1].compr
= 0;
5230 pos_args
[1].out
[0] = ctx
->f32zero
; /* X */
5231 pos_args
[1].out
[1] = ctx
->f32zero
; /* Y */
5232 pos_args
[1].out
[2] = ctx
->f32zero
; /* Z */
5233 pos_args
[1].out
[3] = ctx
->f32zero
; /* W */
5235 if (outinfo
->writes_pointsize
== true)
5236 pos_args
[1].out
[0] = psize_value
;
5237 if (outinfo
->writes_layer
== true)
5238 pos_args
[1].out
[2] = layer_value
;
5239 if (outinfo
->writes_viewport_index
== true)
5240 pos_args
[1].out
[3] = viewport_index_value
;
5242 for (i
= 0; i
< 4; i
++) {
5243 if (pos_args
[i
].out
[0])
5248 for (i
= 0; i
< 4; i
++) {
5249 if (!pos_args
[i
].out
[0])
5252 /* Specify the target we are exporting */
5253 pos_args
[i
].target
= V_008DFC_SQ_EXP_POS
+ pos_idx
++;
5254 if (pos_idx
== num_pos_exports
)
5255 pos_args
[i
].done
= 1;
5256 ac_build_export(&ctx
->ac
, &pos_args
[i
]);
5259 outinfo
->pos_exports
= num_pos_exports
;
5260 outinfo
->param_exports
= param_count
;
5264 handle_es_outputs_post(struct nir_to_llvm_context
*ctx
,
5265 struct ac_es_output_info
*outinfo
)
5268 uint64_t max_output_written
= 0;
5269 for (unsigned i
= 0; i
< RADEON_LLVM_MAX_OUTPUTS
; ++i
) {
5270 LLVMValueRef
*out_ptr
= &ctx
->outputs
[i
* 4];
5274 if (!(ctx
->output_mask
& (1ull << i
)))
5277 if (i
== VARYING_SLOT_CLIP_DIST0
)
5278 length
= ctx
->num_output_clips
+ ctx
->num_output_culls
;
5280 param_index
= shader_io_get_unique_index(i
);
5282 max_output_written
= MAX2(param_index
+ (length
> 4), max_output_written
);
5284 for (j
= 0; j
< length
; j
++) {
5285 LLVMValueRef out_val
= LLVMBuildLoad(ctx
->builder
, out_ptr
[j
], "");
5286 out_val
= LLVMBuildBitCast(ctx
->builder
, out_val
, ctx
->i32
, "");
5288 ac_build_buffer_store_dword(&ctx
->ac
,
5291 NULL
, ctx
->es2gs_offset
,
5292 (4 * param_index
+ j
) * 4,
5296 outinfo
->esgs_itemsize
= (max_output_written
+ 1) * 16;
5300 handle_ls_outputs_post(struct nir_to_llvm_context
*ctx
)
5302 LLVMValueRef vertex_id
= ctx
->rel_auto_id
;
5303 LLVMValueRef vertex_dw_stride
= unpack_param(ctx
, ctx
->ls_out_layout
, 13, 8);
5304 LLVMValueRef base_dw_addr
= LLVMBuildMul(ctx
->builder
, vertex_id
,
5305 vertex_dw_stride
, "");
5307 for (unsigned i
= 0; i
< RADEON_LLVM_MAX_OUTPUTS
; ++i
) {
5308 LLVMValueRef
*out_ptr
= &ctx
->outputs
[i
* 4];
5311 if (!(ctx
->output_mask
& (1ull << i
)))
5314 if (i
== VARYING_SLOT_CLIP_DIST0
)
5315 length
= ctx
->num_output_clips
+ ctx
->num_output_culls
;
5316 int param
= shader_io_get_unique_index(i
);
5317 mark_tess_output(ctx
, false, param
);
5319 mark_tess_output(ctx
, false, param
+ 1);
5320 LLVMValueRef dw_addr
= LLVMBuildAdd(ctx
->builder
, base_dw_addr
,
5321 LLVMConstInt(ctx
->i32
, param
* 4, false),
5323 for (unsigned j
= 0; j
< length
; j
++) {
5324 lds_store(ctx
, dw_addr
,
5325 LLVMBuildLoad(ctx
->builder
, out_ptr
[j
], ""));
5326 dw_addr
= LLVMBuildAdd(ctx
->builder
, dw_addr
, ctx
->i32one
, "");
5331 struct ac_build_if_state
5333 struct nir_to_llvm_context
*ctx
;
5334 LLVMValueRef condition
;
5335 LLVMBasicBlockRef entry_block
;
5336 LLVMBasicBlockRef true_block
;
5337 LLVMBasicBlockRef false_block
;
5338 LLVMBasicBlockRef merge_block
;
5341 static LLVMBasicBlockRef
5342 ac_build_insert_new_block(struct nir_to_llvm_context
*ctx
, const char *name
)
5344 LLVMBasicBlockRef current_block
;
5345 LLVMBasicBlockRef next_block
;
5346 LLVMBasicBlockRef new_block
;
5348 /* get current basic block */
5349 current_block
= LLVMGetInsertBlock(ctx
->builder
);
5351 /* chqeck if there's another block after this one */
5352 next_block
= LLVMGetNextBasicBlock(current_block
);
5354 /* insert the new block before the next block */
5355 new_block
= LLVMInsertBasicBlockInContext(ctx
->context
, next_block
, name
);
5358 /* append new block after current block */
5359 LLVMValueRef function
= LLVMGetBasicBlockParent(current_block
);
5360 new_block
= LLVMAppendBasicBlockInContext(ctx
->context
, function
, name
);
5366 ac_nir_build_if(struct ac_build_if_state
*ifthen
,
5367 struct nir_to_llvm_context
*ctx
,
5368 LLVMValueRef condition
)
5370 LLVMBasicBlockRef block
= LLVMGetInsertBlock(ctx
->builder
);
5372 memset(ifthen
, 0, sizeof *ifthen
);
5374 ifthen
->condition
= condition
;
5375 ifthen
->entry_block
= block
;
5377 /* create endif/merge basic block for the phi functions */
5378 ifthen
->merge_block
= ac_build_insert_new_block(ctx
, "endif-block");
5380 /* create/insert true_block before merge_block */
5381 ifthen
->true_block
=
5382 LLVMInsertBasicBlockInContext(ctx
->context
,
5383 ifthen
->merge_block
,
5386 /* successive code goes into the true block */
5387 LLVMPositionBuilderAtEnd(ctx
->builder
, ifthen
->true_block
);
5391 * End a conditional.
5394 ac_nir_build_endif(struct ac_build_if_state
*ifthen
)
5396 LLVMBuilderRef builder
= ifthen
->ctx
->builder
;
5398 /* Insert branch to the merge block from current block */
5399 LLVMBuildBr(builder
, ifthen
->merge_block
);
5402 * Now patch in the various branch instructions.
5405 /* Insert the conditional branch instruction at the end of entry_block */
5406 LLVMPositionBuilderAtEnd(builder
, ifthen
->entry_block
);
5407 if (ifthen
->false_block
) {
5408 /* we have an else clause */
5409 LLVMBuildCondBr(builder
, ifthen
->condition
,
5410 ifthen
->true_block
, ifthen
->false_block
);
5413 /* no else clause */
5414 LLVMBuildCondBr(builder
, ifthen
->condition
,
5415 ifthen
->true_block
, ifthen
->merge_block
);
5418 /* Resume building code at end of the ifthen->merge_block */
5419 LLVMPositionBuilderAtEnd(builder
, ifthen
->merge_block
);
5423 write_tess_factors(struct nir_to_llvm_context
*ctx
)
5425 unsigned stride
, outer_comps
, inner_comps
;
5426 struct ac_build_if_state if_ctx
, inner_if_ctx
;
5427 LLVMValueRef invocation_id
= unpack_param(ctx
, ctx
->tcs_rel_ids
, 8, 5);
5428 LLVMValueRef rel_patch_id
= unpack_param(ctx
, ctx
->tcs_rel_ids
, 0, 8);
5429 unsigned tess_inner_index
, tess_outer_index
;
5430 LLVMValueRef lds_base
, lds_inner
, lds_outer
, byteoffset
, buffer
;
5431 LLVMValueRef out
[6], vec0
, vec1
, tf_base
, inner
[4], outer
[4];
5435 switch (ctx
->options
->key
.tcs
.primitive_mode
) {
5455 ac_nir_build_if(&if_ctx
, ctx
,
5456 LLVMBuildICmp(ctx
->builder
, LLVMIntEQ
,
5457 invocation_id
, ctx
->i32zero
, ""));
5459 tess_inner_index
= shader_io_get_unique_index(VARYING_SLOT_TESS_LEVEL_INNER
);
5460 tess_outer_index
= shader_io_get_unique_index(VARYING_SLOT_TESS_LEVEL_OUTER
);
5462 mark_tess_output(ctx
, true, tess_inner_index
);
5463 mark_tess_output(ctx
, true, tess_outer_index
);
5464 lds_base
= get_tcs_out_current_patch_data_offset(ctx
);
5465 lds_inner
= LLVMBuildAdd(ctx
->builder
, lds_base
,
5466 LLVMConstInt(ctx
->i32
, tess_inner_index
* 4, false), "");
5467 lds_outer
= LLVMBuildAdd(ctx
->builder
, lds_base
,
5468 LLVMConstInt(ctx
->i32
, tess_outer_index
* 4, false), "");
5470 for (i
= 0; i
< 4; i
++) {
5471 inner
[i
] = LLVMGetUndef(ctx
->i32
);
5472 outer
[i
] = LLVMGetUndef(ctx
->i32
);
5476 if (ctx
->options
->key
.tcs
.primitive_mode
== GL_ISOLINES
) {
5477 outer
[0] = out
[1] = lds_load(ctx
, lds_outer
);
5478 lds_outer
= LLVMBuildAdd(ctx
->builder
, lds_outer
,
5479 LLVMConstInt(ctx
->i32
, 1, false), "");
5480 outer
[1] = out
[0] = lds_load(ctx
, lds_outer
);
5482 for (i
= 0; i
< outer_comps
; i
++) {
5484 lds_load(ctx
, lds_outer
);
5485 lds_outer
= LLVMBuildAdd(ctx
->builder
, lds_outer
,
5486 LLVMConstInt(ctx
->i32
, 1, false), "");
5488 for (i
= 0; i
< inner_comps
; i
++) {
5489 inner
[i
] = out
[outer_comps
+i
] =
5490 lds_load(ctx
, lds_inner
);
5491 lds_inner
= LLVMBuildAdd(ctx
->builder
, lds_inner
,
5492 LLVMConstInt(ctx
->i32
, 1, false), "");
5496 /* Convert the outputs to vectors for stores. */
5497 vec0
= ac_build_gather_values(&ctx
->ac
, out
, MIN2(stride
, 4));
5501 vec1
= ac_build_gather_values(&ctx
->ac
, out
+ 4, stride
- 4);
5504 buffer
= ctx
->hs_ring_tess_factor
;
5505 tf_base
= ctx
->tess_factor_offset
;
5506 byteoffset
= LLVMBuildMul(ctx
->builder
, rel_patch_id
,
5507 LLVMConstInt(ctx
->i32
, 4 * stride
, false), "");
5509 ac_nir_build_if(&inner_if_ctx
, ctx
,
5510 LLVMBuildICmp(ctx
->builder
, LLVMIntEQ
,
5511 rel_patch_id
, ctx
->i32zero
, ""));
5513 /* Store the dynamic HS control word. */
5514 ac_build_buffer_store_dword(&ctx
->ac
, buffer
,
5515 LLVMConstInt(ctx
->i32
, 0x80000000, false),
5516 1, ctx
->i32zero
, tf_base
,
5517 0, 1, 0, true, false);
5518 ac_nir_build_endif(&inner_if_ctx
);
5520 /* Store the tessellation factors. */
5521 ac_build_buffer_store_dword(&ctx
->ac
, buffer
, vec0
,
5522 MIN2(stride
, 4), byteoffset
, tf_base
,
5523 4, 1, 0, true, false);
5525 ac_build_buffer_store_dword(&ctx
->ac
, buffer
, vec1
,
5526 stride
- 4, byteoffset
, tf_base
,
5527 20, 1, 0, true, false);
5529 //TODO store to offchip for TES to read - only if TES reads them
5531 LLVMValueRef inner_vec
, outer_vec
, tf_outer_offset
;
5532 LLVMValueRef tf_inner_offset
;
5533 unsigned param_outer
, param_inner
;
5535 param_outer
= shader_io_get_unique_index(VARYING_SLOT_TESS_LEVEL_OUTER
);
5536 tf_outer_offset
= get_tcs_tes_buffer_address(ctx
, NULL
,
5537 LLVMConstInt(ctx
->i32
, param_outer
, 0));
5539 outer_vec
= ac_build_gather_values(&ctx
->ac
, outer
,
5540 util_next_power_of_two(outer_comps
));
5542 ac_build_buffer_store_dword(&ctx
->ac
, ctx
->hs_ring_tess_offchip
, outer_vec
,
5543 outer_comps
, tf_outer_offset
,
5544 ctx
->oc_lds
, 0, 1, 0, true, false);
5546 param_inner
= shader_io_get_unique_index(VARYING_SLOT_TESS_LEVEL_INNER
);
5547 tf_inner_offset
= get_tcs_tes_buffer_address(ctx
, NULL
,
5548 LLVMConstInt(ctx
->i32
, param_inner
, 0));
5550 inner_vec
= inner_comps
== 1 ? inner
[0] :
5551 ac_build_gather_values(&ctx
->ac
, inner
, inner_comps
);
5552 ac_build_buffer_store_dword(&ctx
->ac
, ctx
->hs_ring_tess_offchip
, inner_vec
,
5553 inner_comps
, tf_inner_offset
,
5554 ctx
->oc_lds
, 0, 1, 0, true, false);
5557 ac_nir_build_endif(&if_ctx
);
5561 handle_tcs_outputs_post(struct nir_to_llvm_context
*ctx
)
5563 write_tess_factors(ctx
);
5567 si_export_mrt_color(struct nir_to_llvm_context
*ctx
,
5568 LLVMValueRef
*color
, unsigned param
, bool is_last
)
5571 struct ac_export_args args
;
5574 si_llvm_init_export_args(ctx
, color
, param
,
5578 args
.valid_mask
= 1; /* whether the EXEC mask is valid */
5579 args
.done
= 1; /* DONE bit */
5580 } else if (!args
.enabled_channels
)
5581 return; /* unnecessary NULL export */
5583 ac_build_export(&ctx
->ac
, &args
);
5587 si_export_mrt_z(struct nir_to_llvm_context
*ctx
,
5588 LLVMValueRef depth
, LLVMValueRef stencil
,
5589 LLVMValueRef samplemask
)
5591 struct ac_export_args args
;
5593 args
.enabled_channels
= 0;
5594 args
.valid_mask
= 1;
5596 args
.target
= V_008DFC_SQ_EXP_MRTZ
;
5599 args
.out
[0] = LLVMGetUndef(ctx
->f32
); /* R, depth */
5600 args
.out
[1] = LLVMGetUndef(ctx
->f32
); /* G, stencil test val[0:7], stencil op val[8:15] */
5601 args
.out
[2] = LLVMGetUndef(ctx
->f32
); /* B, sample mask */
5602 args
.out
[3] = LLVMGetUndef(ctx
->f32
); /* A, alpha to mask */
5605 args
.out
[0] = depth
;
5606 args
.enabled_channels
|= 0x1;
5610 args
.out
[1] = stencil
;
5611 args
.enabled_channels
|= 0x2;
5615 args
.out
[2] = samplemask
;
5616 args
.enabled_channels
|= 0x4;
5619 /* SI (except OLAND) has a bug that it only looks
5620 * at the X writemask component. */
5621 if (ctx
->options
->chip_class
== SI
&&
5622 ctx
->options
->family
!= CHIP_OLAND
)
5623 args
.enabled_channels
|= 0x1;
5625 ac_build_export(&ctx
->ac
, &args
);
5629 handle_fs_outputs_post(struct nir_to_llvm_context
*ctx
)
5632 LLVMValueRef depth
= NULL
, stencil
= NULL
, samplemask
= NULL
;
5634 for (unsigned i
= 0; i
< RADEON_LLVM_MAX_OUTPUTS
; ++i
) {
5635 LLVMValueRef values
[4];
5637 if (!(ctx
->output_mask
& (1ull << i
)))
5640 if (i
== FRAG_RESULT_DEPTH
) {
5641 ctx
->shader_info
->fs
.writes_z
= true;
5642 depth
= to_float(ctx
, LLVMBuildLoad(ctx
->builder
,
5643 ctx
->outputs
[radeon_llvm_reg_index_soa(i
, 0)], ""));
5644 } else if (i
== FRAG_RESULT_STENCIL
) {
5645 ctx
->shader_info
->fs
.writes_stencil
= true;
5646 stencil
= to_float(ctx
, LLVMBuildLoad(ctx
->builder
,
5647 ctx
->outputs
[radeon_llvm_reg_index_soa(i
, 0)], ""));
5648 } else if (i
== FRAG_RESULT_SAMPLE_MASK
) {
5649 ctx
->shader_info
->fs
.writes_sample_mask
= true;
5650 samplemask
= to_float(ctx
, LLVMBuildLoad(ctx
->builder
,
5651 ctx
->outputs
[radeon_llvm_reg_index_soa(i
, 0)], ""));
5654 for (unsigned j
= 0; j
< 4; j
++)
5655 values
[j
] = to_float(ctx
, LLVMBuildLoad(ctx
->builder
,
5656 ctx
->outputs
[radeon_llvm_reg_index_soa(i
, j
)], ""));
5658 if (!ctx
->shader_info
->fs
.writes_z
&& !ctx
->shader_info
->fs
.writes_stencil
&& !ctx
->shader_info
->fs
.writes_sample_mask
)
5659 last
= ctx
->output_mask
<= ((1ull << (i
+ 1)) - 1);
5661 si_export_mrt_color(ctx
, values
, V_008DFC_SQ_EXP_MRT
+ index
, last
);
5666 if (depth
|| stencil
|| samplemask
)
5667 si_export_mrt_z(ctx
, depth
, stencil
, samplemask
);
5669 si_export_mrt_color(ctx
, NULL
, V_008DFC_SQ_EXP_NULL
, true);
5671 ctx
->shader_info
->fs
.output_mask
= index
? ((1ull << index
) - 1) : 0;
5675 emit_gs_epilogue(struct nir_to_llvm_context
*ctx
)
5677 ac_build_sendmsg(&ctx
->ac
, AC_SENDMSG_GS_OP_NOP
| AC_SENDMSG_GS_DONE
, ctx
->gs_wave_id
);
5681 handle_shader_outputs_post(struct nir_to_llvm_context
*ctx
)
5683 switch (ctx
->stage
) {
5684 case MESA_SHADER_VERTEX
:
5685 if (ctx
->options
->key
.vs
.as_ls
)
5686 handle_ls_outputs_post(ctx
);
5687 else if (ctx
->options
->key
.vs
.as_es
)
5688 handle_es_outputs_post(ctx
, &ctx
->shader_info
->vs
.es_info
);
5690 handle_vs_outputs_post(ctx
, &ctx
->shader_info
->vs
.outinfo
);
5692 case MESA_SHADER_FRAGMENT
:
5693 handle_fs_outputs_post(ctx
);
5695 case MESA_SHADER_GEOMETRY
:
5696 emit_gs_epilogue(ctx
);
5698 case MESA_SHADER_TESS_CTRL
:
5699 handle_tcs_outputs_post(ctx
);
5701 case MESA_SHADER_TESS_EVAL
:
5702 if (ctx
->options
->key
.tes
.as_es
)
5703 handle_es_outputs_post(ctx
, &ctx
->shader_info
->tes
.es_info
);
5705 handle_vs_outputs_post(ctx
, &ctx
->shader_info
->tes
.outinfo
);
5713 handle_shared_compute_var(struct nir_to_llvm_context
*ctx
,
5714 struct nir_variable
*variable
, uint32_t *offset
, int idx
)
5716 unsigned size
= glsl_count_attribute_slots(variable
->type
, false);
5717 variable
->data
.driver_location
= *offset
;
5721 static void ac_llvm_finalize_module(struct nir_to_llvm_context
* ctx
)
5723 LLVMPassManagerRef passmgr
;
5724 /* Create the pass manager */
5725 passmgr
= LLVMCreateFunctionPassManagerForModule(
5728 /* This pass should eliminate all the load and store instructions */
5729 LLVMAddPromoteMemoryToRegisterPass(passmgr
);
5731 /* Add some optimization passes */
5732 LLVMAddScalarReplAggregatesPass(passmgr
);
5733 LLVMAddLICMPass(passmgr
);
5734 LLVMAddAggressiveDCEPass(passmgr
);
5735 LLVMAddCFGSimplificationPass(passmgr
);
5736 LLVMAddInstructionCombiningPass(passmgr
);
5739 LLVMInitializeFunctionPassManager(passmgr
);
5740 LLVMRunFunctionPassManager(passmgr
, ctx
->main_function
);
5741 LLVMFinalizeFunctionPassManager(passmgr
);
5743 LLVMDisposeBuilder(ctx
->builder
);
5744 LLVMDisposePassManager(passmgr
);
5748 ac_setup_rings(struct nir_to_llvm_context
*ctx
)
5750 if ((ctx
->stage
== MESA_SHADER_VERTEX
&& ctx
->options
->key
.vs
.as_es
) ||
5751 (ctx
->stage
== MESA_SHADER_TESS_EVAL
&& ctx
->options
->key
.tes
.as_es
)) {
5752 ctx
->esgs_ring
= ac_build_indexed_load_const(&ctx
->ac
, ctx
->ring_offsets
, LLVMConstInt(ctx
->i32
, RING_ESGS_VS
, false));
5755 if (ctx
->is_gs_copy_shader
) {
5756 ctx
->gsvs_ring
= ac_build_indexed_load_const(&ctx
->ac
, ctx
->ring_offsets
, LLVMConstInt(ctx
->i32
, RING_GSVS_VS
, false));
5758 if (ctx
->stage
== MESA_SHADER_GEOMETRY
) {
5760 ctx
->esgs_ring
= ac_build_indexed_load_const(&ctx
->ac
, ctx
->ring_offsets
, LLVMConstInt(ctx
->i32
, RING_ESGS_GS
, false));
5761 ctx
->gsvs_ring
= ac_build_indexed_load_const(&ctx
->ac
, ctx
->ring_offsets
, LLVMConstInt(ctx
->i32
, RING_GSVS_GS
, false));
5763 ctx
->gsvs_ring
= LLVMBuildBitCast(ctx
->builder
, ctx
->gsvs_ring
, ctx
->v4i32
, "");
5765 ctx
->gsvs_ring
= LLVMBuildInsertElement(ctx
->builder
, ctx
->gsvs_ring
, ctx
->gsvs_num_entries
, LLVMConstInt(ctx
->i32
, 2, false), "");
5766 tmp
= LLVMBuildExtractElement(ctx
->builder
, ctx
->gsvs_ring
, ctx
->i32one
, "");
5767 tmp
= LLVMBuildOr(ctx
->builder
, tmp
, ctx
->gsvs_ring_stride
, "");
5768 ctx
->gsvs_ring
= LLVMBuildInsertElement(ctx
->builder
, ctx
->gsvs_ring
, tmp
, ctx
->i32one
, "");
5770 ctx
->gsvs_ring
= LLVMBuildBitCast(ctx
->builder
, ctx
->gsvs_ring
, ctx
->v16i8
, "");
5773 if (ctx
->stage
== MESA_SHADER_TESS_CTRL
||
5774 ctx
->stage
== MESA_SHADER_TESS_EVAL
) {
5775 ctx
->hs_ring_tess_offchip
= ac_build_indexed_load_const(&ctx
->ac
, ctx
->ring_offsets
, LLVMConstInt(ctx
->i32
, RING_HS_TESS_OFFCHIP
, false));
5776 ctx
->hs_ring_tess_factor
= ac_build_indexed_load_const(&ctx
->ac
, ctx
->ring_offsets
, LLVMConstInt(ctx
->i32
, RING_HS_TESS_FACTOR
, false));
5781 LLVMModuleRef
ac_translate_nir_to_llvm(LLVMTargetMachineRef tm
,
5782 struct nir_shader
*nir
,
5783 struct ac_shader_variant_info
*shader_info
,
5784 const struct ac_nir_compiler_options
*options
)
5786 struct nir_to_llvm_context ctx
= {0};
5787 struct nir_function
*func
;
5789 ctx
.options
= options
;
5790 ctx
.shader_info
= shader_info
;
5791 ctx
.context
= LLVMContextCreate();
5792 ctx
.module
= LLVMModuleCreateWithNameInContext("shader", ctx
.context
);
5794 ac_llvm_context_init(&ctx
.ac
, ctx
.context
);
5795 ctx
.ac
.module
= ctx
.module
;
5797 ctx
.has_ds_bpermute
= ctx
.options
->chip_class
>= VI
;
5799 memset(shader_info
, 0, sizeof(*shader_info
));
5801 ac_nir_shader_info_pass(nir
, options
, &shader_info
->info
);
5803 LLVMSetTarget(ctx
.module
, options
->supports_spill
? "amdgcn-mesa-mesa3d" : "amdgcn--");
5805 LLVMTargetDataRef data_layout
= LLVMCreateTargetDataLayout(tm
);
5806 char *data_layout_str
= LLVMCopyStringRepOfTargetData(data_layout
);
5807 LLVMSetDataLayout(ctx
.module
, data_layout_str
);
5808 LLVMDisposeTargetData(data_layout
);
5809 LLVMDisposeMessage(data_layout_str
);
5813 ctx
.builder
= LLVMCreateBuilderInContext(ctx
.context
);
5814 ctx
.ac
.builder
= ctx
.builder
;
5815 ctx
.stage
= nir
->stage
;
5817 for (i
= 0; i
< AC_UD_MAX_SETS
; i
++)
5818 shader_info
->user_sgprs_locs
.descriptor_sets
[i
].sgpr_idx
= -1;
5819 for (i
= 0; i
< AC_UD_MAX_UD
; i
++)
5820 shader_info
->user_sgprs_locs
.shader_data
[i
].sgpr_idx
= -1;
5822 create_function(&ctx
);
5824 if (nir
->stage
== MESA_SHADER_COMPUTE
) {
5826 nir_foreach_variable(variable
, &nir
->shared
)
5830 uint32_t shared_size
= 0;
5832 LLVMTypeRef i8p
= LLVMPointerType(ctx
.i8
, LOCAL_ADDR_SPACE
);
5833 nir_foreach_variable(variable
, &nir
->shared
) {
5834 handle_shared_compute_var(&ctx
, variable
, &shared_size
, idx
);
5839 var
= LLVMAddGlobalInAddressSpace(ctx
.module
,
5840 LLVMArrayType(ctx
.i8
, shared_size
),
5843 LLVMSetAlignment(var
, 4);
5844 ctx
.shared_memory
= LLVMBuildBitCast(ctx
.builder
, var
, i8p
, "");
5846 } else if (nir
->stage
== MESA_SHADER_GEOMETRY
) {
5847 ctx
.gs_next_vertex
= ac_build_alloca(&ctx
, ctx
.i32
, "gs_next_vertex");
5849 ctx
.gs_max_out_vertices
= nir
->info
->gs
.vertices_out
;
5850 } else if (nir
->stage
== MESA_SHADER_TESS_EVAL
) {
5851 ctx
.tes_primitive_mode
= nir
->info
->tess
.primitive_mode
;
5854 ac_setup_rings(&ctx
);
5856 nir_foreach_variable(variable
, &nir
->inputs
)
5857 handle_shader_input_decl(&ctx
, variable
);
5859 if (nir
->stage
== MESA_SHADER_FRAGMENT
)
5860 handle_fs_inputs_pre(&ctx
, nir
);
5862 ctx
.num_output_clips
= nir
->info
->clip_distance_array_size
;
5863 ctx
.num_output_culls
= nir
->info
->cull_distance_array_size
;
5865 nir_foreach_variable(variable
, &nir
->outputs
)
5866 handle_shader_output_decl(&ctx
, variable
);
5868 ctx
.defs
= _mesa_hash_table_create(NULL
, _mesa_hash_pointer
,
5869 _mesa_key_pointer_equal
);
5870 ctx
.phis
= _mesa_hash_table_create(NULL
, _mesa_hash_pointer
,
5871 _mesa_key_pointer_equal
);
5873 func
= (struct nir_function
*)exec_list_get_head(&nir
->functions
);
5875 setup_locals(&ctx
, func
);
5877 visit_cf_list(&ctx
, &func
->impl
->body
);
5878 phi_post_pass(&ctx
);
5880 handle_shader_outputs_post(&ctx
);
5881 LLVMBuildRetVoid(ctx
.builder
);
5883 ac_llvm_finalize_module(&ctx
);
5885 ralloc_free(ctx
.defs
);
5886 ralloc_free(ctx
.phis
);
5888 if (nir
->stage
== MESA_SHADER_GEOMETRY
) {
5889 unsigned addclip
= ctx
.num_output_clips
+ ctx
.num_output_culls
> 4;
5890 shader_info
->gs
.gsvs_vertex_size
= (util_bitcount64(ctx
.output_mask
) + addclip
) * 16;
5891 shader_info
->gs
.max_gsvs_emit_size
= shader_info
->gs
.gsvs_vertex_size
*
5892 nir
->info
->gs
.vertices_out
;
5893 } else if (nir
->stage
== MESA_SHADER_TESS_CTRL
) {
5894 shader_info
->tcs
.outputs_written
= ctx
.tess_outputs_written
;
5895 shader_info
->tcs
.patch_outputs_written
= ctx
.tess_patch_outputs_written
;
5896 } else if (nir
->stage
== MESA_SHADER_VERTEX
&& ctx
.options
->key
.vs
.as_ls
) {
5897 shader_info
->vs
.outputs_written
= ctx
.tess_outputs_written
;
5903 static void ac_diagnostic_handler(LLVMDiagnosticInfoRef di
, void *context
)
5905 unsigned *retval
= (unsigned *)context
;
5906 LLVMDiagnosticSeverity severity
= LLVMGetDiagInfoSeverity(di
);
5907 char *description
= LLVMGetDiagInfoDescription(di
);
5909 if (severity
== LLVMDSError
) {
5911 fprintf(stderr
, "LLVM triggered Diagnostic Handler: %s\n",
5915 LLVMDisposeMessage(description
);
5918 static unsigned ac_llvm_compile(LLVMModuleRef M
,
5919 struct ac_shader_binary
*binary
,
5920 LLVMTargetMachineRef tm
)
5922 unsigned retval
= 0;
5924 LLVMContextRef llvm_ctx
;
5925 LLVMMemoryBufferRef out_buffer
;
5926 unsigned buffer_size
;
5927 const char *buffer_data
;
5930 /* Setup Diagnostic Handler*/
5931 llvm_ctx
= LLVMGetModuleContext(M
);
5933 LLVMContextSetDiagnosticHandler(llvm_ctx
, ac_diagnostic_handler
,
5937 mem_err
= LLVMTargetMachineEmitToMemoryBuffer(tm
, M
, LLVMObjectFile
,
5940 /* Process Errors/Warnings */
5942 fprintf(stderr
, "%s: %s", __FUNCTION__
, err
);
5948 /* Extract Shader Code*/
5949 buffer_size
= LLVMGetBufferSize(out_buffer
);
5950 buffer_data
= LLVMGetBufferStart(out_buffer
);
5952 ac_elf_read(buffer_data
, buffer_size
, binary
);
5955 LLVMDisposeMemoryBuffer(out_buffer
);
5961 static void ac_compile_llvm_module(LLVMTargetMachineRef tm
,
5962 LLVMModuleRef llvm_module
,
5963 struct ac_shader_binary
*binary
,
5964 struct ac_shader_config
*config
,
5965 struct ac_shader_variant_info
*shader_info
,
5966 gl_shader_stage stage
,
5967 bool dump_shader
, bool supports_spill
)
5970 ac_dump_module(llvm_module
);
5972 memset(binary
, 0, sizeof(*binary
));
5973 int v
= ac_llvm_compile(llvm_module
, binary
, tm
);
5975 fprintf(stderr
, "compile failed\n");
5979 fprintf(stderr
, "disasm:\n%s\n", binary
->disasm_string
);
5981 ac_shader_binary_read_config(binary
, config
, 0, supports_spill
);
5983 LLVMContextRef ctx
= LLVMGetModuleContext(llvm_module
);
5984 LLVMDisposeModule(llvm_module
);
5985 LLVMContextDispose(ctx
);
5987 if (stage
== MESA_SHADER_FRAGMENT
) {
5988 shader_info
->num_input_vgprs
= 0;
5989 if (G_0286CC_PERSP_SAMPLE_ENA(config
->spi_ps_input_addr
))
5990 shader_info
->num_input_vgprs
+= 2;
5991 if (G_0286CC_PERSP_CENTER_ENA(config
->spi_ps_input_addr
))
5992 shader_info
->num_input_vgprs
+= 2;
5993 if (G_0286CC_PERSP_CENTROID_ENA(config
->spi_ps_input_addr
))
5994 shader_info
->num_input_vgprs
+= 2;
5995 if (G_0286CC_PERSP_PULL_MODEL_ENA(config
->spi_ps_input_addr
))
5996 shader_info
->num_input_vgprs
+= 3;
5997 if (G_0286CC_LINEAR_SAMPLE_ENA(config
->spi_ps_input_addr
))
5998 shader_info
->num_input_vgprs
+= 2;
5999 if (G_0286CC_LINEAR_CENTER_ENA(config
->spi_ps_input_addr
))
6000 shader_info
->num_input_vgprs
+= 2;
6001 if (G_0286CC_LINEAR_CENTROID_ENA(config
->spi_ps_input_addr
))
6002 shader_info
->num_input_vgprs
+= 2;
6003 if (G_0286CC_LINE_STIPPLE_TEX_ENA(config
->spi_ps_input_addr
))
6004 shader_info
->num_input_vgprs
+= 1;
6005 if (G_0286CC_POS_X_FLOAT_ENA(config
->spi_ps_input_addr
))
6006 shader_info
->num_input_vgprs
+= 1;
6007 if (G_0286CC_POS_Y_FLOAT_ENA(config
->spi_ps_input_addr
))
6008 shader_info
->num_input_vgprs
+= 1;
6009 if (G_0286CC_POS_Z_FLOAT_ENA(config
->spi_ps_input_addr
))
6010 shader_info
->num_input_vgprs
+= 1;
6011 if (G_0286CC_POS_W_FLOAT_ENA(config
->spi_ps_input_addr
))
6012 shader_info
->num_input_vgprs
+= 1;
6013 if (G_0286CC_FRONT_FACE_ENA(config
->spi_ps_input_addr
))
6014 shader_info
->num_input_vgprs
+= 1;
6015 if (G_0286CC_ANCILLARY_ENA(config
->spi_ps_input_addr
))
6016 shader_info
->num_input_vgprs
+= 1;
6017 if (G_0286CC_SAMPLE_COVERAGE_ENA(config
->spi_ps_input_addr
))
6018 shader_info
->num_input_vgprs
+= 1;
6019 if (G_0286CC_POS_FIXED_PT_ENA(config
->spi_ps_input_addr
))
6020 shader_info
->num_input_vgprs
+= 1;
6022 config
->num_vgprs
= MAX2(config
->num_vgprs
, shader_info
->num_input_vgprs
);
6024 /* +3 for scratch wave offset and VCC */
6025 config
->num_sgprs
= MAX2(config
->num_sgprs
,
6026 shader_info
->num_input_sgprs
+ 3);
6029 void ac_compile_nir_shader(LLVMTargetMachineRef tm
,
6030 struct ac_shader_binary
*binary
,
6031 struct ac_shader_config
*config
,
6032 struct ac_shader_variant_info
*shader_info
,
6033 struct nir_shader
*nir
,
6034 const struct ac_nir_compiler_options
*options
,
6038 LLVMModuleRef llvm_module
= ac_translate_nir_to_llvm(tm
, nir
, shader_info
,
6041 ac_compile_llvm_module(tm
, llvm_module
, binary
, config
, shader_info
, nir
->stage
, dump_shader
, options
->supports_spill
);
6042 switch (nir
->stage
) {
6043 case MESA_SHADER_COMPUTE
:
6044 for (int i
= 0; i
< 3; ++i
)
6045 shader_info
->cs
.block_size
[i
] = nir
->info
->cs
.local_size
[i
];
6047 case MESA_SHADER_FRAGMENT
:
6048 shader_info
->fs
.early_fragment_test
= nir
->info
->fs
.early_fragment_tests
;
6050 case MESA_SHADER_GEOMETRY
:
6051 shader_info
->gs
.vertices_in
= nir
->info
->gs
.vertices_in
;
6052 shader_info
->gs
.vertices_out
= nir
->info
->gs
.vertices_out
;
6053 shader_info
->gs
.output_prim
= nir
->info
->gs
.output_primitive
;
6054 shader_info
->gs
.invocations
= nir
->info
->gs
.invocations
;
6056 case MESA_SHADER_TESS_EVAL
:
6057 shader_info
->tes
.primitive_mode
= nir
->info
->tess
.primitive_mode
;
6058 shader_info
->tes
.spacing
= nir
->info
->tess
.spacing
;
6059 shader_info
->tes
.ccw
= nir
->info
->tess
.ccw
;
6060 shader_info
->tes
.point_mode
= nir
->info
->tess
.point_mode
;
6061 shader_info
->tes
.as_es
= options
->key
.tes
.as_es
;
6063 case MESA_SHADER_TESS_CTRL
:
6064 shader_info
->tcs
.tcs_vertices_out
= nir
->info
->tess
.tcs_vertices_out
;
6066 case MESA_SHADER_VERTEX
:
6067 shader_info
->vs
.as_es
= options
->key
.vs
.as_es
;
6068 shader_info
->vs
.as_ls
= options
->key
.vs
.as_ls
;
6069 /* in LS mode we need at least 1, invocation id needs 3, handled elsewhere */
6070 if (options
->key
.vs
.as_ls
)
6071 shader_info
->vs
.vgpr_comp_cnt
= MAX2(1, shader_info
->vs
.vgpr_comp_cnt
);
6079 ac_gs_copy_shader_emit(struct nir_to_llvm_context
*ctx
)
6081 LLVMValueRef args
[9];
6082 args
[0] = ctx
->gsvs_ring
;
6083 args
[1] = LLVMBuildMul(ctx
->builder
, ctx
->vertex_id
, LLVMConstInt(ctx
->i32
, 4, false), "");
6084 args
[3] = ctx
->i32zero
;
6085 args
[4] = ctx
->i32one
; /* OFFEN */
6086 args
[5] = ctx
->i32zero
; /* IDXEN */
6087 args
[6] = ctx
->i32one
; /* GLC */
6088 args
[7] = ctx
->i32one
; /* SLC */
6089 args
[8] = ctx
->i32zero
; /* TFE */
6093 for (unsigned i
= 0; i
< RADEON_LLVM_MAX_OUTPUTS
; ++i
) {
6097 if (!(ctx
->output_mask
& (1ull << i
)))
6100 if (i
== VARYING_SLOT_CLIP_DIST0
) {
6101 /* unpack clip and cull from a single set of slots */
6102 length
= ctx
->num_output_clips
+ ctx
->num_output_culls
;
6107 for (unsigned j
= 0; j
< length
; j
++) {
6109 args
[2] = LLVMConstInt(ctx
->i32
,
6111 ctx
->gs_max_out_vertices
* 16 * 4, false);
6113 value
= ac_build_intrinsic(&ctx
->ac
,
6114 "llvm.SI.buffer.load.dword.i32.i32",
6116 AC_FUNC_ATTR_READONLY
|
6117 AC_FUNC_ATTR_LEGACY
);
6119 LLVMBuildStore(ctx
->builder
,
6120 to_float(ctx
, value
), ctx
->outputs
[radeon_llvm_reg_index_soa(i
, j
)]);
6124 handle_vs_outputs_post(ctx
, &ctx
->shader_info
->vs
.outinfo
);
6127 void ac_create_gs_copy_shader(LLVMTargetMachineRef tm
,
6128 struct nir_shader
*geom_shader
,
6129 struct ac_shader_binary
*binary
,
6130 struct ac_shader_config
*config
,
6131 struct ac_shader_variant_info
*shader_info
,
6132 const struct ac_nir_compiler_options
*options
,
6135 struct nir_to_llvm_context ctx
= {0};
6136 ctx
.context
= LLVMContextCreate();
6137 ctx
.module
= LLVMModuleCreateWithNameInContext("shader", ctx
.context
);
6138 ctx
.options
= options
;
6139 ctx
.shader_info
= shader_info
;
6141 ac_llvm_context_init(&ctx
.ac
, ctx
.context
);
6142 ctx
.ac
.module
= ctx
.module
;
6144 ctx
.is_gs_copy_shader
= true;
6145 LLVMSetTarget(ctx
.module
, "amdgcn--");
6148 ctx
.builder
= LLVMCreateBuilderInContext(ctx
.context
);
6149 ctx
.ac
.builder
= ctx
.builder
;
6150 ctx
.stage
= MESA_SHADER_VERTEX
;
6152 create_function(&ctx
);
6154 ctx
.gs_max_out_vertices
= geom_shader
->info
->gs
.vertices_out
;
6155 ac_setup_rings(&ctx
);
6157 ctx
.num_output_clips
= geom_shader
->info
->clip_distance_array_size
;
6158 ctx
.num_output_culls
= geom_shader
->info
->cull_distance_array_size
;
6160 nir_foreach_variable(variable
, &geom_shader
->outputs
)
6161 handle_shader_output_decl(&ctx
, variable
);
6163 ac_gs_copy_shader_emit(&ctx
);
6165 LLVMBuildRetVoid(ctx
.builder
);
6167 ac_llvm_finalize_module(&ctx
);
6169 ac_compile_llvm_module(tm
, ctx
.module
, binary
, config
, shader_info
,
6171 dump_shader
, options
->supports_spill
);