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ac/nir: Lower large indirect variables to scratch
[mesa.git] / src / amd / common / ac_nir_to_llvm.c
1 /*
2 * Copyright © 2016 Bas Nieuwenhuizen
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
21 * IN THE SOFTWARE.
22 */
23
24 #include "ac_nir_to_llvm.h"
25 #include "ac_llvm_build.h"
26 #include "ac_llvm_util.h"
27 #include "ac_binary.h"
28 #include "sid.h"
29 #include "nir/nir.h"
30 #include "nir/nir_deref.h"
31 #include "util/bitscan.h"
32 #include "util/u_math.h"
33 #include "ac_shader_abi.h"
34 #include "ac_shader_util.h"
35
36 struct ac_nir_context {
37 struct ac_llvm_context ac;
38 struct ac_shader_abi *abi;
39
40 gl_shader_stage stage;
41 shader_info *info;
42
43 LLVMValueRef *ssa_defs;
44
45 LLVMValueRef scratch;
46
47 struct hash_table *defs;
48 struct hash_table *phis;
49 struct hash_table *vars;
50
51 LLVMValueRef main_function;
52 LLVMBasicBlockRef continue_block;
53 LLVMBasicBlockRef break_block;
54
55 int num_locals;
56 LLVMValueRef *locals;
57 };
58
59 static LLVMValueRef get_sampler_desc(struct ac_nir_context *ctx,
60 nir_deref_instr *deref_instr,
61 enum ac_descriptor_type desc_type,
62 const nir_instr *instr,
63 bool image, bool write);
64
65 static void
66 build_store_values_extended(struct ac_llvm_context *ac,
67 LLVMValueRef *values,
68 unsigned value_count,
69 unsigned value_stride,
70 LLVMValueRef vec)
71 {
72 LLVMBuilderRef builder = ac->builder;
73 unsigned i;
74
75 for (i = 0; i < value_count; i++) {
76 LLVMValueRef ptr = values[i * value_stride];
77 LLVMValueRef index = LLVMConstInt(ac->i32, i, false);
78 LLVMValueRef value = LLVMBuildExtractElement(builder, vec, index, "");
79 LLVMBuildStore(builder, value, ptr);
80 }
81 }
82
83 static enum ac_image_dim
84 get_ac_sampler_dim(const struct ac_llvm_context *ctx, enum glsl_sampler_dim dim,
85 bool is_array)
86 {
87 switch (dim) {
88 case GLSL_SAMPLER_DIM_1D:
89 if (ctx->chip_class == GFX9)
90 return is_array ? ac_image_2darray : ac_image_2d;
91 return is_array ? ac_image_1darray : ac_image_1d;
92 case GLSL_SAMPLER_DIM_2D:
93 case GLSL_SAMPLER_DIM_RECT:
94 case GLSL_SAMPLER_DIM_EXTERNAL:
95 return is_array ? ac_image_2darray : ac_image_2d;
96 case GLSL_SAMPLER_DIM_3D:
97 return ac_image_3d;
98 case GLSL_SAMPLER_DIM_CUBE:
99 return ac_image_cube;
100 case GLSL_SAMPLER_DIM_MS:
101 return is_array ? ac_image_2darraymsaa : ac_image_2dmsaa;
102 case GLSL_SAMPLER_DIM_SUBPASS:
103 return ac_image_2darray;
104 case GLSL_SAMPLER_DIM_SUBPASS_MS:
105 return ac_image_2darraymsaa;
106 default:
107 unreachable("bad sampler dim");
108 }
109 }
110
111 static enum ac_image_dim
112 get_ac_image_dim(const struct ac_llvm_context *ctx, enum glsl_sampler_dim sdim,
113 bool is_array)
114 {
115 enum ac_image_dim dim = get_ac_sampler_dim(ctx, sdim, is_array);
116
117 if (dim == ac_image_cube ||
118 (ctx->chip_class <= GFX8 && dim == ac_image_3d))
119 dim = ac_image_2darray;
120
121 return dim;
122 }
123
124 static LLVMTypeRef get_def_type(struct ac_nir_context *ctx,
125 const nir_ssa_def *def)
126 {
127 LLVMTypeRef type = LLVMIntTypeInContext(ctx->ac.context, def->bit_size);
128 if (def->num_components > 1) {
129 type = LLVMVectorType(type, def->num_components);
130 }
131 return type;
132 }
133
134 static LLVMValueRef get_src(struct ac_nir_context *nir, nir_src src)
135 {
136 assert(src.is_ssa);
137 return nir->ssa_defs[src.ssa->index];
138 }
139
140 static LLVMValueRef
141 get_memory_ptr(struct ac_nir_context *ctx, nir_src src)
142 {
143 LLVMValueRef ptr = get_src(ctx, src);
144 ptr = LLVMBuildGEP(ctx->ac.builder, ctx->ac.lds, &ptr, 1, "");
145 int addr_space = LLVMGetPointerAddressSpace(LLVMTypeOf(ptr));
146
147 return LLVMBuildBitCast(ctx->ac.builder, ptr,
148 LLVMPointerType(ctx->ac.i32, addr_space), "");
149 }
150
151 static LLVMBasicBlockRef get_block(struct ac_nir_context *nir,
152 const struct nir_block *b)
153 {
154 struct hash_entry *entry = _mesa_hash_table_search(nir->defs, b);
155 return (LLVMBasicBlockRef)entry->data;
156 }
157
158 static LLVMValueRef get_alu_src(struct ac_nir_context *ctx,
159 nir_alu_src src,
160 unsigned num_components)
161 {
162 LLVMValueRef value = get_src(ctx, src.src);
163 bool need_swizzle = false;
164
165 assert(value);
166 unsigned src_components = ac_get_llvm_num_components(value);
167 for (unsigned i = 0; i < num_components; ++i) {
168 assert(src.swizzle[i] < src_components);
169 if (src.swizzle[i] != i)
170 need_swizzle = true;
171 }
172
173 if (need_swizzle || num_components != src_components) {
174 LLVMValueRef masks[] = {
175 LLVMConstInt(ctx->ac.i32, src.swizzle[0], false),
176 LLVMConstInt(ctx->ac.i32, src.swizzle[1], false),
177 LLVMConstInt(ctx->ac.i32, src.swizzle[2], false),
178 LLVMConstInt(ctx->ac.i32, src.swizzle[3], false)};
179
180 if (src_components > 1 && num_components == 1) {
181 value = LLVMBuildExtractElement(ctx->ac.builder, value,
182 masks[0], "");
183 } else if (src_components == 1 && num_components > 1) {
184 LLVMValueRef values[] = {value, value, value, value};
185 value = ac_build_gather_values(&ctx->ac, values, num_components);
186 } else {
187 LLVMValueRef swizzle = LLVMConstVector(masks, num_components);
188 value = LLVMBuildShuffleVector(ctx->ac.builder, value, value,
189 swizzle, "");
190 }
191 }
192 assert(!src.negate);
193 assert(!src.abs);
194 return value;
195 }
196
197 static LLVMValueRef emit_int_cmp(struct ac_llvm_context *ctx,
198 LLVMIntPredicate pred, LLVMValueRef src0,
199 LLVMValueRef src1)
200 {
201 LLVMValueRef result = LLVMBuildICmp(ctx->builder, pred, src0, src1, "");
202 return LLVMBuildSelect(ctx->builder, result,
203 LLVMConstInt(ctx->i32, 0xFFFFFFFF, false),
204 ctx->i32_0, "");
205 }
206
207 static LLVMValueRef emit_float_cmp(struct ac_llvm_context *ctx,
208 LLVMRealPredicate pred, LLVMValueRef src0,
209 LLVMValueRef src1)
210 {
211 LLVMValueRef result;
212 src0 = ac_to_float(ctx, src0);
213 src1 = ac_to_float(ctx, src1);
214 result = LLVMBuildFCmp(ctx->builder, pred, src0, src1, "");
215 return LLVMBuildSelect(ctx->builder, result,
216 LLVMConstInt(ctx->i32, 0xFFFFFFFF, false),
217 ctx->i32_0, "");
218 }
219
220 static LLVMValueRef emit_intrin_1f_param(struct ac_llvm_context *ctx,
221 const char *intrin,
222 LLVMTypeRef result_type,
223 LLVMValueRef src0)
224 {
225 char name[64];
226 LLVMValueRef params[] = {
227 ac_to_float(ctx, src0),
228 };
229
230 ASSERTED const int length = snprintf(name, sizeof(name), "%s.f%d", intrin,
231 ac_get_elem_bits(ctx, result_type));
232 assert(length < sizeof(name));
233 return ac_build_intrinsic(ctx, name, result_type, params, 1, AC_FUNC_ATTR_READNONE);
234 }
235
236 static LLVMValueRef emit_intrin_2f_param(struct ac_llvm_context *ctx,
237 const char *intrin,
238 LLVMTypeRef result_type,
239 LLVMValueRef src0, LLVMValueRef src1)
240 {
241 char name[64];
242 LLVMValueRef params[] = {
243 ac_to_float(ctx, src0),
244 ac_to_float(ctx, src1),
245 };
246
247 ASSERTED const int length = snprintf(name, sizeof(name), "%s.f%d", intrin,
248 ac_get_elem_bits(ctx, result_type));
249 assert(length < sizeof(name));
250 return ac_build_intrinsic(ctx, name, result_type, params, 2, AC_FUNC_ATTR_READNONE);
251 }
252
253 static LLVMValueRef emit_intrin_3f_param(struct ac_llvm_context *ctx,
254 const char *intrin,
255 LLVMTypeRef result_type,
256 LLVMValueRef src0, LLVMValueRef src1, LLVMValueRef src2)
257 {
258 char name[64];
259 LLVMValueRef params[] = {
260 ac_to_float(ctx, src0),
261 ac_to_float(ctx, src1),
262 ac_to_float(ctx, src2),
263 };
264
265 ASSERTED const int length = snprintf(name, sizeof(name), "%s.f%d", intrin,
266 ac_get_elem_bits(ctx, result_type));
267 assert(length < sizeof(name));
268 return ac_build_intrinsic(ctx, name, result_type, params, 3, AC_FUNC_ATTR_READNONE);
269 }
270
271 static LLVMValueRef emit_bcsel(struct ac_llvm_context *ctx,
272 LLVMValueRef src0, LLVMValueRef src1, LLVMValueRef src2)
273 {
274 assert(LLVMGetTypeKind(LLVMTypeOf(src0)) != LLVMVectorTypeKind);
275
276 LLVMValueRef v = LLVMBuildICmp(ctx->builder, LLVMIntNE, src0,
277 ctx->i32_0, "");
278 return LLVMBuildSelect(ctx->builder, v,
279 ac_to_integer_or_pointer(ctx, src1),
280 ac_to_integer_or_pointer(ctx, src2), "");
281 }
282
283 static LLVMValueRef emit_iabs(struct ac_llvm_context *ctx,
284 LLVMValueRef src0)
285 {
286 return ac_build_imax(ctx, src0, LLVMBuildNeg(ctx->builder, src0, ""));
287 }
288
289 static LLVMValueRef emit_uint_carry(struct ac_llvm_context *ctx,
290 const char *intrin,
291 LLVMValueRef src0, LLVMValueRef src1)
292 {
293 LLVMTypeRef ret_type;
294 LLVMTypeRef types[] = { ctx->i32, ctx->i1 };
295 LLVMValueRef res;
296 LLVMValueRef params[] = { src0, src1 };
297 ret_type = LLVMStructTypeInContext(ctx->context, types,
298 2, true);
299
300 res = ac_build_intrinsic(ctx, intrin, ret_type,
301 params, 2, AC_FUNC_ATTR_READNONE);
302
303 res = LLVMBuildExtractValue(ctx->builder, res, 1, "");
304 res = LLVMBuildZExt(ctx->builder, res, ctx->i32, "");
305 return res;
306 }
307
308 static LLVMValueRef emit_b2f(struct ac_llvm_context *ctx,
309 LLVMValueRef src0,
310 unsigned bitsize)
311 {
312 LLVMValueRef result = LLVMBuildAnd(ctx->builder, src0,
313 LLVMBuildBitCast(ctx->builder, LLVMConstReal(ctx->f32, 1.0), ctx->i32, ""),
314 "");
315 result = LLVMBuildBitCast(ctx->builder, result, ctx->f32, "");
316
317 switch (bitsize) {
318 case 16:
319 return LLVMBuildFPTrunc(ctx->builder, result, ctx->f16, "");
320 case 32:
321 return result;
322 case 64:
323 return LLVMBuildFPExt(ctx->builder, result, ctx->f64, "");
324 default:
325 unreachable("Unsupported bit size.");
326 }
327 }
328
329 static LLVMValueRef emit_f2b(struct ac_llvm_context *ctx,
330 LLVMValueRef src0)
331 {
332 src0 = ac_to_float(ctx, src0);
333 LLVMValueRef zero = LLVMConstNull(LLVMTypeOf(src0));
334 return LLVMBuildSExt(ctx->builder,
335 LLVMBuildFCmp(ctx->builder, LLVMRealUNE, src0, zero, ""),
336 ctx->i32, "");
337 }
338
339 static LLVMValueRef emit_b2i(struct ac_llvm_context *ctx,
340 LLVMValueRef src0,
341 unsigned bitsize)
342 {
343 LLVMValueRef result = LLVMBuildAnd(ctx->builder, src0, ctx->i32_1, "");
344
345 switch (bitsize) {
346 case 8:
347 return LLVMBuildTrunc(ctx->builder, result, ctx->i8, "");
348 case 16:
349 return LLVMBuildTrunc(ctx->builder, result, ctx->i16, "");
350 case 32:
351 return result;
352 case 64:
353 return LLVMBuildZExt(ctx->builder, result, ctx->i64, "");
354 default:
355 unreachable("Unsupported bit size.");
356 }
357 }
358
359 static LLVMValueRef emit_i2b(struct ac_llvm_context *ctx,
360 LLVMValueRef src0)
361 {
362 LLVMValueRef zero = LLVMConstNull(LLVMTypeOf(src0));
363 return LLVMBuildSExt(ctx->builder,
364 LLVMBuildICmp(ctx->builder, LLVMIntNE, src0, zero, ""),
365 ctx->i32, "");
366 }
367
368 static LLVMValueRef emit_f2f16(struct ac_llvm_context *ctx,
369 LLVMValueRef src0)
370 {
371 LLVMValueRef result;
372 LLVMValueRef cond = NULL;
373
374 src0 = ac_to_float(ctx, src0);
375 result = LLVMBuildFPTrunc(ctx->builder, src0, ctx->f16, "");
376
377 if (ctx->chip_class >= GFX8) {
378 LLVMValueRef args[2];
379 /* Check if the result is a denormal - and flush to 0 if so. */
380 args[0] = result;
381 args[1] = LLVMConstInt(ctx->i32, N_SUBNORMAL | P_SUBNORMAL, false);
382 cond = ac_build_intrinsic(ctx, "llvm.amdgcn.class.f16", ctx->i1, args, 2, AC_FUNC_ATTR_READNONE);
383 }
384
385 /* need to convert back up to f32 */
386 result = LLVMBuildFPExt(ctx->builder, result, ctx->f32, "");
387
388 if (ctx->chip_class >= GFX8)
389 result = LLVMBuildSelect(ctx->builder, cond, ctx->f32_0, result, "");
390 else {
391 /* for GFX6-GFX7 */
392 /* 0x38800000 is smallest half float value (2^-14) in 32-bit float,
393 * so compare the result and flush to 0 if it's smaller.
394 */
395 LLVMValueRef temp, cond2;
396 temp = emit_intrin_1f_param(ctx, "llvm.fabs", ctx->f32, result);
397 cond = LLVMBuildFCmp(ctx->builder, LLVMRealUGT,
398 LLVMBuildBitCast(ctx->builder, LLVMConstInt(ctx->i32, 0x38800000, false), ctx->f32, ""),
399 temp, "");
400 cond2 = LLVMBuildFCmp(ctx->builder, LLVMRealUNE,
401 temp, ctx->f32_0, "");
402 cond = LLVMBuildAnd(ctx->builder, cond, cond2, "");
403 result = LLVMBuildSelect(ctx->builder, cond, ctx->f32_0, result, "");
404 }
405 return result;
406 }
407
408 static LLVMValueRef emit_umul_high(struct ac_llvm_context *ctx,
409 LLVMValueRef src0, LLVMValueRef src1)
410 {
411 LLVMValueRef dst64, result;
412 src0 = LLVMBuildZExt(ctx->builder, src0, ctx->i64, "");
413 src1 = LLVMBuildZExt(ctx->builder, src1, ctx->i64, "");
414
415 dst64 = LLVMBuildMul(ctx->builder, src0, src1, "");
416 dst64 = LLVMBuildLShr(ctx->builder, dst64, LLVMConstInt(ctx->i64, 32, false), "");
417 result = LLVMBuildTrunc(ctx->builder, dst64, ctx->i32, "");
418 return result;
419 }
420
421 static LLVMValueRef emit_imul_high(struct ac_llvm_context *ctx,
422 LLVMValueRef src0, LLVMValueRef src1)
423 {
424 LLVMValueRef dst64, result;
425 src0 = LLVMBuildSExt(ctx->builder, src0, ctx->i64, "");
426 src1 = LLVMBuildSExt(ctx->builder, src1, ctx->i64, "");
427
428 dst64 = LLVMBuildMul(ctx->builder, src0, src1, "");
429 dst64 = LLVMBuildAShr(ctx->builder, dst64, LLVMConstInt(ctx->i64, 32, false), "");
430 result = LLVMBuildTrunc(ctx->builder, dst64, ctx->i32, "");
431 return result;
432 }
433
434 static LLVMValueRef emit_bfm(struct ac_llvm_context *ctx,
435 LLVMValueRef bits, LLVMValueRef offset)
436 {
437 /* mask = ((1 << bits) - 1) << offset */
438 return LLVMBuildShl(ctx->builder,
439 LLVMBuildSub(ctx->builder,
440 LLVMBuildShl(ctx->builder,
441 ctx->i32_1,
442 bits, ""),
443 ctx->i32_1, ""),
444 offset, "");
445 }
446
447 static LLVMValueRef emit_bitfield_select(struct ac_llvm_context *ctx,
448 LLVMValueRef mask, LLVMValueRef insert,
449 LLVMValueRef base)
450 {
451 /* Calculate:
452 * (mask & insert) | (~mask & base) = base ^ (mask & (insert ^ base))
453 * Use the right-hand side, which the LLVM backend can convert to V_BFI.
454 */
455 return LLVMBuildXor(ctx->builder, base,
456 LLVMBuildAnd(ctx->builder, mask,
457 LLVMBuildXor(ctx->builder, insert, base, ""), ""), "");
458 }
459
460 static LLVMValueRef emit_pack_2x16(struct ac_llvm_context *ctx,
461 LLVMValueRef src0,
462 LLVMValueRef (*pack)(struct ac_llvm_context *ctx,
463 LLVMValueRef args[2]))
464 {
465 LLVMValueRef comp[2];
466
467 src0 = ac_to_float(ctx, src0);
468 comp[0] = LLVMBuildExtractElement(ctx->builder, src0, ctx->i32_0, "");
469 comp[1] = LLVMBuildExtractElement(ctx->builder, src0, ctx->i32_1, "");
470
471 return LLVMBuildBitCast(ctx->builder, pack(ctx, comp), ctx->i32, "");
472 }
473
474 static LLVMValueRef emit_unpack_half_2x16(struct ac_llvm_context *ctx,
475 LLVMValueRef src0)
476 {
477 LLVMValueRef const16 = LLVMConstInt(ctx->i32, 16, false);
478 LLVMValueRef temps[2], val;
479 int i;
480
481 for (i = 0; i < 2; i++) {
482 val = i == 1 ? LLVMBuildLShr(ctx->builder, src0, const16, "") : src0;
483 val = LLVMBuildTrunc(ctx->builder, val, ctx->i16, "");
484 val = LLVMBuildBitCast(ctx->builder, val, ctx->f16, "");
485 temps[i] = LLVMBuildFPExt(ctx->builder, val, ctx->f32, "");
486 }
487 return ac_build_gather_values(ctx, temps, 2);
488 }
489
490 static LLVMValueRef emit_ddxy(struct ac_nir_context *ctx,
491 nir_op op,
492 LLVMValueRef src0)
493 {
494 unsigned mask;
495 int idx;
496 LLVMValueRef result;
497
498 if (op == nir_op_fddx_fine)
499 mask = AC_TID_MASK_LEFT;
500 else if (op == nir_op_fddy_fine)
501 mask = AC_TID_MASK_TOP;
502 else
503 mask = AC_TID_MASK_TOP_LEFT;
504
505 /* for DDX we want to next X pixel, DDY next Y pixel. */
506 if (op == nir_op_fddx_fine ||
507 op == nir_op_fddx_coarse ||
508 op == nir_op_fddx)
509 idx = 1;
510 else
511 idx = 2;
512
513 result = ac_build_ddxy(&ctx->ac, mask, idx, src0);
514 return result;
515 }
516
517 static void visit_alu(struct ac_nir_context *ctx, const nir_alu_instr *instr)
518 {
519 LLVMValueRef src[4], result = NULL;
520 unsigned num_components = instr->dest.dest.ssa.num_components;
521 unsigned src_components;
522 LLVMTypeRef def_type = get_def_type(ctx, &instr->dest.dest.ssa);
523
524 assert(nir_op_infos[instr->op].num_inputs <= ARRAY_SIZE(src));
525 switch (instr->op) {
526 case nir_op_vec2:
527 case nir_op_vec3:
528 case nir_op_vec4:
529 src_components = 1;
530 break;
531 case nir_op_pack_half_2x16:
532 case nir_op_pack_snorm_2x16:
533 case nir_op_pack_unorm_2x16:
534 src_components = 2;
535 break;
536 case nir_op_unpack_half_2x16:
537 src_components = 1;
538 break;
539 case nir_op_cube_face_coord:
540 case nir_op_cube_face_index:
541 src_components = 3;
542 break;
543 default:
544 src_components = num_components;
545 break;
546 }
547 for (unsigned i = 0; i < nir_op_infos[instr->op].num_inputs; i++)
548 src[i] = get_alu_src(ctx, instr->src[i], src_components);
549
550 switch (instr->op) {
551 case nir_op_mov:
552 result = src[0];
553 break;
554 case nir_op_fneg:
555 src[0] = ac_to_float(&ctx->ac, src[0]);
556 result = LLVMBuildFNeg(ctx->ac.builder, src[0], "");
557 break;
558 case nir_op_ineg:
559 result = LLVMBuildNeg(ctx->ac.builder, src[0], "");
560 break;
561 case nir_op_inot:
562 result = LLVMBuildNot(ctx->ac.builder, src[0], "");
563 break;
564 case nir_op_iadd:
565 result = LLVMBuildAdd(ctx->ac.builder, src[0], src[1], "");
566 break;
567 case nir_op_fadd:
568 src[0] = ac_to_float(&ctx->ac, src[0]);
569 src[1] = ac_to_float(&ctx->ac, src[1]);
570 result = LLVMBuildFAdd(ctx->ac.builder, src[0], src[1], "");
571 break;
572 case nir_op_fsub:
573 src[0] = ac_to_float(&ctx->ac, src[0]);
574 src[1] = ac_to_float(&ctx->ac, src[1]);
575 result = LLVMBuildFSub(ctx->ac.builder, src[0], src[1], "");
576 break;
577 case nir_op_isub:
578 result = LLVMBuildSub(ctx->ac.builder, src[0], src[1], "");
579 break;
580 case nir_op_imul:
581 result = LLVMBuildMul(ctx->ac.builder, src[0], src[1], "");
582 break;
583 case nir_op_imod:
584 result = LLVMBuildSRem(ctx->ac.builder, src[0], src[1], "");
585 break;
586 case nir_op_umod:
587 result = LLVMBuildURem(ctx->ac.builder, src[0], src[1], "");
588 break;
589 case nir_op_fmod:
590 src[0] = ac_to_float(&ctx->ac, src[0]);
591 src[1] = ac_to_float(&ctx->ac, src[1]);
592 result = ac_build_fdiv(&ctx->ac, src[0], src[1]);
593 result = emit_intrin_1f_param(&ctx->ac, "llvm.floor",
594 ac_to_float_type(&ctx->ac, def_type), result);
595 result = LLVMBuildFMul(ctx->ac.builder, src[1] , result, "");
596 result = LLVMBuildFSub(ctx->ac.builder, src[0], result, "");
597 break;
598 case nir_op_frem:
599 src[0] = ac_to_float(&ctx->ac, src[0]);
600 src[1] = ac_to_float(&ctx->ac, src[1]);
601 result = LLVMBuildFRem(ctx->ac.builder, src[0], src[1], "");
602 break;
603 case nir_op_irem:
604 result = LLVMBuildSRem(ctx->ac.builder, src[0], src[1], "");
605 break;
606 case nir_op_idiv:
607 result = LLVMBuildSDiv(ctx->ac.builder, src[0], src[1], "");
608 break;
609 case nir_op_udiv:
610 result = LLVMBuildUDiv(ctx->ac.builder, src[0], src[1], "");
611 break;
612 case nir_op_fmul:
613 src[0] = ac_to_float(&ctx->ac, src[0]);
614 src[1] = ac_to_float(&ctx->ac, src[1]);
615 result = LLVMBuildFMul(ctx->ac.builder, src[0], src[1], "");
616 break;
617 case nir_op_frcp:
618 src[0] = ac_to_float(&ctx->ac, src[0]);
619 result = ac_build_fdiv(&ctx->ac, LLVMConstReal(LLVMTypeOf(src[0]), 1.0), src[0]);
620 break;
621 case nir_op_iand:
622 result = LLVMBuildAnd(ctx->ac.builder, src[0], src[1], "");
623 break;
624 case nir_op_ior:
625 result = LLVMBuildOr(ctx->ac.builder, src[0], src[1], "");
626 break;
627 case nir_op_ixor:
628 result = LLVMBuildXor(ctx->ac.builder, src[0], src[1], "");
629 break;
630 case nir_op_ishl:
631 if (ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[1])) < ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[0])))
632 src[1] = LLVMBuildZExt(ctx->ac.builder, src[1],
633 LLVMTypeOf(src[0]), "");
634 else if (ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[1])) > ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[0])))
635 src[1] = LLVMBuildTrunc(ctx->ac.builder, src[1],
636 LLVMTypeOf(src[0]), "");
637 result = LLVMBuildShl(ctx->ac.builder, src[0], src[1], "");
638 break;
639 case nir_op_ishr:
640 if (ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[1])) < ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[0])))
641 src[1] = LLVMBuildZExt(ctx->ac.builder, src[1],
642 LLVMTypeOf(src[0]), "");
643 else if (ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[1])) > ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[0])))
644 src[1] = LLVMBuildTrunc(ctx->ac.builder, src[1],
645 LLVMTypeOf(src[0]), "");
646 result = LLVMBuildAShr(ctx->ac.builder, src[0], src[1], "");
647 break;
648 case nir_op_ushr:
649 if (ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[1])) < ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[0])))
650 src[1] = LLVMBuildZExt(ctx->ac.builder, src[1],
651 LLVMTypeOf(src[0]), "");
652 else if (ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[1])) > ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[0])))
653 src[1] = LLVMBuildTrunc(ctx->ac.builder, src[1],
654 LLVMTypeOf(src[0]), "");
655 result = LLVMBuildLShr(ctx->ac.builder, src[0], src[1], "");
656 break;
657 case nir_op_ilt32:
658 result = emit_int_cmp(&ctx->ac, LLVMIntSLT, src[0], src[1]);
659 break;
660 case nir_op_ine32:
661 result = emit_int_cmp(&ctx->ac, LLVMIntNE, src[0], src[1]);
662 break;
663 case nir_op_ieq32:
664 result = emit_int_cmp(&ctx->ac, LLVMIntEQ, src[0], src[1]);
665 break;
666 case nir_op_ige32:
667 result = emit_int_cmp(&ctx->ac, LLVMIntSGE, src[0], src[1]);
668 break;
669 case nir_op_ult32:
670 result = emit_int_cmp(&ctx->ac, LLVMIntULT, src[0], src[1]);
671 break;
672 case nir_op_uge32:
673 result = emit_int_cmp(&ctx->ac, LLVMIntUGE, src[0], src[1]);
674 break;
675 case nir_op_feq32:
676 result = emit_float_cmp(&ctx->ac, LLVMRealOEQ, src[0], src[1]);
677 break;
678 case nir_op_fne32:
679 result = emit_float_cmp(&ctx->ac, LLVMRealUNE, src[0], src[1]);
680 break;
681 case nir_op_flt32:
682 result = emit_float_cmp(&ctx->ac, LLVMRealOLT, src[0], src[1]);
683 break;
684 case nir_op_fge32:
685 result = emit_float_cmp(&ctx->ac, LLVMRealOGE, src[0], src[1]);
686 break;
687 case nir_op_fabs:
688 result = emit_intrin_1f_param(&ctx->ac, "llvm.fabs",
689 ac_to_float_type(&ctx->ac, def_type), src[0]);
690 break;
691 case nir_op_iabs:
692 result = emit_iabs(&ctx->ac, src[0]);
693 break;
694 case nir_op_imax:
695 result = ac_build_imax(&ctx->ac, src[0], src[1]);
696 break;
697 case nir_op_imin:
698 result = ac_build_imin(&ctx->ac, src[0], src[1]);
699 break;
700 case nir_op_umax:
701 result = ac_build_umax(&ctx->ac, src[0], src[1]);
702 break;
703 case nir_op_umin:
704 result = ac_build_umin(&ctx->ac, src[0], src[1]);
705 break;
706 case nir_op_isign:
707 result = ac_build_isign(&ctx->ac, src[0],
708 instr->dest.dest.ssa.bit_size);
709 break;
710 case nir_op_fsign:
711 src[0] = ac_to_float(&ctx->ac, src[0]);
712 result = ac_build_fsign(&ctx->ac, src[0],
713 instr->dest.dest.ssa.bit_size);
714 break;
715 case nir_op_ffloor:
716 result = emit_intrin_1f_param(&ctx->ac, "llvm.floor",
717 ac_to_float_type(&ctx->ac, def_type), src[0]);
718 break;
719 case nir_op_ftrunc:
720 result = emit_intrin_1f_param(&ctx->ac, "llvm.trunc",
721 ac_to_float_type(&ctx->ac, def_type), src[0]);
722 break;
723 case nir_op_fceil:
724 result = emit_intrin_1f_param(&ctx->ac, "llvm.ceil",
725 ac_to_float_type(&ctx->ac, def_type), src[0]);
726 break;
727 case nir_op_fround_even:
728 result = emit_intrin_1f_param(&ctx->ac, "llvm.rint",
729 ac_to_float_type(&ctx->ac, def_type),src[0]);
730 break;
731 case nir_op_ffract:
732 src[0] = ac_to_float(&ctx->ac, src[0]);
733 result = ac_build_fract(&ctx->ac, src[0],
734 instr->dest.dest.ssa.bit_size);
735 break;
736 case nir_op_fsin:
737 result = emit_intrin_1f_param(&ctx->ac, "llvm.sin",
738 ac_to_float_type(&ctx->ac, def_type), src[0]);
739 break;
740 case nir_op_fcos:
741 result = emit_intrin_1f_param(&ctx->ac, "llvm.cos",
742 ac_to_float_type(&ctx->ac, def_type), src[0]);
743 break;
744 case nir_op_fsqrt:
745 result = emit_intrin_1f_param(&ctx->ac, "llvm.sqrt",
746 ac_to_float_type(&ctx->ac, def_type), src[0]);
747 break;
748 case nir_op_fexp2:
749 result = emit_intrin_1f_param(&ctx->ac, "llvm.exp2",
750 ac_to_float_type(&ctx->ac, def_type), src[0]);
751 break;
752 case nir_op_flog2:
753 result = emit_intrin_1f_param(&ctx->ac, "llvm.log2",
754 ac_to_float_type(&ctx->ac, def_type), src[0]);
755 break;
756 case nir_op_frsq:
757 result = emit_intrin_1f_param(&ctx->ac, "llvm.sqrt",
758 ac_to_float_type(&ctx->ac, def_type), src[0]);
759 result = ac_build_fdiv(&ctx->ac, LLVMConstReal(LLVMTypeOf(result), 1.0), result);
760 break;
761 case nir_op_frexp_exp:
762 src[0] = ac_to_float(&ctx->ac, src[0]);
763 result = ac_build_frexp_exp(&ctx->ac, src[0],
764 ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[0])));
765 if (ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[0])) == 16)
766 result = LLVMBuildSExt(ctx->ac.builder, result,
767 ctx->ac.i32, "");
768 break;
769 case nir_op_frexp_sig:
770 src[0] = ac_to_float(&ctx->ac, src[0]);
771 result = ac_build_frexp_mant(&ctx->ac, src[0],
772 instr->dest.dest.ssa.bit_size);
773 break;
774 case nir_op_fpow:
775 result = emit_intrin_2f_param(&ctx->ac, "llvm.pow",
776 ac_to_float_type(&ctx->ac, def_type), src[0], src[1]);
777 break;
778 case nir_op_fmax:
779 result = emit_intrin_2f_param(&ctx->ac, "llvm.maxnum",
780 ac_to_float_type(&ctx->ac, def_type), src[0], src[1]);
781 if (ctx->ac.chip_class < GFX9 &&
782 instr->dest.dest.ssa.bit_size == 32) {
783 /* Only pre-GFX9 chips do not flush denorms. */
784 result = emit_intrin_1f_param(&ctx->ac, "llvm.canonicalize",
785 ac_to_float_type(&ctx->ac, def_type),
786 result);
787 }
788 break;
789 case nir_op_fmin:
790 result = emit_intrin_2f_param(&ctx->ac, "llvm.minnum",
791 ac_to_float_type(&ctx->ac, def_type), src[0], src[1]);
792 if (ctx->ac.chip_class < GFX9 &&
793 instr->dest.dest.ssa.bit_size == 32) {
794 /* Only pre-GFX9 chips do not flush denorms. */
795 result = emit_intrin_1f_param(&ctx->ac, "llvm.canonicalize",
796 ac_to_float_type(&ctx->ac, def_type),
797 result);
798 }
799 break;
800 case nir_op_ffma:
801 result = emit_intrin_3f_param(&ctx->ac, "llvm.fmuladd",
802 ac_to_float_type(&ctx->ac, def_type), src[0], src[1], src[2]);
803 break;
804 case nir_op_ldexp:
805 src[0] = ac_to_float(&ctx->ac, src[0]);
806 if (ac_get_elem_bits(&ctx->ac, def_type) == 32)
807 result = ac_build_intrinsic(&ctx->ac, "llvm.amdgcn.ldexp.f32", ctx->ac.f32, src, 2, AC_FUNC_ATTR_READNONE);
808 else if (ac_get_elem_bits(&ctx->ac, def_type) == 16)
809 result = ac_build_intrinsic(&ctx->ac, "llvm.amdgcn.ldexp.f16", ctx->ac.f16, src, 2, AC_FUNC_ATTR_READNONE);
810 else
811 result = ac_build_intrinsic(&ctx->ac, "llvm.amdgcn.ldexp.f64", ctx->ac.f64, src, 2, AC_FUNC_ATTR_READNONE);
812 break;
813 case nir_op_bfm:
814 result = emit_bfm(&ctx->ac, src[0], src[1]);
815 break;
816 case nir_op_bitfield_select:
817 result = emit_bitfield_select(&ctx->ac, src[0], src[1], src[2]);
818 break;
819 case nir_op_ubfe:
820 result = ac_build_bfe(&ctx->ac, src[0], src[1], src[2], false);
821 break;
822 case nir_op_ibfe:
823 result = ac_build_bfe(&ctx->ac, src[0], src[1], src[2], true);
824 break;
825 case nir_op_bitfield_reverse:
826 result = ac_build_bitfield_reverse(&ctx->ac, src[0]);
827 break;
828 case nir_op_bit_count:
829 result = ac_build_bit_count(&ctx->ac, src[0]);
830 break;
831 case nir_op_vec2:
832 case nir_op_vec3:
833 case nir_op_vec4:
834 for (unsigned i = 0; i < nir_op_infos[instr->op].num_inputs; i++)
835 src[i] = ac_to_integer(&ctx->ac, src[i]);
836 result = ac_build_gather_values(&ctx->ac, src, num_components);
837 break;
838 case nir_op_f2i8:
839 case nir_op_f2i16:
840 case nir_op_f2i32:
841 case nir_op_f2i64:
842 src[0] = ac_to_float(&ctx->ac, src[0]);
843 result = LLVMBuildFPToSI(ctx->ac.builder, src[0], def_type, "");
844 break;
845 case nir_op_f2u8:
846 case nir_op_f2u16:
847 case nir_op_f2u32:
848 case nir_op_f2u64:
849 src[0] = ac_to_float(&ctx->ac, src[0]);
850 result = LLVMBuildFPToUI(ctx->ac.builder, src[0], def_type, "");
851 break;
852 case nir_op_i2f16:
853 case nir_op_i2f32:
854 case nir_op_i2f64:
855 result = LLVMBuildSIToFP(ctx->ac.builder, src[0], ac_to_float_type(&ctx->ac, def_type), "");
856 break;
857 case nir_op_u2f16:
858 case nir_op_u2f32:
859 case nir_op_u2f64:
860 result = LLVMBuildUIToFP(ctx->ac.builder, src[0], ac_to_float_type(&ctx->ac, def_type), "");
861 break;
862 case nir_op_f2f16_rtz:
863 src[0] = ac_to_float(&ctx->ac, src[0]);
864 if (LLVMTypeOf(src[0]) == ctx->ac.f64)
865 src[0] = LLVMBuildFPTrunc(ctx->ac.builder, src[0], ctx->ac.f32, "");
866 LLVMValueRef param[2] = { src[0], ctx->ac.f32_0 };
867 result = ac_build_cvt_pkrtz_f16(&ctx->ac, param);
868 result = LLVMBuildExtractElement(ctx->ac.builder, result, ctx->ac.i32_0, "");
869 break;
870 case nir_op_f2f16_rtne:
871 case nir_op_f2f16:
872 case nir_op_f2f32:
873 case nir_op_f2f64:
874 src[0] = ac_to_float(&ctx->ac, src[0]);
875 if (ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[0])) < ac_get_elem_bits(&ctx->ac, def_type))
876 result = LLVMBuildFPExt(ctx->ac.builder, src[0], ac_to_float_type(&ctx->ac, def_type), "");
877 else
878 result = LLVMBuildFPTrunc(ctx->ac.builder, src[0], ac_to_float_type(&ctx->ac, def_type), "");
879 break;
880 case nir_op_u2u8:
881 case nir_op_u2u16:
882 case nir_op_u2u32:
883 case nir_op_u2u64:
884 if (ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[0])) < ac_get_elem_bits(&ctx->ac, def_type))
885 result = LLVMBuildZExt(ctx->ac.builder, src[0], def_type, "");
886 else
887 result = LLVMBuildTrunc(ctx->ac.builder, src[0], def_type, "");
888 break;
889 case nir_op_i2i8:
890 case nir_op_i2i16:
891 case nir_op_i2i32:
892 case nir_op_i2i64:
893 if (ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[0])) < ac_get_elem_bits(&ctx->ac, def_type))
894 result = LLVMBuildSExt(ctx->ac.builder, src[0], def_type, "");
895 else
896 result = LLVMBuildTrunc(ctx->ac.builder, src[0], def_type, "");
897 break;
898 case nir_op_b32csel:
899 result = emit_bcsel(&ctx->ac, src[0], src[1], src[2]);
900 break;
901 case nir_op_find_lsb:
902 result = ac_find_lsb(&ctx->ac, ctx->ac.i32, src[0]);
903 break;
904 case nir_op_ufind_msb:
905 result = ac_build_umsb(&ctx->ac, src[0], ctx->ac.i32);
906 break;
907 case nir_op_ifind_msb:
908 result = ac_build_imsb(&ctx->ac, src[0], ctx->ac.i32);
909 break;
910 case nir_op_uadd_carry:
911 result = emit_uint_carry(&ctx->ac, "llvm.uadd.with.overflow.i32", src[0], src[1]);
912 break;
913 case nir_op_usub_borrow:
914 result = emit_uint_carry(&ctx->ac, "llvm.usub.with.overflow.i32", src[0], src[1]);
915 break;
916 case nir_op_b2f16:
917 case nir_op_b2f32:
918 case nir_op_b2f64:
919 result = emit_b2f(&ctx->ac, src[0], instr->dest.dest.ssa.bit_size);
920 break;
921 case nir_op_f2b32:
922 result = emit_f2b(&ctx->ac, src[0]);
923 break;
924 case nir_op_b2i8:
925 case nir_op_b2i16:
926 case nir_op_b2i32:
927 case nir_op_b2i64:
928 result = emit_b2i(&ctx->ac, src[0], instr->dest.dest.ssa.bit_size);
929 break;
930 case nir_op_i2b32:
931 result = emit_i2b(&ctx->ac, src[0]);
932 break;
933 case nir_op_fquantize2f16:
934 result = emit_f2f16(&ctx->ac, src[0]);
935 break;
936 case nir_op_umul_high:
937 result = emit_umul_high(&ctx->ac, src[0], src[1]);
938 break;
939 case nir_op_imul_high:
940 result = emit_imul_high(&ctx->ac, src[0], src[1]);
941 break;
942 case nir_op_pack_half_2x16:
943 result = emit_pack_2x16(&ctx->ac, src[0], ac_build_cvt_pkrtz_f16);
944 break;
945 case nir_op_pack_snorm_2x16:
946 result = emit_pack_2x16(&ctx->ac, src[0], ac_build_cvt_pknorm_i16);
947 break;
948 case nir_op_pack_unorm_2x16:
949 result = emit_pack_2x16(&ctx->ac, src[0], ac_build_cvt_pknorm_u16);
950 break;
951 case nir_op_unpack_half_2x16:
952 result = emit_unpack_half_2x16(&ctx->ac, src[0]);
953 break;
954 case nir_op_fddx:
955 case nir_op_fddy:
956 case nir_op_fddx_fine:
957 case nir_op_fddy_fine:
958 case nir_op_fddx_coarse:
959 case nir_op_fddy_coarse:
960 result = emit_ddxy(ctx, instr->op, src[0]);
961 break;
962
963 case nir_op_unpack_64_2x32_split_x: {
964 assert(ac_get_llvm_num_components(src[0]) == 1);
965 LLVMValueRef tmp = LLVMBuildBitCast(ctx->ac.builder, src[0],
966 ctx->ac.v2i32,
967 "");
968 result = LLVMBuildExtractElement(ctx->ac.builder, tmp,
969 ctx->ac.i32_0, "");
970 break;
971 }
972
973 case nir_op_unpack_64_2x32_split_y: {
974 assert(ac_get_llvm_num_components(src[0]) == 1);
975 LLVMValueRef tmp = LLVMBuildBitCast(ctx->ac.builder, src[0],
976 ctx->ac.v2i32,
977 "");
978 result = LLVMBuildExtractElement(ctx->ac.builder, tmp,
979 ctx->ac.i32_1, "");
980 break;
981 }
982
983 case nir_op_pack_64_2x32_split: {
984 LLVMValueRef tmp = ac_build_gather_values(&ctx->ac, src, 2);
985 result = LLVMBuildBitCast(ctx->ac.builder, tmp, ctx->ac.i64, "");
986 break;
987 }
988
989 case nir_op_pack_32_2x16_split: {
990 LLVMValueRef tmp = ac_build_gather_values(&ctx->ac, src, 2);
991 result = LLVMBuildBitCast(ctx->ac.builder, tmp, ctx->ac.i32, "");
992 break;
993 }
994
995 case nir_op_unpack_32_2x16_split_x: {
996 LLVMValueRef tmp = LLVMBuildBitCast(ctx->ac.builder, src[0],
997 ctx->ac.v2i16,
998 "");
999 result = LLVMBuildExtractElement(ctx->ac.builder, tmp,
1000 ctx->ac.i32_0, "");
1001 break;
1002 }
1003
1004 case nir_op_unpack_32_2x16_split_y: {
1005 LLVMValueRef tmp = LLVMBuildBitCast(ctx->ac.builder, src[0],
1006 ctx->ac.v2i16,
1007 "");
1008 result = LLVMBuildExtractElement(ctx->ac.builder, tmp,
1009 ctx->ac.i32_1, "");
1010 break;
1011 }
1012
1013 case nir_op_cube_face_coord: {
1014 src[0] = ac_to_float(&ctx->ac, src[0]);
1015 LLVMValueRef results[2];
1016 LLVMValueRef in[3];
1017 for (unsigned chan = 0; chan < 3; chan++)
1018 in[chan] = ac_llvm_extract_elem(&ctx->ac, src[0], chan);
1019 results[0] = ac_build_intrinsic(&ctx->ac, "llvm.amdgcn.cubesc",
1020 ctx->ac.f32, in, 3, AC_FUNC_ATTR_READNONE);
1021 results[1] = ac_build_intrinsic(&ctx->ac, "llvm.amdgcn.cubetc",
1022 ctx->ac.f32, in, 3, AC_FUNC_ATTR_READNONE);
1023 LLVMValueRef ma = ac_build_intrinsic(&ctx->ac, "llvm.amdgcn.cubema",
1024 ctx->ac.f32, in, 3, AC_FUNC_ATTR_READNONE);
1025 results[0] = ac_build_fdiv(&ctx->ac, results[0], ma);
1026 results[1] = ac_build_fdiv(&ctx->ac, results[1], ma);
1027 LLVMValueRef offset = LLVMConstReal(ctx->ac.f32, 0.5);
1028 results[0] = LLVMBuildFAdd(ctx->ac.builder, results[0], offset, "");
1029 results[1] = LLVMBuildFAdd(ctx->ac.builder, results[1], offset, "");
1030 result = ac_build_gather_values(&ctx->ac, results, 2);
1031 break;
1032 }
1033
1034 case nir_op_cube_face_index: {
1035 src[0] = ac_to_float(&ctx->ac, src[0]);
1036 LLVMValueRef in[3];
1037 for (unsigned chan = 0; chan < 3; chan++)
1038 in[chan] = ac_llvm_extract_elem(&ctx->ac, src[0], chan);
1039 result = ac_build_intrinsic(&ctx->ac, "llvm.amdgcn.cubeid",
1040 ctx->ac.f32, in, 3, AC_FUNC_ATTR_READNONE);
1041 break;
1042 }
1043
1044 case nir_op_fmin3:
1045 result = emit_intrin_2f_param(&ctx->ac, "llvm.minnum",
1046 ac_to_float_type(&ctx->ac, def_type), src[0], src[1]);
1047 result = emit_intrin_2f_param(&ctx->ac, "llvm.minnum",
1048 ac_to_float_type(&ctx->ac, def_type), result, src[2]);
1049 break;
1050 case nir_op_umin3:
1051 result = ac_build_umin(&ctx->ac, src[0], src[1]);
1052 result = ac_build_umin(&ctx->ac, result, src[2]);
1053 break;
1054 case nir_op_imin3:
1055 result = ac_build_imin(&ctx->ac, src[0], src[1]);
1056 result = ac_build_imin(&ctx->ac, result, src[2]);
1057 break;
1058 case nir_op_fmax3:
1059 result = emit_intrin_2f_param(&ctx->ac, "llvm.maxnum",
1060 ac_to_float_type(&ctx->ac, def_type), src[0], src[1]);
1061 result = emit_intrin_2f_param(&ctx->ac, "llvm.maxnum",
1062 ac_to_float_type(&ctx->ac, def_type), result, src[2]);
1063 break;
1064 case nir_op_umax3:
1065 result = ac_build_umax(&ctx->ac, src[0], src[1]);
1066 result = ac_build_umax(&ctx->ac, result, src[2]);
1067 break;
1068 case nir_op_imax3:
1069 result = ac_build_imax(&ctx->ac, src[0], src[1]);
1070 result = ac_build_imax(&ctx->ac, result, src[2]);
1071 break;
1072 case nir_op_fmed3: {
1073 src[0] = ac_to_float(&ctx->ac, src[0]);
1074 src[1] = ac_to_float(&ctx->ac, src[1]);
1075 src[2] = ac_to_float(&ctx->ac, src[2]);
1076 result = ac_build_fmed3(&ctx->ac, src[0], src[1], src[2],
1077 instr->dest.dest.ssa.bit_size);
1078 break;
1079 }
1080 case nir_op_imed3: {
1081 LLVMValueRef tmp1 = ac_build_imin(&ctx->ac, src[0], src[1]);
1082 LLVMValueRef tmp2 = ac_build_imax(&ctx->ac, src[0], src[1]);
1083 tmp2 = ac_build_imin(&ctx->ac, tmp2, src[2]);
1084 result = ac_build_imax(&ctx->ac, tmp1, tmp2);
1085 break;
1086 }
1087 case nir_op_umed3: {
1088 LLVMValueRef tmp1 = ac_build_umin(&ctx->ac, src[0], src[1]);
1089 LLVMValueRef tmp2 = ac_build_umax(&ctx->ac, src[0], src[1]);
1090 tmp2 = ac_build_umin(&ctx->ac, tmp2, src[2]);
1091 result = ac_build_umax(&ctx->ac, tmp1, tmp2);
1092 break;
1093 }
1094
1095 default:
1096 fprintf(stderr, "Unknown NIR alu instr: ");
1097 nir_print_instr(&instr->instr, stderr);
1098 fprintf(stderr, "\n");
1099 abort();
1100 }
1101
1102 if (result) {
1103 assert(instr->dest.dest.is_ssa);
1104 result = ac_to_integer_or_pointer(&ctx->ac, result);
1105 ctx->ssa_defs[instr->dest.dest.ssa.index] = result;
1106 }
1107 }
1108
1109 static void visit_load_const(struct ac_nir_context *ctx,
1110 const nir_load_const_instr *instr)
1111 {
1112 LLVMValueRef values[4], value = NULL;
1113 LLVMTypeRef element_type =
1114 LLVMIntTypeInContext(ctx->ac.context, instr->def.bit_size);
1115
1116 for (unsigned i = 0; i < instr->def.num_components; ++i) {
1117 switch (instr->def.bit_size) {
1118 case 8:
1119 values[i] = LLVMConstInt(element_type,
1120 instr->value[i].u8, false);
1121 break;
1122 case 16:
1123 values[i] = LLVMConstInt(element_type,
1124 instr->value[i].u16, false);
1125 break;
1126 case 32:
1127 values[i] = LLVMConstInt(element_type,
1128 instr->value[i].u32, false);
1129 break;
1130 case 64:
1131 values[i] = LLVMConstInt(element_type,
1132 instr->value[i].u64, false);
1133 break;
1134 default:
1135 fprintf(stderr,
1136 "unsupported nir load_const bit_size: %d\n",
1137 instr->def.bit_size);
1138 abort();
1139 }
1140 }
1141 if (instr->def.num_components > 1) {
1142 value = LLVMConstVector(values, instr->def.num_components);
1143 } else
1144 value = values[0];
1145
1146 ctx->ssa_defs[instr->def.index] = value;
1147 }
1148
1149 static LLVMValueRef
1150 get_buffer_size(struct ac_nir_context *ctx, LLVMValueRef descriptor, bool in_elements)
1151 {
1152 LLVMValueRef size =
1153 LLVMBuildExtractElement(ctx->ac.builder, descriptor,
1154 LLVMConstInt(ctx->ac.i32, 2, false), "");
1155
1156 /* GFX8 only */
1157 if (ctx->ac.chip_class == GFX8 && in_elements) {
1158 /* On GFX8, the descriptor contains the size in bytes,
1159 * but TXQ must return the size in elements.
1160 * The stride is always non-zero for resources using TXQ.
1161 */
1162 LLVMValueRef stride =
1163 LLVMBuildExtractElement(ctx->ac.builder, descriptor,
1164 ctx->ac.i32_1, "");
1165 stride = LLVMBuildLShr(ctx->ac.builder, stride,
1166 LLVMConstInt(ctx->ac.i32, 16, false), "");
1167 stride = LLVMBuildAnd(ctx->ac.builder, stride,
1168 LLVMConstInt(ctx->ac.i32, 0x3fff, false), "");
1169
1170 size = LLVMBuildUDiv(ctx->ac.builder, size, stride, "");
1171 }
1172 return size;
1173 }
1174
1175 static LLVMValueRef lower_gather4_integer(struct ac_llvm_context *ctx,
1176 nir_variable *var,
1177 struct ac_image_args *args,
1178 const nir_tex_instr *instr)
1179 {
1180 const struct glsl_type *type = glsl_without_array(var->type);
1181 enum glsl_base_type stype = glsl_get_sampler_result_type(type);
1182 LLVMValueRef half_texel[2];
1183 LLVMValueRef compare_cube_wa = NULL;
1184 LLVMValueRef result;
1185
1186 //TODO Rect
1187 {
1188 struct ac_image_args txq_args = { 0 };
1189
1190 txq_args.dim = get_ac_sampler_dim(ctx, instr->sampler_dim, instr->is_array);
1191 txq_args.opcode = ac_image_get_resinfo;
1192 txq_args.dmask = 0xf;
1193 txq_args.lod = ctx->i32_0;
1194 txq_args.resource = args->resource;
1195 txq_args.attributes = AC_FUNC_ATTR_READNONE;
1196 LLVMValueRef size = ac_build_image_opcode(ctx, &txq_args);
1197
1198 for (unsigned c = 0; c < 2; c++) {
1199 half_texel[c] = LLVMBuildExtractElement(ctx->builder, size,
1200 LLVMConstInt(ctx->i32, c, false), "");
1201 half_texel[c] = LLVMBuildUIToFP(ctx->builder, half_texel[c], ctx->f32, "");
1202 half_texel[c] = ac_build_fdiv(ctx, ctx->f32_1, half_texel[c]);
1203 half_texel[c] = LLVMBuildFMul(ctx->builder, half_texel[c],
1204 LLVMConstReal(ctx->f32, -0.5), "");
1205 }
1206 }
1207
1208 LLVMValueRef orig_coords[2] = { args->coords[0], args->coords[1] };
1209
1210 for (unsigned c = 0; c < 2; c++) {
1211 LLVMValueRef tmp;
1212 tmp = LLVMBuildBitCast(ctx->builder, args->coords[c], ctx->f32, "");
1213 args->coords[c] = LLVMBuildFAdd(ctx->builder, tmp, half_texel[c], "");
1214 }
1215
1216 /*
1217 * Apparantly cube has issue with integer types that the workaround doesn't solve,
1218 * so this tests if the format is 8_8_8_8 and an integer type do an alternate
1219 * workaround by sampling using a scaled type and converting.
1220 * This is taken from amdgpu-pro shaders.
1221 */
1222 /* NOTE this produces some ugly code compared to amdgpu-pro,
1223 * LLVM ends up dumping SGPRs into VGPRs to deal with the compare/select,
1224 * and then reads them back. -pro generates two selects,
1225 * one s_cmp for the descriptor rewriting
1226 * one v_cmp for the coordinate and result changes.
1227 */
1228 if (instr->sampler_dim == GLSL_SAMPLER_DIM_CUBE) {
1229 LLVMValueRef tmp, tmp2;
1230
1231 /* workaround 8/8/8/8 uint/sint cube gather bug */
1232 /* first detect it then change to a scaled read and f2i */
1233 tmp = LLVMBuildExtractElement(ctx->builder, args->resource, ctx->i32_1, "");
1234 tmp2 = tmp;
1235
1236 /* extract the DATA_FORMAT */
1237 tmp = ac_build_bfe(ctx, tmp, LLVMConstInt(ctx->i32, 20, false),
1238 LLVMConstInt(ctx->i32, 6, false), false);
1239
1240 /* is the DATA_FORMAT == 8_8_8_8 */
1241 compare_cube_wa = LLVMBuildICmp(ctx->builder, LLVMIntEQ, tmp, LLVMConstInt(ctx->i32, V_008F14_IMG_DATA_FORMAT_8_8_8_8, false), "");
1242
1243 if (stype == GLSL_TYPE_UINT)
1244 /* Create a NUM FORMAT - 0x2 or 0x4 - USCALED or UINT */
1245 tmp = LLVMBuildSelect(ctx->builder, compare_cube_wa, LLVMConstInt(ctx->i32, 0x8000000, false),
1246 LLVMConstInt(ctx->i32, 0x10000000, false), "");
1247 else
1248 /* Create a NUM FORMAT - 0x3 or 0x5 - SSCALED or SINT */
1249 tmp = LLVMBuildSelect(ctx->builder, compare_cube_wa, LLVMConstInt(ctx->i32, 0xc000000, false),
1250 LLVMConstInt(ctx->i32, 0x14000000, false), "");
1251
1252 /* replace the NUM FORMAT in the descriptor */
1253 tmp2 = LLVMBuildAnd(ctx->builder, tmp2, LLVMConstInt(ctx->i32, C_008F14_NUM_FORMAT, false), "");
1254 tmp2 = LLVMBuildOr(ctx->builder, tmp2, tmp, "");
1255
1256 args->resource = LLVMBuildInsertElement(ctx->builder, args->resource, tmp2, ctx->i32_1, "");
1257
1258 /* don't modify the coordinates for this case */
1259 for (unsigned c = 0; c < 2; ++c)
1260 args->coords[c] = LLVMBuildSelect(
1261 ctx->builder, compare_cube_wa,
1262 orig_coords[c], args->coords[c], "");
1263 }
1264
1265 args->attributes = AC_FUNC_ATTR_READNONE;
1266 result = ac_build_image_opcode(ctx, args);
1267
1268 if (instr->sampler_dim == GLSL_SAMPLER_DIM_CUBE) {
1269 LLVMValueRef tmp, tmp2;
1270
1271 /* if the cube workaround is in place, f2i the result. */
1272 for (unsigned c = 0; c < 4; c++) {
1273 tmp = LLVMBuildExtractElement(ctx->builder, result, LLVMConstInt(ctx->i32, c, false), "");
1274 if (stype == GLSL_TYPE_UINT)
1275 tmp2 = LLVMBuildFPToUI(ctx->builder, tmp, ctx->i32, "");
1276 else
1277 tmp2 = LLVMBuildFPToSI(ctx->builder, tmp, ctx->i32, "");
1278 tmp = LLVMBuildBitCast(ctx->builder, tmp, ctx->i32, "");
1279 tmp2 = LLVMBuildBitCast(ctx->builder, tmp2, ctx->i32, "");
1280 tmp = LLVMBuildSelect(ctx->builder, compare_cube_wa, tmp2, tmp, "");
1281 tmp = LLVMBuildBitCast(ctx->builder, tmp, ctx->f32, "");
1282 result = LLVMBuildInsertElement(ctx->builder, result, tmp, LLVMConstInt(ctx->i32, c, false), "");
1283 }
1284 }
1285 return result;
1286 }
1287
1288 static nir_deref_instr *get_tex_texture_deref(const nir_tex_instr *instr)
1289 {
1290 nir_deref_instr *texture_deref_instr = NULL;
1291
1292 for (unsigned i = 0; i < instr->num_srcs; i++) {
1293 switch (instr->src[i].src_type) {
1294 case nir_tex_src_texture_deref:
1295 texture_deref_instr = nir_src_as_deref(instr->src[i].src);
1296 break;
1297 default:
1298 break;
1299 }
1300 }
1301 return texture_deref_instr;
1302 }
1303
1304 static LLVMValueRef build_tex_intrinsic(struct ac_nir_context *ctx,
1305 const nir_tex_instr *instr,
1306 struct ac_image_args *args)
1307 {
1308 if (instr->sampler_dim == GLSL_SAMPLER_DIM_BUF) {
1309 unsigned mask = nir_ssa_def_components_read(&instr->dest.ssa);
1310
1311 if (ctx->abi->gfx9_stride_size_workaround) {
1312 return ac_build_buffer_load_format_gfx9_safe(&ctx->ac,
1313 args->resource,
1314 args->coords[0],
1315 ctx->ac.i32_0,
1316 util_last_bit(mask),
1317 0, true);
1318 } else {
1319 return ac_build_buffer_load_format(&ctx->ac,
1320 args->resource,
1321 args->coords[0],
1322 ctx->ac.i32_0,
1323 util_last_bit(mask),
1324 0, true);
1325 }
1326 }
1327
1328 args->opcode = ac_image_sample;
1329
1330 switch (instr->op) {
1331 case nir_texop_txf:
1332 case nir_texop_txf_ms:
1333 case nir_texop_samples_identical:
1334 args->opcode = args->level_zero ||
1335 instr->sampler_dim == GLSL_SAMPLER_DIM_MS ?
1336 ac_image_load : ac_image_load_mip;
1337 args->level_zero = false;
1338 break;
1339 case nir_texop_txs:
1340 case nir_texop_query_levels:
1341 args->opcode = ac_image_get_resinfo;
1342 if (!args->lod)
1343 args->lod = ctx->ac.i32_0;
1344 args->level_zero = false;
1345 break;
1346 case nir_texop_tex:
1347 if (ctx->stage != MESA_SHADER_FRAGMENT) {
1348 assert(!args->lod);
1349 args->level_zero = true;
1350 }
1351 break;
1352 case nir_texop_tg4:
1353 args->opcode = ac_image_gather4;
1354 args->level_zero = true;
1355 break;
1356 case nir_texop_lod:
1357 args->opcode = ac_image_get_lod;
1358 break;
1359 default:
1360 break;
1361 }
1362
1363 if (instr->op == nir_texop_tg4 && ctx->ac.chip_class <= GFX8) {
1364 nir_deref_instr *texture_deref_instr = get_tex_texture_deref(instr);
1365 nir_variable *var = nir_deref_instr_get_variable(texture_deref_instr);
1366 const struct glsl_type *type = glsl_without_array(var->type);
1367 enum glsl_base_type stype = glsl_get_sampler_result_type(type);
1368 if (stype == GLSL_TYPE_UINT || stype == GLSL_TYPE_INT) {
1369 return lower_gather4_integer(&ctx->ac, var, args, instr);
1370 }
1371 }
1372
1373 /* Fixup for GFX9 which allocates 1D textures as 2D. */
1374 if (instr->op == nir_texop_lod && ctx->ac.chip_class == GFX9) {
1375 if ((args->dim == ac_image_2darray ||
1376 args->dim == ac_image_2d) && !args->coords[1]) {
1377 args->coords[1] = ctx->ac.i32_0;
1378 }
1379 }
1380
1381 args->attributes = AC_FUNC_ATTR_READNONE;
1382 bool cs_derivs = ctx->stage == MESA_SHADER_COMPUTE &&
1383 ctx->info->cs.derivative_group != DERIVATIVE_GROUP_NONE;
1384 if (ctx->stage == MESA_SHADER_FRAGMENT || cs_derivs) {
1385 /* Prevent texture instructions with implicit derivatives from being
1386 * sinked into branches. */
1387 switch (instr->op) {
1388 case nir_texop_tex:
1389 case nir_texop_txb:
1390 case nir_texop_lod:
1391 args->attributes |= AC_FUNC_ATTR_CONVERGENT;
1392 break;
1393 default:
1394 break;
1395 }
1396 }
1397
1398 return ac_build_image_opcode(&ctx->ac, args);
1399 }
1400
1401 static LLVMValueRef visit_vulkan_resource_reindex(struct ac_nir_context *ctx,
1402 nir_intrinsic_instr *instr)
1403 {
1404 LLVMValueRef ptr = get_src(ctx, instr->src[0]);
1405 LLVMValueRef index = get_src(ctx, instr->src[1]);
1406
1407 LLVMValueRef result = LLVMBuildGEP(ctx->ac.builder, ptr, &index, 1, "");
1408 LLVMSetMetadata(result, ctx->ac.uniform_md_kind, ctx->ac.empty_md);
1409 return result;
1410 }
1411
1412 static LLVMValueRef visit_load_push_constant(struct ac_nir_context *ctx,
1413 nir_intrinsic_instr *instr)
1414 {
1415 LLVMValueRef ptr, addr;
1416 LLVMValueRef src0 = get_src(ctx, instr->src[0]);
1417 unsigned index = nir_intrinsic_base(instr);
1418
1419 addr = LLVMConstInt(ctx->ac.i32, index, 0);
1420 addr = LLVMBuildAdd(ctx->ac.builder, addr, src0, "");
1421
1422 /* Load constant values from user SGPRS when possible, otherwise
1423 * fallback to the default path that loads directly from memory.
1424 */
1425 if (LLVMIsConstant(src0) &&
1426 instr->dest.ssa.bit_size == 32) {
1427 unsigned count = instr->dest.ssa.num_components;
1428 unsigned offset = index;
1429
1430 offset += LLVMConstIntGetZExtValue(src0);
1431 offset /= 4;
1432
1433 offset -= ctx->abi->base_inline_push_consts;
1434
1435 if (offset + count <= ctx->abi->num_inline_push_consts) {
1436 return ac_build_gather_values(&ctx->ac,
1437 ctx->abi->inline_push_consts + offset,
1438 count);
1439 }
1440 }
1441
1442 ptr = LLVMBuildGEP(ctx->ac.builder, ctx->abi->push_constants, &addr, 1, "");
1443
1444 if (instr->dest.ssa.bit_size == 8) {
1445 unsigned load_dwords = instr->dest.ssa.num_components > 1 ? 2 : 1;
1446 LLVMTypeRef vec_type = LLVMVectorType(LLVMInt8TypeInContext(ctx->ac.context), 4 * load_dwords);
1447 ptr = ac_cast_ptr(&ctx->ac, ptr, vec_type);
1448 LLVMValueRef res = LLVMBuildLoad(ctx->ac.builder, ptr, "");
1449
1450 LLVMValueRef params[3];
1451 if (load_dwords > 1) {
1452 LLVMValueRef res_vec = LLVMBuildBitCast(ctx->ac.builder, res, LLVMVectorType(ctx->ac.i32, 2), "");
1453 params[0] = LLVMBuildExtractElement(ctx->ac.builder, res_vec, LLVMConstInt(ctx->ac.i32, 1, false), "");
1454 params[1] = LLVMBuildExtractElement(ctx->ac.builder, res_vec, LLVMConstInt(ctx->ac.i32, 0, false), "");
1455 } else {
1456 res = LLVMBuildBitCast(ctx->ac.builder, res, ctx->ac.i32, "");
1457 params[0] = ctx->ac.i32_0;
1458 params[1] = res;
1459 }
1460 params[2] = addr;
1461 res = ac_build_intrinsic(&ctx->ac, "llvm.amdgcn.alignbyte", ctx->ac.i32, params, 3, 0);
1462
1463 res = LLVMBuildTrunc(ctx->ac.builder, res, LLVMIntTypeInContext(ctx->ac.context, instr->dest.ssa.num_components * 8), "");
1464 if (instr->dest.ssa.num_components > 1)
1465 res = LLVMBuildBitCast(ctx->ac.builder, res, LLVMVectorType(LLVMInt8TypeInContext(ctx->ac.context), instr->dest.ssa.num_components), "");
1466 return res;
1467 } else if (instr->dest.ssa.bit_size == 16) {
1468 unsigned load_dwords = instr->dest.ssa.num_components / 2 + 1;
1469 LLVMTypeRef vec_type = LLVMVectorType(LLVMInt16TypeInContext(ctx->ac.context), 2 * load_dwords);
1470 ptr = ac_cast_ptr(&ctx->ac, ptr, vec_type);
1471 LLVMValueRef res = LLVMBuildLoad(ctx->ac.builder, ptr, "");
1472 res = LLVMBuildBitCast(ctx->ac.builder, res, vec_type, "");
1473 LLVMValueRef cond = LLVMBuildLShr(ctx->ac.builder, addr, ctx->ac.i32_1, "");
1474 cond = LLVMBuildTrunc(ctx->ac.builder, cond, ctx->ac.i1, "");
1475 LLVMValueRef mask[] = { LLVMConstInt(ctx->ac.i32, 0, false), LLVMConstInt(ctx->ac.i32, 1, false),
1476 LLVMConstInt(ctx->ac.i32, 2, false), LLVMConstInt(ctx->ac.i32, 3, false),
1477 LLVMConstInt(ctx->ac.i32, 4, false)};
1478 LLVMValueRef swizzle_aligned = LLVMConstVector(&mask[0], instr->dest.ssa.num_components);
1479 LLVMValueRef swizzle_unaligned = LLVMConstVector(&mask[1], instr->dest.ssa.num_components);
1480 LLVMValueRef shuffle_aligned = LLVMBuildShuffleVector(ctx->ac.builder, res, res, swizzle_aligned, "");
1481 LLVMValueRef shuffle_unaligned = LLVMBuildShuffleVector(ctx->ac.builder, res, res, swizzle_unaligned, "");
1482 res = LLVMBuildSelect(ctx->ac.builder, cond, shuffle_unaligned, shuffle_aligned, "");
1483 return LLVMBuildBitCast(ctx->ac.builder, res, get_def_type(ctx, &instr->dest.ssa), "");
1484 }
1485
1486 ptr = ac_cast_ptr(&ctx->ac, ptr, get_def_type(ctx, &instr->dest.ssa));
1487
1488 return LLVMBuildLoad(ctx->ac.builder, ptr, "");
1489 }
1490
1491 static LLVMValueRef visit_get_buffer_size(struct ac_nir_context *ctx,
1492 const nir_intrinsic_instr *instr)
1493 {
1494 LLVMValueRef index = get_src(ctx, instr->src[0]);
1495
1496 return get_buffer_size(ctx, ctx->abi->load_ssbo(ctx->abi, index, false), false);
1497 }
1498
1499 static uint32_t widen_mask(uint32_t mask, unsigned multiplier)
1500 {
1501 uint32_t new_mask = 0;
1502 for(unsigned i = 0; i < 32 && (1u << i) <= mask; ++i)
1503 if (mask & (1u << i))
1504 new_mask |= ((1u << multiplier) - 1u) << (i * multiplier);
1505 return new_mask;
1506 }
1507
1508 static LLVMValueRef extract_vector_range(struct ac_llvm_context *ctx, LLVMValueRef src,
1509 unsigned start, unsigned count)
1510 {
1511 LLVMValueRef mask[] = {
1512 ctx->i32_0, ctx->i32_1,
1513 LLVMConstInt(ctx->i32, 2, false), LLVMConstInt(ctx->i32, 3, false) };
1514
1515 unsigned src_elements = ac_get_llvm_num_components(src);
1516
1517 if (count == src_elements) {
1518 assert(start == 0);
1519 return src;
1520 } else if (count == 1) {
1521 assert(start < src_elements);
1522 return LLVMBuildExtractElement(ctx->builder, src, mask[start], "");
1523 } else {
1524 assert(start + count <= src_elements);
1525 assert(count <= 4);
1526 LLVMValueRef swizzle = LLVMConstVector(&mask[start], count);
1527 return LLVMBuildShuffleVector(ctx->builder, src, src, swizzle, "");
1528 }
1529 }
1530
1531 static unsigned get_cache_policy(struct ac_nir_context *ctx,
1532 enum gl_access_qualifier access,
1533 bool may_store_unaligned,
1534 bool writeonly_memory)
1535 {
1536 unsigned cache_policy = 0;
1537
1538 /* GFX6 has a TC L1 bug causing corruption of 8bit/16bit stores. All
1539 * store opcodes not aligned to a dword are affected. The only way to
1540 * get unaligned stores is through shader images.
1541 */
1542 if (((may_store_unaligned && ctx->ac.chip_class == GFX6) ||
1543 /* If this is write-only, don't keep data in L1 to prevent
1544 * evicting L1 cache lines that may be needed by other
1545 * instructions.
1546 */
1547 writeonly_memory ||
1548 access & (ACCESS_COHERENT | ACCESS_VOLATILE))) {
1549 cache_policy |= ac_glc;
1550 }
1551
1552 return cache_policy;
1553 }
1554
1555 static void visit_store_ssbo(struct ac_nir_context *ctx,
1556 nir_intrinsic_instr *instr)
1557 {
1558 LLVMValueRef src_data = get_src(ctx, instr->src[0]);
1559 int elem_size_bytes = ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src_data)) / 8;
1560 unsigned writemask = nir_intrinsic_write_mask(instr);
1561 enum gl_access_qualifier access = nir_intrinsic_access(instr);
1562 bool writeonly_memory = access & ACCESS_NON_READABLE;
1563 unsigned cache_policy = get_cache_policy(ctx, access, false, writeonly_memory);
1564
1565 LLVMValueRef rsrc = ctx->abi->load_ssbo(ctx->abi,
1566 get_src(ctx, instr->src[1]), true);
1567 LLVMValueRef base_data = src_data;
1568 base_data = ac_trim_vector(&ctx->ac, base_data, instr->num_components);
1569 LLVMValueRef base_offset = get_src(ctx, instr->src[2]);
1570
1571 while (writemask) {
1572 int start, count;
1573 LLVMValueRef data, offset;
1574 LLVMTypeRef data_type;
1575
1576 u_bit_scan_consecutive_range(&writemask, &start, &count);
1577
1578 /* Due to an LLVM limitation with LLVM < 9, split 3-element
1579 * writes into a 2-element and a 1-element write. */
1580 if (count == 3 &&
1581 (elem_size_bytes != 4 || !ac_has_vec3_support(ctx->ac.chip_class, false))) {
1582 writemask |= 1 << (start + 2);
1583 count = 2;
1584 }
1585 int num_bytes = count * elem_size_bytes; /* count in bytes */
1586
1587 /* we can only store 4 DWords at the same time.
1588 * can only happen for 64 Bit vectors. */
1589 if (num_bytes > 16) {
1590 writemask |= ((1u << (count - 2)) - 1u) << (start + 2);
1591 count = 2;
1592 num_bytes = 16;
1593 }
1594
1595 /* check alignment of 16 Bit stores */
1596 if (elem_size_bytes == 2 && num_bytes > 2 && (start % 2) == 1) {
1597 writemask |= ((1u << (count - 1)) - 1u) << (start + 1);
1598 count = 1;
1599 num_bytes = 2;
1600 }
1601 data = extract_vector_range(&ctx->ac, base_data, start, count);
1602
1603 offset = LLVMBuildAdd(ctx->ac.builder, base_offset,
1604 LLVMConstInt(ctx->ac.i32, start * elem_size_bytes, false), "");
1605
1606 if (num_bytes == 1) {
1607 ac_build_tbuffer_store_byte(&ctx->ac, rsrc, data,
1608 offset, ctx->ac.i32_0,
1609 cache_policy);
1610 } else if (num_bytes == 2) {
1611 ac_build_tbuffer_store_short(&ctx->ac, rsrc, data,
1612 offset, ctx->ac.i32_0,
1613 cache_policy);
1614 } else {
1615 int num_channels = num_bytes / 4;
1616
1617 switch (num_bytes) {
1618 case 16: /* v4f32 */
1619 data_type = ctx->ac.v4f32;
1620 break;
1621 case 12: /* v3f32 */
1622 data_type = ctx->ac.v3f32;
1623 break;
1624 case 8: /* v2f32 */
1625 data_type = ctx->ac.v2f32;
1626 break;
1627 case 4: /* f32 */
1628 data_type = ctx->ac.f32;
1629 break;
1630 default:
1631 unreachable("Malformed vector store.");
1632 }
1633 data = LLVMBuildBitCast(ctx->ac.builder, data, data_type, "");
1634
1635 ac_build_buffer_store_dword(&ctx->ac, rsrc, data,
1636 num_channels, offset,
1637 ctx->ac.i32_0, 0,
1638 cache_policy, false);
1639 }
1640 }
1641 }
1642
1643 static LLVMValueRef emit_ssbo_comp_swap_64(struct ac_nir_context *ctx,
1644 LLVMValueRef descriptor,
1645 LLVMValueRef offset,
1646 LLVMValueRef compare,
1647 LLVMValueRef exchange)
1648 {
1649 LLVMBasicBlockRef start_block = NULL, then_block = NULL;
1650 if (ctx->abi->robust_buffer_access) {
1651 LLVMValueRef size = ac_llvm_extract_elem(&ctx->ac, descriptor, 2);
1652
1653 LLVMValueRef cond = LLVMBuildICmp(ctx->ac.builder, LLVMIntULT, offset, size, "");
1654 start_block = LLVMGetInsertBlock(ctx->ac.builder);
1655
1656 ac_build_ifcc(&ctx->ac, cond, -1);
1657
1658 then_block = LLVMGetInsertBlock(ctx->ac.builder);
1659 }
1660
1661 LLVMValueRef ptr_parts[2] = {
1662 ac_llvm_extract_elem(&ctx->ac, descriptor, 0),
1663 LLVMBuildAnd(ctx->ac.builder,
1664 ac_llvm_extract_elem(&ctx->ac, descriptor, 1),
1665 LLVMConstInt(ctx->ac.i32, 65535, 0), "")
1666 };
1667
1668 ptr_parts[1] = LLVMBuildTrunc(ctx->ac.builder, ptr_parts[1], ctx->ac.i16, "");
1669 ptr_parts[1] = LLVMBuildSExt(ctx->ac.builder, ptr_parts[1], ctx->ac.i32, "");
1670
1671 offset = LLVMBuildZExt(ctx->ac.builder, offset, ctx->ac.i64, "");
1672
1673 LLVMValueRef ptr = ac_build_gather_values(&ctx->ac, ptr_parts, 2);
1674 ptr = LLVMBuildBitCast(ctx->ac.builder, ptr, ctx->ac.i64, "");
1675 ptr = LLVMBuildAdd(ctx->ac.builder, ptr, offset, "");
1676 ptr = LLVMBuildIntToPtr(ctx->ac.builder, ptr, LLVMPointerType(ctx->ac.i64, AC_ADDR_SPACE_GLOBAL), "");
1677
1678 LLVMValueRef result = ac_build_atomic_cmp_xchg(&ctx->ac, ptr, compare, exchange, "singlethread-one-as");
1679 result = LLVMBuildExtractValue(ctx->ac.builder, result, 0, "");
1680
1681 if (ctx->abi->robust_buffer_access) {
1682 ac_build_endif(&ctx->ac, -1);
1683
1684 LLVMBasicBlockRef incoming_blocks[2] = {
1685 start_block,
1686 then_block,
1687 };
1688
1689 LLVMValueRef incoming_values[2] = {
1690 LLVMConstInt(ctx->ac.i64, 0, 0),
1691 result,
1692 };
1693 LLVMValueRef ret = LLVMBuildPhi(ctx->ac.builder, ctx->ac.i64, "");
1694 LLVMAddIncoming(ret, incoming_values, incoming_blocks, 2);
1695 return ret;
1696 } else {
1697 return result;
1698 }
1699 }
1700
1701 static LLVMValueRef visit_atomic_ssbo(struct ac_nir_context *ctx,
1702 const nir_intrinsic_instr *instr)
1703 {
1704 LLVMTypeRef return_type = LLVMTypeOf(get_src(ctx, instr->src[2]));
1705 const char *op;
1706 char name[64], type[8];
1707 LLVMValueRef params[6], descriptor;
1708 int arg_count = 0;
1709
1710 switch (instr->intrinsic) {
1711 case nir_intrinsic_ssbo_atomic_add:
1712 op = "add";
1713 break;
1714 case nir_intrinsic_ssbo_atomic_imin:
1715 op = "smin";
1716 break;
1717 case nir_intrinsic_ssbo_atomic_umin:
1718 op = "umin";
1719 break;
1720 case nir_intrinsic_ssbo_atomic_imax:
1721 op = "smax";
1722 break;
1723 case nir_intrinsic_ssbo_atomic_umax:
1724 op = "umax";
1725 break;
1726 case nir_intrinsic_ssbo_atomic_and:
1727 op = "and";
1728 break;
1729 case nir_intrinsic_ssbo_atomic_or:
1730 op = "or";
1731 break;
1732 case nir_intrinsic_ssbo_atomic_xor:
1733 op = "xor";
1734 break;
1735 case nir_intrinsic_ssbo_atomic_exchange:
1736 op = "swap";
1737 break;
1738 case nir_intrinsic_ssbo_atomic_comp_swap:
1739 op = "cmpswap";
1740 break;
1741 default:
1742 abort();
1743 }
1744
1745 descriptor = ctx->abi->load_ssbo(ctx->abi,
1746 get_src(ctx, instr->src[0]),
1747 true);
1748
1749 if (instr->intrinsic == nir_intrinsic_ssbo_atomic_comp_swap &&
1750 return_type == ctx->ac.i64) {
1751 return emit_ssbo_comp_swap_64(ctx, descriptor,
1752 get_src(ctx, instr->src[1]),
1753 get_src(ctx, instr->src[2]),
1754 get_src(ctx, instr->src[3]));
1755 }
1756 if (instr->intrinsic == nir_intrinsic_ssbo_atomic_comp_swap) {
1757 params[arg_count++] = ac_llvm_extract_elem(&ctx->ac, get_src(ctx, instr->src[3]), 0);
1758 }
1759 params[arg_count++] = ac_llvm_extract_elem(&ctx->ac, get_src(ctx, instr->src[2]), 0);
1760 params[arg_count++] = descriptor;
1761
1762 if (HAVE_LLVM >= 0x900) {
1763 /* XXX: The new raw/struct atomic intrinsics are buggy with
1764 * LLVM 8, see r358579.
1765 */
1766 params[arg_count++] = get_src(ctx, instr->src[1]); /* voffset */
1767 params[arg_count++] = ctx->ac.i32_0; /* soffset */
1768 params[arg_count++] = ctx->ac.i32_0; /* slc */
1769
1770 ac_build_type_name_for_intr(return_type, type, sizeof(type));
1771 snprintf(name, sizeof(name),
1772 "llvm.amdgcn.raw.buffer.atomic.%s.%s", op, type);
1773 } else {
1774 params[arg_count++] = ctx->ac.i32_0; /* vindex */
1775 params[arg_count++] = get_src(ctx, instr->src[1]); /* voffset */
1776 params[arg_count++] = ctx->ac.i1false; /* slc */
1777
1778 assert(return_type == ctx->ac.i32);
1779 snprintf(name, sizeof(name),
1780 "llvm.amdgcn.buffer.atomic.%s", op);
1781 }
1782
1783 return ac_build_intrinsic(&ctx->ac, name, return_type, params,
1784 arg_count, 0);
1785 }
1786
1787 static LLVMValueRef visit_load_buffer(struct ac_nir_context *ctx,
1788 const nir_intrinsic_instr *instr)
1789 {
1790 int elem_size_bytes = instr->dest.ssa.bit_size / 8;
1791 int num_components = instr->num_components;
1792 enum gl_access_qualifier access = nir_intrinsic_access(instr);
1793 unsigned cache_policy = get_cache_policy(ctx, access, false, false);
1794
1795 LLVMValueRef offset = get_src(ctx, instr->src[1]);
1796 LLVMValueRef rsrc = ctx->abi->load_ssbo(ctx->abi,
1797 get_src(ctx, instr->src[0]), false);
1798 LLVMValueRef vindex = ctx->ac.i32_0;
1799
1800 LLVMTypeRef def_type = get_def_type(ctx, &instr->dest.ssa);
1801 LLVMTypeRef def_elem_type = num_components > 1 ? LLVMGetElementType(def_type) : def_type;
1802
1803 LLVMValueRef results[4];
1804 for (int i = 0; i < num_components;) {
1805 int num_elems = num_components - i;
1806 if (elem_size_bytes < 4 && nir_intrinsic_align(instr) % 4 != 0)
1807 num_elems = 1;
1808 if (num_elems * elem_size_bytes > 16)
1809 num_elems = 16 / elem_size_bytes;
1810 int load_bytes = num_elems * elem_size_bytes;
1811
1812 LLVMValueRef immoffset = LLVMConstInt(ctx->ac.i32, i * elem_size_bytes, false);
1813
1814 LLVMValueRef ret;
1815
1816 if (load_bytes == 1) {
1817 ret = ac_build_tbuffer_load_byte(&ctx->ac,
1818 rsrc,
1819 offset,
1820 ctx->ac.i32_0,
1821 immoffset,
1822 cache_policy);
1823 } else if (load_bytes == 2) {
1824 ret = ac_build_tbuffer_load_short(&ctx->ac,
1825 rsrc,
1826 offset,
1827 ctx->ac.i32_0,
1828 immoffset,
1829 cache_policy);
1830 } else {
1831 int num_channels = util_next_power_of_two(load_bytes) / 4;
1832 bool can_speculate = access & ACCESS_CAN_REORDER;
1833
1834 ret = ac_build_buffer_load(&ctx->ac, rsrc, num_channels,
1835 vindex, offset, immoffset, 0,
1836 cache_policy, can_speculate, false);
1837 }
1838
1839 LLVMTypeRef byte_vec = LLVMVectorType(ctx->ac.i8, ac_get_type_size(LLVMTypeOf(ret)));
1840 ret = LLVMBuildBitCast(ctx->ac.builder, ret, byte_vec, "");
1841 ret = ac_trim_vector(&ctx->ac, ret, load_bytes);
1842
1843 LLVMTypeRef ret_type = LLVMVectorType(def_elem_type, num_elems);
1844 ret = LLVMBuildBitCast(ctx->ac.builder, ret, ret_type, "");
1845
1846 for (unsigned j = 0; j < num_elems; j++) {
1847 results[i + j] = LLVMBuildExtractElement(ctx->ac.builder, ret, LLVMConstInt(ctx->ac.i32, j, false), "");
1848 }
1849 i += num_elems;
1850 }
1851
1852 return ac_build_gather_values(&ctx->ac, results, num_components);
1853 }
1854
1855 static LLVMValueRef visit_load_ubo_buffer(struct ac_nir_context *ctx,
1856 const nir_intrinsic_instr *instr)
1857 {
1858 LLVMValueRef ret;
1859 LLVMValueRef rsrc = get_src(ctx, instr->src[0]);
1860 LLVMValueRef offset = get_src(ctx, instr->src[1]);
1861 int num_components = instr->num_components;
1862
1863 if (ctx->abi->load_ubo)
1864 rsrc = ctx->abi->load_ubo(ctx->abi, rsrc);
1865
1866 if (instr->dest.ssa.bit_size == 64)
1867 num_components *= 2;
1868
1869 if (instr->dest.ssa.bit_size == 16 || instr->dest.ssa.bit_size == 8) {
1870 unsigned load_bytes = instr->dest.ssa.bit_size / 8;
1871 LLVMValueRef results[num_components];
1872 for (unsigned i = 0; i < num_components; ++i) {
1873 LLVMValueRef immoffset = LLVMConstInt(ctx->ac.i32,
1874 load_bytes * i, 0);
1875
1876 if (load_bytes == 1) {
1877 results[i] = ac_build_tbuffer_load_byte(&ctx->ac,
1878 rsrc,
1879 offset,
1880 ctx->ac.i32_0,
1881 immoffset,
1882 0);
1883 } else {
1884 assert(load_bytes == 2);
1885 results[i] = ac_build_tbuffer_load_short(&ctx->ac,
1886 rsrc,
1887 offset,
1888 ctx->ac.i32_0,
1889 immoffset,
1890 0);
1891 }
1892 }
1893 ret = ac_build_gather_values(&ctx->ac, results, num_components);
1894 } else {
1895 ret = ac_build_buffer_load(&ctx->ac, rsrc, num_components, NULL, offset,
1896 NULL, 0, 0, true, true);
1897
1898 ret = ac_trim_vector(&ctx->ac, ret, num_components);
1899 }
1900
1901 return LLVMBuildBitCast(ctx->ac.builder, ret,
1902 get_def_type(ctx, &instr->dest.ssa), "");
1903 }
1904
1905 static void
1906 get_deref_offset(struct ac_nir_context *ctx, nir_deref_instr *instr,
1907 bool vs_in, unsigned *vertex_index_out,
1908 LLVMValueRef *vertex_index_ref,
1909 unsigned *const_out, LLVMValueRef *indir_out)
1910 {
1911 nir_variable *var = nir_deref_instr_get_variable(instr);
1912 nir_deref_path path;
1913 unsigned idx_lvl = 1;
1914
1915 nir_deref_path_init(&path, instr, NULL);
1916
1917 if (vertex_index_out != NULL || vertex_index_ref != NULL) {
1918 if (vertex_index_ref) {
1919 *vertex_index_ref = get_src(ctx, path.path[idx_lvl]->arr.index);
1920 if (vertex_index_out)
1921 *vertex_index_out = 0;
1922 } else {
1923 *vertex_index_out = nir_src_as_uint(path.path[idx_lvl]->arr.index);
1924 }
1925 ++idx_lvl;
1926 }
1927
1928 uint32_t const_offset = 0;
1929 LLVMValueRef offset = NULL;
1930
1931 if (var->data.compact) {
1932 assert(instr->deref_type == nir_deref_type_array);
1933 const_offset = nir_src_as_uint(instr->arr.index);
1934 goto out;
1935 }
1936
1937 for (; path.path[idx_lvl]; ++idx_lvl) {
1938 const struct glsl_type *parent_type = path.path[idx_lvl - 1]->type;
1939 if (path.path[idx_lvl]->deref_type == nir_deref_type_struct) {
1940 unsigned index = path.path[idx_lvl]->strct.index;
1941
1942 for (unsigned i = 0; i < index; i++) {
1943 const struct glsl_type *ft = glsl_get_struct_field(parent_type, i);
1944 const_offset += glsl_count_attribute_slots(ft, vs_in);
1945 }
1946 } else if(path.path[idx_lvl]->deref_type == nir_deref_type_array) {
1947 unsigned size = glsl_count_attribute_slots(path.path[idx_lvl]->type, vs_in);
1948 LLVMValueRef array_off = LLVMBuildMul(ctx->ac.builder, LLVMConstInt(ctx->ac.i32, size, 0),
1949 get_src(ctx, path.path[idx_lvl]->arr.index), "");
1950 if (offset)
1951 offset = LLVMBuildAdd(ctx->ac.builder, offset, array_off, "");
1952 else
1953 offset = array_off;
1954 } else
1955 unreachable("Uhandled deref type in get_deref_instr_offset");
1956 }
1957
1958 out:
1959 nir_deref_path_finish(&path);
1960
1961 if (const_offset && offset)
1962 offset = LLVMBuildAdd(ctx->ac.builder, offset,
1963 LLVMConstInt(ctx->ac.i32, const_offset, 0),
1964 "");
1965
1966 *const_out = const_offset;
1967 *indir_out = offset;
1968 }
1969
1970 static LLVMValueRef load_tess_varyings(struct ac_nir_context *ctx,
1971 nir_intrinsic_instr *instr,
1972 bool load_inputs)
1973 {
1974 LLVMValueRef result;
1975 LLVMValueRef vertex_index = NULL;
1976 LLVMValueRef indir_index = NULL;
1977 unsigned const_index = 0;
1978
1979 nir_variable *var = nir_deref_instr_get_variable(nir_instr_as_deref(instr->src[0].ssa->parent_instr));
1980
1981 unsigned location = var->data.location;
1982 unsigned driver_location = var->data.driver_location;
1983 const bool is_patch = var->data.patch;
1984 const bool is_compact = var->data.compact;
1985
1986 get_deref_offset(ctx, nir_instr_as_deref(instr->src[0].ssa->parent_instr),
1987 false, NULL, is_patch ? NULL : &vertex_index,
1988 &const_index, &indir_index);
1989
1990 LLVMTypeRef dest_type = get_def_type(ctx, &instr->dest.ssa);
1991
1992 LLVMTypeRef src_component_type;
1993 if (LLVMGetTypeKind(dest_type) == LLVMVectorTypeKind)
1994 src_component_type = LLVMGetElementType(dest_type);
1995 else
1996 src_component_type = dest_type;
1997
1998 result = ctx->abi->load_tess_varyings(ctx->abi, src_component_type,
1999 vertex_index, indir_index,
2000 const_index, location, driver_location,
2001 var->data.location_frac,
2002 instr->num_components,
2003 is_patch, is_compact, load_inputs);
2004 if (instr->dest.ssa.bit_size == 16) {
2005 result = ac_to_integer(&ctx->ac, result);
2006 result = LLVMBuildTrunc(ctx->ac.builder, result, dest_type, "");
2007 }
2008 return LLVMBuildBitCast(ctx->ac.builder, result, dest_type, "");
2009 }
2010
2011 static unsigned
2012 type_scalar_size_bytes(const struct glsl_type *type)
2013 {
2014 assert(glsl_type_is_vector_or_scalar(type) ||
2015 glsl_type_is_matrix(type));
2016 return glsl_type_is_boolean(type) ? 4 : glsl_get_bit_size(type) / 8;
2017 }
2018
2019 static LLVMValueRef visit_load_var(struct ac_nir_context *ctx,
2020 nir_intrinsic_instr *instr)
2021 {
2022 nir_deref_instr *deref = nir_instr_as_deref(instr->src[0].ssa->parent_instr);
2023 nir_variable *var = nir_deref_instr_get_variable(deref);
2024
2025 LLVMValueRef values[8];
2026 int idx = 0;
2027 int ve = instr->dest.ssa.num_components;
2028 unsigned comp = 0;
2029 LLVMValueRef indir_index;
2030 LLVMValueRef ret;
2031 unsigned const_index;
2032 unsigned stride = 4;
2033 int mode = deref->mode;
2034
2035 if (var) {
2036 bool vs_in = ctx->stage == MESA_SHADER_VERTEX &&
2037 var->data.mode == nir_var_shader_in;
2038 idx = var->data.driver_location;
2039 comp = var->data.location_frac;
2040 mode = var->data.mode;
2041
2042 get_deref_offset(ctx, deref, vs_in, NULL, NULL,
2043 &const_index, &indir_index);
2044
2045 if (var->data.compact) {
2046 stride = 1;
2047 const_index += comp;
2048 comp = 0;
2049 }
2050 }
2051
2052 if (instr->dest.ssa.bit_size == 64 &&
2053 (deref->mode == nir_var_shader_in ||
2054 deref->mode == nir_var_shader_out ||
2055 deref->mode == nir_var_function_temp))
2056 ve *= 2;
2057
2058 switch (mode) {
2059 case nir_var_shader_in:
2060 if (ctx->stage == MESA_SHADER_TESS_CTRL ||
2061 ctx->stage == MESA_SHADER_TESS_EVAL) {
2062 return load_tess_varyings(ctx, instr, true);
2063 }
2064
2065 if (ctx->stage == MESA_SHADER_GEOMETRY) {
2066 LLVMTypeRef type = LLVMIntTypeInContext(ctx->ac.context, instr->dest.ssa.bit_size);
2067 LLVMValueRef indir_index;
2068 unsigned const_index, vertex_index;
2069 get_deref_offset(ctx, deref, false, &vertex_index, NULL,
2070 &const_index, &indir_index);
2071
2072 return ctx->abi->load_inputs(ctx->abi, var->data.location,
2073 var->data.driver_location,
2074 var->data.location_frac,
2075 instr->num_components, vertex_index, const_index, type);
2076 }
2077
2078 for (unsigned chan = comp; chan < ve + comp; chan++) {
2079 if (indir_index) {
2080 unsigned count = glsl_count_attribute_slots(
2081 var->type,
2082 ctx->stage == MESA_SHADER_VERTEX);
2083 count -= chan / 4;
2084 LLVMValueRef tmp_vec = ac_build_gather_values_extended(
2085 &ctx->ac, ctx->abi->inputs + idx + chan, count,
2086 stride, false, true);
2087
2088 values[chan] = LLVMBuildExtractElement(ctx->ac.builder,
2089 tmp_vec,
2090 indir_index, "");
2091 } else
2092 values[chan] = ctx->abi->inputs[idx + chan + const_index * stride];
2093 }
2094 break;
2095 case nir_var_function_temp:
2096 for (unsigned chan = 0; chan < ve; chan++) {
2097 if (indir_index) {
2098 unsigned count = glsl_count_attribute_slots(
2099 var->type, false);
2100 count -= chan / 4;
2101 LLVMValueRef tmp_vec = ac_build_gather_values_extended(
2102 &ctx->ac, ctx->locals + idx + chan, count,
2103 stride, true, true);
2104
2105 values[chan] = LLVMBuildExtractElement(ctx->ac.builder,
2106 tmp_vec,
2107 indir_index, "");
2108 } else {
2109 values[chan] = LLVMBuildLoad(ctx->ac.builder, ctx->locals[idx + chan + const_index * stride], "");
2110 }
2111 }
2112 break;
2113 case nir_var_mem_shared: {
2114 LLVMValueRef address = get_src(ctx, instr->src[0]);
2115 LLVMValueRef val = LLVMBuildLoad(ctx->ac.builder, address, "");
2116 return LLVMBuildBitCast(ctx->ac.builder, val,
2117 get_def_type(ctx, &instr->dest.ssa),
2118 "");
2119 }
2120 case nir_var_shader_out:
2121 if (ctx->stage == MESA_SHADER_TESS_CTRL) {
2122 return load_tess_varyings(ctx, instr, false);
2123 }
2124
2125 if (ctx->stage == MESA_SHADER_FRAGMENT &&
2126 var->data.fb_fetch_output &&
2127 ctx->abi->emit_fbfetch)
2128 return ctx->abi->emit_fbfetch(ctx->abi);
2129
2130 for (unsigned chan = comp; chan < ve + comp; chan++) {
2131 if (indir_index) {
2132 unsigned count = glsl_count_attribute_slots(
2133 var->type, false);
2134 count -= chan / 4;
2135 LLVMValueRef tmp_vec = ac_build_gather_values_extended(
2136 &ctx->ac, ctx->abi->outputs + idx + chan, count,
2137 stride, true, true);
2138
2139 values[chan] = LLVMBuildExtractElement(ctx->ac.builder,
2140 tmp_vec,
2141 indir_index, "");
2142 } else {
2143 values[chan] = LLVMBuildLoad(ctx->ac.builder,
2144 ctx->abi->outputs[idx + chan + const_index * stride],
2145 "");
2146 }
2147 }
2148 break;
2149 case nir_var_mem_global: {
2150 LLVMValueRef address = get_src(ctx, instr->src[0]);
2151 unsigned explicit_stride = glsl_get_explicit_stride(deref->type);
2152 unsigned natural_stride = type_scalar_size_bytes(deref->type);
2153 unsigned stride = explicit_stride ? explicit_stride : natural_stride;
2154
2155 LLVMTypeRef result_type = get_def_type(ctx, &instr->dest.ssa);
2156 if (stride != natural_stride) {
2157 LLVMTypeRef ptr_type = LLVMPointerType(LLVMGetElementType(result_type),
2158 LLVMGetPointerAddressSpace(LLVMTypeOf(address)));
2159 address = LLVMBuildBitCast(ctx->ac.builder, address, ptr_type , "");
2160
2161 for (unsigned i = 0; i < instr->dest.ssa.num_components; ++i) {
2162 LLVMValueRef offset = LLVMConstInt(ctx->ac.i32, i * stride / natural_stride, 0);
2163 values[i] = LLVMBuildLoad(ctx->ac.builder,
2164 ac_build_gep_ptr(&ctx->ac, address, offset), "");
2165 }
2166 return ac_build_gather_values(&ctx->ac, values, instr->dest.ssa.num_components);
2167 } else {
2168 LLVMTypeRef ptr_type = LLVMPointerType(result_type,
2169 LLVMGetPointerAddressSpace(LLVMTypeOf(address)));
2170 address = LLVMBuildBitCast(ctx->ac.builder, address, ptr_type , "");
2171 LLVMValueRef val = LLVMBuildLoad(ctx->ac.builder, address, "");
2172 return val;
2173 }
2174 }
2175 default:
2176 unreachable("unhandle variable mode");
2177 }
2178 ret = ac_build_varying_gather_values(&ctx->ac, values, ve, comp);
2179 return LLVMBuildBitCast(ctx->ac.builder, ret, get_def_type(ctx, &instr->dest.ssa), "");
2180 }
2181
2182 static void
2183 visit_store_var(struct ac_nir_context *ctx,
2184 nir_intrinsic_instr *instr)
2185 {
2186 nir_deref_instr *deref = nir_instr_as_deref(instr->src[0].ssa->parent_instr);
2187 nir_variable *var = nir_deref_instr_get_variable(deref);
2188
2189 LLVMValueRef temp_ptr, value;
2190 int idx = 0;
2191 unsigned comp = 0;
2192 LLVMValueRef src = ac_to_float(&ctx->ac, get_src(ctx, instr->src[1]));
2193 int writemask = instr->const_index[0];
2194 LLVMValueRef indir_index;
2195 unsigned const_index;
2196
2197 if (var) {
2198 get_deref_offset(ctx, deref, false,
2199 NULL, NULL, &const_index, &indir_index);
2200 idx = var->data.driver_location;
2201 comp = var->data.location_frac;
2202
2203 if (var->data.compact) {
2204 const_index += comp;
2205 comp = 0;
2206 }
2207 }
2208
2209 if (ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src)) == 64 &&
2210 (deref->mode == nir_var_shader_out ||
2211 deref->mode == nir_var_function_temp)) {
2212
2213 src = LLVMBuildBitCast(ctx->ac.builder, src,
2214 LLVMVectorType(ctx->ac.f32, ac_get_llvm_num_components(src) * 2),
2215 "");
2216
2217 writemask = widen_mask(writemask, 2);
2218 }
2219
2220 writemask = writemask << comp;
2221
2222 switch (deref->mode) {
2223 case nir_var_shader_out:
2224
2225 if (ctx->stage == MESA_SHADER_TESS_CTRL) {
2226 LLVMValueRef vertex_index = NULL;
2227 LLVMValueRef indir_index = NULL;
2228 unsigned const_index = 0;
2229 const bool is_patch = var->data.patch;
2230
2231 get_deref_offset(ctx, deref, false, NULL,
2232 is_patch ? NULL : &vertex_index,
2233 &const_index, &indir_index);
2234
2235 ctx->abi->store_tcs_outputs(ctx->abi, var,
2236 vertex_index, indir_index,
2237 const_index, src, writemask);
2238 return;
2239 }
2240
2241 for (unsigned chan = 0; chan < 8; chan++) {
2242 int stride = 4;
2243 if (!(writemask & (1 << chan)))
2244 continue;
2245
2246 value = ac_llvm_extract_elem(&ctx->ac, src, chan - comp);
2247
2248 if (var->data.compact)
2249 stride = 1;
2250 if (indir_index) {
2251 unsigned count = glsl_count_attribute_slots(
2252 var->type, false);
2253 count -= chan / 4;
2254 LLVMValueRef tmp_vec = ac_build_gather_values_extended(
2255 &ctx->ac, ctx->abi->outputs + idx + chan, count,
2256 stride, true, true);
2257
2258 tmp_vec = LLVMBuildInsertElement(ctx->ac.builder, tmp_vec,
2259 value, indir_index, "");
2260 build_store_values_extended(&ctx->ac, ctx->abi->outputs + idx + chan,
2261 count, stride, tmp_vec);
2262
2263 } else {
2264 temp_ptr = ctx->abi->outputs[idx + chan + const_index * stride];
2265
2266 LLVMBuildStore(ctx->ac.builder, value, temp_ptr);
2267 }
2268 }
2269 break;
2270 case nir_var_function_temp:
2271 for (unsigned chan = 0; chan < 8; chan++) {
2272 if (!(writemask & (1 << chan)))
2273 continue;
2274
2275 value = ac_llvm_extract_elem(&ctx->ac, src, chan);
2276 if (indir_index) {
2277 unsigned count = glsl_count_attribute_slots(
2278 var->type, false);
2279 count -= chan / 4;
2280 LLVMValueRef tmp_vec = ac_build_gather_values_extended(
2281 &ctx->ac, ctx->locals + idx + chan, count,
2282 4, true, true);
2283
2284 tmp_vec = LLVMBuildInsertElement(ctx->ac.builder, tmp_vec,
2285 value, indir_index, "");
2286 build_store_values_extended(&ctx->ac, ctx->locals + idx + chan,
2287 count, 4, tmp_vec);
2288 } else {
2289 temp_ptr = ctx->locals[idx + chan + const_index * 4];
2290
2291 LLVMBuildStore(ctx->ac.builder, value, temp_ptr);
2292 }
2293 }
2294 break;
2295
2296 case nir_var_mem_global:
2297 case nir_var_mem_shared: {
2298 int writemask = instr->const_index[0];
2299 LLVMValueRef address = get_src(ctx, instr->src[0]);
2300 LLVMValueRef val = get_src(ctx, instr->src[1]);
2301
2302 unsigned explicit_stride = glsl_get_explicit_stride(deref->type);
2303 unsigned natural_stride = type_scalar_size_bytes(deref->type);
2304 unsigned stride = explicit_stride ? explicit_stride : natural_stride;
2305
2306 LLVMTypeRef ptr_type = LLVMPointerType(LLVMTypeOf(val),
2307 LLVMGetPointerAddressSpace(LLVMTypeOf(address)));
2308 address = LLVMBuildBitCast(ctx->ac.builder, address, ptr_type , "");
2309
2310 if (writemask == (1u << ac_get_llvm_num_components(val)) - 1 &&
2311 stride == natural_stride) {
2312 LLVMTypeRef ptr_type = LLVMPointerType(LLVMTypeOf(val),
2313 LLVMGetPointerAddressSpace(LLVMTypeOf(address)));
2314 address = LLVMBuildBitCast(ctx->ac.builder, address, ptr_type , "");
2315
2316 val = LLVMBuildBitCast(ctx->ac.builder, val,
2317 LLVMGetElementType(LLVMTypeOf(address)), "");
2318 LLVMBuildStore(ctx->ac.builder, val, address);
2319 } else {
2320 LLVMTypeRef ptr_type = LLVMPointerType(LLVMGetElementType(LLVMTypeOf(val)),
2321 LLVMGetPointerAddressSpace(LLVMTypeOf(address)));
2322 address = LLVMBuildBitCast(ctx->ac.builder, address, ptr_type , "");
2323 for (unsigned chan = 0; chan < 4; chan++) {
2324 if (!(writemask & (1 << chan)))
2325 continue;
2326
2327 LLVMValueRef offset = LLVMConstInt(ctx->ac.i32, chan * stride / natural_stride, 0);
2328
2329 LLVMValueRef ptr = ac_build_gep_ptr(&ctx->ac, address, offset);
2330 LLVMValueRef src = ac_llvm_extract_elem(&ctx->ac, val,
2331 chan);
2332 src = LLVMBuildBitCast(ctx->ac.builder, src,
2333 LLVMGetElementType(LLVMTypeOf(ptr)), "");
2334 LLVMBuildStore(ctx->ac.builder, src, ptr);
2335 }
2336 }
2337 break;
2338 }
2339 default:
2340 abort();
2341 break;
2342 }
2343 }
2344
2345 static int image_type_to_components_count(enum glsl_sampler_dim dim, bool array)
2346 {
2347 switch (dim) {
2348 case GLSL_SAMPLER_DIM_BUF:
2349 return 1;
2350 case GLSL_SAMPLER_DIM_1D:
2351 return array ? 2 : 1;
2352 case GLSL_SAMPLER_DIM_2D:
2353 return array ? 3 : 2;
2354 case GLSL_SAMPLER_DIM_MS:
2355 return array ? 4 : 3;
2356 case GLSL_SAMPLER_DIM_3D:
2357 case GLSL_SAMPLER_DIM_CUBE:
2358 return 3;
2359 case GLSL_SAMPLER_DIM_RECT:
2360 case GLSL_SAMPLER_DIM_SUBPASS:
2361 return 2;
2362 case GLSL_SAMPLER_DIM_SUBPASS_MS:
2363 return 3;
2364 default:
2365 break;
2366 }
2367 return 0;
2368 }
2369
2370 static LLVMValueRef adjust_sample_index_using_fmask(struct ac_llvm_context *ctx,
2371 LLVMValueRef coord_x, LLVMValueRef coord_y,
2372 LLVMValueRef coord_z,
2373 LLVMValueRef sample_index,
2374 LLVMValueRef fmask_desc_ptr)
2375 {
2376 unsigned sample_chan = coord_z ? 3 : 2;
2377 LLVMValueRef addr[4] = {coord_x, coord_y, coord_z};
2378 addr[sample_chan] = sample_index;
2379
2380 ac_apply_fmask_to_sample(ctx, fmask_desc_ptr, addr, coord_z != NULL);
2381 return addr[sample_chan];
2382 }
2383
2384 static nir_deref_instr *get_image_deref(const nir_intrinsic_instr *instr)
2385 {
2386 assert(instr->src[0].is_ssa);
2387 return nir_instr_as_deref(instr->src[0].ssa->parent_instr);
2388 }
2389
2390 static LLVMValueRef get_image_descriptor(struct ac_nir_context *ctx,
2391 const nir_intrinsic_instr *instr,
2392 enum ac_descriptor_type desc_type,
2393 bool write)
2394 {
2395 nir_deref_instr *deref_instr =
2396 instr->src[0].ssa->parent_instr->type == nir_instr_type_deref ?
2397 nir_instr_as_deref(instr->src[0].ssa->parent_instr) : NULL;
2398
2399 return get_sampler_desc(ctx, deref_instr, desc_type, &instr->instr, true, write);
2400 }
2401
2402 static void get_image_coords(struct ac_nir_context *ctx,
2403 const nir_intrinsic_instr *instr,
2404 struct ac_image_args *args,
2405 enum glsl_sampler_dim dim,
2406 bool is_array)
2407 {
2408 LLVMValueRef src0 = get_src(ctx, instr->src[1]);
2409 LLVMValueRef masks[] = {
2410 LLVMConstInt(ctx->ac.i32, 0, false), LLVMConstInt(ctx->ac.i32, 1, false),
2411 LLVMConstInt(ctx->ac.i32, 2, false), LLVMConstInt(ctx->ac.i32, 3, false),
2412 };
2413 LLVMValueRef sample_index = ac_llvm_extract_elem(&ctx->ac, get_src(ctx, instr->src[2]), 0);
2414
2415 int count;
2416 ASSERTED bool add_frag_pos = (dim == GLSL_SAMPLER_DIM_SUBPASS ||
2417 dim == GLSL_SAMPLER_DIM_SUBPASS_MS);
2418 bool is_ms = (dim == GLSL_SAMPLER_DIM_MS ||
2419 dim == GLSL_SAMPLER_DIM_SUBPASS_MS);
2420 bool gfx9_1d = ctx->ac.chip_class == GFX9 && dim == GLSL_SAMPLER_DIM_1D;
2421 assert(!add_frag_pos && "Input attachments should be lowered by this point.");
2422 count = image_type_to_components_count(dim, is_array);
2423
2424 if (is_ms && (instr->intrinsic == nir_intrinsic_image_deref_load ||
2425 instr->intrinsic == nir_intrinsic_bindless_image_load)) {
2426 LLVMValueRef fmask_load_address[3];
2427
2428 fmask_load_address[0] = LLVMBuildExtractElement(ctx->ac.builder, src0, masks[0], "");
2429 fmask_load_address[1] = LLVMBuildExtractElement(ctx->ac.builder, src0, masks[1], "");
2430 if (is_array)
2431 fmask_load_address[2] = LLVMBuildExtractElement(ctx->ac.builder, src0, masks[2], "");
2432 else
2433 fmask_load_address[2] = NULL;
2434
2435 sample_index = adjust_sample_index_using_fmask(&ctx->ac,
2436 fmask_load_address[0],
2437 fmask_load_address[1],
2438 fmask_load_address[2],
2439 sample_index,
2440 get_sampler_desc(ctx, nir_instr_as_deref(instr->src[0].ssa->parent_instr),
2441 AC_DESC_FMASK, &instr->instr, false, false));
2442 }
2443 if (count == 1 && !gfx9_1d) {
2444 if (instr->src[1].ssa->num_components)
2445 args->coords[0] = LLVMBuildExtractElement(ctx->ac.builder, src0, masks[0], "");
2446 else
2447 args->coords[0] = src0;
2448 } else {
2449 int chan;
2450 if (is_ms)
2451 count--;
2452 for (chan = 0; chan < count; ++chan) {
2453 args->coords[chan] = ac_llvm_extract_elem(&ctx->ac, src0, chan);
2454 }
2455
2456 if (gfx9_1d) {
2457 if (is_array) {
2458 args->coords[2] = args->coords[1];
2459 args->coords[1] = ctx->ac.i32_0;
2460 } else
2461 args->coords[1] = ctx->ac.i32_0;
2462 count++;
2463 }
2464
2465 if (is_ms) {
2466 args->coords[count] = sample_index;
2467 count++;
2468 }
2469 }
2470 }
2471
2472 static LLVMValueRef get_image_buffer_descriptor(struct ac_nir_context *ctx,
2473 const nir_intrinsic_instr *instr,
2474 bool write, bool atomic)
2475 {
2476 LLVMValueRef rsrc = get_image_descriptor(ctx, instr, AC_DESC_BUFFER, write);
2477 if (ctx->abi->gfx9_stride_size_workaround ||
2478 (ctx->abi->gfx9_stride_size_workaround_for_atomic && atomic)) {
2479 LLVMValueRef elem_count = LLVMBuildExtractElement(ctx->ac.builder, rsrc, LLVMConstInt(ctx->ac.i32, 2, 0), "");
2480 LLVMValueRef stride = LLVMBuildExtractElement(ctx->ac.builder, rsrc, LLVMConstInt(ctx->ac.i32, 1, 0), "");
2481 stride = LLVMBuildLShr(ctx->ac.builder, stride, LLVMConstInt(ctx->ac.i32, 16, 0), "");
2482
2483 LLVMValueRef new_elem_count = LLVMBuildSelect(ctx->ac.builder,
2484 LLVMBuildICmp(ctx->ac.builder, LLVMIntUGT, elem_count, stride, ""),
2485 elem_count, stride, "");
2486
2487 rsrc = LLVMBuildInsertElement(ctx->ac.builder, rsrc, new_elem_count,
2488 LLVMConstInt(ctx->ac.i32, 2, 0), "");
2489 }
2490 return rsrc;
2491 }
2492
2493 static LLVMValueRef visit_image_load(struct ac_nir_context *ctx,
2494 const nir_intrinsic_instr *instr,
2495 bool bindless)
2496 {
2497 LLVMValueRef res;
2498
2499 enum glsl_sampler_dim dim;
2500 enum gl_access_qualifier access;
2501 bool is_array;
2502 if (bindless) {
2503 dim = nir_intrinsic_image_dim(instr);
2504 access = nir_intrinsic_access(instr);
2505 is_array = nir_intrinsic_image_array(instr);
2506 } else {
2507 const nir_deref_instr *image_deref = get_image_deref(instr);
2508 const struct glsl_type *type = image_deref->type;
2509 const nir_variable *var = nir_deref_instr_get_variable(image_deref);
2510 dim = glsl_get_sampler_dim(type);
2511 access = var->data.image.access;
2512 is_array = glsl_sampler_type_is_array(type);
2513 }
2514
2515 struct ac_image_args args = {};
2516
2517 args.cache_policy = get_cache_policy(ctx, access, false, false);
2518
2519 if (dim == GLSL_SAMPLER_DIM_BUF) {
2520 unsigned mask = nir_ssa_def_components_read(&instr->dest.ssa);
2521 unsigned num_channels = util_last_bit(mask);
2522 LLVMValueRef rsrc, vindex;
2523
2524 rsrc = get_image_buffer_descriptor(ctx, instr, false, false);
2525 vindex = LLVMBuildExtractElement(ctx->ac.builder, get_src(ctx, instr->src[1]),
2526 ctx->ac.i32_0, "");
2527
2528 bool can_speculate = access & ACCESS_CAN_REORDER;
2529 res = ac_build_buffer_load_format(&ctx->ac, rsrc, vindex,
2530 ctx->ac.i32_0, num_channels,
2531 args.cache_policy,
2532 can_speculate);
2533 res = ac_build_expand_to_vec4(&ctx->ac, res, num_channels);
2534
2535 res = ac_trim_vector(&ctx->ac, res, instr->dest.ssa.num_components);
2536 res = ac_to_integer(&ctx->ac, res);
2537 } else {
2538 args.opcode = ac_image_load;
2539 get_image_coords(ctx, instr, &args, dim, is_array);
2540 args.resource = get_image_descriptor(ctx, instr, AC_DESC_IMAGE, false);
2541 args.dim = get_ac_image_dim(&ctx->ac, dim, is_array);
2542 args.dmask = 15;
2543 args.attributes = AC_FUNC_ATTR_READONLY;
2544
2545 res = ac_build_image_opcode(&ctx->ac, &args);
2546 }
2547 return res;
2548 }
2549
2550 static void visit_image_store(struct ac_nir_context *ctx,
2551 nir_intrinsic_instr *instr,
2552 bool bindless)
2553 {
2554
2555
2556 enum glsl_sampler_dim dim;
2557 enum gl_access_qualifier access;
2558 bool is_array;
2559 if (bindless) {
2560 dim = nir_intrinsic_image_dim(instr);
2561 access = nir_intrinsic_access(instr);
2562 is_array = nir_intrinsic_image_array(instr);
2563 } else {
2564 const nir_deref_instr *image_deref = get_image_deref(instr);
2565 const struct glsl_type *type = image_deref->type;
2566 const nir_variable *var = nir_deref_instr_get_variable(image_deref);
2567 dim = glsl_get_sampler_dim(type);
2568 access = var->data.image.access;
2569 is_array = glsl_sampler_type_is_array(type);
2570 }
2571
2572 bool writeonly_memory = access & ACCESS_NON_READABLE;
2573 struct ac_image_args args = {};
2574
2575 args.cache_policy = get_cache_policy(ctx, access, true, writeonly_memory);
2576
2577 if (dim == GLSL_SAMPLER_DIM_BUF) {
2578 LLVMValueRef rsrc = get_image_buffer_descriptor(ctx, instr, true, false);
2579 LLVMValueRef src = ac_to_float(&ctx->ac, get_src(ctx, instr->src[3]));
2580 unsigned src_channels = ac_get_llvm_num_components(src);
2581 LLVMValueRef vindex;
2582
2583 if (src_channels == 3)
2584 src = ac_build_expand_to_vec4(&ctx->ac, src, 3);
2585
2586 vindex = LLVMBuildExtractElement(ctx->ac.builder,
2587 get_src(ctx, instr->src[1]),
2588 ctx->ac.i32_0, "");
2589
2590 ac_build_buffer_store_format(&ctx->ac, rsrc, src, vindex,
2591 ctx->ac.i32_0, src_channels,
2592 args.cache_policy);
2593 } else {
2594 args.opcode = ac_image_store;
2595 args.data[0] = ac_to_float(&ctx->ac, get_src(ctx, instr->src[3]));
2596 get_image_coords(ctx, instr, &args, dim, is_array);
2597 args.resource = get_image_descriptor(ctx, instr, AC_DESC_IMAGE, true);
2598 args.dim = get_ac_image_dim(&ctx->ac, dim, is_array);
2599 args.dmask = 15;
2600
2601 ac_build_image_opcode(&ctx->ac, &args);
2602 }
2603
2604 }
2605
2606 static LLVMValueRef visit_image_atomic(struct ac_nir_context *ctx,
2607 const nir_intrinsic_instr *instr,
2608 bool bindless)
2609 {
2610 LLVMValueRef params[7];
2611 int param_count = 0;
2612
2613 bool cmpswap = instr->intrinsic == nir_intrinsic_image_deref_atomic_comp_swap ||
2614 instr->intrinsic == nir_intrinsic_bindless_image_atomic_comp_swap;
2615 const char *atomic_name;
2616 char intrinsic_name[64];
2617 enum ac_atomic_op atomic_subop;
2618 ASSERTED int length;
2619
2620 enum glsl_sampler_dim dim;
2621 bool is_unsigned = false;
2622 bool is_array;
2623 if (bindless) {
2624 if (instr->intrinsic == nir_intrinsic_bindless_image_atomic_min ||
2625 instr->intrinsic == nir_intrinsic_bindless_image_atomic_max) {
2626 const GLenum format = nir_intrinsic_format(instr);
2627 assert(format == GL_R32UI || format == GL_R32I);
2628 is_unsigned = format == GL_R32UI;
2629 }
2630 dim = nir_intrinsic_image_dim(instr);
2631 is_array = nir_intrinsic_image_array(instr);
2632 } else {
2633 const struct glsl_type *type = get_image_deref(instr)->type;
2634 is_unsigned = glsl_get_sampler_result_type(type) == GLSL_TYPE_UINT;
2635 dim = glsl_get_sampler_dim(type);
2636 is_array = glsl_sampler_type_is_array(type);
2637 }
2638
2639 switch (instr->intrinsic) {
2640 case nir_intrinsic_bindless_image_atomic_add:
2641 case nir_intrinsic_image_deref_atomic_add:
2642 atomic_name = "add";
2643 atomic_subop = ac_atomic_add;
2644 break;
2645 case nir_intrinsic_bindless_image_atomic_min:
2646 case nir_intrinsic_image_deref_atomic_min:
2647 atomic_name = is_unsigned ? "umin" : "smin";
2648 atomic_subop = is_unsigned ? ac_atomic_umin : ac_atomic_smin;
2649 break;
2650 case nir_intrinsic_bindless_image_atomic_max:
2651 case nir_intrinsic_image_deref_atomic_max:
2652 atomic_name = is_unsigned ? "umax" : "smax";
2653 atomic_subop = is_unsigned ? ac_atomic_umax : ac_atomic_smax;
2654 break;
2655 case nir_intrinsic_bindless_image_atomic_and:
2656 case nir_intrinsic_image_deref_atomic_and:
2657 atomic_name = "and";
2658 atomic_subop = ac_atomic_and;
2659 break;
2660 case nir_intrinsic_bindless_image_atomic_or:
2661 case nir_intrinsic_image_deref_atomic_or:
2662 atomic_name = "or";
2663 atomic_subop = ac_atomic_or;
2664 break;
2665 case nir_intrinsic_bindless_image_atomic_xor:
2666 case nir_intrinsic_image_deref_atomic_xor:
2667 atomic_name = "xor";
2668 atomic_subop = ac_atomic_xor;
2669 break;
2670 case nir_intrinsic_bindless_image_atomic_exchange:
2671 case nir_intrinsic_image_deref_atomic_exchange:
2672 atomic_name = "swap";
2673 atomic_subop = ac_atomic_swap;
2674 break;
2675 case nir_intrinsic_bindless_image_atomic_comp_swap:
2676 case nir_intrinsic_image_deref_atomic_comp_swap:
2677 atomic_name = "cmpswap";
2678 atomic_subop = 0; /* not used */
2679 break;
2680 default:
2681 abort();
2682 }
2683
2684 if (cmpswap)
2685 params[param_count++] = get_src(ctx, instr->src[4]);
2686 params[param_count++] = get_src(ctx, instr->src[3]);
2687
2688 if (dim == GLSL_SAMPLER_DIM_BUF) {
2689 params[param_count++] = get_image_buffer_descriptor(ctx, instr, true, true);
2690 params[param_count++] = LLVMBuildExtractElement(ctx->ac.builder, get_src(ctx, instr->src[1]),
2691 ctx->ac.i32_0, ""); /* vindex */
2692 params[param_count++] = ctx->ac.i32_0; /* voffset */
2693 if (HAVE_LLVM >= 0x900) {
2694 /* XXX: The new raw/struct atomic intrinsics are buggy
2695 * with LLVM 8, see r358579.
2696 */
2697 params[param_count++] = ctx->ac.i32_0; /* soffset */
2698 params[param_count++] = ctx->ac.i32_0; /* slc */
2699
2700 length = snprintf(intrinsic_name, sizeof(intrinsic_name),
2701 "llvm.amdgcn.struct.buffer.atomic.%s.i32", atomic_name);
2702 } else {
2703 params[param_count++] = ctx->ac.i1false; /* slc */
2704
2705 length = snprintf(intrinsic_name, sizeof(intrinsic_name),
2706 "llvm.amdgcn.buffer.atomic.%s", atomic_name);
2707 }
2708
2709 assert(length < sizeof(intrinsic_name));
2710 return ac_build_intrinsic(&ctx->ac, intrinsic_name, ctx->ac.i32,
2711 params, param_count, 0);
2712 } else {
2713 struct ac_image_args args = {};
2714 args.opcode = cmpswap ? ac_image_atomic_cmpswap : ac_image_atomic;
2715 args.atomic = atomic_subop;
2716 args.data[0] = params[0];
2717 if (cmpswap)
2718 args.data[1] = params[1];
2719 get_image_coords(ctx, instr, &args, dim, is_array);
2720 args.resource = get_image_descriptor(ctx, instr, AC_DESC_IMAGE, true);
2721 args.dim = get_ac_image_dim(&ctx->ac, dim, is_array);
2722
2723 return ac_build_image_opcode(&ctx->ac, &args);
2724 }
2725 }
2726
2727 static LLVMValueRef visit_image_samples(struct ac_nir_context *ctx,
2728 const nir_intrinsic_instr *instr,
2729 bool bindless)
2730 {
2731 enum glsl_sampler_dim dim;
2732 bool is_array;
2733 if (bindless) {
2734 dim = nir_intrinsic_image_dim(instr);
2735 is_array = nir_intrinsic_image_array(instr);
2736 } else {
2737 const struct glsl_type *type = get_image_deref(instr)->type;
2738 dim = glsl_get_sampler_dim(type);
2739 is_array = glsl_sampler_type_is_array(type);
2740 }
2741
2742 struct ac_image_args args = { 0 };
2743 args.dim = get_ac_sampler_dim(&ctx->ac, dim, is_array);
2744 args.dmask = 0xf;
2745 args.resource = get_image_descriptor(ctx, instr, AC_DESC_IMAGE, false);
2746 args.opcode = ac_image_get_resinfo;
2747 args.lod = ctx->ac.i32_0;
2748 args.attributes = AC_FUNC_ATTR_READNONE;
2749
2750 return ac_build_image_opcode(&ctx->ac, &args);
2751 }
2752
2753 static LLVMValueRef visit_image_size(struct ac_nir_context *ctx,
2754 const nir_intrinsic_instr *instr,
2755 bool bindless)
2756 {
2757 LLVMValueRef res;
2758
2759 enum glsl_sampler_dim dim;
2760 bool is_array;
2761 if (bindless) {
2762 dim = nir_intrinsic_image_dim(instr);
2763 is_array = nir_intrinsic_image_array(instr);
2764 } else {
2765 const struct glsl_type *type = get_image_deref(instr)->type;
2766 dim = glsl_get_sampler_dim(type);
2767 is_array = glsl_sampler_type_is_array(type);
2768 }
2769
2770 if (dim == GLSL_SAMPLER_DIM_BUF)
2771 return get_buffer_size(ctx, get_image_descriptor(ctx, instr, AC_DESC_BUFFER, false), true);
2772
2773 struct ac_image_args args = { 0 };
2774
2775 args.dim = get_ac_image_dim(&ctx->ac, dim, is_array);
2776 args.dmask = 0xf;
2777 args.resource = get_image_descriptor(ctx, instr, AC_DESC_IMAGE, false);
2778 args.opcode = ac_image_get_resinfo;
2779 args.lod = ctx->ac.i32_0;
2780 args.attributes = AC_FUNC_ATTR_READNONE;
2781
2782 res = ac_build_image_opcode(&ctx->ac, &args);
2783
2784 LLVMValueRef two = LLVMConstInt(ctx->ac.i32, 2, false);
2785
2786 if (dim == GLSL_SAMPLER_DIM_CUBE && is_array) {
2787 LLVMValueRef six = LLVMConstInt(ctx->ac.i32, 6, false);
2788 LLVMValueRef z = LLVMBuildExtractElement(ctx->ac.builder, res, two, "");
2789 z = LLVMBuildSDiv(ctx->ac.builder, z, six, "");
2790 res = LLVMBuildInsertElement(ctx->ac.builder, res, z, two, "");
2791 }
2792 if (ctx->ac.chip_class == GFX9 && dim == GLSL_SAMPLER_DIM_1D && is_array) {
2793 LLVMValueRef layers = LLVMBuildExtractElement(ctx->ac.builder, res, two, "");
2794 res = LLVMBuildInsertElement(ctx->ac.builder, res, layers,
2795 ctx->ac.i32_1, "");
2796
2797 }
2798 return res;
2799 }
2800
2801 static void emit_membar(struct ac_llvm_context *ac,
2802 const nir_intrinsic_instr *instr)
2803 {
2804 unsigned wait_flags = 0;
2805
2806 switch (instr->intrinsic) {
2807 case nir_intrinsic_memory_barrier:
2808 case nir_intrinsic_group_memory_barrier:
2809 wait_flags = AC_WAIT_LGKM | AC_WAIT_VLOAD | AC_WAIT_VSTORE;
2810 break;
2811 case nir_intrinsic_memory_barrier_atomic_counter:
2812 case nir_intrinsic_memory_barrier_buffer:
2813 case nir_intrinsic_memory_barrier_image:
2814 wait_flags = AC_WAIT_VLOAD | AC_WAIT_VSTORE;
2815 break;
2816 case nir_intrinsic_memory_barrier_shared:
2817 wait_flags = AC_WAIT_LGKM;
2818 break;
2819 default:
2820 break;
2821 }
2822
2823 ac_build_waitcnt(ac, wait_flags);
2824 }
2825
2826 void ac_emit_barrier(struct ac_llvm_context *ac, gl_shader_stage stage)
2827 {
2828 /* GFX6 only (thanks to a hw bug workaround):
2829 * The real barrier instruction isn’t needed, because an entire patch
2830 * always fits into a single wave.
2831 */
2832 if (ac->chip_class == GFX6 && stage == MESA_SHADER_TESS_CTRL) {
2833 ac_build_waitcnt(ac, AC_WAIT_LGKM | AC_WAIT_VLOAD | AC_WAIT_VSTORE);
2834 return;
2835 }
2836 ac_build_s_barrier(ac);
2837 }
2838
2839 static void emit_discard(struct ac_nir_context *ctx,
2840 const nir_intrinsic_instr *instr)
2841 {
2842 LLVMValueRef cond;
2843
2844 if (instr->intrinsic == nir_intrinsic_discard_if) {
2845 cond = LLVMBuildICmp(ctx->ac.builder, LLVMIntEQ,
2846 get_src(ctx, instr->src[0]),
2847 ctx->ac.i32_0, "");
2848 } else {
2849 assert(instr->intrinsic == nir_intrinsic_discard);
2850 cond = ctx->ac.i1false;
2851 }
2852
2853 ctx->abi->emit_kill(ctx->abi, cond);
2854 }
2855
2856 static LLVMValueRef
2857 visit_load_local_invocation_index(struct ac_nir_context *ctx)
2858 {
2859 LLVMValueRef result;
2860 LLVMValueRef thread_id = ac_get_thread_id(&ctx->ac);
2861 result = LLVMBuildAnd(ctx->ac.builder, ctx->abi->tg_size,
2862 LLVMConstInt(ctx->ac.i32, 0xfc0, false), "");
2863
2864 return LLVMBuildAdd(ctx->ac.builder, result, thread_id, "");
2865 }
2866
2867 static LLVMValueRef
2868 visit_load_subgroup_id(struct ac_nir_context *ctx)
2869 {
2870 if (ctx->stage == MESA_SHADER_COMPUTE) {
2871 LLVMValueRef result;
2872 result = LLVMBuildAnd(ctx->ac.builder, ctx->abi->tg_size,
2873 LLVMConstInt(ctx->ac.i32, 0xfc0, false), "");
2874 return LLVMBuildLShr(ctx->ac.builder, result, LLVMConstInt(ctx->ac.i32, 6, false), "");
2875 } else {
2876 return LLVMConstInt(ctx->ac.i32, 0, false);
2877 }
2878 }
2879
2880 static LLVMValueRef
2881 visit_load_num_subgroups(struct ac_nir_context *ctx)
2882 {
2883 if (ctx->stage == MESA_SHADER_COMPUTE) {
2884 return LLVMBuildAnd(ctx->ac.builder, ctx->abi->tg_size,
2885 LLVMConstInt(ctx->ac.i32, 0x3f, false), "");
2886 } else {
2887 return LLVMConstInt(ctx->ac.i32, 1, false);
2888 }
2889 }
2890
2891 static LLVMValueRef
2892 visit_first_invocation(struct ac_nir_context *ctx)
2893 {
2894 LLVMValueRef active_set = ac_build_ballot(&ctx->ac, ctx->ac.i32_1);
2895 const char *intr = ctx->ac.wave_size == 32 ? "llvm.cttz.i32" : "llvm.cttz.i64";
2896
2897 /* The second argument is whether cttz(0) should be defined, but we do not care. */
2898 LLVMValueRef args[] = {active_set, ctx->ac.i1false};
2899 LLVMValueRef result = ac_build_intrinsic(&ctx->ac, intr,
2900 ctx->ac.iN_wavemask, args, 2,
2901 AC_FUNC_ATTR_NOUNWIND |
2902 AC_FUNC_ATTR_READNONE);
2903
2904 return LLVMBuildTrunc(ctx->ac.builder, result, ctx->ac.i32, "");
2905 }
2906
2907 static LLVMValueRef
2908 visit_load_shared(struct ac_nir_context *ctx,
2909 const nir_intrinsic_instr *instr)
2910 {
2911 LLVMValueRef values[4], derived_ptr, index, ret;
2912
2913 LLVMValueRef ptr = get_memory_ptr(ctx, instr->src[0]);
2914
2915 for (int chan = 0; chan < instr->num_components; chan++) {
2916 index = LLVMConstInt(ctx->ac.i32, chan, 0);
2917 derived_ptr = LLVMBuildGEP(ctx->ac.builder, ptr, &index, 1, "");
2918 values[chan] = LLVMBuildLoad(ctx->ac.builder, derived_ptr, "");
2919 }
2920
2921 ret = ac_build_gather_values(&ctx->ac, values, instr->num_components);
2922 return LLVMBuildBitCast(ctx->ac.builder, ret, get_def_type(ctx, &instr->dest.ssa), "");
2923 }
2924
2925 static void
2926 visit_store_shared(struct ac_nir_context *ctx,
2927 const nir_intrinsic_instr *instr)
2928 {
2929 LLVMValueRef derived_ptr, data,index;
2930 LLVMBuilderRef builder = ctx->ac.builder;
2931
2932 LLVMValueRef ptr = get_memory_ptr(ctx, instr->src[1]);
2933 LLVMValueRef src = get_src(ctx, instr->src[0]);
2934
2935 int writemask = nir_intrinsic_write_mask(instr);
2936 for (int chan = 0; chan < 4; chan++) {
2937 if (!(writemask & (1 << chan))) {
2938 continue;
2939 }
2940 data = ac_llvm_extract_elem(&ctx->ac, src, chan);
2941 index = LLVMConstInt(ctx->ac.i32, chan, 0);
2942 derived_ptr = LLVMBuildGEP(builder, ptr, &index, 1, "");
2943 LLVMBuildStore(builder, data, derived_ptr);
2944 }
2945 }
2946
2947 static LLVMValueRef visit_var_atomic(struct ac_nir_context *ctx,
2948 const nir_intrinsic_instr *instr,
2949 LLVMValueRef ptr, int src_idx)
2950 {
2951 LLVMValueRef result;
2952 LLVMValueRef src = get_src(ctx, instr->src[src_idx]);
2953
2954 const char *sync_scope = HAVE_LLVM >= 0x0900 ? "workgroup-one-as" : "workgroup";
2955
2956 if (instr->intrinsic == nir_intrinsic_shared_atomic_comp_swap ||
2957 instr->intrinsic == nir_intrinsic_deref_atomic_comp_swap) {
2958 LLVMValueRef src1 = get_src(ctx, instr->src[src_idx + 1]);
2959 result = ac_build_atomic_cmp_xchg(&ctx->ac, ptr, src, src1, sync_scope);
2960 result = LLVMBuildExtractValue(ctx->ac.builder, result, 0, "");
2961 } else {
2962 LLVMAtomicRMWBinOp op;
2963 switch (instr->intrinsic) {
2964 case nir_intrinsic_shared_atomic_add:
2965 case nir_intrinsic_deref_atomic_add:
2966 op = LLVMAtomicRMWBinOpAdd;
2967 break;
2968 case nir_intrinsic_shared_atomic_umin:
2969 case nir_intrinsic_deref_atomic_umin:
2970 op = LLVMAtomicRMWBinOpUMin;
2971 break;
2972 case nir_intrinsic_shared_atomic_umax:
2973 case nir_intrinsic_deref_atomic_umax:
2974 op = LLVMAtomicRMWBinOpUMax;
2975 break;
2976 case nir_intrinsic_shared_atomic_imin:
2977 case nir_intrinsic_deref_atomic_imin:
2978 op = LLVMAtomicRMWBinOpMin;
2979 break;
2980 case nir_intrinsic_shared_atomic_imax:
2981 case nir_intrinsic_deref_atomic_imax:
2982 op = LLVMAtomicRMWBinOpMax;
2983 break;
2984 case nir_intrinsic_shared_atomic_and:
2985 case nir_intrinsic_deref_atomic_and:
2986 op = LLVMAtomicRMWBinOpAnd;
2987 break;
2988 case nir_intrinsic_shared_atomic_or:
2989 case nir_intrinsic_deref_atomic_or:
2990 op = LLVMAtomicRMWBinOpOr;
2991 break;
2992 case nir_intrinsic_shared_atomic_xor:
2993 case nir_intrinsic_deref_atomic_xor:
2994 op = LLVMAtomicRMWBinOpXor;
2995 break;
2996 case nir_intrinsic_shared_atomic_exchange:
2997 case nir_intrinsic_deref_atomic_exchange:
2998 op = LLVMAtomicRMWBinOpXchg;
2999 break;
3000 default:
3001 return NULL;
3002 }
3003
3004 result = ac_build_atomic_rmw(&ctx->ac, op, ptr, ac_to_integer(&ctx->ac, src), sync_scope);
3005 }
3006 return result;
3007 }
3008
3009 static LLVMValueRef load_sample_pos(struct ac_nir_context *ctx)
3010 {
3011 LLVMValueRef values[2];
3012 LLVMValueRef pos[2];
3013
3014 pos[0] = ac_to_float(&ctx->ac, ctx->abi->frag_pos[0]);
3015 pos[1] = ac_to_float(&ctx->ac, ctx->abi->frag_pos[1]);
3016
3017 values[0] = ac_build_fract(&ctx->ac, pos[0], 32);
3018 values[1] = ac_build_fract(&ctx->ac, pos[1], 32);
3019 return ac_build_gather_values(&ctx->ac, values, 2);
3020 }
3021
3022 static LLVMValueRef barycentric_center(struct ac_nir_context *ctx,
3023 unsigned mode)
3024 {
3025 LLVMValueRef interp_param = ctx->abi->lookup_interp_param(ctx->abi, mode, INTERP_CENTER);
3026 return LLVMBuildBitCast(ctx->ac.builder, interp_param, ctx->ac.v2i32, "");
3027 }
3028
3029 static LLVMValueRef barycentric_offset(struct ac_nir_context *ctx,
3030 unsigned mode,
3031 LLVMValueRef offset)
3032 {
3033 LLVMValueRef interp_param = ctx->abi->lookup_interp_param(ctx->abi, mode, INTERP_CENTER);
3034 LLVMValueRef src_c0 = ac_to_float(&ctx->ac, LLVMBuildExtractElement(ctx->ac.builder, offset, ctx->ac.i32_0, ""));
3035 LLVMValueRef src_c1 = ac_to_float(&ctx->ac, LLVMBuildExtractElement(ctx->ac.builder, offset, ctx->ac.i32_1, ""));
3036
3037 LLVMValueRef ij_out[2];
3038 LLVMValueRef ddxy_out = ac_build_ddxy_interp(&ctx->ac, interp_param);
3039
3040 /*
3041 * take the I then J parameters, and the DDX/Y for it, and
3042 * calculate the IJ inputs for the interpolator.
3043 * temp1 = ddx * offset/sample.x + I;
3044 * interp_param.I = ddy * offset/sample.y + temp1;
3045 * temp1 = ddx * offset/sample.x + J;
3046 * interp_param.J = ddy * offset/sample.y + temp1;
3047 */
3048 for (unsigned i = 0; i < 2; i++) {
3049 LLVMValueRef ix_ll = LLVMConstInt(ctx->ac.i32, i, false);
3050 LLVMValueRef iy_ll = LLVMConstInt(ctx->ac.i32, i + 2, false);
3051 LLVMValueRef ddx_el = LLVMBuildExtractElement(ctx->ac.builder,
3052 ddxy_out, ix_ll, "");
3053 LLVMValueRef ddy_el = LLVMBuildExtractElement(ctx->ac.builder,
3054 ddxy_out, iy_ll, "");
3055 LLVMValueRef interp_el = LLVMBuildExtractElement(ctx->ac.builder,
3056 interp_param, ix_ll, "");
3057 LLVMValueRef temp1, temp2;
3058
3059 interp_el = LLVMBuildBitCast(ctx->ac.builder, interp_el,
3060 ctx->ac.f32, "");
3061
3062 temp1 = ac_build_fmad(&ctx->ac, ddx_el, src_c0, interp_el);
3063 temp2 = ac_build_fmad(&ctx->ac, ddy_el, src_c1, temp1);
3064
3065 ij_out[i] = LLVMBuildBitCast(ctx->ac.builder,
3066 temp2, ctx->ac.i32, "");
3067 }
3068 interp_param = ac_build_gather_values(&ctx->ac, ij_out, 2);
3069 return LLVMBuildBitCast(ctx->ac.builder, interp_param, ctx->ac.v2i32, "");
3070 }
3071
3072 static LLVMValueRef barycentric_centroid(struct ac_nir_context *ctx,
3073 unsigned mode)
3074 {
3075 LLVMValueRef interp_param = ctx->abi->lookup_interp_param(ctx->abi, mode, INTERP_CENTROID);
3076 return LLVMBuildBitCast(ctx->ac.builder, interp_param, ctx->ac.v2i32, "");
3077 }
3078
3079 static LLVMValueRef barycentric_at_sample(struct ac_nir_context *ctx,
3080 unsigned mode,
3081 LLVMValueRef sample_id)
3082 {
3083 LLVMValueRef halfval = LLVMConstReal(ctx->ac.f32, 0.5f);
3084
3085 /* fetch sample ID */
3086 LLVMValueRef sample_pos = ctx->abi->load_sample_position(ctx->abi, sample_id);
3087
3088 LLVMValueRef src_c0 = LLVMBuildExtractElement(ctx->ac.builder, sample_pos, ctx->ac.i32_0, "");
3089 src_c0 = LLVMBuildFSub(ctx->ac.builder, src_c0, halfval, "");
3090 LLVMValueRef src_c1 = LLVMBuildExtractElement(ctx->ac.builder, sample_pos, ctx->ac.i32_1, "");
3091 src_c1 = LLVMBuildFSub(ctx->ac.builder, src_c1, halfval, "");
3092 LLVMValueRef coords[] = { src_c0, src_c1 };
3093 LLVMValueRef offset = ac_build_gather_values(&ctx->ac, coords, 2);
3094
3095 return barycentric_offset(ctx, mode, offset);
3096 }
3097
3098
3099 static LLVMValueRef barycentric_sample(struct ac_nir_context *ctx,
3100 unsigned mode)
3101 {
3102 LLVMValueRef interp_param = ctx->abi->lookup_interp_param(ctx->abi, mode, INTERP_SAMPLE);
3103 return LLVMBuildBitCast(ctx->ac.builder, interp_param, ctx->ac.v2i32, "");
3104 }
3105
3106 static LLVMValueRef load_interpolated_input(struct ac_nir_context *ctx,
3107 LLVMValueRef interp_param,
3108 unsigned index, unsigned comp_start,
3109 unsigned num_components,
3110 unsigned bitsize)
3111 {
3112 LLVMValueRef attr_number = LLVMConstInt(ctx->ac.i32, index, false);
3113
3114 interp_param = LLVMBuildBitCast(ctx->ac.builder,
3115 interp_param, ctx->ac.v2f32, "");
3116 LLVMValueRef i = LLVMBuildExtractElement(
3117 ctx->ac.builder, interp_param, ctx->ac.i32_0, "");
3118 LLVMValueRef j = LLVMBuildExtractElement(
3119 ctx->ac.builder, interp_param, ctx->ac.i32_1, "");
3120
3121 LLVMValueRef values[4];
3122 assert(bitsize == 16 || bitsize == 32);
3123 for (unsigned comp = 0; comp < num_components; comp++) {
3124 LLVMValueRef llvm_chan = LLVMConstInt(ctx->ac.i32, comp_start + comp, false);
3125 if (bitsize == 16) {
3126 values[comp] = ac_build_fs_interp_f16(&ctx->ac, llvm_chan, attr_number,
3127 ctx->abi->prim_mask, i, j);
3128 } else {
3129 values[comp] = ac_build_fs_interp(&ctx->ac, llvm_chan, attr_number,
3130 ctx->abi->prim_mask, i, j);
3131 }
3132 }
3133
3134 return ac_to_integer(&ctx->ac, ac_build_gather_values(&ctx->ac, values, num_components));
3135 }
3136
3137 static LLVMValueRef load_flat_input(struct ac_nir_context *ctx,
3138 unsigned index, unsigned comp_start,
3139 unsigned num_components,
3140 unsigned bit_size)
3141 {
3142 LLVMValueRef attr_number = LLVMConstInt(ctx->ac.i32, index, false);
3143
3144 LLVMValueRef values[8];
3145
3146 /* Each component of a 64-bit value takes up two GL-level channels. */
3147 unsigned channels =
3148 bit_size == 64 ? num_components * 2 : num_components;
3149
3150 for (unsigned chan = 0; chan < channels; chan++) {
3151 if (comp_start + chan > 4)
3152 attr_number = LLVMConstInt(ctx->ac.i32, index + 1, false);
3153 LLVMValueRef llvm_chan = LLVMConstInt(ctx->ac.i32, (comp_start + chan) % 4, false);
3154 values[chan] = ac_build_fs_interp_mov(&ctx->ac,
3155 LLVMConstInt(ctx->ac.i32, 2, false),
3156 llvm_chan,
3157 attr_number,
3158 ctx->abi->prim_mask);
3159 values[chan] = LLVMBuildBitCast(ctx->ac.builder, values[chan], ctx->ac.i32, "");
3160 values[chan] = LLVMBuildTruncOrBitCast(ctx->ac.builder, values[chan],
3161 bit_size == 16 ? ctx->ac.i16 : ctx->ac.i32, "");
3162 }
3163
3164 LLVMValueRef result = ac_build_gather_values(&ctx->ac, values, channels);
3165 if (bit_size == 64) {
3166 LLVMTypeRef type = num_components == 1 ? ctx->ac.i64 :
3167 LLVMVectorType(ctx->ac.i64, num_components);
3168 result = LLVMBuildBitCast(ctx->ac.builder, result, type, "");
3169 }
3170 return result;
3171 }
3172
3173 static void visit_intrinsic(struct ac_nir_context *ctx,
3174 nir_intrinsic_instr *instr)
3175 {
3176 LLVMValueRef result = NULL;
3177
3178 switch (instr->intrinsic) {
3179 case nir_intrinsic_ballot:
3180 result = ac_build_ballot(&ctx->ac, get_src(ctx, instr->src[0]));
3181 break;
3182 case nir_intrinsic_read_invocation:
3183 result = ac_build_readlane(&ctx->ac, get_src(ctx, instr->src[0]),
3184 get_src(ctx, instr->src[1]));
3185 break;
3186 case nir_intrinsic_read_first_invocation:
3187 result = ac_build_readlane(&ctx->ac, get_src(ctx, instr->src[0]), NULL);
3188 break;
3189 case nir_intrinsic_load_subgroup_invocation:
3190 result = ac_get_thread_id(&ctx->ac);
3191 break;
3192 case nir_intrinsic_load_work_group_id: {
3193 LLVMValueRef values[3];
3194
3195 for (int i = 0; i < 3; i++) {
3196 values[i] = ctx->abi->workgroup_ids[i] ?
3197 ctx->abi->workgroup_ids[i] : ctx->ac.i32_0;
3198 }
3199
3200 result = ac_build_gather_values(&ctx->ac, values, 3);
3201 break;
3202 }
3203 case nir_intrinsic_load_base_vertex:
3204 case nir_intrinsic_load_first_vertex:
3205 result = ctx->abi->load_base_vertex(ctx->abi);
3206 break;
3207 case nir_intrinsic_load_local_group_size:
3208 result = ctx->abi->load_local_group_size(ctx->abi);
3209 break;
3210 case nir_intrinsic_load_vertex_id:
3211 result = LLVMBuildAdd(ctx->ac.builder, ctx->abi->vertex_id,
3212 ctx->abi->base_vertex, "");
3213 break;
3214 case nir_intrinsic_load_vertex_id_zero_base: {
3215 result = ctx->abi->vertex_id;
3216 break;
3217 }
3218 case nir_intrinsic_load_local_invocation_id: {
3219 result = ctx->abi->local_invocation_ids;
3220 break;
3221 }
3222 case nir_intrinsic_load_base_instance:
3223 result = ctx->abi->start_instance;
3224 break;
3225 case nir_intrinsic_load_draw_id:
3226 result = ctx->abi->draw_id;
3227 break;
3228 case nir_intrinsic_load_view_index:
3229 result = ctx->abi->view_index;
3230 break;
3231 case nir_intrinsic_load_invocation_id:
3232 if (ctx->stage == MESA_SHADER_TESS_CTRL) {
3233 result = ac_unpack_param(&ctx->ac, ctx->abi->tcs_rel_ids, 8, 5);
3234 } else {
3235 if (ctx->ac.chip_class >= GFX10) {
3236 result = LLVMBuildAnd(ctx->ac.builder,
3237 ctx->abi->gs_invocation_id,
3238 LLVMConstInt(ctx->ac.i32, 127, 0), "");
3239 } else {
3240 result = ctx->abi->gs_invocation_id;
3241 }
3242 }
3243 break;
3244 case nir_intrinsic_load_primitive_id:
3245 if (ctx->stage == MESA_SHADER_GEOMETRY) {
3246 result = ctx->abi->gs_prim_id;
3247 } else if (ctx->stage == MESA_SHADER_TESS_CTRL) {
3248 result = ctx->abi->tcs_patch_id;
3249 } else if (ctx->stage == MESA_SHADER_TESS_EVAL) {
3250 result = ctx->abi->tes_patch_id;
3251 } else
3252 fprintf(stderr, "Unknown primitive id intrinsic: %d", ctx->stage);
3253 break;
3254 case nir_intrinsic_load_sample_id:
3255 result = ac_unpack_param(&ctx->ac, ctx->abi->ancillary, 8, 4);
3256 break;
3257 case nir_intrinsic_load_sample_pos:
3258 result = load_sample_pos(ctx);
3259 break;
3260 case nir_intrinsic_load_sample_mask_in:
3261 result = ctx->abi->load_sample_mask_in(ctx->abi);
3262 break;
3263 case nir_intrinsic_load_frag_coord: {
3264 LLVMValueRef values[4] = {
3265 ctx->abi->frag_pos[0],
3266 ctx->abi->frag_pos[1],
3267 ctx->abi->frag_pos[2],
3268 ac_build_fdiv(&ctx->ac, ctx->ac.f32_1, ctx->abi->frag_pos[3])
3269 };
3270 result = ac_to_integer(&ctx->ac,
3271 ac_build_gather_values(&ctx->ac, values, 4));
3272 break;
3273 }
3274 case nir_intrinsic_load_layer_id:
3275 result = ctx->abi->inputs[ac_llvm_reg_index_soa(VARYING_SLOT_LAYER, 0)];
3276 break;
3277 case nir_intrinsic_load_front_face:
3278 result = ctx->abi->front_face;
3279 break;
3280 case nir_intrinsic_load_helper_invocation:
3281 result = ac_build_load_helper_invocation(&ctx->ac);
3282 break;
3283 case nir_intrinsic_load_color0:
3284 result = ctx->abi->color0;
3285 break;
3286 case nir_intrinsic_load_color1:
3287 result = ctx->abi->color1;
3288 break;
3289 case nir_intrinsic_load_instance_id:
3290 result = ctx->abi->instance_id;
3291 break;
3292 case nir_intrinsic_load_num_work_groups:
3293 result = ctx->abi->num_work_groups;
3294 break;
3295 case nir_intrinsic_load_local_invocation_index:
3296 result = visit_load_local_invocation_index(ctx);
3297 break;
3298 case nir_intrinsic_load_subgroup_id:
3299 result = visit_load_subgroup_id(ctx);
3300 break;
3301 case nir_intrinsic_load_num_subgroups:
3302 result = visit_load_num_subgroups(ctx);
3303 break;
3304 case nir_intrinsic_first_invocation:
3305 result = visit_first_invocation(ctx);
3306 break;
3307 case nir_intrinsic_load_push_constant:
3308 result = visit_load_push_constant(ctx, instr);
3309 break;
3310 case nir_intrinsic_vulkan_resource_index: {
3311 LLVMValueRef index = get_src(ctx, instr->src[0]);
3312 unsigned desc_set = nir_intrinsic_desc_set(instr);
3313 unsigned binding = nir_intrinsic_binding(instr);
3314
3315 result = ctx->abi->load_resource(ctx->abi, index, desc_set,
3316 binding);
3317 break;
3318 }
3319 case nir_intrinsic_vulkan_resource_reindex:
3320 result = visit_vulkan_resource_reindex(ctx, instr);
3321 break;
3322 case nir_intrinsic_store_ssbo:
3323 visit_store_ssbo(ctx, instr);
3324 break;
3325 case nir_intrinsic_load_ssbo:
3326 result = visit_load_buffer(ctx, instr);
3327 break;
3328 case nir_intrinsic_ssbo_atomic_add:
3329 case nir_intrinsic_ssbo_atomic_imin:
3330 case nir_intrinsic_ssbo_atomic_umin:
3331 case nir_intrinsic_ssbo_atomic_imax:
3332 case nir_intrinsic_ssbo_atomic_umax:
3333 case nir_intrinsic_ssbo_atomic_and:
3334 case nir_intrinsic_ssbo_atomic_or:
3335 case nir_intrinsic_ssbo_atomic_xor:
3336 case nir_intrinsic_ssbo_atomic_exchange:
3337 case nir_intrinsic_ssbo_atomic_comp_swap:
3338 result = visit_atomic_ssbo(ctx, instr);
3339 break;
3340 case nir_intrinsic_load_ubo:
3341 result = visit_load_ubo_buffer(ctx, instr);
3342 break;
3343 case nir_intrinsic_get_buffer_size:
3344 result = visit_get_buffer_size(ctx, instr);
3345 break;
3346 case nir_intrinsic_load_deref:
3347 result = visit_load_var(ctx, instr);
3348 break;
3349 case nir_intrinsic_store_deref:
3350 visit_store_var(ctx, instr);
3351 break;
3352 case nir_intrinsic_load_shared:
3353 result = visit_load_shared(ctx, instr);
3354 break;
3355 case nir_intrinsic_store_shared:
3356 visit_store_shared(ctx, instr);
3357 break;
3358 case nir_intrinsic_bindless_image_samples:
3359 result = visit_image_samples(ctx, instr, true);
3360 break;
3361 case nir_intrinsic_image_deref_samples:
3362 result = visit_image_samples(ctx, instr, false);
3363 break;
3364 case nir_intrinsic_bindless_image_load:
3365 result = visit_image_load(ctx, instr, true);
3366 break;
3367 case nir_intrinsic_image_deref_load:
3368 result = visit_image_load(ctx, instr, false);
3369 break;
3370 case nir_intrinsic_bindless_image_store:
3371 visit_image_store(ctx, instr, true);
3372 break;
3373 case nir_intrinsic_image_deref_store:
3374 visit_image_store(ctx, instr, false);
3375 break;
3376 case nir_intrinsic_bindless_image_atomic_add:
3377 case nir_intrinsic_bindless_image_atomic_min:
3378 case nir_intrinsic_bindless_image_atomic_max:
3379 case nir_intrinsic_bindless_image_atomic_and:
3380 case nir_intrinsic_bindless_image_atomic_or:
3381 case nir_intrinsic_bindless_image_atomic_xor:
3382 case nir_intrinsic_bindless_image_atomic_exchange:
3383 case nir_intrinsic_bindless_image_atomic_comp_swap:
3384 result = visit_image_atomic(ctx, instr, true);
3385 break;
3386 case nir_intrinsic_image_deref_atomic_add:
3387 case nir_intrinsic_image_deref_atomic_min:
3388 case nir_intrinsic_image_deref_atomic_max:
3389 case nir_intrinsic_image_deref_atomic_and:
3390 case nir_intrinsic_image_deref_atomic_or:
3391 case nir_intrinsic_image_deref_atomic_xor:
3392 case nir_intrinsic_image_deref_atomic_exchange:
3393 case nir_intrinsic_image_deref_atomic_comp_swap:
3394 result = visit_image_atomic(ctx, instr, false);
3395 break;
3396 case nir_intrinsic_bindless_image_size:
3397 result = visit_image_size(ctx, instr, true);
3398 break;
3399 case nir_intrinsic_image_deref_size:
3400 result = visit_image_size(ctx, instr, false);
3401 break;
3402 case nir_intrinsic_shader_clock:
3403 result = ac_build_shader_clock(&ctx->ac);
3404 break;
3405 case nir_intrinsic_discard:
3406 case nir_intrinsic_discard_if:
3407 emit_discard(ctx, instr);
3408 break;
3409 case nir_intrinsic_memory_barrier:
3410 case nir_intrinsic_group_memory_barrier:
3411 case nir_intrinsic_memory_barrier_atomic_counter:
3412 case nir_intrinsic_memory_barrier_buffer:
3413 case nir_intrinsic_memory_barrier_image:
3414 case nir_intrinsic_memory_barrier_shared:
3415 emit_membar(&ctx->ac, instr);
3416 break;
3417 case nir_intrinsic_barrier:
3418 ac_emit_barrier(&ctx->ac, ctx->stage);
3419 break;
3420 case nir_intrinsic_shared_atomic_add:
3421 case nir_intrinsic_shared_atomic_imin:
3422 case nir_intrinsic_shared_atomic_umin:
3423 case nir_intrinsic_shared_atomic_imax:
3424 case nir_intrinsic_shared_atomic_umax:
3425 case nir_intrinsic_shared_atomic_and:
3426 case nir_intrinsic_shared_atomic_or:
3427 case nir_intrinsic_shared_atomic_xor:
3428 case nir_intrinsic_shared_atomic_exchange:
3429 case nir_intrinsic_shared_atomic_comp_swap: {
3430 LLVMValueRef ptr = get_memory_ptr(ctx, instr->src[0]);
3431 result = visit_var_atomic(ctx, instr, ptr, 1);
3432 break;
3433 }
3434 case nir_intrinsic_deref_atomic_add:
3435 case nir_intrinsic_deref_atomic_imin:
3436 case nir_intrinsic_deref_atomic_umin:
3437 case nir_intrinsic_deref_atomic_imax:
3438 case nir_intrinsic_deref_atomic_umax:
3439 case nir_intrinsic_deref_atomic_and:
3440 case nir_intrinsic_deref_atomic_or:
3441 case nir_intrinsic_deref_atomic_xor:
3442 case nir_intrinsic_deref_atomic_exchange:
3443 case nir_intrinsic_deref_atomic_comp_swap: {
3444 LLVMValueRef ptr = get_src(ctx, instr->src[0]);
3445 result = visit_var_atomic(ctx, instr, ptr, 1);
3446 break;
3447 }
3448 case nir_intrinsic_load_barycentric_pixel:
3449 result = barycentric_center(ctx, nir_intrinsic_interp_mode(instr));
3450 break;
3451 case nir_intrinsic_load_barycentric_centroid:
3452 result = barycentric_centroid(ctx, nir_intrinsic_interp_mode(instr));
3453 break;
3454 case nir_intrinsic_load_barycentric_sample:
3455 result = barycentric_sample(ctx, nir_intrinsic_interp_mode(instr));
3456 break;
3457 case nir_intrinsic_load_barycentric_at_offset: {
3458 LLVMValueRef offset = ac_to_float(&ctx->ac, get_src(ctx, instr->src[0]));
3459 result = barycentric_offset(ctx, nir_intrinsic_interp_mode(instr), offset);
3460 break;
3461 }
3462 case nir_intrinsic_load_barycentric_at_sample: {
3463 LLVMValueRef sample_id = get_src(ctx, instr->src[0]);
3464 result = barycentric_at_sample(ctx, nir_intrinsic_interp_mode(instr), sample_id);
3465 break;
3466 }
3467 case nir_intrinsic_load_interpolated_input: {
3468 /* We assume any indirect loads have been lowered away */
3469 ASSERTED nir_const_value *offset = nir_src_as_const_value(instr->src[1]);
3470 assert(offset);
3471 assert(offset[0].i32 == 0);
3472
3473 LLVMValueRef interp_param = get_src(ctx, instr->src[0]);
3474 unsigned index = nir_intrinsic_base(instr);
3475 unsigned component = nir_intrinsic_component(instr);
3476 result = load_interpolated_input(ctx, interp_param, index,
3477 component,
3478 instr->dest.ssa.num_components,
3479 instr->dest.ssa.bit_size);
3480 break;
3481 }
3482 case nir_intrinsic_load_input: {
3483 /* We only lower inputs for fragment shaders ATM */
3484 ASSERTED nir_const_value *offset = nir_src_as_const_value(instr->src[0]);
3485 assert(offset);
3486 assert(offset[0].i32 == 0);
3487
3488 unsigned index = nir_intrinsic_base(instr);
3489 unsigned component = nir_intrinsic_component(instr);
3490 result = load_flat_input(ctx, index, component,
3491 instr->dest.ssa.num_components,
3492 instr->dest.ssa.bit_size);
3493 break;
3494 }
3495 case nir_intrinsic_emit_vertex:
3496 ctx->abi->emit_vertex(ctx->abi, nir_intrinsic_stream_id(instr), ctx->abi->outputs);
3497 break;
3498 case nir_intrinsic_end_primitive:
3499 ctx->abi->emit_primitive(ctx->abi, nir_intrinsic_stream_id(instr));
3500 break;
3501 case nir_intrinsic_load_tess_coord:
3502 result = ctx->abi->load_tess_coord(ctx->abi);
3503 break;
3504 case nir_intrinsic_load_tess_level_outer:
3505 result = ctx->abi->load_tess_level(ctx->abi, VARYING_SLOT_TESS_LEVEL_OUTER);
3506 break;
3507 case nir_intrinsic_load_tess_level_inner:
3508 result = ctx->abi->load_tess_level(ctx->abi, VARYING_SLOT_TESS_LEVEL_INNER);
3509 break;
3510 case nir_intrinsic_load_patch_vertices_in:
3511 result = ctx->abi->load_patch_vertices_in(ctx->abi);
3512 break;
3513 case nir_intrinsic_vote_all: {
3514 LLVMValueRef tmp = ac_build_vote_all(&ctx->ac, get_src(ctx, instr->src[0]));
3515 result = LLVMBuildSExt(ctx->ac.builder, tmp, ctx->ac.i32, "");
3516 break;
3517 }
3518 case nir_intrinsic_vote_any: {
3519 LLVMValueRef tmp = ac_build_vote_any(&ctx->ac, get_src(ctx, instr->src[0]));
3520 result = LLVMBuildSExt(ctx->ac.builder, tmp, ctx->ac.i32, "");
3521 break;
3522 }
3523 case nir_intrinsic_shuffle:
3524 result = ac_build_shuffle(&ctx->ac, get_src(ctx, instr->src[0]),
3525 get_src(ctx, instr->src[1]));
3526 break;
3527 case nir_intrinsic_reduce:
3528 result = ac_build_reduce(&ctx->ac,
3529 get_src(ctx, instr->src[0]),
3530 instr->const_index[0],
3531 instr->const_index[1]);
3532 break;
3533 case nir_intrinsic_inclusive_scan:
3534 result = ac_build_inclusive_scan(&ctx->ac,
3535 get_src(ctx, instr->src[0]),
3536 instr->const_index[0]);
3537 break;
3538 case nir_intrinsic_exclusive_scan:
3539 result = ac_build_exclusive_scan(&ctx->ac,
3540 get_src(ctx, instr->src[0]),
3541 instr->const_index[0]);
3542 break;
3543 case nir_intrinsic_quad_broadcast: {
3544 unsigned lane = nir_src_as_uint(instr->src[1]);
3545 result = ac_build_quad_swizzle(&ctx->ac, get_src(ctx, instr->src[0]),
3546 lane, lane, lane, lane);
3547 break;
3548 }
3549 case nir_intrinsic_quad_swap_horizontal:
3550 result = ac_build_quad_swizzle(&ctx->ac, get_src(ctx, instr->src[0]), 1, 0, 3 ,2);
3551 break;
3552 case nir_intrinsic_quad_swap_vertical:
3553 result = ac_build_quad_swizzle(&ctx->ac, get_src(ctx, instr->src[0]), 2, 3, 0 ,1);
3554 break;
3555 case nir_intrinsic_quad_swap_diagonal:
3556 result = ac_build_quad_swizzle(&ctx->ac, get_src(ctx, instr->src[0]), 3, 2, 1 ,0);
3557 break;
3558 case nir_intrinsic_quad_swizzle_amd: {
3559 uint32_t mask = nir_intrinsic_swizzle_mask(instr);
3560 result = ac_build_quad_swizzle(&ctx->ac, get_src(ctx, instr->src[0]),
3561 mask & 0x3, (mask >> 2) & 0x3,
3562 (mask >> 4) & 0x3, (mask >> 6) & 0x3);
3563 break;
3564 }
3565 case nir_intrinsic_masked_swizzle_amd: {
3566 uint32_t mask = nir_intrinsic_swizzle_mask(instr);
3567 result = ac_build_ds_swizzle(&ctx->ac, get_src(ctx, instr->src[0]), mask);
3568 break;
3569 }
3570 case nir_intrinsic_write_invocation_amd:
3571 result = ac_build_writelane(&ctx->ac, get_src(ctx, instr->src[0]),
3572 get_src(ctx, instr->src[1]),
3573 get_src(ctx, instr->src[2]));
3574 break;
3575 case nir_intrinsic_mbcnt_amd:
3576 result = ac_build_mbcnt(&ctx->ac, get_src(ctx, instr->src[0]));
3577 break;
3578 case nir_intrinsic_load_scratch: {
3579 LLVMValueRef offset = get_src(ctx, instr->src[0]);
3580 LLVMValueRef ptr = ac_build_gep0(&ctx->ac, ctx->scratch,
3581 offset);
3582 LLVMTypeRef comp_type =
3583 LLVMIntTypeInContext(ctx->ac.context, instr->dest.ssa.bit_size);
3584 LLVMTypeRef vec_type =
3585 instr->dest.ssa.num_components == 1 ? comp_type :
3586 LLVMVectorType(comp_type, instr->dest.ssa.num_components);
3587 unsigned addr_space = LLVMGetPointerAddressSpace(LLVMTypeOf(ptr));
3588 ptr = LLVMBuildBitCast(ctx->ac.builder, ptr,
3589 LLVMPointerType(vec_type, addr_space), "");
3590 result = LLVMBuildLoad(ctx->ac.builder, ptr, "");
3591 break;
3592 }
3593 case nir_intrinsic_store_scratch: {
3594 LLVMValueRef offset = get_src(ctx, instr->src[1]);
3595 LLVMValueRef ptr = ac_build_gep0(&ctx->ac, ctx->scratch,
3596 offset);
3597 LLVMTypeRef comp_type =
3598 LLVMIntTypeInContext(ctx->ac.context, instr->src[0].ssa->bit_size);
3599 LLVMTypeRef vec_type =
3600 instr->src[0].ssa->num_components == 1 ? comp_type :
3601 LLVMVectorType(comp_type, instr->src[0].ssa->num_components);
3602 unsigned addr_space = LLVMGetPointerAddressSpace(LLVMTypeOf(ptr));
3603 ptr = LLVMBuildBitCast(ctx->ac.builder, ptr,
3604 LLVMPointerType(vec_type, addr_space), "");
3605 LLVMBuildStore(ctx->ac.builder, get_src(ctx, instr->src[0]), ptr);
3606 break;
3607 }
3608 default:
3609 fprintf(stderr, "Unknown intrinsic: ");
3610 nir_print_instr(&instr->instr, stderr);
3611 fprintf(stderr, "\n");
3612 break;
3613 }
3614 if (result) {
3615 ctx->ssa_defs[instr->dest.ssa.index] = result;
3616 }
3617 }
3618
3619 static LLVMValueRef get_bindless_index_from_uniform(struct ac_nir_context *ctx,
3620 unsigned base_index,
3621 unsigned constant_index,
3622 LLVMValueRef dynamic_index)
3623 {
3624 LLVMValueRef offset = LLVMConstInt(ctx->ac.i32, base_index * 4, 0);
3625 LLVMValueRef index = LLVMBuildAdd(ctx->ac.builder, dynamic_index,
3626 LLVMConstInt(ctx->ac.i32, constant_index, 0), "");
3627
3628 /* Bindless uniforms are 64bit so multiple index by 8 */
3629 index = LLVMBuildMul(ctx->ac.builder, index, LLVMConstInt(ctx->ac.i32, 8, 0), "");
3630 offset = LLVMBuildAdd(ctx->ac.builder, offset, index, "");
3631
3632 LLVMValueRef ubo_index = ctx->abi->load_ubo(ctx->abi, ctx->ac.i32_0);
3633
3634 LLVMValueRef ret = ac_build_buffer_load(&ctx->ac, ubo_index, 1, NULL, offset,
3635 NULL, 0, 0, true, true);
3636
3637 return LLVMBuildBitCast(ctx->ac.builder, ret, ctx->ac.i32, "");
3638 }
3639
3640 static LLVMValueRef get_sampler_desc(struct ac_nir_context *ctx,
3641 nir_deref_instr *deref_instr,
3642 enum ac_descriptor_type desc_type,
3643 const nir_instr *instr,
3644 bool image, bool write)
3645 {
3646 LLVMValueRef index = NULL;
3647 unsigned constant_index = 0;
3648 unsigned descriptor_set;
3649 unsigned base_index;
3650 bool bindless = false;
3651
3652 if (!deref_instr) {
3653 descriptor_set = 0;
3654 if (image) {
3655 nir_intrinsic_instr *img_instr = nir_instr_as_intrinsic(instr);
3656 base_index = 0;
3657 bindless = true;
3658 index = get_src(ctx, img_instr->src[0]);
3659 } else {
3660 nir_tex_instr *tex_instr = nir_instr_as_tex(instr);
3661 int sampSrcIdx = nir_tex_instr_src_index(tex_instr,
3662 nir_tex_src_sampler_handle);
3663 if (sampSrcIdx != -1) {
3664 base_index = 0;
3665 bindless = true;
3666 index = get_src(ctx, tex_instr->src[sampSrcIdx].src);
3667 } else {
3668 assert(tex_instr && !image);
3669 base_index = tex_instr->sampler_index;
3670 }
3671 }
3672 } else {
3673 while(deref_instr->deref_type != nir_deref_type_var) {
3674 if (deref_instr->deref_type == nir_deref_type_array) {
3675 unsigned array_size = glsl_get_aoa_size(deref_instr->type);
3676 if (!array_size)
3677 array_size = 1;
3678
3679 if (nir_src_is_const(deref_instr->arr.index)) {
3680 constant_index += array_size * nir_src_as_uint(deref_instr->arr.index);
3681 } else {
3682 LLVMValueRef indirect = get_src(ctx, deref_instr->arr.index);
3683
3684 indirect = LLVMBuildMul(ctx->ac.builder, indirect,
3685 LLVMConstInt(ctx->ac.i32, array_size, false), "");
3686
3687 if (!index)
3688 index = indirect;
3689 else
3690 index = LLVMBuildAdd(ctx->ac.builder, index, indirect, "");
3691 }
3692
3693 deref_instr = nir_src_as_deref(deref_instr->parent);
3694 } else if (deref_instr->deref_type == nir_deref_type_struct) {
3695 unsigned sidx = deref_instr->strct.index;
3696 deref_instr = nir_src_as_deref(deref_instr->parent);
3697 constant_index += glsl_get_struct_location_offset(deref_instr->type, sidx);
3698 } else {
3699 unreachable("Unsupported deref type");
3700 }
3701 }
3702 descriptor_set = deref_instr->var->data.descriptor_set;
3703
3704 if (deref_instr->var->data.bindless) {
3705 /* For now just assert on unhandled variable types */
3706 assert(deref_instr->var->data.mode == nir_var_uniform);
3707
3708 base_index = deref_instr->var->data.driver_location;
3709 bindless = true;
3710
3711 index = index ? index : ctx->ac.i32_0;
3712 index = get_bindless_index_from_uniform(ctx, base_index,
3713 constant_index, index);
3714 } else
3715 base_index = deref_instr->var->data.binding;
3716 }
3717
3718 return ctx->abi->load_sampler_desc(ctx->abi,
3719 descriptor_set,
3720 base_index,
3721 constant_index, index,
3722 desc_type, image, write, bindless);
3723 }
3724
3725 /* Disable anisotropic filtering if BASE_LEVEL == LAST_LEVEL.
3726 *
3727 * GFX6-GFX7:
3728 * If BASE_LEVEL == LAST_LEVEL, the shader must disable anisotropic
3729 * filtering manually. The driver sets img7 to a mask clearing
3730 * MAX_ANISO_RATIO if BASE_LEVEL == LAST_LEVEL. The shader must do:
3731 * s_and_b32 samp0, samp0, img7
3732 *
3733 * GFX8:
3734 * The ANISO_OVERRIDE sampler field enables this fix in TA.
3735 */
3736 static LLVMValueRef sici_fix_sampler_aniso(struct ac_nir_context *ctx,
3737 LLVMValueRef res, LLVMValueRef samp)
3738 {
3739 LLVMBuilderRef builder = ctx->ac.builder;
3740 LLVMValueRef img7, samp0;
3741
3742 if (ctx->ac.chip_class >= GFX8)
3743 return samp;
3744
3745 img7 = LLVMBuildExtractElement(builder, res,
3746 LLVMConstInt(ctx->ac.i32, 7, 0), "");
3747 samp0 = LLVMBuildExtractElement(builder, samp,
3748 LLVMConstInt(ctx->ac.i32, 0, 0), "");
3749 samp0 = LLVMBuildAnd(builder, samp0, img7, "");
3750 return LLVMBuildInsertElement(builder, samp, samp0,
3751 LLVMConstInt(ctx->ac.i32, 0, 0), "");
3752 }
3753
3754 static void tex_fetch_ptrs(struct ac_nir_context *ctx,
3755 nir_tex_instr *instr,
3756 LLVMValueRef *res_ptr, LLVMValueRef *samp_ptr,
3757 LLVMValueRef *fmask_ptr)
3758 {
3759 nir_deref_instr *texture_deref_instr = NULL;
3760 nir_deref_instr *sampler_deref_instr = NULL;
3761 int plane = -1;
3762
3763 for (unsigned i = 0; i < instr->num_srcs; i++) {
3764 switch (instr->src[i].src_type) {
3765 case nir_tex_src_texture_deref:
3766 texture_deref_instr = nir_src_as_deref(instr->src[i].src);
3767 break;
3768 case nir_tex_src_sampler_deref:
3769 sampler_deref_instr = nir_src_as_deref(instr->src[i].src);
3770 break;
3771 case nir_tex_src_plane:
3772 plane = nir_src_as_int(instr->src[i].src);
3773 break;
3774 default:
3775 break;
3776 }
3777 }
3778
3779 if (!sampler_deref_instr)
3780 sampler_deref_instr = texture_deref_instr;
3781
3782 enum ac_descriptor_type main_descriptor = instr->sampler_dim == GLSL_SAMPLER_DIM_BUF ? AC_DESC_BUFFER : AC_DESC_IMAGE;
3783
3784 if (plane >= 0) {
3785 assert(instr->op != nir_texop_txf_ms &&
3786 instr->op != nir_texop_samples_identical);
3787 assert(instr->sampler_dim != GLSL_SAMPLER_DIM_BUF);
3788
3789 main_descriptor = AC_DESC_PLANE_0 + plane;
3790 }
3791
3792 *res_ptr = get_sampler_desc(ctx, texture_deref_instr, main_descriptor, &instr->instr, false, false);
3793
3794 if (samp_ptr) {
3795 *samp_ptr = get_sampler_desc(ctx, sampler_deref_instr, AC_DESC_SAMPLER, &instr->instr, false, false);
3796 if (instr->sampler_dim < GLSL_SAMPLER_DIM_RECT)
3797 *samp_ptr = sici_fix_sampler_aniso(ctx, *res_ptr, *samp_ptr);
3798 }
3799 if (fmask_ptr && (instr->op == nir_texop_txf_ms ||
3800 instr->op == nir_texop_samples_identical))
3801 *fmask_ptr = get_sampler_desc(ctx, texture_deref_instr, AC_DESC_FMASK, &instr->instr, false, false);
3802 }
3803
3804 static LLVMValueRef apply_round_slice(struct ac_llvm_context *ctx,
3805 LLVMValueRef coord)
3806 {
3807 coord = ac_to_float(ctx, coord);
3808 coord = ac_build_round(ctx, coord);
3809 coord = ac_to_integer(ctx, coord);
3810 return coord;
3811 }
3812
3813 static void visit_tex(struct ac_nir_context *ctx, nir_tex_instr *instr)
3814 {
3815 LLVMValueRef result = NULL;
3816 struct ac_image_args args = { 0 };
3817 LLVMValueRef fmask_ptr = NULL, sample_index = NULL;
3818 LLVMValueRef ddx = NULL, ddy = NULL;
3819 unsigned offset_src = 0;
3820
3821 tex_fetch_ptrs(ctx, instr, &args.resource, &args.sampler, &fmask_ptr);
3822
3823 for (unsigned i = 0; i < instr->num_srcs; i++) {
3824 switch (instr->src[i].src_type) {
3825 case nir_tex_src_coord: {
3826 LLVMValueRef coord = get_src(ctx, instr->src[i].src);
3827 for (unsigned chan = 0; chan < instr->coord_components; ++chan)
3828 args.coords[chan] = ac_llvm_extract_elem(&ctx->ac, coord, chan);
3829 break;
3830 }
3831 case nir_tex_src_projector:
3832 break;
3833 case nir_tex_src_comparator:
3834 if (instr->is_shadow)
3835 args.compare = get_src(ctx, instr->src[i].src);
3836 break;
3837 case nir_tex_src_offset:
3838 args.offset = get_src(ctx, instr->src[i].src);
3839 offset_src = i;
3840 break;
3841 case nir_tex_src_bias:
3842 if (instr->op == nir_texop_txb)
3843 args.bias = get_src(ctx, instr->src[i].src);
3844 break;
3845 case nir_tex_src_lod: {
3846 if (nir_src_is_const(instr->src[i].src) && nir_src_as_uint(instr->src[i].src) == 0)
3847 args.level_zero = true;
3848 else
3849 args.lod = get_src(ctx, instr->src[i].src);
3850 break;
3851 }
3852 case nir_tex_src_ms_index:
3853 sample_index = get_src(ctx, instr->src[i].src);
3854 break;
3855 case nir_tex_src_ms_mcs:
3856 break;
3857 case nir_tex_src_ddx:
3858 ddx = get_src(ctx, instr->src[i].src);
3859 break;
3860 case nir_tex_src_ddy:
3861 ddy = get_src(ctx, instr->src[i].src);
3862 break;
3863 case nir_tex_src_texture_offset:
3864 case nir_tex_src_sampler_offset:
3865 case nir_tex_src_plane:
3866 default:
3867 break;
3868 }
3869 }
3870
3871 if (instr->op == nir_texop_txs && instr->sampler_dim == GLSL_SAMPLER_DIM_BUF) {
3872 result = get_buffer_size(ctx, args.resource, true);
3873 goto write_result;
3874 }
3875
3876 if (instr->op == nir_texop_texture_samples) {
3877 LLVMValueRef res, samples, is_msaa;
3878 res = LLVMBuildBitCast(ctx->ac.builder, args.resource, ctx->ac.v8i32, "");
3879 samples = LLVMBuildExtractElement(ctx->ac.builder, res,
3880 LLVMConstInt(ctx->ac.i32, 3, false), "");
3881 is_msaa = LLVMBuildLShr(ctx->ac.builder, samples,
3882 LLVMConstInt(ctx->ac.i32, 28, false), "");
3883 is_msaa = LLVMBuildAnd(ctx->ac.builder, is_msaa,
3884 LLVMConstInt(ctx->ac.i32, 0xe, false), "");
3885 is_msaa = LLVMBuildICmp(ctx->ac.builder, LLVMIntEQ, is_msaa,
3886 LLVMConstInt(ctx->ac.i32, 0xe, false), "");
3887
3888 samples = LLVMBuildLShr(ctx->ac.builder, samples,
3889 LLVMConstInt(ctx->ac.i32, 16, false), "");
3890 samples = LLVMBuildAnd(ctx->ac.builder, samples,
3891 LLVMConstInt(ctx->ac.i32, 0xf, false), "");
3892 samples = LLVMBuildShl(ctx->ac.builder, ctx->ac.i32_1,
3893 samples, "");
3894 samples = LLVMBuildSelect(ctx->ac.builder, is_msaa, samples,
3895 ctx->ac.i32_1, "");
3896 result = samples;
3897 goto write_result;
3898 }
3899
3900 if (args.offset && instr->op != nir_texop_txf && instr->op != nir_texop_txf_ms) {
3901 LLVMValueRef offset[3], pack;
3902 for (unsigned chan = 0; chan < 3; ++chan)
3903 offset[chan] = ctx->ac.i32_0;
3904
3905 unsigned num_components = ac_get_llvm_num_components(args.offset);
3906 for (unsigned chan = 0; chan < num_components; chan++) {
3907 offset[chan] = ac_llvm_extract_elem(&ctx->ac, args.offset, chan);
3908 offset[chan] = LLVMBuildAnd(ctx->ac.builder, offset[chan],
3909 LLVMConstInt(ctx->ac.i32, 0x3f, false), "");
3910 if (chan)
3911 offset[chan] = LLVMBuildShl(ctx->ac.builder, offset[chan],
3912 LLVMConstInt(ctx->ac.i32, chan * 8, false), "");
3913 }
3914 pack = LLVMBuildOr(ctx->ac.builder, offset[0], offset[1], "");
3915 pack = LLVMBuildOr(ctx->ac.builder, pack, offset[2], "");
3916 args.offset = pack;
3917 }
3918
3919 /* TC-compatible HTILE on radeonsi promotes Z16 and Z24 to Z32_FLOAT,
3920 * so the depth comparison value isn't clamped for Z16 and
3921 * Z24 anymore. Do it manually here for GFX8-9; GFX10 has an explicitly
3922 * clamped 32-bit float format.
3923 *
3924 * It's unnecessary if the original texture format was
3925 * Z32_FLOAT, but we don't know that here.
3926 */
3927 if (args.compare &&
3928 ctx->ac.chip_class >= GFX8 &&
3929 ctx->ac.chip_class <= GFX9 &&
3930 ctx->abi->clamp_shadow_reference)
3931 args.compare = ac_build_clamp(&ctx->ac, ac_to_float(&ctx->ac, args.compare));
3932
3933 /* pack derivatives */
3934 if (ddx || ddy) {
3935 int num_src_deriv_channels, num_dest_deriv_channels;
3936 switch (instr->sampler_dim) {
3937 case GLSL_SAMPLER_DIM_3D:
3938 case GLSL_SAMPLER_DIM_CUBE:
3939 num_src_deriv_channels = 3;
3940 num_dest_deriv_channels = 3;
3941 break;
3942 case GLSL_SAMPLER_DIM_2D:
3943 default:
3944 num_src_deriv_channels = 2;
3945 num_dest_deriv_channels = 2;
3946 break;
3947 case GLSL_SAMPLER_DIM_1D:
3948 num_src_deriv_channels = 1;
3949 if (ctx->ac.chip_class == GFX9) {
3950 num_dest_deriv_channels = 2;
3951 } else {
3952 num_dest_deriv_channels = 1;
3953 }
3954 break;
3955 }
3956
3957 for (unsigned i = 0; i < num_src_deriv_channels; i++) {
3958 args.derivs[i] = ac_to_float(&ctx->ac,
3959 ac_llvm_extract_elem(&ctx->ac, ddx, i));
3960 args.derivs[num_dest_deriv_channels + i] = ac_to_float(&ctx->ac,
3961 ac_llvm_extract_elem(&ctx->ac, ddy, i));
3962 }
3963 for (unsigned i = num_src_deriv_channels; i < num_dest_deriv_channels; i++) {
3964 args.derivs[i] = ctx->ac.f32_0;
3965 args.derivs[num_dest_deriv_channels + i] = ctx->ac.f32_0;
3966 }
3967 }
3968
3969 if (instr->sampler_dim == GLSL_SAMPLER_DIM_CUBE && args.coords[0]) {
3970 for (unsigned chan = 0; chan < instr->coord_components; chan++)
3971 args.coords[chan] = ac_to_float(&ctx->ac, args.coords[chan]);
3972 if (instr->coord_components == 3)
3973 args.coords[3] = LLVMGetUndef(ctx->ac.f32);
3974 ac_prepare_cube_coords(&ctx->ac,
3975 instr->op == nir_texop_txd, instr->is_array,
3976 instr->op == nir_texop_lod, args.coords, args.derivs);
3977 }
3978
3979 /* Texture coordinates fixups */
3980 if (instr->coord_components > 1 &&
3981 instr->sampler_dim == GLSL_SAMPLER_DIM_1D &&
3982 instr->is_array &&
3983 instr->op != nir_texop_txf) {
3984 args.coords[1] = apply_round_slice(&ctx->ac, args.coords[1]);
3985 }
3986
3987 if (instr->coord_components > 2 &&
3988 (instr->sampler_dim == GLSL_SAMPLER_DIM_2D ||
3989 instr->sampler_dim == GLSL_SAMPLER_DIM_MS ||
3990 instr->sampler_dim == GLSL_SAMPLER_DIM_SUBPASS ||
3991 instr->sampler_dim == GLSL_SAMPLER_DIM_SUBPASS_MS) &&
3992 instr->is_array &&
3993 instr->op != nir_texop_txf && instr->op != nir_texop_txf_ms) {
3994 args.coords[2] = apply_round_slice(&ctx->ac, args.coords[2]);
3995 }
3996
3997 if (ctx->ac.chip_class == GFX9 &&
3998 instr->sampler_dim == GLSL_SAMPLER_DIM_1D &&
3999 instr->op != nir_texop_lod) {
4000 LLVMValueRef filler;
4001 if (instr->op == nir_texop_txf)
4002 filler = ctx->ac.i32_0;
4003 else
4004 filler = LLVMConstReal(ctx->ac.f32, 0.5);
4005
4006 if (instr->is_array)
4007 args.coords[2] = args.coords[1];
4008 args.coords[1] = filler;
4009 }
4010
4011 /* Pack sample index */
4012 if (instr->op == nir_texop_txf_ms && sample_index)
4013 args.coords[instr->coord_components] = sample_index;
4014
4015 if (instr->op == nir_texop_samples_identical) {
4016 struct ac_image_args txf_args = { 0 };
4017 memcpy(txf_args.coords, args.coords, sizeof(txf_args.coords));
4018
4019 txf_args.dmask = 0xf;
4020 txf_args.resource = fmask_ptr;
4021 txf_args.dim = instr->is_array ? ac_image_2darray : ac_image_2d;
4022 result = build_tex_intrinsic(ctx, instr, &txf_args);
4023
4024 result = LLVMBuildExtractElement(ctx->ac.builder, result, ctx->ac.i32_0, "");
4025 result = emit_int_cmp(&ctx->ac, LLVMIntEQ, result, ctx->ac.i32_0);
4026 goto write_result;
4027 }
4028
4029 if ((instr->sampler_dim == GLSL_SAMPLER_DIM_SUBPASS_MS ||
4030 instr->sampler_dim == GLSL_SAMPLER_DIM_MS) &&
4031 instr->op != nir_texop_txs) {
4032 unsigned sample_chan = instr->is_array ? 3 : 2;
4033 args.coords[sample_chan] = adjust_sample_index_using_fmask(
4034 &ctx->ac, args.coords[0], args.coords[1],
4035 instr->is_array ? args.coords[2] : NULL,
4036 args.coords[sample_chan], fmask_ptr);
4037 }
4038
4039 if (args.offset && (instr->op == nir_texop_txf || instr->op == nir_texop_txf_ms)) {
4040 int num_offsets = instr->src[offset_src].src.ssa->num_components;
4041 num_offsets = MIN2(num_offsets, instr->coord_components);
4042 for (unsigned i = 0; i < num_offsets; ++i) {
4043 args.coords[i] = LLVMBuildAdd(
4044 ctx->ac.builder, args.coords[i],
4045 LLVMConstInt(ctx->ac.i32, nir_src_comp_as_uint(instr->src[offset_src].src, i), false), "");
4046 }
4047 args.offset = NULL;
4048 }
4049
4050 /* DMASK was repurposed for GATHER4. 4 components are always
4051 * returned and DMASK works like a swizzle - it selects
4052 * the component to fetch. The only valid DMASK values are
4053 * 1=red, 2=green, 4=blue, 8=alpha. (e.g. 1 returns
4054 * (red,red,red,red) etc.) The ISA document doesn't mention
4055 * this.
4056 */
4057 args.dmask = 0xf;
4058 if (instr->op == nir_texop_tg4) {
4059 if (instr->is_shadow)
4060 args.dmask = 1;
4061 else
4062 args.dmask = 1 << instr->component;
4063 }
4064
4065 if (instr->sampler_dim != GLSL_SAMPLER_DIM_BUF)
4066 args.dim = get_ac_sampler_dim(&ctx->ac, instr->sampler_dim, instr->is_array);
4067 result = build_tex_intrinsic(ctx, instr, &args);
4068
4069 if (instr->op == nir_texop_query_levels)
4070 result = LLVMBuildExtractElement(ctx->ac.builder, result, LLVMConstInt(ctx->ac.i32, 3, false), "");
4071 else if (instr->is_shadow && instr->is_new_style_shadow &&
4072 instr->op != nir_texop_txs && instr->op != nir_texop_lod &&
4073 instr->op != nir_texop_tg4)
4074 result = LLVMBuildExtractElement(ctx->ac.builder, result, ctx->ac.i32_0, "");
4075 else if (instr->op == nir_texop_txs &&
4076 instr->sampler_dim == GLSL_SAMPLER_DIM_CUBE &&
4077 instr->is_array) {
4078 LLVMValueRef two = LLVMConstInt(ctx->ac.i32, 2, false);
4079 LLVMValueRef six = LLVMConstInt(ctx->ac.i32, 6, false);
4080 LLVMValueRef z = LLVMBuildExtractElement(ctx->ac.builder, result, two, "");
4081 z = LLVMBuildSDiv(ctx->ac.builder, z, six, "");
4082 result = LLVMBuildInsertElement(ctx->ac.builder, result, z, two, "");
4083 } else if (ctx->ac.chip_class == GFX9 &&
4084 instr->op == nir_texop_txs &&
4085 instr->sampler_dim == GLSL_SAMPLER_DIM_1D &&
4086 instr->is_array) {
4087 LLVMValueRef two = LLVMConstInt(ctx->ac.i32, 2, false);
4088 LLVMValueRef layers = LLVMBuildExtractElement(ctx->ac.builder, result, two, "");
4089 result = LLVMBuildInsertElement(ctx->ac.builder, result, layers,
4090 ctx->ac.i32_1, "");
4091 } else if (instr->dest.ssa.num_components != 4)
4092 result = ac_trim_vector(&ctx->ac, result, instr->dest.ssa.num_components);
4093
4094 write_result:
4095 if (result) {
4096 assert(instr->dest.is_ssa);
4097 result = ac_to_integer(&ctx->ac, result);
4098 ctx->ssa_defs[instr->dest.ssa.index] = result;
4099 }
4100 }
4101
4102
4103 static void visit_phi(struct ac_nir_context *ctx, nir_phi_instr *instr)
4104 {
4105 LLVMTypeRef type = get_def_type(ctx, &instr->dest.ssa);
4106 LLVMValueRef result = LLVMBuildPhi(ctx->ac.builder, type, "");
4107
4108 ctx->ssa_defs[instr->dest.ssa.index] = result;
4109 _mesa_hash_table_insert(ctx->phis, instr, result);
4110 }
4111
4112 static void visit_post_phi(struct ac_nir_context *ctx,
4113 nir_phi_instr *instr,
4114 LLVMValueRef llvm_phi)
4115 {
4116 nir_foreach_phi_src(src, instr) {
4117 LLVMBasicBlockRef block = get_block(ctx, src->pred);
4118 LLVMValueRef llvm_src = get_src(ctx, src->src);
4119
4120 LLVMAddIncoming(llvm_phi, &llvm_src, &block, 1);
4121 }
4122 }
4123
4124 static void phi_post_pass(struct ac_nir_context *ctx)
4125 {
4126 hash_table_foreach(ctx->phis, entry) {
4127 visit_post_phi(ctx, (nir_phi_instr*)entry->key,
4128 (LLVMValueRef)entry->data);
4129 }
4130 }
4131
4132
4133 static void visit_ssa_undef(struct ac_nir_context *ctx,
4134 const nir_ssa_undef_instr *instr)
4135 {
4136 unsigned num_components = instr->def.num_components;
4137 LLVMTypeRef type = LLVMIntTypeInContext(ctx->ac.context, instr->def.bit_size);
4138 LLVMValueRef undef;
4139
4140 if (num_components == 1)
4141 undef = LLVMGetUndef(type);
4142 else {
4143 undef = LLVMGetUndef(LLVMVectorType(type, num_components));
4144 }
4145 ctx->ssa_defs[instr->def.index] = undef;
4146 }
4147
4148 static void visit_jump(struct ac_llvm_context *ctx,
4149 const nir_jump_instr *instr)
4150 {
4151 switch (instr->type) {
4152 case nir_jump_break:
4153 ac_build_break(ctx);
4154 break;
4155 case nir_jump_continue:
4156 ac_build_continue(ctx);
4157 break;
4158 default:
4159 fprintf(stderr, "Unknown NIR jump instr: ");
4160 nir_print_instr(&instr->instr, stderr);
4161 fprintf(stderr, "\n");
4162 abort();
4163 }
4164 }
4165
4166 static LLVMTypeRef
4167 glsl_base_to_llvm_type(struct ac_llvm_context *ac,
4168 enum glsl_base_type type)
4169 {
4170 switch (type) {
4171 case GLSL_TYPE_INT:
4172 case GLSL_TYPE_UINT:
4173 case GLSL_TYPE_BOOL:
4174 case GLSL_TYPE_SUBROUTINE:
4175 return ac->i32;
4176 case GLSL_TYPE_INT8:
4177 case GLSL_TYPE_UINT8:
4178 return ac->i8;
4179 case GLSL_TYPE_INT16:
4180 case GLSL_TYPE_UINT16:
4181 return ac->i16;
4182 case GLSL_TYPE_FLOAT:
4183 return ac->f32;
4184 case GLSL_TYPE_FLOAT16:
4185 return ac->f16;
4186 case GLSL_TYPE_INT64:
4187 case GLSL_TYPE_UINT64:
4188 return ac->i64;
4189 case GLSL_TYPE_DOUBLE:
4190 return ac->f64;
4191 default:
4192 unreachable("unknown GLSL type");
4193 }
4194 }
4195
4196 static LLVMTypeRef
4197 glsl_to_llvm_type(struct ac_llvm_context *ac,
4198 const struct glsl_type *type)
4199 {
4200 if (glsl_type_is_scalar(type)) {
4201 return glsl_base_to_llvm_type(ac, glsl_get_base_type(type));
4202 }
4203
4204 if (glsl_type_is_vector(type)) {
4205 return LLVMVectorType(
4206 glsl_base_to_llvm_type(ac, glsl_get_base_type(type)),
4207 glsl_get_vector_elements(type));
4208 }
4209
4210 if (glsl_type_is_matrix(type)) {
4211 return LLVMArrayType(
4212 glsl_to_llvm_type(ac, glsl_get_column_type(type)),
4213 glsl_get_matrix_columns(type));
4214 }
4215
4216 if (glsl_type_is_array(type)) {
4217 return LLVMArrayType(
4218 glsl_to_llvm_type(ac, glsl_get_array_element(type)),
4219 glsl_get_length(type));
4220 }
4221
4222 assert(glsl_type_is_struct_or_ifc(type));
4223
4224 LLVMTypeRef member_types[glsl_get_length(type)];
4225
4226 for (unsigned i = 0; i < glsl_get_length(type); i++) {
4227 member_types[i] =
4228 glsl_to_llvm_type(ac,
4229 glsl_get_struct_field(type, i));
4230 }
4231
4232 return LLVMStructTypeInContext(ac->context, member_types,
4233 glsl_get_length(type), false);
4234 }
4235
4236 static void visit_deref(struct ac_nir_context *ctx,
4237 nir_deref_instr *instr)
4238 {
4239 if (instr->mode != nir_var_mem_shared &&
4240 instr->mode != nir_var_mem_global)
4241 return;
4242
4243 LLVMValueRef result = NULL;
4244 switch(instr->deref_type) {
4245 case nir_deref_type_var: {
4246 struct hash_entry *entry = _mesa_hash_table_search(ctx->vars, instr->var);
4247 result = entry->data;
4248 break;
4249 }
4250 case nir_deref_type_struct:
4251 if (instr->mode == nir_var_mem_global) {
4252 nir_deref_instr *parent = nir_deref_instr_parent(instr);
4253 uint64_t offset = glsl_get_struct_field_offset(parent->type,
4254 instr->strct.index);
4255 result = ac_build_gep_ptr(&ctx->ac, get_src(ctx, instr->parent),
4256 LLVMConstInt(ctx->ac.i32, offset, 0));
4257 } else {
4258 result = ac_build_gep0(&ctx->ac, get_src(ctx, instr->parent),
4259 LLVMConstInt(ctx->ac.i32, instr->strct.index, 0));
4260 }
4261 break;
4262 case nir_deref_type_array:
4263 if (instr->mode == nir_var_mem_global) {
4264 nir_deref_instr *parent = nir_deref_instr_parent(instr);
4265 unsigned stride = glsl_get_explicit_stride(parent->type);
4266
4267 if ((glsl_type_is_matrix(parent->type) &&
4268 glsl_matrix_type_is_row_major(parent->type)) ||
4269 (glsl_type_is_vector(parent->type) && stride == 0))
4270 stride = type_scalar_size_bytes(parent->type);
4271
4272 assert(stride > 0);
4273 LLVMValueRef index = get_src(ctx, instr->arr.index);
4274 if (LLVMTypeOf(index) != ctx->ac.i64)
4275 index = LLVMBuildZExt(ctx->ac.builder, index, ctx->ac.i64, "");
4276
4277 LLVMValueRef offset = LLVMBuildMul(ctx->ac.builder, index, LLVMConstInt(ctx->ac.i64, stride, 0), "");
4278
4279 result = ac_build_gep_ptr(&ctx->ac, get_src(ctx, instr->parent), offset);
4280 } else {
4281 result = ac_build_gep0(&ctx->ac, get_src(ctx, instr->parent),
4282 get_src(ctx, instr->arr.index));
4283 }
4284 break;
4285 case nir_deref_type_ptr_as_array:
4286 if (instr->mode == nir_var_mem_global) {
4287 unsigned stride = nir_deref_instr_ptr_as_array_stride(instr);
4288
4289 LLVMValueRef index = get_src(ctx, instr->arr.index);
4290 if (LLVMTypeOf(index) != ctx->ac.i64)
4291 index = LLVMBuildZExt(ctx->ac.builder, index, ctx->ac.i64, "");
4292
4293 LLVMValueRef offset = LLVMBuildMul(ctx->ac.builder, index, LLVMConstInt(ctx->ac.i64, stride, 0), "");
4294
4295 result = ac_build_gep_ptr(&ctx->ac, get_src(ctx, instr->parent), offset);
4296 } else {
4297 result = ac_build_gep_ptr(&ctx->ac, get_src(ctx, instr->parent),
4298 get_src(ctx, instr->arr.index));
4299 }
4300 break;
4301 case nir_deref_type_cast: {
4302 result = get_src(ctx, instr->parent);
4303
4304 /* We can't use the structs from LLVM because the shader
4305 * specifies its own offsets. */
4306 LLVMTypeRef pointee_type = ctx->ac.i8;
4307 if (instr->mode == nir_var_mem_shared)
4308 pointee_type = glsl_to_llvm_type(&ctx->ac, instr->type);
4309
4310 unsigned address_space;
4311
4312 switch(instr->mode) {
4313 case nir_var_mem_shared:
4314 address_space = AC_ADDR_SPACE_LDS;
4315 break;
4316 case nir_var_mem_global:
4317 address_space = AC_ADDR_SPACE_GLOBAL;
4318 break;
4319 default:
4320 unreachable("Unhandled address space");
4321 }
4322
4323 LLVMTypeRef type = LLVMPointerType(pointee_type, address_space);
4324
4325 if (LLVMTypeOf(result) != type) {
4326 if (LLVMGetTypeKind(LLVMTypeOf(result)) == LLVMVectorTypeKind) {
4327 result = LLVMBuildBitCast(ctx->ac.builder, result,
4328 type, "");
4329 } else {
4330 result = LLVMBuildIntToPtr(ctx->ac.builder, result,
4331 type, "");
4332 }
4333 }
4334 break;
4335 }
4336 default:
4337 unreachable("Unhandled deref_instr deref type");
4338 }
4339
4340 ctx->ssa_defs[instr->dest.ssa.index] = result;
4341 }
4342
4343 static void visit_cf_list(struct ac_nir_context *ctx,
4344 struct exec_list *list);
4345
4346 static void visit_block(struct ac_nir_context *ctx, nir_block *block)
4347 {
4348 nir_foreach_instr(instr, block)
4349 {
4350 switch (instr->type) {
4351 case nir_instr_type_alu:
4352 visit_alu(ctx, nir_instr_as_alu(instr));
4353 break;
4354 case nir_instr_type_load_const:
4355 visit_load_const(ctx, nir_instr_as_load_const(instr));
4356 break;
4357 case nir_instr_type_intrinsic:
4358 visit_intrinsic(ctx, nir_instr_as_intrinsic(instr));
4359 break;
4360 case nir_instr_type_tex:
4361 visit_tex(ctx, nir_instr_as_tex(instr));
4362 break;
4363 case nir_instr_type_phi:
4364 visit_phi(ctx, nir_instr_as_phi(instr));
4365 break;
4366 case nir_instr_type_ssa_undef:
4367 visit_ssa_undef(ctx, nir_instr_as_ssa_undef(instr));
4368 break;
4369 case nir_instr_type_jump:
4370 visit_jump(&ctx->ac, nir_instr_as_jump(instr));
4371 break;
4372 case nir_instr_type_deref:
4373 visit_deref(ctx, nir_instr_as_deref(instr));
4374 break;
4375 default:
4376 fprintf(stderr, "Unknown NIR instr type: ");
4377 nir_print_instr(instr, stderr);
4378 fprintf(stderr, "\n");
4379 abort();
4380 }
4381 }
4382
4383 _mesa_hash_table_insert(ctx->defs, block,
4384 LLVMGetInsertBlock(ctx->ac.builder));
4385 }
4386
4387 static void visit_if(struct ac_nir_context *ctx, nir_if *if_stmt)
4388 {
4389 LLVMValueRef value = get_src(ctx, if_stmt->condition);
4390
4391 nir_block *then_block =
4392 (nir_block *) exec_list_get_head(&if_stmt->then_list);
4393
4394 ac_build_uif(&ctx->ac, value, then_block->index);
4395
4396 visit_cf_list(ctx, &if_stmt->then_list);
4397
4398 if (!exec_list_is_empty(&if_stmt->else_list)) {
4399 nir_block *else_block =
4400 (nir_block *) exec_list_get_head(&if_stmt->else_list);
4401
4402 ac_build_else(&ctx->ac, else_block->index);
4403 visit_cf_list(ctx, &if_stmt->else_list);
4404 }
4405
4406 ac_build_endif(&ctx->ac, then_block->index);
4407 }
4408
4409 static void visit_loop(struct ac_nir_context *ctx, nir_loop *loop)
4410 {
4411 nir_block *first_loop_block =
4412 (nir_block *) exec_list_get_head(&loop->body);
4413
4414 ac_build_bgnloop(&ctx->ac, first_loop_block->index);
4415
4416 visit_cf_list(ctx, &loop->body);
4417
4418 ac_build_endloop(&ctx->ac, first_loop_block->index);
4419 }
4420
4421 static void visit_cf_list(struct ac_nir_context *ctx,
4422 struct exec_list *list)
4423 {
4424 foreach_list_typed(nir_cf_node, node, node, list)
4425 {
4426 switch (node->type) {
4427 case nir_cf_node_block:
4428 visit_block(ctx, nir_cf_node_as_block(node));
4429 break;
4430
4431 case nir_cf_node_if:
4432 visit_if(ctx, nir_cf_node_as_if(node));
4433 break;
4434
4435 case nir_cf_node_loop:
4436 visit_loop(ctx, nir_cf_node_as_loop(node));
4437 break;
4438
4439 default:
4440 assert(0);
4441 }
4442 }
4443 }
4444
4445 void
4446 ac_handle_shader_output_decl(struct ac_llvm_context *ctx,
4447 struct ac_shader_abi *abi,
4448 struct nir_shader *nir,
4449 struct nir_variable *variable,
4450 gl_shader_stage stage)
4451 {
4452 unsigned output_loc = variable->data.driver_location / 4;
4453 unsigned attrib_count = glsl_count_attribute_slots(variable->type, false);
4454
4455 /* tess ctrl has it's own load/store paths for outputs */
4456 if (stage == MESA_SHADER_TESS_CTRL)
4457 return;
4458
4459 if (stage == MESA_SHADER_VERTEX ||
4460 stage == MESA_SHADER_TESS_EVAL ||
4461 stage == MESA_SHADER_GEOMETRY) {
4462 int idx = variable->data.location + variable->data.index;
4463 if (idx == VARYING_SLOT_CLIP_DIST0) {
4464 int length = nir->info.clip_distance_array_size +
4465 nir->info.cull_distance_array_size;
4466
4467 if (length > 4)
4468 attrib_count = 2;
4469 else
4470 attrib_count = 1;
4471 }
4472 }
4473
4474 bool is_16bit = glsl_type_is_16bit(glsl_without_array(variable->type));
4475 LLVMTypeRef type = is_16bit ? ctx->f16 : ctx->f32;
4476 for (unsigned i = 0; i < attrib_count; ++i) {
4477 for (unsigned chan = 0; chan < 4; chan++) {
4478 abi->outputs[ac_llvm_reg_index_soa(output_loc + i, chan)] =
4479 ac_build_alloca_undef(ctx, type, "");
4480 }
4481 }
4482 }
4483
4484 static void
4485 setup_locals(struct ac_nir_context *ctx,
4486 struct nir_function *func)
4487 {
4488 int i, j;
4489 ctx->num_locals = 0;
4490 nir_foreach_variable(variable, &func->impl->locals) {
4491 unsigned attrib_count = glsl_count_attribute_slots(variable->type, false);
4492 variable->data.driver_location = ctx->num_locals * 4;
4493 variable->data.location_frac = 0;
4494 ctx->num_locals += attrib_count;
4495 }
4496 ctx->locals = malloc(4 * ctx->num_locals * sizeof(LLVMValueRef));
4497 if (!ctx->locals)
4498 return;
4499
4500 for (i = 0; i < ctx->num_locals; i++) {
4501 for (j = 0; j < 4; j++) {
4502 ctx->locals[i * 4 + j] =
4503 ac_build_alloca_undef(&ctx->ac, ctx->ac.f32, "temp");
4504 }
4505 }
4506 }
4507
4508 static void
4509 setup_scratch(struct ac_nir_context *ctx,
4510 struct nir_shader *shader)
4511 {
4512 if (shader->scratch_size == 0)
4513 return;
4514
4515 ctx->scratch = ac_build_alloca_undef(&ctx->ac,
4516 LLVMArrayType(ctx->ac.i8, shader->scratch_size),
4517 "scratch");
4518 }
4519
4520 static void
4521 setup_shared(struct ac_nir_context *ctx,
4522 struct nir_shader *nir)
4523 {
4524 nir_foreach_variable(variable, &nir->shared) {
4525 LLVMValueRef shared =
4526 LLVMAddGlobalInAddressSpace(
4527 ctx->ac.module, glsl_to_llvm_type(&ctx->ac, variable->type),
4528 variable->name ? variable->name : "",
4529 AC_ADDR_SPACE_LDS);
4530 _mesa_hash_table_insert(ctx->vars, variable, shared);
4531 }
4532 }
4533
4534 void ac_nir_translate(struct ac_llvm_context *ac, struct ac_shader_abi *abi,
4535 struct nir_shader *nir)
4536 {
4537 struct ac_nir_context ctx = {};
4538 struct nir_function *func;
4539
4540 ctx.ac = *ac;
4541 ctx.abi = abi;
4542
4543 ctx.stage = nir->info.stage;
4544 ctx.info = &nir->info;
4545
4546 ctx.main_function = LLVMGetBasicBlockParent(LLVMGetInsertBlock(ctx.ac.builder));
4547
4548 nir_foreach_variable(variable, &nir->outputs)
4549 ac_handle_shader_output_decl(&ctx.ac, ctx.abi, nir, variable,
4550 ctx.stage);
4551
4552 ctx.defs = _mesa_hash_table_create(NULL, _mesa_hash_pointer,
4553 _mesa_key_pointer_equal);
4554 ctx.phis = _mesa_hash_table_create(NULL, _mesa_hash_pointer,
4555 _mesa_key_pointer_equal);
4556 ctx.vars = _mesa_hash_table_create(NULL, _mesa_hash_pointer,
4557 _mesa_key_pointer_equal);
4558
4559 func = (struct nir_function *)exec_list_get_head(&nir->functions);
4560
4561 nir_index_ssa_defs(func->impl);
4562 ctx.ssa_defs = calloc(func->impl->ssa_alloc, sizeof(LLVMValueRef));
4563
4564 setup_locals(&ctx, func);
4565 setup_scratch(&ctx, nir);
4566
4567 if (gl_shader_stage_is_compute(nir->info.stage))
4568 setup_shared(&ctx, nir);
4569
4570 visit_cf_list(&ctx, &func->impl->body);
4571 phi_post_pass(&ctx);
4572
4573 if (!gl_shader_stage_is_compute(nir->info.stage))
4574 ctx.abi->emit_outputs(ctx.abi, AC_LLVM_MAX_OUTPUTS,
4575 ctx.abi->outputs);
4576
4577 free(ctx.locals);
4578 free(ctx.ssa_defs);
4579 ralloc_free(ctx.defs);
4580 ralloc_free(ctx.phis);
4581 ralloc_free(ctx.vars);
4582 }
4583
4584 void
4585 ac_lower_indirect_derefs(struct nir_shader *nir, enum chip_class chip_class)
4586 {
4587 /* Lower large variables to scratch first so that we won't bloat the
4588 * shader by generating large if ladders for them. We later lower
4589 * scratch to alloca's, assuming LLVM won't generate VGPR indexing.
4590 */
4591 NIR_PASS_V(nir, nir_lower_vars_to_scratch,
4592 nir_var_function_temp,
4593 256,
4594 glsl_get_natural_size_align_bytes);
4595
4596 /* While it would be nice not to have this flag, we are constrained
4597 * by the reality that LLVM 9.0 has buggy VGPR indexing on GFX9.
4598 */
4599 bool llvm_has_working_vgpr_indexing = chip_class != GFX9;
4600
4601 /* TODO: Indirect indexing of GS inputs is unimplemented.
4602 *
4603 * TCS and TES load inputs directly from LDS or offchip memory, so
4604 * indirect indexing is trivial.
4605 */
4606 nir_variable_mode indirect_mask = 0;
4607 if (nir->info.stage == MESA_SHADER_GEOMETRY ||
4608 (nir->info.stage != MESA_SHADER_TESS_CTRL &&
4609 nir->info.stage != MESA_SHADER_TESS_EVAL &&
4610 !llvm_has_working_vgpr_indexing)) {
4611 indirect_mask |= nir_var_shader_in;
4612 }
4613 if (!llvm_has_working_vgpr_indexing &&
4614 nir->info.stage != MESA_SHADER_TESS_CTRL)
4615 indirect_mask |= nir_var_shader_out;
4616
4617 /* TODO: We shouldn't need to do this, however LLVM isn't currently
4618 * smart enough to handle indirects without causing excess spilling
4619 * causing the gpu to hang.
4620 *
4621 * See the following thread for more details of the problem:
4622 * https://lists.freedesktop.org/archives/mesa-dev/2017-July/162106.html
4623 */
4624 indirect_mask |= nir_var_function_temp;
4625
4626 nir_lower_indirect_derefs(nir, indirect_mask);
4627 }
4628
4629 static unsigned
4630 get_inst_tessfactor_writemask(nir_intrinsic_instr *intrin)
4631 {
4632 if (intrin->intrinsic != nir_intrinsic_store_deref)
4633 return 0;
4634
4635 nir_variable *var =
4636 nir_deref_instr_get_variable(nir_src_as_deref(intrin->src[0]));
4637
4638 if (var->data.mode != nir_var_shader_out)
4639 return 0;
4640
4641 unsigned writemask = 0;
4642 const int location = var->data.location;
4643 unsigned first_component = var->data.location_frac;
4644 unsigned num_comps = intrin->dest.ssa.num_components;
4645
4646 if (location == VARYING_SLOT_TESS_LEVEL_INNER)
4647 writemask = ((1 << (num_comps + 1)) - 1) << first_component;
4648 else if (location == VARYING_SLOT_TESS_LEVEL_OUTER)
4649 writemask = (((1 << (num_comps + 1)) - 1) << first_component) << 4;
4650
4651 return writemask;
4652 }
4653
4654 static void
4655 scan_tess_ctrl(nir_cf_node *cf_node, unsigned *upper_block_tf_writemask,
4656 unsigned *cond_block_tf_writemask,
4657 bool *tessfactors_are_def_in_all_invocs, bool is_nested_cf)
4658 {
4659 switch (cf_node->type) {
4660 case nir_cf_node_block: {
4661 nir_block *block = nir_cf_node_as_block(cf_node);
4662 nir_foreach_instr(instr, block) {
4663 if (instr->type != nir_instr_type_intrinsic)
4664 continue;
4665
4666 nir_intrinsic_instr *intrin = nir_instr_as_intrinsic(instr);
4667 if (intrin->intrinsic == nir_intrinsic_barrier) {
4668
4669 /* If we find a barrier in nested control flow put this in the
4670 * too hard basket. In GLSL this is not possible but it is in
4671 * SPIR-V.
4672 */
4673 if (is_nested_cf) {
4674 *tessfactors_are_def_in_all_invocs = false;
4675 return;
4676 }
4677
4678 /* The following case must be prevented:
4679 * gl_TessLevelInner = ...;
4680 * barrier();
4681 * if (gl_InvocationID == 1)
4682 * gl_TessLevelInner = ...;
4683 *
4684 * If you consider disjoint code segments separated by barriers, each
4685 * such segment that writes tess factor channels should write the same
4686 * channels in all codepaths within that segment.
4687 */
4688 if (upper_block_tf_writemask || cond_block_tf_writemask) {
4689 /* Accumulate the result: */
4690 *tessfactors_are_def_in_all_invocs &=
4691 !(*cond_block_tf_writemask & ~(*upper_block_tf_writemask));
4692
4693 /* Analyze the next code segment from scratch. */
4694 *upper_block_tf_writemask = 0;
4695 *cond_block_tf_writemask = 0;
4696 }
4697 } else
4698 *upper_block_tf_writemask |= get_inst_tessfactor_writemask(intrin);
4699 }
4700
4701 break;
4702 }
4703 case nir_cf_node_if: {
4704 unsigned then_tessfactor_writemask = 0;
4705 unsigned else_tessfactor_writemask = 0;
4706
4707 nir_if *if_stmt = nir_cf_node_as_if(cf_node);
4708 foreach_list_typed(nir_cf_node, nested_node, node, &if_stmt->then_list) {
4709 scan_tess_ctrl(nested_node, &then_tessfactor_writemask,
4710 cond_block_tf_writemask,
4711 tessfactors_are_def_in_all_invocs, true);
4712 }
4713
4714 foreach_list_typed(nir_cf_node, nested_node, node, &if_stmt->else_list) {
4715 scan_tess_ctrl(nested_node, &else_tessfactor_writemask,
4716 cond_block_tf_writemask,
4717 tessfactors_are_def_in_all_invocs, true);
4718 }
4719
4720 if (then_tessfactor_writemask || else_tessfactor_writemask) {
4721 /* If both statements write the same tess factor channels,
4722 * we can say that the upper block writes them too.
4723 */
4724 *upper_block_tf_writemask |= then_tessfactor_writemask &
4725 else_tessfactor_writemask;
4726 *cond_block_tf_writemask |= then_tessfactor_writemask |
4727 else_tessfactor_writemask;
4728 }
4729
4730 break;
4731 }
4732 case nir_cf_node_loop: {
4733 nir_loop *loop = nir_cf_node_as_loop(cf_node);
4734 foreach_list_typed(nir_cf_node, nested_node, node, &loop->body) {
4735 scan_tess_ctrl(nested_node, cond_block_tf_writemask,
4736 cond_block_tf_writemask,
4737 tessfactors_are_def_in_all_invocs, true);
4738 }
4739
4740 break;
4741 }
4742 default:
4743 unreachable("unknown cf node type");
4744 }
4745 }
4746
4747 bool
4748 ac_are_tessfactors_def_in_all_invocs(const struct nir_shader *nir)
4749 {
4750 assert(nir->info.stage == MESA_SHADER_TESS_CTRL);
4751
4752 /* The pass works as follows:
4753 * If all codepaths write tess factors, we can say that all
4754 * invocations define tess factors.
4755 *
4756 * Each tess factor channel is tracked separately.
4757 */
4758 unsigned main_block_tf_writemask = 0; /* if main block writes tess factors */
4759 unsigned cond_block_tf_writemask = 0; /* if cond block writes tess factors */
4760
4761 /* Initial value = true. Here the pass will accumulate results from
4762 * multiple segments surrounded by barriers. If tess factors aren't
4763 * written at all, it's a shader bug and we don't care if this will be
4764 * true.
4765 */
4766 bool tessfactors_are_def_in_all_invocs = true;
4767
4768 nir_foreach_function(function, nir) {
4769 if (function->impl) {
4770 foreach_list_typed(nir_cf_node, node, node, &function->impl->body) {
4771 scan_tess_ctrl(node, &main_block_tf_writemask,
4772 &cond_block_tf_writemask,
4773 &tessfactors_are_def_in_all_invocs,
4774 false);
4775 }
4776 }
4777 }
4778
4779 /* Accumulate the result for the last code segment separated by a
4780 * barrier.
4781 */
4782 if (main_block_tf_writemask || cond_block_tf_writemask) {
4783 tessfactors_are_def_in_all_invocs &=
4784 !(cond_block_tf_writemask & ~main_block_tf_writemask);
4785 }
4786
4787 return tessfactors_are_def_in_all_invocs;
4788 }