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amd/common: lower bitfield_extract to ubfe/ibfe.
[mesa.git] / src / amd / common / ac_nir_to_llvm.c
1 /*
2 * Copyright © 2016 Bas Nieuwenhuizen
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
21 * IN THE SOFTWARE.
22 */
23
24 #include "ac_nir_to_llvm.h"
25 #include "ac_llvm_build.h"
26 #include "ac_llvm_util.h"
27 #include "ac_binary.h"
28 #include "sid.h"
29 #include "nir/nir.h"
30 #include "nir/nir_deref.h"
31 #include "util/bitscan.h"
32 #include "util/u_math.h"
33 #include "ac_shader_abi.h"
34 #include "ac_shader_util.h"
35
36 struct ac_nir_context {
37 struct ac_llvm_context ac;
38 struct ac_shader_abi *abi;
39
40 gl_shader_stage stage;
41 shader_info *info;
42
43 LLVMValueRef *ssa_defs;
44
45 struct hash_table *defs;
46 struct hash_table *phis;
47 struct hash_table *vars;
48
49 LLVMValueRef main_function;
50 LLVMBasicBlockRef continue_block;
51 LLVMBasicBlockRef break_block;
52
53 int num_locals;
54 LLVMValueRef *locals;
55 };
56
57 static LLVMValueRef get_sampler_desc(struct ac_nir_context *ctx,
58 nir_deref_instr *deref_instr,
59 enum ac_descriptor_type desc_type,
60 const nir_instr *instr,
61 bool image, bool write);
62
63 static void
64 build_store_values_extended(struct ac_llvm_context *ac,
65 LLVMValueRef *values,
66 unsigned value_count,
67 unsigned value_stride,
68 LLVMValueRef vec)
69 {
70 LLVMBuilderRef builder = ac->builder;
71 unsigned i;
72
73 for (i = 0; i < value_count; i++) {
74 LLVMValueRef ptr = values[i * value_stride];
75 LLVMValueRef index = LLVMConstInt(ac->i32, i, false);
76 LLVMValueRef value = LLVMBuildExtractElement(builder, vec, index, "");
77 LLVMBuildStore(builder, value, ptr);
78 }
79 }
80
81 static enum ac_image_dim
82 get_ac_sampler_dim(const struct ac_llvm_context *ctx, enum glsl_sampler_dim dim,
83 bool is_array)
84 {
85 switch (dim) {
86 case GLSL_SAMPLER_DIM_1D:
87 if (ctx->chip_class >= GFX9)
88 return is_array ? ac_image_2darray : ac_image_2d;
89 return is_array ? ac_image_1darray : ac_image_1d;
90 case GLSL_SAMPLER_DIM_2D:
91 case GLSL_SAMPLER_DIM_RECT:
92 case GLSL_SAMPLER_DIM_EXTERNAL:
93 return is_array ? ac_image_2darray : ac_image_2d;
94 case GLSL_SAMPLER_DIM_3D:
95 return ac_image_3d;
96 case GLSL_SAMPLER_DIM_CUBE:
97 return ac_image_cube;
98 case GLSL_SAMPLER_DIM_MS:
99 return is_array ? ac_image_2darraymsaa : ac_image_2dmsaa;
100 case GLSL_SAMPLER_DIM_SUBPASS:
101 return ac_image_2darray;
102 case GLSL_SAMPLER_DIM_SUBPASS_MS:
103 return ac_image_2darraymsaa;
104 default:
105 unreachable("bad sampler dim");
106 }
107 }
108
109 static enum ac_image_dim
110 get_ac_image_dim(const struct ac_llvm_context *ctx, enum glsl_sampler_dim sdim,
111 bool is_array)
112 {
113 enum ac_image_dim dim = get_ac_sampler_dim(ctx, sdim, is_array);
114
115 if (dim == ac_image_cube ||
116 (ctx->chip_class <= GFX8 && dim == ac_image_3d))
117 dim = ac_image_2darray;
118
119 return dim;
120 }
121
122 static LLVMTypeRef get_def_type(struct ac_nir_context *ctx,
123 const nir_ssa_def *def)
124 {
125 LLVMTypeRef type = LLVMIntTypeInContext(ctx->ac.context, def->bit_size);
126 if (def->num_components > 1) {
127 type = LLVMVectorType(type, def->num_components);
128 }
129 return type;
130 }
131
132 static LLVMValueRef get_src(struct ac_nir_context *nir, nir_src src)
133 {
134 assert(src.is_ssa);
135 return nir->ssa_defs[src.ssa->index];
136 }
137
138 static LLVMValueRef
139 get_memory_ptr(struct ac_nir_context *ctx, nir_src src)
140 {
141 LLVMValueRef ptr = get_src(ctx, src);
142 ptr = LLVMBuildGEP(ctx->ac.builder, ctx->ac.lds, &ptr, 1, "");
143 int addr_space = LLVMGetPointerAddressSpace(LLVMTypeOf(ptr));
144
145 return LLVMBuildBitCast(ctx->ac.builder, ptr,
146 LLVMPointerType(ctx->ac.i32, addr_space), "");
147 }
148
149 static LLVMBasicBlockRef get_block(struct ac_nir_context *nir,
150 const struct nir_block *b)
151 {
152 struct hash_entry *entry = _mesa_hash_table_search(nir->defs, b);
153 return (LLVMBasicBlockRef)entry->data;
154 }
155
156 static LLVMValueRef get_alu_src(struct ac_nir_context *ctx,
157 nir_alu_src src,
158 unsigned num_components)
159 {
160 LLVMValueRef value = get_src(ctx, src.src);
161 bool need_swizzle = false;
162
163 assert(value);
164 unsigned src_components = ac_get_llvm_num_components(value);
165 for (unsigned i = 0; i < num_components; ++i) {
166 assert(src.swizzle[i] < src_components);
167 if (src.swizzle[i] != i)
168 need_swizzle = true;
169 }
170
171 if (need_swizzle || num_components != src_components) {
172 LLVMValueRef masks[] = {
173 LLVMConstInt(ctx->ac.i32, src.swizzle[0], false),
174 LLVMConstInt(ctx->ac.i32, src.swizzle[1], false),
175 LLVMConstInt(ctx->ac.i32, src.swizzle[2], false),
176 LLVMConstInt(ctx->ac.i32, src.swizzle[3], false)};
177
178 if (src_components > 1 && num_components == 1) {
179 value = LLVMBuildExtractElement(ctx->ac.builder, value,
180 masks[0], "");
181 } else if (src_components == 1 && num_components > 1) {
182 LLVMValueRef values[] = {value, value, value, value};
183 value = ac_build_gather_values(&ctx->ac, values, num_components);
184 } else {
185 LLVMValueRef swizzle = LLVMConstVector(masks, num_components);
186 value = LLVMBuildShuffleVector(ctx->ac.builder, value, value,
187 swizzle, "");
188 }
189 }
190 assert(!src.negate);
191 assert(!src.abs);
192 return value;
193 }
194
195 static LLVMValueRef emit_int_cmp(struct ac_llvm_context *ctx,
196 LLVMIntPredicate pred, LLVMValueRef src0,
197 LLVMValueRef src1)
198 {
199 LLVMValueRef result = LLVMBuildICmp(ctx->builder, pred, src0, src1, "");
200 return LLVMBuildSelect(ctx->builder, result,
201 LLVMConstInt(ctx->i32, 0xFFFFFFFF, false),
202 ctx->i32_0, "");
203 }
204
205 static LLVMValueRef emit_float_cmp(struct ac_llvm_context *ctx,
206 LLVMRealPredicate pred, LLVMValueRef src0,
207 LLVMValueRef src1)
208 {
209 LLVMValueRef result;
210 src0 = ac_to_float(ctx, src0);
211 src1 = ac_to_float(ctx, src1);
212 result = LLVMBuildFCmp(ctx->builder, pred, src0, src1, "");
213 return LLVMBuildSelect(ctx->builder, result,
214 LLVMConstInt(ctx->i32, 0xFFFFFFFF, false),
215 ctx->i32_0, "");
216 }
217
218 static LLVMValueRef emit_intrin_1f_param(struct ac_llvm_context *ctx,
219 const char *intrin,
220 LLVMTypeRef result_type,
221 LLVMValueRef src0)
222 {
223 char name[64];
224 LLVMValueRef params[] = {
225 ac_to_float(ctx, src0),
226 };
227
228 MAYBE_UNUSED const int length = snprintf(name, sizeof(name), "%s.f%d", intrin,
229 ac_get_elem_bits(ctx, result_type));
230 assert(length < sizeof(name));
231 return ac_build_intrinsic(ctx, name, result_type, params, 1, AC_FUNC_ATTR_READNONE);
232 }
233
234 static LLVMValueRef emit_intrin_2f_param(struct ac_llvm_context *ctx,
235 const char *intrin,
236 LLVMTypeRef result_type,
237 LLVMValueRef src0, LLVMValueRef src1)
238 {
239 char name[64];
240 LLVMValueRef params[] = {
241 ac_to_float(ctx, src0),
242 ac_to_float(ctx, src1),
243 };
244
245 MAYBE_UNUSED const int length = snprintf(name, sizeof(name), "%s.f%d", intrin,
246 ac_get_elem_bits(ctx, result_type));
247 assert(length < sizeof(name));
248 return ac_build_intrinsic(ctx, name, result_type, params, 2, AC_FUNC_ATTR_READNONE);
249 }
250
251 static LLVMValueRef emit_intrin_3f_param(struct ac_llvm_context *ctx,
252 const char *intrin,
253 LLVMTypeRef result_type,
254 LLVMValueRef src0, LLVMValueRef src1, LLVMValueRef src2)
255 {
256 char name[64];
257 LLVMValueRef params[] = {
258 ac_to_float(ctx, src0),
259 ac_to_float(ctx, src1),
260 ac_to_float(ctx, src2),
261 };
262
263 MAYBE_UNUSED const int length = snprintf(name, sizeof(name), "%s.f%d", intrin,
264 ac_get_elem_bits(ctx, result_type));
265 assert(length < sizeof(name));
266 return ac_build_intrinsic(ctx, name, result_type, params, 3, AC_FUNC_ATTR_READNONE);
267 }
268
269 static LLVMValueRef emit_bcsel(struct ac_llvm_context *ctx,
270 LLVMValueRef src0, LLVMValueRef src1, LLVMValueRef src2)
271 {
272 assert(LLVMGetTypeKind(LLVMTypeOf(src0)) != LLVMVectorTypeKind);
273
274 LLVMValueRef v = LLVMBuildICmp(ctx->builder, LLVMIntNE, src0,
275 ctx->i32_0, "");
276 return LLVMBuildSelect(ctx->builder, v,
277 ac_to_integer_or_pointer(ctx, src1),
278 ac_to_integer_or_pointer(ctx, src2), "");
279 }
280
281 static LLVMValueRef emit_iabs(struct ac_llvm_context *ctx,
282 LLVMValueRef src0)
283 {
284 return ac_build_imax(ctx, src0, LLVMBuildNeg(ctx->builder, src0, ""));
285 }
286
287 static LLVMValueRef emit_uint_carry(struct ac_llvm_context *ctx,
288 const char *intrin,
289 LLVMValueRef src0, LLVMValueRef src1)
290 {
291 LLVMTypeRef ret_type;
292 LLVMTypeRef types[] = { ctx->i32, ctx->i1 };
293 LLVMValueRef res;
294 LLVMValueRef params[] = { src0, src1 };
295 ret_type = LLVMStructTypeInContext(ctx->context, types,
296 2, true);
297
298 res = ac_build_intrinsic(ctx, intrin, ret_type,
299 params, 2, AC_FUNC_ATTR_READNONE);
300
301 res = LLVMBuildExtractValue(ctx->builder, res, 1, "");
302 res = LLVMBuildZExt(ctx->builder, res, ctx->i32, "");
303 return res;
304 }
305
306 static LLVMValueRef emit_b2f(struct ac_llvm_context *ctx,
307 LLVMValueRef src0,
308 unsigned bitsize)
309 {
310 LLVMValueRef result = LLVMBuildAnd(ctx->builder, src0,
311 LLVMBuildBitCast(ctx->builder, LLVMConstReal(ctx->f32, 1.0), ctx->i32, ""),
312 "");
313 result = LLVMBuildBitCast(ctx->builder, result, ctx->f32, "");
314
315 switch (bitsize) {
316 case 16:
317 return LLVMBuildFPTrunc(ctx->builder, result, ctx->f16, "");
318 case 32:
319 return result;
320 case 64:
321 return LLVMBuildFPExt(ctx->builder, result, ctx->f64, "");
322 default:
323 unreachable("Unsupported bit size.");
324 }
325 }
326
327 static LLVMValueRef emit_f2b(struct ac_llvm_context *ctx,
328 LLVMValueRef src0)
329 {
330 src0 = ac_to_float(ctx, src0);
331 LLVMValueRef zero = LLVMConstNull(LLVMTypeOf(src0));
332 return LLVMBuildSExt(ctx->builder,
333 LLVMBuildFCmp(ctx->builder, LLVMRealUNE, src0, zero, ""),
334 ctx->i32, "");
335 }
336
337 static LLVMValueRef emit_b2i(struct ac_llvm_context *ctx,
338 LLVMValueRef src0,
339 unsigned bitsize)
340 {
341 LLVMValueRef result = LLVMBuildAnd(ctx->builder, src0, ctx->i32_1, "");
342
343 switch (bitsize) {
344 case 8:
345 return LLVMBuildTrunc(ctx->builder, result, ctx->i8, "");
346 case 16:
347 return LLVMBuildTrunc(ctx->builder, result, ctx->i16, "");
348 case 32:
349 return result;
350 case 64:
351 return LLVMBuildZExt(ctx->builder, result, ctx->i64, "");
352 default:
353 unreachable("Unsupported bit size.");
354 }
355 }
356
357 static LLVMValueRef emit_i2b(struct ac_llvm_context *ctx,
358 LLVMValueRef src0)
359 {
360 LLVMValueRef zero = LLVMConstNull(LLVMTypeOf(src0));
361 return LLVMBuildSExt(ctx->builder,
362 LLVMBuildICmp(ctx->builder, LLVMIntNE, src0, zero, ""),
363 ctx->i32, "");
364 }
365
366 static LLVMValueRef emit_f2f16(struct ac_llvm_context *ctx,
367 LLVMValueRef src0)
368 {
369 LLVMValueRef result;
370 LLVMValueRef cond = NULL;
371
372 src0 = ac_to_float(ctx, src0);
373 result = LLVMBuildFPTrunc(ctx->builder, src0, ctx->f16, "");
374
375 if (ctx->chip_class >= GFX8) {
376 LLVMValueRef args[2];
377 /* Check if the result is a denormal - and flush to 0 if so. */
378 args[0] = result;
379 args[1] = LLVMConstInt(ctx->i32, N_SUBNORMAL | P_SUBNORMAL, false);
380 cond = ac_build_intrinsic(ctx, "llvm.amdgcn.class.f16", ctx->i1, args, 2, AC_FUNC_ATTR_READNONE);
381 }
382
383 /* need to convert back up to f32 */
384 result = LLVMBuildFPExt(ctx->builder, result, ctx->f32, "");
385
386 if (ctx->chip_class >= GFX8)
387 result = LLVMBuildSelect(ctx->builder, cond, ctx->f32_0, result, "");
388 else {
389 /* for GFX6-GFX7 */
390 /* 0x38800000 is smallest half float value (2^-14) in 32-bit float,
391 * so compare the result and flush to 0 if it's smaller.
392 */
393 LLVMValueRef temp, cond2;
394 temp = emit_intrin_1f_param(ctx, "llvm.fabs", ctx->f32, result);
395 cond = LLVMBuildFCmp(ctx->builder, LLVMRealUGT,
396 LLVMBuildBitCast(ctx->builder, LLVMConstInt(ctx->i32, 0x38800000, false), ctx->f32, ""),
397 temp, "");
398 cond2 = LLVMBuildFCmp(ctx->builder, LLVMRealUNE,
399 temp, ctx->f32_0, "");
400 cond = LLVMBuildAnd(ctx->builder, cond, cond2, "");
401 result = LLVMBuildSelect(ctx->builder, cond, ctx->f32_0, result, "");
402 }
403 return result;
404 }
405
406 static LLVMValueRef emit_umul_high(struct ac_llvm_context *ctx,
407 LLVMValueRef src0, LLVMValueRef src1)
408 {
409 LLVMValueRef dst64, result;
410 src0 = LLVMBuildZExt(ctx->builder, src0, ctx->i64, "");
411 src1 = LLVMBuildZExt(ctx->builder, src1, ctx->i64, "");
412
413 dst64 = LLVMBuildMul(ctx->builder, src0, src1, "");
414 dst64 = LLVMBuildLShr(ctx->builder, dst64, LLVMConstInt(ctx->i64, 32, false), "");
415 result = LLVMBuildTrunc(ctx->builder, dst64, ctx->i32, "");
416 return result;
417 }
418
419 static LLVMValueRef emit_imul_high(struct ac_llvm_context *ctx,
420 LLVMValueRef src0, LLVMValueRef src1)
421 {
422 LLVMValueRef dst64, result;
423 src0 = LLVMBuildSExt(ctx->builder, src0, ctx->i64, "");
424 src1 = LLVMBuildSExt(ctx->builder, src1, ctx->i64, "");
425
426 dst64 = LLVMBuildMul(ctx->builder, src0, src1, "");
427 dst64 = LLVMBuildAShr(ctx->builder, dst64, LLVMConstInt(ctx->i64, 32, false), "");
428 result = LLVMBuildTrunc(ctx->builder, dst64, ctx->i32, "");
429 return result;
430 }
431
432 static LLVMValueRef emit_bfm(struct ac_llvm_context *ctx,
433 LLVMValueRef bits, LLVMValueRef offset)
434 {
435 /* mask = ((1 << bits) - 1) << offset */
436 return LLVMBuildShl(ctx->builder,
437 LLVMBuildSub(ctx->builder,
438 LLVMBuildShl(ctx->builder,
439 ctx->i32_1,
440 bits, ""),
441 ctx->i32_1, ""),
442 offset, "");
443 }
444
445 static LLVMValueRef emit_bitfield_select(struct ac_llvm_context *ctx,
446 LLVMValueRef mask, LLVMValueRef insert,
447 LLVMValueRef base)
448 {
449 /* Calculate:
450 * (mask & insert) | (~mask & base) = base ^ (mask & (insert ^ base))
451 * Use the right-hand side, which the LLVM backend can convert to V_BFI.
452 */
453 return LLVMBuildXor(ctx->builder, base,
454 LLVMBuildAnd(ctx->builder, mask,
455 LLVMBuildXor(ctx->builder, insert, base, ""), ""), "");
456 }
457
458 static LLVMValueRef emit_pack_half_2x16(struct ac_llvm_context *ctx,
459 LLVMValueRef src0)
460 {
461 LLVMValueRef comp[2];
462
463 src0 = ac_to_float(ctx, src0);
464 comp[0] = LLVMBuildExtractElement(ctx->builder, src0, ctx->i32_0, "");
465 comp[1] = LLVMBuildExtractElement(ctx->builder, src0, ctx->i32_1, "");
466
467 return LLVMBuildBitCast(ctx->builder, ac_build_cvt_pkrtz_f16(ctx, comp),
468 ctx->i32, "");
469 }
470
471 static LLVMValueRef emit_unpack_half_2x16(struct ac_llvm_context *ctx,
472 LLVMValueRef src0)
473 {
474 LLVMValueRef const16 = LLVMConstInt(ctx->i32, 16, false);
475 LLVMValueRef temps[2], val;
476 int i;
477
478 for (i = 0; i < 2; i++) {
479 val = i == 1 ? LLVMBuildLShr(ctx->builder, src0, const16, "") : src0;
480 val = LLVMBuildTrunc(ctx->builder, val, ctx->i16, "");
481 val = LLVMBuildBitCast(ctx->builder, val, ctx->f16, "");
482 temps[i] = LLVMBuildFPExt(ctx->builder, val, ctx->f32, "");
483 }
484 return ac_build_gather_values(ctx, temps, 2);
485 }
486
487 static LLVMValueRef emit_ddxy(struct ac_nir_context *ctx,
488 nir_op op,
489 LLVMValueRef src0)
490 {
491 unsigned mask;
492 int idx;
493 LLVMValueRef result;
494
495 if (op == nir_op_fddx_fine)
496 mask = AC_TID_MASK_LEFT;
497 else if (op == nir_op_fddy_fine)
498 mask = AC_TID_MASK_TOP;
499 else
500 mask = AC_TID_MASK_TOP_LEFT;
501
502 /* for DDX we want to next X pixel, DDY next Y pixel. */
503 if (op == nir_op_fddx_fine ||
504 op == nir_op_fddx_coarse ||
505 op == nir_op_fddx)
506 idx = 1;
507 else
508 idx = 2;
509
510 result = ac_build_ddxy(&ctx->ac, mask, idx, src0);
511 return result;
512 }
513
514 static void visit_alu(struct ac_nir_context *ctx, const nir_alu_instr *instr)
515 {
516 LLVMValueRef src[4], result = NULL;
517 unsigned num_components = instr->dest.dest.ssa.num_components;
518 unsigned src_components;
519 LLVMTypeRef def_type = get_def_type(ctx, &instr->dest.dest.ssa);
520
521 assert(nir_op_infos[instr->op].num_inputs <= ARRAY_SIZE(src));
522 switch (instr->op) {
523 case nir_op_vec2:
524 case nir_op_vec3:
525 case nir_op_vec4:
526 src_components = 1;
527 break;
528 case nir_op_pack_half_2x16:
529 src_components = 2;
530 break;
531 case nir_op_unpack_half_2x16:
532 src_components = 1;
533 break;
534 case nir_op_cube_face_coord:
535 case nir_op_cube_face_index:
536 src_components = 3;
537 break;
538 default:
539 src_components = num_components;
540 break;
541 }
542 for (unsigned i = 0; i < nir_op_infos[instr->op].num_inputs; i++)
543 src[i] = get_alu_src(ctx, instr->src[i], src_components);
544
545 switch (instr->op) {
546 case nir_op_mov:
547 result = src[0];
548 break;
549 case nir_op_fneg:
550 src[0] = ac_to_float(&ctx->ac, src[0]);
551 result = LLVMBuildFNeg(ctx->ac.builder, src[0], "");
552 break;
553 case nir_op_ineg:
554 result = LLVMBuildNeg(ctx->ac.builder, src[0], "");
555 break;
556 case nir_op_inot:
557 result = LLVMBuildNot(ctx->ac.builder, src[0], "");
558 break;
559 case nir_op_iadd:
560 result = LLVMBuildAdd(ctx->ac.builder, src[0], src[1], "");
561 break;
562 case nir_op_fadd:
563 src[0] = ac_to_float(&ctx->ac, src[0]);
564 src[1] = ac_to_float(&ctx->ac, src[1]);
565 result = LLVMBuildFAdd(ctx->ac.builder, src[0], src[1], "");
566 break;
567 case nir_op_fsub:
568 src[0] = ac_to_float(&ctx->ac, src[0]);
569 src[1] = ac_to_float(&ctx->ac, src[1]);
570 result = LLVMBuildFSub(ctx->ac.builder, src[0], src[1], "");
571 break;
572 case nir_op_isub:
573 result = LLVMBuildSub(ctx->ac.builder, src[0], src[1], "");
574 break;
575 case nir_op_imul:
576 result = LLVMBuildMul(ctx->ac.builder, src[0], src[1], "");
577 break;
578 case nir_op_imod:
579 result = LLVMBuildSRem(ctx->ac.builder, src[0], src[1], "");
580 break;
581 case nir_op_umod:
582 result = LLVMBuildURem(ctx->ac.builder, src[0], src[1], "");
583 break;
584 case nir_op_fmod:
585 src[0] = ac_to_float(&ctx->ac, src[0]);
586 src[1] = ac_to_float(&ctx->ac, src[1]);
587 result = ac_build_fdiv(&ctx->ac, src[0], src[1]);
588 result = emit_intrin_1f_param(&ctx->ac, "llvm.floor",
589 ac_to_float_type(&ctx->ac, def_type), result);
590 result = LLVMBuildFMul(ctx->ac.builder, src[1] , result, "");
591 result = LLVMBuildFSub(ctx->ac.builder, src[0], result, "");
592 break;
593 case nir_op_frem:
594 src[0] = ac_to_float(&ctx->ac, src[0]);
595 src[1] = ac_to_float(&ctx->ac, src[1]);
596 result = LLVMBuildFRem(ctx->ac.builder, src[0], src[1], "");
597 break;
598 case nir_op_irem:
599 result = LLVMBuildSRem(ctx->ac.builder, src[0], src[1], "");
600 break;
601 case nir_op_idiv:
602 result = LLVMBuildSDiv(ctx->ac.builder, src[0], src[1], "");
603 break;
604 case nir_op_udiv:
605 result = LLVMBuildUDiv(ctx->ac.builder, src[0], src[1], "");
606 break;
607 case nir_op_fmul:
608 src[0] = ac_to_float(&ctx->ac, src[0]);
609 src[1] = ac_to_float(&ctx->ac, src[1]);
610 result = LLVMBuildFMul(ctx->ac.builder, src[0], src[1], "");
611 break;
612 case nir_op_frcp:
613 src[0] = ac_to_float(&ctx->ac, src[0]);
614 result = ac_build_fdiv(&ctx->ac, LLVMConstReal(LLVMTypeOf(src[0]), 1.0), src[0]);
615 break;
616 case nir_op_iand:
617 result = LLVMBuildAnd(ctx->ac.builder, src[0], src[1], "");
618 break;
619 case nir_op_ior:
620 result = LLVMBuildOr(ctx->ac.builder, src[0], src[1], "");
621 break;
622 case nir_op_ixor:
623 result = LLVMBuildXor(ctx->ac.builder, src[0], src[1], "");
624 break;
625 case nir_op_ishl:
626 if (ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[1])) < ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[0])))
627 src[1] = LLVMBuildZExt(ctx->ac.builder, src[1],
628 LLVMTypeOf(src[0]), "");
629 else if (ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[1])) > ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[0])))
630 src[1] = LLVMBuildTrunc(ctx->ac.builder, src[1],
631 LLVMTypeOf(src[0]), "");
632 result = LLVMBuildShl(ctx->ac.builder, src[0], src[1], "");
633 break;
634 case nir_op_ishr:
635 if (ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[1])) < ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[0])))
636 src[1] = LLVMBuildZExt(ctx->ac.builder, src[1],
637 LLVMTypeOf(src[0]), "");
638 else if (ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[1])) > ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[0])))
639 src[1] = LLVMBuildTrunc(ctx->ac.builder, src[1],
640 LLVMTypeOf(src[0]), "");
641 result = LLVMBuildAShr(ctx->ac.builder, src[0], src[1], "");
642 break;
643 case nir_op_ushr:
644 if (ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[1])) < ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[0])))
645 src[1] = LLVMBuildZExt(ctx->ac.builder, src[1],
646 LLVMTypeOf(src[0]), "");
647 else if (ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[1])) > ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[0])))
648 src[1] = LLVMBuildTrunc(ctx->ac.builder, src[1],
649 LLVMTypeOf(src[0]), "");
650 result = LLVMBuildLShr(ctx->ac.builder, src[0], src[1], "");
651 break;
652 case nir_op_ilt32:
653 result = emit_int_cmp(&ctx->ac, LLVMIntSLT, src[0], src[1]);
654 break;
655 case nir_op_ine32:
656 result = emit_int_cmp(&ctx->ac, LLVMIntNE, src[0], src[1]);
657 break;
658 case nir_op_ieq32:
659 result = emit_int_cmp(&ctx->ac, LLVMIntEQ, src[0], src[1]);
660 break;
661 case nir_op_ige32:
662 result = emit_int_cmp(&ctx->ac, LLVMIntSGE, src[0], src[1]);
663 break;
664 case nir_op_ult32:
665 result = emit_int_cmp(&ctx->ac, LLVMIntULT, src[0], src[1]);
666 break;
667 case nir_op_uge32:
668 result = emit_int_cmp(&ctx->ac, LLVMIntUGE, src[0], src[1]);
669 break;
670 case nir_op_feq32:
671 result = emit_float_cmp(&ctx->ac, LLVMRealOEQ, src[0], src[1]);
672 break;
673 case nir_op_fne32:
674 result = emit_float_cmp(&ctx->ac, LLVMRealUNE, src[0], src[1]);
675 break;
676 case nir_op_flt32:
677 result = emit_float_cmp(&ctx->ac, LLVMRealOLT, src[0], src[1]);
678 break;
679 case nir_op_fge32:
680 result = emit_float_cmp(&ctx->ac, LLVMRealOGE, src[0], src[1]);
681 break;
682 case nir_op_fabs:
683 result = emit_intrin_1f_param(&ctx->ac, "llvm.fabs",
684 ac_to_float_type(&ctx->ac, def_type), src[0]);
685 break;
686 case nir_op_iabs:
687 result = emit_iabs(&ctx->ac, src[0]);
688 break;
689 case nir_op_imax:
690 result = ac_build_imax(&ctx->ac, src[0], src[1]);
691 break;
692 case nir_op_imin:
693 result = ac_build_imin(&ctx->ac, src[0], src[1]);
694 break;
695 case nir_op_umax:
696 result = ac_build_umax(&ctx->ac, src[0], src[1]);
697 break;
698 case nir_op_umin:
699 result = ac_build_umin(&ctx->ac, src[0], src[1]);
700 break;
701 case nir_op_isign:
702 result = ac_build_isign(&ctx->ac, src[0],
703 instr->dest.dest.ssa.bit_size);
704 break;
705 case nir_op_fsign:
706 src[0] = ac_to_float(&ctx->ac, src[0]);
707 result = ac_build_fsign(&ctx->ac, src[0],
708 instr->dest.dest.ssa.bit_size);
709 break;
710 case nir_op_ffloor:
711 result = emit_intrin_1f_param(&ctx->ac, "llvm.floor",
712 ac_to_float_type(&ctx->ac, def_type), src[0]);
713 break;
714 case nir_op_ftrunc:
715 result = emit_intrin_1f_param(&ctx->ac, "llvm.trunc",
716 ac_to_float_type(&ctx->ac, def_type), src[0]);
717 break;
718 case nir_op_fceil:
719 result = emit_intrin_1f_param(&ctx->ac, "llvm.ceil",
720 ac_to_float_type(&ctx->ac, def_type), src[0]);
721 break;
722 case nir_op_fround_even:
723 result = emit_intrin_1f_param(&ctx->ac, "llvm.rint",
724 ac_to_float_type(&ctx->ac, def_type),src[0]);
725 break;
726 case nir_op_ffract:
727 src[0] = ac_to_float(&ctx->ac, src[0]);
728 result = ac_build_fract(&ctx->ac, src[0],
729 instr->dest.dest.ssa.bit_size);
730 break;
731 case nir_op_fsin:
732 result = emit_intrin_1f_param(&ctx->ac, "llvm.sin",
733 ac_to_float_type(&ctx->ac, def_type), src[0]);
734 break;
735 case nir_op_fcos:
736 result = emit_intrin_1f_param(&ctx->ac, "llvm.cos",
737 ac_to_float_type(&ctx->ac, def_type), src[0]);
738 break;
739 case nir_op_fsqrt:
740 result = emit_intrin_1f_param(&ctx->ac, "llvm.sqrt",
741 ac_to_float_type(&ctx->ac, def_type), src[0]);
742 break;
743 case nir_op_fexp2:
744 result = emit_intrin_1f_param(&ctx->ac, "llvm.exp2",
745 ac_to_float_type(&ctx->ac, def_type), src[0]);
746 break;
747 case nir_op_flog2:
748 result = emit_intrin_1f_param(&ctx->ac, "llvm.log2",
749 ac_to_float_type(&ctx->ac, def_type), src[0]);
750 break;
751 case nir_op_frsq:
752 result = emit_intrin_1f_param(&ctx->ac, "llvm.sqrt",
753 ac_to_float_type(&ctx->ac, def_type), src[0]);
754 result = ac_build_fdiv(&ctx->ac, LLVMConstReal(LLVMTypeOf(result), 1.0), result);
755 break;
756 case nir_op_frexp_exp:
757 src[0] = ac_to_float(&ctx->ac, src[0]);
758 result = ac_build_frexp_exp(&ctx->ac, src[0],
759 ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[0])));
760 if (ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[0])) == 16)
761 result = LLVMBuildSExt(ctx->ac.builder, result,
762 ctx->ac.i32, "");
763 break;
764 case nir_op_frexp_sig:
765 src[0] = ac_to_float(&ctx->ac, src[0]);
766 result = ac_build_frexp_mant(&ctx->ac, src[0],
767 instr->dest.dest.ssa.bit_size);
768 break;
769 case nir_op_fpow:
770 result = emit_intrin_2f_param(&ctx->ac, "llvm.pow",
771 ac_to_float_type(&ctx->ac, def_type), src[0], src[1]);
772 break;
773 case nir_op_fmax:
774 result = emit_intrin_2f_param(&ctx->ac, "llvm.maxnum",
775 ac_to_float_type(&ctx->ac, def_type), src[0], src[1]);
776 if (ctx->ac.chip_class < GFX9 &&
777 instr->dest.dest.ssa.bit_size == 32) {
778 /* Only pre-GFX9 chips do not flush denorms. */
779 result = emit_intrin_1f_param(&ctx->ac, "llvm.canonicalize",
780 ac_to_float_type(&ctx->ac, def_type),
781 result);
782 }
783 break;
784 case nir_op_fmin:
785 result = emit_intrin_2f_param(&ctx->ac, "llvm.minnum",
786 ac_to_float_type(&ctx->ac, def_type), src[0], src[1]);
787 if (ctx->ac.chip_class < GFX9 &&
788 instr->dest.dest.ssa.bit_size == 32) {
789 /* Only pre-GFX9 chips do not flush denorms. */
790 result = emit_intrin_1f_param(&ctx->ac, "llvm.canonicalize",
791 ac_to_float_type(&ctx->ac, def_type),
792 result);
793 }
794 break;
795 case nir_op_ffma:
796 result = emit_intrin_3f_param(&ctx->ac, "llvm.fmuladd",
797 ac_to_float_type(&ctx->ac, def_type), src[0], src[1], src[2]);
798 break;
799 case nir_op_ldexp:
800 src[0] = ac_to_float(&ctx->ac, src[0]);
801 if (ac_get_elem_bits(&ctx->ac, def_type) == 32)
802 result = ac_build_intrinsic(&ctx->ac, "llvm.amdgcn.ldexp.f32", ctx->ac.f32, src, 2, AC_FUNC_ATTR_READNONE);
803 else if (ac_get_elem_bits(&ctx->ac, def_type) == 16)
804 result = ac_build_intrinsic(&ctx->ac, "llvm.amdgcn.ldexp.f16", ctx->ac.f16, src, 2, AC_FUNC_ATTR_READNONE);
805 else
806 result = ac_build_intrinsic(&ctx->ac, "llvm.amdgcn.ldexp.f64", ctx->ac.f64, src, 2, AC_FUNC_ATTR_READNONE);
807 break;
808 case nir_op_bfm:
809 result = emit_bfm(&ctx->ac, src[0], src[1]);
810 break;
811 case nir_op_bitfield_select:
812 result = emit_bitfield_select(&ctx->ac, src[0], src[1], src[2]);
813 break;
814 case nir_op_ubfe:
815 result = ac_build_bfe(&ctx->ac, src[0], src[1], src[2], false);
816 break;
817 case nir_op_ibfe:
818 result = ac_build_bfe(&ctx->ac, src[0], src[1], src[2], true);
819 break;
820 case nir_op_bitfield_reverse:
821 result = ac_build_bitfield_reverse(&ctx->ac, src[0]);
822 break;
823 case nir_op_bit_count:
824 result = ac_build_bit_count(&ctx->ac, src[0]);
825 break;
826 case nir_op_vec2:
827 case nir_op_vec3:
828 case nir_op_vec4:
829 for (unsigned i = 0; i < nir_op_infos[instr->op].num_inputs; i++)
830 src[i] = ac_to_integer(&ctx->ac, src[i]);
831 result = ac_build_gather_values(&ctx->ac, src, num_components);
832 break;
833 case nir_op_f2i8:
834 case nir_op_f2i16:
835 case nir_op_f2i32:
836 case nir_op_f2i64:
837 src[0] = ac_to_float(&ctx->ac, src[0]);
838 result = LLVMBuildFPToSI(ctx->ac.builder, src[0], def_type, "");
839 break;
840 case nir_op_f2u8:
841 case nir_op_f2u16:
842 case nir_op_f2u32:
843 case nir_op_f2u64:
844 src[0] = ac_to_float(&ctx->ac, src[0]);
845 result = LLVMBuildFPToUI(ctx->ac.builder, src[0], def_type, "");
846 break;
847 case nir_op_i2f16:
848 case nir_op_i2f32:
849 case nir_op_i2f64:
850 result = LLVMBuildSIToFP(ctx->ac.builder, src[0], ac_to_float_type(&ctx->ac, def_type), "");
851 break;
852 case nir_op_u2f16:
853 case nir_op_u2f32:
854 case nir_op_u2f64:
855 result = LLVMBuildUIToFP(ctx->ac.builder, src[0], ac_to_float_type(&ctx->ac, def_type), "");
856 break;
857 case nir_op_f2f16_rtz:
858 src[0] = ac_to_float(&ctx->ac, src[0]);
859 if (LLVMTypeOf(src[0]) == ctx->ac.f64)
860 src[0] = LLVMBuildFPTrunc(ctx->ac.builder, src[0], ctx->ac.f32, "");
861 LLVMValueRef param[2] = { src[0], ctx->ac.f32_0 };
862 result = ac_build_cvt_pkrtz_f16(&ctx->ac, param);
863 result = LLVMBuildExtractElement(ctx->ac.builder, result, ctx->ac.i32_0, "");
864 break;
865 case nir_op_f2f16_rtne:
866 case nir_op_f2f16:
867 case nir_op_f2f32:
868 case nir_op_f2f64:
869 src[0] = ac_to_float(&ctx->ac, src[0]);
870 if (ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[0])) < ac_get_elem_bits(&ctx->ac, def_type))
871 result = LLVMBuildFPExt(ctx->ac.builder, src[0], ac_to_float_type(&ctx->ac, def_type), "");
872 else
873 result = LLVMBuildFPTrunc(ctx->ac.builder, src[0], ac_to_float_type(&ctx->ac, def_type), "");
874 break;
875 case nir_op_u2u8:
876 case nir_op_u2u16:
877 case nir_op_u2u32:
878 case nir_op_u2u64:
879 if (ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[0])) < ac_get_elem_bits(&ctx->ac, def_type))
880 result = LLVMBuildZExt(ctx->ac.builder, src[0], def_type, "");
881 else
882 result = LLVMBuildTrunc(ctx->ac.builder, src[0], def_type, "");
883 break;
884 case nir_op_i2i8:
885 case nir_op_i2i16:
886 case nir_op_i2i32:
887 case nir_op_i2i64:
888 if (ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[0])) < ac_get_elem_bits(&ctx->ac, def_type))
889 result = LLVMBuildSExt(ctx->ac.builder, src[0], def_type, "");
890 else
891 result = LLVMBuildTrunc(ctx->ac.builder, src[0], def_type, "");
892 break;
893 case nir_op_b32csel:
894 result = emit_bcsel(&ctx->ac, src[0], src[1], src[2]);
895 break;
896 case nir_op_find_lsb:
897 result = ac_find_lsb(&ctx->ac, ctx->ac.i32, src[0]);
898 break;
899 case nir_op_ufind_msb:
900 result = ac_build_umsb(&ctx->ac, src[0], ctx->ac.i32);
901 break;
902 case nir_op_ifind_msb:
903 result = ac_build_imsb(&ctx->ac, src[0], ctx->ac.i32);
904 break;
905 case nir_op_uadd_carry:
906 result = emit_uint_carry(&ctx->ac, "llvm.uadd.with.overflow.i32", src[0], src[1]);
907 break;
908 case nir_op_usub_borrow:
909 result = emit_uint_carry(&ctx->ac, "llvm.usub.with.overflow.i32", src[0], src[1]);
910 break;
911 case nir_op_b2f16:
912 case nir_op_b2f32:
913 case nir_op_b2f64:
914 result = emit_b2f(&ctx->ac, src[0], instr->dest.dest.ssa.bit_size);
915 break;
916 case nir_op_f2b32:
917 result = emit_f2b(&ctx->ac, src[0]);
918 break;
919 case nir_op_b2i8:
920 case nir_op_b2i16:
921 case nir_op_b2i32:
922 case nir_op_b2i64:
923 result = emit_b2i(&ctx->ac, src[0], instr->dest.dest.ssa.bit_size);
924 break;
925 case nir_op_i2b32:
926 result = emit_i2b(&ctx->ac, src[0]);
927 break;
928 case nir_op_fquantize2f16:
929 result = emit_f2f16(&ctx->ac, src[0]);
930 break;
931 case nir_op_umul_high:
932 result = emit_umul_high(&ctx->ac, src[0], src[1]);
933 break;
934 case nir_op_imul_high:
935 result = emit_imul_high(&ctx->ac, src[0], src[1]);
936 break;
937 case nir_op_pack_half_2x16:
938 result = emit_pack_half_2x16(&ctx->ac, src[0]);
939 break;
940 case nir_op_unpack_half_2x16:
941 result = emit_unpack_half_2x16(&ctx->ac, src[0]);
942 break;
943 case nir_op_fddx:
944 case nir_op_fddy:
945 case nir_op_fddx_fine:
946 case nir_op_fddy_fine:
947 case nir_op_fddx_coarse:
948 case nir_op_fddy_coarse:
949 result = emit_ddxy(ctx, instr->op, src[0]);
950 break;
951
952 case nir_op_unpack_64_2x32_split_x: {
953 assert(ac_get_llvm_num_components(src[0]) == 1);
954 LLVMValueRef tmp = LLVMBuildBitCast(ctx->ac.builder, src[0],
955 ctx->ac.v2i32,
956 "");
957 result = LLVMBuildExtractElement(ctx->ac.builder, tmp,
958 ctx->ac.i32_0, "");
959 break;
960 }
961
962 case nir_op_unpack_64_2x32_split_y: {
963 assert(ac_get_llvm_num_components(src[0]) == 1);
964 LLVMValueRef tmp = LLVMBuildBitCast(ctx->ac.builder, src[0],
965 ctx->ac.v2i32,
966 "");
967 result = LLVMBuildExtractElement(ctx->ac.builder, tmp,
968 ctx->ac.i32_1, "");
969 break;
970 }
971
972 case nir_op_pack_64_2x32_split: {
973 LLVMValueRef tmp = ac_build_gather_values(&ctx->ac, src, 2);
974 result = LLVMBuildBitCast(ctx->ac.builder, tmp, ctx->ac.i64, "");
975 break;
976 }
977
978 case nir_op_pack_32_2x16_split: {
979 LLVMValueRef tmp = ac_build_gather_values(&ctx->ac, src, 2);
980 result = LLVMBuildBitCast(ctx->ac.builder, tmp, ctx->ac.i32, "");
981 break;
982 }
983
984 case nir_op_unpack_32_2x16_split_x: {
985 LLVMValueRef tmp = LLVMBuildBitCast(ctx->ac.builder, src[0],
986 ctx->ac.v2i16,
987 "");
988 result = LLVMBuildExtractElement(ctx->ac.builder, tmp,
989 ctx->ac.i32_0, "");
990 break;
991 }
992
993 case nir_op_unpack_32_2x16_split_y: {
994 LLVMValueRef tmp = LLVMBuildBitCast(ctx->ac.builder, src[0],
995 ctx->ac.v2i16,
996 "");
997 result = LLVMBuildExtractElement(ctx->ac.builder, tmp,
998 ctx->ac.i32_1, "");
999 break;
1000 }
1001
1002 case nir_op_cube_face_coord: {
1003 src[0] = ac_to_float(&ctx->ac, src[0]);
1004 LLVMValueRef results[2];
1005 LLVMValueRef in[3];
1006 for (unsigned chan = 0; chan < 3; chan++)
1007 in[chan] = ac_llvm_extract_elem(&ctx->ac, src[0], chan);
1008 results[0] = ac_build_intrinsic(&ctx->ac, "llvm.amdgcn.cubesc",
1009 ctx->ac.f32, in, 3, AC_FUNC_ATTR_READNONE);
1010 results[1] = ac_build_intrinsic(&ctx->ac, "llvm.amdgcn.cubetc",
1011 ctx->ac.f32, in, 3, AC_FUNC_ATTR_READNONE);
1012 LLVMValueRef ma = ac_build_intrinsic(&ctx->ac, "llvm.amdgcn.cubema",
1013 ctx->ac.f32, in, 3, AC_FUNC_ATTR_READNONE);
1014 results[0] = ac_build_fdiv(&ctx->ac, results[0], ma);
1015 results[1] = ac_build_fdiv(&ctx->ac, results[1], ma);
1016 LLVMValueRef offset = LLVMConstReal(ctx->ac.f32, 0.5);
1017 results[0] = LLVMBuildFAdd(ctx->ac.builder, results[0], offset, "");
1018 results[1] = LLVMBuildFAdd(ctx->ac.builder, results[1], offset, "");
1019 result = ac_build_gather_values(&ctx->ac, results, 2);
1020 break;
1021 }
1022
1023 case nir_op_cube_face_index: {
1024 src[0] = ac_to_float(&ctx->ac, src[0]);
1025 LLVMValueRef in[3];
1026 for (unsigned chan = 0; chan < 3; chan++)
1027 in[chan] = ac_llvm_extract_elem(&ctx->ac, src[0], chan);
1028 result = ac_build_intrinsic(&ctx->ac, "llvm.amdgcn.cubeid",
1029 ctx->ac.f32, in, 3, AC_FUNC_ATTR_READNONE);
1030 break;
1031 }
1032
1033 case nir_op_fmin3:
1034 result = emit_intrin_2f_param(&ctx->ac, "llvm.minnum",
1035 ac_to_float_type(&ctx->ac, def_type), src[0], src[1]);
1036 result = emit_intrin_2f_param(&ctx->ac, "llvm.minnum",
1037 ac_to_float_type(&ctx->ac, def_type), result, src[2]);
1038 break;
1039 case nir_op_umin3:
1040 result = ac_build_umin(&ctx->ac, src[0], src[1]);
1041 result = ac_build_umin(&ctx->ac, result, src[2]);
1042 break;
1043 case nir_op_imin3:
1044 result = ac_build_imin(&ctx->ac, src[0], src[1]);
1045 result = ac_build_imin(&ctx->ac, result, src[2]);
1046 break;
1047 case nir_op_fmax3:
1048 result = emit_intrin_2f_param(&ctx->ac, "llvm.maxnum",
1049 ac_to_float_type(&ctx->ac, def_type), src[0], src[1]);
1050 result = emit_intrin_2f_param(&ctx->ac, "llvm.maxnum",
1051 ac_to_float_type(&ctx->ac, def_type), result, src[2]);
1052 break;
1053 case nir_op_umax3:
1054 result = ac_build_umax(&ctx->ac, src[0], src[1]);
1055 result = ac_build_umax(&ctx->ac, result, src[2]);
1056 break;
1057 case nir_op_imax3:
1058 result = ac_build_imax(&ctx->ac, src[0], src[1]);
1059 result = ac_build_imax(&ctx->ac, result, src[2]);
1060 break;
1061 case nir_op_fmed3: {
1062 src[0] = ac_to_float(&ctx->ac, src[0]);
1063 src[1] = ac_to_float(&ctx->ac, src[1]);
1064 src[2] = ac_to_float(&ctx->ac, src[2]);
1065 result = ac_build_fmed3(&ctx->ac, src[0], src[1], src[2],
1066 instr->dest.dest.ssa.bit_size);
1067 break;
1068 }
1069 case nir_op_imed3: {
1070 LLVMValueRef tmp1 = ac_build_imin(&ctx->ac, src[0], src[1]);
1071 LLVMValueRef tmp2 = ac_build_imax(&ctx->ac, src[0], src[1]);
1072 tmp2 = ac_build_imin(&ctx->ac, tmp2, src[2]);
1073 result = ac_build_imax(&ctx->ac, tmp1, tmp2);
1074 break;
1075 }
1076 case nir_op_umed3: {
1077 LLVMValueRef tmp1 = ac_build_umin(&ctx->ac, src[0], src[1]);
1078 LLVMValueRef tmp2 = ac_build_umax(&ctx->ac, src[0], src[1]);
1079 tmp2 = ac_build_umin(&ctx->ac, tmp2, src[2]);
1080 result = ac_build_umax(&ctx->ac, tmp1, tmp2);
1081 break;
1082 }
1083
1084 default:
1085 fprintf(stderr, "Unknown NIR alu instr: ");
1086 nir_print_instr(&instr->instr, stderr);
1087 fprintf(stderr, "\n");
1088 abort();
1089 }
1090
1091 if (result) {
1092 assert(instr->dest.dest.is_ssa);
1093 result = ac_to_integer_or_pointer(&ctx->ac, result);
1094 ctx->ssa_defs[instr->dest.dest.ssa.index] = result;
1095 }
1096 }
1097
1098 static void visit_load_const(struct ac_nir_context *ctx,
1099 const nir_load_const_instr *instr)
1100 {
1101 LLVMValueRef values[4], value = NULL;
1102 LLVMTypeRef element_type =
1103 LLVMIntTypeInContext(ctx->ac.context, instr->def.bit_size);
1104
1105 for (unsigned i = 0; i < instr->def.num_components; ++i) {
1106 switch (instr->def.bit_size) {
1107 case 8:
1108 values[i] = LLVMConstInt(element_type,
1109 instr->value[i].u8, false);
1110 break;
1111 case 16:
1112 values[i] = LLVMConstInt(element_type,
1113 instr->value[i].u16, false);
1114 break;
1115 case 32:
1116 values[i] = LLVMConstInt(element_type,
1117 instr->value[i].u32, false);
1118 break;
1119 case 64:
1120 values[i] = LLVMConstInt(element_type,
1121 instr->value[i].u64, false);
1122 break;
1123 default:
1124 fprintf(stderr,
1125 "unsupported nir load_const bit_size: %d\n",
1126 instr->def.bit_size);
1127 abort();
1128 }
1129 }
1130 if (instr->def.num_components > 1) {
1131 value = LLVMConstVector(values, instr->def.num_components);
1132 } else
1133 value = values[0];
1134
1135 ctx->ssa_defs[instr->def.index] = value;
1136 }
1137
1138 static LLVMValueRef
1139 get_buffer_size(struct ac_nir_context *ctx, LLVMValueRef descriptor, bool in_elements)
1140 {
1141 LLVMValueRef size =
1142 LLVMBuildExtractElement(ctx->ac.builder, descriptor,
1143 LLVMConstInt(ctx->ac.i32, 2, false), "");
1144
1145 /* GFX8 only */
1146 if (ctx->ac.chip_class == GFX8 && in_elements) {
1147 /* On GFX8, the descriptor contains the size in bytes,
1148 * but TXQ must return the size in elements.
1149 * The stride is always non-zero for resources using TXQ.
1150 */
1151 LLVMValueRef stride =
1152 LLVMBuildExtractElement(ctx->ac.builder, descriptor,
1153 ctx->ac.i32_1, "");
1154 stride = LLVMBuildLShr(ctx->ac.builder, stride,
1155 LLVMConstInt(ctx->ac.i32, 16, false), "");
1156 stride = LLVMBuildAnd(ctx->ac.builder, stride,
1157 LLVMConstInt(ctx->ac.i32, 0x3fff, false), "");
1158
1159 size = LLVMBuildUDiv(ctx->ac.builder, size, stride, "");
1160 }
1161 return size;
1162 }
1163
1164 static LLVMValueRef lower_gather4_integer(struct ac_llvm_context *ctx,
1165 nir_variable *var,
1166 struct ac_image_args *args,
1167 const nir_tex_instr *instr)
1168 {
1169 const struct glsl_type *type = glsl_without_array(var->type);
1170 enum glsl_base_type stype = glsl_get_sampler_result_type(type);
1171 LLVMValueRef half_texel[2];
1172 LLVMValueRef compare_cube_wa = NULL;
1173 LLVMValueRef result;
1174
1175 //TODO Rect
1176 {
1177 struct ac_image_args txq_args = { 0 };
1178
1179 txq_args.dim = get_ac_sampler_dim(ctx, instr->sampler_dim, instr->is_array);
1180 txq_args.opcode = ac_image_get_resinfo;
1181 txq_args.dmask = 0xf;
1182 txq_args.lod = ctx->i32_0;
1183 txq_args.resource = args->resource;
1184 txq_args.attributes = AC_FUNC_ATTR_READNONE;
1185 LLVMValueRef size = ac_build_image_opcode(ctx, &txq_args);
1186
1187 for (unsigned c = 0; c < 2; c++) {
1188 half_texel[c] = LLVMBuildExtractElement(ctx->builder, size,
1189 LLVMConstInt(ctx->i32, c, false), "");
1190 half_texel[c] = LLVMBuildUIToFP(ctx->builder, half_texel[c], ctx->f32, "");
1191 half_texel[c] = ac_build_fdiv(ctx, ctx->f32_1, half_texel[c]);
1192 half_texel[c] = LLVMBuildFMul(ctx->builder, half_texel[c],
1193 LLVMConstReal(ctx->f32, -0.5), "");
1194 }
1195 }
1196
1197 LLVMValueRef orig_coords[2] = { args->coords[0], args->coords[1] };
1198
1199 for (unsigned c = 0; c < 2; c++) {
1200 LLVMValueRef tmp;
1201 tmp = LLVMBuildBitCast(ctx->builder, args->coords[c], ctx->f32, "");
1202 args->coords[c] = LLVMBuildFAdd(ctx->builder, tmp, half_texel[c], "");
1203 }
1204
1205 /*
1206 * Apparantly cube has issue with integer types that the workaround doesn't solve,
1207 * so this tests if the format is 8_8_8_8 and an integer type do an alternate
1208 * workaround by sampling using a scaled type and converting.
1209 * This is taken from amdgpu-pro shaders.
1210 */
1211 /* NOTE this produces some ugly code compared to amdgpu-pro,
1212 * LLVM ends up dumping SGPRs into VGPRs to deal with the compare/select,
1213 * and then reads them back. -pro generates two selects,
1214 * one s_cmp for the descriptor rewriting
1215 * one v_cmp for the coordinate and result changes.
1216 */
1217 if (instr->sampler_dim == GLSL_SAMPLER_DIM_CUBE) {
1218 LLVMValueRef tmp, tmp2;
1219
1220 /* workaround 8/8/8/8 uint/sint cube gather bug */
1221 /* first detect it then change to a scaled read and f2i */
1222 tmp = LLVMBuildExtractElement(ctx->builder, args->resource, ctx->i32_1, "");
1223 tmp2 = tmp;
1224
1225 /* extract the DATA_FORMAT */
1226 tmp = ac_build_bfe(ctx, tmp, LLVMConstInt(ctx->i32, 20, false),
1227 LLVMConstInt(ctx->i32, 6, false), false);
1228
1229 /* is the DATA_FORMAT == 8_8_8_8 */
1230 compare_cube_wa = LLVMBuildICmp(ctx->builder, LLVMIntEQ, tmp, LLVMConstInt(ctx->i32, V_008F14_IMG_DATA_FORMAT_8_8_8_8, false), "");
1231
1232 if (stype == GLSL_TYPE_UINT)
1233 /* Create a NUM FORMAT - 0x2 or 0x4 - USCALED or UINT */
1234 tmp = LLVMBuildSelect(ctx->builder, compare_cube_wa, LLVMConstInt(ctx->i32, 0x8000000, false),
1235 LLVMConstInt(ctx->i32, 0x10000000, false), "");
1236 else
1237 /* Create a NUM FORMAT - 0x3 or 0x5 - SSCALED or SINT */
1238 tmp = LLVMBuildSelect(ctx->builder, compare_cube_wa, LLVMConstInt(ctx->i32, 0xc000000, false),
1239 LLVMConstInt(ctx->i32, 0x14000000, false), "");
1240
1241 /* replace the NUM FORMAT in the descriptor */
1242 tmp2 = LLVMBuildAnd(ctx->builder, tmp2, LLVMConstInt(ctx->i32, C_008F14_NUM_FORMAT, false), "");
1243 tmp2 = LLVMBuildOr(ctx->builder, tmp2, tmp, "");
1244
1245 args->resource = LLVMBuildInsertElement(ctx->builder, args->resource, tmp2, ctx->i32_1, "");
1246
1247 /* don't modify the coordinates for this case */
1248 for (unsigned c = 0; c < 2; ++c)
1249 args->coords[c] = LLVMBuildSelect(
1250 ctx->builder, compare_cube_wa,
1251 orig_coords[c], args->coords[c], "");
1252 }
1253
1254 args->attributes = AC_FUNC_ATTR_READNONE;
1255 result = ac_build_image_opcode(ctx, args);
1256
1257 if (instr->sampler_dim == GLSL_SAMPLER_DIM_CUBE) {
1258 LLVMValueRef tmp, tmp2;
1259
1260 /* if the cube workaround is in place, f2i the result. */
1261 for (unsigned c = 0; c < 4; c++) {
1262 tmp = LLVMBuildExtractElement(ctx->builder, result, LLVMConstInt(ctx->i32, c, false), "");
1263 if (stype == GLSL_TYPE_UINT)
1264 tmp2 = LLVMBuildFPToUI(ctx->builder, tmp, ctx->i32, "");
1265 else
1266 tmp2 = LLVMBuildFPToSI(ctx->builder, tmp, ctx->i32, "");
1267 tmp = LLVMBuildBitCast(ctx->builder, tmp, ctx->i32, "");
1268 tmp2 = LLVMBuildBitCast(ctx->builder, tmp2, ctx->i32, "");
1269 tmp = LLVMBuildSelect(ctx->builder, compare_cube_wa, tmp2, tmp, "");
1270 tmp = LLVMBuildBitCast(ctx->builder, tmp, ctx->f32, "");
1271 result = LLVMBuildInsertElement(ctx->builder, result, tmp, LLVMConstInt(ctx->i32, c, false), "");
1272 }
1273 }
1274 return result;
1275 }
1276
1277 static nir_deref_instr *get_tex_texture_deref(const nir_tex_instr *instr)
1278 {
1279 nir_deref_instr *texture_deref_instr = NULL;
1280
1281 for (unsigned i = 0; i < instr->num_srcs; i++) {
1282 switch (instr->src[i].src_type) {
1283 case nir_tex_src_texture_deref:
1284 texture_deref_instr = nir_src_as_deref(instr->src[i].src);
1285 break;
1286 default:
1287 break;
1288 }
1289 }
1290 return texture_deref_instr;
1291 }
1292
1293 static LLVMValueRef build_tex_intrinsic(struct ac_nir_context *ctx,
1294 const nir_tex_instr *instr,
1295 struct ac_image_args *args)
1296 {
1297 if (instr->sampler_dim == GLSL_SAMPLER_DIM_BUF) {
1298 unsigned mask = nir_ssa_def_components_read(&instr->dest.ssa);
1299
1300 if (ctx->abi->gfx9_stride_size_workaround) {
1301 return ac_build_buffer_load_format_gfx9_safe(&ctx->ac,
1302 args->resource,
1303 args->coords[0],
1304 ctx->ac.i32_0,
1305 util_last_bit(mask),
1306 false, true);
1307 } else {
1308 return ac_build_buffer_load_format(&ctx->ac,
1309 args->resource,
1310 args->coords[0],
1311 ctx->ac.i32_0,
1312 util_last_bit(mask),
1313 false, true);
1314 }
1315 }
1316
1317 args->opcode = ac_image_sample;
1318
1319 switch (instr->op) {
1320 case nir_texop_txf:
1321 case nir_texop_txf_ms:
1322 case nir_texop_samples_identical:
1323 args->opcode = args->level_zero ||
1324 instr->sampler_dim == GLSL_SAMPLER_DIM_MS ?
1325 ac_image_load : ac_image_load_mip;
1326 args->level_zero = false;
1327 break;
1328 case nir_texop_txs:
1329 case nir_texop_query_levels:
1330 args->opcode = ac_image_get_resinfo;
1331 if (!args->lod)
1332 args->lod = ctx->ac.i32_0;
1333 args->level_zero = false;
1334 break;
1335 case nir_texop_tex:
1336 if (ctx->stage != MESA_SHADER_FRAGMENT) {
1337 assert(!args->lod);
1338 args->level_zero = true;
1339 }
1340 break;
1341 case nir_texop_tg4:
1342 args->opcode = ac_image_gather4;
1343 args->level_zero = true;
1344 break;
1345 case nir_texop_lod:
1346 args->opcode = ac_image_get_lod;
1347 break;
1348 default:
1349 break;
1350 }
1351
1352 if (instr->op == nir_texop_tg4 && ctx->ac.chip_class <= GFX8) {
1353 nir_deref_instr *texture_deref_instr = get_tex_texture_deref(instr);
1354 nir_variable *var = nir_deref_instr_get_variable(texture_deref_instr);
1355 const struct glsl_type *type = glsl_without_array(var->type);
1356 enum glsl_base_type stype = glsl_get_sampler_result_type(type);
1357 if (stype == GLSL_TYPE_UINT || stype == GLSL_TYPE_INT) {
1358 return lower_gather4_integer(&ctx->ac, var, args, instr);
1359 }
1360 }
1361
1362 /* Fixup for GFX9 which allocates 1D textures as 2D. */
1363 if (instr->op == nir_texop_lod && ctx->ac.chip_class >= GFX9) {
1364 if ((args->dim == ac_image_2darray ||
1365 args->dim == ac_image_2d) && !args->coords[1]) {
1366 args->coords[1] = ctx->ac.i32_0;
1367 }
1368 }
1369
1370 args->attributes = AC_FUNC_ATTR_READNONE;
1371 bool cs_derivs = ctx->stage == MESA_SHADER_COMPUTE &&
1372 ctx->info->cs.derivative_group != DERIVATIVE_GROUP_NONE;
1373 if (ctx->stage == MESA_SHADER_FRAGMENT || cs_derivs) {
1374 /* Prevent texture instructions with implicit derivatives from being
1375 * sinked into branches. */
1376 switch (instr->op) {
1377 case nir_texop_tex:
1378 case nir_texop_txb:
1379 case nir_texop_lod:
1380 args->attributes |= AC_FUNC_ATTR_CONVERGENT;
1381 break;
1382 default:
1383 break;
1384 }
1385 }
1386
1387 return ac_build_image_opcode(&ctx->ac, args);
1388 }
1389
1390 static LLVMValueRef visit_vulkan_resource_reindex(struct ac_nir_context *ctx,
1391 nir_intrinsic_instr *instr)
1392 {
1393 LLVMValueRef ptr = get_src(ctx, instr->src[0]);
1394 LLVMValueRef index = get_src(ctx, instr->src[1]);
1395
1396 LLVMValueRef result = LLVMBuildGEP(ctx->ac.builder, ptr, &index, 1, "");
1397 LLVMSetMetadata(result, ctx->ac.uniform_md_kind, ctx->ac.empty_md);
1398 return result;
1399 }
1400
1401 static LLVMValueRef visit_load_push_constant(struct ac_nir_context *ctx,
1402 nir_intrinsic_instr *instr)
1403 {
1404 LLVMValueRef ptr, addr;
1405 LLVMValueRef src0 = get_src(ctx, instr->src[0]);
1406 unsigned index = nir_intrinsic_base(instr);
1407
1408 addr = LLVMConstInt(ctx->ac.i32, index, 0);
1409 addr = LLVMBuildAdd(ctx->ac.builder, addr, src0, "");
1410
1411 /* Load constant values from user SGPRS when possible, otherwise
1412 * fallback to the default path that loads directly from memory.
1413 */
1414 if (LLVMIsConstant(src0) &&
1415 instr->dest.ssa.bit_size == 32) {
1416 unsigned count = instr->dest.ssa.num_components;
1417 unsigned offset = index;
1418
1419 offset += LLVMConstIntGetZExtValue(src0);
1420 offset /= 4;
1421
1422 offset -= ctx->abi->base_inline_push_consts;
1423
1424 if (offset + count <= ctx->abi->num_inline_push_consts) {
1425 return ac_build_gather_values(&ctx->ac,
1426 ctx->abi->inline_push_consts + offset,
1427 count);
1428 }
1429 }
1430
1431 ptr = LLVMBuildGEP(ctx->ac.builder, ctx->abi->push_constants, &addr, 1, "");
1432
1433 if (instr->dest.ssa.bit_size == 8) {
1434 unsigned load_dwords = instr->dest.ssa.num_components > 1 ? 2 : 1;
1435 LLVMTypeRef vec_type = LLVMVectorType(LLVMInt8TypeInContext(ctx->ac.context), 4 * load_dwords);
1436 ptr = ac_cast_ptr(&ctx->ac, ptr, vec_type);
1437 LLVMValueRef res = LLVMBuildLoad(ctx->ac.builder, ptr, "");
1438
1439 LLVMValueRef params[3];
1440 if (load_dwords > 1) {
1441 LLVMValueRef res_vec = LLVMBuildBitCast(ctx->ac.builder, res, LLVMVectorType(ctx->ac.i32, 2), "");
1442 params[0] = LLVMBuildExtractElement(ctx->ac.builder, res_vec, LLVMConstInt(ctx->ac.i32, 1, false), "");
1443 params[1] = LLVMBuildExtractElement(ctx->ac.builder, res_vec, LLVMConstInt(ctx->ac.i32, 0, false), "");
1444 } else {
1445 res = LLVMBuildBitCast(ctx->ac.builder, res, ctx->ac.i32, "");
1446 params[0] = ctx->ac.i32_0;
1447 params[1] = res;
1448 }
1449 params[2] = addr;
1450 res = ac_build_intrinsic(&ctx->ac, "llvm.amdgcn.alignbyte", ctx->ac.i32, params, 3, 0);
1451
1452 res = LLVMBuildTrunc(ctx->ac.builder, res, LLVMIntTypeInContext(ctx->ac.context, instr->dest.ssa.num_components * 8), "");
1453 if (instr->dest.ssa.num_components > 1)
1454 res = LLVMBuildBitCast(ctx->ac.builder, res, LLVMVectorType(LLVMInt8TypeInContext(ctx->ac.context), instr->dest.ssa.num_components), "");
1455 return res;
1456 } else if (instr->dest.ssa.bit_size == 16) {
1457 unsigned load_dwords = instr->dest.ssa.num_components / 2 + 1;
1458 LLVMTypeRef vec_type = LLVMVectorType(LLVMInt16TypeInContext(ctx->ac.context), 2 * load_dwords);
1459 ptr = ac_cast_ptr(&ctx->ac, ptr, vec_type);
1460 LLVMValueRef res = LLVMBuildLoad(ctx->ac.builder, ptr, "");
1461 res = LLVMBuildBitCast(ctx->ac.builder, res, vec_type, "");
1462 LLVMValueRef cond = LLVMBuildLShr(ctx->ac.builder, addr, ctx->ac.i32_1, "");
1463 cond = LLVMBuildTrunc(ctx->ac.builder, cond, ctx->ac.i1, "");
1464 LLVMValueRef mask[] = { LLVMConstInt(ctx->ac.i32, 0, false), LLVMConstInt(ctx->ac.i32, 1, false),
1465 LLVMConstInt(ctx->ac.i32, 2, false), LLVMConstInt(ctx->ac.i32, 3, false),
1466 LLVMConstInt(ctx->ac.i32, 4, false)};
1467 LLVMValueRef swizzle_aligned = LLVMConstVector(&mask[0], instr->dest.ssa.num_components);
1468 LLVMValueRef swizzle_unaligned = LLVMConstVector(&mask[1], instr->dest.ssa.num_components);
1469 LLVMValueRef shuffle_aligned = LLVMBuildShuffleVector(ctx->ac.builder, res, res, swizzle_aligned, "");
1470 LLVMValueRef shuffle_unaligned = LLVMBuildShuffleVector(ctx->ac.builder, res, res, swizzle_unaligned, "");
1471 res = LLVMBuildSelect(ctx->ac.builder, cond, shuffle_unaligned, shuffle_aligned, "");
1472 return LLVMBuildBitCast(ctx->ac.builder, res, get_def_type(ctx, &instr->dest.ssa), "");
1473 }
1474
1475 ptr = ac_cast_ptr(&ctx->ac, ptr, get_def_type(ctx, &instr->dest.ssa));
1476
1477 return LLVMBuildLoad(ctx->ac.builder, ptr, "");
1478 }
1479
1480 static LLVMValueRef visit_get_buffer_size(struct ac_nir_context *ctx,
1481 const nir_intrinsic_instr *instr)
1482 {
1483 LLVMValueRef index = get_src(ctx, instr->src[0]);
1484
1485 return get_buffer_size(ctx, ctx->abi->load_ssbo(ctx->abi, index, false), false);
1486 }
1487
1488 static uint32_t widen_mask(uint32_t mask, unsigned multiplier)
1489 {
1490 uint32_t new_mask = 0;
1491 for(unsigned i = 0; i < 32 && (1u << i) <= mask; ++i)
1492 if (mask & (1u << i))
1493 new_mask |= ((1u << multiplier) - 1u) << (i * multiplier);
1494 return new_mask;
1495 }
1496
1497 static LLVMValueRef extract_vector_range(struct ac_llvm_context *ctx, LLVMValueRef src,
1498 unsigned start, unsigned count)
1499 {
1500 LLVMValueRef mask[] = {
1501 ctx->i32_0, ctx->i32_1,
1502 LLVMConstInt(ctx->i32, 2, false), LLVMConstInt(ctx->i32, 3, false) };
1503
1504 unsigned src_elements = ac_get_llvm_num_components(src);
1505
1506 if (count == src_elements) {
1507 assert(start == 0);
1508 return src;
1509 } else if (count == 1) {
1510 assert(start < src_elements);
1511 return LLVMBuildExtractElement(ctx->builder, src, mask[start], "");
1512 } else {
1513 assert(start + count <= src_elements);
1514 assert(count <= 4);
1515 LLVMValueRef swizzle = LLVMConstVector(&mask[start], count);
1516 return LLVMBuildShuffleVector(ctx->builder, src, src, swizzle, "");
1517 }
1518 }
1519
1520 static unsigned get_cache_policy(struct ac_nir_context *ctx,
1521 enum gl_access_qualifier access,
1522 bool may_store_unaligned,
1523 bool writeonly_memory)
1524 {
1525 unsigned cache_policy = 0;
1526
1527 /* GFX6 has a TC L1 bug causing corruption of 8bit/16bit stores. All
1528 * store opcodes not aligned to a dword are affected. The only way to
1529 * get unaligned stores is through shader images.
1530 */
1531 if (((may_store_unaligned && ctx->ac.chip_class == GFX6) ||
1532 /* If this is write-only, don't keep data in L1 to prevent
1533 * evicting L1 cache lines that may be needed by other
1534 * instructions.
1535 */
1536 writeonly_memory ||
1537 access & (ACCESS_COHERENT | ACCESS_VOLATILE))) {
1538 cache_policy |= ac_glc;
1539 }
1540
1541 return cache_policy;
1542 }
1543
1544 static void visit_store_ssbo(struct ac_nir_context *ctx,
1545 nir_intrinsic_instr *instr)
1546 {
1547 LLVMValueRef src_data = get_src(ctx, instr->src[0]);
1548 int elem_size_bytes = ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src_data)) / 8;
1549 unsigned writemask = nir_intrinsic_write_mask(instr);
1550 enum gl_access_qualifier access = nir_intrinsic_access(instr);
1551 bool writeonly_memory = access & ACCESS_NON_READABLE;
1552 unsigned cache_policy = get_cache_policy(ctx, access, false, writeonly_memory);
1553
1554 LLVMValueRef rsrc = ctx->abi->load_ssbo(ctx->abi,
1555 get_src(ctx, instr->src[1]), true);
1556 LLVMValueRef base_data = src_data;
1557 base_data = ac_trim_vector(&ctx->ac, base_data, instr->num_components);
1558 LLVMValueRef base_offset = get_src(ctx, instr->src[2]);
1559
1560 while (writemask) {
1561 int start, count;
1562 LLVMValueRef data, offset;
1563 LLVMTypeRef data_type;
1564
1565 u_bit_scan_consecutive_range(&writemask, &start, &count);
1566
1567 /* Due to an LLVM limitation with LLVM < 9, split 3-element
1568 * writes into a 2-element and a 1-element write. */
1569 if (count == 3 &&
1570 (elem_size_bytes != 4 || !ac_has_vec3_support(ctx->ac.chip_class, false))) {
1571 writemask |= 1 << (start + 2);
1572 count = 2;
1573 }
1574 int num_bytes = count * elem_size_bytes; /* count in bytes */
1575
1576 /* we can only store 4 DWords at the same time.
1577 * can only happen for 64 Bit vectors. */
1578 if (num_bytes > 16) {
1579 writemask |= ((1u << (count - 2)) - 1u) << (start + 2);
1580 count = 2;
1581 num_bytes = 16;
1582 }
1583
1584 /* check alignment of 16 Bit stores */
1585 if (elem_size_bytes == 2 && num_bytes > 2 && (start % 2) == 1) {
1586 writemask |= ((1u << (count - 1)) - 1u) << (start + 1);
1587 count = 1;
1588 num_bytes = 2;
1589 }
1590 data = extract_vector_range(&ctx->ac, base_data, start, count);
1591
1592 offset = LLVMBuildAdd(ctx->ac.builder, base_offset,
1593 LLVMConstInt(ctx->ac.i32, start * elem_size_bytes, false), "");
1594
1595 if (num_bytes == 1) {
1596 ac_build_tbuffer_store_byte(&ctx->ac, rsrc, data,
1597 offset, ctx->ac.i32_0,
1598 cache_policy & ac_glc);
1599 } else if (num_bytes == 2) {
1600 ac_build_tbuffer_store_short(&ctx->ac, rsrc, data,
1601 offset, ctx->ac.i32_0,
1602 cache_policy & ac_glc);
1603 } else {
1604 int num_channels = num_bytes / 4;
1605
1606 switch (num_bytes) {
1607 case 16: /* v4f32 */
1608 data_type = ctx->ac.v4f32;
1609 break;
1610 case 12: /* v3f32 */
1611 data_type = ctx->ac.v3f32;
1612 break;
1613 case 8: /* v2f32 */
1614 data_type = ctx->ac.v2f32;
1615 break;
1616 case 4: /* f32 */
1617 data_type = ctx->ac.f32;
1618 break;
1619 default:
1620 unreachable("Malformed vector store.");
1621 }
1622 data = LLVMBuildBitCast(ctx->ac.builder, data, data_type, "");
1623
1624 ac_build_buffer_store_dword(&ctx->ac, rsrc, data,
1625 num_channels, offset,
1626 ctx->ac.i32_0, 0,
1627 cache_policy & ac_glc,
1628 false, false);
1629 }
1630 }
1631 }
1632
1633 static LLVMValueRef visit_atomic_ssbo(struct ac_nir_context *ctx,
1634 const nir_intrinsic_instr *instr)
1635 {
1636 LLVMTypeRef return_type = LLVMTypeOf(get_src(ctx, instr->src[2]));
1637 const char *op;
1638 char name[64], type[8];
1639 LLVMValueRef params[6];
1640 int arg_count = 0;
1641
1642 switch (instr->intrinsic) {
1643 case nir_intrinsic_ssbo_atomic_add:
1644 op = "add";
1645 break;
1646 case nir_intrinsic_ssbo_atomic_imin:
1647 op = "smin";
1648 break;
1649 case nir_intrinsic_ssbo_atomic_umin:
1650 op = "umin";
1651 break;
1652 case nir_intrinsic_ssbo_atomic_imax:
1653 op = "smax";
1654 break;
1655 case nir_intrinsic_ssbo_atomic_umax:
1656 op = "umax";
1657 break;
1658 case nir_intrinsic_ssbo_atomic_and:
1659 op = "and";
1660 break;
1661 case nir_intrinsic_ssbo_atomic_or:
1662 op = "or";
1663 break;
1664 case nir_intrinsic_ssbo_atomic_xor:
1665 op = "xor";
1666 break;
1667 case nir_intrinsic_ssbo_atomic_exchange:
1668 op = "swap";
1669 break;
1670 case nir_intrinsic_ssbo_atomic_comp_swap:
1671 op = "cmpswap";
1672 break;
1673 default:
1674 abort();
1675 }
1676
1677 if (instr->intrinsic == nir_intrinsic_ssbo_atomic_comp_swap) {
1678 params[arg_count++] = ac_llvm_extract_elem(&ctx->ac, get_src(ctx, instr->src[3]), 0);
1679 }
1680 params[arg_count++] = ac_llvm_extract_elem(&ctx->ac, get_src(ctx, instr->src[2]), 0);
1681 params[arg_count++] = ctx->abi->load_ssbo(ctx->abi,
1682 get_src(ctx, instr->src[0]),
1683 true);
1684
1685 if (HAVE_LLVM >= 0x900) {
1686 /* XXX: The new raw/struct atomic intrinsics are buggy with
1687 * LLVM 8, see r358579.
1688 */
1689 params[arg_count++] = get_src(ctx, instr->src[1]); /* voffset */
1690 params[arg_count++] = ctx->ac.i32_0; /* soffset */
1691 params[arg_count++] = ctx->ac.i32_0; /* slc */
1692
1693 ac_build_type_name_for_intr(return_type, type, sizeof(type));
1694 snprintf(name, sizeof(name),
1695 "llvm.amdgcn.raw.buffer.atomic.%s.%s", op, type);
1696 } else {
1697 params[arg_count++] = ctx->ac.i32_0; /* vindex */
1698 params[arg_count++] = get_src(ctx, instr->src[1]); /* voffset */
1699 params[arg_count++] = ctx->ac.i1false; /* slc */
1700
1701 assert(return_type == ctx->ac.i32);
1702 snprintf(name, sizeof(name),
1703 "llvm.amdgcn.buffer.atomic.%s", op);
1704 }
1705
1706 return ac_build_intrinsic(&ctx->ac, name, return_type, params,
1707 arg_count, 0);
1708 }
1709
1710 static LLVMValueRef visit_load_buffer(struct ac_nir_context *ctx,
1711 const nir_intrinsic_instr *instr)
1712 {
1713 int elem_size_bytes = instr->dest.ssa.bit_size / 8;
1714 int num_components = instr->num_components;
1715 enum gl_access_qualifier access = nir_intrinsic_access(instr);
1716 unsigned cache_policy = get_cache_policy(ctx, access, false, false);
1717
1718 LLVMValueRef offset = get_src(ctx, instr->src[1]);
1719 LLVMValueRef rsrc = ctx->abi->load_ssbo(ctx->abi,
1720 get_src(ctx, instr->src[0]), false);
1721 LLVMValueRef vindex = ctx->ac.i32_0;
1722
1723 LLVMTypeRef def_type = get_def_type(ctx, &instr->dest.ssa);
1724 LLVMTypeRef def_elem_type = num_components > 1 ? LLVMGetElementType(def_type) : def_type;
1725
1726 LLVMValueRef results[4];
1727 for (int i = 0; i < num_components;) {
1728 int num_elems = num_components - i;
1729 if (elem_size_bytes < 4 && nir_intrinsic_align(instr) % 4 != 0)
1730 num_elems = 1;
1731 if (num_elems * elem_size_bytes > 16)
1732 num_elems = 16 / elem_size_bytes;
1733 int load_bytes = num_elems * elem_size_bytes;
1734
1735 LLVMValueRef immoffset = LLVMConstInt(ctx->ac.i32, i * elem_size_bytes, false);
1736
1737 LLVMValueRef ret;
1738
1739 if (load_bytes == 1) {
1740 ret = ac_build_tbuffer_load_byte(&ctx->ac,
1741 rsrc,
1742 offset,
1743 ctx->ac.i32_0,
1744 immoffset,
1745 cache_policy & ac_glc);
1746 } else if (load_bytes == 2) {
1747 ret = ac_build_tbuffer_load_short(&ctx->ac,
1748 rsrc,
1749 offset,
1750 ctx->ac.i32_0,
1751 immoffset,
1752 cache_policy & ac_glc);
1753 } else {
1754 int num_channels = util_next_power_of_two(load_bytes) / 4;
1755 bool can_speculate = access & ACCESS_CAN_REORDER;
1756
1757 ret = ac_build_buffer_load(&ctx->ac, rsrc, num_channels,
1758 vindex, offset, immoffset, 0,
1759 cache_policy & ac_glc, 0,
1760 can_speculate, false);
1761 }
1762
1763 LLVMTypeRef byte_vec = LLVMVectorType(ctx->ac.i8, ac_get_type_size(LLVMTypeOf(ret)));
1764 ret = LLVMBuildBitCast(ctx->ac.builder, ret, byte_vec, "");
1765 ret = ac_trim_vector(&ctx->ac, ret, load_bytes);
1766
1767 LLVMTypeRef ret_type = LLVMVectorType(def_elem_type, num_elems);
1768 ret = LLVMBuildBitCast(ctx->ac.builder, ret, ret_type, "");
1769
1770 for (unsigned j = 0; j < num_elems; j++) {
1771 results[i + j] = LLVMBuildExtractElement(ctx->ac.builder, ret, LLVMConstInt(ctx->ac.i32, j, false), "");
1772 }
1773 i += num_elems;
1774 }
1775
1776 return ac_build_gather_values(&ctx->ac, results, num_components);
1777 }
1778
1779 static LLVMValueRef visit_load_ubo_buffer(struct ac_nir_context *ctx,
1780 const nir_intrinsic_instr *instr)
1781 {
1782 LLVMValueRef ret;
1783 LLVMValueRef rsrc = get_src(ctx, instr->src[0]);
1784 LLVMValueRef offset = get_src(ctx, instr->src[1]);
1785 int num_components = instr->num_components;
1786
1787 if (ctx->abi->load_ubo)
1788 rsrc = ctx->abi->load_ubo(ctx->abi, rsrc);
1789
1790 if (instr->dest.ssa.bit_size == 64)
1791 num_components *= 2;
1792
1793 if (instr->dest.ssa.bit_size == 16 || instr->dest.ssa.bit_size == 8) {
1794 unsigned load_bytes = instr->dest.ssa.bit_size / 8;
1795 LLVMValueRef results[num_components];
1796 for (unsigned i = 0; i < num_components; ++i) {
1797 LLVMValueRef immoffset = LLVMConstInt(ctx->ac.i32,
1798 load_bytes * i, 0);
1799
1800 if (load_bytes == 1) {
1801 results[i] = ac_build_tbuffer_load_byte(&ctx->ac,
1802 rsrc,
1803 offset,
1804 ctx->ac.i32_0,
1805 immoffset,
1806 false);
1807 } else {
1808 assert(load_bytes == 2);
1809 results[i] = ac_build_tbuffer_load_short(&ctx->ac,
1810 rsrc,
1811 offset,
1812 ctx->ac.i32_0,
1813 immoffset,
1814 false);
1815 }
1816 }
1817 ret = ac_build_gather_values(&ctx->ac, results, num_components);
1818 } else {
1819 ret = ac_build_buffer_load(&ctx->ac, rsrc, num_components, NULL, offset,
1820 NULL, 0, false, false, true, true);
1821
1822 ret = ac_trim_vector(&ctx->ac, ret, num_components);
1823 }
1824
1825 return LLVMBuildBitCast(ctx->ac.builder, ret,
1826 get_def_type(ctx, &instr->dest.ssa), "");
1827 }
1828
1829 static void
1830 get_deref_offset(struct ac_nir_context *ctx, nir_deref_instr *instr,
1831 bool vs_in, unsigned *vertex_index_out,
1832 LLVMValueRef *vertex_index_ref,
1833 unsigned *const_out, LLVMValueRef *indir_out)
1834 {
1835 nir_variable *var = nir_deref_instr_get_variable(instr);
1836 nir_deref_path path;
1837 unsigned idx_lvl = 1;
1838
1839 nir_deref_path_init(&path, instr, NULL);
1840
1841 if (vertex_index_out != NULL || vertex_index_ref != NULL) {
1842 if (vertex_index_ref) {
1843 *vertex_index_ref = get_src(ctx, path.path[idx_lvl]->arr.index);
1844 if (vertex_index_out)
1845 *vertex_index_out = 0;
1846 } else {
1847 *vertex_index_out = nir_src_as_uint(path.path[idx_lvl]->arr.index);
1848 }
1849 ++idx_lvl;
1850 }
1851
1852 uint32_t const_offset = 0;
1853 LLVMValueRef offset = NULL;
1854
1855 if (var->data.compact) {
1856 assert(instr->deref_type == nir_deref_type_array);
1857 const_offset = nir_src_as_uint(instr->arr.index);
1858 goto out;
1859 }
1860
1861 for (; path.path[idx_lvl]; ++idx_lvl) {
1862 const struct glsl_type *parent_type = path.path[idx_lvl - 1]->type;
1863 if (path.path[idx_lvl]->deref_type == nir_deref_type_struct) {
1864 unsigned index = path.path[idx_lvl]->strct.index;
1865
1866 for (unsigned i = 0; i < index; i++) {
1867 const struct glsl_type *ft = glsl_get_struct_field(parent_type, i);
1868 const_offset += glsl_count_attribute_slots(ft, vs_in);
1869 }
1870 } else if(path.path[idx_lvl]->deref_type == nir_deref_type_array) {
1871 unsigned size = glsl_count_attribute_slots(path.path[idx_lvl]->type, vs_in);
1872 LLVMValueRef array_off = LLVMBuildMul(ctx->ac.builder, LLVMConstInt(ctx->ac.i32, size, 0),
1873 get_src(ctx, path.path[idx_lvl]->arr.index), "");
1874 if (offset)
1875 offset = LLVMBuildAdd(ctx->ac.builder, offset, array_off, "");
1876 else
1877 offset = array_off;
1878 } else
1879 unreachable("Uhandled deref type in get_deref_instr_offset");
1880 }
1881
1882 out:
1883 nir_deref_path_finish(&path);
1884
1885 if (const_offset && offset)
1886 offset = LLVMBuildAdd(ctx->ac.builder, offset,
1887 LLVMConstInt(ctx->ac.i32, const_offset, 0),
1888 "");
1889
1890 *const_out = const_offset;
1891 *indir_out = offset;
1892 }
1893
1894 static LLVMValueRef load_tess_varyings(struct ac_nir_context *ctx,
1895 nir_intrinsic_instr *instr,
1896 bool load_inputs)
1897 {
1898 LLVMValueRef result;
1899 LLVMValueRef vertex_index = NULL;
1900 LLVMValueRef indir_index = NULL;
1901 unsigned const_index = 0;
1902
1903 nir_variable *var = nir_deref_instr_get_variable(nir_instr_as_deref(instr->src[0].ssa->parent_instr));
1904
1905 unsigned location = var->data.location;
1906 unsigned driver_location = var->data.driver_location;
1907 const bool is_patch = var->data.patch;
1908 const bool is_compact = var->data.compact;
1909
1910 get_deref_offset(ctx, nir_instr_as_deref(instr->src[0].ssa->parent_instr),
1911 false, NULL, is_patch ? NULL : &vertex_index,
1912 &const_index, &indir_index);
1913
1914 LLVMTypeRef dest_type = get_def_type(ctx, &instr->dest.ssa);
1915
1916 LLVMTypeRef src_component_type;
1917 if (LLVMGetTypeKind(dest_type) == LLVMVectorTypeKind)
1918 src_component_type = LLVMGetElementType(dest_type);
1919 else
1920 src_component_type = dest_type;
1921
1922 result = ctx->abi->load_tess_varyings(ctx->abi, src_component_type,
1923 vertex_index, indir_index,
1924 const_index, location, driver_location,
1925 var->data.location_frac,
1926 instr->num_components,
1927 is_patch, is_compact, load_inputs);
1928 if (instr->dest.ssa.bit_size == 16) {
1929 result = ac_to_integer(&ctx->ac, result);
1930 result = LLVMBuildTrunc(ctx->ac.builder, result, dest_type, "");
1931 }
1932 return LLVMBuildBitCast(ctx->ac.builder, result, dest_type, "");
1933 }
1934
1935 static unsigned
1936 type_scalar_size_bytes(const struct glsl_type *type)
1937 {
1938 assert(glsl_type_is_vector_or_scalar(type) ||
1939 glsl_type_is_matrix(type));
1940 return glsl_type_is_boolean(type) ? 4 : glsl_get_bit_size(type) / 8;
1941 }
1942
1943 static LLVMValueRef visit_load_var(struct ac_nir_context *ctx,
1944 nir_intrinsic_instr *instr)
1945 {
1946 nir_deref_instr *deref = nir_instr_as_deref(instr->src[0].ssa->parent_instr);
1947 nir_variable *var = nir_deref_instr_get_variable(deref);
1948
1949 LLVMValueRef values[8];
1950 int idx = 0;
1951 int ve = instr->dest.ssa.num_components;
1952 unsigned comp = 0;
1953 LLVMValueRef indir_index;
1954 LLVMValueRef ret;
1955 unsigned const_index;
1956 unsigned stride = 4;
1957 int mode = deref->mode;
1958
1959 if (var) {
1960 bool vs_in = ctx->stage == MESA_SHADER_VERTEX &&
1961 var->data.mode == nir_var_shader_in;
1962 idx = var->data.driver_location;
1963 comp = var->data.location_frac;
1964 mode = var->data.mode;
1965
1966 get_deref_offset(ctx, deref, vs_in, NULL, NULL,
1967 &const_index, &indir_index);
1968
1969 if (var->data.compact) {
1970 stride = 1;
1971 const_index += comp;
1972 comp = 0;
1973 }
1974 }
1975
1976 if (instr->dest.ssa.bit_size == 64 &&
1977 (deref->mode == nir_var_shader_in ||
1978 deref->mode == nir_var_shader_out ||
1979 deref->mode == nir_var_function_temp))
1980 ve *= 2;
1981
1982 switch (mode) {
1983 case nir_var_shader_in:
1984 if (ctx->stage == MESA_SHADER_TESS_CTRL ||
1985 ctx->stage == MESA_SHADER_TESS_EVAL) {
1986 return load_tess_varyings(ctx, instr, true);
1987 }
1988
1989 if (ctx->stage == MESA_SHADER_GEOMETRY) {
1990 LLVMTypeRef type = LLVMIntTypeInContext(ctx->ac.context, instr->dest.ssa.bit_size);
1991 LLVMValueRef indir_index;
1992 unsigned const_index, vertex_index;
1993 get_deref_offset(ctx, deref, false, &vertex_index, NULL,
1994 &const_index, &indir_index);
1995
1996 return ctx->abi->load_inputs(ctx->abi, var->data.location,
1997 var->data.driver_location,
1998 var->data.location_frac,
1999 instr->num_components, vertex_index, const_index, type);
2000 }
2001
2002 for (unsigned chan = comp; chan < ve + comp; chan++) {
2003 if (indir_index) {
2004 unsigned count = glsl_count_attribute_slots(
2005 var->type,
2006 ctx->stage == MESA_SHADER_VERTEX);
2007 count -= chan / 4;
2008 LLVMValueRef tmp_vec = ac_build_gather_values_extended(
2009 &ctx->ac, ctx->abi->inputs + idx + chan, count,
2010 stride, false, true);
2011
2012 values[chan] = LLVMBuildExtractElement(ctx->ac.builder,
2013 tmp_vec,
2014 indir_index, "");
2015 } else
2016 values[chan] = ctx->abi->inputs[idx + chan + const_index * stride];
2017 }
2018 break;
2019 case nir_var_function_temp:
2020 for (unsigned chan = 0; chan < ve; chan++) {
2021 if (indir_index) {
2022 unsigned count = glsl_count_attribute_slots(
2023 var->type, false);
2024 count -= chan / 4;
2025 LLVMValueRef tmp_vec = ac_build_gather_values_extended(
2026 &ctx->ac, ctx->locals + idx + chan, count,
2027 stride, true, true);
2028
2029 values[chan] = LLVMBuildExtractElement(ctx->ac.builder,
2030 tmp_vec,
2031 indir_index, "");
2032 } else {
2033 values[chan] = LLVMBuildLoad(ctx->ac.builder, ctx->locals[idx + chan + const_index * stride], "");
2034 }
2035 }
2036 break;
2037 case nir_var_mem_shared: {
2038 LLVMValueRef address = get_src(ctx, instr->src[0]);
2039 LLVMValueRef val = LLVMBuildLoad(ctx->ac.builder, address, "");
2040 return LLVMBuildBitCast(ctx->ac.builder, val,
2041 get_def_type(ctx, &instr->dest.ssa),
2042 "");
2043 }
2044 case nir_var_shader_out:
2045 if (ctx->stage == MESA_SHADER_TESS_CTRL) {
2046 return load_tess_varyings(ctx, instr, false);
2047 }
2048
2049 for (unsigned chan = comp; chan < ve + comp; chan++) {
2050 if (indir_index) {
2051 unsigned count = glsl_count_attribute_slots(
2052 var->type, false);
2053 count -= chan / 4;
2054 LLVMValueRef tmp_vec = ac_build_gather_values_extended(
2055 &ctx->ac, ctx->abi->outputs + idx + chan, count,
2056 stride, true, true);
2057
2058 values[chan] = LLVMBuildExtractElement(ctx->ac.builder,
2059 tmp_vec,
2060 indir_index, "");
2061 } else {
2062 values[chan] = LLVMBuildLoad(ctx->ac.builder,
2063 ctx->abi->outputs[idx + chan + const_index * stride],
2064 "");
2065 }
2066 }
2067 break;
2068 case nir_var_mem_global: {
2069 LLVMValueRef address = get_src(ctx, instr->src[0]);
2070 unsigned explicit_stride = glsl_get_explicit_stride(deref->type);
2071 unsigned natural_stride = type_scalar_size_bytes(deref->type);
2072 unsigned stride = explicit_stride ? explicit_stride : natural_stride;
2073
2074 LLVMTypeRef result_type = get_def_type(ctx, &instr->dest.ssa);
2075 if (stride != natural_stride) {
2076 LLVMTypeRef ptr_type = LLVMPointerType(LLVMGetElementType(result_type),
2077 LLVMGetPointerAddressSpace(LLVMTypeOf(address)));
2078 address = LLVMBuildBitCast(ctx->ac.builder, address, ptr_type , "");
2079
2080 for (unsigned i = 0; i < instr->dest.ssa.num_components; ++i) {
2081 LLVMValueRef offset = LLVMConstInt(ctx->ac.i32, i * stride / natural_stride, 0);
2082 values[i] = LLVMBuildLoad(ctx->ac.builder,
2083 ac_build_gep_ptr(&ctx->ac, address, offset), "");
2084 }
2085 return ac_build_gather_values(&ctx->ac, values, instr->dest.ssa.num_components);
2086 } else {
2087 LLVMTypeRef ptr_type = LLVMPointerType(result_type,
2088 LLVMGetPointerAddressSpace(LLVMTypeOf(address)));
2089 address = LLVMBuildBitCast(ctx->ac.builder, address, ptr_type , "");
2090 LLVMValueRef val = LLVMBuildLoad(ctx->ac.builder, address, "");
2091 return val;
2092 }
2093 }
2094 default:
2095 unreachable("unhandle variable mode");
2096 }
2097 ret = ac_build_varying_gather_values(&ctx->ac, values, ve, comp);
2098 return LLVMBuildBitCast(ctx->ac.builder, ret, get_def_type(ctx, &instr->dest.ssa), "");
2099 }
2100
2101 static void
2102 visit_store_var(struct ac_nir_context *ctx,
2103 nir_intrinsic_instr *instr)
2104 {
2105 nir_deref_instr *deref = nir_instr_as_deref(instr->src[0].ssa->parent_instr);
2106 nir_variable *var = nir_deref_instr_get_variable(deref);
2107
2108 LLVMValueRef temp_ptr, value;
2109 int idx = 0;
2110 unsigned comp = 0;
2111 LLVMValueRef src = ac_to_float(&ctx->ac, get_src(ctx, instr->src[1]));
2112 int writemask = instr->const_index[0];
2113 LLVMValueRef indir_index;
2114 unsigned const_index;
2115
2116 if (var) {
2117 get_deref_offset(ctx, deref, false,
2118 NULL, NULL, &const_index, &indir_index);
2119 idx = var->data.driver_location;
2120 comp = var->data.location_frac;
2121
2122 if (var->data.compact) {
2123 const_index += comp;
2124 comp = 0;
2125 }
2126 }
2127
2128 if (ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src)) == 64 &&
2129 (deref->mode == nir_var_shader_out ||
2130 deref->mode == nir_var_function_temp)) {
2131
2132 src = LLVMBuildBitCast(ctx->ac.builder, src,
2133 LLVMVectorType(ctx->ac.f32, ac_get_llvm_num_components(src) * 2),
2134 "");
2135
2136 writemask = widen_mask(writemask, 2);
2137 }
2138
2139 writemask = writemask << comp;
2140
2141 switch (deref->mode) {
2142 case nir_var_shader_out:
2143
2144 if (ctx->stage == MESA_SHADER_TESS_CTRL) {
2145 LLVMValueRef vertex_index = NULL;
2146 LLVMValueRef indir_index = NULL;
2147 unsigned const_index = 0;
2148 const bool is_patch = var->data.patch;
2149
2150 get_deref_offset(ctx, deref, false, NULL,
2151 is_patch ? NULL : &vertex_index,
2152 &const_index, &indir_index);
2153
2154 ctx->abi->store_tcs_outputs(ctx->abi, var,
2155 vertex_index, indir_index,
2156 const_index, src, writemask);
2157 return;
2158 }
2159
2160 for (unsigned chan = 0; chan < 8; chan++) {
2161 int stride = 4;
2162 if (!(writemask & (1 << chan)))
2163 continue;
2164
2165 value = ac_llvm_extract_elem(&ctx->ac, src, chan - comp);
2166
2167 if (var->data.compact)
2168 stride = 1;
2169 if (indir_index) {
2170 unsigned count = glsl_count_attribute_slots(
2171 var->type, false);
2172 count -= chan / 4;
2173 LLVMValueRef tmp_vec = ac_build_gather_values_extended(
2174 &ctx->ac, ctx->abi->outputs + idx + chan, count,
2175 stride, true, true);
2176
2177 tmp_vec = LLVMBuildInsertElement(ctx->ac.builder, tmp_vec,
2178 value, indir_index, "");
2179 build_store_values_extended(&ctx->ac, ctx->abi->outputs + idx + chan,
2180 count, stride, tmp_vec);
2181
2182 } else {
2183 temp_ptr = ctx->abi->outputs[idx + chan + const_index * stride];
2184
2185 LLVMBuildStore(ctx->ac.builder, value, temp_ptr);
2186 }
2187 }
2188 break;
2189 case nir_var_function_temp:
2190 for (unsigned chan = 0; chan < 8; chan++) {
2191 if (!(writemask & (1 << chan)))
2192 continue;
2193
2194 value = ac_llvm_extract_elem(&ctx->ac, src, chan);
2195 if (indir_index) {
2196 unsigned count = glsl_count_attribute_slots(
2197 var->type, false);
2198 count -= chan / 4;
2199 LLVMValueRef tmp_vec = ac_build_gather_values_extended(
2200 &ctx->ac, ctx->locals + idx + chan, count,
2201 4, true, true);
2202
2203 tmp_vec = LLVMBuildInsertElement(ctx->ac.builder, tmp_vec,
2204 value, indir_index, "");
2205 build_store_values_extended(&ctx->ac, ctx->locals + idx + chan,
2206 count, 4, tmp_vec);
2207 } else {
2208 temp_ptr = ctx->locals[idx + chan + const_index * 4];
2209
2210 LLVMBuildStore(ctx->ac.builder, value, temp_ptr);
2211 }
2212 }
2213 break;
2214
2215 case nir_var_mem_global:
2216 case nir_var_mem_shared: {
2217 int writemask = instr->const_index[0];
2218 LLVMValueRef address = get_src(ctx, instr->src[0]);
2219 LLVMValueRef val = get_src(ctx, instr->src[1]);
2220
2221 unsigned explicit_stride = glsl_get_explicit_stride(deref->type);
2222 unsigned natural_stride = type_scalar_size_bytes(deref->type);
2223 unsigned stride = explicit_stride ? explicit_stride : natural_stride;
2224
2225 LLVMTypeRef ptr_type = LLVMPointerType(LLVMTypeOf(val),
2226 LLVMGetPointerAddressSpace(LLVMTypeOf(address)));
2227 address = LLVMBuildBitCast(ctx->ac.builder, address, ptr_type , "");
2228
2229 if (writemask == (1u << ac_get_llvm_num_components(val)) - 1 &&
2230 stride == natural_stride) {
2231 LLVMTypeRef ptr_type = LLVMPointerType(LLVMTypeOf(val),
2232 LLVMGetPointerAddressSpace(LLVMTypeOf(address)));
2233 address = LLVMBuildBitCast(ctx->ac.builder, address, ptr_type , "");
2234
2235 val = LLVMBuildBitCast(ctx->ac.builder, val,
2236 LLVMGetElementType(LLVMTypeOf(address)), "");
2237 LLVMBuildStore(ctx->ac.builder, val, address);
2238 } else {
2239 LLVMTypeRef ptr_type = LLVMPointerType(LLVMGetElementType(LLVMTypeOf(val)),
2240 LLVMGetPointerAddressSpace(LLVMTypeOf(address)));
2241 address = LLVMBuildBitCast(ctx->ac.builder, address, ptr_type , "");
2242 for (unsigned chan = 0; chan < 4; chan++) {
2243 if (!(writemask & (1 << chan)))
2244 continue;
2245
2246 LLVMValueRef offset = LLVMConstInt(ctx->ac.i32, chan * stride / natural_stride, 0);
2247
2248 LLVMValueRef ptr = ac_build_gep_ptr(&ctx->ac, address, offset);
2249 LLVMValueRef src = ac_llvm_extract_elem(&ctx->ac, val,
2250 chan);
2251 src = LLVMBuildBitCast(ctx->ac.builder, src,
2252 LLVMGetElementType(LLVMTypeOf(ptr)), "");
2253 LLVMBuildStore(ctx->ac.builder, src, ptr);
2254 }
2255 }
2256 break;
2257 }
2258 default:
2259 abort();
2260 break;
2261 }
2262 }
2263
2264 static int image_type_to_components_count(enum glsl_sampler_dim dim, bool array)
2265 {
2266 switch (dim) {
2267 case GLSL_SAMPLER_DIM_BUF:
2268 return 1;
2269 case GLSL_SAMPLER_DIM_1D:
2270 return array ? 2 : 1;
2271 case GLSL_SAMPLER_DIM_2D:
2272 return array ? 3 : 2;
2273 case GLSL_SAMPLER_DIM_MS:
2274 return array ? 4 : 3;
2275 case GLSL_SAMPLER_DIM_3D:
2276 case GLSL_SAMPLER_DIM_CUBE:
2277 return 3;
2278 case GLSL_SAMPLER_DIM_RECT:
2279 case GLSL_SAMPLER_DIM_SUBPASS:
2280 return 2;
2281 case GLSL_SAMPLER_DIM_SUBPASS_MS:
2282 return 3;
2283 default:
2284 break;
2285 }
2286 return 0;
2287 }
2288
2289 static LLVMValueRef adjust_sample_index_using_fmask(struct ac_llvm_context *ctx,
2290 LLVMValueRef coord_x, LLVMValueRef coord_y,
2291 LLVMValueRef coord_z,
2292 LLVMValueRef sample_index,
2293 LLVMValueRef fmask_desc_ptr)
2294 {
2295 unsigned sample_chan = coord_z ? 3 : 2;
2296 LLVMValueRef addr[4] = {coord_x, coord_y, coord_z};
2297 addr[sample_chan] = sample_index;
2298
2299 ac_apply_fmask_to_sample(ctx, fmask_desc_ptr, addr, coord_z != NULL);
2300 return addr[sample_chan];
2301 }
2302
2303 static nir_deref_instr *get_image_deref(const nir_intrinsic_instr *instr)
2304 {
2305 assert(instr->src[0].is_ssa);
2306 return nir_instr_as_deref(instr->src[0].ssa->parent_instr);
2307 }
2308
2309 static LLVMValueRef get_image_descriptor(struct ac_nir_context *ctx,
2310 const nir_intrinsic_instr *instr,
2311 enum ac_descriptor_type desc_type,
2312 bool write)
2313 {
2314 nir_deref_instr *deref_instr =
2315 instr->src[0].ssa->parent_instr->type == nir_instr_type_deref ?
2316 nir_instr_as_deref(instr->src[0].ssa->parent_instr) : NULL;
2317
2318 return get_sampler_desc(ctx, deref_instr, desc_type, &instr->instr, true, write);
2319 }
2320
2321 static void get_image_coords(struct ac_nir_context *ctx,
2322 const nir_intrinsic_instr *instr,
2323 struct ac_image_args *args,
2324 enum glsl_sampler_dim dim,
2325 bool is_array)
2326 {
2327 LLVMValueRef src0 = get_src(ctx, instr->src[1]);
2328 LLVMValueRef masks[] = {
2329 LLVMConstInt(ctx->ac.i32, 0, false), LLVMConstInt(ctx->ac.i32, 1, false),
2330 LLVMConstInt(ctx->ac.i32, 2, false), LLVMConstInt(ctx->ac.i32, 3, false),
2331 };
2332 LLVMValueRef sample_index = ac_llvm_extract_elem(&ctx->ac, get_src(ctx, instr->src[2]), 0);
2333
2334 int count;
2335 bool add_frag_pos = (dim == GLSL_SAMPLER_DIM_SUBPASS ||
2336 dim == GLSL_SAMPLER_DIM_SUBPASS_MS);
2337 bool is_ms = (dim == GLSL_SAMPLER_DIM_MS ||
2338 dim == GLSL_SAMPLER_DIM_SUBPASS_MS);
2339 bool gfx9_1d = ctx->ac.chip_class >= GFX9 && dim == GLSL_SAMPLER_DIM_1D;
2340 count = image_type_to_components_count(dim, is_array);
2341
2342 if (is_ms && (instr->intrinsic == nir_intrinsic_image_deref_load ||
2343 instr->intrinsic == nir_intrinsic_bindless_image_load)) {
2344 LLVMValueRef fmask_load_address[3];
2345 int chan;
2346
2347 fmask_load_address[0] = LLVMBuildExtractElement(ctx->ac.builder, src0, masks[0], "");
2348 fmask_load_address[1] = LLVMBuildExtractElement(ctx->ac.builder, src0, masks[1], "");
2349 if (is_array)
2350 fmask_load_address[2] = LLVMBuildExtractElement(ctx->ac.builder, src0, masks[2], "");
2351 else
2352 fmask_load_address[2] = NULL;
2353 if (add_frag_pos) {
2354 for (chan = 0; chan < 2; ++chan)
2355 fmask_load_address[chan] =
2356 LLVMBuildAdd(ctx->ac.builder, fmask_load_address[chan],
2357 LLVMBuildFPToUI(ctx->ac.builder, ctx->abi->frag_pos[chan],
2358 ctx->ac.i32, ""), "");
2359 fmask_load_address[2] = ac_to_integer(&ctx->ac, ctx->abi->inputs[ac_llvm_reg_index_soa(VARYING_SLOT_LAYER, 0)]);
2360 }
2361 sample_index = adjust_sample_index_using_fmask(&ctx->ac,
2362 fmask_load_address[0],
2363 fmask_load_address[1],
2364 fmask_load_address[2],
2365 sample_index,
2366 get_sampler_desc(ctx, nir_instr_as_deref(instr->src[0].ssa->parent_instr),
2367 AC_DESC_FMASK, &instr->instr, false, false));
2368 }
2369 if (count == 1 && !gfx9_1d) {
2370 if (instr->src[1].ssa->num_components)
2371 args->coords[0] = LLVMBuildExtractElement(ctx->ac.builder, src0, masks[0], "");
2372 else
2373 args->coords[0] = src0;
2374 } else {
2375 int chan;
2376 if (is_ms)
2377 count--;
2378 for (chan = 0; chan < count; ++chan) {
2379 args->coords[chan] = ac_llvm_extract_elem(&ctx->ac, src0, chan);
2380 }
2381 if (add_frag_pos) {
2382 for (chan = 0; chan < 2; ++chan) {
2383 args->coords[chan] = LLVMBuildAdd(
2384 ctx->ac.builder, args->coords[chan],
2385 LLVMBuildFPToUI(
2386 ctx->ac.builder, ctx->abi->frag_pos[chan],
2387 ctx->ac.i32, ""), "");
2388 }
2389 args->coords[2] = ac_to_integer(&ctx->ac,
2390 ctx->abi->inputs[ac_llvm_reg_index_soa(VARYING_SLOT_LAYER, 0)]);
2391 count++;
2392 }
2393
2394 if (gfx9_1d) {
2395 if (is_array) {
2396 args->coords[2] = args->coords[1];
2397 args->coords[1] = ctx->ac.i32_0;
2398 } else
2399 args->coords[1] = ctx->ac.i32_0;
2400 count++;
2401 }
2402
2403 if (is_ms) {
2404 args->coords[count] = sample_index;
2405 count++;
2406 }
2407 }
2408 }
2409
2410 static LLVMValueRef get_image_buffer_descriptor(struct ac_nir_context *ctx,
2411 const nir_intrinsic_instr *instr,
2412 bool write, bool atomic)
2413 {
2414 LLVMValueRef rsrc = get_image_descriptor(ctx, instr, AC_DESC_BUFFER, write);
2415 if (ctx->abi->gfx9_stride_size_workaround ||
2416 (ctx->abi->gfx9_stride_size_workaround_for_atomic && atomic)) {
2417 LLVMValueRef elem_count = LLVMBuildExtractElement(ctx->ac.builder, rsrc, LLVMConstInt(ctx->ac.i32, 2, 0), "");
2418 LLVMValueRef stride = LLVMBuildExtractElement(ctx->ac.builder, rsrc, LLVMConstInt(ctx->ac.i32, 1, 0), "");
2419 stride = LLVMBuildLShr(ctx->ac.builder, stride, LLVMConstInt(ctx->ac.i32, 16, 0), "");
2420
2421 LLVMValueRef new_elem_count = LLVMBuildSelect(ctx->ac.builder,
2422 LLVMBuildICmp(ctx->ac.builder, LLVMIntUGT, elem_count, stride, ""),
2423 elem_count, stride, "");
2424
2425 rsrc = LLVMBuildInsertElement(ctx->ac.builder, rsrc, new_elem_count,
2426 LLVMConstInt(ctx->ac.i32, 2, 0), "");
2427 }
2428 return rsrc;
2429 }
2430
2431 static LLVMValueRef visit_image_load(struct ac_nir_context *ctx,
2432 const nir_intrinsic_instr *instr,
2433 bool bindless)
2434 {
2435 LLVMValueRef res;
2436
2437 enum glsl_sampler_dim dim;
2438 enum gl_access_qualifier access;
2439 bool is_array;
2440 if (bindless) {
2441 dim = nir_intrinsic_image_dim(instr);
2442 access = nir_intrinsic_access(instr);
2443 is_array = nir_intrinsic_image_array(instr);
2444 } else {
2445 const nir_deref_instr *image_deref = get_image_deref(instr);
2446 const struct glsl_type *type = image_deref->type;
2447 const nir_variable *var = nir_deref_instr_get_variable(image_deref);
2448 dim = glsl_get_sampler_dim(type);
2449 access = var->data.image.access;
2450 is_array = glsl_sampler_type_is_array(type);
2451 }
2452
2453 struct ac_image_args args = {};
2454
2455 args.cache_policy = get_cache_policy(ctx, access, false, false);
2456
2457 if (dim == GLSL_SAMPLER_DIM_BUF) {
2458 unsigned mask = nir_ssa_def_components_read(&instr->dest.ssa);
2459 unsigned num_channels = util_last_bit(mask);
2460 LLVMValueRef rsrc, vindex;
2461
2462 rsrc = get_image_buffer_descriptor(ctx, instr, false, false);
2463 vindex = LLVMBuildExtractElement(ctx->ac.builder, get_src(ctx, instr->src[1]),
2464 ctx->ac.i32_0, "");
2465
2466 bool can_speculate = access & ACCESS_CAN_REORDER;
2467 res = ac_build_buffer_load_format(&ctx->ac, rsrc, vindex,
2468 ctx->ac.i32_0, num_channels,
2469 !!(args.cache_policy & ac_glc),
2470 can_speculate);
2471 res = ac_build_expand_to_vec4(&ctx->ac, res, num_channels);
2472
2473 res = ac_trim_vector(&ctx->ac, res, instr->dest.ssa.num_components);
2474 res = ac_to_integer(&ctx->ac, res);
2475 } else {
2476 args.opcode = ac_image_load;
2477 get_image_coords(ctx, instr, &args, dim, is_array);
2478 args.resource = get_image_descriptor(ctx, instr, AC_DESC_IMAGE, false);
2479 args.dim = get_ac_image_dim(&ctx->ac, dim, is_array);
2480 args.dmask = 15;
2481 args.attributes = AC_FUNC_ATTR_READONLY;
2482
2483 res = ac_build_image_opcode(&ctx->ac, &args);
2484 }
2485 return res;
2486 }
2487
2488 static void visit_image_store(struct ac_nir_context *ctx,
2489 nir_intrinsic_instr *instr,
2490 bool bindless)
2491 {
2492
2493
2494 enum glsl_sampler_dim dim;
2495 enum gl_access_qualifier access;
2496 bool is_array;
2497 if (bindless) {
2498 dim = nir_intrinsic_image_dim(instr);
2499 access = nir_intrinsic_access(instr);
2500 is_array = nir_intrinsic_image_array(instr);
2501 } else {
2502 const nir_deref_instr *image_deref = get_image_deref(instr);
2503 const struct glsl_type *type = image_deref->type;
2504 const nir_variable *var = nir_deref_instr_get_variable(image_deref);
2505 dim = glsl_get_sampler_dim(type);
2506 access = var->data.image.access;
2507 is_array = glsl_sampler_type_is_array(type);
2508 }
2509
2510 bool writeonly_memory = access & ACCESS_NON_READABLE;
2511 struct ac_image_args args = {};
2512
2513 args.cache_policy = get_cache_policy(ctx, access, true, writeonly_memory);
2514
2515 if (dim == GLSL_SAMPLER_DIM_BUF) {
2516 LLVMValueRef rsrc = get_image_buffer_descriptor(ctx, instr, true, false);
2517 LLVMValueRef src = ac_to_float(&ctx->ac, get_src(ctx, instr->src[3]));
2518 unsigned src_channels = ac_get_llvm_num_components(src);
2519 LLVMValueRef vindex;
2520
2521 if (src_channels == 3)
2522 src = ac_build_expand_to_vec4(&ctx->ac, src, 3);
2523
2524 vindex = LLVMBuildExtractElement(ctx->ac.builder,
2525 get_src(ctx, instr->src[1]),
2526 ctx->ac.i32_0, "");
2527
2528 ac_build_buffer_store_format(&ctx->ac, rsrc, src, vindex,
2529 ctx->ac.i32_0, src_channels,
2530 args.cache_policy & ac_glc, false);
2531 } else {
2532 args.opcode = ac_image_store;
2533 args.data[0] = ac_to_float(&ctx->ac, get_src(ctx, instr->src[3]));
2534 get_image_coords(ctx, instr, &args, dim, is_array);
2535 args.resource = get_image_descriptor(ctx, instr, AC_DESC_IMAGE, true);
2536 args.dim = get_ac_image_dim(&ctx->ac, dim, is_array);
2537 args.dmask = 15;
2538
2539 ac_build_image_opcode(&ctx->ac, &args);
2540 }
2541
2542 }
2543
2544 static LLVMValueRef visit_image_atomic(struct ac_nir_context *ctx,
2545 const nir_intrinsic_instr *instr,
2546 bool bindless)
2547 {
2548 LLVMValueRef params[7];
2549 int param_count = 0;
2550
2551 bool cmpswap = instr->intrinsic == nir_intrinsic_image_deref_atomic_comp_swap ||
2552 instr->intrinsic == nir_intrinsic_bindless_image_atomic_comp_swap;
2553 const char *atomic_name;
2554 char intrinsic_name[64];
2555 enum ac_atomic_op atomic_subop;
2556 MAYBE_UNUSED int length;
2557
2558 enum glsl_sampler_dim dim;
2559 bool is_unsigned = false;
2560 bool is_array;
2561 if (bindless) {
2562 if (instr->intrinsic == nir_intrinsic_bindless_image_atomic_min ||
2563 instr->intrinsic == nir_intrinsic_bindless_image_atomic_max) {
2564 const GLenum format = nir_intrinsic_format(instr);
2565 assert(format == GL_R32UI || format == GL_R32I);
2566 is_unsigned = format == GL_R32UI;
2567 }
2568 dim = nir_intrinsic_image_dim(instr);
2569 is_array = nir_intrinsic_image_array(instr);
2570 } else {
2571 const struct glsl_type *type = get_image_deref(instr)->type;
2572 is_unsigned = glsl_get_sampler_result_type(type) == GLSL_TYPE_UINT;
2573 dim = glsl_get_sampler_dim(type);
2574 is_array = glsl_sampler_type_is_array(type);
2575 }
2576
2577 switch (instr->intrinsic) {
2578 case nir_intrinsic_bindless_image_atomic_add:
2579 case nir_intrinsic_image_deref_atomic_add:
2580 atomic_name = "add";
2581 atomic_subop = ac_atomic_add;
2582 break;
2583 case nir_intrinsic_bindless_image_atomic_min:
2584 case nir_intrinsic_image_deref_atomic_min:
2585 atomic_name = is_unsigned ? "umin" : "smin";
2586 atomic_subop = is_unsigned ? ac_atomic_umin : ac_atomic_smin;
2587 break;
2588 case nir_intrinsic_bindless_image_atomic_max:
2589 case nir_intrinsic_image_deref_atomic_max:
2590 atomic_name = is_unsigned ? "umax" : "smax";
2591 atomic_subop = is_unsigned ? ac_atomic_umax : ac_atomic_smax;
2592 break;
2593 case nir_intrinsic_bindless_image_atomic_and:
2594 case nir_intrinsic_image_deref_atomic_and:
2595 atomic_name = "and";
2596 atomic_subop = ac_atomic_and;
2597 break;
2598 case nir_intrinsic_bindless_image_atomic_or:
2599 case nir_intrinsic_image_deref_atomic_or:
2600 atomic_name = "or";
2601 atomic_subop = ac_atomic_or;
2602 break;
2603 case nir_intrinsic_bindless_image_atomic_xor:
2604 case nir_intrinsic_image_deref_atomic_xor:
2605 atomic_name = "xor";
2606 atomic_subop = ac_atomic_xor;
2607 break;
2608 case nir_intrinsic_bindless_image_atomic_exchange:
2609 case nir_intrinsic_image_deref_atomic_exchange:
2610 atomic_name = "swap";
2611 atomic_subop = ac_atomic_swap;
2612 break;
2613 case nir_intrinsic_bindless_image_atomic_comp_swap:
2614 case nir_intrinsic_image_deref_atomic_comp_swap:
2615 atomic_name = "cmpswap";
2616 atomic_subop = 0; /* not used */
2617 break;
2618 default:
2619 abort();
2620 }
2621
2622 if (cmpswap)
2623 params[param_count++] = get_src(ctx, instr->src[4]);
2624 params[param_count++] = get_src(ctx, instr->src[3]);
2625
2626 if (dim == GLSL_SAMPLER_DIM_BUF) {
2627 params[param_count++] = get_image_buffer_descriptor(ctx, instr, true, true);
2628 params[param_count++] = LLVMBuildExtractElement(ctx->ac.builder, get_src(ctx, instr->src[1]),
2629 ctx->ac.i32_0, ""); /* vindex */
2630 params[param_count++] = ctx->ac.i32_0; /* voffset */
2631 if (HAVE_LLVM >= 0x900) {
2632 /* XXX: The new raw/struct atomic intrinsics are buggy
2633 * with LLVM 8, see r358579.
2634 */
2635 params[param_count++] = ctx->ac.i32_0; /* soffset */
2636 params[param_count++] = ctx->ac.i32_0; /* slc */
2637
2638 length = snprintf(intrinsic_name, sizeof(intrinsic_name),
2639 "llvm.amdgcn.struct.buffer.atomic.%s.i32", atomic_name);
2640 } else {
2641 params[param_count++] = ctx->ac.i1false; /* slc */
2642
2643 length = snprintf(intrinsic_name, sizeof(intrinsic_name),
2644 "llvm.amdgcn.buffer.atomic.%s", atomic_name);
2645 }
2646
2647 assert(length < sizeof(intrinsic_name));
2648 return ac_build_intrinsic(&ctx->ac, intrinsic_name, ctx->ac.i32,
2649 params, param_count, 0);
2650 } else {
2651 struct ac_image_args args = {};
2652 args.opcode = cmpswap ? ac_image_atomic_cmpswap : ac_image_atomic;
2653 args.atomic = atomic_subop;
2654 args.data[0] = params[0];
2655 if (cmpswap)
2656 args.data[1] = params[1];
2657 get_image_coords(ctx, instr, &args, dim, is_array);
2658 args.resource = get_image_descriptor(ctx, instr, AC_DESC_IMAGE, true);
2659 args.dim = get_ac_image_dim(&ctx->ac, dim, is_array);
2660
2661 return ac_build_image_opcode(&ctx->ac, &args);
2662 }
2663 }
2664
2665 static LLVMValueRef visit_image_samples(struct ac_nir_context *ctx,
2666 const nir_intrinsic_instr *instr,
2667 bool bindless)
2668 {
2669 enum glsl_sampler_dim dim;
2670 bool is_array;
2671 if (bindless) {
2672 dim = nir_intrinsic_image_dim(instr);
2673 is_array = nir_intrinsic_image_array(instr);
2674 } else {
2675 const struct glsl_type *type = get_image_deref(instr)->type;
2676 dim = glsl_get_sampler_dim(type);
2677 is_array = glsl_sampler_type_is_array(type);
2678 }
2679
2680 struct ac_image_args args = { 0 };
2681 args.dim = get_ac_sampler_dim(&ctx->ac, dim, is_array);
2682 args.dmask = 0xf;
2683 args.resource = get_image_descriptor(ctx, instr, AC_DESC_IMAGE, false);
2684 args.opcode = ac_image_get_resinfo;
2685 args.lod = ctx->ac.i32_0;
2686 args.attributes = AC_FUNC_ATTR_READNONE;
2687
2688 return ac_build_image_opcode(&ctx->ac, &args);
2689 }
2690
2691 static LLVMValueRef visit_image_size(struct ac_nir_context *ctx,
2692 const nir_intrinsic_instr *instr,
2693 bool bindless)
2694 {
2695 LLVMValueRef res;
2696
2697 enum glsl_sampler_dim dim;
2698 bool is_array;
2699 if (bindless) {
2700 dim = nir_intrinsic_image_dim(instr);
2701 is_array = nir_intrinsic_image_array(instr);
2702 } else {
2703 const struct glsl_type *type = get_image_deref(instr)->type;
2704 dim = glsl_get_sampler_dim(type);
2705 is_array = glsl_sampler_type_is_array(type);
2706 }
2707
2708 if (dim == GLSL_SAMPLER_DIM_BUF)
2709 return get_buffer_size(ctx, get_image_descriptor(ctx, instr, AC_DESC_BUFFER, false), true);
2710
2711 struct ac_image_args args = { 0 };
2712
2713 args.dim = get_ac_image_dim(&ctx->ac, dim, is_array);
2714 args.dmask = 0xf;
2715 args.resource = get_image_descriptor(ctx, instr, AC_DESC_IMAGE, false);
2716 args.opcode = ac_image_get_resinfo;
2717 args.lod = ctx->ac.i32_0;
2718 args.attributes = AC_FUNC_ATTR_READNONE;
2719
2720 res = ac_build_image_opcode(&ctx->ac, &args);
2721
2722 LLVMValueRef two = LLVMConstInt(ctx->ac.i32, 2, false);
2723
2724 if (dim == GLSL_SAMPLER_DIM_CUBE && is_array) {
2725 LLVMValueRef six = LLVMConstInt(ctx->ac.i32, 6, false);
2726 LLVMValueRef z = LLVMBuildExtractElement(ctx->ac.builder, res, two, "");
2727 z = LLVMBuildSDiv(ctx->ac.builder, z, six, "");
2728 res = LLVMBuildInsertElement(ctx->ac.builder, res, z, two, "");
2729 }
2730 if (ctx->ac.chip_class >= GFX9 && dim == GLSL_SAMPLER_DIM_1D && is_array) {
2731 LLVMValueRef layers = LLVMBuildExtractElement(ctx->ac.builder, res, two, "");
2732 res = LLVMBuildInsertElement(ctx->ac.builder, res, layers,
2733 ctx->ac.i32_1, "");
2734
2735 }
2736 return res;
2737 }
2738
2739 static void emit_membar(struct ac_llvm_context *ac,
2740 const nir_intrinsic_instr *instr)
2741 {
2742 unsigned waitcnt = NOOP_WAITCNT;
2743
2744 switch (instr->intrinsic) {
2745 case nir_intrinsic_memory_barrier:
2746 case nir_intrinsic_group_memory_barrier:
2747 waitcnt &= VM_CNT & LGKM_CNT;
2748 break;
2749 case nir_intrinsic_memory_barrier_atomic_counter:
2750 case nir_intrinsic_memory_barrier_buffer:
2751 case nir_intrinsic_memory_barrier_image:
2752 waitcnt &= VM_CNT;
2753 break;
2754 case nir_intrinsic_memory_barrier_shared:
2755 waitcnt &= LGKM_CNT;
2756 break;
2757 default:
2758 break;
2759 }
2760 if (waitcnt != NOOP_WAITCNT)
2761 ac_build_waitcnt(ac, waitcnt);
2762 }
2763
2764 void ac_emit_barrier(struct ac_llvm_context *ac, gl_shader_stage stage)
2765 {
2766 /* GFX6 only (thanks to a hw bug workaround):
2767 * The real barrier instruction isn’t needed, because an entire patch
2768 * always fits into a single wave.
2769 */
2770 if (ac->chip_class == GFX6 && stage == MESA_SHADER_TESS_CTRL) {
2771 ac_build_waitcnt(ac, LGKM_CNT & VM_CNT);
2772 return;
2773 }
2774 ac_build_s_barrier(ac);
2775 }
2776
2777 static void emit_discard(struct ac_nir_context *ctx,
2778 const nir_intrinsic_instr *instr)
2779 {
2780 LLVMValueRef cond;
2781
2782 if (instr->intrinsic == nir_intrinsic_discard_if) {
2783 cond = LLVMBuildICmp(ctx->ac.builder, LLVMIntEQ,
2784 get_src(ctx, instr->src[0]),
2785 ctx->ac.i32_0, "");
2786 } else {
2787 assert(instr->intrinsic == nir_intrinsic_discard);
2788 cond = ctx->ac.i1false;
2789 }
2790
2791 ctx->abi->emit_kill(ctx->abi, cond);
2792 }
2793
2794 static LLVMValueRef
2795 visit_load_local_invocation_index(struct ac_nir_context *ctx)
2796 {
2797 LLVMValueRef result;
2798 LLVMValueRef thread_id = ac_get_thread_id(&ctx->ac);
2799 result = LLVMBuildAnd(ctx->ac.builder, ctx->abi->tg_size,
2800 LLVMConstInt(ctx->ac.i32, 0xfc0, false), "");
2801
2802 return LLVMBuildAdd(ctx->ac.builder, result, thread_id, "");
2803 }
2804
2805 static LLVMValueRef
2806 visit_load_subgroup_id(struct ac_nir_context *ctx)
2807 {
2808 if (ctx->stage == MESA_SHADER_COMPUTE) {
2809 LLVMValueRef result;
2810 result = LLVMBuildAnd(ctx->ac.builder, ctx->abi->tg_size,
2811 LLVMConstInt(ctx->ac.i32, 0xfc0, false), "");
2812 return LLVMBuildLShr(ctx->ac.builder, result, LLVMConstInt(ctx->ac.i32, 6, false), "");
2813 } else {
2814 return LLVMConstInt(ctx->ac.i32, 0, false);
2815 }
2816 }
2817
2818 static LLVMValueRef
2819 visit_load_num_subgroups(struct ac_nir_context *ctx)
2820 {
2821 if (ctx->stage == MESA_SHADER_COMPUTE) {
2822 return LLVMBuildAnd(ctx->ac.builder, ctx->abi->tg_size,
2823 LLVMConstInt(ctx->ac.i32, 0x3f, false), "");
2824 } else {
2825 return LLVMConstInt(ctx->ac.i32, 1, false);
2826 }
2827 }
2828
2829 static LLVMValueRef
2830 visit_first_invocation(struct ac_nir_context *ctx)
2831 {
2832 LLVMValueRef active_set = ac_build_ballot(&ctx->ac, ctx->ac.i32_1);
2833
2834 /* The second argument is whether cttz(0) should be defined, but we do not care. */
2835 LLVMValueRef args[] = {active_set, ctx->ac.i1false};
2836 LLVMValueRef result = ac_build_intrinsic(&ctx->ac,
2837 "llvm.cttz.i64",
2838 ctx->ac.i64, args, 2,
2839 AC_FUNC_ATTR_NOUNWIND |
2840 AC_FUNC_ATTR_READNONE);
2841
2842 return LLVMBuildTrunc(ctx->ac.builder, result, ctx->ac.i32, "");
2843 }
2844
2845 static LLVMValueRef
2846 visit_load_shared(struct ac_nir_context *ctx,
2847 const nir_intrinsic_instr *instr)
2848 {
2849 LLVMValueRef values[4], derived_ptr, index, ret;
2850
2851 LLVMValueRef ptr = get_memory_ptr(ctx, instr->src[0]);
2852
2853 for (int chan = 0; chan < instr->num_components; chan++) {
2854 index = LLVMConstInt(ctx->ac.i32, chan, 0);
2855 derived_ptr = LLVMBuildGEP(ctx->ac.builder, ptr, &index, 1, "");
2856 values[chan] = LLVMBuildLoad(ctx->ac.builder, derived_ptr, "");
2857 }
2858
2859 ret = ac_build_gather_values(&ctx->ac, values, instr->num_components);
2860 return LLVMBuildBitCast(ctx->ac.builder, ret, get_def_type(ctx, &instr->dest.ssa), "");
2861 }
2862
2863 static void
2864 visit_store_shared(struct ac_nir_context *ctx,
2865 const nir_intrinsic_instr *instr)
2866 {
2867 LLVMValueRef derived_ptr, data,index;
2868 LLVMBuilderRef builder = ctx->ac.builder;
2869
2870 LLVMValueRef ptr = get_memory_ptr(ctx, instr->src[1]);
2871 LLVMValueRef src = get_src(ctx, instr->src[0]);
2872
2873 int writemask = nir_intrinsic_write_mask(instr);
2874 for (int chan = 0; chan < 4; chan++) {
2875 if (!(writemask & (1 << chan))) {
2876 continue;
2877 }
2878 data = ac_llvm_extract_elem(&ctx->ac, src, chan);
2879 index = LLVMConstInt(ctx->ac.i32, chan, 0);
2880 derived_ptr = LLVMBuildGEP(builder, ptr, &index, 1, "");
2881 LLVMBuildStore(builder, data, derived_ptr);
2882 }
2883 }
2884
2885 static LLVMValueRef visit_var_atomic(struct ac_nir_context *ctx,
2886 const nir_intrinsic_instr *instr,
2887 LLVMValueRef ptr, int src_idx)
2888 {
2889 LLVMValueRef result;
2890 LLVMValueRef src = get_src(ctx, instr->src[src_idx]);
2891
2892 const char *sync_scope = HAVE_LLVM >= 0x0900 ? "workgroup-one-as" : "workgroup";
2893
2894 if (instr->intrinsic == nir_intrinsic_shared_atomic_comp_swap ||
2895 instr->intrinsic == nir_intrinsic_deref_atomic_comp_swap) {
2896 LLVMValueRef src1 = get_src(ctx, instr->src[src_idx + 1]);
2897 result = ac_build_atomic_cmp_xchg(&ctx->ac, ptr, src, src1, sync_scope);
2898 result = LLVMBuildExtractValue(ctx->ac.builder, result, 0, "");
2899 } else {
2900 LLVMAtomicRMWBinOp op;
2901 switch (instr->intrinsic) {
2902 case nir_intrinsic_shared_atomic_add:
2903 case nir_intrinsic_deref_atomic_add:
2904 op = LLVMAtomicRMWBinOpAdd;
2905 break;
2906 case nir_intrinsic_shared_atomic_umin:
2907 case nir_intrinsic_deref_atomic_umin:
2908 op = LLVMAtomicRMWBinOpUMin;
2909 break;
2910 case nir_intrinsic_shared_atomic_umax:
2911 case nir_intrinsic_deref_atomic_umax:
2912 op = LLVMAtomicRMWBinOpUMax;
2913 break;
2914 case nir_intrinsic_shared_atomic_imin:
2915 case nir_intrinsic_deref_atomic_imin:
2916 op = LLVMAtomicRMWBinOpMin;
2917 break;
2918 case nir_intrinsic_shared_atomic_imax:
2919 case nir_intrinsic_deref_atomic_imax:
2920 op = LLVMAtomicRMWBinOpMax;
2921 break;
2922 case nir_intrinsic_shared_atomic_and:
2923 case nir_intrinsic_deref_atomic_and:
2924 op = LLVMAtomicRMWBinOpAnd;
2925 break;
2926 case nir_intrinsic_shared_atomic_or:
2927 case nir_intrinsic_deref_atomic_or:
2928 op = LLVMAtomicRMWBinOpOr;
2929 break;
2930 case nir_intrinsic_shared_atomic_xor:
2931 case nir_intrinsic_deref_atomic_xor:
2932 op = LLVMAtomicRMWBinOpXor;
2933 break;
2934 case nir_intrinsic_shared_atomic_exchange:
2935 case nir_intrinsic_deref_atomic_exchange:
2936 op = LLVMAtomicRMWBinOpXchg;
2937 break;
2938 default:
2939 return NULL;
2940 }
2941
2942 result = ac_build_atomic_rmw(&ctx->ac, op, ptr, ac_to_integer(&ctx->ac, src), sync_scope);
2943 }
2944 return result;
2945 }
2946
2947 static LLVMValueRef load_sample_pos(struct ac_nir_context *ctx)
2948 {
2949 LLVMValueRef values[2];
2950 LLVMValueRef pos[2];
2951
2952 pos[0] = ac_to_float(&ctx->ac, ctx->abi->frag_pos[0]);
2953 pos[1] = ac_to_float(&ctx->ac, ctx->abi->frag_pos[1]);
2954
2955 values[0] = ac_build_fract(&ctx->ac, pos[0], 32);
2956 values[1] = ac_build_fract(&ctx->ac, pos[1], 32);
2957 return ac_build_gather_values(&ctx->ac, values, 2);
2958 }
2959
2960 static LLVMValueRef visit_interp(struct ac_nir_context *ctx,
2961 const nir_intrinsic_instr *instr)
2962 {
2963 LLVMValueRef result[4];
2964 LLVMValueRef interp_param;
2965 unsigned location;
2966 unsigned chan;
2967 LLVMValueRef src_c0 = NULL;
2968 LLVMValueRef src_c1 = NULL;
2969 LLVMValueRef src0 = NULL;
2970
2971 nir_deref_instr *deref_instr = nir_instr_as_deref(instr->src[0].ssa->parent_instr);
2972 nir_variable *var = nir_deref_instr_get_variable(deref_instr);
2973 int input_base = ctx->abi->fs_input_attr_indices[var->data.location - VARYING_SLOT_VAR0];
2974 switch (instr->intrinsic) {
2975 case nir_intrinsic_interp_deref_at_centroid:
2976 location = INTERP_CENTROID;
2977 break;
2978 case nir_intrinsic_interp_deref_at_sample:
2979 case nir_intrinsic_interp_deref_at_offset:
2980 location = INTERP_CENTER;
2981 src0 = get_src(ctx, instr->src[1]);
2982 break;
2983 default:
2984 break;
2985 }
2986
2987 if (instr->intrinsic == nir_intrinsic_interp_deref_at_offset) {
2988 src_c0 = ac_to_float(&ctx->ac, LLVMBuildExtractElement(ctx->ac.builder, src0, ctx->ac.i32_0, ""));
2989 src_c1 = ac_to_float(&ctx->ac, LLVMBuildExtractElement(ctx->ac.builder, src0, ctx->ac.i32_1, ""));
2990 } else if (instr->intrinsic == nir_intrinsic_interp_deref_at_sample) {
2991 LLVMValueRef sample_position;
2992 LLVMValueRef halfval = LLVMConstReal(ctx->ac.f32, 0.5f);
2993
2994 /* fetch sample ID */
2995 sample_position = ctx->abi->load_sample_position(ctx->abi, src0);
2996
2997 src_c0 = LLVMBuildExtractElement(ctx->ac.builder, sample_position, ctx->ac.i32_0, "");
2998 src_c0 = LLVMBuildFSub(ctx->ac.builder, src_c0, halfval, "");
2999 src_c1 = LLVMBuildExtractElement(ctx->ac.builder, sample_position, ctx->ac.i32_1, "");
3000 src_c1 = LLVMBuildFSub(ctx->ac.builder, src_c1, halfval, "");
3001 }
3002 interp_param = ctx->abi->lookup_interp_param(ctx->abi, var->data.interpolation, location);
3003
3004 if (location == INTERP_CENTER) {
3005 LLVMValueRef ij_out[2];
3006 LLVMValueRef ddxy_out = ac_build_ddxy_interp(&ctx->ac, interp_param);
3007
3008 /*
3009 * take the I then J parameters, and the DDX/Y for it, and
3010 * calculate the IJ inputs for the interpolator.
3011 * temp1 = ddx * offset/sample.x + I;
3012 * interp_param.I = ddy * offset/sample.y + temp1;
3013 * temp1 = ddx * offset/sample.x + J;
3014 * interp_param.J = ddy * offset/sample.y + temp1;
3015 */
3016 for (unsigned i = 0; i < 2; i++) {
3017 LLVMValueRef ix_ll = LLVMConstInt(ctx->ac.i32, i, false);
3018 LLVMValueRef iy_ll = LLVMConstInt(ctx->ac.i32, i + 2, false);
3019 LLVMValueRef ddx_el = LLVMBuildExtractElement(ctx->ac.builder,
3020 ddxy_out, ix_ll, "");
3021 LLVMValueRef ddy_el = LLVMBuildExtractElement(ctx->ac.builder,
3022 ddxy_out, iy_ll, "");
3023 LLVMValueRef interp_el = LLVMBuildExtractElement(ctx->ac.builder,
3024 interp_param, ix_ll, "");
3025 LLVMValueRef temp1, temp2;
3026
3027 interp_el = LLVMBuildBitCast(ctx->ac.builder, interp_el,
3028 ctx->ac.f32, "");
3029
3030 temp1 = ac_build_fmad(&ctx->ac, ddx_el, src_c0, interp_el);
3031 temp2 = ac_build_fmad(&ctx->ac, ddy_el, src_c1, temp1);
3032
3033 ij_out[i] = LLVMBuildBitCast(ctx->ac.builder,
3034 temp2, ctx->ac.i32, "");
3035 }
3036 interp_param = ac_build_gather_values(&ctx->ac, ij_out, 2);
3037
3038 }
3039
3040 LLVMValueRef attrib_idx = ctx->ac.i32_0;
3041 while(deref_instr->deref_type != nir_deref_type_var) {
3042 if (deref_instr->deref_type == nir_deref_type_array) {
3043 unsigned array_size = glsl_count_attribute_slots(deref_instr->type, false);
3044
3045 LLVMValueRef offset;
3046 if (nir_src_is_const(deref_instr->arr.index)) {
3047 offset = LLVMConstInt(ctx->ac.i32, array_size * nir_src_as_uint(deref_instr->arr.index), false);
3048 } else {
3049 LLVMValueRef indirect = get_src(ctx, deref_instr->arr.index);
3050
3051 offset = LLVMBuildMul(ctx->ac.builder, indirect,
3052 LLVMConstInt(ctx->ac.i32, array_size, false), "");
3053 }
3054
3055 attrib_idx = LLVMBuildAdd(ctx->ac.builder, attrib_idx, offset, "");
3056 deref_instr = nir_src_as_deref(deref_instr->parent);
3057 } else if (deref_instr->deref_type == nir_deref_type_struct) {
3058 LLVMValueRef offset;
3059 unsigned sidx = deref_instr->strct.index;
3060 deref_instr = nir_src_as_deref(deref_instr->parent);
3061 offset = LLVMConstInt(ctx->ac.i32, glsl_get_struct_location_offset(deref_instr->type, sidx), false);
3062 attrib_idx = LLVMBuildAdd(ctx->ac.builder, attrib_idx, offset, "");
3063 } else {
3064 unreachable("Unsupported deref type");
3065 }
3066
3067 }
3068
3069 unsigned attrib_size = glsl_count_attribute_slots(var->type, false);
3070 for (chan = 0; chan < 4; chan++) {
3071 LLVMValueRef gather = LLVMGetUndef(LLVMVectorType(ctx->ac.f32, attrib_size));
3072 LLVMValueRef llvm_chan = LLVMConstInt(ctx->ac.i32, chan, false);
3073
3074 for (unsigned idx = 0; idx < attrib_size; ++idx) {
3075 LLVMValueRef v, attr_number;
3076
3077 attr_number = LLVMConstInt(ctx->ac.i32, input_base + idx, false);
3078 if (interp_param) {
3079 interp_param = LLVMBuildBitCast(ctx->ac.builder,
3080 interp_param, ctx->ac.v2f32, "");
3081 LLVMValueRef i = LLVMBuildExtractElement(
3082 ctx->ac.builder, interp_param, ctx->ac.i32_0, "");
3083 LLVMValueRef j = LLVMBuildExtractElement(
3084 ctx->ac.builder, interp_param, ctx->ac.i32_1, "");
3085
3086 v = ac_build_fs_interp(&ctx->ac, llvm_chan, attr_number,
3087 ctx->abi->prim_mask, i, j);
3088 } else {
3089 v = ac_build_fs_interp_mov(&ctx->ac, LLVMConstInt(ctx->ac.i32, 2, false),
3090 llvm_chan, attr_number, ctx->abi->prim_mask);
3091 }
3092
3093 gather = LLVMBuildInsertElement(ctx->ac.builder, gather, v,
3094 LLVMConstInt(ctx->ac.i32, idx, false), "");
3095 }
3096
3097 result[chan] = LLVMBuildExtractElement(ctx->ac.builder, gather, attrib_idx, "");
3098
3099 }
3100 return ac_build_varying_gather_values(&ctx->ac, result, instr->num_components,
3101 var->data.location_frac);
3102 }
3103
3104 static void visit_intrinsic(struct ac_nir_context *ctx,
3105 nir_intrinsic_instr *instr)
3106 {
3107 LLVMValueRef result = NULL;
3108
3109 switch (instr->intrinsic) {
3110 case nir_intrinsic_ballot:
3111 result = ac_build_ballot(&ctx->ac, get_src(ctx, instr->src[0]));
3112 break;
3113 case nir_intrinsic_read_invocation:
3114 result = ac_build_readlane(&ctx->ac, get_src(ctx, instr->src[0]),
3115 get_src(ctx, instr->src[1]));
3116 break;
3117 case nir_intrinsic_read_first_invocation:
3118 result = ac_build_readlane(&ctx->ac, get_src(ctx, instr->src[0]), NULL);
3119 break;
3120 case nir_intrinsic_load_subgroup_invocation:
3121 result = ac_get_thread_id(&ctx->ac);
3122 break;
3123 case nir_intrinsic_load_work_group_id: {
3124 LLVMValueRef values[3];
3125
3126 for (int i = 0; i < 3; i++) {
3127 values[i] = ctx->abi->workgroup_ids[i] ?
3128 ctx->abi->workgroup_ids[i] : ctx->ac.i32_0;
3129 }
3130
3131 result = ac_build_gather_values(&ctx->ac, values, 3);
3132 break;
3133 }
3134 case nir_intrinsic_load_base_vertex:
3135 case nir_intrinsic_load_first_vertex:
3136 result = ctx->abi->load_base_vertex(ctx->abi);
3137 break;
3138 case nir_intrinsic_load_local_group_size:
3139 result = ctx->abi->load_local_group_size(ctx->abi);
3140 break;
3141 case nir_intrinsic_load_vertex_id:
3142 result = LLVMBuildAdd(ctx->ac.builder, ctx->abi->vertex_id,
3143 ctx->abi->base_vertex, "");
3144 break;
3145 case nir_intrinsic_load_vertex_id_zero_base: {
3146 result = ctx->abi->vertex_id;
3147 break;
3148 }
3149 case nir_intrinsic_load_local_invocation_id: {
3150 result = ctx->abi->local_invocation_ids;
3151 break;
3152 }
3153 case nir_intrinsic_load_base_instance:
3154 result = ctx->abi->start_instance;
3155 break;
3156 case nir_intrinsic_load_draw_id:
3157 result = ctx->abi->draw_id;
3158 break;
3159 case nir_intrinsic_load_view_index:
3160 result = ctx->abi->view_index;
3161 break;
3162 case nir_intrinsic_load_invocation_id:
3163 if (ctx->stage == MESA_SHADER_TESS_CTRL)
3164 result = ac_unpack_param(&ctx->ac, ctx->abi->tcs_rel_ids, 8, 5);
3165 else
3166 result = ctx->abi->gs_invocation_id;
3167 break;
3168 case nir_intrinsic_load_primitive_id:
3169 if (ctx->stage == MESA_SHADER_GEOMETRY) {
3170 result = ctx->abi->gs_prim_id;
3171 } else if (ctx->stage == MESA_SHADER_TESS_CTRL) {
3172 result = ctx->abi->tcs_patch_id;
3173 } else if (ctx->stage == MESA_SHADER_TESS_EVAL) {
3174 result = ctx->abi->tes_patch_id;
3175 } else
3176 fprintf(stderr, "Unknown primitive id intrinsic: %d", ctx->stage);
3177 break;
3178 case nir_intrinsic_load_sample_id:
3179 result = ac_unpack_param(&ctx->ac, ctx->abi->ancillary, 8, 4);
3180 break;
3181 case nir_intrinsic_load_sample_pos:
3182 result = load_sample_pos(ctx);
3183 break;
3184 case nir_intrinsic_load_sample_mask_in:
3185 result = ctx->abi->load_sample_mask_in(ctx->abi);
3186 break;
3187 case nir_intrinsic_load_frag_coord: {
3188 LLVMValueRef values[4] = {
3189 ctx->abi->frag_pos[0],
3190 ctx->abi->frag_pos[1],
3191 ctx->abi->frag_pos[2],
3192 ac_build_fdiv(&ctx->ac, ctx->ac.f32_1, ctx->abi->frag_pos[3])
3193 };
3194 result = ac_to_integer(&ctx->ac,
3195 ac_build_gather_values(&ctx->ac, values, 4));
3196 break;
3197 }
3198 case nir_intrinsic_load_front_face:
3199 result = ctx->abi->front_face;
3200 break;
3201 case nir_intrinsic_load_helper_invocation:
3202 result = ac_build_load_helper_invocation(&ctx->ac);
3203 break;
3204 case nir_intrinsic_load_instance_id:
3205 result = ctx->abi->instance_id;
3206 break;
3207 case nir_intrinsic_load_num_work_groups:
3208 result = ctx->abi->num_work_groups;
3209 break;
3210 case nir_intrinsic_load_local_invocation_index:
3211 result = visit_load_local_invocation_index(ctx);
3212 break;
3213 case nir_intrinsic_load_subgroup_id:
3214 result = visit_load_subgroup_id(ctx);
3215 break;
3216 case nir_intrinsic_load_num_subgroups:
3217 result = visit_load_num_subgroups(ctx);
3218 break;
3219 case nir_intrinsic_first_invocation:
3220 result = visit_first_invocation(ctx);
3221 break;
3222 case nir_intrinsic_load_push_constant:
3223 result = visit_load_push_constant(ctx, instr);
3224 break;
3225 case nir_intrinsic_vulkan_resource_index: {
3226 LLVMValueRef index = get_src(ctx, instr->src[0]);
3227 unsigned desc_set = nir_intrinsic_desc_set(instr);
3228 unsigned binding = nir_intrinsic_binding(instr);
3229
3230 result = ctx->abi->load_resource(ctx->abi, index, desc_set,
3231 binding);
3232 break;
3233 }
3234 case nir_intrinsic_vulkan_resource_reindex:
3235 result = visit_vulkan_resource_reindex(ctx, instr);
3236 break;
3237 case nir_intrinsic_store_ssbo:
3238 visit_store_ssbo(ctx, instr);
3239 break;
3240 case nir_intrinsic_load_ssbo:
3241 result = visit_load_buffer(ctx, instr);
3242 break;
3243 case nir_intrinsic_ssbo_atomic_add:
3244 case nir_intrinsic_ssbo_atomic_imin:
3245 case nir_intrinsic_ssbo_atomic_umin:
3246 case nir_intrinsic_ssbo_atomic_imax:
3247 case nir_intrinsic_ssbo_atomic_umax:
3248 case nir_intrinsic_ssbo_atomic_and:
3249 case nir_intrinsic_ssbo_atomic_or:
3250 case nir_intrinsic_ssbo_atomic_xor:
3251 case nir_intrinsic_ssbo_atomic_exchange:
3252 case nir_intrinsic_ssbo_atomic_comp_swap:
3253 result = visit_atomic_ssbo(ctx, instr);
3254 break;
3255 case nir_intrinsic_load_ubo:
3256 result = visit_load_ubo_buffer(ctx, instr);
3257 break;
3258 case nir_intrinsic_get_buffer_size:
3259 result = visit_get_buffer_size(ctx, instr);
3260 break;
3261 case nir_intrinsic_load_deref:
3262 result = visit_load_var(ctx, instr);
3263 break;
3264 case nir_intrinsic_store_deref:
3265 visit_store_var(ctx, instr);
3266 break;
3267 case nir_intrinsic_load_shared:
3268 result = visit_load_shared(ctx, instr);
3269 break;
3270 case nir_intrinsic_store_shared:
3271 visit_store_shared(ctx, instr);
3272 break;
3273 case nir_intrinsic_bindless_image_samples:
3274 result = visit_image_samples(ctx, instr, true);
3275 break;
3276 case nir_intrinsic_image_deref_samples:
3277 result = visit_image_samples(ctx, instr, false);
3278 break;
3279 case nir_intrinsic_bindless_image_load:
3280 result = visit_image_load(ctx, instr, true);
3281 break;
3282 case nir_intrinsic_image_deref_load:
3283 result = visit_image_load(ctx, instr, false);
3284 break;
3285 case nir_intrinsic_bindless_image_store:
3286 visit_image_store(ctx, instr, true);
3287 break;
3288 case nir_intrinsic_image_deref_store:
3289 visit_image_store(ctx, instr, false);
3290 break;
3291 case nir_intrinsic_bindless_image_atomic_add:
3292 case nir_intrinsic_bindless_image_atomic_min:
3293 case nir_intrinsic_bindless_image_atomic_max:
3294 case nir_intrinsic_bindless_image_atomic_and:
3295 case nir_intrinsic_bindless_image_atomic_or:
3296 case nir_intrinsic_bindless_image_atomic_xor:
3297 case nir_intrinsic_bindless_image_atomic_exchange:
3298 case nir_intrinsic_bindless_image_atomic_comp_swap:
3299 result = visit_image_atomic(ctx, instr, true);
3300 break;
3301 case nir_intrinsic_image_deref_atomic_add:
3302 case nir_intrinsic_image_deref_atomic_min:
3303 case nir_intrinsic_image_deref_atomic_max:
3304 case nir_intrinsic_image_deref_atomic_and:
3305 case nir_intrinsic_image_deref_atomic_or:
3306 case nir_intrinsic_image_deref_atomic_xor:
3307 case nir_intrinsic_image_deref_atomic_exchange:
3308 case nir_intrinsic_image_deref_atomic_comp_swap:
3309 result = visit_image_atomic(ctx, instr, false);
3310 break;
3311 case nir_intrinsic_bindless_image_size:
3312 result = visit_image_size(ctx, instr, true);
3313 break;
3314 case nir_intrinsic_image_deref_size:
3315 result = visit_image_size(ctx, instr, false);
3316 break;
3317 case nir_intrinsic_shader_clock:
3318 result = ac_build_shader_clock(&ctx->ac);
3319 break;
3320 case nir_intrinsic_discard:
3321 case nir_intrinsic_discard_if:
3322 emit_discard(ctx, instr);
3323 break;
3324 case nir_intrinsic_memory_barrier:
3325 case nir_intrinsic_group_memory_barrier:
3326 case nir_intrinsic_memory_barrier_atomic_counter:
3327 case nir_intrinsic_memory_barrier_buffer:
3328 case nir_intrinsic_memory_barrier_image:
3329 case nir_intrinsic_memory_barrier_shared:
3330 emit_membar(&ctx->ac, instr);
3331 break;
3332 case nir_intrinsic_barrier:
3333 ac_emit_barrier(&ctx->ac, ctx->stage);
3334 break;
3335 case nir_intrinsic_shared_atomic_add:
3336 case nir_intrinsic_shared_atomic_imin:
3337 case nir_intrinsic_shared_atomic_umin:
3338 case nir_intrinsic_shared_atomic_imax:
3339 case nir_intrinsic_shared_atomic_umax:
3340 case nir_intrinsic_shared_atomic_and:
3341 case nir_intrinsic_shared_atomic_or:
3342 case nir_intrinsic_shared_atomic_xor:
3343 case nir_intrinsic_shared_atomic_exchange:
3344 case nir_intrinsic_shared_atomic_comp_swap: {
3345 LLVMValueRef ptr = get_memory_ptr(ctx, instr->src[0]);
3346 result = visit_var_atomic(ctx, instr, ptr, 1);
3347 break;
3348 }
3349 case nir_intrinsic_deref_atomic_add:
3350 case nir_intrinsic_deref_atomic_imin:
3351 case nir_intrinsic_deref_atomic_umin:
3352 case nir_intrinsic_deref_atomic_imax:
3353 case nir_intrinsic_deref_atomic_umax:
3354 case nir_intrinsic_deref_atomic_and:
3355 case nir_intrinsic_deref_atomic_or:
3356 case nir_intrinsic_deref_atomic_xor:
3357 case nir_intrinsic_deref_atomic_exchange:
3358 case nir_intrinsic_deref_atomic_comp_swap: {
3359 LLVMValueRef ptr = get_src(ctx, instr->src[0]);
3360 result = visit_var_atomic(ctx, instr, ptr, 1);
3361 break;
3362 }
3363 case nir_intrinsic_interp_deref_at_centroid:
3364 case nir_intrinsic_interp_deref_at_sample:
3365 case nir_intrinsic_interp_deref_at_offset:
3366 result = visit_interp(ctx, instr);
3367 break;
3368 case nir_intrinsic_emit_vertex:
3369 ctx->abi->emit_vertex(ctx->abi, nir_intrinsic_stream_id(instr), ctx->abi->outputs);
3370 break;
3371 case nir_intrinsic_end_primitive:
3372 ctx->abi->emit_primitive(ctx->abi, nir_intrinsic_stream_id(instr));
3373 break;
3374 case nir_intrinsic_load_tess_coord:
3375 result = ctx->abi->load_tess_coord(ctx->abi);
3376 break;
3377 case nir_intrinsic_load_tess_level_outer:
3378 result = ctx->abi->load_tess_level(ctx->abi, VARYING_SLOT_TESS_LEVEL_OUTER);
3379 break;
3380 case nir_intrinsic_load_tess_level_inner:
3381 result = ctx->abi->load_tess_level(ctx->abi, VARYING_SLOT_TESS_LEVEL_INNER);
3382 break;
3383 case nir_intrinsic_load_patch_vertices_in:
3384 result = ctx->abi->load_patch_vertices_in(ctx->abi);
3385 break;
3386 case nir_intrinsic_vote_all: {
3387 LLVMValueRef tmp = ac_build_vote_all(&ctx->ac, get_src(ctx, instr->src[0]));
3388 result = LLVMBuildSExt(ctx->ac.builder, tmp, ctx->ac.i32, "");
3389 break;
3390 }
3391 case nir_intrinsic_vote_any: {
3392 LLVMValueRef tmp = ac_build_vote_any(&ctx->ac, get_src(ctx, instr->src[0]));
3393 result = LLVMBuildSExt(ctx->ac.builder, tmp, ctx->ac.i32, "");
3394 break;
3395 }
3396 case nir_intrinsic_shuffle:
3397 result = ac_build_shuffle(&ctx->ac, get_src(ctx, instr->src[0]),
3398 get_src(ctx, instr->src[1]));
3399 break;
3400 case nir_intrinsic_reduce:
3401 result = ac_build_reduce(&ctx->ac,
3402 get_src(ctx, instr->src[0]),
3403 instr->const_index[0],
3404 instr->const_index[1]);
3405 break;
3406 case nir_intrinsic_inclusive_scan:
3407 result = ac_build_inclusive_scan(&ctx->ac,
3408 get_src(ctx, instr->src[0]),
3409 instr->const_index[0]);
3410 break;
3411 case nir_intrinsic_exclusive_scan:
3412 result = ac_build_exclusive_scan(&ctx->ac,
3413 get_src(ctx, instr->src[0]),
3414 instr->const_index[0]);
3415 break;
3416 case nir_intrinsic_quad_broadcast: {
3417 unsigned lane = nir_src_as_uint(instr->src[1]);
3418 result = ac_build_quad_swizzle(&ctx->ac, get_src(ctx, instr->src[0]),
3419 lane, lane, lane, lane);
3420 break;
3421 }
3422 case nir_intrinsic_quad_swap_horizontal:
3423 result = ac_build_quad_swizzle(&ctx->ac, get_src(ctx, instr->src[0]), 1, 0, 3 ,2);
3424 break;
3425 case nir_intrinsic_quad_swap_vertical:
3426 result = ac_build_quad_swizzle(&ctx->ac, get_src(ctx, instr->src[0]), 2, 3, 0 ,1);
3427 break;
3428 case nir_intrinsic_quad_swap_diagonal:
3429 result = ac_build_quad_swizzle(&ctx->ac, get_src(ctx, instr->src[0]), 3, 2, 1 ,0);
3430 break;
3431 case nir_intrinsic_quad_swizzle_amd: {
3432 uint32_t mask = nir_intrinsic_swizzle_mask(instr);
3433 result = ac_build_quad_swizzle(&ctx->ac, get_src(ctx, instr->src[0]),
3434 mask & 0x3, (mask >> 2) & 0x3,
3435 (mask >> 4) & 0x3, (mask >> 6) & 0x3);
3436 break;
3437 }
3438 case nir_intrinsic_masked_swizzle_amd: {
3439 uint32_t mask = nir_intrinsic_swizzle_mask(instr);
3440 result = ac_build_ds_swizzle(&ctx->ac, get_src(ctx, instr->src[0]), mask);
3441 break;
3442 }
3443 case nir_intrinsic_write_invocation_amd:
3444 result = ac_build_writelane(&ctx->ac, get_src(ctx, instr->src[0]),
3445 get_src(ctx, instr->src[1]),
3446 get_src(ctx, instr->src[2]));
3447 break;
3448 case nir_intrinsic_mbcnt_amd:
3449 result = ac_build_mbcnt(&ctx->ac, get_src(ctx, instr->src[0]));
3450 break;
3451 default:
3452 fprintf(stderr, "Unknown intrinsic: ");
3453 nir_print_instr(&instr->instr, stderr);
3454 fprintf(stderr, "\n");
3455 break;
3456 }
3457 if (result) {
3458 ctx->ssa_defs[instr->dest.ssa.index] = result;
3459 }
3460 }
3461
3462 static LLVMValueRef get_bindless_index_from_uniform(struct ac_nir_context *ctx,
3463 unsigned base_index,
3464 unsigned constant_index,
3465 LLVMValueRef dynamic_index)
3466 {
3467 LLVMValueRef offset = LLVMConstInt(ctx->ac.i32, base_index * 4, 0);
3468 LLVMValueRef index = LLVMBuildAdd(ctx->ac.builder, dynamic_index,
3469 LLVMConstInt(ctx->ac.i32, constant_index, 0), "");
3470
3471 /* Bindless uniforms are 64bit so multiple index by 8 */
3472 index = LLVMBuildMul(ctx->ac.builder, index, LLVMConstInt(ctx->ac.i32, 8, 0), "");
3473 offset = LLVMBuildAdd(ctx->ac.builder, offset, index, "");
3474
3475 LLVMValueRef ubo_index = ctx->abi->load_ubo(ctx->abi, ctx->ac.i32_0);
3476
3477 LLVMValueRef ret = ac_build_buffer_load(&ctx->ac, ubo_index, 1, NULL, offset,
3478 NULL, 0, false, false, true, true);
3479
3480 return LLVMBuildBitCast(ctx->ac.builder, ret, ctx->ac.i32, "");
3481 }
3482
3483 static LLVMValueRef get_sampler_desc(struct ac_nir_context *ctx,
3484 nir_deref_instr *deref_instr,
3485 enum ac_descriptor_type desc_type,
3486 const nir_instr *instr,
3487 bool image, bool write)
3488 {
3489 LLVMValueRef index = NULL;
3490 unsigned constant_index = 0;
3491 unsigned descriptor_set;
3492 unsigned base_index;
3493 bool bindless = false;
3494
3495 if (!deref_instr) {
3496 descriptor_set = 0;
3497 if (image) {
3498 nir_intrinsic_instr *img_instr = nir_instr_as_intrinsic(instr);
3499 base_index = 0;
3500 bindless = true;
3501 index = get_src(ctx, img_instr->src[0]);
3502 } else {
3503 nir_tex_instr *tex_instr = nir_instr_as_tex(instr);
3504 int sampSrcIdx = nir_tex_instr_src_index(tex_instr,
3505 nir_tex_src_sampler_handle);
3506 if (sampSrcIdx != -1) {
3507 base_index = 0;
3508 bindless = true;
3509 index = get_src(ctx, tex_instr->src[sampSrcIdx].src);
3510 } else {
3511 assert(tex_instr && !image);
3512 base_index = tex_instr->sampler_index;
3513 }
3514 }
3515 } else {
3516 while(deref_instr->deref_type != nir_deref_type_var) {
3517 if (deref_instr->deref_type == nir_deref_type_array) {
3518 unsigned array_size = glsl_get_aoa_size(deref_instr->type);
3519 if (!array_size)
3520 array_size = 1;
3521
3522 if (nir_src_is_const(deref_instr->arr.index)) {
3523 constant_index += array_size * nir_src_as_uint(deref_instr->arr.index);
3524 } else {
3525 LLVMValueRef indirect = get_src(ctx, deref_instr->arr.index);
3526
3527 indirect = LLVMBuildMul(ctx->ac.builder, indirect,
3528 LLVMConstInt(ctx->ac.i32, array_size, false), "");
3529
3530 if (!index)
3531 index = indirect;
3532 else
3533 index = LLVMBuildAdd(ctx->ac.builder, index, indirect, "");
3534 }
3535
3536 deref_instr = nir_src_as_deref(deref_instr->parent);
3537 } else if (deref_instr->deref_type == nir_deref_type_struct) {
3538 unsigned sidx = deref_instr->strct.index;
3539 deref_instr = nir_src_as_deref(deref_instr->parent);
3540 constant_index += glsl_get_struct_location_offset(deref_instr->type, sidx);
3541 } else {
3542 unreachable("Unsupported deref type");
3543 }
3544 }
3545 descriptor_set = deref_instr->var->data.descriptor_set;
3546
3547 if (deref_instr->var->data.bindless) {
3548 /* For now just assert on unhandled variable types */
3549 assert(deref_instr->var->data.mode == nir_var_uniform);
3550
3551 base_index = deref_instr->var->data.driver_location;
3552 bindless = true;
3553
3554 index = index ? index : ctx->ac.i32_0;
3555 index = get_bindless_index_from_uniform(ctx, base_index,
3556 constant_index, index);
3557 } else
3558 base_index = deref_instr->var->data.binding;
3559 }
3560
3561 return ctx->abi->load_sampler_desc(ctx->abi,
3562 descriptor_set,
3563 base_index,
3564 constant_index, index,
3565 desc_type, image, write, bindless);
3566 }
3567
3568 /* Disable anisotropic filtering if BASE_LEVEL == LAST_LEVEL.
3569 *
3570 * GFX6-GFX7:
3571 * If BASE_LEVEL == LAST_LEVEL, the shader must disable anisotropic
3572 * filtering manually. The driver sets img7 to a mask clearing
3573 * MAX_ANISO_RATIO if BASE_LEVEL == LAST_LEVEL. The shader must do:
3574 * s_and_b32 samp0, samp0, img7
3575 *
3576 * GFX8:
3577 * The ANISO_OVERRIDE sampler field enables this fix in TA.
3578 */
3579 static LLVMValueRef sici_fix_sampler_aniso(struct ac_nir_context *ctx,
3580 LLVMValueRef res, LLVMValueRef samp)
3581 {
3582 LLVMBuilderRef builder = ctx->ac.builder;
3583 LLVMValueRef img7, samp0;
3584
3585 if (ctx->ac.chip_class >= GFX8)
3586 return samp;
3587
3588 img7 = LLVMBuildExtractElement(builder, res,
3589 LLVMConstInt(ctx->ac.i32, 7, 0), "");
3590 samp0 = LLVMBuildExtractElement(builder, samp,
3591 LLVMConstInt(ctx->ac.i32, 0, 0), "");
3592 samp0 = LLVMBuildAnd(builder, samp0, img7, "");
3593 return LLVMBuildInsertElement(builder, samp, samp0,
3594 LLVMConstInt(ctx->ac.i32, 0, 0), "");
3595 }
3596
3597 static void tex_fetch_ptrs(struct ac_nir_context *ctx,
3598 nir_tex_instr *instr,
3599 LLVMValueRef *res_ptr, LLVMValueRef *samp_ptr,
3600 LLVMValueRef *fmask_ptr)
3601 {
3602 nir_deref_instr *texture_deref_instr = NULL;
3603 nir_deref_instr *sampler_deref_instr = NULL;
3604 int plane = -1;
3605
3606 for (unsigned i = 0; i < instr->num_srcs; i++) {
3607 switch (instr->src[i].src_type) {
3608 case nir_tex_src_texture_deref:
3609 texture_deref_instr = nir_src_as_deref(instr->src[i].src);
3610 break;
3611 case nir_tex_src_sampler_deref:
3612 sampler_deref_instr = nir_src_as_deref(instr->src[i].src);
3613 break;
3614 case nir_tex_src_plane:
3615 plane = nir_src_as_int(instr->src[i].src);
3616 break;
3617 default:
3618 break;
3619 }
3620 }
3621
3622 if (!sampler_deref_instr)
3623 sampler_deref_instr = texture_deref_instr;
3624
3625 enum ac_descriptor_type main_descriptor = instr->sampler_dim == GLSL_SAMPLER_DIM_BUF ? AC_DESC_BUFFER : AC_DESC_IMAGE;
3626
3627 if (plane >= 0) {
3628 assert(instr->op != nir_texop_txf_ms &&
3629 instr->op != nir_texop_samples_identical);
3630 assert(instr->sampler_dim != GLSL_SAMPLER_DIM_BUF);
3631
3632 main_descriptor = AC_DESC_PLANE_0 + plane;
3633 }
3634
3635 *res_ptr = get_sampler_desc(ctx, texture_deref_instr, main_descriptor, &instr->instr, false, false);
3636
3637 if (samp_ptr) {
3638 *samp_ptr = get_sampler_desc(ctx, sampler_deref_instr, AC_DESC_SAMPLER, &instr->instr, false, false);
3639 if (instr->sampler_dim < GLSL_SAMPLER_DIM_RECT)
3640 *samp_ptr = sici_fix_sampler_aniso(ctx, *res_ptr, *samp_ptr);
3641 }
3642 if (fmask_ptr && (instr->op == nir_texop_txf_ms ||
3643 instr->op == nir_texop_samples_identical))
3644 *fmask_ptr = get_sampler_desc(ctx, texture_deref_instr, AC_DESC_FMASK, &instr->instr, false, false);
3645 }
3646
3647 static LLVMValueRef apply_round_slice(struct ac_llvm_context *ctx,
3648 LLVMValueRef coord)
3649 {
3650 coord = ac_to_float(ctx, coord);
3651 coord = ac_build_round(ctx, coord);
3652 coord = ac_to_integer(ctx, coord);
3653 return coord;
3654 }
3655
3656 static void visit_tex(struct ac_nir_context *ctx, nir_tex_instr *instr)
3657 {
3658 LLVMValueRef result = NULL;
3659 struct ac_image_args args = { 0 };
3660 LLVMValueRef fmask_ptr = NULL, sample_index = NULL;
3661 LLVMValueRef ddx = NULL, ddy = NULL;
3662 unsigned offset_src = 0;
3663
3664 tex_fetch_ptrs(ctx, instr, &args.resource, &args.sampler, &fmask_ptr);
3665
3666 for (unsigned i = 0; i < instr->num_srcs; i++) {
3667 switch (instr->src[i].src_type) {
3668 case nir_tex_src_coord: {
3669 LLVMValueRef coord = get_src(ctx, instr->src[i].src);
3670 for (unsigned chan = 0; chan < instr->coord_components; ++chan)
3671 args.coords[chan] = ac_llvm_extract_elem(&ctx->ac, coord, chan);
3672 break;
3673 }
3674 case nir_tex_src_projector:
3675 break;
3676 case nir_tex_src_comparator:
3677 if (instr->is_shadow)
3678 args.compare = get_src(ctx, instr->src[i].src);
3679 break;
3680 case nir_tex_src_offset:
3681 args.offset = get_src(ctx, instr->src[i].src);
3682 offset_src = i;
3683 break;
3684 case nir_tex_src_bias:
3685 if (instr->op == nir_texop_txb)
3686 args.bias = get_src(ctx, instr->src[i].src);
3687 break;
3688 case nir_tex_src_lod: {
3689 if (nir_src_is_const(instr->src[i].src) && nir_src_as_uint(instr->src[i].src) == 0)
3690 args.level_zero = true;
3691 else
3692 args.lod = get_src(ctx, instr->src[i].src);
3693 break;
3694 }
3695 case nir_tex_src_ms_index:
3696 sample_index = get_src(ctx, instr->src[i].src);
3697 break;
3698 case nir_tex_src_ms_mcs:
3699 break;
3700 case nir_tex_src_ddx:
3701 ddx = get_src(ctx, instr->src[i].src);
3702 break;
3703 case nir_tex_src_ddy:
3704 ddy = get_src(ctx, instr->src[i].src);
3705 break;
3706 case nir_tex_src_texture_offset:
3707 case nir_tex_src_sampler_offset:
3708 case nir_tex_src_plane:
3709 default:
3710 break;
3711 }
3712 }
3713
3714 if (instr->op == nir_texop_txs && instr->sampler_dim == GLSL_SAMPLER_DIM_BUF) {
3715 result = get_buffer_size(ctx, args.resource, true);
3716 goto write_result;
3717 }
3718
3719 if (instr->op == nir_texop_texture_samples) {
3720 LLVMValueRef res, samples, is_msaa;
3721 res = LLVMBuildBitCast(ctx->ac.builder, args.resource, ctx->ac.v8i32, "");
3722 samples = LLVMBuildExtractElement(ctx->ac.builder, res,
3723 LLVMConstInt(ctx->ac.i32, 3, false), "");
3724 is_msaa = LLVMBuildLShr(ctx->ac.builder, samples,
3725 LLVMConstInt(ctx->ac.i32, 28, false), "");
3726 is_msaa = LLVMBuildAnd(ctx->ac.builder, is_msaa,
3727 LLVMConstInt(ctx->ac.i32, 0xe, false), "");
3728 is_msaa = LLVMBuildICmp(ctx->ac.builder, LLVMIntEQ, is_msaa,
3729 LLVMConstInt(ctx->ac.i32, 0xe, false), "");
3730
3731 samples = LLVMBuildLShr(ctx->ac.builder, samples,
3732 LLVMConstInt(ctx->ac.i32, 16, false), "");
3733 samples = LLVMBuildAnd(ctx->ac.builder, samples,
3734 LLVMConstInt(ctx->ac.i32, 0xf, false), "");
3735 samples = LLVMBuildShl(ctx->ac.builder, ctx->ac.i32_1,
3736 samples, "");
3737 samples = LLVMBuildSelect(ctx->ac.builder, is_msaa, samples,
3738 ctx->ac.i32_1, "");
3739 result = samples;
3740 goto write_result;
3741 }
3742
3743 if (args.offset && instr->op != nir_texop_txf) {
3744 LLVMValueRef offset[3], pack;
3745 for (unsigned chan = 0; chan < 3; ++chan)
3746 offset[chan] = ctx->ac.i32_0;
3747
3748 unsigned num_components = ac_get_llvm_num_components(args.offset);
3749 for (unsigned chan = 0; chan < num_components; chan++) {
3750 offset[chan] = ac_llvm_extract_elem(&ctx->ac, args.offset, chan);
3751 offset[chan] = LLVMBuildAnd(ctx->ac.builder, offset[chan],
3752 LLVMConstInt(ctx->ac.i32, 0x3f, false), "");
3753 if (chan)
3754 offset[chan] = LLVMBuildShl(ctx->ac.builder, offset[chan],
3755 LLVMConstInt(ctx->ac.i32, chan * 8, false), "");
3756 }
3757 pack = LLVMBuildOr(ctx->ac.builder, offset[0], offset[1], "");
3758 pack = LLVMBuildOr(ctx->ac.builder, pack, offset[2], "");
3759 args.offset = pack;
3760 }
3761
3762 /* TC-compatible HTILE on radeonsi promotes Z16 and Z24 to Z32_FLOAT,
3763 * so the depth comparison value isn't clamped for Z16 and
3764 * Z24 anymore. Do it manually here.
3765 *
3766 * It's unnecessary if the original texture format was
3767 * Z32_FLOAT, but we don't know that here.
3768 */
3769 if (args.compare && ctx->ac.chip_class >= GFX8 && ctx->abi->clamp_shadow_reference)
3770 args.compare = ac_build_clamp(&ctx->ac, ac_to_float(&ctx->ac, args.compare));
3771
3772 /* pack derivatives */
3773 if (ddx || ddy) {
3774 int num_src_deriv_channels, num_dest_deriv_channels;
3775 switch (instr->sampler_dim) {
3776 case GLSL_SAMPLER_DIM_3D:
3777 case GLSL_SAMPLER_DIM_CUBE:
3778 num_src_deriv_channels = 3;
3779 num_dest_deriv_channels = 3;
3780 break;
3781 case GLSL_SAMPLER_DIM_2D:
3782 default:
3783 num_src_deriv_channels = 2;
3784 num_dest_deriv_channels = 2;
3785 break;
3786 case GLSL_SAMPLER_DIM_1D:
3787 num_src_deriv_channels = 1;
3788 if (ctx->ac.chip_class >= GFX9) {
3789 num_dest_deriv_channels = 2;
3790 } else {
3791 num_dest_deriv_channels = 1;
3792 }
3793 break;
3794 }
3795
3796 for (unsigned i = 0; i < num_src_deriv_channels; i++) {
3797 args.derivs[i] = ac_to_float(&ctx->ac,
3798 ac_llvm_extract_elem(&ctx->ac, ddx, i));
3799 args.derivs[num_dest_deriv_channels + i] = ac_to_float(&ctx->ac,
3800 ac_llvm_extract_elem(&ctx->ac, ddy, i));
3801 }
3802 for (unsigned i = num_src_deriv_channels; i < num_dest_deriv_channels; i++) {
3803 args.derivs[i] = ctx->ac.f32_0;
3804 args.derivs[num_dest_deriv_channels + i] = ctx->ac.f32_0;
3805 }
3806 }
3807
3808 if (instr->sampler_dim == GLSL_SAMPLER_DIM_CUBE && args.coords[0]) {
3809 for (unsigned chan = 0; chan < instr->coord_components; chan++)
3810 args.coords[chan] = ac_to_float(&ctx->ac, args.coords[chan]);
3811 if (instr->coord_components == 3)
3812 args.coords[3] = LLVMGetUndef(ctx->ac.f32);
3813 ac_prepare_cube_coords(&ctx->ac,
3814 instr->op == nir_texop_txd, instr->is_array,
3815 instr->op == nir_texop_lod, args.coords, args.derivs);
3816 }
3817
3818 /* Texture coordinates fixups */
3819 if (instr->coord_components > 1 &&
3820 instr->sampler_dim == GLSL_SAMPLER_DIM_1D &&
3821 instr->is_array &&
3822 instr->op != nir_texop_txf) {
3823 args.coords[1] = apply_round_slice(&ctx->ac, args.coords[1]);
3824 }
3825
3826 if (instr->coord_components > 2 &&
3827 (instr->sampler_dim == GLSL_SAMPLER_DIM_2D ||
3828 instr->sampler_dim == GLSL_SAMPLER_DIM_MS ||
3829 instr->sampler_dim == GLSL_SAMPLER_DIM_SUBPASS ||
3830 instr->sampler_dim == GLSL_SAMPLER_DIM_SUBPASS_MS) &&
3831 instr->is_array &&
3832 instr->op != nir_texop_txf && instr->op != nir_texop_txf_ms) {
3833 args.coords[2] = apply_round_slice(&ctx->ac, args.coords[2]);
3834 }
3835
3836 if (ctx->ac.chip_class >= GFX9 &&
3837 instr->sampler_dim == GLSL_SAMPLER_DIM_1D &&
3838 instr->op != nir_texop_lod) {
3839 LLVMValueRef filler;
3840 if (instr->op == nir_texop_txf)
3841 filler = ctx->ac.i32_0;
3842 else
3843 filler = LLVMConstReal(ctx->ac.f32, 0.5);
3844
3845 if (instr->is_array)
3846 args.coords[2] = args.coords[1];
3847 args.coords[1] = filler;
3848 }
3849
3850 /* Pack sample index */
3851 if (instr->op == nir_texop_txf_ms && sample_index)
3852 args.coords[instr->coord_components] = sample_index;
3853
3854 if (instr->op == nir_texop_samples_identical) {
3855 struct ac_image_args txf_args = { 0 };
3856 memcpy(txf_args.coords, args.coords, sizeof(txf_args.coords));
3857
3858 txf_args.dmask = 0xf;
3859 txf_args.resource = fmask_ptr;
3860 txf_args.dim = instr->is_array ? ac_image_2darray : ac_image_2d;
3861 result = build_tex_intrinsic(ctx, instr, &txf_args);
3862
3863 result = LLVMBuildExtractElement(ctx->ac.builder, result, ctx->ac.i32_0, "");
3864 result = emit_int_cmp(&ctx->ac, LLVMIntEQ, result, ctx->ac.i32_0);
3865 goto write_result;
3866 }
3867
3868 if (instr->sampler_dim == GLSL_SAMPLER_DIM_MS &&
3869 instr->op != nir_texop_txs) {
3870 unsigned sample_chan = instr->is_array ? 3 : 2;
3871 args.coords[sample_chan] = adjust_sample_index_using_fmask(
3872 &ctx->ac, args.coords[0], args.coords[1],
3873 instr->is_array ? args.coords[2] : NULL,
3874 args.coords[sample_chan], fmask_ptr);
3875 }
3876
3877 if (args.offset && instr->op == nir_texop_txf) {
3878 int num_offsets = instr->src[offset_src].src.ssa->num_components;
3879 num_offsets = MIN2(num_offsets, instr->coord_components);
3880 for (unsigned i = 0; i < num_offsets; ++i) {
3881 args.coords[i] = LLVMBuildAdd(
3882 ctx->ac.builder, args.coords[i],
3883 LLVMConstInt(ctx->ac.i32, nir_src_comp_as_uint(instr->src[offset_src].src, i), false), "");
3884 }
3885 args.offset = NULL;
3886 }
3887
3888 /* DMASK was repurposed for GATHER4. 4 components are always
3889 * returned and DMASK works like a swizzle - it selects
3890 * the component to fetch. The only valid DMASK values are
3891 * 1=red, 2=green, 4=blue, 8=alpha. (e.g. 1 returns
3892 * (red,red,red,red) etc.) The ISA document doesn't mention
3893 * this.
3894 */
3895 args.dmask = 0xf;
3896 if (instr->op == nir_texop_tg4) {
3897 if (instr->is_shadow)
3898 args.dmask = 1;
3899 else
3900 args.dmask = 1 << instr->component;
3901 }
3902
3903 if (instr->sampler_dim != GLSL_SAMPLER_DIM_BUF)
3904 args.dim = get_ac_sampler_dim(&ctx->ac, instr->sampler_dim, instr->is_array);
3905 result = build_tex_intrinsic(ctx, instr, &args);
3906
3907 if (instr->op == nir_texop_query_levels)
3908 result = LLVMBuildExtractElement(ctx->ac.builder, result, LLVMConstInt(ctx->ac.i32, 3, false), "");
3909 else if (instr->is_shadow && instr->is_new_style_shadow &&
3910 instr->op != nir_texop_txs && instr->op != nir_texop_lod &&
3911 instr->op != nir_texop_tg4)
3912 result = LLVMBuildExtractElement(ctx->ac.builder, result, ctx->ac.i32_0, "");
3913 else if (instr->op == nir_texop_txs &&
3914 instr->sampler_dim == GLSL_SAMPLER_DIM_CUBE &&
3915 instr->is_array) {
3916 LLVMValueRef two = LLVMConstInt(ctx->ac.i32, 2, false);
3917 LLVMValueRef six = LLVMConstInt(ctx->ac.i32, 6, false);
3918 LLVMValueRef z = LLVMBuildExtractElement(ctx->ac.builder, result, two, "");
3919 z = LLVMBuildSDiv(ctx->ac.builder, z, six, "");
3920 result = LLVMBuildInsertElement(ctx->ac.builder, result, z, two, "");
3921 } else if (ctx->ac.chip_class >= GFX9 &&
3922 instr->op == nir_texop_txs &&
3923 instr->sampler_dim == GLSL_SAMPLER_DIM_1D &&
3924 instr->is_array) {
3925 LLVMValueRef two = LLVMConstInt(ctx->ac.i32, 2, false);
3926 LLVMValueRef layers = LLVMBuildExtractElement(ctx->ac.builder, result, two, "");
3927 result = LLVMBuildInsertElement(ctx->ac.builder, result, layers,
3928 ctx->ac.i32_1, "");
3929 } else if (instr->dest.ssa.num_components != 4)
3930 result = ac_trim_vector(&ctx->ac, result, instr->dest.ssa.num_components);
3931
3932 write_result:
3933 if (result) {
3934 assert(instr->dest.is_ssa);
3935 result = ac_to_integer(&ctx->ac, result);
3936 ctx->ssa_defs[instr->dest.ssa.index] = result;
3937 }
3938 }
3939
3940
3941 static void visit_phi(struct ac_nir_context *ctx, nir_phi_instr *instr)
3942 {
3943 LLVMTypeRef type = get_def_type(ctx, &instr->dest.ssa);
3944 LLVMValueRef result = LLVMBuildPhi(ctx->ac.builder, type, "");
3945
3946 ctx->ssa_defs[instr->dest.ssa.index] = result;
3947 _mesa_hash_table_insert(ctx->phis, instr, result);
3948 }
3949
3950 static void visit_post_phi(struct ac_nir_context *ctx,
3951 nir_phi_instr *instr,
3952 LLVMValueRef llvm_phi)
3953 {
3954 nir_foreach_phi_src(src, instr) {
3955 LLVMBasicBlockRef block = get_block(ctx, src->pred);
3956 LLVMValueRef llvm_src = get_src(ctx, src->src);
3957
3958 LLVMAddIncoming(llvm_phi, &llvm_src, &block, 1);
3959 }
3960 }
3961
3962 static void phi_post_pass(struct ac_nir_context *ctx)
3963 {
3964 hash_table_foreach(ctx->phis, entry) {
3965 visit_post_phi(ctx, (nir_phi_instr*)entry->key,
3966 (LLVMValueRef)entry->data);
3967 }
3968 }
3969
3970
3971 static void visit_ssa_undef(struct ac_nir_context *ctx,
3972 const nir_ssa_undef_instr *instr)
3973 {
3974 unsigned num_components = instr->def.num_components;
3975 LLVMTypeRef type = LLVMIntTypeInContext(ctx->ac.context, instr->def.bit_size);
3976 LLVMValueRef undef;
3977
3978 if (num_components == 1)
3979 undef = LLVMGetUndef(type);
3980 else {
3981 undef = LLVMGetUndef(LLVMVectorType(type, num_components));
3982 }
3983 ctx->ssa_defs[instr->def.index] = undef;
3984 }
3985
3986 static void visit_jump(struct ac_llvm_context *ctx,
3987 const nir_jump_instr *instr)
3988 {
3989 switch (instr->type) {
3990 case nir_jump_break:
3991 ac_build_break(ctx);
3992 break;
3993 case nir_jump_continue:
3994 ac_build_continue(ctx);
3995 break;
3996 default:
3997 fprintf(stderr, "Unknown NIR jump instr: ");
3998 nir_print_instr(&instr->instr, stderr);
3999 fprintf(stderr, "\n");
4000 abort();
4001 }
4002 }
4003
4004 static LLVMTypeRef
4005 glsl_base_to_llvm_type(struct ac_llvm_context *ac,
4006 enum glsl_base_type type)
4007 {
4008 switch (type) {
4009 case GLSL_TYPE_INT:
4010 case GLSL_TYPE_UINT:
4011 case GLSL_TYPE_BOOL:
4012 case GLSL_TYPE_SUBROUTINE:
4013 return ac->i32;
4014 case GLSL_TYPE_INT8:
4015 case GLSL_TYPE_UINT8:
4016 return ac->i8;
4017 case GLSL_TYPE_INT16:
4018 case GLSL_TYPE_UINT16:
4019 return ac->i16;
4020 case GLSL_TYPE_FLOAT:
4021 return ac->f32;
4022 case GLSL_TYPE_FLOAT16:
4023 return ac->f16;
4024 case GLSL_TYPE_INT64:
4025 case GLSL_TYPE_UINT64:
4026 return ac->i64;
4027 case GLSL_TYPE_DOUBLE:
4028 return ac->f64;
4029 default:
4030 unreachable("unknown GLSL type");
4031 }
4032 }
4033
4034 static LLVMTypeRef
4035 glsl_to_llvm_type(struct ac_llvm_context *ac,
4036 const struct glsl_type *type)
4037 {
4038 if (glsl_type_is_scalar(type)) {
4039 return glsl_base_to_llvm_type(ac, glsl_get_base_type(type));
4040 }
4041
4042 if (glsl_type_is_vector(type)) {
4043 return LLVMVectorType(
4044 glsl_base_to_llvm_type(ac, glsl_get_base_type(type)),
4045 glsl_get_vector_elements(type));
4046 }
4047
4048 if (glsl_type_is_matrix(type)) {
4049 return LLVMArrayType(
4050 glsl_to_llvm_type(ac, glsl_get_column_type(type)),
4051 glsl_get_matrix_columns(type));
4052 }
4053
4054 if (glsl_type_is_array(type)) {
4055 return LLVMArrayType(
4056 glsl_to_llvm_type(ac, glsl_get_array_element(type)),
4057 glsl_get_length(type));
4058 }
4059
4060 assert(glsl_type_is_struct_or_ifc(type));
4061
4062 LLVMTypeRef member_types[glsl_get_length(type)];
4063
4064 for (unsigned i = 0; i < glsl_get_length(type); i++) {
4065 member_types[i] =
4066 glsl_to_llvm_type(ac,
4067 glsl_get_struct_field(type, i));
4068 }
4069
4070 return LLVMStructTypeInContext(ac->context, member_types,
4071 glsl_get_length(type), false);
4072 }
4073
4074 static void visit_deref(struct ac_nir_context *ctx,
4075 nir_deref_instr *instr)
4076 {
4077 if (instr->mode != nir_var_mem_shared &&
4078 instr->mode != nir_var_mem_global)
4079 return;
4080
4081 LLVMValueRef result = NULL;
4082 switch(instr->deref_type) {
4083 case nir_deref_type_var: {
4084 struct hash_entry *entry = _mesa_hash_table_search(ctx->vars, instr->var);
4085 result = entry->data;
4086 break;
4087 }
4088 case nir_deref_type_struct:
4089 if (instr->mode == nir_var_mem_global) {
4090 nir_deref_instr *parent = nir_deref_instr_parent(instr);
4091 uint64_t offset = glsl_get_struct_field_offset(parent->type,
4092 instr->strct.index);
4093 result = ac_build_gep_ptr(&ctx->ac, get_src(ctx, instr->parent),
4094 LLVMConstInt(ctx->ac.i32, offset, 0));
4095 } else {
4096 result = ac_build_gep0(&ctx->ac, get_src(ctx, instr->parent),
4097 LLVMConstInt(ctx->ac.i32, instr->strct.index, 0));
4098 }
4099 break;
4100 case nir_deref_type_array:
4101 if (instr->mode == nir_var_mem_global) {
4102 nir_deref_instr *parent = nir_deref_instr_parent(instr);
4103 unsigned stride = glsl_get_explicit_stride(parent->type);
4104
4105 if ((glsl_type_is_matrix(parent->type) &&
4106 glsl_matrix_type_is_row_major(parent->type)) ||
4107 (glsl_type_is_vector(parent->type) && stride == 0))
4108 stride = type_scalar_size_bytes(parent->type);
4109
4110 assert(stride > 0);
4111 LLVMValueRef index = get_src(ctx, instr->arr.index);
4112 if (LLVMTypeOf(index) != ctx->ac.i64)
4113 index = LLVMBuildZExt(ctx->ac.builder, index, ctx->ac.i64, "");
4114
4115 LLVMValueRef offset = LLVMBuildMul(ctx->ac.builder, index, LLVMConstInt(ctx->ac.i64, stride, 0), "");
4116
4117 result = ac_build_gep_ptr(&ctx->ac, get_src(ctx, instr->parent), offset);
4118 } else {
4119 result = ac_build_gep0(&ctx->ac, get_src(ctx, instr->parent),
4120 get_src(ctx, instr->arr.index));
4121 }
4122 break;
4123 case nir_deref_type_ptr_as_array:
4124 if (instr->mode == nir_var_mem_global) {
4125 unsigned stride = nir_deref_instr_ptr_as_array_stride(instr);
4126
4127 LLVMValueRef index = get_src(ctx, instr->arr.index);
4128 if (LLVMTypeOf(index) != ctx->ac.i64)
4129 index = LLVMBuildZExt(ctx->ac.builder, index, ctx->ac.i64, "");
4130
4131 LLVMValueRef offset = LLVMBuildMul(ctx->ac.builder, index, LLVMConstInt(ctx->ac.i64, stride, 0), "");
4132
4133 result = ac_build_gep_ptr(&ctx->ac, get_src(ctx, instr->parent), offset);
4134 } else {
4135 result = ac_build_gep_ptr(&ctx->ac, get_src(ctx, instr->parent),
4136 get_src(ctx, instr->arr.index));
4137 }
4138 break;
4139 case nir_deref_type_cast: {
4140 result = get_src(ctx, instr->parent);
4141
4142 /* We can't use the structs from LLVM because the shader
4143 * specifies its own offsets. */
4144 LLVMTypeRef pointee_type = ctx->ac.i8;
4145 if (instr->mode == nir_var_mem_shared)
4146 pointee_type = glsl_to_llvm_type(&ctx->ac, instr->type);
4147
4148 unsigned address_space;
4149
4150 switch(instr->mode) {
4151 case nir_var_mem_shared:
4152 address_space = AC_ADDR_SPACE_LDS;
4153 break;
4154 case nir_var_mem_global:
4155 address_space = AC_ADDR_SPACE_GLOBAL;
4156 break;
4157 default:
4158 unreachable("Unhandled address space");
4159 }
4160
4161 LLVMTypeRef type = LLVMPointerType(pointee_type, address_space);
4162
4163 if (LLVMTypeOf(result) != type) {
4164 if (LLVMGetTypeKind(LLVMTypeOf(result)) == LLVMVectorTypeKind) {
4165 result = LLVMBuildBitCast(ctx->ac.builder, result,
4166 type, "");
4167 } else {
4168 result = LLVMBuildIntToPtr(ctx->ac.builder, result,
4169 type, "");
4170 }
4171 }
4172 break;
4173 }
4174 default:
4175 unreachable("Unhandled deref_instr deref type");
4176 }
4177
4178 ctx->ssa_defs[instr->dest.ssa.index] = result;
4179 }
4180
4181 static void visit_cf_list(struct ac_nir_context *ctx,
4182 struct exec_list *list);
4183
4184 static void visit_block(struct ac_nir_context *ctx, nir_block *block)
4185 {
4186 LLVMBasicBlockRef llvm_block = LLVMGetInsertBlock(ctx->ac.builder);
4187 nir_foreach_instr(instr, block)
4188 {
4189 switch (instr->type) {
4190 case nir_instr_type_alu:
4191 visit_alu(ctx, nir_instr_as_alu(instr));
4192 break;
4193 case nir_instr_type_load_const:
4194 visit_load_const(ctx, nir_instr_as_load_const(instr));
4195 break;
4196 case nir_instr_type_intrinsic:
4197 visit_intrinsic(ctx, nir_instr_as_intrinsic(instr));
4198 break;
4199 case nir_instr_type_tex:
4200 visit_tex(ctx, nir_instr_as_tex(instr));
4201 break;
4202 case nir_instr_type_phi:
4203 visit_phi(ctx, nir_instr_as_phi(instr));
4204 break;
4205 case nir_instr_type_ssa_undef:
4206 visit_ssa_undef(ctx, nir_instr_as_ssa_undef(instr));
4207 break;
4208 case nir_instr_type_jump:
4209 visit_jump(&ctx->ac, nir_instr_as_jump(instr));
4210 break;
4211 case nir_instr_type_deref:
4212 visit_deref(ctx, nir_instr_as_deref(instr));
4213 break;
4214 default:
4215 fprintf(stderr, "Unknown NIR instr type: ");
4216 nir_print_instr(instr, stderr);
4217 fprintf(stderr, "\n");
4218 abort();
4219 }
4220 }
4221
4222 _mesa_hash_table_insert(ctx->defs, block, llvm_block);
4223 }
4224
4225 static void visit_if(struct ac_nir_context *ctx, nir_if *if_stmt)
4226 {
4227 LLVMValueRef value = get_src(ctx, if_stmt->condition);
4228
4229 nir_block *then_block =
4230 (nir_block *) exec_list_get_head(&if_stmt->then_list);
4231
4232 ac_build_uif(&ctx->ac, value, then_block->index);
4233
4234 visit_cf_list(ctx, &if_stmt->then_list);
4235
4236 if (!exec_list_is_empty(&if_stmt->else_list)) {
4237 nir_block *else_block =
4238 (nir_block *) exec_list_get_head(&if_stmt->else_list);
4239
4240 ac_build_else(&ctx->ac, else_block->index);
4241 visit_cf_list(ctx, &if_stmt->else_list);
4242 }
4243
4244 ac_build_endif(&ctx->ac, then_block->index);
4245 }
4246
4247 static void visit_loop(struct ac_nir_context *ctx, nir_loop *loop)
4248 {
4249 nir_block *first_loop_block =
4250 (nir_block *) exec_list_get_head(&loop->body);
4251
4252 ac_build_bgnloop(&ctx->ac, first_loop_block->index);
4253
4254 visit_cf_list(ctx, &loop->body);
4255
4256 ac_build_endloop(&ctx->ac, first_loop_block->index);
4257 }
4258
4259 static void visit_cf_list(struct ac_nir_context *ctx,
4260 struct exec_list *list)
4261 {
4262 foreach_list_typed(nir_cf_node, node, node, list)
4263 {
4264 switch (node->type) {
4265 case nir_cf_node_block:
4266 visit_block(ctx, nir_cf_node_as_block(node));
4267 break;
4268
4269 case nir_cf_node_if:
4270 visit_if(ctx, nir_cf_node_as_if(node));
4271 break;
4272
4273 case nir_cf_node_loop:
4274 visit_loop(ctx, nir_cf_node_as_loop(node));
4275 break;
4276
4277 default:
4278 assert(0);
4279 }
4280 }
4281 }
4282
4283 void
4284 ac_handle_shader_output_decl(struct ac_llvm_context *ctx,
4285 struct ac_shader_abi *abi,
4286 struct nir_shader *nir,
4287 struct nir_variable *variable,
4288 gl_shader_stage stage)
4289 {
4290 unsigned output_loc = variable->data.driver_location / 4;
4291 unsigned attrib_count = glsl_count_attribute_slots(variable->type, false);
4292
4293 /* tess ctrl has it's own load/store paths for outputs */
4294 if (stage == MESA_SHADER_TESS_CTRL)
4295 return;
4296
4297 if (stage == MESA_SHADER_VERTEX ||
4298 stage == MESA_SHADER_TESS_EVAL ||
4299 stage == MESA_SHADER_GEOMETRY) {
4300 int idx = variable->data.location + variable->data.index;
4301 if (idx == VARYING_SLOT_CLIP_DIST0) {
4302 int length = nir->info.clip_distance_array_size +
4303 nir->info.cull_distance_array_size;
4304
4305 if (length > 4)
4306 attrib_count = 2;
4307 else
4308 attrib_count = 1;
4309 }
4310 }
4311
4312 bool is_16bit = glsl_type_is_16bit(glsl_without_array(variable->type));
4313 LLVMTypeRef type = is_16bit ? ctx->f16 : ctx->f32;
4314 for (unsigned i = 0; i < attrib_count; ++i) {
4315 for (unsigned chan = 0; chan < 4; chan++) {
4316 abi->outputs[ac_llvm_reg_index_soa(output_loc + i, chan)] =
4317 ac_build_alloca_undef(ctx, type, "");
4318 }
4319 }
4320 }
4321
4322 static void
4323 setup_locals(struct ac_nir_context *ctx,
4324 struct nir_function *func)
4325 {
4326 int i, j;
4327 ctx->num_locals = 0;
4328 nir_foreach_variable(variable, &func->impl->locals) {
4329 unsigned attrib_count = glsl_count_attribute_slots(variable->type, false);
4330 variable->data.driver_location = ctx->num_locals * 4;
4331 variable->data.location_frac = 0;
4332 ctx->num_locals += attrib_count;
4333 }
4334 ctx->locals = malloc(4 * ctx->num_locals * sizeof(LLVMValueRef));
4335 if (!ctx->locals)
4336 return;
4337
4338 for (i = 0; i < ctx->num_locals; i++) {
4339 for (j = 0; j < 4; j++) {
4340 ctx->locals[i * 4 + j] =
4341 ac_build_alloca_undef(&ctx->ac, ctx->ac.f32, "temp");
4342 }
4343 }
4344 }
4345
4346 static void
4347 setup_shared(struct ac_nir_context *ctx,
4348 struct nir_shader *nir)
4349 {
4350 nir_foreach_variable(variable, &nir->shared) {
4351 LLVMValueRef shared =
4352 LLVMAddGlobalInAddressSpace(
4353 ctx->ac.module, glsl_to_llvm_type(&ctx->ac, variable->type),
4354 variable->name ? variable->name : "",
4355 AC_ADDR_SPACE_LDS);
4356 _mesa_hash_table_insert(ctx->vars, variable, shared);
4357 }
4358 }
4359
4360 void ac_nir_translate(struct ac_llvm_context *ac, struct ac_shader_abi *abi,
4361 struct nir_shader *nir)
4362 {
4363 struct ac_nir_context ctx = {};
4364 struct nir_function *func;
4365
4366 ctx.ac = *ac;
4367 ctx.abi = abi;
4368
4369 ctx.stage = nir->info.stage;
4370 ctx.info = &nir->info;
4371
4372 ctx.main_function = LLVMGetBasicBlockParent(LLVMGetInsertBlock(ctx.ac.builder));
4373
4374 nir_foreach_variable(variable, &nir->outputs)
4375 ac_handle_shader_output_decl(&ctx.ac, ctx.abi, nir, variable,
4376 ctx.stage);
4377
4378 ctx.defs = _mesa_hash_table_create(NULL, _mesa_hash_pointer,
4379 _mesa_key_pointer_equal);
4380 ctx.phis = _mesa_hash_table_create(NULL, _mesa_hash_pointer,
4381 _mesa_key_pointer_equal);
4382 ctx.vars = _mesa_hash_table_create(NULL, _mesa_hash_pointer,
4383 _mesa_key_pointer_equal);
4384
4385 func = (struct nir_function *)exec_list_get_head(&nir->functions);
4386
4387 nir_index_ssa_defs(func->impl);
4388 ctx.ssa_defs = calloc(func->impl->ssa_alloc, sizeof(LLVMValueRef));
4389
4390 setup_locals(&ctx, func);
4391
4392 if (gl_shader_stage_is_compute(nir->info.stage))
4393 setup_shared(&ctx, nir);
4394
4395 visit_cf_list(&ctx, &func->impl->body);
4396 phi_post_pass(&ctx);
4397
4398 if (!gl_shader_stage_is_compute(nir->info.stage))
4399 ctx.abi->emit_outputs(ctx.abi, AC_LLVM_MAX_OUTPUTS,
4400 ctx.abi->outputs);
4401
4402 free(ctx.locals);
4403 free(ctx.ssa_defs);
4404 ralloc_free(ctx.defs);
4405 ralloc_free(ctx.phis);
4406 ralloc_free(ctx.vars);
4407 }
4408
4409 void
4410 ac_lower_indirect_derefs(struct nir_shader *nir, enum chip_class chip_class)
4411 {
4412 /* While it would be nice not to have this flag, we are constrained
4413 * by the reality that LLVM 5.0 doesn't have working VGPR indexing
4414 * on GFX9.
4415 */
4416 bool llvm_has_working_vgpr_indexing = chip_class <= GFX8;
4417
4418 /* TODO: Indirect indexing of GS inputs is unimplemented.
4419 *
4420 * TCS and TES load inputs directly from LDS or offchip memory, so
4421 * indirect indexing is trivial.
4422 */
4423 nir_variable_mode indirect_mask = 0;
4424 if (nir->info.stage == MESA_SHADER_GEOMETRY ||
4425 (nir->info.stage != MESA_SHADER_TESS_CTRL &&
4426 nir->info.stage != MESA_SHADER_TESS_EVAL &&
4427 !llvm_has_working_vgpr_indexing)) {
4428 indirect_mask |= nir_var_shader_in;
4429 }
4430 if (!llvm_has_working_vgpr_indexing &&
4431 nir->info.stage != MESA_SHADER_TESS_CTRL)
4432 indirect_mask |= nir_var_shader_out;
4433
4434 /* TODO: We shouldn't need to do this, however LLVM isn't currently
4435 * smart enough to handle indirects without causing excess spilling
4436 * causing the gpu to hang.
4437 *
4438 * See the following thread for more details of the problem:
4439 * https://lists.freedesktop.org/archives/mesa-dev/2017-July/162106.html
4440 */
4441 indirect_mask |= nir_var_function_temp;
4442
4443 nir_lower_indirect_derefs(nir, indirect_mask);
4444 }
4445
4446 static unsigned
4447 get_inst_tessfactor_writemask(nir_intrinsic_instr *intrin)
4448 {
4449 if (intrin->intrinsic != nir_intrinsic_store_deref)
4450 return 0;
4451
4452 nir_variable *var =
4453 nir_deref_instr_get_variable(nir_src_as_deref(intrin->src[0]));
4454
4455 if (var->data.mode != nir_var_shader_out)
4456 return 0;
4457
4458 unsigned writemask = 0;
4459 const int location = var->data.location;
4460 unsigned first_component = var->data.location_frac;
4461 unsigned num_comps = intrin->dest.ssa.num_components;
4462
4463 if (location == VARYING_SLOT_TESS_LEVEL_INNER)
4464 writemask = ((1 << (num_comps + 1)) - 1) << first_component;
4465 else if (location == VARYING_SLOT_TESS_LEVEL_OUTER)
4466 writemask = (((1 << (num_comps + 1)) - 1) << first_component) << 4;
4467
4468 return writemask;
4469 }
4470
4471 static void
4472 scan_tess_ctrl(nir_cf_node *cf_node, unsigned *upper_block_tf_writemask,
4473 unsigned *cond_block_tf_writemask,
4474 bool *tessfactors_are_def_in_all_invocs, bool is_nested_cf)
4475 {
4476 switch (cf_node->type) {
4477 case nir_cf_node_block: {
4478 nir_block *block = nir_cf_node_as_block(cf_node);
4479 nir_foreach_instr(instr, block) {
4480 if (instr->type != nir_instr_type_intrinsic)
4481 continue;
4482
4483 nir_intrinsic_instr *intrin = nir_instr_as_intrinsic(instr);
4484 if (intrin->intrinsic == nir_intrinsic_barrier) {
4485
4486 /* If we find a barrier in nested control flow put this in the
4487 * too hard basket. In GLSL this is not possible but it is in
4488 * SPIR-V.
4489 */
4490 if (is_nested_cf) {
4491 *tessfactors_are_def_in_all_invocs = false;
4492 return;
4493 }
4494
4495 /* The following case must be prevented:
4496 * gl_TessLevelInner = ...;
4497 * barrier();
4498 * if (gl_InvocationID == 1)
4499 * gl_TessLevelInner = ...;
4500 *
4501 * If you consider disjoint code segments separated by barriers, each
4502 * such segment that writes tess factor channels should write the same
4503 * channels in all codepaths within that segment.
4504 */
4505 if (upper_block_tf_writemask || cond_block_tf_writemask) {
4506 /* Accumulate the result: */
4507 *tessfactors_are_def_in_all_invocs &=
4508 !(*cond_block_tf_writemask & ~(*upper_block_tf_writemask));
4509
4510 /* Analyze the next code segment from scratch. */
4511 *upper_block_tf_writemask = 0;
4512 *cond_block_tf_writemask = 0;
4513 }
4514 } else
4515 *upper_block_tf_writemask |= get_inst_tessfactor_writemask(intrin);
4516 }
4517
4518 break;
4519 }
4520 case nir_cf_node_if: {
4521 unsigned then_tessfactor_writemask = 0;
4522 unsigned else_tessfactor_writemask = 0;
4523
4524 nir_if *if_stmt = nir_cf_node_as_if(cf_node);
4525 foreach_list_typed(nir_cf_node, nested_node, node, &if_stmt->then_list) {
4526 scan_tess_ctrl(nested_node, &then_tessfactor_writemask,
4527 cond_block_tf_writemask,
4528 tessfactors_are_def_in_all_invocs, true);
4529 }
4530
4531 foreach_list_typed(nir_cf_node, nested_node, node, &if_stmt->else_list) {
4532 scan_tess_ctrl(nested_node, &else_tessfactor_writemask,
4533 cond_block_tf_writemask,
4534 tessfactors_are_def_in_all_invocs, true);
4535 }
4536
4537 if (then_tessfactor_writemask || else_tessfactor_writemask) {
4538 /* If both statements write the same tess factor channels,
4539 * we can say that the upper block writes them too.
4540 */
4541 *upper_block_tf_writemask |= then_tessfactor_writemask &
4542 else_tessfactor_writemask;
4543 *cond_block_tf_writemask |= then_tessfactor_writemask |
4544 else_tessfactor_writemask;
4545 }
4546
4547 break;
4548 }
4549 case nir_cf_node_loop: {
4550 nir_loop *loop = nir_cf_node_as_loop(cf_node);
4551 foreach_list_typed(nir_cf_node, nested_node, node, &loop->body) {
4552 scan_tess_ctrl(nested_node, cond_block_tf_writemask,
4553 cond_block_tf_writemask,
4554 tessfactors_are_def_in_all_invocs, true);
4555 }
4556
4557 break;
4558 }
4559 default:
4560 unreachable("unknown cf node type");
4561 }
4562 }
4563
4564 bool
4565 ac_are_tessfactors_def_in_all_invocs(const struct nir_shader *nir)
4566 {
4567 assert(nir->info.stage == MESA_SHADER_TESS_CTRL);
4568
4569 /* The pass works as follows:
4570 * If all codepaths write tess factors, we can say that all
4571 * invocations define tess factors.
4572 *
4573 * Each tess factor channel is tracked separately.
4574 */
4575 unsigned main_block_tf_writemask = 0; /* if main block writes tess factors */
4576 unsigned cond_block_tf_writemask = 0; /* if cond block writes tess factors */
4577
4578 /* Initial value = true. Here the pass will accumulate results from
4579 * multiple segments surrounded by barriers. If tess factors aren't
4580 * written at all, it's a shader bug and we don't care if this will be
4581 * true.
4582 */
4583 bool tessfactors_are_def_in_all_invocs = true;
4584
4585 nir_foreach_function(function, nir) {
4586 if (function->impl) {
4587 foreach_list_typed(nir_cf_node, node, node, &function->impl->body) {
4588 scan_tess_ctrl(node, &main_block_tf_writemask,
4589 &cond_block_tf_writemask,
4590 &tessfactors_are_def_in_all_invocs,
4591 false);
4592 }
4593 }
4594 }
4595
4596 /* Accumulate the result for the last code segment separated by a
4597 * barrier.
4598 */
4599 if (main_block_tf_writemask || cond_block_tf_writemask) {
4600 tessfactors_are_def_in_all_invocs &=
4601 !(cond_block_tf_writemask & ~main_block_tf_writemask);
4602 }
4603
4604 return tessfactors_are_def_in_all_invocs;
4605 }