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radeonsi: move HTILE allocation outside of radeonsi
[mesa.git] / src / amd / common / ac_nir_to_llvm.c
1 /*
2 * Copyright © 2016 Bas Nieuwenhuizen
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
21 * IN THE SOFTWARE.
22 */
23
24 #include <llvm/Config/llvm-config.h>
25
26 #include "ac_nir_to_llvm.h"
27 #include "ac_llvm_build.h"
28 #include "ac_llvm_util.h"
29 #include "ac_binary.h"
30 #include "sid.h"
31 #include "nir/nir.h"
32 #include "nir/nir_deref.h"
33 #include "util/bitscan.h"
34 #include "util/u_math.h"
35 #include "ac_shader_abi.h"
36 #include "ac_shader_util.h"
37
38 struct ac_nir_context {
39 struct ac_llvm_context ac;
40 struct ac_shader_abi *abi;
41
42 gl_shader_stage stage;
43 shader_info *info;
44
45 LLVMValueRef *ssa_defs;
46
47 LLVMValueRef scratch;
48 LLVMValueRef constant_data;
49
50 struct hash_table *defs;
51 struct hash_table *phis;
52 struct hash_table *vars;
53
54 LLVMValueRef main_function;
55 LLVMBasicBlockRef continue_block;
56 LLVMBasicBlockRef break_block;
57
58 int num_locals;
59 LLVMValueRef *locals;
60 };
61
62 static LLVMValueRef get_sampler_desc(struct ac_nir_context *ctx,
63 nir_deref_instr *deref_instr,
64 enum ac_descriptor_type desc_type,
65 const nir_instr *instr,
66 bool image, bool write);
67
68 static void
69 build_store_values_extended(struct ac_llvm_context *ac,
70 LLVMValueRef *values,
71 unsigned value_count,
72 unsigned value_stride,
73 LLVMValueRef vec)
74 {
75 LLVMBuilderRef builder = ac->builder;
76 unsigned i;
77
78 for (i = 0; i < value_count; i++) {
79 LLVMValueRef ptr = values[i * value_stride];
80 LLVMValueRef index = LLVMConstInt(ac->i32, i, false);
81 LLVMValueRef value = LLVMBuildExtractElement(builder, vec, index, "");
82 LLVMBuildStore(builder, value, ptr);
83 }
84 }
85
86 static enum ac_image_dim
87 get_ac_sampler_dim(const struct ac_llvm_context *ctx, enum glsl_sampler_dim dim,
88 bool is_array)
89 {
90 switch (dim) {
91 case GLSL_SAMPLER_DIM_1D:
92 if (ctx->chip_class == GFX9)
93 return is_array ? ac_image_2darray : ac_image_2d;
94 return is_array ? ac_image_1darray : ac_image_1d;
95 case GLSL_SAMPLER_DIM_2D:
96 case GLSL_SAMPLER_DIM_RECT:
97 case GLSL_SAMPLER_DIM_EXTERNAL:
98 return is_array ? ac_image_2darray : ac_image_2d;
99 case GLSL_SAMPLER_DIM_3D:
100 return ac_image_3d;
101 case GLSL_SAMPLER_DIM_CUBE:
102 return ac_image_cube;
103 case GLSL_SAMPLER_DIM_MS:
104 return is_array ? ac_image_2darraymsaa : ac_image_2dmsaa;
105 case GLSL_SAMPLER_DIM_SUBPASS:
106 return ac_image_2darray;
107 case GLSL_SAMPLER_DIM_SUBPASS_MS:
108 return ac_image_2darraymsaa;
109 default:
110 unreachable("bad sampler dim");
111 }
112 }
113
114 static enum ac_image_dim
115 get_ac_image_dim(const struct ac_llvm_context *ctx, enum glsl_sampler_dim sdim,
116 bool is_array)
117 {
118 enum ac_image_dim dim = get_ac_sampler_dim(ctx, sdim, is_array);
119
120 /* Match the resource type set in the descriptor. */
121 if (dim == ac_image_cube ||
122 (ctx->chip_class <= GFX8 && dim == ac_image_3d))
123 dim = ac_image_2darray;
124 else if (sdim == GLSL_SAMPLER_DIM_2D && !is_array && ctx->chip_class == GFX9) {
125 /* When a single layer of a 3D texture is bound, the shader
126 * will refer to a 2D target, but the descriptor has a 3D type.
127 * Since the HW ignores BASE_ARRAY in this case, we need to
128 * send 3 coordinates. This doesn't hurt when the underlying
129 * texture is non-3D.
130 */
131 dim = ac_image_3d;
132 }
133
134 return dim;
135 }
136
137 static LLVMTypeRef get_def_type(struct ac_nir_context *ctx,
138 const nir_ssa_def *def)
139 {
140 LLVMTypeRef type = LLVMIntTypeInContext(ctx->ac.context, def->bit_size);
141 if (def->num_components > 1) {
142 type = LLVMVectorType(type, def->num_components);
143 }
144 return type;
145 }
146
147 static LLVMValueRef get_src(struct ac_nir_context *nir, nir_src src)
148 {
149 assert(src.is_ssa);
150 return nir->ssa_defs[src.ssa->index];
151 }
152
153 static LLVMValueRef
154 get_memory_ptr(struct ac_nir_context *ctx, nir_src src)
155 {
156 LLVMValueRef ptr = get_src(ctx, src);
157 ptr = LLVMBuildGEP(ctx->ac.builder, ctx->ac.lds, &ptr, 1, "");
158 int addr_space = LLVMGetPointerAddressSpace(LLVMTypeOf(ptr));
159
160 return LLVMBuildBitCast(ctx->ac.builder, ptr,
161 LLVMPointerType(ctx->ac.i32, addr_space), "");
162 }
163
164 static LLVMBasicBlockRef get_block(struct ac_nir_context *nir,
165 const struct nir_block *b)
166 {
167 struct hash_entry *entry = _mesa_hash_table_search(nir->defs, b);
168 return (LLVMBasicBlockRef)entry->data;
169 }
170
171 static LLVMValueRef get_alu_src(struct ac_nir_context *ctx,
172 nir_alu_src src,
173 unsigned num_components)
174 {
175 LLVMValueRef value = get_src(ctx, src.src);
176 bool need_swizzle = false;
177
178 assert(value);
179 unsigned src_components = ac_get_llvm_num_components(value);
180 for (unsigned i = 0; i < num_components; ++i) {
181 assert(src.swizzle[i] < src_components);
182 if (src.swizzle[i] != i)
183 need_swizzle = true;
184 }
185
186 if (need_swizzle || num_components != src_components) {
187 LLVMValueRef masks[] = {
188 LLVMConstInt(ctx->ac.i32, src.swizzle[0], false),
189 LLVMConstInt(ctx->ac.i32, src.swizzle[1], false),
190 LLVMConstInt(ctx->ac.i32, src.swizzle[2], false),
191 LLVMConstInt(ctx->ac.i32, src.swizzle[3], false)};
192
193 if (src_components > 1 && num_components == 1) {
194 value = LLVMBuildExtractElement(ctx->ac.builder, value,
195 masks[0], "");
196 } else if (src_components == 1 && num_components > 1) {
197 LLVMValueRef values[] = {value, value, value, value};
198 value = ac_build_gather_values(&ctx->ac, values, num_components);
199 } else {
200 LLVMValueRef swizzle = LLVMConstVector(masks, num_components);
201 value = LLVMBuildShuffleVector(ctx->ac.builder, value, value,
202 swizzle, "");
203 }
204 }
205 assert(!src.negate);
206 assert(!src.abs);
207 return value;
208 }
209
210 static LLVMValueRef emit_int_cmp(struct ac_llvm_context *ctx,
211 LLVMIntPredicate pred, LLVMValueRef src0,
212 LLVMValueRef src1)
213 {
214 LLVMValueRef result = LLVMBuildICmp(ctx->builder, pred, src0, src1, "");
215 return LLVMBuildSelect(ctx->builder, result,
216 LLVMConstInt(ctx->i32, 0xFFFFFFFF, false),
217 ctx->i32_0, "");
218 }
219
220 static LLVMValueRef emit_float_cmp(struct ac_llvm_context *ctx,
221 LLVMRealPredicate pred, LLVMValueRef src0,
222 LLVMValueRef src1)
223 {
224 LLVMValueRef result;
225 src0 = ac_to_float(ctx, src0);
226 src1 = ac_to_float(ctx, src1);
227 result = LLVMBuildFCmp(ctx->builder, pred, src0, src1, "");
228 return LLVMBuildSelect(ctx->builder, result,
229 LLVMConstInt(ctx->i32, 0xFFFFFFFF, false),
230 ctx->i32_0, "");
231 }
232
233 static LLVMValueRef emit_intrin_1f_param(struct ac_llvm_context *ctx,
234 const char *intrin,
235 LLVMTypeRef result_type,
236 LLVMValueRef src0)
237 {
238 char name[64];
239 LLVMValueRef params[] = {
240 ac_to_float(ctx, src0),
241 };
242
243 ASSERTED const int length = snprintf(name, sizeof(name), "%s.f%d", intrin,
244 ac_get_elem_bits(ctx, result_type));
245 assert(length < sizeof(name));
246 return ac_build_intrinsic(ctx, name, result_type, params, 1, AC_FUNC_ATTR_READNONE);
247 }
248
249 static LLVMValueRef emit_intrin_2f_param(struct ac_llvm_context *ctx,
250 const char *intrin,
251 LLVMTypeRef result_type,
252 LLVMValueRef src0, LLVMValueRef src1)
253 {
254 char name[64];
255 LLVMValueRef params[] = {
256 ac_to_float(ctx, src0),
257 ac_to_float(ctx, src1),
258 };
259
260 ASSERTED const int length = snprintf(name, sizeof(name), "%s.f%d", intrin,
261 ac_get_elem_bits(ctx, result_type));
262 assert(length < sizeof(name));
263 return ac_build_intrinsic(ctx, name, result_type, params, 2, AC_FUNC_ATTR_READNONE);
264 }
265
266 static LLVMValueRef emit_intrin_3f_param(struct ac_llvm_context *ctx,
267 const char *intrin,
268 LLVMTypeRef result_type,
269 LLVMValueRef src0, LLVMValueRef src1, LLVMValueRef src2)
270 {
271 char name[64];
272 LLVMValueRef params[] = {
273 ac_to_float(ctx, src0),
274 ac_to_float(ctx, src1),
275 ac_to_float(ctx, src2),
276 };
277
278 ASSERTED const int length = snprintf(name, sizeof(name), "%s.f%d", intrin,
279 ac_get_elem_bits(ctx, result_type));
280 assert(length < sizeof(name));
281 return ac_build_intrinsic(ctx, name, result_type, params, 3, AC_FUNC_ATTR_READNONE);
282 }
283
284 static LLVMValueRef emit_bcsel(struct ac_llvm_context *ctx,
285 LLVMValueRef src0, LLVMValueRef src1, LLVMValueRef src2)
286 {
287 assert(LLVMGetTypeKind(LLVMTypeOf(src0)) != LLVMVectorTypeKind);
288
289 LLVMValueRef v = LLVMBuildICmp(ctx->builder, LLVMIntNE, src0,
290 ctx->i32_0, "");
291 return LLVMBuildSelect(ctx->builder, v,
292 ac_to_integer_or_pointer(ctx, src1),
293 ac_to_integer_or_pointer(ctx, src2), "");
294 }
295
296 static LLVMValueRef emit_iabs(struct ac_llvm_context *ctx,
297 LLVMValueRef src0)
298 {
299 return ac_build_imax(ctx, src0, LLVMBuildNeg(ctx->builder, src0, ""));
300 }
301
302 static LLVMValueRef emit_uint_carry(struct ac_llvm_context *ctx,
303 const char *intrin,
304 LLVMValueRef src0, LLVMValueRef src1)
305 {
306 LLVMTypeRef ret_type;
307 LLVMTypeRef types[] = { ctx->i32, ctx->i1 };
308 LLVMValueRef res;
309 LLVMValueRef params[] = { src0, src1 };
310 ret_type = LLVMStructTypeInContext(ctx->context, types,
311 2, true);
312
313 res = ac_build_intrinsic(ctx, intrin, ret_type,
314 params, 2, AC_FUNC_ATTR_READNONE);
315
316 res = LLVMBuildExtractValue(ctx->builder, res, 1, "");
317 res = LLVMBuildZExt(ctx->builder, res, ctx->i32, "");
318 return res;
319 }
320
321 static LLVMValueRef emit_b2f(struct ac_llvm_context *ctx,
322 LLVMValueRef src0,
323 unsigned bitsize)
324 {
325 LLVMValueRef result = LLVMBuildAnd(ctx->builder, src0,
326 LLVMBuildBitCast(ctx->builder, LLVMConstReal(ctx->f32, 1.0), ctx->i32, ""),
327 "");
328 result = LLVMBuildBitCast(ctx->builder, result, ctx->f32, "");
329
330 switch (bitsize) {
331 case 16:
332 return LLVMBuildFPTrunc(ctx->builder, result, ctx->f16, "");
333 case 32:
334 return result;
335 case 64:
336 return LLVMBuildFPExt(ctx->builder, result, ctx->f64, "");
337 default:
338 unreachable("Unsupported bit size.");
339 }
340 }
341
342 static LLVMValueRef emit_f2b(struct ac_llvm_context *ctx,
343 LLVMValueRef src0)
344 {
345 src0 = ac_to_float(ctx, src0);
346 LLVMValueRef zero = LLVMConstNull(LLVMTypeOf(src0));
347 return LLVMBuildSExt(ctx->builder,
348 LLVMBuildFCmp(ctx->builder, LLVMRealUNE, src0, zero, ""),
349 ctx->i32, "");
350 }
351
352 static LLVMValueRef emit_b2i(struct ac_llvm_context *ctx,
353 LLVMValueRef src0,
354 unsigned bitsize)
355 {
356 LLVMValueRef result = LLVMBuildAnd(ctx->builder, src0, ctx->i32_1, "");
357
358 switch (bitsize) {
359 case 8:
360 return LLVMBuildTrunc(ctx->builder, result, ctx->i8, "");
361 case 16:
362 return LLVMBuildTrunc(ctx->builder, result, ctx->i16, "");
363 case 32:
364 return result;
365 case 64:
366 return LLVMBuildZExt(ctx->builder, result, ctx->i64, "");
367 default:
368 unreachable("Unsupported bit size.");
369 }
370 }
371
372 static LLVMValueRef emit_i2b(struct ac_llvm_context *ctx,
373 LLVMValueRef src0)
374 {
375 LLVMValueRef zero = LLVMConstNull(LLVMTypeOf(src0));
376 return LLVMBuildSExt(ctx->builder,
377 LLVMBuildICmp(ctx->builder, LLVMIntNE, src0, zero, ""),
378 ctx->i32, "");
379 }
380
381 static LLVMValueRef emit_f2f16(struct ac_llvm_context *ctx,
382 LLVMValueRef src0)
383 {
384 LLVMValueRef result;
385 LLVMValueRef cond = NULL;
386
387 src0 = ac_to_float(ctx, src0);
388 result = LLVMBuildFPTrunc(ctx->builder, src0, ctx->f16, "");
389
390 if (ctx->chip_class >= GFX8) {
391 LLVMValueRef args[2];
392 /* Check if the result is a denormal - and flush to 0 if so. */
393 args[0] = result;
394 args[1] = LLVMConstInt(ctx->i32, N_SUBNORMAL | P_SUBNORMAL, false);
395 cond = ac_build_intrinsic(ctx, "llvm.amdgcn.class.f16", ctx->i1, args, 2, AC_FUNC_ATTR_READNONE);
396 }
397
398 /* need to convert back up to f32 */
399 result = LLVMBuildFPExt(ctx->builder, result, ctx->f32, "");
400
401 if (ctx->chip_class >= GFX8)
402 result = LLVMBuildSelect(ctx->builder, cond, ctx->f32_0, result, "");
403 else {
404 /* for GFX6-GFX7 */
405 /* 0x38800000 is smallest half float value (2^-14) in 32-bit float,
406 * so compare the result and flush to 0 if it's smaller.
407 */
408 LLVMValueRef temp, cond2;
409 temp = emit_intrin_1f_param(ctx, "llvm.fabs", ctx->f32, result);
410 cond = LLVMBuildFCmp(ctx->builder, LLVMRealUGT,
411 LLVMBuildBitCast(ctx->builder, LLVMConstInt(ctx->i32, 0x38800000, false), ctx->f32, ""),
412 temp, "");
413 cond2 = LLVMBuildFCmp(ctx->builder, LLVMRealUNE,
414 temp, ctx->f32_0, "");
415 cond = LLVMBuildAnd(ctx->builder, cond, cond2, "");
416 result = LLVMBuildSelect(ctx->builder, cond, ctx->f32_0, result, "");
417 }
418 return result;
419 }
420
421 static LLVMValueRef emit_umul_high(struct ac_llvm_context *ctx,
422 LLVMValueRef src0, LLVMValueRef src1)
423 {
424 LLVMValueRef dst64, result;
425 src0 = LLVMBuildZExt(ctx->builder, src0, ctx->i64, "");
426 src1 = LLVMBuildZExt(ctx->builder, src1, ctx->i64, "");
427
428 dst64 = LLVMBuildMul(ctx->builder, src0, src1, "");
429 dst64 = LLVMBuildLShr(ctx->builder, dst64, LLVMConstInt(ctx->i64, 32, false), "");
430 result = LLVMBuildTrunc(ctx->builder, dst64, ctx->i32, "");
431 return result;
432 }
433
434 static LLVMValueRef emit_imul_high(struct ac_llvm_context *ctx,
435 LLVMValueRef src0, LLVMValueRef src1)
436 {
437 LLVMValueRef dst64, result;
438 src0 = LLVMBuildSExt(ctx->builder, src0, ctx->i64, "");
439 src1 = LLVMBuildSExt(ctx->builder, src1, ctx->i64, "");
440
441 dst64 = LLVMBuildMul(ctx->builder, src0, src1, "");
442 dst64 = LLVMBuildAShr(ctx->builder, dst64, LLVMConstInt(ctx->i64, 32, false), "");
443 result = LLVMBuildTrunc(ctx->builder, dst64, ctx->i32, "");
444 return result;
445 }
446
447 static LLVMValueRef emit_bfm(struct ac_llvm_context *ctx,
448 LLVMValueRef bits, LLVMValueRef offset)
449 {
450 /* mask = ((1 << bits) - 1) << offset */
451 return LLVMBuildShl(ctx->builder,
452 LLVMBuildSub(ctx->builder,
453 LLVMBuildShl(ctx->builder,
454 ctx->i32_1,
455 bits, ""),
456 ctx->i32_1, ""),
457 offset, "");
458 }
459
460 static LLVMValueRef emit_bitfield_select(struct ac_llvm_context *ctx,
461 LLVMValueRef mask, LLVMValueRef insert,
462 LLVMValueRef base)
463 {
464 /* Calculate:
465 * (mask & insert) | (~mask & base) = base ^ (mask & (insert ^ base))
466 * Use the right-hand side, which the LLVM backend can convert to V_BFI.
467 */
468 return LLVMBuildXor(ctx->builder, base,
469 LLVMBuildAnd(ctx->builder, mask,
470 LLVMBuildXor(ctx->builder, insert, base, ""), ""), "");
471 }
472
473 static LLVMValueRef emit_pack_2x16(struct ac_llvm_context *ctx,
474 LLVMValueRef src0,
475 LLVMValueRef (*pack)(struct ac_llvm_context *ctx,
476 LLVMValueRef args[2]))
477 {
478 LLVMValueRef comp[2];
479
480 src0 = ac_to_float(ctx, src0);
481 comp[0] = LLVMBuildExtractElement(ctx->builder, src0, ctx->i32_0, "");
482 comp[1] = LLVMBuildExtractElement(ctx->builder, src0, ctx->i32_1, "");
483
484 return LLVMBuildBitCast(ctx->builder, pack(ctx, comp), ctx->i32, "");
485 }
486
487 static LLVMValueRef emit_unpack_half_2x16(struct ac_llvm_context *ctx,
488 LLVMValueRef src0)
489 {
490 LLVMValueRef const16 = LLVMConstInt(ctx->i32, 16, false);
491 LLVMValueRef temps[2], val;
492 int i;
493
494 for (i = 0; i < 2; i++) {
495 val = i == 1 ? LLVMBuildLShr(ctx->builder, src0, const16, "") : src0;
496 val = LLVMBuildTrunc(ctx->builder, val, ctx->i16, "");
497 val = LLVMBuildBitCast(ctx->builder, val, ctx->f16, "");
498 temps[i] = LLVMBuildFPExt(ctx->builder, val, ctx->f32, "");
499 }
500 return ac_build_gather_values(ctx, temps, 2);
501 }
502
503 static LLVMValueRef emit_ddxy(struct ac_nir_context *ctx,
504 nir_op op,
505 LLVMValueRef src0)
506 {
507 unsigned mask;
508 int idx;
509 LLVMValueRef result;
510
511 if (op == nir_op_fddx_fine)
512 mask = AC_TID_MASK_LEFT;
513 else if (op == nir_op_fddy_fine)
514 mask = AC_TID_MASK_TOP;
515 else
516 mask = AC_TID_MASK_TOP_LEFT;
517
518 /* for DDX we want to next X pixel, DDY next Y pixel. */
519 if (op == nir_op_fddx_fine ||
520 op == nir_op_fddx_coarse ||
521 op == nir_op_fddx)
522 idx = 1;
523 else
524 idx = 2;
525
526 result = ac_build_ddxy(&ctx->ac, mask, idx, src0);
527 return result;
528 }
529
530 static void visit_alu(struct ac_nir_context *ctx, const nir_alu_instr *instr)
531 {
532 LLVMValueRef src[4], result = NULL;
533 unsigned num_components = instr->dest.dest.ssa.num_components;
534 unsigned src_components;
535 LLVMTypeRef def_type = get_def_type(ctx, &instr->dest.dest.ssa);
536
537 assert(nir_op_infos[instr->op].num_inputs <= ARRAY_SIZE(src));
538 switch (instr->op) {
539 case nir_op_vec2:
540 case nir_op_vec3:
541 case nir_op_vec4:
542 src_components = 1;
543 break;
544 case nir_op_pack_half_2x16:
545 case nir_op_pack_snorm_2x16:
546 case nir_op_pack_unorm_2x16:
547 src_components = 2;
548 break;
549 case nir_op_unpack_half_2x16:
550 src_components = 1;
551 break;
552 case nir_op_cube_face_coord:
553 case nir_op_cube_face_index:
554 src_components = 3;
555 break;
556 default:
557 src_components = num_components;
558 break;
559 }
560 for (unsigned i = 0; i < nir_op_infos[instr->op].num_inputs; i++)
561 src[i] = get_alu_src(ctx, instr->src[i], src_components);
562
563 switch (instr->op) {
564 case nir_op_mov:
565 result = src[0];
566 break;
567 case nir_op_fneg:
568 src[0] = ac_to_float(&ctx->ac, src[0]);
569 result = LLVMBuildFNeg(ctx->ac.builder, src[0], "");
570 break;
571 case nir_op_ineg:
572 result = LLVMBuildNeg(ctx->ac.builder, src[0], "");
573 break;
574 case nir_op_inot:
575 result = LLVMBuildNot(ctx->ac.builder, src[0], "");
576 break;
577 case nir_op_iadd:
578 result = LLVMBuildAdd(ctx->ac.builder, src[0], src[1], "");
579 break;
580 case nir_op_fadd:
581 src[0] = ac_to_float(&ctx->ac, src[0]);
582 src[1] = ac_to_float(&ctx->ac, src[1]);
583 result = LLVMBuildFAdd(ctx->ac.builder, src[0], src[1], "");
584 break;
585 case nir_op_fsub:
586 src[0] = ac_to_float(&ctx->ac, src[0]);
587 src[1] = ac_to_float(&ctx->ac, src[1]);
588 result = LLVMBuildFSub(ctx->ac.builder, src[0], src[1], "");
589 break;
590 case nir_op_isub:
591 result = LLVMBuildSub(ctx->ac.builder, src[0], src[1], "");
592 break;
593 case nir_op_imul:
594 result = LLVMBuildMul(ctx->ac.builder, src[0], src[1], "");
595 break;
596 case nir_op_imod:
597 result = LLVMBuildSRem(ctx->ac.builder, src[0], src[1], "");
598 break;
599 case nir_op_umod:
600 result = LLVMBuildURem(ctx->ac.builder, src[0], src[1], "");
601 break;
602 case nir_op_fmod:
603 src[0] = ac_to_float(&ctx->ac, src[0]);
604 src[1] = ac_to_float(&ctx->ac, src[1]);
605 result = ac_build_fdiv(&ctx->ac, src[0], src[1]);
606 result = emit_intrin_1f_param(&ctx->ac, "llvm.floor",
607 ac_to_float_type(&ctx->ac, def_type), result);
608 result = LLVMBuildFMul(ctx->ac.builder, src[1] , result, "");
609 result = LLVMBuildFSub(ctx->ac.builder, src[0], result, "");
610 break;
611 case nir_op_frem:
612 src[0] = ac_to_float(&ctx->ac, src[0]);
613 src[1] = ac_to_float(&ctx->ac, src[1]);
614 result = LLVMBuildFRem(ctx->ac.builder, src[0], src[1], "");
615 break;
616 case nir_op_irem:
617 result = LLVMBuildSRem(ctx->ac.builder, src[0], src[1], "");
618 break;
619 case nir_op_idiv:
620 result = LLVMBuildSDiv(ctx->ac.builder, src[0], src[1], "");
621 break;
622 case nir_op_udiv:
623 result = LLVMBuildUDiv(ctx->ac.builder, src[0], src[1], "");
624 break;
625 case nir_op_fmul:
626 src[0] = ac_to_float(&ctx->ac, src[0]);
627 src[1] = ac_to_float(&ctx->ac, src[1]);
628 result = LLVMBuildFMul(ctx->ac.builder, src[0], src[1], "");
629 break;
630 case nir_op_frcp:
631 src[0] = ac_to_float(&ctx->ac, src[0]);
632 result = ac_build_fdiv(&ctx->ac, LLVMConstReal(LLVMTypeOf(src[0]), 1.0), src[0]);
633 break;
634 case nir_op_iand:
635 result = LLVMBuildAnd(ctx->ac.builder, src[0], src[1], "");
636 break;
637 case nir_op_ior:
638 result = LLVMBuildOr(ctx->ac.builder, src[0], src[1], "");
639 break;
640 case nir_op_ixor:
641 result = LLVMBuildXor(ctx->ac.builder, src[0], src[1], "");
642 break;
643 case nir_op_ishl:
644 if (ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[1])) < ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[0])))
645 src[1] = LLVMBuildZExt(ctx->ac.builder, src[1],
646 LLVMTypeOf(src[0]), "");
647 else if (ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[1])) > ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[0])))
648 src[1] = LLVMBuildTrunc(ctx->ac.builder, src[1],
649 LLVMTypeOf(src[0]), "");
650 result = LLVMBuildShl(ctx->ac.builder, src[0], src[1], "");
651 break;
652 case nir_op_ishr:
653 if (ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[1])) < ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[0])))
654 src[1] = LLVMBuildZExt(ctx->ac.builder, src[1],
655 LLVMTypeOf(src[0]), "");
656 else if (ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[1])) > ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[0])))
657 src[1] = LLVMBuildTrunc(ctx->ac.builder, src[1],
658 LLVMTypeOf(src[0]), "");
659 result = LLVMBuildAShr(ctx->ac.builder, src[0], src[1], "");
660 break;
661 case nir_op_ushr:
662 if (ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[1])) < ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[0])))
663 src[1] = LLVMBuildZExt(ctx->ac.builder, src[1],
664 LLVMTypeOf(src[0]), "");
665 else if (ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[1])) > ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[0])))
666 src[1] = LLVMBuildTrunc(ctx->ac.builder, src[1],
667 LLVMTypeOf(src[0]), "");
668 result = LLVMBuildLShr(ctx->ac.builder, src[0], src[1], "");
669 break;
670 case nir_op_ilt32:
671 result = emit_int_cmp(&ctx->ac, LLVMIntSLT, src[0], src[1]);
672 break;
673 case nir_op_ine32:
674 result = emit_int_cmp(&ctx->ac, LLVMIntNE, src[0], src[1]);
675 break;
676 case nir_op_ieq32:
677 result = emit_int_cmp(&ctx->ac, LLVMIntEQ, src[0], src[1]);
678 break;
679 case nir_op_ige32:
680 result = emit_int_cmp(&ctx->ac, LLVMIntSGE, src[0], src[1]);
681 break;
682 case nir_op_ult32:
683 result = emit_int_cmp(&ctx->ac, LLVMIntULT, src[0], src[1]);
684 break;
685 case nir_op_uge32:
686 result = emit_int_cmp(&ctx->ac, LLVMIntUGE, src[0], src[1]);
687 break;
688 case nir_op_feq32:
689 result = emit_float_cmp(&ctx->ac, LLVMRealOEQ, src[0], src[1]);
690 break;
691 case nir_op_fne32:
692 result = emit_float_cmp(&ctx->ac, LLVMRealUNE, src[0], src[1]);
693 break;
694 case nir_op_flt32:
695 result = emit_float_cmp(&ctx->ac, LLVMRealOLT, src[0], src[1]);
696 break;
697 case nir_op_fge32:
698 result = emit_float_cmp(&ctx->ac, LLVMRealOGE, src[0], src[1]);
699 break;
700 case nir_op_fabs:
701 result = emit_intrin_1f_param(&ctx->ac, "llvm.fabs",
702 ac_to_float_type(&ctx->ac, def_type), src[0]);
703 break;
704 case nir_op_iabs:
705 result = emit_iabs(&ctx->ac, src[0]);
706 break;
707 case nir_op_imax:
708 result = ac_build_imax(&ctx->ac, src[0], src[1]);
709 break;
710 case nir_op_imin:
711 result = ac_build_imin(&ctx->ac, src[0], src[1]);
712 break;
713 case nir_op_umax:
714 result = ac_build_umax(&ctx->ac, src[0], src[1]);
715 break;
716 case nir_op_umin:
717 result = ac_build_umin(&ctx->ac, src[0], src[1]);
718 break;
719 case nir_op_isign:
720 result = ac_build_isign(&ctx->ac, src[0],
721 instr->dest.dest.ssa.bit_size);
722 break;
723 case nir_op_fsign:
724 src[0] = ac_to_float(&ctx->ac, src[0]);
725 result = ac_build_fsign(&ctx->ac, src[0],
726 instr->dest.dest.ssa.bit_size);
727 break;
728 case nir_op_ffloor:
729 result = emit_intrin_1f_param(&ctx->ac, "llvm.floor",
730 ac_to_float_type(&ctx->ac, def_type), src[0]);
731 break;
732 case nir_op_ftrunc:
733 result = emit_intrin_1f_param(&ctx->ac, "llvm.trunc",
734 ac_to_float_type(&ctx->ac, def_type), src[0]);
735 break;
736 case nir_op_fceil:
737 result = emit_intrin_1f_param(&ctx->ac, "llvm.ceil",
738 ac_to_float_type(&ctx->ac, def_type), src[0]);
739 break;
740 case nir_op_fround_even:
741 result = emit_intrin_1f_param(&ctx->ac, "llvm.rint",
742 ac_to_float_type(&ctx->ac, def_type),src[0]);
743 break;
744 case nir_op_ffract:
745 src[0] = ac_to_float(&ctx->ac, src[0]);
746 result = ac_build_fract(&ctx->ac, src[0],
747 instr->dest.dest.ssa.bit_size);
748 break;
749 case nir_op_fsin:
750 result = emit_intrin_1f_param(&ctx->ac, "llvm.sin",
751 ac_to_float_type(&ctx->ac, def_type), src[0]);
752 break;
753 case nir_op_fcos:
754 result = emit_intrin_1f_param(&ctx->ac, "llvm.cos",
755 ac_to_float_type(&ctx->ac, def_type), src[0]);
756 break;
757 case nir_op_fsqrt:
758 result = emit_intrin_1f_param(&ctx->ac, "llvm.sqrt",
759 ac_to_float_type(&ctx->ac, def_type), src[0]);
760 break;
761 case nir_op_fexp2:
762 result = emit_intrin_1f_param(&ctx->ac, "llvm.exp2",
763 ac_to_float_type(&ctx->ac, def_type), src[0]);
764 break;
765 case nir_op_flog2:
766 result = emit_intrin_1f_param(&ctx->ac, "llvm.log2",
767 ac_to_float_type(&ctx->ac, def_type), src[0]);
768 break;
769 case nir_op_frsq:
770 result = emit_intrin_1f_param(&ctx->ac, "llvm.sqrt",
771 ac_to_float_type(&ctx->ac, def_type), src[0]);
772 result = ac_build_fdiv(&ctx->ac, LLVMConstReal(LLVMTypeOf(result), 1.0), result);
773 break;
774 case nir_op_frexp_exp:
775 src[0] = ac_to_float(&ctx->ac, src[0]);
776 result = ac_build_frexp_exp(&ctx->ac, src[0],
777 ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[0])));
778 if (ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[0])) == 16)
779 result = LLVMBuildSExt(ctx->ac.builder, result,
780 ctx->ac.i32, "");
781 break;
782 case nir_op_frexp_sig:
783 src[0] = ac_to_float(&ctx->ac, src[0]);
784 result = ac_build_frexp_mant(&ctx->ac, src[0],
785 instr->dest.dest.ssa.bit_size);
786 break;
787 case nir_op_fpow:
788 result = emit_intrin_2f_param(&ctx->ac, "llvm.pow",
789 ac_to_float_type(&ctx->ac, def_type), src[0], src[1]);
790 break;
791 case nir_op_fmax:
792 result = emit_intrin_2f_param(&ctx->ac, "llvm.maxnum",
793 ac_to_float_type(&ctx->ac, def_type), src[0], src[1]);
794 if (ctx->ac.chip_class < GFX9 &&
795 instr->dest.dest.ssa.bit_size == 32) {
796 /* Only pre-GFX9 chips do not flush denorms. */
797 result = emit_intrin_1f_param(&ctx->ac, "llvm.canonicalize",
798 ac_to_float_type(&ctx->ac, def_type),
799 result);
800 }
801 break;
802 case nir_op_fmin:
803 result = emit_intrin_2f_param(&ctx->ac, "llvm.minnum",
804 ac_to_float_type(&ctx->ac, def_type), src[0], src[1]);
805 if (ctx->ac.chip_class < GFX9 &&
806 instr->dest.dest.ssa.bit_size == 32) {
807 /* Only pre-GFX9 chips do not flush denorms. */
808 result = emit_intrin_1f_param(&ctx->ac, "llvm.canonicalize",
809 ac_to_float_type(&ctx->ac, def_type),
810 result);
811 }
812 break;
813 case nir_op_ffma:
814 /* FMA is better on GFX10, because it has FMA units instead of MUL-ADD units. */
815 result = emit_intrin_3f_param(&ctx->ac, ctx->ac.chip_class >= GFX10 ? "llvm.fma" : "llvm.fmuladd",
816 ac_to_float_type(&ctx->ac, def_type), src[0], src[1], src[2]);
817 break;
818 case nir_op_ldexp:
819 src[0] = ac_to_float(&ctx->ac, src[0]);
820 if (ac_get_elem_bits(&ctx->ac, def_type) == 32)
821 result = ac_build_intrinsic(&ctx->ac, "llvm.amdgcn.ldexp.f32", ctx->ac.f32, src, 2, AC_FUNC_ATTR_READNONE);
822 else if (ac_get_elem_bits(&ctx->ac, def_type) == 16)
823 result = ac_build_intrinsic(&ctx->ac, "llvm.amdgcn.ldexp.f16", ctx->ac.f16, src, 2, AC_FUNC_ATTR_READNONE);
824 else
825 result = ac_build_intrinsic(&ctx->ac, "llvm.amdgcn.ldexp.f64", ctx->ac.f64, src, 2, AC_FUNC_ATTR_READNONE);
826 break;
827 case nir_op_bfm:
828 result = emit_bfm(&ctx->ac, src[0], src[1]);
829 break;
830 case nir_op_bitfield_select:
831 result = emit_bitfield_select(&ctx->ac, src[0], src[1], src[2]);
832 break;
833 case nir_op_ubfe:
834 result = ac_build_bfe(&ctx->ac, src[0], src[1], src[2], false);
835 break;
836 case nir_op_ibfe:
837 result = ac_build_bfe(&ctx->ac, src[0], src[1], src[2], true);
838 break;
839 case nir_op_bitfield_reverse:
840 result = ac_build_bitfield_reverse(&ctx->ac, src[0]);
841 break;
842 case nir_op_bit_count:
843 result = ac_build_bit_count(&ctx->ac, src[0]);
844 break;
845 case nir_op_vec2:
846 case nir_op_vec3:
847 case nir_op_vec4:
848 for (unsigned i = 0; i < nir_op_infos[instr->op].num_inputs; i++)
849 src[i] = ac_to_integer(&ctx->ac, src[i]);
850 result = ac_build_gather_values(&ctx->ac, src, num_components);
851 break;
852 case nir_op_f2i8:
853 case nir_op_f2i16:
854 case nir_op_f2i32:
855 case nir_op_f2i64:
856 src[0] = ac_to_float(&ctx->ac, src[0]);
857 result = LLVMBuildFPToSI(ctx->ac.builder, src[0], def_type, "");
858 break;
859 case nir_op_f2u8:
860 case nir_op_f2u16:
861 case nir_op_f2u32:
862 case nir_op_f2u64:
863 src[0] = ac_to_float(&ctx->ac, src[0]);
864 result = LLVMBuildFPToUI(ctx->ac.builder, src[0], def_type, "");
865 break;
866 case nir_op_i2f16:
867 case nir_op_i2f32:
868 case nir_op_i2f64:
869 result = LLVMBuildSIToFP(ctx->ac.builder, src[0], ac_to_float_type(&ctx->ac, def_type), "");
870 break;
871 case nir_op_u2f16:
872 case nir_op_u2f32:
873 case nir_op_u2f64:
874 result = LLVMBuildUIToFP(ctx->ac.builder, src[0], ac_to_float_type(&ctx->ac, def_type), "");
875 break;
876 case nir_op_f2f16_rtz:
877 src[0] = ac_to_float(&ctx->ac, src[0]);
878 if (LLVMTypeOf(src[0]) == ctx->ac.f64)
879 src[0] = LLVMBuildFPTrunc(ctx->ac.builder, src[0], ctx->ac.f32, "");
880 LLVMValueRef param[2] = { src[0], ctx->ac.f32_0 };
881 result = ac_build_cvt_pkrtz_f16(&ctx->ac, param);
882 result = LLVMBuildExtractElement(ctx->ac.builder, result, ctx->ac.i32_0, "");
883 break;
884 case nir_op_f2f16_rtne:
885 case nir_op_f2f16:
886 case nir_op_f2f32:
887 case nir_op_f2f64:
888 src[0] = ac_to_float(&ctx->ac, src[0]);
889 if (ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[0])) < ac_get_elem_bits(&ctx->ac, def_type))
890 result = LLVMBuildFPExt(ctx->ac.builder, src[0], ac_to_float_type(&ctx->ac, def_type), "");
891 else
892 result = LLVMBuildFPTrunc(ctx->ac.builder, src[0], ac_to_float_type(&ctx->ac, def_type), "");
893 break;
894 case nir_op_u2u8:
895 case nir_op_u2u16:
896 case nir_op_u2u32:
897 case nir_op_u2u64:
898 if (ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[0])) < ac_get_elem_bits(&ctx->ac, def_type))
899 result = LLVMBuildZExt(ctx->ac.builder, src[0], def_type, "");
900 else
901 result = LLVMBuildTrunc(ctx->ac.builder, src[0], def_type, "");
902 break;
903 case nir_op_i2i8:
904 case nir_op_i2i16:
905 case nir_op_i2i32:
906 case nir_op_i2i64:
907 if (ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[0])) < ac_get_elem_bits(&ctx->ac, def_type))
908 result = LLVMBuildSExt(ctx->ac.builder, src[0], def_type, "");
909 else
910 result = LLVMBuildTrunc(ctx->ac.builder, src[0], def_type, "");
911 break;
912 case nir_op_b32csel:
913 result = emit_bcsel(&ctx->ac, src[0], src[1], src[2]);
914 break;
915 case nir_op_find_lsb:
916 result = ac_find_lsb(&ctx->ac, ctx->ac.i32, src[0]);
917 break;
918 case nir_op_ufind_msb:
919 result = ac_build_umsb(&ctx->ac, src[0], ctx->ac.i32);
920 break;
921 case nir_op_ifind_msb:
922 result = ac_build_imsb(&ctx->ac, src[0], ctx->ac.i32);
923 break;
924 case nir_op_uadd_carry:
925 result = emit_uint_carry(&ctx->ac, "llvm.uadd.with.overflow.i32", src[0], src[1]);
926 break;
927 case nir_op_usub_borrow:
928 result = emit_uint_carry(&ctx->ac, "llvm.usub.with.overflow.i32", src[0], src[1]);
929 break;
930 case nir_op_b2f16:
931 case nir_op_b2f32:
932 case nir_op_b2f64:
933 result = emit_b2f(&ctx->ac, src[0], instr->dest.dest.ssa.bit_size);
934 break;
935 case nir_op_f2b32:
936 result = emit_f2b(&ctx->ac, src[0]);
937 break;
938 case nir_op_b2i8:
939 case nir_op_b2i16:
940 case nir_op_b2i32:
941 case nir_op_b2i64:
942 result = emit_b2i(&ctx->ac, src[0], instr->dest.dest.ssa.bit_size);
943 break;
944 case nir_op_i2b32:
945 result = emit_i2b(&ctx->ac, src[0]);
946 break;
947 case nir_op_fquantize2f16:
948 result = emit_f2f16(&ctx->ac, src[0]);
949 break;
950 case nir_op_umul_high:
951 result = emit_umul_high(&ctx->ac, src[0], src[1]);
952 break;
953 case nir_op_imul_high:
954 result = emit_imul_high(&ctx->ac, src[0], src[1]);
955 break;
956 case nir_op_pack_half_2x16:
957 result = emit_pack_2x16(&ctx->ac, src[0], ac_build_cvt_pkrtz_f16);
958 break;
959 case nir_op_pack_snorm_2x16:
960 result = emit_pack_2x16(&ctx->ac, src[0], ac_build_cvt_pknorm_i16);
961 break;
962 case nir_op_pack_unorm_2x16:
963 result = emit_pack_2x16(&ctx->ac, src[0], ac_build_cvt_pknorm_u16);
964 break;
965 case nir_op_unpack_half_2x16:
966 result = emit_unpack_half_2x16(&ctx->ac, src[0]);
967 break;
968 case nir_op_fddx:
969 case nir_op_fddy:
970 case nir_op_fddx_fine:
971 case nir_op_fddy_fine:
972 case nir_op_fddx_coarse:
973 case nir_op_fddy_coarse:
974 result = emit_ddxy(ctx, instr->op, src[0]);
975 break;
976
977 case nir_op_unpack_64_2x32_split_x: {
978 assert(ac_get_llvm_num_components(src[0]) == 1);
979 LLVMValueRef tmp = LLVMBuildBitCast(ctx->ac.builder, src[0],
980 ctx->ac.v2i32,
981 "");
982 result = LLVMBuildExtractElement(ctx->ac.builder, tmp,
983 ctx->ac.i32_0, "");
984 break;
985 }
986
987 case nir_op_unpack_64_2x32_split_y: {
988 assert(ac_get_llvm_num_components(src[0]) == 1);
989 LLVMValueRef tmp = LLVMBuildBitCast(ctx->ac.builder, src[0],
990 ctx->ac.v2i32,
991 "");
992 result = LLVMBuildExtractElement(ctx->ac.builder, tmp,
993 ctx->ac.i32_1, "");
994 break;
995 }
996
997 case nir_op_pack_64_2x32_split: {
998 LLVMValueRef tmp = ac_build_gather_values(&ctx->ac, src, 2);
999 result = LLVMBuildBitCast(ctx->ac.builder, tmp, ctx->ac.i64, "");
1000 break;
1001 }
1002
1003 case nir_op_pack_32_2x16_split: {
1004 LLVMValueRef tmp = ac_build_gather_values(&ctx->ac, src, 2);
1005 result = LLVMBuildBitCast(ctx->ac.builder, tmp, ctx->ac.i32, "");
1006 break;
1007 }
1008
1009 case nir_op_unpack_32_2x16_split_x: {
1010 LLVMValueRef tmp = LLVMBuildBitCast(ctx->ac.builder, src[0],
1011 ctx->ac.v2i16,
1012 "");
1013 result = LLVMBuildExtractElement(ctx->ac.builder, tmp,
1014 ctx->ac.i32_0, "");
1015 break;
1016 }
1017
1018 case nir_op_unpack_32_2x16_split_y: {
1019 LLVMValueRef tmp = LLVMBuildBitCast(ctx->ac.builder, src[0],
1020 ctx->ac.v2i16,
1021 "");
1022 result = LLVMBuildExtractElement(ctx->ac.builder, tmp,
1023 ctx->ac.i32_1, "");
1024 break;
1025 }
1026
1027 case nir_op_cube_face_coord: {
1028 src[0] = ac_to_float(&ctx->ac, src[0]);
1029 LLVMValueRef results[2];
1030 LLVMValueRef in[3];
1031 for (unsigned chan = 0; chan < 3; chan++)
1032 in[chan] = ac_llvm_extract_elem(&ctx->ac, src[0], chan);
1033 results[0] = ac_build_intrinsic(&ctx->ac, "llvm.amdgcn.cubesc",
1034 ctx->ac.f32, in, 3, AC_FUNC_ATTR_READNONE);
1035 results[1] = ac_build_intrinsic(&ctx->ac, "llvm.amdgcn.cubetc",
1036 ctx->ac.f32, in, 3, AC_FUNC_ATTR_READNONE);
1037 LLVMValueRef ma = ac_build_intrinsic(&ctx->ac, "llvm.amdgcn.cubema",
1038 ctx->ac.f32, in, 3, AC_FUNC_ATTR_READNONE);
1039 results[0] = ac_build_fdiv(&ctx->ac, results[0], ma);
1040 results[1] = ac_build_fdiv(&ctx->ac, results[1], ma);
1041 LLVMValueRef offset = LLVMConstReal(ctx->ac.f32, 0.5);
1042 results[0] = LLVMBuildFAdd(ctx->ac.builder, results[0], offset, "");
1043 results[1] = LLVMBuildFAdd(ctx->ac.builder, results[1], offset, "");
1044 result = ac_build_gather_values(&ctx->ac, results, 2);
1045 break;
1046 }
1047
1048 case nir_op_cube_face_index: {
1049 src[0] = ac_to_float(&ctx->ac, src[0]);
1050 LLVMValueRef in[3];
1051 for (unsigned chan = 0; chan < 3; chan++)
1052 in[chan] = ac_llvm_extract_elem(&ctx->ac, src[0], chan);
1053 result = ac_build_intrinsic(&ctx->ac, "llvm.amdgcn.cubeid",
1054 ctx->ac.f32, in, 3, AC_FUNC_ATTR_READNONE);
1055 break;
1056 }
1057
1058 case nir_op_fmin3:
1059 result = emit_intrin_2f_param(&ctx->ac, "llvm.minnum",
1060 ac_to_float_type(&ctx->ac, def_type), src[0], src[1]);
1061 result = emit_intrin_2f_param(&ctx->ac, "llvm.minnum",
1062 ac_to_float_type(&ctx->ac, def_type), result, src[2]);
1063 break;
1064 case nir_op_umin3:
1065 result = ac_build_umin(&ctx->ac, src[0], src[1]);
1066 result = ac_build_umin(&ctx->ac, result, src[2]);
1067 break;
1068 case nir_op_imin3:
1069 result = ac_build_imin(&ctx->ac, src[0], src[1]);
1070 result = ac_build_imin(&ctx->ac, result, src[2]);
1071 break;
1072 case nir_op_fmax3:
1073 result = emit_intrin_2f_param(&ctx->ac, "llvm.maxnum",
1074 ac_to_float_type(&ctx->ac, def_type), src[0], src[1]);
1075 result = emit_intrin_2f_param(&ctx->ac, "llvm.maxnum",
1076 ac_to_float_type(&ctx->ac, def_type), result, src[2]);
1077 break;
1078 case nir_op_umax3:
1079 result = ac_build_umax(&ctx->ac, src[0], src[1]);
1080 result = ac_build_umax(&ctx->ac, result, src[2]);
1081 break;
1082 case nir_op_imax3:
1083 result = ac_build_imax(&ctx->ac, src[0], src[1]);
1084 result = ac_build_imax(&ctx->ac, result, src[2]);
1085 break;
1086 case nir_op_fmed3: {
1087 src[0] = ac_to_float(&ctx->ac, src[0]);
1088 src[1] = ac_to_float(&ctx->ac, src[1]);
1089 src[2] = ac_to_float(&ctx->ac, src[2]);
1090 result = ac_build_fmed3(&ctx->ac, src[0], src[1], src[2],
1091 instr->dest.dest.ssa.bit_size);
1092 break;
1093 }
1094 case nir_op_imed3: {
1095 LLVMValueRef tmp1 = ac_build_imin(&ctx->ac, src[0], src[1]);
1096 LLVMValueRef tmp2 = ac_build_imax(&ctx->ac, src[0], src[1]);
1097 tmp2 = ac_build_imin(&ctx->ac, tmp2, src[2]);
1098 result = ac_build_imax(&ctx->ac, tmp1, tmp2);
1099 break;
1100 }
1101 case nir_op_umed3: {
1102 LLVMValueRef tmp1 = ac_build_umin(&ctx->ac, src[0], src[1]);
1103 LLVMValueRef tmp2 = ac_build_umax(&ctx->ac, src[0], src[1]);
1104 tmp2 = ac_build_umin(&ctx->ac, tmp2, src[2]);
1105 result = ac_build_umax(&ctx->ac, tmp1, tmp2);
1106 break;
1107 }
1108
1109 default:
1110 fprintf(stderr, "Unknown NIR alu instr: ");
1111 nir_print_instr(&instr->instr, stderr);
1112 fprintf(stderr, "\n");
1113 abort();
1114 }
1115
1116 if (result) {
1117 assert(instr->dest.dest.is_ssa);
1118 result = ac_to_integer_or_pointer(&ctx->ac, result);
1119 ctx->ssa_defs[instr->dest.dest.ssa.index] = result;
1120 }
1121 }
1122
1123 static void visit_load_const(struct ac_nir_context *ctx,
1124 const nir_load_const_instr *instr)
1125 {
1126 LLVMValueRef values[4], value = NULL;
1127 LLVMTypeRef element_type =
1128 LLVMIntTypeInContext(ctx->ac.context, instr->def.bit_size);
1129
1130 for (unsigned i = 0; i < instr->def.num_components; ++i) {
1131 switch (instr->def.bit_size) {
1132 case 8:
1133 values[i] = LLVMConstInt(element_type,
1134 instr->value[i].u8, false);
1135 break;
1136 case 16:
1137 values[i] = LLVMConstInt(element_type,
1138 instr->value[i].u16, false);
1139 break;
1140 case 32:
1141 values[i] = LLVMConstInt(element_type,
1142 instr->value[i].u32, false);
1143 break;
1144 case 64:
1145 values[i] = LLVMConstInt(element_type,
1146 instr->value[i].u64, false);
1147 break;
1148 default:
1149 fprintf(stderr,
1150 "unsupported nir load_const bit_size: %d\n",
1151 instr->def.bit_size);
1152 abort();
1153 }
1154 }
1155 if (instr->def.num_components > 1) {
1156 value = LLVMConstVector(values, instr->def.num_components);
1157 } else
1158 value = values[0];
1159
1160 ctx->ssa_defs[instr->def.index] = value;
1161 }
1162
1163 static LLVMValueRef
1164 get_buffer_size(struct ac_nir_context *ctx, LLVMValueRef descriptor, bool in_elements)
1165 {
1166 LLVMValueRef size =
1167 LLVMBuildExtractElement(ctx->ac.builder, descriptor,
1168 LLVMConstInt(ctx->ac.i32, 2, false), "");
1169
1170 /* GFX8 only */
1171 if (ctx->ac.chip_class == GFX8 && in_elements) {
1172 /* On GFX8, the descriptor contains the size in bytes,
1173 * but TXQ must return the size in elements.
1174 * The stride is always non-zero for resources using TXQ.
1175 */
1176 LLVMValueRef stride =
1177 LLVMBuildExtractElement(ctx->ac.builder, descriptor,
1178 ctx->ac.i32_1, "");
1179 stride = LLVMBuildLShr(ctx->ac.builder, stride,
1180 LLVMConstInt(ctx->ac.i32, 16, false), "");
1181 stride = LLVMBuildAnd(ctx->ac.builder, stride,
1182 LLVMConstInt(ctx->ac.i32, 0x3fff, false), "");
1183
1184 size = LLVMBuildUDiv(ctx->ac.builder, size, stride, "");
1185 }
1186 return size;
1187 }
1188
1189 /* Gather4 should follow the same rules as bilinear filtering, but the hardware
1190 * incorrectly forces nearest filtering if the texture format is integer.
1191 * The only effect it has on Gather4, which always returns 4 texels for
1192 * bilinear filtering, is that the final coordinates are off by 0.5 of
1193 * the texel size.
1194 *
1195 * The workaround is to subtract 0.5 from the unnormalized coordinates,
1196 * or (0.5 / size) from the normalized coordinates.
1197 *
1198 * However, cube textures with 8_8_8_8 data formats require a different
1199 * workaround of overriding the num format to USCALED/SSCALED. This would lose
1200 * precision in 32-bit data formats, so it needs to be applied dynamically at
1201 * runtime. In this case, return an i1 value that indicates whether the
1202 * descriptor was overridden (and hence a fixup of the sampler result is needed).
1203 */
1204 static LLVMValueRef lower_gather4_integer(struct ac_llvm_context *ctx,
1205 nir_variable *var,
1206 struct ac_image_args *args,
1207 const nir_tex_instr *instr)
1208 {
1209 const struct glsl_type *type = glsl_without_array(var->type);
1210 enum glsl_base_type stype = glsl_get_sampler_result_type(type);
1211 LLVMValueRef wa_8888 = NULL;
1212 LLVMValueRef half_texel[2];
1213 LLVMValueRef result;
1214
1215 assert(stype == GLSL_TYPE_INT || stype == GLSL_TYPE_UINT);
1216
1217 if (instr->sampler_dim == GLSL_SAMPLER_DIM_CUBE) {
1218 LLVMValueRef formats;
1219 LLVMValueRef data_format;
1220 LLVMValueRef wa_formats;
1221
1222 formats = LLVMBuildExtractElement(ctx->builder, args->resource, ctx->i32_1, "");
1223
1224 data_format = LLVMBuildLShr(ctx->builder, formats,
1225 LLVMConstInt(ctx->i32, 20, false), "");
1226 data_format = LLVMBuildAnd(ctx->builder, data_format,
1227 LLVMConstInt(ctx->i32, (1u << 6) - 1, false), "");
1228 wa_8888 = LLVMBuildICmp(
1229 ctx->builder, LLVMIntEQ, data_format,
1230 LLVMConstInt(ctx->i32, V_008F14_IMG_DATA_FORMAT_8_8_8_8, false),
1231 "");
1232
1233 uint32_t wa_num_format =
1234 stype == GLSL_TYPE_UINT ?
1235 S_008F14_NUM_FORMAT(V_008F14_IMG_NUM_FORMAT_USCALED) :
1236 S_008F14_NUM_FORMAT(V_008F14_IMG_NUM_FORMAT_SSCALED);
1237 wa_formats = LLVMBuildAnd(ctx->builder, formats,
1238 LLVMConstInt(ctx->i32, C_008F14_NUM_FORMAT, false),
1239 "");
1240 wa_formats = LLVMBuildOr(ctx->builder, wa_formats,
1241 LLVMConstInt(ctx->i32, wa_num_format, false), "");
1242
1243 formats = LLVMBuildSelect(ctx->builder, wa_8888, wa_formats, formats, "");
1244 args->resource = LLVMBuildInsertElement(
1245 ctx->builder, args->resource, formats, ctx->i32_1, "");
1246 }
1247
1248 if (instr->sampler_dim == GLSL_SAMPLER_DIM_RECT) {
1249 assert(!wa_8888);
1250 half_texel[0] = half_texel[1] = LLVMConstReal(ctx->f32, -0.5);
1251 } else {
1252 struct ac_image_args resinfo = {};
1253 LLVMBasicBlockRef bbs[2];
1254
1255 LLVMValueRef unnorm = NULL;
1256 LLVMValueRef default_offset = ctx->f32_0;
1257 if (instr->sampler_dim == GLSL_SAMPLER_DIM_2D &&
1258 !instr->is_array) {
1259 /* In vulkan, whether the sampler uses unnormalized
1260 * coordinates or not is a dynamic property of the
1261 * sampler. Hence, to figure out whether or not we
1262 * need to divide by the texture size, we need to test
1263 * the sampler at runtime. This tests the bit set by
1264 * radv_init_sampler().
1265 */
1266 LLVMValueRef sampler0 =
1267 LLVMBuildExtractElement(ctx->builder, args->sampler, ctx->i32_0, "");
1268 sampler0 = LLVMBuildLShr(ctx->builder, sampler0,
1269 LLVMConstInt(ctx->i32, 15, false), "");
1270 sampler0 = LLVMBuildAnd(ctx->builder, sampler0, ctx->i32_1, "");
1271 unnorm = LLVMBuildICmp(ctx->builder, LLVMIntEQ, sampler0, ctx->i32_1, "");
1272 default_offset = LLVMConstReal(ctx->f32, -0.5);
1273 }
1274
1275 bbs[0] = LLVMGetInsertBlock(ctx->builder);
1276 if (wa_8888 || unnorm) {
1277 assert(!(wa_8888 && unnorm));
1278 LLVMValueRef not_needed = wa_8888 ? wa_8888 : unnorm;
1279 /* Skip the texture size query entirely if we don't need it. */
1280 ac_build_ifcc(ctx, LLVMBuildNot(ctx->builder, not_needed, ""), 2000);
1281 bbs[1] = LLVMGetInsertBlock(ctx->builder);
1282 }
1283
1284 /* Query the texture size. */
1285 resinfo.dim = get_ac_sampler_dim(ctx, instr->sampler_dim, instr->is_array);
1286 resinfo.opcode = ac_image_get_resinfo;
1287 resinfo.dmask = 0xf;
1288 resinfo.lod = ctx->i32_0;
1289 resinfo.resource = args->resource;
1290 resinfo.attributes = AC_FUNC_ATTR_READNONE;
1291 LLVMValueRef size = ac_build_image_opcode(ctx, &resinfo);
1292
1293 /* Compute -0.5 / size. */
1294 for (unsigned c = 0; c < 2; c++) {
1295 half_texel[c] =
1296 LLVMBuildExtractElement(ctx->builder, size,
1297 LLVMConstInt(ctx->i32, c, 0), "");
1298 half_texel[c] = LLVMBuildUIToFP(ctx->builder, half_texel[c], ctx->f32, "");
1299 half_texel[c] = ac_build_fdiv(ctx, ctx->f32_1, half_texel[c]);
1300 half_texel[c] = LLVMBuildFMul(ctx->builder, half_texel[c],
1301 LLVMConstReal(ctx->f32, -0.5), "");
1302 }
1303
1304 if (wa_8888 || unnorm) {
1305 ac_build_endif(ctx, 2000);
1306
1307 for (unsigned c = 0; c < 2; c++) {
1308 LLVMValueRef values[2] = { default_offset, half_texel[c] };
1309 half_texel[c] = ac_build_phi(ctx, ctx->f32, 2,
1310 values, bbs);
1311 }
1312 }
1313 }
1314
1315 for (unsigned c = 0; c < 2; c++) {
1316 LLVMValueRef tmp;
1317 tmp = LLVMBuildBitCast(ctx->builder, args->coords[c], ctx->f32, "");
1318 args->coords[c] = LLVMBuildFAdd(ctx->builder, tmp, half_texel[c], "");
1319 }
1320
1321 args->attributes = AC_FUNC_ATTR_READNONE;
1322 result = ac_build_image_opcode(ctx, args);
1323
1324 if (instr->sampler_dim == GLSL_SAMPLER_DIM_CUBE) {
1325 LLVMValueRef tmp, tmp2;
1326
1327 /* if the cube workaround is in place, f2i the result. */
1328 for (unsigned c = 0; c < 4; c++) {
1329 tmp = LLVMBuildExtractElement(ctx->builder, result, LLVMConstInt(ctx->i32, c, false), "");
1330 if (stype == GLSL_TYPE_UINT)
1331 tmp2 = LLVMBuildFPToUI(ctx->builder, tmp, ctx->i32, "");
1332 else
1333 tmp2 = LLVMBuildFPToSI(ctx->builder, tmp, ctx->i32, "");
1334 tmp = LLVMBuildBitCast(ctx->builder, tmp, ctx->i32, "");
1335 tmp2 = LLVMBuildBitCast(ctx->builder, tmp2, ctx->i32, "");
1336 tmp = LLVMBuildSelect(ctx->builder, wa_8888, tmp2, tmp, "");
1337 tmp = LLVMBuildBitCast(ctx->builder, tmp, ctx->f32, "");
1338 result = LLVMBuildInsertElement(ctx->builder, result, tmp, LLVMConstInt(ctx->i32, c, false), "");
1339 }
1340 }
1341 return result;
1342 }
1343
1344 static nir_deref_instr *get_tex_texture_deref(const nir_tex_instr *instr)
1345 {
1346 nir_deref_instr *texture_deref_instr = NULL;
1347
1348 for (unsigned i = 0; i < instr->num_srcs; i++) {
1349 switch (instr->src[i].src_type) {
1350 case nir_tex_src_texture_deref:
1351 texture_deref_instr = nir_src_as_deref(instr->src[i].src);
1352 break;
1353 default:
1354 break;
1355 }
1356 }
1357 return texture_deref_instr;
1358 }
1359
1360 static LLVMValueRef build_tex_intrinsic(struct ac_nir_context *ctx,
1361 const nir_tex_instr *instr,
1362 struct ac_image_args *args)
1363 {
1364 if (instr->sampler_dim == GLSL_SAMPLER_DIM_BUF) {
1365 unsigned mask = nir_ssa_def_components_read(&instr->dest.ssa);
1366
1367 return ac_build_buffer_load_format(&ctx->ac,
1368 args->resource,
1369 args->coords[0],
1370 ctx->ac.i32_0,
1371 util_last_bit(mask),
1372 0, true);
1373 }
1374
1375 args->opcode = ac_image_sample;
1376
1377 switch (instr->op) {
1378 case nir_texop_txf:
1379 case nir_texop_txf_ms:
1380 case nir_texop_samples_identical:
1381 args->opcode = args->level_zero ||
1382 instr->sampler_dim == GLSL_SAMPLER_DIM_MS ?
1383 ac_image_load : ac_image_load_mip;
1384 args->level_zero = false;
1385 break;
1386 case nir_texop_txs:
1387 case nir_texop_query_levels:
1388 args->opcode = ac_image_get_resinfo;
1389 if (!args->lod)
1390 args->lod = ctx->ac.i32_0;
1391 args->level_zero = false;
1392 break;
1393 case nir_texop_tex:
1394 if (ctx->stage != MESA_SHADER_FRAGMENT) {
1395 assert(!args->lod);
1396 args->level_zero = true;
1397 }
1398 break;
1399 case nir_texop_tg4:
1400 args->opcode = ac_image_gather4;
1401 args->level_zero = true;
1402 break;
1403 case nir_texop_lod:
1404 args->opcode = ac_image_get_lod;
1405 break;
1406 default:
1407 break;
1408 }
1409
1410 if (instr->op == nir_texop_tg4 && ctx->ac.chip_class <= GFX8) {
1411 nir_deref_instr *texture_deref_instr = get_tex_texture_deref(instr);
1412 nir_variable *var = nir_deref_instr_get_variable(texture_deref_instr);
1413 const struct glsl_type *type = glsl_without_array(var->type);
1414 enum glsl_base_type stype = glsl_get_sampler_result_type(type);
1415 if (stype == GLSL_TYPE_UINT || stype == GLSL_TYPE_INT) {
1416 return lower_gather4_integer(&ctx->ac, var, args, instr);
1417 }
1418 }
1419
1420 /* Fixup for GFX9 which allocates 1D textures as 2D. */
1421 if (instr->op == nir_texop_lod && ctx->ac.chip_class == GFX9) {
1422 if ((args->dim == ac_image_2darray ||
1423 args->dim == ac_image_2d) && !args->coords[1]) {
1424 args->coords[1] = ctx->ac.i32_0;
1425 }
1426 }
1427
1428 args->attributes = AC_FUNC_ATTR_READNONE;
1429 bool cs_derivs = ctx->stage == MESA_SHADER_COMPUTE &&
1430 ctx->info->cs.derivative_group != DERIVATIVE_GROUP_NONE;
1431 if (ctx->stage == MESA_SHADER_FRAGMENT || cs_derivs) {
1432 /* Prevent texture instructions with implicit derivatives from being
1433 * sinked into branches. */
1434 switch (instr->op) {
1435 case nir_texop_tex:
1436 case nir_texop_txb:
1437 case nir_texop_lod:
1438 args->attributes |= AC_FUNC_ATTR_CONVERGENT;
1439 break;
1440 default:
1441 break;
1442 }
1443 }
1444
1445 return ac_build_image_opcode(&ctx->ac, args);
1446 }
1447
1448 static LLVMValueRef visit_vulkan_resource_reindex(struct ac_nir_context *ctx,
1449 nir_intrinsic_instr *instr)
1450 {
1451 LLVMValueRef ptr = get_src(ctx, instr->src[0]);
1452 LLVMValueRef index = get_src(ctx, instr->src[1]);
1453
1454 LLVMValueRef result = LLVMBuildGEP(ctx->ac.builder, ptr, &index, 1, "");
1455 LLVMSetMetadata(result, ctx->ac.uniform_md_kind, ctx->ac.empty_md);
1456 return result;
1457 }
1458
1459 static LLVMValueRef visit_load_push_constant(struct ac_nir_context *ctx,
1460 nir_intrinsic_instr *instr)
1461 {
1462 LLVMValueRef ptr, addr;
1463 LLVMValueRef src0 = get_src(ctx, instr->src[0]);
1464 unsigned index = nir_intrinsic_base(instr);
1465
1466 addr = LLVMConstInt(ctx->ac.i32, index, 0);
1467 addr = LLVMBuildAdd(ctx->ac.builder, addr, src0, "");
1468
1469 /* Load constant values from user SGPRS when possible, otherwise
1470 * fallback to the default path that loads directly from memory.
1471 */
1472 if (LLVMIsConstant(src0) &&
1473 instr->dest.ssa.bit_size == 32) {
1474 unsigned count = instr->dest.ssa.num_components;
1475 unsigned offset = index;
1476
1477 offset += LLVMConstIntGetZExtValue(src0);
1478 offset /= 4;
1479
1480 offset -= ctx->abi->base_inline_push_consts;
1481
1482 if (offset + count <= ctx->abi->num_inline_push_consts) {
1483 return ac_build_gather_values(&ctx->ac,
1484 ctx->abi->inline_push_consts + offset,
1485 count);
1486 }
1487 }
1488
1489 ptr = LLVMBuildGEP(ctx->ac.builder, ctx->abi->push_constants, &addr, 1, "");
1490
1491 if (instr->dest.ssa.bit_size == 8) {
1492 unsigned load_dwords = instr->dest.ssa.num_components > 1 ? 2 : 1;
1493 LLVMTypeRef vec_type = LLVMVectorType(LLVMInt8TypeInContext(ctx->ac.context), 4 * load_dwords);
1494 ptr = ac_cast_ptr(&ctx->ac, ptr, vec_type);
1495 LLVMValueRef res = LLVMBuildLoad(ctx->ac.builder, ptr, "");
1496
1497 LLVMValueRef params[3];
1498 if (load_dwords > 1) {
1499 LLVMValueRef res_vec = LLVMBuildBitCast(ctx->ac.builder, res, LLVMVectorType(ctx->ac.i32, 2), "");
1500 params[0] = LLVMBuildExtractElement(ctx->ac.builder, res_vec, LLVMConstInt(ctx->ac.i32, 1, false), "");
1501 params[1] = LLVMBuildExtractElement(ctx->ac.builder, res_vec, LLVMConstInt(ctx->ac.i32, 0, false), "");
1502 } else {
1503 res = LLVMBuildBitCast(ctx->ac.builder, res, ctx->ac.i32, "");
1504 params[0] = ctx->ac.i32_0;
1505 params[1] = res;
1506 }
1507 params[2] = addr;
1508 res = ac_build_intrinsic(&ctx->ac, "llvm.amdgcn.alignbyte", ctx->ac.i32, params, 3, 0);
1509
1510 res = LLVMBuildTrunc(ctx->ac.builder, res, LLVMIntTypeInContext(ctx->ac.context, instr->dest.ssa.num_components * 8), "");
1511 if (instr->dest.ssa.num_components > 1)
1512 res = LLVMBuildBitCast(ctx->ac.builder, res, LLVMVectorType(LLVMInt8TypeInContext(ctx->ac.context), instr->dest.ssa.num_components), "");
1513 return res;
1514 } else if (instr->dest.ssa.bit_size == 16) {
1515 unsigned load_dwords = instr->dest.ssa.num_components / 2 + 1;
1516 LLVMTypeRef vec_type = LLVMVectorType(LLVMInt16TypeInContext(ctx->ac.context), 2 * load_dwords);
1517 ptr = ac_cast_ptr(&ctx->ac, ptr, vec_type);
1518 LLVMValueRef res = LLVMBuildLoad(ctx->ac.builder, ptr, "");
1519 res = LLVMBuildBitCast(ctx->ac.builder, res, vec_type, "");
1520 LLVMValueRef cond = LLVMBuildLShr(ctx->ac.builder, addr, ctx->ac.i32_1, "");
1521 cond = LLVMBuildTrunc(ctx->ac.builder, cond, ctx->ac.i1, "");
1522 LLVMValueRef mask[] = { LLVMConstInt(ctx->ac.i32, 0, false), LLVMConstInt(ctx->ac.i32, 1, false),
1523 LLVMConstInt(ctx->ac.i32, 2, false), LLVMConstInt(ctx->ac.i32, 3, false),
1524 LLVMConstInt(ctx->ac.i32, 4, false)};
1525 LLVMValueRef swizzle_aligned = LLVMConstVector(&mask[0], instr->dest.ssa.num_components);
1526 LLVMValueRef swizzle_unaligned = LLVMConstVector(&mask[1], instr->dest.ssa.num_components);
1527 LLVMValueRef shuffle_aligned = LLVMBuildShuffleVector(ctx->ac.builder, res, res, swizzle_aligned, "");
1528 LLVMValueRef shuffle_unaligned = LLVMBuildShuffleVector(ctx->ac.builder, res, res, swizzle_unaligned, "");
1529 res = LLVMBuildSelect(ctx->ac.builder, cond, shuffle_unaligned, shuffle_aligned, "");
1530 return LLVMBuildBitCast(ctx->ac.builder, res, get_def_type(ctx, &instr->dest.ssa), "");
1531 }
1532
1533 ptr = ac_cast_ptr(&ctx->ac, ptr, get_def_type(ctx, &instr->dest.ssa));
1534
1535 return LLVMBuildLoad(ctx->ac.builder, ptr, "");
1536 }
1537
1538 static LLVMValueRef visit_get_buffer_size(struct ac_nir_context *ctx,
1539 const nir_intrinsic_instr *instr)
1540 {
1541 LLVMValueRef index = get_src(ctx, instr->src[0]);
1542
1543 return get_buffer_size(ctx, ctx->abi->load_ssbo(ctx->abi, index, false), false);
1544 }
1545
1546 static uint32_t widen_mask(uint32_t mask, unsigned multiplier)
1547 {
1548 uint32_t new_mask = 0;
1549 for(unsigned i = 0; i < 32 && (1u << i) <= mask; ++i)
1550 if (mask & (1u << i))
1551 new_mask |= ((1u << multiplier) - 1u) << (i * multiplier);
1552 return new_mask;
1553 }
1554
1555 static LLVMValueRef extract_vector_range(struct ac_llvm_context *ctx, LLVMValueRef src,
1556 unsigned start, unsigned count)
1557 {
1558 LLVMValueRef mask[] = {
1559 ctx->i32_0, ctx->i32_1,
1560 LLVMConstInt(ctx->i32, 2, false), LLVMConstInt(ctx->i32, 3, false) };
1561
1562 unsigned src_elements = ac_get_llvm_num_components(src);
1563
1564 if (count == src_elements) {
1565 assert(start == 0);
1566 return src;
1567 } else if (count == 1) {
1568 assert(start < src_elements);
1569 return LLVMBuildExtractElement(ctx->builder, src, mask[start], "");
1570 } else {
1571 assert(start + count <= src_elements);
1572 assert(count <= 4);
1573 LLVMValueRef swizzle = LLVMConstVector(&mask[start], count);
1574 return LLVMBuildShuffleVector(ctx->builder, src, src, swizzle, "");
1575 }
1576 }
1577
1578 static unsigned get_cache_policy(struct ac_nir_context *ctx,
1579 enum gl_access_qualifier access,
1580 bool may_store_unaligned,
1581 bool writeonly_memory)
1582 {
1583 unsigned cache_policy = 0;
1584
1585 /* GFX6 has a TC L1 bug causing corruption of 8bit/16bit stores. All
1586 * store opcodes not aligned to a dword are affected. The only way to
1587 * get unaligned stores is through shader images.
1588 */
1589 if (((may_store_unaligned && ctx->ac.chip_class == GFX6) ||
1590 /* If this is write-only, don't keep data in L1 to prevent
1591 * evicting L1 cache lines that may be needed by other
1592 * instructions.
1593 */
1594 writeonly_memory ||
1595 access & (ACCESS_COHERENT | ACCESS_VOLATILE))) {
1596 cache_policy |= ac_glc;
1597 }
1598
1599 if (access & ACCESS_STREAM_CACHE_POLICY)
1600 cache_policy |= ac_slc;
1601
1602 return cache_policy;
1603 }
1604
1605 static void visit_store_ssbo(struct ac_nir_context *ctx,
1606 nir_intrinsic_instr *instr)
1607 {
1608 LLVMValueRef src_data = get_src(ctx, instr->src[0]);
1609 int elem_size_bytes = ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src_data)) / 8;
1610 unsigned writemask = nir_intrinsic_write_mask(instr);
1611 enum gl_access_qualifier access = nir_intrinsic_access(instr);
1612 bool writeonly_memory = access & ACCESS_NON_READABLE;
1613 unsigned cache_policy = get_cache_policy(ctx, access, false, writeonly_memory);
1614
1615 LLVMValueRef rsrc = ctx->abi->load_ssbo(ctx->abi,
1616 get_src(ctx, instr->src[1]), true);
1617 LLVMValueRef base_data = src_data;
1618 base_data = ac_trim_vector(&ctx->ac, base_data, instr->num_components);
1619 LLVMValueRef base_offset = get_src(ctx, instr->src[2]);
1620
1621 while (writemask) {
1622 int start, count;
1623 LLVMValueRef data, offset;
1624 LLVMTypeRef data_type;
1625
1626 u_bit_scan_consecutive_range(&writemask, &start, &count);
1627
1628 /* Due to an LLVM limitation with LLVM < 9, split 3-element
1629 * writes into a 2-element and a 1-element write. */
1630 if (count == 3 &&
1631 (elem_size_bytes != 4 || !ac_has_vec3_support(ctx->ac.chip_class, false))) {
1632 writemask |= 1 << (start + 2);
1633 count = 2;
1634 }
1635 int num_bytes = count * elem_size_bytes; /* count in bytes */
1636
1637 /* we can only store 4 DWords at the same time.
1638 * can only happen for 64 Bit vectors. */
1639 if (num_bytes > 16) {
1640 writemask |= ((1u << (count - 2)) - 1u) << (start + 2);
1641 count = 2;
1642 num_bytes = 16;
1643 }
1644
1645 /* check alignment of 16 Bit stores */
1646 if (elem_size_bytes == 2 && num_bytes > 2 && (start % 2) == 1) {
1647 writemask |= ((1u << (count - 1)) - 1u) << (start + 1);
1648 count = 1;
1649 num_bytes = 2;
1650 }
1651 data = extract_vector_range(&ctx->ac, base_data, start, count);
1652
1653 offset = LLVMBuildAdd(ctx->ac.builder, base_offset,
1654 LLVMConstInt(ctx->ac.i32, start * elem_size_bytes, false), "");
1655
1656 if (num_bytes == 1) {
1657 ac_build_tbuffer_store_byte(&ctx->ac, rsrc, data,
1658 offset, ctx->ac.i32_0,
1659 cache_policy);
1660 } else if (num_bytes == 2) {
1661 ac_build_tbuffer_store_short(&ctx->ac, rsrc, data,
1662 offset, ctx->ac.i32_0,
1663 cache_policy);
1664 } else {
1665 int num_channels = num_bytes / 4;
1666
1667 switch (num_bytes) {
1668 case 16: /* v4f32 */
1669 data_type = ctx->ac.v4f32;
1670 break;
1671 case 12: /* v3f32 */
1672 data_type = ctx->ac.v3f32;
1673 break;
1674 case 8: /* v2f32 */
1675 data_type = ctx->ac.v2f32;
1676 break;
1677 case 4: /* f32 */
1678 data_type = ctx->ac.f32;
1679 break;
1680 default:
1681 unreachable("Malformed vector store.");
1682 }
1683 data = LLVMBuildBitCast(ctx->ac.builder, data, data_type, "");
1684
1685 ac_build_buffer_store_dword(&ctx->ac, rsrc, data,
1686 num_channels, offset,
1687 ctx->ac.i32_0, 0,
1688 cache_policy, false);
1689 }
1690 }
1691 }
1692
1693 static LLVMValueRef emit_ssbo_comp_swap_64(struct ac_nir_context *ctx,
1694 LLVMValueRef descriptor,
1695 LLVMValueRef offset,
1696 LLVMValueRef compare,
1697 LLVMValueRef exchange)
1698 {
1699 LLVMBasicBlockRef start_block = NULL, then_block = NULL;
1700 if (ctx->abi->robust_buffer_access) {
1701 LLVMValueRef size = ac_llvm_extract_elem(&ctx->ac, descriptor, 2);
1702
1703 LLVMValueRef cond = LLVMBuildICmp(ctx->ac.builder, LLVMIntULT, offset, size, "");
1704 start_block = LLVMGetInsertBlock(ctx->ac.builder);
1705
1706 ac_build_ifcc(&ctx->ac, cond, -1);
1707
1708 then_block = LLVMGetInsertBlock(ctx->ac.builder);
1709 }
1710
1711 LLVMValueRef ptr_parts[2] = {
1712 ac_llvm_extract_elem(&ctx->ac, descriptor, 0),
1713 LLVMBuildAnd(ctx->ac.builder,
1714 ac_llvm_extract_elem(&ctx->ac, descriptor, 1),
1715 LLVMConstInt(ctx->ac.i32, 65535, 0), "")
1716 };
1717
1718 ptr_parts[1] = LLVMBuildTrunc(ctx->ac.builder, ptr_parts[1], ctx->ac.i16, "");
1719 ptr_parts[1] = LLVMBuildSExt(ctx->ac.builder, ptr_parts[1], ctx->ac.i32, "");
1720
1721 offset = LLVMBuildZExt(ctx->ac.builder, offset, ctx->ac.i64, "");
1722
1723 LLVMValueRef ptr = ac_build_gather_values(&ctx->ac, ptr_parts, 2);
1724 ptr = LLVMBuildBitCast(ctx->ac.builder, ptr, ctx->ac.i64, "");
1725 ptr = LLVMBuildAdd(ctx->ac.builder, ptr, offset, "");
1726 ptr = LLVMBuildIntToPtr(ctx->ac.builder, ptr, LLVMPointerType(ctx->ac.i64, AC_ADDR_SPACE_GLOBAL), "");
1727
1728 LLVMValueRef result = ac_build_atomic_cmp_xchg(&ctx->ac, ptr, compare, exchange, "singlethread-one-as");
1729 result = LLVMBuildExtractValue(ctx->ac.builder, result, 0, "");
1730
1731 if (ctx->abi->robust_buffer_access) {
1732 ac_build_endif(&ctx->ac, -1);
1733
1734 LLVMBasicBlockRef incoming_blocks[2] = {
1735 start_block,
1736 then_block,
1737 };
1738
1739 LLVMValueRef incoming_values[2] = {
1740 LLVMConstInt(ctx->ac.i64, 0, 0),
1741 result,
1742 };
1743 LLVMValueRef ret = LLVMBuildPhi(ctx->ac.builder, ctx->ac.i64, "");
1744 LLVMAddIncoming(ret, incoming_values, incoming_blocks, 2);
1745 return ret;
1746 } else {
1747 return result;
1748 }
1749 }
1750
1751 static LLVMValueRef visit_atomic_ssbo(struct ac_nir_context *ctx,
1752 const nir_intrinsic_instr *instr)
1753 {
1754 LLVMTypeRef return_type = LLVMTypeOf(get_src(ctx, instr->src[2]));
1755 const char *op;
1756 char name[64], type[8];
1757 LLVMValueRef params[6], descriptor;
1758 int arg_count = 0;
1759
1760 switch (instr->intrinsic) {
1761 case nir_intrinsic_ssbo_atomic_add:
1762 op = "add";
1763 break;
1764 case nir_intrinsic_ssbo_atomic_imin:
1765 op = "smin";
1766 break;
1767 case nir_intrinsic_ssbo_atomic_umin:
1768 op = "umin";
1769 break;
1770 case nir_intrinsic_ssbo_atomic_imax:
1771 op = "smax";
1772 break;
1773 case nir_intrinsic_ssbo_atomic_umax:
1774 op = "umax";
1775 break;
1776 case nir_intrinsic_ssbo_atomic_and:
1777 op = "and";
1778 break;
1779 case nir_intrinsic_ssbo_atomic_or:
1780 op = "or";
1781 break;
1782 case nir_intrinsic_ssbo_atomic_xor:
1783 op = "xor";
1784 break;
1785 case nir_intrinsic_ssbo_atomic_exchange:
1786 op = "swap";
1787 break;
1788 case nir_intrinsic_ssbo_atomic_comp_swap:
1789 op = "cmpswap";
1790 break;
1791 default:
1792 abort();
1793 }
1794
1795 descriptor = ctx->abi->load_ssbo(ctx->abi,
1796 get_src(ctx, instr->src[0]),
1797 true);
1798
1799 if (instr->intrinsic == nir_intrinsic_ssbo_atomic_comp_swap &&
1800 return_type == ctx->ac.i64) {
1801 return emit_ssbo_comp_swap_64(ctx, descriptor,
1802 get_src(ctx, instr->src[1]),
1803 get_src(ctx, instr->src[2]),
1804 get_src(ctx, instr->src[3]));
1805 }
1806 if (instr->intrinsic == nir_intrinsic_ssbo_atomic_comp_swap) {
1807 params[arg_count++] = ac_llvm_extract_elem(&ctx->ac, get_src(ctx, instr->src[3]), 0);
1808 }
1809 params[arg_count++] = ac_llvm_extract_elem(&ctx->ac, get_src(ctx, instr->src[2]), 0);
1810 params[arg_count++] = descriptor;
1811
1812 if (LLVM_VERSION_MAJOR >= 9) {
1813 /* XXX: The new raw/struct atomic intrinsics are buggy with
1814 * LLVM 8, see r358579.
1815 */
1816 params[arg_count++] = get_src(ctx, instr->src[1]); /* voffset */
1817 params[arg_count++] = ctx->ac.i32_0; /* soffset */
1818 params[arg_count++] = ctx->ac.i32_0; /* slc */
1819
1820 ac_build_type_name_for_intr(return_type, type, sizeof(type));
1821 snprintf(name, sizeof(name),
1822 "llvm.amdgcn.raw.buffer.atomic.%s.%s", op, type);
1823 } else {
1824 params[arg_count++] = ctx->ac.i32_0; /* vindex */
1825 params[arg_count++] = get_src(ctx, instr->src[1]); /* voffset */
1826 params[arg_count++] = ctx->ac.i1false; /* slc */
1827
1828 assert(return_type == ctx->ac.i32);
1829 snprintf(name, sizeof(name),
1830 "llvm.amdgcn.buffer.atomic.%s", op);
1831 }
1832
1833 return ac_build_intrinsic(&ctx->ac, name, return_type, params,
1834 arg_count, 0);
1835 }
1836
1837 static LLVMValueRef visit_load_buffer(struct ac_nir_context *ctx,
1838 const nir_intrinsic_instr *instr)
1839 {
1840 int elem_size_bytes = instr->dest.ssa.bit_size / 8;
1841 int num_components = instr->num_components;
1842 enum gl_access_qualifier access = nir_intrinsic_access(instr);
1843 unsigned cache_policy = get_cache_policy(ctx, access, false, false);
1844
1845 LLVMValueRef offset = get_src(ctx, instr->src[1]);
1846 LLVMValueRef rsrc = ctx->abi->load_ssbo(ctx->abi,
1847 get_src(ctx, instr->src[0]), false);
1848 LLVMValueRef vindex = ctx->ac.i32_0;
1849
1850 LLVMTypeRef def_type = get_def_type(ctx, &instr->dest.ssa);
1851 LLVMTypeRef def_elem_type = num_components > 1 ? LLVMGetElementType(def_type) : def_type;
1852
1853 LLVMValueRef results[4];
1854 for (int i = 0; i < num_components;) {
1855 int num_elems = num_components - i;
1856 if (elem_size_bytes < 4 && nir_intrinsic_align(instr) % 4 != 0)
1857 num_elems = 1;
1858 if (num_elems * elem_size_bytes > 16)
1859 num_elems = 16 / elem_size_bytes;
1860 int load_bytes = num_elems * elem_size_bytes;
1861
1862 LLVMValueRef immoffset = LLVMConstInt(ctx->ac.i32, i * elem_size_bytes, false);
1863
1864 LLVMValueRef ret;
1865
1866 if (load_bytes == 1) {
1867 ret = ac_build_tbuffer_load_byte(&ctx->ac,
1868 rsrc,
1869 offset,
1870 ctx->ac.i32_0,
1871 immoffset,
1872 cache_policy);
1873 } else if (load_bytes == 2) {
1874 ret = ac_build_tbuffer_load_short(&ctx->ac,
1875 rsrc,
1876 offset,
1877 ctx->ac.i32_0,
1878 immoffset,
1879 cache_policy);
1880 } else {
1881 int num_channels = util_next_power_of_two(load_bytes) / 4;
1882 bool can_speculate = access & ACCESS_CAN_REORDER;
1883
1884 ret = ac_build_buffer_load(&ctx->ac, rsrc, num_channels,
1885 vindex, offset, immoffset, 0,
1886 cache_policy, can_speculate, false);
1887 }
1888
1889 LLVMTypeRef byte_vec = LLVMVectorType(ctx->ac.i8, ac_get_type_size(LLVMTypeOf(ret)));
1890 ret = LLVMBuildBitCast(ctx->ac.builder, ret, byte_vec, "");
1891 ret = ac_trim_vector(&ctx->ac, ret, load_bytes);
1892
1893 LLVMTypeRef ret_type = LLVMVectorType(def_elem_type, num_elems);
1894 ret = LLVMBuildBitCast(ctx->ac.builder, ret, ret_type, "");
1895
1896 for (unsigned j = 0; j < num_elems; j++) {
1897 results[i + j] = LLVMBuildExtractElement(ctx->ac.builder, ret, LLVMConstInt(ctx->ac.i32, j, false), "");
1898 }
1899 i += num_elems;
1900 }
1901
1902 return ac_build_gather_values(&ctx->ac, results, num_components);
1903 }
1904
1905 static LLVMValueRef visit_load_ubo_buffer(struct ac_nir_context *ctx,
1906 const nir_intrinsic_instr *instr)
1907 {
1908 LLVMValueRef ret;
1909 LLVMValueRef rsrc = get_src(ctx, instr->src[0]);
1910 LLVMValueRef offset = get_src(ctx, instr->src[1]);
1911 int num_components = instr->num_components;
1912
1913 if (ctx->abi->load_ubo)
1914 rsrc = ctx->abi->load_ubo(ctx->abi, rsrc);
1915
1916 if (instr->dest.ssa.bit_size == 64)
1917 num_components *= 2;
1918
1919 if (instr->dest.ssa.bit_size == 16 || instr->dest.ssa.bit_size == 8) {
1920 unsigned load_bytes = instr->dest.ssa.bit_size / 8;
1921 LLVMValueRef results[num_components];
1922 for (unsigned i = 0; i < num_components; ++i) {
1923 LLVMValueRef immoffset = LLVMConstInt(ctx->ac.i32,
1924 load_bytes * i, 0);
1925
1926 if (load_bytes == 1) {
1927 results[i] = ac_build_tbuffer_load_byte(&ctx->ac,
1928 rsrc,
1929 offset,
1930 ctx->ac.i32_0,
1931 immoffset,
1932 0);
1933 } else {
1934 assert(load_bytes == 2);
1935 results[i] = ac_build_tbuffer_load_short(&ctx->ac,
1936 rsrc,
1937 offset,
1938 ctx->ac.i32_0,
1939 immoffset,
1940 0);
1941 }
1942 }
1943 ret = ac_build_gather_values(&ctx->ac, results, num_components);
1944 } else {
1945 ret = ac_build_buffer_load(&ctx->ac, rsrc, num_components, NULL, offset,
1946 NULL, 0, 0, true, true);
1947
1948 ret = ac_trim_vector(&ctx->ac, ret, num_components);
1949 }
1950
1951 return LLVMBuildBitCast(ctx->ac.builder, ret,
1952 get_def_type(ctx, &instr->dest.ssa), "");
1953 }
1954
1955 static void
1956 get_deref_offset(struct ac_nir_context *ctx, nir_deref_instr *instr,
1957 bool vs_in, unsigned *vertex_index_out,
1958 LLVMValueRef *vertex_index_ref,
1959 unsigned *const_out, LLVMValueRef *indir_out)
1960 {
1961 nir_variable *var = nir_deref_instr_get_variable(instr);
1962 nir_deref_path path;
1963 unsigned idx_lvl = 1;
1964
1965 nir_deref_path_init(&path, instr, NULL);
1966
1967 if (vertex_index_out != NULL || vertex_index_ref != NULL) {
1968 if (vertex_index_ref) {
1969 *vertex_index_ref = get_src(ctx, path.path[idx_lvl]->arr.index);
1970 if (vertex_index_out)
1971 *vertex_index_out = 0;
1972 } else {
1973 *vertex_index_out = nir_src_as_uint(path.path[idx_lvl]->arr.index);
1974 }
1975 ++idx_lvl;
1976 }
1977
1978 uint32_t const_offset = 0;
1979 LLVMValueRef offset = NULL;
1980
1981 if (var->data.compact) {
1982 assert(instr->deref_type == nir_deref_type_array);
1983 const_offset = nir_src_as_uint(instr->arr.index);
1984 goto out;
1985 }
1986
1987 for (; path.path[idx_lvl]; ++idx_lvl) {
1988 const struct glsl_type *parent_type = path.path[idx_lvl - 1]->type;
1989 if (path.path[idx_lvl]->deref_type == nir_deref_type_struct) {
1990 unsigned index = path.path[idx_lvl]->strct.index;
1991
1992 for (unsigned i = 0; i < index; i++) {
1993 const struct glsl_type *ft = glsl_get_struct_field(parent_type, i);
1994 const_offset += glsl_count_attribute_slots(ft, vs_in);
1995 }
1996 } else if(path.path[idx_lvl]->deref_type == nir_deref_type_array) {
1997 unsigned size = glsl_count_attribute_slots(path.path[idx_lvl]->type, vs_in);
1998 if (nir_src_is_const(path.path[idx_lvl]->arr.index)) {
1999 const_offset += size *
2000 nir_src_as_uint(path.path[idx_lvl]->arr.index);
2001 } else {
2002 LLVMValueRef array_off = LLVMBuildMul(ctx->ac.builder, LLVMConstInt(ctx->ac.i32, size, 0),
2003 get_src(ctx, path.path[idx_lvl]->arr.index), "");
2004 if (offset)
2005 offset = LLVMBuildAdd(ctx->ac.builder, offset, array_off, "");
2006 else
2007 offset = array_off;
2008 }
2009 } else
2010 unreachable("Uhandled deref type in get_deref_instr_offset");
2011 }
2012
2013 out:
2014 nir_deref_path_finish(&path);
2015
2016 if (const_offset && offset)
2017 offset = LLVMBuildAdd(ctx->ac.builder, offset,
2018 LLVMConstInt(ctx->ac.i32, const_offset, 0),
2019 "");
2020
2021 *const_out = const_offset;
2022 *indir_out = offset;
2023 }
2024
2025 static LLVMValueRef load_tess_varyings(struct ac_nir_context *ctx,
2026 nir_intrinsic_instr *instr,
2027 bool load_inputs)
2028 {
2029 LLVMValueRef result;
2030 LLVMValueRef vertex_index = NULL;
2031 LLVMValueRef indir_index = NULL;
2032 unsigned const_index = 0;
2033
2034 nir_variable *var = nir_deref_instr_get_variable(nir_instr_as_deref(instr->src[0].ssa->parent_instr));
2035
2036 unsigned location = var->data.location;
2037 unsigned driver_location = var->data.driver_location;
2038 const bool is_patch = var->data.patch;
2039 const bool is_compact = var->data.compact;
2040
2041 get_deref_offset(ctx, nir_instr_as_deref(instr->src[0].ssa->parent_instr),
2042 false, NULL, is_patch ? NULL : &vertex_index,
2043 &const_index, &indir_index);
2044
2045 LLVMTypeRef dest_type = get_def_type(ctx, &instr->dest.ssa);
2046
2047 LLVMTypeRef src_component_type;
2048 if (LLVMGetTypeKind(dest_type) == LLVMVectorTypeKind)
2049 src_component_type = LLVMGetElementType(dest_type);
2050 else
2051 src_component_type = dest_type;
2052
2053 result = ctx->abi->load_tess_varyings(ctx->abi, src_component_type,
2054 vertex_index, indir_index,
2055 const_index, location, driver_location,
2056 var->data.location_frac,
2057 instr->num_components,
2058 is_patch, is_compact, load_inputs);
2059 if (instr->dest.ssa.bit_size == 16) {
2060 result = ac_to_integer(&ctx->ac, result);
2061 result = LLVMBuildTrunc(ctx->ac.builder, result, dest_type, "");
2062 }
2063 return LLVMBuildBitCast(ctx->ac.builder, result, dest_type, "");
2064 }
2065
2066 static unsigned
2067 type_scalar_size_bytes(const struct glsl_type *type)
2068 {
2069 assert(glsl_type_is_vector_or_scalar(type) ||
2070 glsl_type_is_matrix(type));
2071 return glsl_type_is_boolean(type) ? 4 : glsl_get_bit_size(type) / 8;
2072 }
2073
2074 static LLVMValueRef visit_load_var(struct ac_nir_context *ctx,
2075 nir_intrinsic_instr *instr)
2076 {
2077 nir_deref_instr *deref = nir_instr_as_deref(instr->src[0].ssa->parent_instr);
2078 nir_variable *var = nir_deref_instr_get_variable(deref);
2079
2080 LLVMValueRef values[8];
2081 int idx = 0;
2082 int ve = instr->dest.ssa.num_components;
2083 unsigned comp = 0;
2084 LLVMValueRef indir_index;
2085 LLVMValueRef ret;
2086 unsigned const_index;
2087 unsigned stride = 4;
2088 int mode = deref->mode;
2089
2090 if (var) {
2091 bool vs_in = ctx->stage == MESA_SHADER_VERTEX &&
2092 var->data.mode == nir_var_shader_in;
2093 idx = var->data.driver_location;
2094 comp = var->data.location_frac;
2095 mode = var->data.mode;
2096
2097 get_deref_offset(ctx, deref, vs_in, NULL, NULL,
2098 &const_index, &indir_index);
2099
2100 if (var->data.compact) {
2101 stride = 1;
2102 const_index += comp;
2103 comp = 0;
2104 }
2105 }
2106
2107 if (instr->dest.ssa.bit_size == 64 &&
2108 (deref->mode == nir_var_shader_in ||
2109 deref->mode == nir_var_shader_out ||
2110 deref->mode == nir_var_function_temp))
2111 ve *= 2;
2112
2113 switch (mode) {
2114 case nir_var_shader_in:
2115 if (ctx->stage == MESA_SHADER_TESS_CTRL ||
2116 ctx->stage == MESA_SHADER_TESS_EVAL) {
2117 return load_tess_varyings(ctx, instr, true);
2118 }
2119
2120 if (ctx->stage == MESA_SHADER_GEOMETRY) {
2121 LLVMTypeRef type = LLVMIntTypeInContext(ctx->ac.context, instr->dest.ssa.bit_size);
2122 LLVMValueRef indir_index;
2123 unsigned const_index, vertex_index;
2124 get_deref_offset(ctx, deref, false, &vertex_index, NULL,
2125 &const_index, &indir_index);
2126 assert(indir_index == NULL);
2127
2128 return ctx->abi->load_inputs(ctx->abi, var->data.location,
2129 var->data.driver_location,
2130 var->data.location_frac,
2131 instr->num_components, vertex_index, const_index, type);
2132 }
2133
2134 for (unsigned chan = comp; chan < ve + comp; chan++) {
2135 if (indir_index) {
2136 unsigned count = glsl_count_attribute_slots(
2137 var->type,
2138 ctx->stage == MESA_SHADER_VERTEX);
2139 count -= chan / 4;
2140 LLVMValueRef tmp_vec = ac_build_gather_values_extended(
2141 &ctx->ac, ctx->abi->inputs + idx + chan, count,
2142 stride, false, true);
2143
2144 values[chan] = LLVMBuildExtractElement(ctx->ac.builder,
2145 tmp_vec,
2146 indir_index, "");
2147 } else
2148 values[chan] = ctx->abi->inputs[idx + chan + const_index * stride];
2149 }
2150 break;
2151 case nir_var_function_temp:
2152 for (unsigned chan = 0; chan < ve; chan++) {
2153 if (indir_index) {
2154 unsigned count = glsl_count_attribute_slots(
2155 var->type, false);
2156 count -= chan / 4;
2157 LLVMValueRef tmp_vec = ac_build_gather_values_extended(
2158 &ctx->ac, ctx->locals + idx + chan, count,
2159 stride, true, true);
2160
2161 values[chan] = LLVMBuildExtractElement(ctx->ac.builder,
2162 tmp_vec,
2163 indir_index, "");
2164 } else {
2165 values[chan] = LLVMBuildLoad(ctx->ac.builder, ctx->locals[idx + chan + const_index * stride], "");
2166 }
2167 }
2168 break;
2169 case nir_var_mem_shared: {
2170 LLVMValueRef address = get_src(ctx, instr->src[0]);
2171 LLVMValueRef val = LLVMBuildLoad(ctx->ac.builder, address, "");
2172 return LLVMBuildBitCast(ctx->ac.builder, val,
2173 get_def_type(ctx, &instr->dest.ssa),
2174 "");
2175 }
2176 case nir_var_shader_out:
2177 if (ctx->stage == MESA_SHADER_TESS_CTRL) {
2178 return load_tess_varyings(ctx, instr, false);
2179 }
2180
2181 if (ctx->stage == MESA_SHADER_FRAGMENT &&
2182 var->data.fb_fetch_output &&
2183 ctx->abi->emit_fbfetch)
2184 return ctx->abi->emit_fbfetch(ctx->abi);
2185
2186 for (unsigned chan = comp; chan < ve + comp; chan++) {
2187 if (indir_index) {
2188 unsigned count = glsl_count_attribute_slots(
2189 var->type, false);
2190 count -= chan / 4;
2191 LLVMValueRef tmp_vec = ac_build_gather_values_extended(
2192 &ctx->ac, ctx->abi->outputs + idx + chan, count,
2193 stride, true, true);
2194
2195 values[chan] = LLVMBuildExtractElement(ctx->ac.builder,
2196 tmp_vec,
2197 indir_index, "");
2198 } else {
2199 values[chan] = LLVMBuildLoad(ctx->ac.builder,
2200 ctx->abi->outputs[idx + chan + const_index * stride],
2201 "");
2202 }
2203 }
2204 break;
2205 case nir_var_mem_global: {
2206 LLVMValueRef address = get_src(ctx, instr->src[0]);
2207 unsigned explicit_stride = glsl_get_explicit_stride(deref->type);
2208 unsigned natural_stride = type_scalar_size_bytes(deref->type);
2209 unsigned stride = explicit_stride ? explicit_stride : natural_stride;
2210
2211 LLVMTypeRef result_type = get_def_type(ctx, &instr->dest.ssa);
2212 if (stride != natural_stride) {
2213 LLVMTypeRef ptr_type = LLVMPointerType(LLVMGetElementType(result_type),
2214 LLVMGetPointerAddressSpace(LLVMTypeOf(address)));
2215 address = LLVMBuildBitCast(ctx->ac.builder, address, ptr_type , "");
2216
2217 for (unsigned i = 0; i < instr->dest.ssa.num_components; ++i) {
2218 LLVMValueRef offset = LLVMConstInt(ctx->ac.i32, i * stride / natural_stride, 0);
2219 values[i] = LLVMBuildLoad(ctx->ac.builder,
2220 ac_build_gep_ptr(&ctx->ac, address, offset), "");
2221 }
2222 return ac_build_gather_values(&ctx->ac, values, instr->dest.ssa.num_components);
2223 } else {
2224 LLVMTypeRef ptr_type = LLVMPointerType(result_type,
2225 LLVMGetPointerAddressSpace(LLVMTypeOf(address)));
2226 address = LLVMBuildBitCast(ctx->ac.builder, address, ptr_type , "");
2227 LLVMValueRef val = LLVMBuildLoad(ctx->ac.builder, address, "");
2228 return val;
2229 }
2230 }
2231 default:
2232 unreachable("unhandle variable mode");
2233 }
2234 ret = ac_build_varying_gather_values(&ctx->ac, values, ve, comp);
2235 return LLVMBuildBitCast(ctx->ac.builder, ret, get_def_type(ctx, &instr->dest.ssa), "");
2236 }
2237
2238 static void
2239 visit_store_var(struct ac_nir_context *ctx,
2240 nir_intrinsic_instr *instr)
2241 {
2242 nir_deref_instr *deref = nir_instr_as_deref(instr->src[0].ssa->parent_instr);
2243 nir_variable *var = nir_deref_instr_get_variable(deref);
2244
2245 LLVMValueRef temp_ptr, value;
2246 int idx = 0;
2247 unsigned comp = 0;
2248 LLVMValueRef src = ac_to_float(&ctx->ac, get_src(ctx, instr->src[1]));
2249 int writemask = instr->const_index[0];
2250 LLVMValueRef indir_index;
2251 unsigned const_index;
2252
2253 if (var) {
2254 get_deref_offset(ctx, deref, false,
2255 NULL, NULL, &const_index, &indir_index);
2256 idx = var->data.driver_location;
2257 comp = var->data.location_frac;
2258
2259 if (var->data.compact) {
2260 const_index += comp;
2261 comp = 0;
2262 }
2263 }
2264
2265 if (ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src)) == 64 &&
2266 (deref->mode == nir_var_shader_out ||
2267 deref->mode == nir_var_function_temp)) {
2268
2269 src = LLVMBuildBitCast(ctx->ac.builder, src,
2270 LLVMVectorType(ctx->ac.f32, ac_get_llvm_num_components(src) * 2),
2271 "");
2272
2273 writemask = widen_mask(writemask, 2);
2274 }
2275
2276 writemask = writemask << comp;
2277
2278 switch (deref->mode) {
2279 case nir_var_shader_out:
2280
2281 if (ctx->stage == MESA_SHADER_TESS_CTRL) {
2282 LLVMValueRef vertex_index = NULL;
2283 LLVMValueRef indir_index = NULL;
2284 unsigned const_index = 0;
2285 const bool is_patch = var->data.patch;
2286
2287 get_deref_offset(ctx, deref, false, NULL,
2288 is_patch ? NULL : &vertex_index,
2289 &const_index, &indir_index);
2290
2291 ctx->abi->store_tcs_outputs(ctx->abi, var,
2292 vertex_index, indir_index,
2293 const_index, src, writemask);
2294 return;
2295 }
2296
2297 for (unsigned chan = 0; chan < 8; chan++) {
2298 int stride = 4;
2299 if (!(writemask & (1 << chan)))
2300 continue;
2301
2302 value = ac_llvm_extract_elem(&ctx->ac, src, chan - comp);
2303
2304 if (var->data.compact)
2305 stride = 1;
2306 if (indir_index) {
2307 unsigned count = glsl_count_attribute_slots(
2308 var->type, false);
2309 count -= chan / 4;
2310 LLVMValueRef tmp_vec = ac_build_gather_values_extended(
2311 &ctx->ac, ctx->abi->outputs + idx + chan, count,
2312 stride, true, true);
2313
2314 tmp_vec = LLVMBuildInsertElement(ctx->ac.builder, tmp_vec,
2315 value, indir_index, "");
2316 build_store_values_extended(&ctx->ac, ctx->abi->outputs + idx + chan,
2317 count, stride, tmp_vec);
2318
2319 } else {
2320 temp_ptr = ctx->abi->outputs[idx + chan + const_index * stride];
2321
2322 LLVMBuildStore(ctx->ac.builder, value, temp_ptr);
2323 }
2324 }
2325 break;
2326 case nir_var_function_temp:
2327 for (unsigned chan = 0; chan < 8; chan++) {
2328 if (!(writemask & (1 << chan)))
2329 continue;
2330
2331 value = ac_llvm_extract_elem(&ctx->ac, src, chan);
2332 if (indir_index) {
2333 unsigned count = glsl_count_attribute_slots(
2334 var->type, false);
2335 count -= chan / 4;
2336 LLVMValueRef tmp_vec = ac_build_gather_values_extended(
2337 &ctx->ac, ctx->locals + idx + chan, count,
2338 4, true, true);
2339
2340 tmp_vec = LLVMBuildInsertElement(ctx->ac.builder, tmp_vec,
2341 value, indir_index, "");
2342 build_store_values_extended(&ctx->ac, ctx->locals + idx + chan,
2343 count, 4, tmp_vec);
2344 } else {
2345 temp_ptr = ctx->locals[idx + chan + const_index * 4];
2346
2347 LLVMBuildStore(ctx->ac.builder, value, temp_ptr);
2348 }
2349 }
2350 break;
2351
2352 case nir_var_mem_global:
2353 case nir_var_mem_shared: {
2354 int writemask = instr->const_index[0];
2355 LLVMValueRef address = get_src(ctx, instr->src[0]);
2356 LLVMValueRef val = get_src(ctx, instr->src[1]);
2357
2358 unsigned explicit_stride = glsl_get_explicit_stride(deref->type);
2359 unsigned natural_stride = type_scalar_size_bytes(deref->type);
2360 unsigned stride = explicit_stride ? explicit_stride : natural_stride;
2361
2362 LLVMTypeRef ptr_type = LLVMPointerType(LLVMTypeOf(val),
2363 LLVMGetPointerAddressSpace(LLVMTypeOf(address)));
2364 address = LLVMBuildBitCast(ctx->ac.builder, address, ptr_type , "");
2365
2366 if (writemask == (1u << ac_get_llvm_num_components(val)) - 1 &&
2367 stride == natural_stride) {
2368 LLVMTypeRef ptr_type = LLVMPointerType(LLVMTypeOf(val),
2369 LLVMGetPointerAddressSpace(LLVMTypeOf(address)));
2370 address = LLVMBuildBitCast(ctx->ac.builder, address, ptr_type , "");
2371
2372 val = LLVMBuildBitCast(ctx->ac.builder, val,
2373 LLVMGetElementType(LLVMTypeOf(address)), "");
2374 LLVMBuildStore(ctx->ac.builder, val, address);
2375 } else {
2376 LLVMTypeRef ptr_type = LLVMPointerType(LLVMGetElementType(LLVMTypeOf(val)),
2377 LLVMGetPointerAddressSpace(LLVMTypeOf(address)));
2378 address = LLVMBuildBitCast(ctx->ac.builder, address, ptr_type , "");
2379 for (unsigned chan = 0; chan < 4; chan++) {
2380 if (!(writemask & (1 << chan)))
2381 continue;
2382
2383 LLVMValueRef offset = LLVMConstInt(ctx->ac.i32, chan * stride / natural_stride, 0);
2384
2385 LLVMValueRef ptr = ac_build_gep_ptr(&ctx->ac, address, offset);
2386 LLVMValueRef src = ac_llvm_extract_elem(&ctx->ac, val,
2387 chan);
2388 src = LLVMBuildBitCast(ctx->ac.builder, src,
2389 LLVMGetElementType(LLVMTypeOf(ptr)), "");
2390 LLVMBuildStore(ctx->ac.builder, src, ptr);
2391 }
2392 }
2393 break;
2394 }
2395 default:
2396 abort();
2397 break;
2398 }
2399 }
2400
2401 static int image_type_to_components_count(enum glsl_sampler_dim dim, bool array)
2402 {
2403 switch (dim) {
2404 case GLSL_SAMPLER_DIM_BUF:
2405 return 1;
2406 case GLSL_SAMPLER_DIM_1D:
2407 return array ? 2 : 1;
2408 case GLSL_SAMPLER_DIM_2D:
2409 return array ? 3 : 2;
2410 case GLSL_SAMPLER_DIM_MS:
2411 return array ? 4 : 3;
2412 case GLSL_SAMPLER_DIM_3D:
2413 case GLSL_SAMPLER_DIM_CUBE:
2414 return 3;
2415 case GLSL_SAMPLER_DIM_RECT:
2416 case GLSL_SAMPLER_DIM_SUBPASS:
2417 return 2;
2418 case GLSL_SAMPLER_DIM_SUBPASS_MS:
2419 return 3;
2420 default:
2421 break;
2422 }
2423 return 0;
2424 }
2425
2426 static LLVMValueRef adjust_sample_index_using_fmask(struct ac_llvm_context *ctx,
2427 LLVMValueRef coord_x, LLVMValueRef coord_y,
2428 LLVMValueRef coord_z,
2429 LLVMValueRef sample_index,
2430 LLVMValueRef fmask_desc_ptr)
2431 {
2432 unsigned sample_chan = coord_z ? 3 : 2;
2433 LLVMValueRef addr[4] = {coord_x, coord_y, coord_z};
2434 addr[sample_chan] = sample_index;
2435
2436 ac_apply_fmask_to_sample(ctx, fmask_desc_ptr, addr, coord_z != NULL);
2437 return addr[sample_chan];
2438 }
2439
2440 static nir_deref_instr *get_image_deref(const nir_intrinsic_instr *instr)
2441 {
2442 assert(instr->src[0].is_ssa);
2443 return nir_instr_as_deref(instr->src[0].ssa->parent_instr);
2444 }
2445
2446 static LLVMValueRef get_image_descriptor(struct ac_nir_context *ctx,
2447 const nir_intrinsic_instr *instr,
2448 enum ac_descriptor_type desc_type,
2449 bool write)
2450 {
2451 nir_deref_instr *deref_instr =
2452 instr->src[0].ssa->parent_instr->type == nir_instr_type_deref ?
2453 nir_instr_as_deref(instr->src[0].ssa->parent_instr) : NULL;
2454
2455 return get_sampler_desc(ctx, deref_instr, desc_type, &instr->instr, true, write);
2456 }
2457
2458 static void get_image_coords(struct ac_nir_context *ctx,
2459 const nir_intrinsic_instr *instr,
2460 struct ac_image_args *args,
2461 enum glsl_sampler_dim dim,
2462 bool is_array)
2463 {
2464 LLVMValueRef src0 = get_src(ctx, instr->src[1]);
2465 LLVMValueRef masks[] = {
2466 LLVMConstInt(ctx->ac.i32, 0, false), LLVMConstInt(ctx->ac.i32, 1, false),
2467 LLVMConstInt(ctx->ac.i32, 2, false), LLVMConstInt(ctx->ac.i32, 3, false),
2468 };
2469 LLVMValueRef sample_index = ac_llvm_extract_elem(&ctx->ac, get_src(ctx, instr->src[2]), 0);
2470
2471 int count;
2472 ASSERTED bool add_frag_pos = (dim == GLSL_SAMPLER_DIM_SUBPASS ||
2473 dim == GLSL_SAMPLER_DIM_SUBPASS_MS);
2474 bool is_ms = (dim == GLSL_SAMPLER_DIM_MS ||
2475 dim == GLSL_SAMPLER_DIM_SUBPASS_MS);
2476 bool gfx9_1d = ctx->ac.chip_class == GFX9 && dim == GLSL_SAMPLER_DIM_1D;
2477 assert(!add_frag_pos && "Input attachments should be lowered by this point.");
2478 count = image_type_to_components_count(dim, is_array);
2479
2480 if (is_ms && (instr->intrinsic == nir_intrinsic_image_deref_load ||
2481 instr->intrinsic == nir_intrinsic_bindless_image_load)) {
2482 LLVMValueRef fmask_load_address[3];
2483
2484 fmask_load_address[0] = LLVMBuildExtractElement(ctx->ac.builder, src0, masks[0], "");
2485 fmask_load_address[1] = LLVMBuildExtractElement(ctx->ac.builder, src0, masks[1], "");
2486 if (is_array)
2487 fmask_load_address[2] = LLVMBuildExtractElement(ctx->ac.builder, src0, masks[2], "");
2488 else
2489 fmask_load_address[2] = NULL;
2490
2491 sample_index = adjust_sample_index_using_fmask(&ctx->ac,
2492 fmask_load_address[0],
2493 fmask_load_address[1],
2494 fmask_load_address[2],
2495 sample_index,
2496 get_sampler_desc(ctx, nir_instr_as_deref(instr->src[0].ssa->parent_instr),
2497 AC_DESC_FMASK, &instr->instr, true, false));
2498 }
2499 if (count == 1 && !gfx9_1d) {
2500 if (instr->src[1].ssa->num_components)
2501 args->coords[0] = LLVMBuildExtractElement(ctx->ac.builder, src0, masks[0], "");
2502 else
2503 args->coords[0] = src0;
2504 } else {
2505 int chan;
2506 if (is_ms)
2507 count--;
2508 for (chan = 0; chan < count; ++chan) {
2509 args->coords[chan] = ac_llvm_extract_elem(&ctx->ac, src0, chan);
2510 }
2511
2512 if (gfx9_1d) {
2513 if (is_array) {
2514 args->coords[2] = args->coords[1];
2515 args->coords[1] = ctx->ac.i32_0;
2516 } else
2517 args->coords[1] = ctx->ac.i32_0;
2518 count++;
2519 }
2520 if (ctx->ac.chip_class == GFX9 &&
2521 dim == GLSL_SAMPLER_DIM_2D &&
2522 !is_array) {
2523 /* The hw can't bind a slice of a 3D image as a 2D
2524 * image, because it ignores BASE_ARRAY if the target
2525 * is 3D. The workaround is to read BASE_ARRAY and set
2526 * it as the 3rd address operand for all 2D images.
2527 */
2528 LLVMValueRef first_layer, const5, mask;
2529
2530 const5 = LLVMConstInt(ctx->ac.i32, 5, 0);
2531 mask = LLVMConstInt(ctx->ac.i32, S_008F24_BASE_ARRAY(~0), 0);
2532 first_layer = LLVMBuildExtractElement(ctx->ac.builder, args->resource, const5, "");
2533 first_layer = LLVMBuildAnd(ctx->ac.builder, first_layer, mask, "");
2534
2535 args->coords[count] = first_layer;
2536 count++;
2537 }
2538
2539
2540 if (is_ms) {
2541 args->coords[count] = sample_index;
2542 count++;
2543 }
2544 }
2545 }
2546
2547 static LLVMValueRef get_image_buffer_descriptor(struct ac_nir_context *ctx,
2548 const nir_intrinsic_instr *instr,
2549 bool write, bool atomic)
2550 {
2551 LLVMValueRef rsrc = get_image_descriptor(ctx, instr, AC_DESC_BUFFER, write);
2552 if (ctx->ac.chip_class == GFX9 && LLVM_VERSION_MAJOR < 9 && atomic) {
2553 LLVMValueRef elem_count = LLVMBuildExtractElement(ctx->ac.builder, rsrc, LLVMConstInt(ctx->ac.i32, 2, 0), "");
2554 LLVMValueRef stride = LLVMBuildExtractElement(ctx->ac.builder, rsrc, LLVMConstInt(ctx->ac.i32, 1, 0), "");
2555 stride = LLVMBuildLShr(ctx->ac.builder, stride, LLVMConstInt(ctx->ac.i32, 16, 0), "");
2556
2557 LLVMValueRef new_elem_count = LLVMBuildSelect(ctx->ac.builder,
2558 LLVMBuildICmp(ctx->ac.builder, LLVMIntUGT, elem_count, stride, ""),
2559 elem_count, stride, "");
2560
2561 rsrc = LLVMBuildInsertElement(ctx->ac.builder, rsrc, new_elem_count,
2562 LLVMConstInt(ctx->ac.i32, 2, 0), "");
2563 }
2564 return rsrc;
2565 }
2566
2567 static LLVMValueRef visit_image_load(struct ac_nir_context *ctx,
2568 const nir_intrinsic_instr *instr,
2569 bool bindless)
2570 {
2571 LLVMValueRef res;
2572
2573 enum glsl_sampler_dim dim;
2574 enum gl_access_qualifier access;
2575 bool is_array;
2576 if (bindless) {
2577 dim = nir_intrinsic_image_dim(instr);
2578 access = nir_intrinsic_access(instr);
2579 is_array = nir_intrinsic_image_array(instr);
2580 } else {
2581 const nir_deref_instr *image_deref = get_image_deref(instr);
2582 const struct glsl_type *type = image_deref->type;
2583 const nir_variable *var = nir_deref_instr_get_variable(image_deref);
2584 dim = glsl_get_sampler_dim(type);
2585 access = var->data.image.access;
2586 is_array = glsl_sampler_type_is_array(type);
2587 }
2588
2589 struct ac_image_args args = {};
2590
2591 args.cache_policy = get_cache_policy(ctx, access, false, false);
2592
2593 if (dim == GLSL_SAMPLER_DIM_BUF) {
2594 unsigned mask = nir_ssa_def_components_read(&instr->dest.ssa);
2595 unsigned num_channels = util_last_bit(mask);
2596 LLVMValueRef rsrc, vindex;
2597
2598 rsrc = get_image_buffer_descriptor(ctx, instr, false, false);
2599 vindex = LLVMBuildExtractElement(ctx->ac.builder, get_src(ctx, instr->src[1]),
2600 ctx->ac.i32_0, "");
2601
2602 bool can_speculate = access & ACCESS_CAN_REORDER;
2603 res = ac_build_buffer_load_format(&ctx->ac, rsrc, vindex,
2604 ctx->ac.i32_0, num_channels,
2605 args.cache_policy,
2606 can_speculate);
2607 res = ac_build_expand_to_vec4(&ctx->ac, res, num_channels);
2608
2609 res = ac_trim_vector(&ctx->ac, res, instr->dest.ssa.num_components);
2610 res = ac_to_integer(&ctx->ac, res);
2611 } else {
2612 args.opcode = ac_image_load;
2613 args.resource = get_image_descriptor(ctx, instr, AC_DESC_IMAGE, false);
2614 get_image_coords(ctx, instr, &args, dim, is_array);
2615 args.dim = get_ac_image_dim(&ctx->ac, dim, is_array);
2616 args.dmask = 15;
2617 args.attributes = AC_FUNC_ATTR_READONLY;
2618
2619 res = ac_build_image_opcode(&ctx->ac, &args);
2620 }
2621 return res;
2622 }
2623
2624 static void visit_image_store(struct ac_nir_context *ctx,
2625 nir_intrinsic_instr *instr,
2626 bool bindless)
2627 {
2628
2629
2630 enum glsl_sampler_dim dim;
2631 enum gl_access_qualifier access;
2632 bool is_array;
2633 if (bindless) {
2634 dim = nir_intrinsic_image_dim(instr);
2635 access = nir_intrinsic_access(instr);
2636 is_array = nir_intrinsic_image_array(instr);
2637 } else {
2638 const nir_deref_instr *image_deref = get_image_deref(instr);
2639 const struct glsl_type *type = image_deref->type;
2640 const nir_variable *var = nir_deref_instr_get_variable(image_deref);
2641 dim = glsl_get_sampler_dim(type);
2642 access = var->data.image.access;
2643 is_array = glsl_sampler_type_is_array(type);
2644 }
2645
2646 bool writeonly_memory = access & ACCESS_NON_READABLE;
2647 struct ac_image_args args = {};
2648
2649 args.cache_policy = get_cache_policy(ctx, access, true, writeonly_memory);
2650
2651 if (dim == GLSL_SAMPLER_DIM_BUF) {
2652 LLVMValueRef rsrc = get_image_buffer_descriptor(ctx, instr, true, false);
2653 LLVMValueRef src = ac_to_float(&ctx->ac, get_src(ctx, instr->src[3]));
2654 unsigned src_channels = ac_get_llvm_num_components(src);
2655 LLVMValueRef vindex;
2656
2657 if (src_channels == 3)
2658 src = ac_build_expand_to_vec4(&ctx->ac, src, 3);
2659
2660 vindex = LLVMBuildExtractElement(ctx->ac.builder,
2661 get_src(ctx, instr->src[1]),
2662 ctx->ac.i32_0, "");
2663
2664 ac_build_buffer_store_format(&ctx->ac, rsrc, src, vindex,
2665 ctx->ac.i32_0, src_channels,
2666 args.cache_policy);
2667 } else {
2668 args.opcode = ac_image_store;
2669 args.data[0] = ac_to_float(&ctx->ac, get_src(ctx, instr->src[3]));
2670 args.resource = get_image_descriptor(ctx, instr, AC_DESC_IMAGE, true);
2671 get_image_coords(ctx, instr, &args, dim, is_array);
2672 args.dim = get_ac_image_dim(&ctx->ac, dim, is_array);
2673 args.dmask = 15;
2674
2675 ac_build_image_opcode(&ctx->ac, &args);
2676 }
2677
2678 }
2679
2680 static LLVMValueRef visit_image_atomic(struct ac_nir_context *ctx,
2681 const nir_intrinsic_instr *instr,
2682 bool bindless)
2683 {
2684 LLVMValueRef params[7];
2685 int param_count = 0;
2686
2687 bool cmpswap = instr->intrinsic == nir_intrinsic_image_deref_atomic_comp_swap ||
2688 instr->intrinsic == nir_intrinsic_bindless_image_atomic_comp_swap;
2689 const char *atomic_name;
2690 char intrinsic_name[64];
2691 enum ac_atomic_op atomic_subop;
2692 ASSERTED int length;
2693
2694 enum glsl_sampler_dim dim;
2695 bool is_array;
2696 if (bindless) {
2697 if (instr->intrinsic == nir_intrinsic_bindless_image_atomic_imin ||
2698 instr->intrinsic == nir_intrinsic_bindless_image_atomic_umin ||
2699 instr->intrinsic == nir_intrinsic_bindless_image_atomic_imax ||
2700 instr->intrinsic == nir_intrinsic_bindless_image_atomic_umax) {
2701 const GLenum format = nir_intrinsic_format(instr);
2702 assert(format == GL_R32UI || format == GL_R32I);
2703 }
2704 dim = nir_intrinsic_image_dim(instr);
2705 is_array = nir_intrinsic_image_array(instr);
2706 } else {
2707 const struct glsl_type *type = get_image_deref(instr)->type;
2708 dim = glsl_get_sampler_dim(type);
2709 is_array = glsl_sampler_type_is_array(type);
2710 }
2711
2712 switch (instr->intrinsic) {
2713 case nir_intrinsic_bindless_image_atomic_add:
2714 case nir_intrinsic_image_deref_atomic_add:
2715 atomic_name = "add";
2716 atomic_subop = ac_atomic_add;
2717 break;
2718 case nir_intrinsic_bindless_image_atomic_imin:
2719 case nir_intrinsic_image_deref_atomic_imin:
2720 atomic_name = "smin";
2721 atomic_subop = ac_atomic_smin;
2722 break;
2723 case nir_intrinsic_bindless_image_atomic_umin:
2724 case nir_intrinsic_image_deref_atomic_umin:
2725 atomic_name = "umin";
2726 atomic_subop = ac_atomic_umin;
2727 break;
2728 case nir_intrinsic_bindless_image_atomic_imax:
2729 case nir_intrinsic_image_deref_atomic_imax:
2730 atomic_name = "smax";
2731 atomic_subop = ac_atomic_smax;
2732 break;
2733 case nir_intrinsic_bindless_image_atomic_umax:
2734 case nir_intrinsic_image_deref_atomic_umax:
2735 atomic_name = "umax";
2736 atomic_subop = ac_atomic_umax;
2737 break;
2738 case nir_intrinsic_bindless_image_atomic_and:
2739 case nir_intrinsic_image_deref_atomic_and:
2740 atomic_name = "and";
2741 atomic_subop = ac_atomic_and;
2742 break;
2743 case nir_intrinsic_bindless_image_atomic_or:
2744 case nir_intrinsic_image_deref_atomic_or:
2745 atomic_name = "or";
2746 atomic_subop = ac_atomic_or;
2747 break;
2748 case nir_intrinsic_bindless_image_atomic_xor:
2749 case nir_intrinsic_image_deref_atomic_xor:
2750 atomic_name = "xor";
2751 atomic_subop = ac_atomic_xor;
2752 break;
2753 case nir_intrinsic_bindless_image_atomic_exchange:
2754 case nir_intrinsic_image_deref_atomic_exchange:
2755 atomic_name = "swap";
2756 atomic_subop = ac_atomic_swap;
2757 break;
2758 case nir_intrinsic_bindless_image_atomic_comp_swap:
2759 case nir_intrinsic_image_deref_atomic_comp_swap:
2760 atomic_name = "cmpswap";
2761 atomic_subop = 0; /* not used */
2762 break;
2763 case nir_intrinsic_bindless_image_atomic_inc_wrap:
2764 case nir_intrinsic_image_deref_atomic_inc_wrap: {
2765 atomic_name = "inc";
2766 atomic_subop = ac_atomic_inc_wrap;
2767 /* ATOMIC_INC instruction does:
2768 * value = (value + 1) % (data + 1)
2769 * but we want:
2770 * value = (value + 1) % data
2771 * So replace 'data' by 'data - 1'.
2772 */
2773 ctx->ssa_defs[instr->src[3].ssa->index] =
2774 LLVMBuildSub(ctx->ac.builder,
2775 ctx->ssa_defs[instr->src[3].ssa->index],
2776 ctx->ac.i32_1, "");
2777 break;
2778 }
2779 case nir_intrinsic_bindless_image_atomic_dec_wrap:
2780 case nir_intrinsic_image_deref_atomic_dec_wrap:
2781 atomic_name = "dec";
2782 atomic_subop = ac_atomic_dec_wrap;
2783 break;
2784 default:
2785 abort();
2786 }
2787
2788 if (cmpswap)
2789 params[param_count++] = get_src(ctx, instr->src[4]);
2790 params[param_count++] = get_src(ctx, instr->src[3]);
2791
2792 if (dim == GLSL_SAMPLER_DIM_BUF) {
2793 params[param_count++] = get_image_buffer_descriptor(ctx, instr, true, true);
2794 params[param_count++] = LLVMBuildExtractElement(ctx->ac.builder, get_src(ctx, instr->src[1]),
2795 ctx->ac.i32_0, ""); /* vindex */
2796 params[param_count++] = ctx->ac.i32_0; /* voffset */
2797 if (LLVM_VERSION_MAJOR >= 9) {
2798 /* XXX: The new raw/struct atomic intrinsics are buggy
2799 * with LLVM 8, see r358579.
2800 */
2801 params[param_count++] = ctx->ac.i32_0; /* soffset */
2802 params[param_count++] = ctx->ac.i32_0; /* slc */
2803
2804 length = snprintf(intrinsic_name, sizeof(intrinsic_name),
2805 "llvm.amdgcn.struct.buffer.atomic.%s.i32", atomic_name);
2806 } else {
2807 params[param_count++] = ctx->ac.i1false; /* slc */
2808
2809 length = snprintf(intrinsic_name, sizeof(intrinsic_name),
2810 "llvm.amdgcn.buffer.atomic.%s", atomic_name);
2811 }
2812
2813 assert(length < sizeof(intrinsic_name));
2814 return ac_build_intrinsic(&ctx->ac, intrinsic_name, ctx->ac.i32,
2815 params, param_count, 0);
2816 } else {
2817 struct ac_image_args args = {};
2818 args.opcode = cmpswap ? ac_image_atomic_cmpswap : ac_image_atomic;
2819 args.atomic = atomic_subop;
2820 args.data[0] = params[0];
2821 if (cmpswap)
2822 args.data[1] = params[1];
2823 args.resource = get_image_descriptor(ctx, instr, AC_DESC_IMAGE, true);
2824 get_image_coords(ctx, instr, &args, dim, is_array);
2825 args.dim = get_ac_image_dim(&ctx->ac, dim, is_array);
2826
2827 return ac_build_image_opcode(&ctx->ac, &args);
2828 }
2829 }
2830
2831 static LLVMValueRef visit_image_samples(struct ac_nir_context *ctx,
2832 const nir_intrinsic_instr *instr,
2833 bool bindless)
2834 {
2835 enum glsl_sampler_dim dim;
2836 bool is_array;
2837 if (bindless) {
2838 dim = nir_intrinsic_image_dim(instr);
2839 is_array = nir_intrinsic_image_array(instr);
2840 } else {
2841 const struct glsl_type *type = get_image_deref(instr)->type;
2842 dim = glsl_get_sampler_dim(type);
2843 is_array = glsl_sampler_type_is_array(type);
2844 }
2845
2846 struct ac_image_args args = { 0 };
2847 args.dim = get_ac_sampler_dim(&ctx->ac, dim, is_array);
2848 args.dmask = 0xf;
2849 args.resource = get_image_descriptor(ctx, instr, AC_DESC_IMAGE, false);
2850 args.opcode = ac_image_get_resinfo;
2851 args.lod = ctx->ac.i32_0;
2852 args.attributes = AC_FUNC_ATTR_READNONE;
2853
2854 return ac_build_image_opcode(&ctx->ac, &args);
2855 }
2856
2857 static LLVMValueRef visit_image_size(struct ac_nir_context *ctx,
2858 const nir_intrinsic_instr *instr,
2859 bool bindless)
2860 {
2861 LLVMValueRef res;
2862
2863 enum glsl_sampler_dim dim;
2864 bool is_array;
2865 if (bindless) {
2866 dim = nir_intrinsic_image_dim(instr);
2867 is_array = nir_intrinsic_image_array(instr);
2868 } else {
2869 const struct glsl_type *type = get_image_deref(instr)->type;
2870 dim = glsl_get_sampler_dim(type);
2871 is_array = glsl_sampler_type_is_array(type);
2872 }
2873
2874 if (dim == GLSL_SAMPLER_DIM_BUF)
2875 return get_buffer_size(ctx, get_image_descriptor(ctx, instr, AC_DESC_BUFFER, false), true);
2876
2877 struct ac_image_args args = { 0 };
2878
2879 args.dim = get_ac_image_dim(&ctx->ac, dim, is_array);
2880 args.dmask = 0xf;
2881 args.resource = get_image_descriptor(ctx, instr, AC_DESC_IMAGE, false);
2882 args.opcode = ac_image_get_resinfo;
2883 args.lod = ctx->ac.i32_0;
2884 args.attributes = AC_FUNC_ATTR_READNONE;
2885
2886 res = ac_build_image_opcode(&ctx->ac, &args);
2887
2888 LLVMValueRef two = LLVMConstInt(ctx->ac.i32, 2, false);
2889
2890 if (dim == GLSL_SAMPLER_DIM_CUBE && is_array) {
2891 LLVMValueRef six = LLVMConstInt(ctx->ac.i32, 6, false);
2892 LLVMValueRef z = LLVMBuildExtractElement(ctx->ac.builder, res, two, "");
2893 z = LLVMBuildSDiv(ctx->ac.builder, z, six, "");
2894 res = LLVMBuildInsertElement(ctx->ac.builder, res, z, two, "");
2895 }
2896 if (ctx->ac.chip_class == GFX9 && dim == GLSL_SAMPLER_DIM_1D && is_array) {
2897 LLVMValueRef layers = LLVMBuildExtractElement(ctx->ac.builder, res, two, "");
2898 res = LLVMBuildInsertElement(ctx->ac.builder, res, layers,
2899 ctx->ac.i32_1, "");
2900
2901 }
2902 return res;
2903 }
2904
2905 static void emit_membar(struct ac_llvm_context *ac,
2906 const nir_intrinsic_instr *instr)
2907 {
2908 unsigned wait_flags = 0;
2909
2910 switch (instr->intrinsic) {
2911 case nir_intrinsic_memory_barrier:
2912 case nir_intrinsic_group_memory_barrier:
2913 wait_flags = AC_WAIT_LGKM | AC_WAIT_VLOAD | AC_WAIT_VSTORE;
2914 break;
2915 case nir_intrinsic_memory_barrier_atomic_counter:
2916 case nir_intrinsic_memory_barrier_buffer:
2917 case nir_intrinsic_memory_barrier_image:
2918 wait_flags = AC_WAIT_VLOAD | AC_WAIT_VSTORE;
2919 break;
2920 case nir_intrinsic_memory_barrier_shared:
2921 wait_flags = AC_WAIT_LGKM;
2922 break;
2923 default:
2924 break;
2925 }
2926
2927 ac_build_waitcnt(ac, wait_flags);
2928 }
2929
2930 void ac_emit_barrier(struct ac_llvm_context *ac, gl_shader_stage stage)
2931 {
2932 /* GFX6 only (thanks to a hw bug workaround):
2933 * The real barrier instruction isn’t needed, because an entire patch
2934 * always fits into a single wave.
2935 */
2936 if (ac->chip_class == GFX6 && stage == MESA_SHADER_TESS_CTRL) {
2937 ac_build_waitcnt(ac, AC_WAIT_LGKM | AC_WAIT_VLOAD | AC_WAIT_VSTORE);
2938 return;
2939 }
2940 ac_build_s_barrier(ac);
2941 }
2942
2943 static void emit_discard(struct ac_nir_context *ctx,
2944 const nir_intrinsic_instr *instr)
2945 {
2946 LLVMValueRef cond;
2947
2948 if (instr->intrinsic == nir_intrinsic_discard_if) {
2949 cond = LLVMBuildICmp(ctx->ac.builder, LLVMIntEQ,
2950 get_src(ctx, instr->src[0]),
2951 ctx->ac.i32_0, "");
2952 } else {
2953 assert(instr->intrinsic == nir_intrinsic_discard);
2954 cond = ctx->ac.i1false;
2955 }
2956
2957 ctx->abi->emit_kill(ctx->abi, cond);
2958 }
2959
2960 static LLVMValueRef
2961 visit_load_local_invocation_index(struct ac_nir_context *ctx)
2962 {
2963 LLVMValueRef result;
2964 LLVMValueRef thread_id = ac_get_thread_id(&ctx->ac);
2965 result = LLVMBuildAnd(ctx->ac.builder, ctx->abi->tg_size,
2966 LLVMConstInt(ctx->ac.i32, 0xfc0, false), "");
2967
2968 return LLVMBuildAdd(ctx->ac.builder, result, thread_id, "");
2969 }
2970
2971 static LLVMValueRef
2972 visit_load_subgroup_id(struct ac_nir_context *ctx)
2973 {
2974 if (ctx->stage == MESA_SHADER_COMPUTE) {
2975 LLVMValueRef result;
2976 result = LLVMBuildAnd(ctx->ac.builder, ctx->abi->tg_size,
2977 LLVMConstInt(ctx->ac.i32, 0xfc0, false), "");
2978 return LLVMBuildLShr(ctx->ac.builder, result, LLVMConstInt(ctx->ac.i32, 6, false), "");
2979 } else {
2980 return LLVMConstInt(ctx->ac.i32, 0, false);
2981 }
2982 }
2983
2984 static LLVMValueRef
2985 visit_load_num_subgroups(struct ac_nir_context *ctx)
2986 {
2987 if (ctx->stage == MESA_SHADER_COMPUTE) {
2988 return LLVMBuildAnd(ctx->ac.builder, ctx->abi->tg_size,
2989 LLVMConstInt(ctx->ac.i32, 0x3f, false), "");
2990 } else {
2991 return LLVMConstInt(ctx->ac.i32, 1, false);
2992 }
2993 }
2994
2995 static LLVMValueRef
2996 visit_first_invocation(struct ac_nir_context *ctx)
2997 {
2998 LLVMValueRef active_set = ac_build_ballot(&ctx->ac, ctx->ac.i32_1);
2999 const char *intr = ctx->ac.wave_size == 32 ? "llvm.cttz.i32" : "llvm.cttz.i64";
3000
3001 /* The second argument is whether cttz(0) should be defined, but we do not care. */
3002 LLVMValueRef args[] = {active_set, ctx->ac.i1false};
3003 LLVMValueRef result = ac_build_intrinsic(&ctx->ac, intr,
3004 ctx->ac.iN_wavemask, args, 2,
3005 AC_FUNC_ATTR_NOUNWIND |
3006 AC_FUNC_ATTR_READNONE);
3007
3008 return LLVMBuildTrunc(ctx->ac.builder, result, ctx->ac.i32, "");
3009 }
3010
3011 static LLVMValueRef
3012 visit_load_shared(struct ac_nir_context *ctx,
3013 const nir_intrinsic_instr *instr)
3014 {
3015 LLVMValueRef values[4], derived_ptr, index, ret;
3016
3017 LLVMValueRef ptr = get_memory_ptr(ctx, instr->src[0]);
3018
3019 for (int chan = 0; chan < instr->num_components; chan++) {
3020 index = LLVMConstInt(ctx->ac.i32, chan, 0);
3021 derived_ptr = LLVMBuildGEP(ctx->ac.builder, ptr, &index, 1, "");
3022 values[chan] = LLVMBuildLoad(ctx->ac.builder, derived_ptr, "");
3023 }
3024
3025 ret = ac_build_gather_values(&ctx->ac, values, instr->num_components);
3026 return LLVMBuildBitCast(ctx->ac.builder, ret, get_def_type(ctx, &instr->dest.ssa), "");
3027 }
3028
3029 static void
3030 visit_store_shared(struct ac_nir_context *ctx,
3031 const nir_intrinsic_instr *instr)
3032 {
3033 LLVMValueRef derived_ptr, data,index;
3034 LLVMBuilderRef builder = ctx->ac.builder;
3035
3036 LLVMValueRef ptr = get_memory_ptr(ctx, instr->src[1]);
3037 LLVMValueRef src = get_src(ctx, instr->src[0]);
3038
3039 int writemask = nir_intrinsic_write_mask(instr);
3040 for (int chan = 0; chan < 4; chan++) {
3041 if (!(writemask & (1 << chan))) {
3042 continue;
3043 }
3044 data = ac_llvm_extract_elem(&ctx->ac, src, chan);
3045 index = LLVMConstInt(ctx->ac.i32, chan, 0);
3046 derived_ptr = LLVMBuildGEP(builder, ptr, &index, 1, "");
3047 LLVMBuildStore(builder, data, derived_ptr);
3048 }
3049 }
3050
3051 static LLVMValueRef visit_var_atomic(struct ac_nir_context *ctx,
3052 const nir_intrinsic_instr *instr,
3053 LLVMValueRef ptr, int src_idx)
3054 {
3055 LLVMValueRef result;
3056 LLVMValueRef src = get_src(ctx, instr->src[src_idx]);
3057
3058 const char *sync_scope = LLVM_VERSION_MAJOR >= 9 ? "workgroup-one-as" : "workgroup";
3059
3060 if (instr->intrinsic == nir_intrinsic_shared_atomic_comp_swap ||
3061 instr->intrinsic == nir_intrinsic_deref_atomic_comp_swap) {
3062 LLVMValueRef src1 = get_src(ctx, instr->src[src_idx + 1]);
3063 result = ac_build_atomic_cmp_xchg(&ctx->ac, ptr, src, src1, sync_scope);
3064 result = LLVMBuildExtractValue(ctx->ac.builder, result, 0, "");
3065 } else {
3066 LLVMAtomicRMWBinOp op;
3067 switch (instr->intrinsic) {
3068 case nir_intrinsic_shared_atomic_add:
3069 case nir_intrinsic_deref_atomic_add:
3070 op = LLVMAtomicRMWBinOpAdd;
3071 break;
3072 case nir_intrinsic_shared_atomic_umin:
3073 case nir_intrinsic_deref_atomic_umin:
3074 op = LLVMAtomicRMWBinOpUMin;
3075 break;
3076 case nir_intrinsic_shared_atomic_umax:
3077 case nir_intrinsic_deref_atomic_umax:
3078 op = LLVMAtomicRMWBinOpUMax;
3079 break;
3080 case nir_intrinsic_shared_atomic_imin:
3081 case nir_intrinsic_deref_atomic_imin:
3082 op = LLVMAtomicRMWBinOpMin;
3083 break;
3084 case nir_intrinsic_shared_atomic_imax:
3085 case nir_intrinsic_deref_atomic_imax:
3086 op = LLVMAtomicRMWBinOpMax;
3087 break;
3088 case nir_intrinsic_shared_atomic_and:
3089 case nir_intrinsic_deref_atomic_and:
3090 op = LLVMAtomicRMWBinOpAnd;
3091 break;
3092 case nir_intrinsic_shared_atomic_or:
3093 case nir_intrinsic_deref_atomic_or:
3094 op = LLVMAtomicRMWBinOpOr;
3095 break;
3096 case nir_intrinsic_shared_atomic_xor:
3097 case nir_intrinsic_deref_atomic_xor:
3098 op = LLVMAtomicRMWBinOpXor;
3099 break;
3100 case nir_intrinsic_shared_atomic_exchange:
3101 case nir_intrinsic_deref_atomic_exchange:
3102 op = LLVMAtomicRMWBinOpXchg;
3103 break;
3104 default:
3105 return NULL;
3106 }
3107
3108 result = ac_build_atomic_rmw(&ctx->ac, op, ptr, ac_to_integer(&ctx->ac, src), sync_scope);
3109 }
3110 return result;
3111 }
3112
3113 static LLVMValueRef load_sample_pos(struct ac_nir_context *ctx)
3114 {
3115 LLVMValueRef values[2];
3116 LLVMValueRef pos[2];
3117
3118 pos[0] = ac_to_float(&ctx->ac, ctx->abi->frag_pos[0]);
3119 pos[1] = ac_to_float(&ctx->ac, ctx->abi->frag_pos[1]);
3120
3121 values[0] = ac_build_fract(&ctx->ac, pos[0], 32);
3122 values[1] = ac_build_fract(&ctx->ac, pos[1], 32);
3123 return ac_build_gather_values(&ctx->ac, values, 2);
3124 }
3125
3126 static LLVMValueRef lookup_interp_param(struct ac_nir_context *ctx,
3127 enum glsl_interp_mode interp, unsigned location)
3128 {
3129 switch (interp) {
3130 case INTERP_MODE_FLAT:
3131 default:
3132 return NULL;
3133 case INTERP_MODE_SMOOTH:
3134 case INTERP_MODE_NONE:
3135 if (location == INTERP_CENTER)
3136 return ctx->abi->persp_center;
3137 else if (location == INTERP_CENTROID)
3138 return ctx->abi->persp_centroid;
3139 else if (location == INTERP_SAMPLE)
3140 return ctx->abi->persp_sample;
3141 break;
3142 case INTERP_MODE_NOPERSPECTIVE:
3143 if (location == INTERP_CENTER)
3144 return ctx->abi->linear_center;
3145 else if (location == INTERP_CENTROID)
3146 return ctx->abi->linear_centroid;
3147 else if (location == INTERP_SAMPLE)
3148 return ctx->abi->linear_sample;
3149 break;
3150 }
3151 return NULL;
3152 }
3153
3154 static LLVMValueRef barycentric_center(struct ac_nir_context *ctx,
3155 unsigned mode)
3156 {
3157 LLVMValueRef interp_param = lookup_interp_param(ctx, mode, INTERP_CENTER);
3158 return LLVMBuildBitCast(ctx->ac.builder, interp_param, ctx->ac.v2i32, "");
3159 }
3160
3161 static LLVMValueRef barycentric_offset(struct ac_nir_context *ctx,
3162 unsigned mode,
3163 LLVMValueRef offset)
3164 {
3165 LLVMValueRef interp_param = lookup_interp_param(ctx, mode, INTERP_CENTER);
3166 LLVMValueRef src_c0 = ac_to_float(&ctx->ac, LLVMBuildExtractElement(ctx->ac.builder, offset, ctx->ac.i32_0, ""));
3167 LLVMValueRef src_c1 = ac_to_float(&ctx->ac, LLVMBuildExtractElement(ctx->ac.builder, offset, ctx->ac.i32_1, ""));
3168
3169 LLVMValueRef ij_out[2];
3170 LLVMValueRef ddxy_out = ac_build_ddxy_interp(&ctx->ac, interp_param);
3171
3172 /*
3173 * take the I then J parameters, and the DDX/Y for it, and
3174 * calculate the IJ inputs for the interpolator.
3175 * temp1 = ddx * offset/sample.x + I;
3176 * interp_param.I = ddy * offset/sample.y + temp1;
3177 * temp1 = ddx * offset/sample.x + J;
3178 * interp_param.J = ddy * offset/sample.y + temp1;
3179 */
3180 for (unsigned i = 0; i < 2; i++) {
3181 LLVMValueRef ix_ll = LLVMConstInt(ctx->ac.i32, i, false);
3182 LLVMValueRef iy_ll = LLVMConstInt(ctx->ac.i32, i + 2, false);
3183 LLVMValueRef ddx_el = LLVMBuildExtractElement(ctx->ac.builder,
3184 ddxy_out, ix_ll, "");
3185 LLVMValueRef ddy_el = LLVMBuildExtractElement(ctx->ac.builder,
3186 ddxy_out, iy_ll, "");
3187 LLVMValueRef interp_el = LLVMBuildExtractElement(ctx->ac.builder,
3188 interp_param, ix_ll, "");
3189 LLVMValueRef temp1, temp2;
3190
3191 interp_el = LLVMBuildBitCast(ctx->ac.builder, interp_el,
3192 ctx->ac.f32, "");
3193
3194 temp1 = ac_build_fmad(&ctx->ac, ddx_el, src_c0, interp_el);
3195 temp2 = ac_build_fmad(&ctx->ac, ddy_el, src_c1, temp1);
3196
3197 ij_out[i] = LLVMBuildBitCast(ctx->ac.builder,
3198 temp2, ctx->ac.i32, "");
3199 }
3200 interp_param = ac_build_gather_values(&ctx->ac, ij_out, 2);
3201 return LLVMBuildBitCast(ctx->ac.builder, interp_param, ctx->ac.v2i32, "");
3202 }
3203
3204 static LLVMValueRef barycentric_centroid(struct ac_nir_context *ctx,
3205 unsigned mode)
3206 {
3207 LLVMValueRef interp_param = lookup_interp_param(ctx, mode, INTERP_CENTROID);
3208 return LLVMBuildBitCast(ctx->ac.builder, interp_param, ctx->ac.v2i32, "");
3209 }
3210
3211 static LLVMValueRef barycentric_at_sample(struct ac_nir_context *ctx,
3212 unsigned mode,
3213 LLVMValueRef sample_id)
3214 {
3215 if (ctx->abi->interp_at_sample_force_center)
3216 return barycentric_center(ctx, mode);
3217
3218 LLVMValueRef halfval = LLVMConstReal(ctx->ac.f32, 0.5f);
3219
3220 /* fetch sample ID */
3221 LLVMValueRef sample_pos = ctx->abi->load_sample_position(ctx->abi, sample_id);
3222
3223 LLVMValueRef src_c0 = LLVMBuildExtractElement(ctx->ac.builder, sample_pos, ctx->ac.i32_0, "");
3224 src_c0 = LLVMBuildFSub(ctx->ac.builder, src_c0, halfval, "");
3225 LLVMValueRef src_c1 = LLVMBuildExtractElement(ctx->ac.builder, sample_pos, ctx->ac.i32_1, "");
3226 src_c1 = LLVMBuildFSub(ctx->ac.builder, src_c1, halfval, "");
3227 LLVMValueRef coords[] = { src_c0, src_c1 };
3228 LLVMValueRef offset = ac_build_gather_values(&ctx->ac, coords, 2);
3229
3230 return barycentric_offset(ctx, mode, offset);
3231 }
3232
3233
3234 static LLVMValueRef barycentric_sample(struct ac_nir_context *ctx,
3235 unsigned mode)
3236 {
3237 LLVMValueRef interp_param = lookup_interp_param(ctx, mode, INTERP_SAMPLE);
3238 return LLVMBuildBitCast(ctx->ac.builder, interp_param, ctx->ac.v2i32, "");
3239 }
3240
3241 static LLVMValueRef load_interpolated_input(struct ac_nir_context *ctx,
3242 LLVMValueRef interp_param,
3243 unsigned index, unsigned comp_start,
3244 unsigned num_components,
3245 unsigned bitsize)
3246 {
3247 LLVMValueRef attr_number = LLVMConstInt(ctx->ac.i32, index, false);
3248
3249 interp_param = LLVMBuildBitCast(ctx->ac.builder,
3250 interp_param, ctx->ac.v2f32, "");
3251 LLVMValueRef i = LLVMBuildExtractElement(
3252 ctx->ac.builder, interp_param, ctx->ac.i32_0, "");
3253 LLVMValueRef j = LLVMBuildExtractElement(
3254 ctx->ac.builder, interp_param, ctx->ac.i32_1, "");
3255
3256 LLVMValueRef values[4];
3257 assert(bitsize == 16 || bitsize == 32);
3258 for (unsigned comp = 0; comp < num_components; comp++) {
3259 LLVMValueRef llvm_chan = LLVMConstInt(ctx->ac.i32, comp_start + comp, false);
3260 if (bitsize == 16) {
3261 values[comp] = ac_build_fs_interp_f16(&ctx->ac, llvm_chan, attr_number,
3262 ctx->abi->prim_mask, i, j);
3263 } else {
3264 values[comp] = ac_build_fs_interp(&ctx->ac, llvm_chan, attr_number,
3265 ctx->abi->prim_mask, i, j);
3266 }
3267 }
3268
3269 return ac_to_integer(&ctx->ac, ac_build_gather_values(&ctx->ac, values, num_components));
3270 }
3271
3272 static LLVMValueRef load_flat_input(struct ac_nir_context *ctx,
3273 unsigned index, unsigned comp_start,
3274 unsigned num_components,
3275 unsigned bit_size)
3276 {
3277 LLVMValueRef attr_number = LLVMConstInt(ctx->ac.i32, index, false);
3278
3279 LLVMValueRef values[8];
3280
3281 /* Each component of a 64-bit value takes up two GL-level channels. */
3282 unsigned channels =
3283 bit_size == 64 ? num_components * 2 : num_components;
3284
3285 for (unsigned chan = 0; chan < channels; chan++) {
3286 if (comp_start + chan > 4)
3287 attr_number = LLVMConstInt(ctx->ac.i32, index + 1, false);
3288 LLVMValueRef llvm_chan = LLVMConstInt(ctx->ac.i32, (comp_start + chan) % 4, false);
3289 values[chan] = ac_build_fs_interp_mov(&ctx->ac,
3290 LLVMConstInt(ctx->ac.i32, 2, false),
3291 llvm_chan,
3292 attr_number,
3293 ctx->abi->prim_mask);
3294 values[chan] = LLVMBuildBitCast(ctx->ac.builder, values[chan], ctx->ac.i32, "");
3295 values[chan] = LLVMBuildTruncOrBitCast(ctx->ac.builder, values[chan],
3296 bit_size == 16 ? ctx->ac.i16 : ctx->ac.i32, "");
3297 }
3298
3299 LLVMValueRef result = ac_build_gather_values(&ctx->ac, values, channels);
3300 if (bit_size == 64) {
3301 LLVMTypeRef type = num_components == 1 ? ctx->ac.i64 :
3302 LLVMVectorType(ctx->ac.i64, num_components);
3303 result = LLVMBuildBitCast(ctx->ac.builder, result, type, "");
3304 }
3305 return result;
3306 }
3307
3308 static void visit_intrinsic(struct ac_nir_context *ctx,
3309 nir_intrinsic_instr *instr)
3310 {
3311 LLVMValueRef result = NULL;
3312
3313 switch (instr->intrinsic) {
3314 case nir_intrinsic_ballot:
3315 result = ac_build_ballot(&ctx->ac, get_src(ctx, instr->src[0]));
3316 if (ctx->ac.ballot_mask_bits > ctx->ac.wave_size)
3317 result = LLVMBuildZExt(ctx->ac.builder, result, ctx->ac.iN_ballotmask, "");
3318 break;
3319 case nir_intrinsic_read_invocation:
3320 result = ac_build_readlane(&ctx->ac, get_src(ctx, instr->src[0]),
3321 get_src(ctx, instr->src[1]));
3322 break;
3323 case nir_intrinsic_read_first_invocation:
3324 result = ac_build_readlane(&ctx->ac, get_src(ctx, instr->src[0]), NULL);
3325 break;
3326 case nir_intrinsic_load_subgroup_invocation:
3327 result = ac_get_thread_id(&ctx->ac);
3328 break;
3329 case nir_intrinsic_load_work_group_id: {
3330 LLVMValueRef values[3];
3331
3332 for (int i = 0; i < 3; i++) {
3333 values[i] = ctx->abi->workgroup_ids[i] ?
3334 ctx->abi->workgroup_ids[i] : ctx->ac.i32_0;
3335 }
3336
3337 result = ac_build_gather_values(&ctx->ac, values, 3);
3338 break;
3339 }
3340 case nir_intrinsic_load_base_vertex:
3341 case nir_intrinsic_load_first_vertex:
3342 result = ctx->abi->load_base_vertex(ctx->abi);
3343 break;
3344 case nir_intrinsic_load_local_group_size:
3345 result = ctx->abi->load_local_group_size(ctx->abi);
3346 break;
3347 case nir_intrinsic_load_vertex_id:
3348 result = LLVMBuildAdd(ctx->ac.builder, ctx->abi->vertex_id,
3349 ctx->abi->base_vertex, "");
3350 break;
3351 case nir_intrinsic_load_vertex_id_zero_base: {
3352 result = ctx->abi->vertex_id;
3353 break;
3354 }
3355 case nir_intrinsic_load_local_invocation_id: {
3356 result = ctx->abi->local_invocation_ids;
3357 break;
3358 }
3359 case nir_intrinsic_load_base_instance:
3360 result = ctx->abi->start_instance;
3361 break;
3362 case nir_intrinsic_load_draw_id:
3363 result = ctx->abi->draw_id;
3364 break;
3365 case nir_intrinsic_load_view_index:
3366 result = ctx->abi->view_index;
3367 break;
3368 case nir_intrinsic_load_invocation_id:
3369 if (ctx->stage == MESA_SHADER_TESS_CTRL) {
3370 result = ac_unpack_param(&ctx->ac, ctx->abi->tcs_rel_ids, 8, 5);
3371 } else {
3372 if (ctx->ac.chip_class >= GFX10) {
3373 result = LLVMBuildAnd(ctx->ac.builder,
3374 ctx->abi->gs_invocation_id,
3375 LLVMConstInt(ctx->ac.i32, 127, 0), "");
3376 } else {
3377 result = ctx->abi->gs_invocation_id;
3378 }
3379 }
3380 break;
3381 case nir_intrinsic_load_primitive_id:
3382 if (ctx->stage == MESA_SHADER_GEOMETRY) {
3383 result = ctx->abi->gs_prim_id;
3384 } else if (ctx->stage == MESA_SHADER_TESS_CTRL) {
3385 result = ctx->abi->tcs_patch_id;
3386 } else if (ctx->stage == MESA_SHADER_TESS_EVAL) {
3387 result = ctx->abi->tes_patch_id;
3388 } else
3389 fprintf(stderr, "Unknown primitive id intrinsic: %d", ctx->stage);
3390 break;
3391 case nir_intrinsic_load_sample_id:
3392 result = ac_unpack_param(&ctx->ac, ctx->abi->ancillary, 8, 4);
3393 break;
3394 case nir_intrinsic_load_sample_pos:
3395 result = load_sample_pos(ctx);
3396 break;
3397 case nir_intrinsic_load_sample_mask_in:
3398 result = ctx->abi->load_sample_mask_in(ctx->abi);
3399 break;
3400 case nir_intrinsic_load_frag_coord: {
3401 LLVMValueRef values[4] = {
3402 ctx->abi->frag_pos[0],
3403 ctx->abi->frag_pos[1],
3404 ctx->abi->frag_pos[2],
3405 ac_build_fdiv(&ctx->ac, ctx->ac.f32_1, ctx->abi->frag_pos[3])
3406 };
3407 result = ac_to_integer(&ctx->ac,
3408 ac_build_gather_values(&ctx->ac, values, 4));
3409 break;
3410 }
3411 case nir_intrinsic_load_layer_id:
3412 result = ctx->abi->inputs[ac_llvm_reg_index_soa(VARYING_SLOT_LAYER, 0)];
3413 break;
3414 case nir_intrinsic_load_front_face:
3415 result = ctx->abi->front_face;
3416 break;
3417 case nir_intrinsic_load_helper_invocation:
3418 result = ac_build_load_helper_invocation(&ctx->ac);
3419 break;
3420 case nir_intrinsic_load_color0:
3421 result = ctx->abi->color0;
3422 break;
3423 case nir_intrinsic_load_color1:
3424 result = ctx->abi->color1;
3425 break;
3426 case nir_intrinsic_load_user_data_amd:
3427 assert(LLVMTypeOf(ctx->abi->user_data) == ctx->ac.v4i32);
3428 result = ctx->abi->user_data;
3429 break;
3430 case nir_intrinsic_load_instance_id:
3431 result = ctx->abi->instance_id;
3432 break;
3433 case nir_intrinsic_load_num_work_groups:
3434 result = ctx->abi->num_work_groups;
3435 break;
3436 case nir_intrinsic_load_local_invocation_index:
3437 result = visit_load_local_invocation_index(ctx);
3438 break;
3439 case nir_intrinsic_load_subgroup_id:
3440 result = visit_load_subgroup_id(ctx);
3441 break;
3442 case nir_intrinsic_load_num_subgroups:
3443 result = visit_load_num_subgroups(ctx);
3444 break;
3445 case nir_intrinsic_first_invocation:
3446 result = visit_first_invocation(ctx);
3447 break;
3448 case nir_intrinsic_load_push_constant:
3449 result = visit_load_push_constant(ctx, instr);
3450 break;
3451 case nir_intrinsic_vulkan_resource_index: {
3452 LLVMValueRef index = get_src(ctx, instr->src[0]);
3453 unsigned desc_set = nir_intrinsic_desc_set(instr);
3454 unsigned binding = nir_intrinsic_binding(instr);
3455
3456 result = ctx->abi->load_resource(ctx->abi, index, desc_set,
3457 binding);
3458 break;
3459 }
3460 case nir_intrinsic_vulkan_resource_reindex:
3461 result = visit_vulkan_resource_reindex(ctx, instr);
3462 break;
3463 case nir_intrinsic_store_ssbo:
3464 visit_store_ssbo(ctx, instr);
3465 break;
3466 case nir_intrinsic_load_ssbo:
3467 result = visit_load_buffer(ctx, instr);
3468 break;
3469 case nir_intrinsic_ssbo_atomic_add:
3470 case nir_intrinsic_ssbo_atomic_imin:
3471 case nir_intrinsic_ssbo_atomic_umin:
3472 case nir_intrinsic_ssbo_atomic_imax:
3473 case nir_intrinsic_ssbo_atomic_umax:
3474 case nir_intrinsic_ssbo_atomic_and:
3475 case nir_intrinsic_ssbo_atomic_or:
3476 case nir_intrinsic_ssbo_atomic_xor:
3477 case nir_intrinsic_ssbo_atomic_exchange:
3478 case nir_intrinsic_ssbo_atomic_comp_swap:
3479 result = visit_atomic_ssbo(ctx, instr);
3480 break;
3481 case nir_intrinsic_load_ubo:
3482 result = visit_load_ubo_buffer(ctx, instr);
3483 break;
3484 case nir_intrinsic_get_buffer_size:
3485 result = visit_get_buffer_size(ctx, instr);
3486 break;
3487 case nir_intrinsic_load_deref:
3488 result = visit_load_var(ctx, instr);
3489 break;
3490 case nir_intrinsic_store_deref:
3491 visit_store_var(ctx, instr);
3492 break;
3493 case nir_intrinsic_load_shared:
3494 result = visit_load_shared(ctx, instr);
3495 break;
3496 case nir_intrinsic_store_shared:
3497 visit_store_shared(ctx, instr);
3498 break;
3499 case nir_intrinsic_bindless_image_samples:
3500 result = visit_image_samples(ctx, instr, true);
3501 break;
3502 case nir_intrinsic_image_deref_samples:
3503 result = visit_image_samples(ctx, instr, false);
3504 break;
3505 case nir_intrinsic_bindless_image_load:
3506 result = visit_image_load(ctx, instr, true);
3507 break;
3508 case nir_intrinsic_image_deref_load:
3509 result = visit_image_load(ctx, instr, false);
3510 break;
3511 case nir_intrinsic_bindless_image_store:
3512 visit_image_store(ctx, instr, true);
3513 break;
3514 case nir_intrinsic_image_deref_store:
3515 visit_image_store(ctx, instr, false);
3516 break;
3517 case nir_intrinsic_bindless_image_atomic_add:
3518 case nir_intrinsic_bindless_image_atomic_imin:
3519 case nir_intrinsic_bindless_image_atomic_umin:
3520 case nir_intrinsic_bindless_image_atomic_imax:
3521 case nir_intrinsic_bindless_image_atomic_umax:
3522 case nir_intrinsic_bindless_image_atomic_and:
3523 case nir_intrinsic_bindless_image_atomic_or:
3524 case nir_intrinsic_bindless_image_atomic_xor:
3525 case nir_intrinsic_bindless_image_atomic_exchange:
3526 case nir_intrinsic_bindless_image_atomic_comp_swap:
3527 case nir_intrinsic_bindless_image_atomic_inc_wrap:
3528 case nir_intrinsic_bindless_image_atomic_dec_wrap:
3529 result = visit_image_atomic(ctx, instr, true);
3530 break;
3531 case nir_intrinsic_image_deref_atomic_add:
3532 case nir_intrinsic_image_deref_atomic_imin:
3533 case nir_intrinsic_image_deref_atomic_umin:
3534 case nir_intrinsic_image_deref_atomic_imax:
3535 case nir_intrinsic_image_deref_atomic_umax:
3536 case nir_intrinsic_image_deref_atomic_and:
3537 case nir_intrinsic_image_deref_atomic_or:
3538 case nir_intrinsic_image_deref_atomic_xor:
3539 case nir_intrinsic_image_deref_atomic_exchange:
3540 case nir_intrinsic_image_deref_atomic_comp_swap:
3541 case nir_intrinsic_image_deref_atomic_inc_wrap:
3542 case nir_intrinsic_image_deref_atomic_dec_wrap:
3543 result = visit_image_atomic(ctx, instr, false);
3544 break;
3545 case nir_intrinsic_bindless_image_size:
3546 result = visit_image_size(ctx, instr, true);
3547 break;
3548 case nir_intrinsic_image_deref_size:
3549 result = visit_image_size(ctx, instr, false);
3550 break;
3551 case nir_intrinsic_shader_clock:
3552 result = ac_build_shader_clock(&ctx->ac);
3553 break;
3554 case nir_intrinsic_discard:
3555 case nir_intrinsic_discard_if:
3556 emit_discard(ctx, instr);
3557 break;
3558 case nir_intrinsic_memory_barrier:
3559 case nir_intrinsic_group_memory_barrier:
3560 case nir_intrinsic_memory_barrier_atomic_counter:
3561 case nir_intrinsic_memory_barrier_buffer:
3562 case nir_intrinsic_memory_barrier_image:
3563 case nir_intrinsic_memory_barrier_shared:
3564 emit_membar(&ctx->ac, instr);
3565 break;
3566 case nir_intrinsic_barrier:
3567 ac_emit_barrier(&ctx->ac, ctx->stage);
3568 break;
3569 case nir_intrinsic_shared_atomic_add:
3570 case nir_intrinsic_shared_atomic_imin:
3571 case nir_intrinsic_shared_atomic_umin:
3572 case nir_intrinsic_shared_atomic_imax:
3573 case nir_intrinsic_shared_atomic_umax:
3574 case nir_intrinsic_shared_atomic_and:
3575 case nir_intrinsic_shared_atomic_or:
3576 case nir_intrinsic_shared_atomic_xor:
3577 case nir_intrinsic_shared_atomic_exchange:
3578 case nir_intrinsic_shared_atomic_comp_swap: {
3579 LLVMValueRef ptr = get_memory_ptr(ctx, instr->src[0]);
3580 result = visit_var_atomic(ctx, instr, ptr, 1);
3581 break;
3582 }
3583 case nir_intrinsic_deref_atomic_add:
3584 case nir_intrinsic_deref_atomic_imin:
3585 case nir_intrinsic_deref_atomic_umin:
3586 case nir_intrinsic_deref_atomic_imax:
3587 case nir_intrinsic_deref_atomic_umax:
3588 case nir_intrinsic_deref_atomic_and:
3589 case nir_intrinsic_deref_atomic_or:
3590 case nir_intrinsic_deref_atomic_xor:
3591 case nir_intrinsic_deref_atomic_exchange:
3592 case nir_intrinsic_deref_atomic_comp_swap: {
3593 LLVMValueRef ptr = get_src(ctx, instr->src[0]);
3594 result = visit_var_atomic(ctx, instr, ptr, 1);
3595 break;
3596 }
3597 case nir_intrinsic_load_barycentric_pixel:
3598 result = barycentric_center(ctx, nir_intrinsic_interp_mode(instr));
3599 break;
3600 case nir_intrinsic_load_barycentric_centroid:
3601 result = barycentric_centroid(ctx, nir_intrinsic_interp_mode(instr));
3602 break;
3603 case nir_intrinsic_load_barycentric_sample:
3604 result = barycentric_sample(ctx, nir_intrinsic_interp_mode(instr));
3605 break;
3606 case nir_intrinsic_load_barycentric_at_offset: {
3607 LLVMValueRef offset = ac_to_float(&ctx->ac, get_src(ctx, instr->src[0]));
3608 result = barycentric_offset(ctx, nir_intrinsic_interp_mode(instr), offset);
3609 break;
3610 }
3611 case nir_intrinsic_load_barycentric_at_sample: {
3612 LLVMValueRef sample_id = get_src(ctx, instr->src[0]);
3613 result = barycentric_at_sample(ctx, nir_intrinsic_interp_mode(instr), sample_id);
3614 break;
3615 }
3616 case nir_intrinsic_load_interpolated_input: {
3617 /* We assume any indirect loads have been lowered away */
3618 ASSERTED nir_const_value *offset = nir_src_as_const_value(instr->src[1]);
3619 assert(offset);
3620 assert(offset[0].i32 == 0);
3621
3622 LLVMValueRef interp_param = get_src(ctx, instr->src[0]);
3623 unsigned index = nir_intrinsic_base(instr);
3624 unsigned component = nir_intrinsic_component(instr);
3625 result = load_interpolated_input(ctx, interp_param, index,
3626 component,
3627 instr->dest.ssa.num_components,
3628 instr->dest.ssa.bit_size);
3629 break;
3630 }
3631 case nir_intrinsic_load_input: {
3632 /* We only lower inputs for fragment shaders ATM */
3633 ASSERTED nir_const_value *offset = nir_src_as_const_value(instr->src[0]);
3634 assert(offset);
3635 assert(offset[0].i32 == 0);
3636
3637 unsigned index = nir_intrinsic_base(instr);
3638 unsigned component = nir_intrinsic_component(instr);
3639 result = load_flat_input(ctx, index, component,
3640 instr->dest.ssa.num_components,
3641 instr->dest.ssa.bit_size);
3642 break;
3643 }
3644 case nir_intrinsic_emit_vertex:
3645 ctx->abi->emit_vertex(ctx->abi, nir_intrinsic_stream_id(instr), ctx->abi->outputs);
3646 break;
3647 case nir_intrinsic_end_primitive:
3648 ctx->abi->emit_primitive(ctx->abi, nir_intrinsic_stream_id(instr));
3649 break;
3650 case nir_intrinsic_load_tess_coord:
3651 result = ctx->abi->load_tess_coord(ctx->abi);
3652 break;
3653 case nir_intrinsic_load_tess_level_outer:
3654 result = ctx->abi->load_tess_level(ctx->abi, VARYING_SLOT_TESS_LEVEL_OUTER, false);
3655 break;
3656 case nir_intrinsic_load_tess_level_inner:
3657 result = ctx->abi->load_tess_level(ctx->abi, VARYING_SLOT_TESS_LEVEL_INNER, false);
3658 break;
3659 case nir_intrinsic_load_tess_level_outer_default:
3660 result = ctx->abi->load_tess_level(ctx->abi, VARYING_SLOT_TESS_LEVEL_OUTER, true);
3661 break;
3662 case nir_intrinsic_load_tess_level_inner_default:
3663 result = ctx->abi->load_tess_level(ctx->abi, VARYING_SLOT_TESS_LEVEL_INNER, true);
3664 break;
3665 case nir_intrinsic_load_patch_vertices_in:
3666 result = ctx->abi->load_patch_vertices_in(ctx->abi);
3667 break;
3668 case nir_intrinsic_vote_all: {
3669 LLVMValueRef tmp = ac_build_vote_all(&ctx->ac, get_src(ctx, instr->src[0]));
3670 result = LLVMBuildSExt(ctx->ac.builder, tmp, ctx->ac.i32, "");
3671 break;
3672 }
3673 case nir_intrinsic_vote_any: {
3674 LLVMValueRef tmp = ac_build_vote_any(&ctx->ac, get_src(ctx, instr->src[0]));
3675 result = LLVMBuildSExt(ctx->ac.builder, tmp, ctx->ac.i32, "");
3676 break;
3677 }
3678 case nir_intrinsic_shuffle:
3679 result = ac_build_shuffle(&ctx->ac, get_src(ctx, instr->src[0]),
3680 get_src(ctx, instr->src[1]));
3681 break;
3682 case nir_intrinsic_reduce:
3683 result = ac_build_reduce(&ctx->ac,
3684 get_src(ctx, instr->src[0]),
3685 instr->const_index[0],
3686 instr->const_index[1]);
3687 break;
3688 case nir_intrinsic_inclusive_scan:
3689 result = ac_build_inclusive_scan(&ctx->ac,
3690 get_src(ctx, instr->src[0]),
3691 instr->const_index[0]);
3692 break;
3693 case nir_intrinsic_exclusive_scan:
3694 result = ac_build_exclusive_scan(&ctx->ac,
3695 get_src(ctx, instr->src[0]),
3696 instr->const_index[0]);
3697 break;
3698 case nir_intrinsic_quad_broadcast: {
3699 unsigned lane = nir_src_as_uint(instr->src[1]);
3700 result = ac_build_quad_swizzle(&ctx->ac, get_src(ctx, instr->src[0]),
3701 lane, lane, lane, lane);
3702 break;
3703 }
3704 case nir_intrinsic_quad_swap_horizontal:
3705 result = ac_build_quad_swizzle(&ctx->ac, get_src(ctx, instr->src[0]), 1, 0, 3 ,2);
3706 break;
3707 case nir_intrinsic_quad_swap_vertical:
3708 result = ac_build_quad_swizzle(&ctx->ac, get_src(ctx, instr->src[0]), 2, 3, 0 ,1);
3709 break;
3710 case nir_intrinsic_quad_swap_diagonal:
3711 result = ac_build_quad_swizzle(&ctx->ac, get_src(ctx, instr->src[0]), 3, 2, 1 ,0);
3712 break;
3713 case nir_intrinsic_quad_swizzle_amd: {
3714 uint32_t mask = nir_intrinsic_swizzle_mask(instr);
3715 result = ac_build_quad_swizzle(&ctx->ac, get_src(ctx, instr->src[0]),
3716 mask & 0x3, (mask >> 2) & 0x3,
3717 (mask >> 4) & 0x3, (mask >> 6) & 0x3);
3718 break;
3719 }
3720 case nir_intrinsic_masked_swizzle_amd: {
3721 uint32_t mask = nir_intrinsic_swizzle_mask(instr);
3722 result = ac_build_ds_swizzle(&ctx->ac, get_src(ctx, instr->src[0]), mask);
3723 break;
3724 }
3725 case nir_intrinsic_write_invocation_amd:
3726 result = ac_build_writelane(&ctx->ac, get_src(ctx, instr->src[0]),
3727 get_src(ctx, instr->src[1]),
3728 get_src(ctx, instr->src[2]));
3729 break;
3730 case nir_intrinsic_mbcnt_amd:
3731 result = ac_build_mbcnt(&ctx->ac, get_src(ctx, instr->src[0]));
3732 break;
3733 case nir_intrinsic_load_scratch: {
3734 LLVMValueRef offset = get_src(ctx, instr->src[0]);
3735 LLVMValueRef ptr = ac_build_gep0(&ctx->ac, ctx->scratch,
3736 offset);
3737 LLVMTypeRef comp_type =
3738 LLVMIntTypeInContext(ctx->ac.context, instr->dest.ssa.bit_size);
3739 LLVMTypeRef vec_type =
3740 instr->dest.ssa.num_components == 1 ? comp_type :
3741 LLVMVectorType(comp_type, instr->dest.ssa.num_components);
3742 unsigned addr_space = LLVMGetPointerAddressSpace(LLVMTypeOf(ptr));
3743 ptr = LLVMBuildBitCast(ctx->ac.builder, ptr,
3744 LLVMPointerType(vec_type, addr_space), "");
3745 result = LLVMBuildLoad(ctx->ac.builder, ptr, "");
3746 break;
3747 }
3748 case nir_intrinsic_store_scratch: {
3749 LLVMValueRef offset = get_src(ctx, instr->src[1]);
3750 LLVMValueRef ptr = ac_build_gep0(&ctx->ac, ctx->scratch,
3751 offset);
3752 LLVMTypeRef comp_type =
3753 LLVMIntTypeInContext(ctx->ac.context, instr->src[0].ssa->bit_size);
3754 unsigned addr_space = LLVMGetPointerAddressSpace(LLVMTypeOf(ptr));
3755 ptr = LLVMBuildBitCast(ctx->ac.builder, ptr,
3756 LLVMPointerType(comp_type, addr_space), "");
3757 LLVMValueRef src = get_src(ctx, instr->src[0]);
3758 unsigned wrmask = nir_intrinsic_write_mask(instr);
3759 while (wrmask) {
3760 int start, count;
3761 u_bit_scan_consecutive_range(&wrmask, &start, &count);
3762
3763 LLVMValueRef offset = LLVMConstInt(ctx->ac.i32, start, false);
3764 LLVMValueRef offset_ptr = LLVMBuildGEP(ctx->ac.builder, ptr, &offset, 1, "");
3765 LLVMTypeRef vec_type =
3766 count == 1 ? comp_type : LLVMVectorType(comp_type, count);
3767 offset_ptr = LLVMBuildBitCast(ctx->ac.builder,
3768 offset_ptr,
3769 LLVMPointerType(vec_type, addr_space),
3770 "");
3771 LLVMValueRef offset_src =
3772 ac_extract_components(&ctx->ac, src, start, count);
3773 LLVMBuildStore(ctx->ac.builder, offset_src, offset_ptr);
3774 }
3775 break;
3776 }
3777 case nir_intrinsic_load_constant: {
3778 LLVMValueRef offset = get_src(ctx, instr->src[0]);
3779 LLVMValueRef base = LLVMConstInt(ctx->ac.i32,
3780 nir_intrinsic_base(instr),
3781 false);
3782 offset = LLVMBuildAdd(ctx->ac.builder, offset, base, "");
3783 LLVMValueRef ptr = ac_build_gep0(&ctx->ac, ctx->constant_data,
3784 offset);
3785 LLVMTypeRef comp_type =
3786 LLVMIntTypeInContext(ctx->ac.context, instr->dest.ssa.bit_size);
3787 LLVMTypeRef vec_type =
3788 instr->dest.ssa.num_components == 1 ? comp_type :
3789 LLVMVectorType(comp_type, instr->dest.ssa.num_components);
3790 unsigned addr_space = LLVMGetPointerAddressSpace(LLVMTypeOf(ptr));
3791 ptr = LLVMBuildBitCast(ctx->ac.builder, ptr,
3792 LLVMPointerType(vec_type, addr_space), "");
3793 result = LLVMBuildLoad(ctx->ac.builder, ptr, "");
3794 break;
3795 }
3796 default:
3797 fprintf(stderr, "Unknown intrinsic: ");
3798 nir_print_instr(&instr->instr, stderr);
3799 fprintf(stderr, "\n");
3800 break;
3801 }
3802 if (result) {
3803 ctx->ssa_defs[instr->dest.ssa.index] = result;
3804 }
3805 }
3806
3807 static LLVMValueRef get_bindless_index_from_uniform(struct ac_nir_context *ctx,
3808 unsigned base_index,
3809 unsigned constant_index,
3810 LLVMValueRef dynamic_index)
3811 {
3812 LLVMValueRef offset = LLVMConstInt(ctx->ac.i32, base_index * 4, 0);
3813 LLVMValueRef index = LLVMBuildAdd(ctx->ac.builder, dynamic_index,
3814 LLVMConstInt(ctx->ac.i32, constant_index, 0), "");
3815
3816 /* Bindless uniforms are 64bit so multiple index by 8 */
3817 index = LLVMBuildMul(ctx->ac.builder, index, LLVMConstInt(ctx->ac.i32, 8, 0), "");
3818 offset = LLVMBuildAdd(ctx->ac.builder, offset, index, "");
3819
3820 LLVMValueRef ubo_index = ctx->abi->load_ubo(ctx->abi, ctx->ac.i32_0);
3821
3822 LLVMValueRef ret = ac_build_buffer_load(&ctx->ac, ubo_index, 1, NULL, offset,
3823 NULL, 0, 0, true, true);
3824
3825 return LLVMBuildBitCast(ctx->ac.builder, ret, ctx->ac.i32, "");
3826 }
3827
3828 static LLVMValueRef get_sampler_desc(struct ac_nir_context *ctx,
3829 nir_deref_instr *deref_instr,
3830 enum ac_descriptor_type desc_type,
3831 const nir_instr *instr,
3832 bool image, bool write)
3833 {
3834 LLVMValueRef index = NULL;
3835 unsigned constant_index = 0;
3836 unsigned descriptor_set;
3837 unsigned base_index;
3838 bool bindless = false;
3839
3840 if (!deref_instr) {
3841 descriptor_set = 0;
3842 if (image) {
3843 nir_intrinsic_instr *img_instr = nir_instr_as_intrinsic(instr);
3844 base_index = 0;
3845 bindless = true;
3846 index = get_src(ctx, img_instr->src[0]);
3847 } else {
3848 nir_tex_instr *tex_instr = nir_instr_as_tex(instr);
3849 int sampSrcIdx = nir_tex_instr_src_index(tex_instr,
3850 nir_tex_src_sampler_handle);
3851 if (sampSrcIdx != -1) {
3852 base_index = 0;
3853 bindless = true;
3854 index = get_src(ctx, tex_instr->src[sampSrcIdx].src);
3855 } else {
3856 assert(tex_instr && !image);
3857 base_index = tex_instr->sampler_index;
3858 }
3859 }
3860 } else {
3861 while(deref_instr->deref_type != nir_deref_type_var) {
3862 if (deref_instr->deref_type == nir_deref_type_array) {
3863 unsigned array_size = glsl_get_aoa_size(deref_instr->type);
3864 if (!array_size)
3865 array_size = 1;
3866
3867 if (nir_src_is_const(deref_instr->arr.index)) {
3868 constant_index += array_size * nir_src_as_uint(deref_instr->arr.index);
3869 } else {
3870 LLVMValueRef indirect = get_src(ctx, deref_instr->arr.index);
3871
3872 indirect = LLVMBuildMul(ctx->ac.builder, indirect,
3873 LLVMConstInt(ctx->ac.i32, array_size, false), "");
3874
3875 if (!index)
3876 index = indirect;
3877 else
3878 index = LLVMBuildAdd(ctx->ac.builder, index, indirect, "");
3879 }
3880
3881 deref_instr = nir_src_as_deref(deref_instr->parent);
3882 } else if (deref_instr->deref_type == nir_deref_type_struct) {
3883 unsigned sidx = deref_instr->strct.index;
3884 deref_instr = nir_src_as_deref(deref_instr->parent);
3885 constant_index += glsl_get_struct_location_offset(deref_instr->type, sidx);
3886 } else {
3887 unreachable("Unsupported deref type");
3888 }
3889 }
3890 descriptor_set = deref_instr->var->data.descriptor_set;
3891
3892 if (deref_instr->var->data.bindless) {
3893 /* For now just assert on unhandled variable types */
3894 assert(deref_instr->var->data.mode == nir_var_uniform);
3895
3896 base_index = deref_instr->var->data.driver_location;
3897 bindless = true;
3898
3899 index = index ? index : ctx->ac.i32_0;
3900 index = get_bindless_index_from_uniform(ctx, base_index,
3901 constant_index, index);
3902 } else
3903 base_index = deref_instr->var->data.binding;
3904 }
3905
3906 return ctx->abi->load_sampler_desc(ctx->abi,
3907 descriptor_set,
3908 base_index,
3909 constant_index, index,
3910 desc_type, image, write, bindless);
3911 }
3912
3913 /* Disable anisotropic filtering if BASE_LEVEL == LAST_LEVEL.
3914 *
3915 * GFX6-GFX7:
3916 * If BASE_LEVEL == LAST_LEVEL, the shader must disable anisotropic
3917 * filtering manually. The driver sets img7 to a mask clearing
3918 * MAX_ANISO_RATIO if BASE_LEVEL == LAST_LEVEL. The shader must do:
3919 * s_and_b32 samp0, samp0, img7
3920 *
3921 * GFX8:
3922 * The ANISO_OVERRIDE sampler field enables this fix in TA.
3923 */
3924 static LLVMValueRef sici_fix_sampler_aniso(struct ac_nir_context *ctx,
3925 LLVMValueRef res, LLVMValueRef samp)
3926 {
3927 LLVMBuilderRef builder = ctx->ac.builder;
3928 LLVMValueRef img7, samp0;
3929
3930 if (ctx->ac.chip_class >= GFX8)
3931 return samp;
3932
3933 img7 = LLVMBuildExtractElement(builder, res,
3934 LLVMConstInt(ctx->ac.i32, 7, 0), "");
3935 samp0 = LLVMBuildExtractElement(builder, samp,
3936 LLVMConstInt(ctx->ac.i32, 0, 0), "");
3937 samp0 = LLVMBuildAnd(builder, samp0, img7, "");
3938 return LLVMBuildInsertElement(builder, samp, samp0,
3939 LLVMConstInt(ctx->ac.i32, 0, 0), "");
3940 }
3941
3942 static void tex_fetch_ptrs(struct ac_nir_context *ctx,
3943 nir_tex_instr *instr,
3944 LLVMValueRef *res_ptr, LLVMValueRef *samp_ptr,
3945 LLVMValueRef *fmask_ptr)
3946 {
3947 nir_deref_instr *texture_deref_instr = NULL;
3948 nir_deref_instr *sampler_deref_instr = NULL;
3949 int plane = -1;
3950
3951 for (unsigned i = 0; i < instr->num_srcs; i++) {
3952 switch (instr->src[i].src_type) {
3953 case nir_tex_src_texture_deref:
3954 texture_deref_instr = nir_src_as_deref(instr->src[i].src);
3955 break;
3956 case nir_tex_src_sampler_deref:
3957 sampler_deref_instr = nir_src_as_deref(instr->src[i].src);
3958 break;
3959 case nir_tex_src_plane:
3960 plane = nir_src_as_int(instr->src[i].src);
3961 break;
3962 default:
3963 break;
3964 }
3965 }
3966
3967 if (!sampler_deref_instr)
3968 sampler_deref_instr = texture_deref_instr;
3969
3970 enum ac_descriptor_type main_descriptor = instr->sampler_dim == GLSL_SAMPLER_DIM_BUF ? AC_DESC_BUFFER : AC_DESC_IMAGE;
3971
3972 if (plane >= 0) {
3973 assert(instr->op != nir_texop_txf_ms &&
3974 instr->op != nir_texop_samples_identical);
3975 assert(instr->sampler_dim != GLSL_SAMPLER_DIM_BUF);
3976
3977 main_descriptor = AC_DESC_PLANE_0 + plane;
3978 }
3979
3980 *res_ptr = get_sampler_desc(ctx, texture_deref_instr, main_descriptor, &instr->instr, false, false);
3981
3982 if (samp_ptr) {
3983 *samp_ptr = get_sampler_desc(ctx, sampler_deref_instr, AC_DESC_SAMPLER, &instr->instr, false, false);
3984 if (instr->sampler_dim < GLSL_SAMPLER_DIM_RECT)
3985 *samp_ptr = sici_fix_sampler_aniso(ctx, *res_ptr, *samp_ptr);
3986 }
3987 if (fmask_ptr && (instr->op == nir_texop_txf_ms ||
3988 instr->op == nir_texop_samples_identical))
3989 *fmask_ptr = get_sampler_desc(ctx, texture_deref_instr, AC_DESC_FMASK, &instr->instr, false, false);
3990 }
3991
3992 static LLVMValueRef apply_round_slice(struct ac_llvm_context *ctx,
3993 LLVMValueRef coord)
3994 {
3995 coord = ac_to_float(ctx, coord);
3996 coord = ac_build_round(ctx, coord);
3997 coord = ac_to_integer(ctx, coord);
3998 return coord;
3999 }
4000
4001 static void visit_tex(struct ac_nir_context *ctx, nir_tex_instr *instr)
4002 {
4003 LLVMValueRef result = NULL;
4004 struct ac_image_args args = { 0 };
4005 LLVMValueRef fmask_ptr = NULL, sample_index = NULL;
4006 LLVMValueRef ddx = NULL, ddy = NULL;
4007 unsigned offset_src = 0;
4008
4009 tex_fetch_ptrs(ctx, instr, &args.resource, &args.sampler, &fmask_ptr);
4010
4011 for (unsigned i = 0; i < instr->num_srcs; i++) {
4012 switch (instr->src[i].src_type) {
4013 case nir_tex_src_coord: {
4014 LLVMValueRef coord = get_src(ctx, instr->src[i].src);
4015 for (unsigned chan = 0; chan < instr->coord_components; ++chan)
4016 args.coords[chan] = ac_llvm_extract_elem(&ctx->ac, coord, chan);
4017 break;
4018 }
4019 case nir_tex_src_projector:
4020 break;
4021 case nir_tex_src_comparator:
4022 if (instr->is_shadow)
4023 args.compare = get_src(ctx, instr->src[i].src);
4024 break;
4025 case nir_tex_src_offset:
4026 args.offset = get_src(ctx, instr->src[i].src);
4027 offset_src = i;
4028 break;
4029 case nir_tex_src_bias:
4030 if (instr->op == nir_texop_txb)
4031 args.bias = get_src(ctx, instr->src[i].src);
4032 break;
4033 case nir_tex_src_lod: {
4034 if (nir_src_is_const(instr->src[i].src) && nir_src_as_uint(instr->src[i].src) == 0)
4035 args.level_zero = true;
4036 else
4037 args.lod = get_src(ctx, instr->src[i].src);
4038 break;
4039 }
4040 case nir_tex_src_ms_index:
4041 sample_index = get_src(ctx, instr->src[i].src);
4042 break;
4043 case nir_tex_src_ms_mcs:
4044 break;
4045 case nir_tex_src_ddx:
4046 ddx = get_src(ctx, instr->src[i].src);
4047 break;
4048 case nir_tex_src_ddy:
4049 ddy = get_src(ctx, instr->src[i].src);
4050 break;
4051 case nir_tex_src_texture_offset:
4052 case nir_tex_src_sampler_offset:
4053 case nir_tex_src_plane:
4054 default:
4055 break;
4056 }
4057 }
4058
4059 if (instr->op == nir_texop_txs && instr->sampler_dim == GLSL_SAMPLER_DIM_BUF) {
4060 result = get_buffer_size(ctx, args.resource, true);
4061 goto write_result;
4062 }
4063
4064 if (instr->op == nir_texop_texture_samples) {
4065 LLVMValueRef res, samples, is_msaa;
4066 res = LLVMBuildBitCast(ctx->ac.builder, args.resource, ctx->ac.v8i32, "");
4067 samples = LLVMBuildExtractElement(ctx->ac.builder, res,
4068 LLVMConstInt(ctx->ac.i32, 3, false), "");
4069 is_msaa = LLVMBuildLShr(ctx->ac.builder, samples,
4070 LLVMConstInt(ctx->ac.i32, 28, false), "");
4071 is_msaa = LLVMBuildAnd(ctx->ac.builder, is_msaa,
4072 LLVMConstInt(ctx->ac.i32, 0xe, false), "");
4073 is_msaa = LLVMBuildICmp(ctx->ac.builder, LLVMIntEQ, is_msaa,
4074 LLVMConstInt(ctx->ac.i32, 0xe, false), "");
4075
4076 samples = LLVMBuildLShr(ctx->ac.builder, samples,
4077 LLVMConstInt(ctx->ac.i32, 16, false), "");
4078 samples = LLVMBuildAnd(ctx->ac.builder, samples,
4079 LLVMConstInt(ctx->ac.i32, 0xf, false), "");
4080 samples = LLVMBuildShl(ctx->ac.builder, ctx->ac.i32_1,
4081 samples, "");
4082 samples = LLVMBuildSelect(ctx->ac.builder, is_msaa, samples,
4083 ctx->ac.i32_1, "");
4084 result = samples;
4085 goto write_result;
4086 }
4087
4088 if (args.offset && instr->op != nir_texop_txf && instr->op != nir_texop_txf_ms) {
4089 LLVMValueRef offset[3], pack;
4090 for (unsigned chan = 0; chan < 3; ++chan)
4091 offset[chan] = ctx->ac.i32_0;
4092
4093 unsigned num_components = ac_get_llvm_num_components(args.offset);
4094 for (unsigned chan = 0; chan < num_components; chan++) {
4095 offset[chan] = ac_llvm_extract_elem(&ctx->ac, args.offset, chan);
4096 offset[chan] = LLVMBuildAnd(ctx->ac.builder, offset[chan],
4097 LLVMConstInt(ctx->ac.i32, 0x3f, false), "");
4098 if (chan)
4099 offset[chan] = LLVMBuildShl(ctx->ac.builder, offset[chan],
4100 LLVMConstInt(ctx->ac.i32, chan * 8, false), "");
4101 }
4102 pack = LLVMBuildOr(ctx->ac.builder, offset[0], offset[1], "");
4103 pack = LLVMBuildOr(ctx->ac.builder, pack, offset[2], "");
4104 args.offset = pack;
4105 }
4106
4107 /* TC-compatible HTILE on radeonsi promotes Z16 and Z24 to Z32_FLOAT,
4108 * so the depth comparison value isn't clamped for Z16 and
4109 * Z24 anymore. Do it manually here for GFX8-9; GFX10 has an explicitly
4110 * clamped 32-bit float format.
4111 *
4112 * It's unnecessary if the original texture format was
4113 * Z32_FLOAT, but we don't know that here.
4114 */
4115 if (args.compare &&
4116 ctx->ac.chip_class >= GFX8 &&
4117 ctx->ac.chip_class <= GFX9 &&
4118 ctx->abi->clamp_shadow_reference)
4119 args.compare = ac_build_clamp(&ctx->ac, ac_to_float(&ctx->ac, args.compare));
4120
4121 /* pack derivatives */
4122 if (ddx || ddy) {
4123 int num_src_deriv_channels, num_dest_deriv_channels;
4124 switch (instr->sampler_dim) {
4125 case GLSL_SAMPLER_DIM_3D:
4126 case GLSL_SAMPLER_DIM_CUBE:
4127 num_src_deriv_channels = 3;
4128 num_dest_deriv_channels = 3;
4129 break;
4130 case GLSL_SAMPLER_DIM_2D:
4131 default:
4132 num_src_deriv_channels = 2;
4133 num_dest_deriv_channels = 2;
4134 break;
4135 case GLSL_SAMPLER_DIM_1D:
4136 num_src_deriv_channels = 1;
4137 if (ctx->ac.chip_class == GFX9) {
4138 num_dest_deriv_channels = 2;
4139 } else {
4140 num_dest_deriv_channels = 1;
4141 }
4142 break;
4143 }
4144
4145 for (unsigned i = 0; i < num_src_deriv_channels; i++) {
4146 args.derivs[i] = ac_to_float(&ctx->ac,
4147 ac_llvm_extract_elem(&ctx->ac, ddx, i));
4148 args.derivs[num_dest_deriv_channels + i] = ac_to_float(&ctx->ac,
4149 ac_llvm_extract_elem(&ctx->ac, ddy, i));
4150 }
4151 for (unsigned i = num_src_deriv_channels; i < num_dest_deriv_channels; i++) {
4152 args.derivs[i] = ctx->ac.f32_0;
4153 args.derivs[num_dest_deriv_channels + i] = ctx->ac.f32_0;
4154 }
4155 }
4156
4157 if (instr->sampler_dim == GLSL_SAMPLER_DIM_CUBE && args.coords[0]) {
4158 for (unsigned chan = 0; chan < instr->coord_components; chan++)
4159 args.coords[chan] = ac_to_float(&ctx->ac, args.coords[chan]);
4160 if (instr->coord_components == 3)
4161 args.coords[3] = LLVMGetUndef(ctx->ac.f32);
4162 ac_prepare_cube_coords(&ctx->ac,
4163 instr->op == nir_texop_txd, instr->is_array,
4164 instr->op == nir_texop_lod, args.coords, args.derivs);
4165 }
4166
4167 /* Texture coordinates fixups */
4168 if (instr->coord_components > 1 &&
4169 instr->sampler_dim == GLSL_SAMPLER_DIM_1D &&
4170 instr->is_array &&
4171 instr->op != nir_texop_txf) {
4172 args.coords[1] = apply_round_slice(&ctx->ac, args.coords[1]);
4173 }
4174
4175 if (instr->coord_components > 2 &&
4176 (instr->sampler_dim == GLSL_SAMPLER_DIM_2D ||
4177 instr->sampler_dim == GLSL_SAMPLER_DIM_MS ||
4178 instr->sampler_dim == GLSL_SAMPLER_DIM_SUBPASS ||
4179 instr->sampler_dim == GLSL_SAMPLER_DIM_SUBPASS_MS) &&
4180 instr->is_array &&
4181 instr->op != nir_texop_txf && instr->op != nir_texop_txf_ms) {
4182 args.coords[2] = apply_round_slice(&ctx->ac, args.coords[2]);
4183 }
4184
4185 if (ctx->ac.chip_class == GFX9 &&
4186 instr->sampler_dim == GLSL_SAMPLER_DIM_1D &&
4187 instr->op != nir_texop_lod) {
4188 LLVMValueRef filler;
4189 if (instr->op == nir_texop_txf)
4190 filler = ctx->ac.i32_0;
4191 else
4192 filler = LLVMConstReal(ctx->ac.f32, 0.5);
4193
4194 if (instr->is_array)
4195 args.coords[2] = args.coords[1];
4196 args.coords[1] = filler;
4197 }
4198
4199 /* Pack sample index */
4200 if (instr->op == nir_texop_txf_ms && sample_index)
4201 args.coords[instr->coord_components] = sample_index;
4202
4203 if (instr->op == nir_texop_samples_identical) {
4204 struct ac_image_args txf_args = { 0 };
4205 memcpy(txf_args.coords, args.coords, sizeof(txf_args.coords));
4206
4207 txf_args.dmask = 0xf;
4208 txf_args.resource = fmask_ptr;
4209 txf_args.dim = instr->is_array ? ac_image_2darray : ac_image_2d;
4210 result = build_tex_intrinsic(ctx, instr, &txf_args);
4211
4212 result = LLVMBuildExtractElement(ctx->ac.builder, result, ctx->ac.i32_0, "");
4213 result = emit_int_cmp(&ctx->ac, LLVMIntEQ, result, ctx->ac.i32_0);
4214 goto write_result;
4215 }
4216
4217 if ((instr->sampler_dim == GLSL_SAMPLER_DIM_SUBPASS_MS ||
4218 instr->sampler_dim == GLSL_SAMPLER_DIM_MS) &&
4219 instr->op != nir_texop_txs) {
4220 unsigned sample_chan = instr->is_array ? 3 : 2;
4221 args.coords[sample_chan] = adjust_sample_index_using_fmask(
4222 &ctx->ac, args.coords[0], args.coords[1],
4223 instr->is_array ? args.coords[2] : NULL,
4224 args.coords[sample_chan], fmask_ptr);
4225 }
4226
4227 if (args.offset && (instr->op == nir_texop_txf || instr->op == nir_texop_txf_ms)) {
4228 int num_offsets = instr->src[offset_src].src.ssa->num_components;
4229 num_offsets = MIN2(num_offsets, instr->coord_components);
4230 for (unsigned i = 0; i < num_offsets; ++i) {
4231 args.coords[i] = LLVMBuildAdd(
4232 ctx->ac.builder, args.coords[i],
4233 LLVMConstInt(ctx->ac.i32, nir_src_comp_as_uint(instr->src[offset_src].src, i), false), "");
4234 }
4235 args.offset = NULL;
4236 }
4237
4238 /* DMASK was repurposed for GATHER4. 4 components are always
4239 * returned and DMASK works like a swizzle - it selects
4240 * the component to fetch. The only valid DMASK values are
4241 * 1=red, 2=green, 4=blue, 8=alpha. (e.g. 1 returns
4242 * (red,red,red,red) etc.) The ISA document doesn't mention
4243 * this.
4244 */
4245 args.dmask = 0xf;
4246 if (instr->op == nir_texop_tg4) {
4247 if (instr->is_shadow)
4248 args.dmask = 1;
4249 else
4250 args.dmask = 1 << instr->component;
4251 }
4252
4253 if (instr->sampler_dim != GLSL_SAMPLER_DIM_BUF)
4254 args.dim = get_ac_sampler_dim(&ctx->ac, instr->sampler_dim, instr->is_array);
4255 result = build_tex_intrinsic(ctx, instr, &args);
4256
4257 if (instr->op == nir_texop_query_levels)
4258 result = LLVMBuildExtractElement(ctx->ac.builder, result, LLVMConstInt(ctx->ac.i32, 3, false), "");
4259 else if (instr->is_shadow && instr->is_new_style_shadow &&
4260 instr->op != nir_texop_txs && instr->op != nir_texop_lod &&
4261 instr->op != nir_texop_tg4)
4262 result = LLVMBuildExtractElement(ctx->ac.builder, result, ctx->ac.i32_0, "");
4263 else if (instr->op == nir_texop_txs &&
4264 instr->sampler_dim == GLSL_SAMPLER_DIM_CUBE &&
4265 instr->is_array) {
4266 LLVMValueRef two = LLVMConstInt(ctx->ac.i32, 2, false);
4267 LLVMValueRef six = LLVMConstInt(ctx->ac.i32, 6, false);
4268 LLVMValueRef z = LLVMBuildExtractElement(ctx->ac.builder, result, two, "");
4269 z = LLVMBuildSDiv(ctx->ac.builder, z, six, "");
4270 result = LLVMBuildInsertElement(ctx->ac.builder, result, z, two, "");
4271 } else if (ctx->ac.chip_class == GFX9 &&
4272 instr->op == nir_texop_txs &&
4273 instr->sampler_dim == GLSL_SAMPLER_DIM_1D &&
4274 instr->is_array) {
4275 LLVMValueRef two = LLVMConstInt(ctx->ac.i32, 2, false);
4276 LLVMValueRef layers = LLVMBuildExtractElement(ctx->ac.builder, result, two, "");
4277 result = LLVMBuildInsertElement(ctx->ac.builder, result, layers,
4278 ctx->ac.i32_1, "");
4279 } else if (instr->dest.ssa.num_components != 4)
4280 result = ac_trim_vector(&ctx->ac, result, instr->dest.ssa.num_components);
4281
4282 write_result:
4283 if (result) {
4284 assert(instr->dest.is_ssa);
4285 result = ac_to_integer(&ctx->ac, result);
4286 ctx->ssa_defs[instr->dest.ssa.index] = result;
4287 }
4288 }
4289
4290
4291 static void visit_phi(struct ac_nir_context *ctx, nir_phi_instr *instr)
4292 {
4293 LLVMTypeRef type = get_def_type(ctx, &instr->dest.ssa);
4294 LLVMValueRef result = LLVMBuildPhi(ctx->ac.builder, type, "");
4295
4296 ctx->ssa_defs[instr->dest.ssa.index] = result;
4297 _mesa_hash_table_insert(ctx->phis, instr, result);
4298 }
4299
4300 static void visit_post_phi(struct ac_nir_context *ctx,
4301 nir_phi_instr *instr,
4302 LLVMValueRef llvm_phi)
4303 {
4304 nir_foreach_phi_src(src, instr) {
4305 LLVMBasicBlockRef block = get_block(ctx, src->pred);
4306 LLVMValueRef llvm_src = get_src(ctx, src->src);
4307
4308 LLVMAddIncoming(llvm_phi, &llvm_src, &block, 1);
4309 }
4310 }
4311
4312 static void phi_post_pass(struct ac_nir_context *ctx)
4313 {
4314 hash_table_foreach(ctx->phis, entry) {
4315 visit_post_phi(ctx, (nir_phi_instr*)entry->key,
4316 (LLVMValueRef)entry->data);
4317 }
4318 }
4319
4320
4321 static void visit_ssa_undef(struct ac_nir_context *ctx,
4322 const nir_ssa_undef_instr *instr)
4323 {
4324 unsigned num_components = instr->def.num_components;
4325 LLVMTypeRef type = LLVMIntTypeInContext(ctx->ac.context, instr->def.bit_size);
4326 LLVMValueRef undef;
4327
4328 if (num_components == 1)
4329 undef = LLVMGetUndef(type);
4330 else {
4331 undef = LLVMGetUndef(LLVMVectorType(type, num_components));
4332 }
4333 ctx->ssa_defs[instr->def.index] = undef;
4334 }
4335
4336 static void visit_jump(struct ac_llvm_context *ctx,
4337 const nir_jump_instr *instr)
4338 {
4339 switch (instr->type) {
4340 case nir_jump_break:
4341 ac_build_break(ctx);
4342 break;
4343 case nir_jump_continue:
4344 ac_build_continue(ctx);
4345 break;
4346 default:
4347 fprintf(stderr, "Unknown NIR jump instr: ");
4348 nir_print_instr(&instr->instr, stderr);
4349 fprintf(stderr, "\n");
4350 abort();
4351 }
4352 }
4353
4354 static LLVMTypeRef
4355 glsl_base_to_llvm_type(struct ac_llvm_context *ac,
4356 enum glsl_base_type type)
4357 {
4358 switch (type) {
4359 case GLSL_TYPE_INT:
4360 case GLSL_TYPE_UINT:
4361 case GLSL_TYPE_BOOL:
4362 case GLSL_TYPE_SUBROUTINE:
4363 return ac->i32;
4364 case GLSL_TYPE_INT8:
4365 case GLSL_TYPE_UINT8:
4366 return ac->i8;
4367 case GLSL_TYPE_INT16:
4368 case GLSL_TYPE_UINT16:
4369 return ac->i16;
4370 case GLSL_TYPE_FLOAT:
4371 return ac->f32;
4372 case GLSL_TYPE_FLOAT16:
4373 return ac->f16;
4374 case GLSL_TYPE_INT64:
4375 case GLSL_TYPE_UINT64:
4376 return ac->i64;
4377 case GLSL_TYPE_DOUBLE:
4378 return ac->f64;
4379 default:
4380 unreachable("unknown GLSL type");
4381 }
4382 }
4383
4384 static LLVMTypeRef
4385 glsl_to_llvm_type(struct ac_llvm_context *ac,
4386 const struct glsl_type *type)
4387 {
4388 if (glsl_type_is_scalar(type)) {
4389 return glsl_base_to_llvm_type(ac, glsl_get_base_type(type));
4390 }
4391
4392 if (glsl_type_is_vector(type)) {
4393 return LLVMVectorType(
4394 glsl_base_to_llvm_type(ac, glsl_get_base_type(type)),
4395 glsl_get_vector_elements(type));
4396 }
4397
4398 if (glsl_type_is_matrix(type)) {
4399 return LLVMArrayType(
4400 glsl_to_llvm_type(ac, glsl_get_column_type(type)),
4401 glsl_get_matrix_columns(type));
4402 }
4403
4404 if (glsl_type_is_array(type)) {
4405 return LLVMArrayType(
4406 glsl_to_llvm_type(ac, glsl_get_array_element(type)),
4407 glsl_get_length(type));
4408 }
4409
4410 assert(glsl_type_is_struct_or_ifc(type));
4411
4412 LLVMTypeRef member_types[glsl_get_length(type)];
4413
4414 for (unsigned i = 0; i < glsl_get_length(type); i++) {
4415 member_types[i] =
4416 glsl_to_llvm_type(ac,
4417 glsl_get_struct_field(type, i));
4418 }
4419
4420 return LLVMStructTypeInContext(ac->context, member_types,
4421 glsl_get_length(type), false);
4422 }
4423
4424 static void visit_deref(struct ac_nir_context *ctx,
4425 nir_deref_instr *instr)
4426 {
4427 if (instr->mode != nir_var_mem_shared &&
4428 instr->mode != nir_var_mem_global)
4429 return;
4430
4431 LLVMValueRef result = NULL;
4432 switch(instr->deref_type) {
4433 case nir_deref_type_var: {
4434 struct hash_entry *entry = _mesa_hash_table_search(ctx->vars, instr->var);
4435 result = entry->data;
4436 break;
4437 }
4438 case nir_deref_type_struct:
4439 if (instr->mode == nir_var_mem_global) {
4440 nir_deref_instr *parent = nir_deref_instr_parent(instr);
4441 uint64_t offset = glsl_get_struct_field_offset(parent->type,
4442 instr->strct.index);
4443 result = ac_build_gep_ptr(&ctx->ac, get_src(ctx, instr->parent),
4444 LLVMConstInt(ctx->ac.i32, offset, 0));
4445 } else {
4446 result = ac_build_gep0(&ctx->ac, get_src(ctx, instr->parent),
4447 LLVMConstInt(ctx->ac.i32, instr->strct.index, 0));
4448 }
4449 break;
4450 case nir_deref_type_array:
4451 if (instr->mode == nir_var_mem_global) {
4452 nir_deref_instr *parent = nir_deref_instr_parent(instr);
4453 unsigned stride = glsl_get_explicit_stride(parent->type);
4454
4455 if ((glsl_type_is_matrix(parent->type) &&
4456 glsl_matrix_type_is_row_major(parent->type)) ||
4457 (glsl_type_is_vector(parent->type) && stride == 0))
4458 stride = type_scalar_size_bytes(parent->type);
4459
4460 assert(stride > 0);
4461 LLVMValueRef index = get_src(ctx, instr->arr.index);
4462 if (LLVMTypeOf(index) != ctx->ac.i64)
4463 index = LLVMBuildZExt(ctx->ac.builder, index, ctx->ac.i64, "");
4464
4465 LLVMValueRef offset = LLVMBuildMul(ctx->ac.builder, index, LLVMConstInt(ctx->ac.i64, stride, 0), "");
4466
4467 result = ac_build_gep_ptr(&ctx->ac, get_src(ctx, instr->parent), offset);
4468 } else {
4469 result = ac_build_gep0(&ctx->ac, get_src(ctx, instr->parent),
4470 get_src(ctx, instr->arr.index));
4471 }
4472 break;
4473 case nir_deref_type_ptr_as_array:
4474 if (instr->mode == nir_var_mem_global) {
4475 unsigned stride = nir_deref_instr_ptr_as_array_stride(instr);
4476
4477 LLVMValueRef index = get_src(ctx, instr->arr.index);
4478 if (LLVMTypeOf(index) != ctx->ac.i64)
4479 index = LLVMBuildZExt(ctx->ac.builder, index, ctx->ac.i64, "");
4480
4481 LLVMValueRef offset = LLVMBuildMul(ctx->ac.builder, index, LLVMConstInt(ctx->ac.i64, stride, 0), "");
4482
4483 result = ac_build_gep_ptr(&ctx->ac, get_src(ctx, instr->parent), offset);
4484 } else {
4485 result = ac_build_gep_ptr(&ctx->ac, get_src(ctx, instr->parent),
4486 get_src(ctx, instr->arr.index));
4487 }
4488 break;
4489 case nir_deref_type_cast: {
4490 result = get_src(ctx, instr->parent);
4491
4492 /* We can't use the structs from LLVM because the shader
4493 * specifies its own offsets. */
4494 LLVMTypeRef pointee_type = ctx->ac.i8;
4495 if (instr->mode == nir_var_mem_shared)
4496 pointee_type = glsl_to_llvm_type(&ctx->ac, instr->type);
4497
4498 unsigned address_space;
4499
4500 switch(instr->mode) {
4501 case nir_var_mem_shared:
4502 address_space = AC_ADDR_SPACE_LDS;
4503 break;
4504 case nir_var_mem_global:
4505 address_space = AC_ADDR_SPACE_GLOBAL;
4506 break;
4507 default:
4508 unreachable("Unhandled address space");
4509 }
4510
4511 LLVMTypeRef type = LLVMPointerType(pointee_type, address_space);
4512
4513 if (LLVMTypeOf(result) != type) {
4514 if (LLVMGetTypeKind(LLVMTypeOf(result)) == LLVMVectorTypeKind) {
4515 result = LLVMBuildBitCast(ctx->ac.builder, result,
4516 type, "");
4517 } else {
4518 result = LLVMBuildIntToPtr(ctx->ac.builder, result,
4519 type, "");
4520 }
4521 }
4522 break;
4523 }
4524 default:
4525 unreachable("Unhandled deref_instr deref type");
4526 }
4527
4528 ctx->ssa_defs[instr->dest.ssa.index] = result;
4529 }
4530
4531 static void visit_cf_list(struct ac_nir_context *ctx,
4532 struct exec_list *list);
4533
4534 static void visit_block(struct ac_nir_context *ctx, nir_block *block)
4535 {
4536 nir_foreach_instr(instr, block)
4537 {
4538 switch (instr->type) {
4539 case nir_instr_type_alu:
4540 visit_alu(ctx, nir_instr_as_alu(instr));
4541 break;
4542 case nir_instr_type_load_const:
4543 visit_load_const(ctx, nir_instr_as_load_const(instr));
4544 break;
4545 case nir_instr_type_intrinsic:
4546 visit_intrinsic(ctx, nir_instr_as_intrinsic(instr));
4547 break;
4548 case nir_instr_type_tex:
4549 visit_tex(ctx, nir_instr_as_tex(instr));
4550 break;
4551 case nir_instr_type_phi:
4552 visit_phi(ctx, nir_instr_as_phi(instr));
4553 break;
4554 case nir_instr_type_ssa_undef:
4555 visit_ssa_undef(ctx, nir_instr_as_ssa_undef(instr));
4556 break;
4557 case nir_instr_type_jump:
4558 visit_jump(&ctx->ac, nir_instr_as_jump(instr));
4559 break;
4560 case nir_instr_type_deref:
4561 visit_deref(ctx, nir_instr_as_deref(instr));
4562 break;
4563 default:
4564 fprintf(stderr, "Unknown NIR instr type: ");
4565 nir_print_instr(instr, stderr);
4566 fprintf(stderr, "\n");
4567 abort();
4568 }
4569 }
4570
4571 _mesa_hash_table_insert(ctx->defs, block,
4572 LLVMGetInsertBlock(ctx->ac.builder));
4573 }
4574
4575 static void visit_if(struct ac_nir_context *ctx, nir_if *if_stmt)
4576 {
4577 LLVMValueRef value = get_src(ctx, if_stmt->condition);
4578
4579 nir_block *then_block =
4580 (nir_block *) exec_list_get_head(&if_stmt->then_list);
4581
4582 ac_build_uif(&ctx->ac, value, then_block->index);
4583
4584 visit_cf_list(ctx, &if_stmt->then_list);
4585
4586 if (!exec_list_is_empty(&if_stmt->else_list)) {
4587 nir_block *else_block =
4588 (nir_block *) exec_list_get_head(&if_stmt->else_list);
4589
4590 ac_build_else(&ctx->ac, else_block->index);
4591 visit_cf_list(ctx, &if_stmt->else_list);
4592 }
4593
4594 ac_build_endif(&ctx->ac, then_block->index);
4595 }
4596
4597 static void visit_loop(struct ac_nir_context *ctx, nir_loop *loop)
4598 {
4599 nir_block *first_loop_block =
4600 (nir_block *) exec_list_get_head(&loop->body);
4601
4602 ac_build_bgnloop(&ctx->ac, first_loop_block->index);
4603
4604 visit_cf_list(ctx, &loop->body);
4605
4606 ac_build_endloop(&ctx->ac, first_loop_block->index);
4607 }
4608
4609 static void visit_cf_list(struct ac_nir_context *ctx,
4610 struct exec_list *list)
4611 {
4612 foreach_list_typed(nir_cf_node, node, node, list)
4613 {
4614 switch (node->type) {
4615 case nir_cf_node_block:
4616 visit_block(ctx, nir_cf_node_as_block(node));
4617 break;
4618
4619 case nir_cf_node_if:
4620 visit_if(ctx, nir_cf_node_as_if(node));
4621 break;
4622
4623 case nir_cf_node_loop:
4624 visit_loop(ctx, nir_cf_node_as_loop(node));
4625 break;
4626
4627 default:
4628 assert(0);
4629 }
4630 }
4631 }
4632
4633 void
4634 ac_handle_shader_output_decl(struct ac_llvm_context *ctx,
4635 struct ac_shader_abi *abi,
4636 struct nir_shader *nir,
4637 struct nir_variable *variable,
4638 gl_shader_stage stage)
4639 {
4640 unsigned output_loc = variable->data.driver_location / 4;
4641 unsigned attrib_count = glsl_count_attribute_slots(variable->type, false);
4642
4643 /* tess ctrl has it's own load/store paths for outputs */
4644 if (stage == MESA_SHADER_TESS_CTRL)
4645 return;
4646
4647 if (stage == MESA_SHADER_VERTEX ||
4648 stage == MESA_SHADER_TESS_EVAL ||
4649 stage == MESA_SHADER_GEOMETRY) {
4650 int idx = variable->data.location + variable->data.index;
4651 if (idx == VARYING_SLOT_CLIP_DIST0) {
4652 int length = nir->info.clip_distance_array_size +
4653 nir->info.cull_distance_array_size;
4654
4655 if (length > 4)
4656 attrib_count = 2;
4657 else
4658 attrib_count = 1;
4659 }
4660 }
4661
4662 bool is_16bit = glsl_type_is_16bit(glsl_without_array(variable->type));
4663 LLVMTypeRef type = is_16bit ? ctx->f16 : ctx->f32;
4664 for (unsigned i = 0; i < attrib_count; ++i) {
4665 for (unsigned chan = 0; chan < 4; chan++) {
4666 abi->outputs[ac_llvm_reg_index_soa(output_loc + i, chan)] =
4667 ac_build_alloca_undef(ctx, type, "");
4668 }
4669 }
4670 }
4671
4672 static void
4673 setup_locals(struct ac_nir_context *ctx,
4674 struct nir_function *func)
4675 {
4676 int i, j;
4677 ctx->num_locals = 0;
4678 nir_foreach_variable(variable, &func->impl->locals) {
4679 unsigned attrib_count = glsl_count_attribute_slots(variable->type, false);
4680 variable->data.driver_location = ctx->num_locals * 4;
4681 variable->data.location_frac = 0;
4682 ctx->num_locals += attrib_count;
4683 }
4684 ctx->locals = malloc(4 * ctx->num_locals * sizeof(LLVMValueRef));
4685 if (!ctx->locals)
4686 return;
4687
4688 for (i = 0; i < ctx->num_locals; i++) {
4689 for (j = 0; j < 4; j++) {
4690 ctx->locals[i * 4 + j] =
4691 ac_build_alloca_undef(&ctx->ac, ctx->ac.f32, "temp");
4692 }
4693 }
4694 }
4695
4696 static void
4697 setup_scratch(struct ac_nir_context *ctx,
4698 struct nir_shader *shader)
4699 {
4700 if (shader->scratch_size == 0)
4701 return;
4702
4703 ctx->scratch = ac_build_alloca_undef(&ctx->ac,
4704 LLVMArrayType(ctx->ac.i8, shader->scratch_size),
4705 "scratch");
4706 }
4707
4708 static void
4709 setup_constant_data(struct ac_nir_context *ctx,
4710 struct nir_shader *shader)
4711 {
4712 if (!shader->constant_data)
4713 return;
4714
4715 LLVMValueRef data =
4716 LLVMConstStringInContext(ctx->ac.context,
4717 shader->constant_data,
4718 shader->constant_data_size,
4719 true);
4720 LLVMTypeRef type = LLVMArrayType(ctx->ac.i8, shader->constant_data_size);
4721
4722 /* We want to put the constant data in the CONST address space so that
4723 * we can use scalar loads. However, LLVM versions before 10 put these
4724 * variables in the same section as the code, which is unacceptable
4725 * for RadeonSI as it needs to relocate all the data sections after
4726 * the code sections. See https://reviews.llvm.org/D65813.
4727 */
4728 unsigned address_space =
4729 LLVM_VERSION_MAJOR < 10 ? AC_ADDR_SPACE_GLOBAL : AC_ADDR_SPACE_CONST;
4730
4731 LLVMValueRef global =
4732 LLVMAddGlobalInAddressSpace(ctx->ac.module, type,
4733 "const_data",
4734 address_space);
4735
4736 LLVMSetInitializer(global, data);
4737 LLVMSetGlobalConstant(global, true);
4738 LLVMSetVisibility(global, LLVMHiddenVisibility);
4739 ctx->constant_data = global;
4740 }
4741
4742 static void
4743 setup_shared(struct ac_nir_context *ctx,
4744 struct nir_shader *nir)
4745 {
4746 nir_foreach_variable(variable, &nir->shared) {
4747 LLVMValueRef shared =
4748 LLVMAddGlobalInAddressSpace(
4749 ctx->ac.module, glsl_to_llvm_type(&ctx->ac, variable->type),
4750 variable->name ? variable->name : "",
4751 AC_ADDR_SPACE_LDS);
4752 _mesa_hash_table_insert(ctx->vars, variable, shared);
4753 }
4754 }
4755
4756 void ac_nir_translate(struct ac_llvm_context *ac, struct ac_shader_abi *abi,
4757 struct nir_shader *nir)
4758 {
4759 struct ac_nir_context ctx = {};
4760 struct nir_function *func;
4761
4762 ctx.ac = *ac;
4763 ctx.abi = abi;
4764
4765 ctx.stage = nir->info.stage;
4766 ctx.info = &nir->info;
4767
4768 ctx.main_function = LLVMGetBasicBlockParent(LLVMGetInsertBlock(ctx.ac.builder));
4769
4770 nir_foreach_variable(variable, &nir->outputs)
4771 ac_handle_shader_output_decl(&ctx.ac, ctx.abi, nir, variable,
4772 ctx.stage);
4773
4774 ctx.defs = _mesa_hash_table_create(NULL, _mesa_hash_pointer,
4775 _mesa_key_pointer_equal);
4776 ctx.phis = _mesa_hash_table_create(NULL, _mesa_hash_pointer,
4777 _mesa_key_pointer_equal);
4778 ctx.vars = _mesa_hash_table_create(NULL, _mesa_hash_pointer,
4779 _mesa_key_pointer_equal);
4780
4781 func = (struct nir_function *)exec_list_get_head(&nir->functions);
4782
4783 nir_index_ssa_defs(func->impl);
4784 ctx.ssa_defs = calloc(func->impl->ssa_alloc, sizeof(LLVMValueRef));
4785
4786 setup_locals(&ctx, func);
4787 setup_scratch(&ctx, nir);
4788 setup_constant_data(&ctx, nir);
4789
4790 if (gl_shader_stage_is_compute(nir->info.stage))
4791 setup_shared(&ctx, nir);
4792
4793 visit_cf_list(&ctx, &func->impl->body);
4794 phi_post_pass(&ctx);
4795
4796 if (!gl_shader_stage_is_compute(nir->info.stage))
4797 ctx.abi->emit_outputs(ctx.abi, AC_LLVM_MAX_OUTPUTS,
4798 ctx.abi->outputs);
4799
4800 free(ctx.locals);
4801 free(ctx.ssa_defs);
4802 ralloc_free(ctx.defs);
4803 ralloc_free(ctx.phis);
4804 ralloc_free(ctx.vars);
4805 }
4806
4807 void
4808 ac_lower_indirect_derefs(struct nir_shader *nir, enum chip_class chip_class)
4809 {
4810 /* Lower large variables to scratch first so that we won't bloat the
4811 * shader by generating large if ladders for them. We later lower
4812 * scratch to alloca's, assuming LLVM won't generate VGPR indexing.
4813 */
4814 NIR_PASS_V(nir, nir_lower_vars_to_scratch,
4815 nir_var_function_temp,
4816 256,
4817 glsl_get_natural_size_align_bytes);
4818
4819 /* While it would be nice not to have this flag, we are constrained
4820 * by the reality that LLVM 9.0 has buggy VGPR indexing on GFX9.
4821 */
4822 bool llvm_has_working_vgpr_indexing = chip_class != GFX9;
4823
4824 /* TODO: Indirect indexing of GS inputs is unimplemented.
4825 *
4826 * TCS and TES load inputs directly from LDS or offchip memory, so
4827 * indirect indexing is trivial.
4828 */
4829 nir_variable_mode indirect_mask = 0;
4830 if (nir->info.stage == MESA_SHADER_GEOMETRY ||
4831 (nir->info.stage != MESA_SHADER_TESS_CTRL &&
4832 nir->info.stage != MESA_SHADER_TESS_EVAL &&
4833 !llvm_has_working_vgpr_indexing)) {
4834 indirect_mask |= nir_var_shader_in;
4835 }
4836 if (!llvm_has_working_vgpr_indexing &&
4837 nir->info.stage != MESA_SHADER_TESS_CTRL)
4838 indirect_mask |= nir_var_shader_out;
4839
4840 /* TODO: We shouldn't need to do this, however LLVM isn't currently
4841 * smart enough to handle indirects without causing excess spilling
4842 * causing the gpu to hang.
4843 *
4844 * See the following thread for more details of the problem:
4845 * https://lists.freedesktop.org/archives/mesa-dev/2017-July/162106.html
4846 */
4847 indirect_mask |= nir_var_function_temp;
4848
4849 nir_lower_indirect_derefs(nir, indirect_mask);
4850 }
4851
4852 static unsigned
4853 get_inst_tessfactor_writemask(nir_intrinsic_instr *intrin)
4854 {
4855 if (intrin->intrinsic != nir_intrinsic_store_deref)
4856 return 0;
4857
4858 nir_variable *var =
4859 nir_deref_instr_get_variable(nir_src_as_deref(intrin->src[0]));
4860
4861 if (var->data.mode != nir_var_shader_out)
4862 return 0;
4863
4864 unsigned writemask = 0;
4865 const int location = var->data.location;
4866 unsigned first_component = var->data.location_frac;
4867 unsigned num_comps = intrin->dest.ssa.num_components;
4868
4869 if (location == VARYING_SLOT_TESS_LEVEL_INNER)
4870 writemask = ((1 << (num_comps + 1)) - 1) << first_component;
4871 else if (location == VARYING_SLOT_TESS_LEVEL_OUTER)
4872 writemask = (((1 << (num_comps + 1)) - 1) << first_component) << 4;
4873
4874 return writemask;
4875 }
4876
4877 static void
4878 scan_tess_ctrl(nir_cf_node *cf_node, unsigned *upper_block_tf_writemask,
4879 unsigned *cond_block_tf_writemask,
4880 bool *tessfactors_are_def_in_all_invocs, bool is_nested_cf)
4881 {
4882 switch (cf_node->type) {
4883 case nir_cf_node_block: {
4884 nir_block *block = nir_cf_node_as_block(cf_node);
4885 nir_foreach_instr(instr, block) {
4886 if (instr->type != nir_instr_type_intrinsic)
4887 continue;
4888
4889 nir_intrinsic_instr *intrin = nir_instr_as_intrinsic(instr);
4890 if (intrin->intrinsic == nir_intrinsic_barrier) {
4891
4892 /* If we find a barrier in nested control flow put this in the
4893 * too hard basket. In GLSL this is not possible but it is in
4894 * SPIR-V.
4895 */
4896 if (is_nested_cf) {
4897 *tessfactors_are_def_in_all_invocs = false;
4898 return;
4899 }
4900
4901 /* The following case must be prevented:
4902 * gl_TessLevelInner = ...;
4903 * barrier();
4904 * if (gl_InvocationID == 1)
4905 * gl_TessLevelInner = ...;
4906 *
4907 * If you consider disjoint code segments separated by barriers, each
4908 * such segment that writes tess factor channels should write the same
4909 * channels in all codepaths within that segment.
4910 */
4911 if (upper_block_tf_writemask || cond_block_tf_writemask) {
4912 /* Accumulate the result: */
4913 *tessfactors_are_def_in_all_invocs &=
4914 !(*cond_block_tf_writemask & ~(*upper_block_tf_writemask));
4915
4916 /* Analyze the next code segment from scratch. */
4917 *upper_block_tf_writemask = 0;
4918 *cond_block_tf_writemask = 0;
4919 }
4920 } else
4921 *upper_block_tf_writemask |= get_inst_tessfactor_writemask(intrin);
4922 }
4923
4924 break;
4925 }
4926 case nir_cf_node_if: {
4927 unsigned then_tessfactor_writemask = 0;
4928 unsigned else_tessfactor_writemask = 0;
4929
4930 nir_if *if_stmt = nir_cf_node_as_if(cf_node);
4931 foreach_list_typed(nir_cf_node, nested_node, node, &if_stmt->then_list) {
4932 scan_tess_ctrl(nested_node, &then_tessfactor_writemask,
4933 cond_block_tf_writemask,
4934 tessfactors_are_def_in_all_invocs, true);
4935 }
4936
4937 foreach_list_typed(nir_cf_node, nested_node, node, &if_stmt->else_list) {
4938 scan_tess_ctrl(nested_node, &else_tessfactor_writemask,
4939 cond_block_tf_writemask,
4940 tessfactors_are_def_in_all_invocs, true);
4941 }
4942
4943 if (then_tessfactor_writemask || else_tessfactor_writemask) {
4944 /* If both statements write the same tess factor channels,
4945 * we can say that the upper block writes them too.
4946 */
4947 *upper_block_tf_writemask |= then_tessfactor_writemask &
4948 else_tessfactor_writemask;
4949 *cond_block_tf_writemask |= then_tessfactor_writemask |
4950 else_tessfactor_writemask;
4951 }
4952
4953 break;
4954 }
4955 case nir_cf_node_loop: {
4956 nir_loop *loop = nir_cf_node_as_loop(cf_node);
4957 foreach_list_typed(nir_cf_node, nested_node, node, &loop->body) {
4958 scan_tess_ctrl(nested_node, cond_block_tf_writemask,
4959 cond_block_tf_writemask,
4960 tessfactors_are_def_in_all_invocs, true);
4961 }
4962
4963 break;
4964 }
4965 default:
4966 unreachable("unknown cf node type");
4967 }
4968 }
4969
4970 bool
4971 ac_are_tessfactors_def_in_all_invocs(const struct nir_shader *nir)
4972 {
4973 assert(nir->info.stage == MESA_SHADER_TESS_CTRL);
4974
4975 /* The pass works as follows:
4976 * If all codepaths write tess factors, we can say that all
4977 * invocations define tess factors.
4978 *
4979 * Each tess factor channel is tracked separately.
4980 */
4981 unsigned main_block_tf_writemask = 0; /* if main block writes tess factors */
4982 unsigned cond_block_tf_writemask = 0; /* if cond block writes tess factors */
4983
4984 /* Initial value = true. Here the pass will accumulate results from
4985 * multiple segments surrounded by barriers. If tess factors aren't
4986 * written at all, it's a shader bug and we don't care if this will be
4987 * true.
4988 */
4989 bool tessfactors_are_def_in_all_invocs = true;
4990
4991 nir_foreach_function(function, nir) {
4992 if (function->impl) {
4993 foreach_list_typed(nir_cf_node, node, node, &function->impl->body) {
4994 scan_tess_ctrl(node, &main_block_tf_writemask,
4995 &cond_block_tf_writemask,
4996 &tessfactors_are_def_in_all_invocs,
4997 false);
4998 }
4999 }
5000 }
5001
5002 /* Accumulate the result for the last code segment separated by a
5003 * barrier.
5004 */
5005 if (main_block_tf_writemask || cond_block_tf_writemask) {
5006 tessfactors_are_def_in_all_invocs &=
5007 !(cond_block_tf_writemask & ~main_block_tf_writemask);
5008 }
5009
5010 return tessfactors_are_def_in_all_invocs;
5011 }