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radv/ac: Use base in push constant loads.
[mesa.git] / src / amd / common / ac_nir_to_llvm.c
1 /*
2 * Copyright © 2016 Bas Nieuwenhuizen
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
21 * IN THE SOFTWARE.
22 */
23
24 #include "ac_nir_to_llvm.h"
25 #include "ac_llvm_util.h"
26 #include "ac_binary.h"
27 #include "sid.h"
28 #include "nir/nir.h"
29 #include "../vulkan/radv_descriptor_set.h"
30 #include "util/bitscan.h"
31 #include <llvm-c/Transforms/Scalar.h>
32
33 enum radeon_llvm_calling_convention {
34 RADEON_LLVM_AMDGPU_VS = 87,
35 RADEON_LLVM_AMDGPU_GS = 88,
36 RADEON_LLVM_AMDGPU_PS = 89,
37 RADEON_LLVM_AMDGPU_CS = 90,
38 };
39
40 #define CONST_ADDR_SPACE 2
41 #define LOCAL_ADDR_SPACE 3
42
43 #define RADEON_LLVM_MAX_INPUTS (VARYING_SLOT_VAR31 + 1)
44 #define RADEON_LLVM_MAX_OUTPUTS (VARYING_SLOT_VAR31 + 1)
45
46 enum desc_type {
47 DESC_IMAGE,
48 DESC_FMASK,
49 DESC_SAMPLER,
50 DESC_BUFFER,
51 };
52
53 struct nir_to_llvm_context {
54 struct ac_llvm_context ac;
55 const struct ac_nir_compiler_options *options;
56 struct ac_shader_variant_info *shader_info;
57
58 LLVMContextRef context;
59 LLVMModuleRef module;
60 LLVMBuilderRef builder;
61 LLVMValueRef main_function;
62
63 struct hash_table *defs;
64 struct hash_table *phis;
65
66 LLVMValueRef descriptor_sets[AC_UD_MAX_SETS];
67 LLVMValueRef push_constants;
68 LLVMValueRef num_work_groups;
69 LLVMValueRef workgroup_ids;
70 LLVMValueRef local_invocation_ids;
71 LLVMValueRef tg_size;
72
73 LLVMValueRef vertex_buffers;
74 LLVMValueRef base_vertex;
75 LLVMValueRef start_instance;
76 LLVMValueRef vertex_id;
77 LLVMValueRef rel_auto_id;
78 LLVMValueRef vs_prim_id;
79 LLVMValueRef instance_id;
80
81 LLVMValueRef prim_mask;
82 LLVMValueRef sample_positions;
83 LLVMValueRef persp_sample, persp_center, persp_centroid;
84 LLVMValueRef linear_sample, linear_center, linear_centroid;
85 LLVMValueRef front_face;
86 LLVMValueRef ancillary;
87 LLVMValueRef frag_pos[4];
88
89 LLVMBasicBlockRef continue_block;
90 LLVMBasicBlockRef break_block;
91
92 LLVMTypeRef i1;
93 LLVMTypeRef i8;
94 LLVMTypeRef i16;
95 LLVMTypeRef i32;
96 LLVMTypeRef i64;
97 LLVMTypeRef v2i32;
98 LLVMTypeRef v3i32;
99 LLVMTypeRef v4i32;
100 LLVMTypeRef v8i32;
101 LLVMTypeRef f32;
102 LLVMTypeRef f16;
103 LLVMTypeRef v2f32;
104 LLVMTypeRef v4f32;
105 LLVMTypeRef v16i8;
106 LLVMTypeRef voidt;
107
108 LLVMValueRef i32zero;
109 LLVMValueRef i32one;
110 LLVMValueRef f32zero;
111 LLVMValueRef f32one;
112 LLVMValueRef v4f32empty;
113
114 unsigned range_md_kind;
115 unsigned uniform_md_kind;
116 unsigned invariant_load_md_kind;
117 LLVMValueRef empty_md;
118 gl_shader_stage stage;
119
120 LLVMValueRef lds;
121 LLVMValueRef inputs[RADEON_LLVM_MAX_INPUTS * 4];
122 LLVMValueRef outputs[RADEON_LLVM_MAX_OUTPUTS * 4];
123
124 LLVMValueRef shared_memory;
125 uint64_t input_mask;
126 uint64_t output_mask;
127 int num_locals;
128 LLVMValueRef *locals;
129 bool has_ddxy;
130 unsigned num_clips;
131 unsigned num_culls;
132
133 bool has_ds_bpermute;
134 };
135
136 struct ac_tex_info {
137 LLVMValueRef args[12];
138 int arg_count;
139 LLVMTypeRef dst_type;
140 bool has_offset;
141 };
142
143 static LLVMValueRef get_sampler_desc(struct nir_to_llvm_context *ctx,
144 nir_deref_var *deref,
145 enum desc_type desc_type);
146 static unsigned radeon_llvm_reg_index_soa(unsigned index, unsigned chan)
147 {
148 return (index * 4) + chan;
149 }
150
151 static unsigned llvm_get_type_size(LLVMTypeRef type)
152 {
153 LLVMTypeKind kind = LLVMGetTypeKind(type);
154
155 switch (kind) {
156 case LLVMIntegerTypeKind:
157 return LLVMGetIntTypeWidth(type) / 8;
158 case LLVMFloatTypeKind:
159 return 4;
160 case LLVMPointerTypeKind:
161 return 8;
162 case LLVMVectorTypeKind:
163 return LLVMGetVectorSize(type) *
164 llvm_get_type_size(LLVMGetElementType(type));
165 default:
166 assert(0);
167 return 0;
168 }
169 }
170
171 static void set_llvm_calling_convention(LLVMValueRef func,
172 gl_shader_stage stage)
173 {
174 enum radeon_llvm_calling_convention calling_conv;
175
176 switch (stage) {
177 case MESA_SHADER_VERTEX:
178 case MESA_SHADER_TESS_CTRL:
179 case MESA_SHADER_TESS_EVAL:
180 calling_conv = RADEON_LLVM_AMDGPU_VS;
181 break;
182 case MESA_SHADER_GEOMETRY:
183 calling_conv = RADEON_LLVM_AMDGPU_GS;
184 break;
185 case MESA_SHADER_FRAGMENT:
186 calling_conv = RADEON_LLVM_AMDGPU_PS;
187 break;
188 case MESA_SHADER_COMPUTE:
189 calling_conv = RADEON_LLVM_AMDGPU_CS;
190 break;
191 default:
192 unreachable("Unhandle shader type");
193 }
194
195 LLVMSetFunctionCallConv(func, calling_conv);
196 }
197
198 static LLVMValueRef
199 create_llvm_function(LLVMContextRef ctx, LLVMModuleRef module,
200 LLVMBuilderRef builder, LLVMTypeRef *return_types,
201 unsigned num_return_elems, LLVMTypeRef *param_types,
202 unsigned param_count, unsigned array_params_mask,
203 unsigned sgpr_params, bool unsafe_math)
204 {
205 LLVMTypeRef main_function_type, ret_type;
206 LLVMBasicBlockRef main_function_body;
207
208 if (num_return_elems)
209 ret_type = LLVMStructTypeInContext(ctx, return_types,
210 num_return_elems, true);
211 else
212 ret_type = LLVMVoidTypeInContext(ctx);
213
214 /* Setup the function */
215 main_function_type =
216 LLVMFunctionType(ret_type, param_types, param_count, 0);
217 LLVMValueRef main_function =
218 LLVMAddFunction(module, "main", main_function_type);
219 main_function_body =
220 LLVMAppendBasicBlockInContext(ctx, main_function, "main_body");
221 LLVMPositionBuilderAtEnd(builder, main_function_body);
222
223 LLVMSetFunctionCallConv(main_function, RADEON_LLVM_AMDGPU_CS);
224 for (unsigned i = 0; i < sgpr_params; ++i) {
225 if (array_params_mask & (1 << i)) {
226 LLVMValueRef P = LLVMGetParam(main_function, i);
227 ac_add_function_attr(main_function, i + 1, AC_FUNC_ATTR_BYVAL);
228 ac_add_attr_dereferenceable(P, UINT64_MAX);
229 }
230 else {
231 ac_add_function_attr(main_function, i + 1, AC_FUNC_ATTR_INREG);
232 }
233 }
234
235 if (unsafe_math) {
236 /* These were copied from some LLVM test. */
237 LLVMAddTargetDependentFunctionAttr(main_function,
238 "less-precise-fpmad",
239 "true");
240 LLVMAddTargetDependentFunctionAttr(main_function,
241 "no-infs-fp-math",
242 "true");
243 LLVMAddTargetDependentFunctionAttr(main_function,
244 "no-nans-fp-math",
245 "true");
246 LLVMAddTargetDependentFunctionAttr(main_function,
247 "unsafe-fp-math",
248 "true");
249 }
250 return main_function;
251 }
252
253 static LLVMTypeRef const_array(LLVMTypeRef elem_type, int num_elements)
254 {
255 return LLVMPointerType(LLVMArrayType(elem_type, num_elements),
256 CONST_ADDR_SPACE);
257 }
258
259 static LLVMValueRef get_shared_memory_ptr(struct nir_to_llvm_context *ctx,
260 int idx,
261 LLVMTypeRef type)
262 {
263 LLVMValueRef offset;
264 LLVMValueRef ptr;
265 int addr_space;
266
267 offset = LLVMConstInt(ctx->i32, idx, false);
268
269 ptr = ctx->shared_memory;
270 ptr = LLVMBuildGEP(ctx->builder, ptr, &offset, 1, "");
271 addr_space = LLVMGetPointerAddressSpace(LLVMTypeOf(ptr));
272 ptr = LLVMBuildBitCast(ctx->builder, ptr, LLVMPointerType(type, addr_space), "");
273 return ptr;
274 }
275
276 static LLVMValueRef to_integer(struct nir_to_llvm_context *ctx, LLVMValueRef v)
277 {
278 LLVMTypeRef type = LLVMTypeOf(v);
279 if (type == ctx->f32) {
280 return LLVMBuildBitCast(ctx->builder, v, ctx->i32, "");
281 } else if (LLVMGetTypeKind(type) == LLVMVectorTypeKind) {
282 LLVMTypeRef elem_type = LLVMGetElementType(type);
283 if (elem_type == ctx->f32) {
284 LLVMTypeRef nt = LLVMVectorType(ctx->i32, LLVMGetVectorSize(type));
285 return LLVMBuildBitCast(ctx->builder, v, nt, "");
286 }
287 }
288 return v;
289 }
290
291 static LLVMValueRef to_float(struct nir_to_llvm_context *ctx, LLVMValueRef v)
292 {
293 LLVMTypeRef type = LLVMTypeOf(v);
294 if (type == ctx->i32) {
295 return LLVMBuildBitCast(ctx->builder, v, ctx->f32, "");
296 } else if (LLVMGetTypeKind(type) == LLVMVectorTypeKind) {
297 LLVMTypeRef elem_type = LLVMGetElementType(type);
298 if (elem_type == ctx->i32) {
299 LLVMTypeRef nt = LLVMVectorType(ctx->f32, LLVMGetVectorSize(type));
300 return LLVMBuildBitCast(ctx->builder, v, nt, "");
301 }
302 }
303 return v;
304 }
305
306 static LLVMValueRef unpack_param(struct nir_to_llvm_context *ctx,
307 LLVMValueRef param, unsigned rshift,
308 unsigned bitwidth)
309 {
310 LLVMValueRef value = param;
311 if (rshift)
312 value = LLVMBuildLShr(ctx->builder, value,
313 LLVMConstInt(ctx->i32, rshift, false), "");
314
315 if (rshift + bitwidth < 32) {
316 unsigned mask = (1 << bitwidth) - 1;
317 value = LLVMBuildAnd(ctx->builder, value,
318 LLVMConstInt(ctx->i32, mask, false), "");
319 }
320 return value;
321 }
322
323 static LLVMValueRef build_gep0(struct nir_to_llvm_context *ctx,
324 LLVMValueRef base_ptr, LLVMValueRef index)
325 {
326 LLVMValueRef indices[2] = {
327 ctx->i32zero,
328 index,
329 };
330 return LLVMBuildGEP(ctx->builder, base_ptr,
331 indices, 2, "");
332 }
333
334 static LLVMValueRef build_indexed_load(struct nir_to_llvm_context *ctx,
335 LLVMValueRef base_ptr, LLVMValueRef index,
336 bool uniform)
337 {
338 LLVMValueRef pointer;
339 pointer = build_gep0(ctx, base_ptr, index);
340 if (uniform)
341 LLVMSetMetadata(pointer, ctx->uniform_md_kind, ctx->empty_md);
342 return LLVMBuildLoad(ctx->builder, pointer, "");
343 }
344
345 static LLVMValueRef build_indexed_load_const(struct nir_to_llvm_context *ctx,
346 LLVMValueRef base_ptr, LLVMValueRef index)
347 {
348 LLVMValueRef result = build_indexed_load(ctx, base_ptr, index, true);
349 LLVMSetMetadata(result, ctx->invariant_load_md_kind, ctx->empty_md);
350 return result;
351 }
352
353 static void set_userdata_location(struct ac_userdata_info *ud_info, uint8_t sgpr_idx, uint8_t num_sgprs)
354 {
355 ud_info->sgpr_idx = sgpr_idx;
356 ud_info->num_sgprs = num_sgprs;
357 ud_info->indirect = false;
358 ud_info->indirect_offset = 0;
359 }
360
361 static void set_userdata_location_shader(struct nir_to_llvm_context *ctx,
362 int idx, uint8_t sgpr_idx, uint8_t num_sgprs)
363 {
364 set_userdata_location(&ctx->shader_info->user_sgprs_locs.shader_data[idx], sgpr_idx, num_sgprs);
365 }
366
367 #if 0
368 static void set_userdata_location_indirect(struct ac_userdata_info *ud_info, uint8_t sgpr_idx, uint8_t num_sgprs,
369 uint32_t indirect_offset)
370 {
371 ud_info->sgpr_idx = sgpr_idx;
372 ud_info->num_sgprs = num_sgprs;
373 ud_info->indirect = true;
374 ud_info->indirect_offset = indirect_offset;
375 }
376 #endif
377
378 static void create_function(struct nir_to_llvm_context *ctx)
379 {
380 LLVMTypeRef arg_types[23];
381 unsigned arg_idx = 0;
382 unsigned array_params_mask = 0;
383 unsigned sgpr_count = 0, user_sgpr_count;
384 unsigned i;
385 unsigned num_sets = ctx->options->layout ? ctx->options->layout->num_sets : 0;
386 unsigned user_sgpr_idx;
387 bool need_push_constants;
388
389 need_push_constants = true;
390 if (!ctx->options->layout)
391 need_push_constants = false;
392 else if (!ctx->options->layout->push_constant_size &&
393 !ctx->options->layout->dynamic_offset_count)
394 need_push_constants = false;
395
396 /* 1 for each descriptor set */
397 for (unsigned i = 0; i < num_sets; ++i) {
398 if (ctx->options->layout->set[i].layout->shader_stages & (1 << ctx->stage)) {
399 array_params_mask |= (1 << arg_idx);
400 arg_types[arg_idx++] = const_array(ctx->i8, 1024 * 1024);
401 }
402 }
403
404 if (need_push_constants) {
405 /* 1 for push constants and dynamic descriptors */
406 array_params_mask |= (1 << arg_idx);
407 arg_types[arg_idx++] = const_array(ctx->i8, 1024 * 1024);
408 }
409
410 switch (ctx->stage) {
411 case MESA_SHADER_COMPUTE:
412 arg_types[arg_idx++] = LLVMVectorType(ctx->i32, 3); /* grid size */
413 user_sgpr_count = arg_idx;
414 arg_types[arg_idx++] = LLVMVectorType(ctx->i32, 3);
415 arg_types[arg_idx++] = ctx->i32;
416 sgpr_count = arg_idx;
417
418 arg_types[arg_idx++] = LLVMVectorType(ctx->i32, 3);
419 break;
420 case MESA_SHADER_VERTEX:
421 arg_types[arg_idx++] = const_array(ctx->v16i8, 16); /* vertex buffers */
422 arg_types[arg_idx++] = ctx->i32; // base vertex
423 arg_types[arg_idx++] = ctx->i32; // start instance
424 user_sgpr_count = sgpr_count = arg_idx;
425 arg_types[arg_idx++] = ctx->i32; // vertex id
426 arg_types[arg_idx++] = ctx->i32; // rel auto id
427 arg_types[arg_idx++] = ctx->i32; // vs prim id
428 arg_types[arg_idx++] = ctx->i32; // instance id
429 break;
430 case MESA_SHADER_FRAGMENT:
431 arg_types[arg_idx++] = const_array(ctx->f32, 32); /* sample positions */
432 user_sgpr_count = arg_idx;
433 arg_types[arg_idx++] = ctx->i32; /* prim mask */
434 sgpr_count = arg_idx;
435 arg_types[arg_idx++] = ctx->v2i32; /* persp sample */
436 arg_types[arg_idx++] = ctx->v2i32; /* persp center */
437 arg_types[arg_idx++] = ctx->v2i32; /* persp centroid */
438 arg_types[arg_idx++] = ctx->v3i32; /* persp pull model */
439 arg_types[arg_idx++] = ctx->v2i32; /* linear sample */
440 arg_types[arg_idx++] = ctx->v2i32; /* linear center */
441 arg_types[arg_idx++] = ctx->v2i32; /* linear centroid */
442 arg_types[arg_idx++] = ctx->f32; /* line stipple tex */
443 arg_types[arg_idx++] = ctx->f32; /* pos x float */
444 arg_types[arg_idx++] = ctx->f32; /* pos y float */
445 arg_types[arg_idx++] = ctx->f32; /* pos z float */
446 arg_types[arg_idx++] = ctx->f32; /* pos w float */
447 arg_types[arg_idx++] = ctx->i32; /* front face */
448 arg_types[arg_idx++] = ctx->i32; /* ancillary */
449 arg_types[arg_idx++] = ctx->f32; /* sample coverage */
450 arg_types[arg_idx++] = ctx->i32; /* fixed pt */
451 break;
452 default:
453 unreachable("Shader stage not implemented");
454 }
455
456 ctx->main_function = create_llvm_function(
457 ctx->context, ctx->module, ctx->builder, NULL, 0, arg_types,
458 arg_idx, array_params_mask, sgpr_count, ctx->options->unsafe_math);
459 set_llvm_calling_convention(ctx->main_function, ctx->stage);
460
461
462 ctx->shader_info->num_input_sgprs = 0;
463 ctx->shader_info->num_input_vgprs = 0;
464
465 for (i = 0; i < user_sgpr_count; i++)
466 ctx->shader_info->num_user_sgprs += llvm_get_type_size(arg_types[i]) / 4;
467
468 ctx->shader_info->num_input_sgprs = ctx->shader_info->num_user_sgprs;
469 for (; i < sgpr_count; i++)
470 ctx->shader_info->num_input_sgprs += llvm_get_type_size(arg_types[i]) / 4;
471
472 if (ctx->stage != MESA_SHADER_FRAGMENT)
473 for (; i < arg_idx; ++i)
474 ctx->shader_info->num_input_vgprs += llvm_get_type_size(arg_types[i]) / 4;
475
476 arg_idx = 0;
477 user_sgpr_idx = 0;
478 for (unsigned i = 0; i < num_sets; ++i) {
479 if (ctx->options->layout->set[i].layout->shader_stages & (1 << ctx->stage)) {
480 set_userdata_location(&ctx->shader_info->user_sgprs_locs.descriptor_sets[i], user_sgpr_idx, 2);
481 user_sgpr_idx += 2;
482 ctx->descriptor_sets[i] =
483 LLVMGetParam(ctx->main_function, arg_idx++);
484 } else
485 ctx->descriptor_sets[i] = NULL;
486 }
487
488 if (need_push_constants) {
489 ctx->push_constants = LLVMGetParam(ctx->main_function, arg_idx++);
490 set_userdata_location_shader(ctx, AC_UD_PUSH_CONSTANTS, user_sgpr_idx, 2);
491 user_sgpr_idx += 2;
492 }
493
494 switch (ctx->stage) {
495 case MESA_SHADER_COMPUTE:
496 set_userdata_location_shader(ctx, AC_UD_CS_GRID_SIZE, user_sgpr_idx, 3);
497 user_sgpr_idx += 3;
498 ctx->num_work_groups =
499 LLVMGetParam(ctx->main_function, arg_idx++);
500 ctx->workgroup_ids =
501 LLVMGetParam(ctx->main_function, arg_idx++);
502 ctx->tg_size =
503 LLVMGetParam(ctx->main_function, arg_idx++);
504 ctx->local_invocation_ids =
505 LLVMGetParam(ctx->main_function, arg_idx++);
506 break;
507 case MESA_SHADER_VERTEX:
508 set_userdata_location_shader(ctx, AC_UD_VS_VERTEX_BUFFERS, user_sgpr_idx, 2);
509 user_sgpr_idx += 2;
510 ctx->vertex_buffers = LLVMGetParam(ctx->main_function, arg_idx++);
511 set_userdata_location_shader(ctx, AC_UD_VS_BASE_VERTEX_START_INSTANCE, user_sgpr_idx, 2);
512 user_sgpr_idx += 2;
513 ctx->base_vertex = LLVMGetParam(ctx->main_function, arg_idx++);
514 ctx->start_instance = LLVMGetParam(ctx->main_function, arg_idx++);
515 ctx->vertex_id = LLVMGetParam(ctx->main_function, arg_idx++);
516 ctx->rel_auto_id = LLVMGetParam(ctx->main_function, arg_idx++);
517 ctx->vs_prim_id = LLVMGetParam(ctx->main_function, arg_idx++);
518 ctx->instance_id = LLVMGetParam(ctx->main_function, arg_idx++);
519 break;
520 case MESA_SHADER_FRAGMENT:
521 set_userdata_location_shader(ctx, AC_UD_PS_SAMPLE_POS, user_sgpr_idx, 2);
522 user_sgpr_idx += 2;
523 ctx->sample_positions = LLVMGetParam(ctx->main_function, arg_idx++);
524 ctx->prim_mask = LLVMGetParam(ctx->main_function, arg_idx++);
525 ctx->persp_sample = LLVMGetParam(ctx->main_function, arg_idx++);
526 ctx->persp_center = LLVMGetParam(ctx->main_function, arg_idx++);
527 ctx->persp_centroid = LLVMGetParam(ctx->main_function, arg_idx++);
528 arg_idx++;
529 ctx->linear_sample = LLVMGetParam(ctx->main_function, arg_idx++);
530 ctx->linear_center = LLVMGetParam(ctx->main_function, arg_idx++);
531 ctx->linear_centroid = LLVMGetParam(ctx->main_function, arg_idx++);
532 arg_idx++; /* line stipple */
533 ctx->frag_pos[0] = LLVMGetParam(ctx->main_function, arg_idx++);
534 ctx->frag_pos[1] = LLVMGetParam(ctx->main_function, arg_idx++);
535 ctx->frag_pos[2] = LLVMGetParam(ctx->main_function, arg_idx++);
536 ctx->frag_pos[3] = LLVMGetParam(ctx->main_function, arg_idx++);
537 ctx->front_face = LLVMGetParam(ctx->main_function, arg_idx++);
538 ctx->ancillary = LLVMGetParam(ctx->main_function, arg_idx++);
539 break;
540 default:
541 unreachable("Shader stage not implemented");
542 }
543 }
544
545 static void setup_types(struct nir_to_llvm_context *ctx)
546 {
547 LLVMValueRef args[4];
548
549 ctx->voidt = LLVMVoidTypeInContext(ctx->context);
550 ctx->i1 = LLVMIntTypeInContext(ctx->context, 1);
551 ctx->i8 = LLVMIntTypeInContext(ctx->context, 8);
552 ctx->i16 = LLVMIntTypeInContext(ctx->context, 16);
553 ctx->i32 = LLVMIntTypeInContext(ctx->context, 32);
554 ctx->i64 = LLVMIntTypeInContext(ctx->context, 64);
555 ctx->v2i32 = LLVMVectorType(ctx->i32, 2);
556 ctx->v3i32 = LLVMVectorType(ctx->i32, 3);
557 ctx->v4i32 = LLVMVectorType(ctx->i32, 4);
558 ctx->v8i32 = LLVMVectorType(ctx->i32, 8);
559 ctx->f32 = LLVMFloatTypeInContext(ctx->context);
560 ctx->f16 = LLVMHalfTypeInContext(ctx->context);
561 ctx->v2f32 = LLVMVectorType(ctx->f32, 2);
562 ctx->v4f32 = LLVMVectorType(ctx->f32, 4);
563 ctx->v16i8 = LLVMVectorType(ctx->i8, 16);
564
565 ctx->i32zero = LLVMConstInt(ctx->i32, 0, false);
566 ctx->i32one = LLVMConstInt(ctx->i32, 1, false);
567 ctx->f32zero = LLVMConstReal(ctx->f32, 0.0);
568 ctx->f32one = LLVMConstReal(ctx->f32, 1.0);
569
570 args[0] = ctx->f32zero;
571 args[1] = ctx->f32zero;
572 args[2] = ctx->f32zero;
573 args[3] = ctx->f32one;
574 ctx->v4f32empty = LLVMConstVector(args, 4);
575
576 ctx->range_md_kind = LLVMGetMDKindIDInContext(ctx->context,
577 "range", 5);
578 ctx->invariant_load_md_kind = LLVMGetMDKindIDInContext(ctx->context,
579 "invariant.load", 14);
580 ctx->uniform_md_kind =
581 LLVMGetMDKindIDInContext(ctx->context, "amdgpu.uniform", 14);
582 ctx->empty_md = LLVMMDNodeInContext(ctx->context, NULL, 0);
583
584 args[0] = LLVMConstReal(ctx->f32, 2.5);
585 }
586
587 static int get_llvm_num_components(LLVMValueRef value)
588 {
589 LLVMTypeRef type = LLVMTypeOf(value);
590 unsigned num_components = LLVMGetTypeKind(type) == LLVMVectorTypeKind
591 ? LLVMGetVectorSize(type)
592 : 1;
593 return num_components;
594 }
595
596 static LLVMValueRef llvm_extract_elem(struct nir_to_llvm_context *ctx,
597 LLVMValueRef value,
598 int index)
599 {
600 int count = get_llvm_num_components(value);
601
602 assert(index < count);
603 if (count == 1)
604 return value;
605
606 return LLVMBuildExtractElement(ctx->builder, value,
607 LLVMConstInt(ctx->i32, index, false), "");
608 }
609
610 static LLVMValueRef trim_vector(struct nir_to_llvm_context *ctx,
611 LLVMValueRef value, unsigned count)
612 {
613 unsigned num_components = get_llvm_num_components(value);
614 if (count == num_components)
615 return value;
616
617 LLVMValueRef masks[] = {
618 LLVMConstInt(ctx->i32, 0, false), LLVMConstInt(ctx->i32, 1, false),
619 LLVMConstInt(ctx->i32, 2, false), LLVMConstInt(ctx->i32, 3, false)};
620
621 if (count == 1)
622 return LLVMBuildExtractElement(ctx->builder, value, masks[0],
623 "");
624
625 LLVMValueRef swizzle = LLVMConstVector(masks, count);
626 return LLVMBuildShuffleVector(ctx->builder, value, value, swizzle, "");
627 }
628
629 static void
630 build_store_values_extended(struct nir_to_llvm_context *ctx,
631 LLVMValueRef *values,
632 unsigned value_count,
633 unsigned value_stride,
634 LLVMValueRef vec)
635 {
636 LLVMBuilderRef builder = ctx->builder;
637 unsigned i;
638
639 if (value_count == 1) {
640 LLVMBuildStore(builder, vec, values[0]);
641 return;
642 }
643
644 for (i = 0; i < value_count; i++) {
645 LLVMValueRef ptr = values[i * value_stride];
646 LLVMValueRef index = LLVMConstInt(ctx->i32, i, false);
647 LLVMValueRef value = LLVMBuildExtractElement(builder, vec, index, "");
648 LLVMBuildStore(builder, value, ptr);
649 }
650 }
651
652 static LLVMTypeRef get_def_type(struct nir_to_llvm_context *ctx,
653 nir_ssa_def *def)
654 {
655 LLVMTypeRef type = LLVMIntTypeInContext(ctx->context, def->bit_size);
656 if (def->num_components > 1) {
657 type = LLVMVectorType(type, def->num_components);
658 }
659 return type;
660 }
661
662 static LLVMValueRef get_src(struct nir_to_llvm_context *ctx, nir_src src)
663 {
664 assert(src.is_ssa);
665 struct hash_entry *entry = _mesa_hash_table_search(ctx->defs, src.ssa);
666 return (LLVMValueRef)entry->data;
667 }
668
669
670 static LLVMBasicBlockRef get_block(struct nir_to_llvm_context *ctx,
671 struct nir_block *b)
672 {
673 struct hash_entry *entry = _mesa_hash_table_search(ctx->defs, b);
674 return (LLVMBasicBlockRef)entry->data;
675 }
676
677 static LLVMValueRef get_alu_src(struct nir_to_llvm_context *ctx,
678 nir_alu_src src,
679 unsigned num_components)
680 {
681 LLVMValueRef value = get_src(ctx, src.src);
682 bool need_swizzle = false;
683
684 assert(value);
685 LLVMTypeRef type = LLVMTypeOf(value);
686 unsigned src_components = LLVMGetTypeKind(type) == LLVMVectorTypeKind
687 ? LLVMGetVectorSize(type)
688 : 1;
689
690 for (unsigned i = 0; i < num_components; ++i) {
691 assert(src.swizzle[i] < src_components);
692 if (src.swizzle[i] != i)
693 need_swizzle = true;
694 }
695
696 if (need_swizzle || num_components != src_components) {
697 LLVMValueRef masks[] = {
698 LLVMConstInt(ctx->i32, src.swizzle[0], false),
699 LLVMConstInt(ctx->i32, src.swizzle[1], false),
700 LLVMConstInt(ctx->i32, src.swizzle[2], false),
701 LLVMConstInt(ctx->i32, src.swizzle[3], false)};
702
703 if (src_components > 1 && num_components == 1) {
704 value = LLVMBuildExtractElement(ctx->builder, value,
705 masks[0], "");
706 } else if (src_components == 1 && num_components > 1) {
707 LLVMValueRef values[] = {value, value, value, value};
708 value = ac_build_gather_values(&ctx->ac, values, num_components);
709 } else {
710 LLVMValueRef swizzle = LLVMConstVector(masks, num_components);
711 value = LLVMBuildShuffleVector(ctx->builder, value, value,
712 swizzle, "");
713 }
714 }
715 assert(!src.negate);
716 assert(!src.abs);
717 return value;
718 }
719
720 static LLVMValueRef emit_int_cmp(struct nir_to_llvm_context *ctx,
721 LLVMIntPredicate pred, LLVMValueRef src0,
722 LLVMValueRef src1)
723 {
724 LLVMValueRef result = LLVMBuildICmp(ctx->builder, pred, src0, src1, "");
725 return LLVMBuildSelect(ctx->builder, result,
726 LLVMConstInt(ctx->i32, 0xFFFFFFFF, false),
727 LLVMConstInt(ctx->i32, 0, false), "");
728 }
729
730 static LLVMValueRef emit_float_cmp(struct nir_to_llvm_context *ctx,
731 LLVMRealPredicate pred, LLVMValueRef src0,
732 LLVMValueRef src1)
733 {
734 LLVMValueRef result;
735 src0 = to_float(ctx, src0);
736 src1 = to_float(ctx, src1);
737 result = LLVMBuildFCmp(ctx->builder, pred, src0, src1, "");
738 return LLVMBuildSelect(ctx->builder, result,
739 LLVMConstInt(ctx->i32, 0xFFFFFFFF, false),
740 LLVMConstInt(ctx->i32, 0, false), "");
741 }
742
743 static LLVMValueRef emit_intrin_1f_param(struct nir_to_llvm_context *ctx,
744 const char *intrin,
745 LLVMValueRef src0)
746 {
747 LLVMValueRef params[] = {
748 to_float(ctx, src0),
749 };
750 return ac_emit_llvm_intrinsic(&ctx->ac, intrin, ctx->f32, params, 1, AC_FUNC_ATTR_READNONE);
751 }
752
753 static LLVMValueRef emit_intrin_2f_param(struct nir_to_llvm_context *ctx,
754 const char *intrin,
755 LLVMValueRef src0, LLVMValueRef src1)
756 {
757 LLVMValueRef params[] = {
758 to_float(ctx, src0),
759 to_float(ctx, src1),
760 };
761 return ac_emit_llvm_intrinsic(&ctx->ac, intrin, ctx->f32, params, 2, AC_FUNC_ATTR_READNONE);
762 }
763
764 static LLVMValueRef emit_intrin_3f_param(struct nir_to_llvm_context *ctx,
765 const char *intrin,
766 LLVMValueRef src0, LLVMValueRef src1, LLVMValueRef src2)
767 {
768 LLVMValueRef params[] = {
769 to_float(ctx, src0),
770 to_float(ctx, src1),
771 to_float(ctx, src2),
772 };
773 return ac_emit_llvm_intrinsic(&ctx->ac, intrin, ctx->f32, params, 3, AC_FUNC_ATTR_READNONE);
774 }
775
776 static LLVMValueRef emit_bcsel(struct nir_to_llvm_context *ctx,
777 LLVMValueRef src0, LLVMValueRef src1, LLVMValueRef src2)
778 {
779 LLVMValueRef v = LLVMBuildICmp(ctx->builder, LLVMIntNE, src0,
780 ctx->i32zero, "");
781 return LLVMBuildSelect(ctx->builder, v, src1, src2, "");
782 }
783
784 static LLVMValueRef emit_find_lsb(struct nir_to_llvm_context *ctx,
785 LLVMValueRef src0)
786 {
787 LLVMValueRef params[2] = {
788 src0,
789
790 /* The value of 1 means that ffs(x=0) = undef, so LLVM won't
791 * add special code to check for x=0. The reason is that
792 * the LLVM behavior for x=0 is different from what we
793 * need here.
794 *
795 * The hardware already implements the correct behavior.
796 */
797 LLVMConstInt(ctx->i32, 1, false),
798 };
799 return ac_emit_llvm_intrinsic(&ctx->ac, "llvm.cttz.i32", ctx->i32, params, 2, AC_FUNC_ATTR_READNONE);
800 }
801
802 static LLVMValueRef emit_ifind_msb(struct nir_to_llvm_context *ctx,
803 LLVMValueRef src0)
804 {
805 LLVMValueRef msb = ac_emit_llvm_intrinsic(&ctx->ac, "llvm.AMDGPU.flbit.i32",
806 ctx->i32, &src0, 1,
807 AC_FUNC_ATTR_READNONE);
808
809 /* The HW returns the last bit index from MSB, but NIR wants
810 * the index from LSB. Invert it by doing "31 - msb". */
811 msb = LLVMBuildSub(ctx->builder, LLVMConstInt(ctx->i32, 31, false),
812 msb, "");
813
814 LLVMValueRef all_ones = LLVMConstInt(ctx->i32, -1, true);
815 LLVMValueRef cond = LLVMBuildOr(ctx->builder,
816 LLVMBuildICmp(ctx->builder, LLVMIntEQ,
817 src0, ctx->i32zero, ""),
818 LLVMBuildICmp(ctx->builder, LLVMIntEQ,
819 src0, all_ones, ""), "");
820
821 return LLVMBuildSelect(ctx->builder, cond, all_ones, msb, "");
822 }
823
824 static LLVMValueRef emit_ufind_msb(struct nir_to_llvm_context *ctx,
825 LLVMValueRef src0)
826 {
827 LLVMValueRef args[2] = {
828 src0,
829 ctx->i32one,
830 };
831 LLVMValueRef msb = ac_emit_llvm_intrinsic(&ctx->ac, "llvm.ctlz.i32",
832 ctx->i32, args, ARRAY_SIZE(args),
833 AC_FUNC_ATTR_READNONE);
834
835 /* The HW returns the last bit index from MSB, but NIR wants
836 * the index from LSB. Invert it by doing "31 - msb". */
837 msb = LLVMBuildSub(ctx->builder, LLVMConstInt(ctx->i32, 31, false),
838 msb, "");
839
840 return LLVMBuildSelect(ctx->builder,
841 LLVMBuildICmp(ctx->builder, LLVMIntEQ, src0,
842 ctx->i32zero, ""),
843 LLVMConstInt(ctx->i32, -1, true), msb, "");
844 }
845
846 static LLVMValueRef emit_minmax_int(struct nir_to_llvm_context *ctx,
847 LLVMIntPredicate pred,
848 LLVMValueRef src0, LLVMValueRef src1)
849 {
850 return LLVMBuildSelect(ctx->builder,
851 LLVMBuildICmp(ctx->builder, pred, src0, src1, ""),
852 src0,
853 src1, "");
854
855 }
856 static LLVMValueRef emit_iabs(struct nir_to_llvm_context *ctx,
857 LLVMValueRef src0)
858 {
859 return emit_minmax_int(ctx, LLVMIntSGT, src0,
860 LLVMBuildNeg(ctx->builder, src0, ""));
861 }
862
863 static LLVMValueRef emit_fsign(struct nir_to_llvm_context *ctx,
864 LLVMValueRef src0)
865 {
866 LLVMValueRef cmp, val;
867
868 cmp = LLVMBuildFCmp(ctx->builder, LLVMRealOGT, src0, ctx->f32zero, "");
869 val = LLVMBuildSelect(ctx->builder, cmp, ctx->f32one, src0, "");
870 cmp = LLVMBuildFCmp(ctx->builder, LLVMRealOGE, val, ctx->f32zero, "");
871 val = LLVMBuildSelect(ctx->builder, cmp, val, LLVMConstReal(ctx->f32, -1.0), "");
872 return val;
873 }
874
875 static LLVMValueRef emit_isign(struct nir_to_llvm_context *ctx,
876 LLVMValueRef src0)
877 {
878 LLVMValueRef cmp, val;
879
880 cmp = LLVMBuildICmp(ctx->builder, LLVMIntSGT, src0, ctx->i32zero, "");
881 val = LLVMBuildSelect(ctx->builder, cmp, ctx->i32one, src0, "");
882 cmp = LLVMBuildICmp(ctx->builder, LLVMIntSGE, val, ctx->i32zero, "");
883 val = LLVMBuildSelect(ctx->builder, cmp, val, LLVMConstInt(ctx->i32, -1, true), "");
884 return val;
885 }
886
887 static LLVMValueRef emit_ffract(struct nir_to_llvm_context *ctx,
888 LLVMValueRef src0)
889 {
890 const char *intr = "llvm.floor.f32";
891 LLVMValueRef fsrc0 = to_float(ctx, src0);
892 LLVMValueRef params[] = {
893 fsrc0,
894 };
895 LLVMValueRef floor = ac_emit_llvm_intrinsic(&ctx->ac, intr,
896 ctx->f32, params, 1,
897 AC_FUNC_ATTR_READNONE);
898 return LLVMBuildFSub(ctx->builder, fsrc0, floor, "");
899 }
900
901 static LLVMValueRef emit_uint_carry(struct nir_to_llvm_context *ctx,
902 const char *intrin,
903 LLVMValueRef src0, LLVMValueRef src1)
904 {
905 LLVMTypeRef ret_type;
906 LLVMTypeRef types[] = { ctx->i32, ctx->i1 };
907 LLVMValueRef res;
908 LLVMValueRef params[] = { src0, src1 };
909 ret_type = LLVMStructTypeInContext(ctx->context, types,
910 2, true);
911
912 res = ac_emit_llvm_intrinsic(&ctx->ac, intrin, ret_type,
913 params, 2, AC_FUNC_ATTR_READNONE);
914
915 res = LLVMBuildExtractValue(ctx->builder, res, 1, "");
916 res = LLVMBuildZExt(ctx->builder, res, ctx->i32, "");
917 return res;
918 }
919
920 static LLVMValueRef emit_b2f(struct nir_to_llvm_context *ctx,
921 LLVMValueRef src0)
922 {
923 return LLVMBuildAnd(ctx->builder, src0, LLVMBuildBitCast(ctx->builder, LLVMConstReal(ctx->f32, 1.0), ctx->i32, ""), "");
924 }
925
926 static LLVMValueRef emit_umul_high(struct nir_to_llvm_context *ctx,
927 LLVMValueRef src0, LLVMValueRef src1)
928 {
929 LLVMValueRef dst64, result;
930 src0 = LLVMBuildZExt(ctx->builder, src0, ctx->i64, "");
931 src1 = LLVMBuildZExt(ctx->builder, src1, ctx->i64, "");
932
933 dst64 = LLVMBuildMul(ctx->builder, src0, src1, "");
934 dst64 = LLVMBuildLShr(ctx->builder, dst64, LLVMConstInt(ctx->i64, 32, false), "");
935 result = LLVMBuildTrunc(ctx->builder, dst64, ctx->i32, "");
936 return result;
937 }
938
939 static LLVMValueRef emit_imul_high(struct nir_to_llvm_context *ctx,
940 LLVMValueRef src0, LLVMValueRef src1)
941 {
942 LLVMValueRef dst64, result;
943 src0 = LLVMBuildSExt(ctx->builder, src0, ctx->i64, "");
944 src1 = LLVMBuildSExt(ctx->builder, src1, ctx->i64, "");
945
946 dst64 = LLVMBuildMul(ctx->builder, src0, src1, "");
947 dst64 = LLVMBuildAShr(ctx->builder, dst64, LLVMConstInt(ctx->i64, 32, false), "");
948 result = LLVMBuildTrunc(ctx->builder, dst64, ctx->i32, "");
949 return result;
950 }
951
952 static LLVMValueRef emit_bitfield_extract(struct nir_to_llvm_context *ctx,
953 const char *intrin,
954 LLVMValueRef srcs[3])
955 {
956 LLVMValueRef result;
957 LLVMValueRef icond = LLVMBuildICmp(ctx->builder, LLVMIntEQ, srcs[2], LLVMConstInt(ctx->i32, 32, false), "");
958 result = ac_emit_llvm_intrinsic(&ctx->ac, intrin, ctx->i32, srcs, 3, AC_FUNC_ATTR_READNONE);
959
960 result = LLVMBuildSelect(ctx->builder, icond, srcs[0], result, "");
961 return result;
962 }
963
964 static LLVMValueRef emit_bitfield_insert(struct nir_to_llvm_context *ctx,
965 LLVMValueRef src0, LLVMValueRef src1,
966 LLVMValueRef src2, LLVMValueRef src3)
967 {
968 LLVMValueRef bfi_args[3], result;
969
970 bfi_args[0] = LLVMBuildShl(ctx->builder,
971 LLVMBuildSub(ctx->builder,
972 LLVMBuildShl(ctx->builder,
973 ctx->i32one,
974 src3, ""),
975 ctx->i32one, ""),
976 src2, "");
977 bfi_args[1] = LLVMBuildShl(ctx->builder, src1, src2, "");
978 bfi_args[2] = src0;
979
980 LLVMValueRef icond = LLVMBuildICmp(ctx->builder, LLVMIntEQ, src3, LLVMConstInt(ctx->i32, 32, false), "");
981
982 /* Calculate:
983 * (arg0 & arg1) | (~arg0 & arg2) = arg2 ^ (arg0 & (arg1 ^ arg2)
984 * Use the right-hand side, which the LLVM backend can convert to V_BFI.
985 */
986 result = LLVMBuildXor(ctx->builder, bfi_args[2],
987 LLVMBuildAnd(ctx->builder, bfi_args[0],
988 LLVMBuildXor(ctx->builder, bfi_args[1], bfi_args[2], ""), ""), "");
989
990 result = LLVMBuildSelect(ctx->builder, icond, src1, result, "");
991 return result;
992 }
993
994 static LLVMValueRef emit_pack_half_2x16(struct nir_to_llvm_context *ctx,
995 LLVMValueRef src0)
996 {
997 LLVMValueRef const16 = LLVMConstInt(ctx->i32, 16, false);
998 int i;
999 LLVMValueRef comp[2];
1000
1001 src0 = to_float(ctx, src0);
1002 comp[0] = LLVMBuildExtractElement(ctx->builder, src0, ctx->i32zero, "");
1003 comp[1] = LLVMBuildExtractElement(ctx->builder, src0, ctx->i32one, "");
1004 for (i = 0; i < 2; i++) {
1005 comp[i] = LLVMBuildFPTrunc(ctx->builder, comp[i], ctx->f16, "");
1006 comp[i] = LLVMBuildBitCast(ctx->builder, comp[i], ctx->i16, "");
1007 comp[i] = LLVMBuildZExt(ctx->builder, comp[i], ctx->i32, "");
1008 }
1009
1010 comp[1] = LLVMBuildShl(ctx->builder, comp[1], const16, "");
1011 comp[0] = LLVMBuildOr(ctx->builder, comp[0], comp[1], "");
1012
1013 return comp[0];
1014 }
1015
1016 static LLVMValueRef emit_unpack_half_2x16(struct nir_to_llvm_context *ctx,
1017 LLVMValueRef src0)
1018 {
1019 LLVMValueRef const16 = LLVMConstInt(ctx->i32, 16, false);
1020 LLVMValueRef temps[2], result, val;
1021 int i;
1022
1023 for (i = 0; i < 2; i++) {
1024 val = i == 1 ? LLVMBuildLShr(ctx->builder, src0, const16, "") : src0;
1025 val = LLVMBuildTrunc(ctx->builder, val, ctx->i16, "");
1026 val = LLVMBuildBitCast(ctx->builder, val, ctx->f16, "");
1027 temps[i] = LLVMBuildFPExt(ctx->builder, val, ctx->f32, "");
1028 }
1029
1030 result = LLVMBuildInsertElement(ctx->builder, LLVMGetUndef(ctx->v2f32), temps[0],
1031 ctx->i32zero, "");
1032 result = LLVMBuildInsertElement(ctx->builder, result, temps[1],
1033 ctx->i32one, "");
1034 return result;
1035 }
1036
1037 /**
1038 * Set range metadata on an instruction. This can only be used on load and
1039 * call instructions. If you know an instruction can only produce the values
1040 * 0, 1, 2, you would do set_range_metadata(value, 0, 3);
1041 * \p lo is the minimum value inclusive.
1042 * \p hi is the maximum value exclusive.
1043 */
1044 static void set_range_metadata(struct nir_to_llvm_context *ctx,
1045 LLVMValueRef value, unsigned lo, unsigned hi)
1046 {
1047 LLVMValueRef range_md, md_args[2];
1048 LLVMTypeRef type = LLVMTypeOf(value);
1049 LLVMContextRef context = LLVMGetTypeContext(type);
1050
1051 md_args[0] = LLVMConstInt(type, lo, false);
1052 md_args[1] = LLVMConstInt(type, hi, false);
1053 range_md = LLVMMDNodeInContext(context, md_args, 2);
1054 LLVMSetMetadata(value, ctx->range_md_kind, range_md);
1055 }
1056
1057 static LLVMValueRef get_thread_id(struct nir_to_llvm_context *ctx)
1058 {
1059 LLVMValueRef tid;
1060 LLVMValueRef tid_args[2];
1061 tid_args[0] = LLVMConstInt(ctx->i32, 0xffffffff, false);
1062 tid_args[1] = ctx->i32zero;
1063 tid_args[1] = ac_emit_llvm_intrinsic(&ctx->ac,
1064 "llvm.amdgcn.mbcnt.lo", ctx->i32,
1065 tid_args, 2, AC_FUNC_ATTR_READNONE);
1066
1067 tid = ac_emit_llvm_intrinsic(&ctx->ac,
1068 "llvm.amdgcn.mbcnt.hi", ctx->i32,
1069 tid_args, 2, AC_FUNC_ATTR_READNONE);
1070 set_range_metadata(ctx, tid, 0, 64);
1071 return tid;
1072 }
1073
1074 /*
1075 * SI implements derivatives using the local data store (LDS)
1076 * All writes to the LDS happen in all executing threads at
1077 * the same time. TID is the Thread ID for the current
1078 * thread and is a value between 0 and 63, representing
1079 * the thread's position in the wavefront.
1080 *
1081 * For the pixel shader threads are grouped into quads of four pixels.
1082 * The TIDs of the pixels of a quad are:
1083 *
1084 * +------+------+
1085 * |4n + 0|4n + 1|
1086 * +------+------+
1087 * |4n + 2|4n + 3|
1088 * +------+------+
1089 *
1090 * So, masking the TID with 0xfffffffc yields the TID of the top left pixel
1091 * of the quad, masking with 0xfffffffd yields the TID of the top pixel of
1092 * the current pixel's column, and masking with 0xfffffffe yields the TID
1093 * of the left pixel of the current pixel's row.
1094 *
1095 * Adding 1 yields the TID of the pixel to the right of the left pixel, and
1096 * adding 2 yields the TID of the pixel below the top pixel.
1097 */
1098 /* masks for thread ID. */
1099 #define TID_MASK_TOP_LEFT 0xfffffffc
1100 #define TID_MASK_TOP 0xfffffffd
1101 #define TID_MASK_LEFT 0xfffffffe
1102 static LLVMValueRef emit_ddxy(struct nir_to_llvm_context *ctx,
1103 nir_op op,
1104 LLVMValueRef src0)
1105 {
1106 LLVMValueRef tl, trbl, result;
1107 LLVMValueRef tl_tid, trbl_tid;
1108 LLVMValueRef args[2];
1109 LLVMValueRef thread_id;
1110 unsigned mask;
1111 int idx;
1112 ctx->has_ddxy = true;
1113
1114 if (!ctx->lds && !ctx->has_ds_bpermute)
1115 ctx->lds = LLVMAddGlobalInAddressSpace(ctx->module,
1116 LLVMArrayType(ctx->i32, 64),
1117 "ddxy_lds", LOCAL_ADDR_SPACE);
1118
1119 thread_id = get_thread_id(ctx);
1120 if (op == nir_op_fddx_fine || op == nir_op_fddx)
1121 mask = TID_MASK_LEFT;
1122 else if (op == nir_op_fddy_fine || op == nir_op_fddy)
1123 mask = TID_MASK_TOP;
1124 else
1125 mask = TID_MASK_TOP_LEFT;
1126
1127 tl_tid = LLVMBuildAnd(ctx->builder, thread_id,
1128 LLVMConstInt(ctx->i32, mask, false), "");
1129 /* for DDX we want to next X pixel, DDY next Y pixel. */
1130 if (op == nir_op_fddx_fine ||
1131 op == nir_op_fddx_coarse ||
1132 op == nir_op_fddx)
1133 idx = 1;
1134 else
1135 idx = 2;
1136
1137 trbl_tid = LLVMBuildAdd(ctx->builder, tl_tid,
1138 LLVMConstInt(ctx->i32, idx, false), "");
1139
1140 if (ctx->has_ds_bpermute) {
1141 args[0] = LLVMBuildMul(ctx->builder, tl_tid,
1142 LLVMConstInt(ctx->i32, 4, false), "");
1143 args[1] = src0;
1144 tl = ac_emit_llvm_intrinsic(&ctx->ac, "llvm.amdgcn.ds.bpermute",
1145 ctx->i32, args, 2,
1146 AC_FUNC_ATTR_READNONE);
1147
1148 args[0] = LLVMBuildMul(ctx->builder, trbl_tid,
1149 LLVMConstInt(ctx->i32, 4, false), "");
1150 trbl = ac_emit_llvm_intrinsic(&ctx->ac, "llvm.amdgcn.ds.bpermute",
1151 ctx->i32, args, 2,
1152 AC_FUNC_ATTR_READNONE);
1153 } else {
1154 LLVMValueRef store_ptr, load_ptr0, load_ptr1;
1155
1156 store_ptr = build_gep0(ctx, ctx->lds, thread_id);
1157 load_ptr0 = build_gep0(ctx, ctx->lds, tl_tid);
1158 load_ptr1 = build_gep0(ctx, ctx->lds, trbl_tid);
1159
1160 LLVMBuildStore(ctx->builder, src0, store_ptr);
1161 tl = LLVMBuildLoad(ctx->builder, load_ptr0, "");
1162 trbl = LLVMBuildLoad(ctx->builder, load_ptr1, "");
1163 }
1164 tl = LLVMBuildBitCast(ctx->builder, tl, ctx->f32, "");
1165 trbl = LLVMBuildBitCast(ctx->builder, trbl, ctx->f32, "");
1166 result = LLVMBuildFSub(ctx->builder, trbl, tl, "");
1167 return result;
1168 }
1169
1170 /*
1171 * this takes an I,J coordinate pair,
1172 * and works out the X and Y derivatives.
1173 * it returns DDX(I), DDX(J), DDY(I), DDY(J).
1174 */
1175 static LLVMValueRef emit_ddxy_interp(
1176 struct nir_to_llvm_context *ctx,
1177 LLVMValueRef interp_ij)
1178 {
1179 LLVMValueRef result[4], a;
1180 unsigned i;
1181
1182 for (i = 0; i < 2; i++) {
1183 a = LLVMBuildExtractElement(ctx->builder, interp_ij,
1184 LLVMConstInt(ctx->i32, i, false), "");
1185 result[i] = emit_ddxy(ctx, nir_op_fddx, a);
1186 result[2+i] = emit_ddxy(ctx, nir_op_fddy, a);
1187 }
1188 return ac_build_gather_values(&ctx->ac, result, 4);
1189 }
1190
1191 static void visit_alu(struct nir_to_llvm_context *ctx, nir_alu_instr *instr)
1192 {
1193 LLVMValueRef src[4], result = NULL;
1194 unsigned num_components = instr->dest.dest.ssa.num_components;
1195 unsigned src_components;
1196
1197 assert(nir_op_infos[instr->op].num_inputs <= ARRAY_SIZE(src));
1198 switch (instr->op) {
1199 case nir_op_vec2:
1200 case nir_op_vec3:
1201 case nir_op_vec4:
1202 src_components = 1;
1203 break;
1204 case nir_op_pack_half_2x16:
1205 src_components = 2;
1206 break;
1207 case nir_op_unpack_half_2x16:
1208 src_components = 1;
1209 break;
1210 default:
1211 src_components = num_components;
1212 break;
1213 }
1214 for (unsigned i = 0; i < nir_op_infos[instr->op].num_inputs; i++)
1215 src[i] = get_alu_src(ctx, instr->src[i], src_components);
1216
1217 switch (instr->op) {
1218 case nir_op_fmov:
1219 case nir_op_imov:
1220 result = src[0];
1221 break;
1222 case nir_op_fneg:
1223 src[0] = to_float(ctx, src[0]);
1224 result = LLVMBuildFNeg(ctx->builder, src[0], "");
1225 break;
1226 case nir_op_ineg:
1227 result = LLVMBuildNeg(ctx->builder, src[0], "");
1228 break;
1229 case nir_op_inot:
1230 result = LLVMBuildNot(ctx->builder, src[0], "");
1231 break;
1232 case nir_op_iadd:
1233 result = LLVMBuildAdd(ctx->builder, src[0], src[1], "");
1234 break;
1235 case nir_op_fadd:
1236 src[0] = to_float(ctx, src[0]);
1237 src[1] = to_float(ctx, src[1]);
1238 result = LLVMBuildFAdd(ctx->builder, src[0], src[1], "");
1239 break;
1240 case nir_op_fsub:
1241 src[0] = to_float(ctx, src[0]);
1242 src[1] = to_float(ctx, src[1]);
1243 result = LLVMBuildFSub(ctx->builder, src[0], src[1], "");
1244 break;
1245 case nir_op_isub:
1246 result = LLVMBuildSub(ctx->builder, src[0], src[1], "");
1247 break;
1248 case nir_op_imul:
1249 result = LLVMBuildMul(ctx->builder, src[0], src[1], "");
1250 break;
1251 case nir_op_imod:
1252 result = LLVMBuildSRem(ctx->builder, src[0], src[1], "");
1253 break;
1254 case nir_op_umod:
1255 result = LLVMBuildURem(ctx->builder, src[0], src[1], "");
1256 break;
1257 case nir_op_fmod:
1258 src[0] = to_float(ctx, src[0]);
1259 src[1] = to_float(ctx, src[1]);
1260 result = ac_emit_fdiv(&ctx->ac, src[0], src[1]);
1261 result = emit_intrin_1f_param(ctx, "llvm.floor.f32", result);
1262 result = LLVMBuildFMul(ctx->builder, src[1] , result, "");
1263 result = LLVMBuildFSub(ctx->builder, src[0], result, "");
1264 break;
1265 case nir_op_frem:
1266 src[0] = to_float(ctx, src[0]);
1267 src[1] = to_float(ctx, src[1]);
1268 result = LLVMBuildFRem(ctx->builder, src[0], src[1], "");
1269 break;
1270 case nir_op_idiv:
1271 result = LLVMBuildSDiv(ctx->builder, src[0], src[1], "");
1272 break;
1273 case nir_op_udiv:
1274 result = LLVMBuildUDiv(ctx->builder, src[0], src[1], "");
1275 break;
1276 case nir_op_fmul:
1277 src[0] = to_float(ctx, src[0]);
1278 src[1] = to_float(ctx, src[1]);
1279 result = LLVMBuildFMul(ctx->builder, src[0], src[1], "");
1280 break;
1281 case nir_op_fdiv:
1282 src[0] = to_float(ctx, src[0]);
1283 src[1] = to_float(ctx, src[1]);
1284 result = ac_emit_fdiv(&ctx->ac, src[0], src[1]);
1285 break;
1286 case nir_op_frcp:
1287 src[0] = to_float(ctx, src[0]);
1288 result = ac_emit_fdiv(&ctx->ac, ctx->f32one, src[0]);
1289 break;
1290 case nir_op_iand:
1291 result = LLVMBuildAnd(ctx->builder, src[0], src[1], "");
1292 break;
1293 case nir_op_ior:
1294 result = LLVMBuildOr(ctx->builder, src[0], src[1], "");
1295 break;
1296 case nir_op_ixor:
1297 result = LLVMBuildXor(ctx->builder, src[0], src[1], "");
1298 break;
1299 case nir_op_ishl:
1300 result = LLVMBuildShl(ctx->builder, src[0], src[1], "");
1301 break;
1302 case nir_op_ishr:
1303 result = LLVMBuildAShr(ctx->builder, src[0], src[1], "");
1304 break;
1305 case nir_op_ushr:
1306 result = LLVMBuildLShr(ctx->builder, src[0], src[1], "");
1307 break;
1308 case nir_op_ilt:
1309 result = emit_int_cmp(ctx, LLVMIntSLT, src[0], src[1]);
1310 break;
1311 case nir_op_ine:
1312 result = emit_int_cmp(ctx, LLVMIntNE, src[0], src[1]);
1313 break;
1314 case nir_op_ieq:
1315 result = emit_int_cmp(ctx, LLVMIntEQ, src[0], src[1]);
1316 break;
1317 case nir_op_ige:
1318 result = emit_int_cmp(ctx, LLVMIntSGE, src[0], src[1]);
1319 break;
1320 case nir_op_ult:
1321 result = emit_int_cmp(ctx, LLVMIntULT, src[0], src[1]);
1322 break;
1323 case nir_op_uge:
1324 result = emit_int_cmp(ctx, LLVMIntUGE, src[0], src[1]);
1325 break;
1326 case nir_op_feq:
1327 result = emit_float_cmp(ctx, LLVMRealUEQ, src[0], src[1]);
1328 break;
1329 case nir_op_fne:
1330 result = emit_float_cmp(ctx, LLVMRealUNE, src[0], src[1]);
1331 break;
1332 case nir_op_flt:
1333 result = emit_float_cmp(ctx, LLVMRealULT, src[0], src[1]);
1334 break;
1335 case nir_op_fge:
1336 result = emit_float_cmp(ctx, LLVMRealUGE, src[0], src[1]);
1337 break;
1338 case nir_op_fabs:
1339 result = emit_intrin_1f_param(ctx, "llvm.fabs.f32", src[0]);
1340 break;
1341 case nir_op_iabs:
1342 result = emit_iabs(ctx, src[0]);
1343 break;
1344 case nir_op_imax:
1345 result = emit_minmax_int(ctx, LLVMIntSGT, src[0], src[1]);
1346 break;
1347 case nir_op_imin:
1348 result = emit_minmax_int(ctx, LLVMIntSLT, src[0], src[1]);
1349 break;
1350 case nir_op_umax:
1351 result = emit_minmax_int(ctx, LLVMIntUGT, src[0], src[1]);
1352 break;
1353 case nir_op_umin:
1354 result = emit_minmax_int(ctx, LLVMIntULT, src[0], src[1]);
1355 break;
1356 case nir_op_isign:
1357 result = emit_isign(ctx, src[0]);
1358 break;
1359 case nir_op_fsign:
1360 src[0] = to_float(ctx, src[0]);
1361 result = emit_fsign(ctx, src[0]);
1362 break;
1363 case nir_op_ffloor:
1364 result = emit_intrin_1f_param(ctx, "llvm.floor.f32", src[0]);
1365 break;
1366 case nir_op_ftrunc:
1367 result = emit_intrin_1f_param(ctx, "llvm.trunc.f32", src[0]);
1368 break;
1369 case nir_op_fceil:
1370 result = emit_intrin_1f_param(ctx, "llvm.ceil.f32", src[0]);
1371 break;
1372 case nir_op_fround_even:
1373 result = emit_intrin_1f_param(ctx, "llvm.rint.f32", src[0]);
1374 break;
1375 case nir_op_ffract:
1376 result = emit_ffract(ctx, src[0]);
1377 break;
1378 case nir_op_fsin:
1379 result = emit_intrin_1f_param(ctx, "llvm.sin.f32", src[0]);
1380 break;
1381 case nir_op_fcos:
1382 result = emit_intrin_1f_param(ctx, "llvm.cos.f32", src[0]);
1383 break;
1384 case nir_op_fsqrt:
1385 result = emit_intrin_1f_param(ctx, "llvm.sqrt.f32", src[0]);
1386 break;
1387 case nir_op_fexp2:
1388 result = emit_intrin_1f_param(ctx, "llvm.exp2.f32", src[0]);
1389 break;
1390 case nir_op_flog2:
1391 result = emit_intrin_1f_param(ctx, "llvm.log2.f32", src[0]);
1392 break;
1393 case nir_op_frsq:
1394 result = emit_intrin_1f_param(ctx, "llvm.sqrt.f32", src[0]);
1395 result = ac_emit_fdiv(&ctx->ac, ctx->f32one, result);
1396 break;
1397 case nir_op_fpow:
1398 result = emit_intrin_2f_param(ctx, "llvm.pow.f32", src[0], src[1]);
1399 break;
1400 case nir_op_fmax:
1401 result = emit_intrin_2f_param(ctx, "llvm.maxnum.f32", src[0], src[1]);
1402 break;
1403 case nir_op_fmin:
1404 result = emit_intrin_2f_param(ctx, "llvm.minnum.f32", src[0], src[1]);
1405 break;
1406 case nir_op_ffma:
1407 result = emit_intrin_3f_param(ctx, "llvm.fma.f32", src[0], src[1], src[2]);
1408 break;
1409 case nir_op_ibitfield_extract:
1410 result = emit_bitfield_extract(ctx, "llvm.AMDGPU.bfe.i32", src);
1411 break;
1412 case nir_op_ubitfield_extract:
1413 result = emit_bitfield_extract(ctx, "llvm.AMDGPU.bfe.u32", src);
1414 break;
1415 case nir_op_bitfield_insert:
1416 result = emit_bitfield_insert(ctx, src[0], src[1], src[2], src[3]);
1417 break;
1418 case nir_op_bitfield_reverse:
1419 result = ac_emit_llvm_intrinsic(&ctx->ac, "llvm.bitreverse.i32", ctx->i32, src, 1, AC_FUNC_ATTR_READNONE);
1420 break;
1421 case nir_op_bit_count:
1422 result = ac_emit_llvm_intrinsic(&ctx->ac, "llvm.ctpop.i32", ctx->i32, src, 1, AC_FUNC_ATTR_READNONE);
1423 break;
1424 case nir_op_vec2:
1425 case nir_op_vec3:
1426 case nir_op_vec4:
1427 for (unsigned i = 0; i < nir_op_infos[instr->op].num_inputs; i++)
1428 src[i] = to_integer(ctx, src[i]);
1429 result = ac_build_gather_values(&ctx->ac, src, num_components);
1430 break;
1431 case nir_op_f2i:
1432 src[0] = to_float(ctx, src[0]);
1433 result = LLVMBuildFPToSI(ctx->builder, src[0], ctx->i32, "");
1434 break;
1435 case nir_op_f2u:
1436 src[0] = to_float(ctx, src[0]);
1437 result = LLVMBuildFPToUI(ctx->builder, src[0], ctx->i32, "");
1438 break;
1439 case nir_op_i2f:
1440 result = LLVMBuildSIToFP(ctx->builder, src[0], ctx->f32, "");
1441 break;
1442 case nir_op_u2f:
1443 result = LLVMBuildUIToFP(ctx->builder, src[0], ctx->f32, "");
1444 break;
1445 case nir_op_bcsel:
1446 result = emit_bcsel(ctx, src[0], src[1], src[2]);
1447 break;
1448 case nir_op_find_lsb:
1449 result = emit_find_lsb(ctx, src[0]);
1450 break;
1451 case nir_op_ufind_msb:
1452 result = emit_ufind_msb(ctx, src[0]);
1453 break;
1454 case nir_op_ifind_msb:
1455 result = emit_ifind_msb(ctx, src[0]);
1456 break;
1457 case nir_op_uadd_carry:
1458 result = emit_uint_carry(ctx, "llvm.uadd.with.overflow.i32", src[0], src[1]);
1459 break;
1460 case nir_op_usub_borrow:
1461 result = emit_uint_carry(ctx, "llvm.usub.with.overflow.i32", src[0], src[1]);
1462 break;
1463 case nir_op_b2f:
1464 result = emit_b2f(ctx, src[0]);
1465 break;
1466 case nir_op_fquantize2f16:
1467 src[0] = to_float(ctx, src[0]);
1468 result = LLVMBuildFPTrunc(ctx->builder, src[0], ctx->f16, "");
1469 /* need to convert back up to f32 */
1470 result = LLVMBuildFPExt(ctx->builder, result, ctx->f32, "");
1471 break;
1472 case nir_op_umul_high:
1473 result = emit_umul_high(ctx, src[0], src[1]);
1474 break;
1475 case nir_op_imul_high:
1476 result = emit_imul_high(ctx, src[0], src[1]);
1477 break;
1478 case nir_op_pack_half_2x16:
1479 result = emit_pack_half_2x16(ctx, src[0]);
1480 break;
1481 case nir_op_unpack_half_2x16:
1482 result = emit_unpack_half_2x16(ctx, src[0]);
1483 break;
1484 case nir_op_fddx:
1485 case nir_op_fddy:
1486 case nir_op_fddx_fine:
1487 case nir_op_fddy_fine:
1488 case nir_op_fddx_coarse:
1489 case nir_op_fddy_coarse:
1490 result = emit_ddxy(ctx, instr->op, src[0]);
1491 break;
1492 default:
1493 fprintf(stderr, "Unknown NIR alu instr: ");
1494 nir_print_instr(&instr->instr, stderr);
1495 fprintf(stderr, "\n");
1496 abort();
1497 }
1498
1499 if (result) {
1500 assert(instr->dest.dest.is_ssa);
1501 result = to_integer(ctx, result);
1502 _mesa_hash_table_insert(ctx->defs, &instr->dest.dest.ssa,
1503 result);
1504 }
1505 }
1506
1507 static void visit_load_const(struct nir_to_llvm_context *ctx,
1508 nir_load_const_instr *instr)
1509 {
1510 LLVMValueRef values[4], value = NULL;
1511 LLVMTypeRef element_type =
1512 LLVMIntTypeInContext(ctx->context, instr->def.bit_size);
1513
1514 for (unsigned i = 0; i < instr->def.num_components; ++i) {
1515 switch (instr->def.bit_size) {
1516 case 32:
1517 values[i] = LLVMConstInt(element_type,
1518 instr->value.u32[i], false);
1519 break;
1520 case 64:
1521 values[i] = LLVMConstInt(element_type,
1522 instr->value.u64[i], false);
1523 break;
1524 default:
1525 fprintf(stderr,
1526 "unsupported nir load_const bit_size: %d\n",
1527 instr->def.bit_size);
1528 abort();
1529 }
1530 }
1531 if (instr->def.num_components > 1) {
1532 value = LLVMConstVector(values, instr->def.num_components);
1533 } else
1534 value = values[0];
1535
1536 _mesa_hash_table_insert(ctx->defs, &instr->def, value);
1537 }
1538
1539 static LLVMValueRef cast_ptr(struct nir_to_llvm_context *ctx, LLVMValueRef ptr,
1540 LLVMTypeRef type)
1541 {
1542 int addr_space = LLVMGetPointerAddressSpace(LLVMTypeOf(ptr));
1543 return LLVMBuildBitCast(ctx->builder, ptr,
1544 LLVMPointerType(type, addr_space), "");
1545 }
1546
1547 static LLVMValueRef
1548 get_buffer_size(struct nir_to_llvm_context *ctx, LLVMValueRef descriptor, bool in_elements)
1549 {
1550 LLVMValueRef size =
1551 LLVMBuildExtractElement(ctx->builder, descriptor,
1552 LLVMConstInt(ctx->i32, 2, false), "");
1553
1554 /* VI only */
1555 if (ctx->options->chip_class >= VI && in_elements) {
1556 /* On VI, the descriptor contains the size in bytes,
1557 * but TXQ must return the size in elements.
1558 * The stride is always non-zero for resources using TXQ.
1559 */
1560 LLVMValueRef stride =
1561 LLVMBuildExtractElement(ctx->builder, descriptor,
1562 LLVMConstInt(ctx->i32, 1, false), "");
1563 stride = LLVMBuildLShr(ctx->builder, stride,
1564 LLVMConstInt(ctx->i32, 16, false), "");
1565 stride = LLVMBuildAnd(ctx->builder, stride,
1566 LLVMConstInt(ctx->i32, 0x3fff, false), "");
1567
1568 size = LLVMBuildUDiv(ctx->builder, size, stride, "");
1569 }
1570 return size;
1571 }
1572
1573 /**
1574 * Given the i32 or vNi32 \p type, generate the textual name (e.g. for use with
1575 * intrinsic names).
1576 */
1577 static void build_int_type_name(
1578 LLVMTypeRef type,
1579 char *buf, unsigned bufsize)
1580 {
1581 assert(bufsize >= 6);
1582
1583 if (LLVMGetTypeKind(type) == LLVMVectorTypeKind)
1584 snprintf(buf, bufsize, "v%ui32",
1585 LLVMGetVectorSize(type));
1586 else
1587 strcpy(buf, "i32");
1588 }
1589
1590 static LLVMValueRef radv_lower_gather4_integer(struct nir_to_llvm_context *ctx,
1591 struct ac_tex_info *tinfo,
1592 nir_tex_instr *instr,
1593 const char *intr_name,
1594 unsigned coord_vgpr_index)
1595 {
1596 LLVMValueRef coord = tinfo->args[0];
1597 LLVMValueRef half_texel[2];
1598 int c;
1599
1600 //TODO Rect
1601 {
1602 LLVMValueRef txq_args[10];
1603 int txq_arg_count = 0;
1604 LLVMValueRef size;
1605 bool da = instr->is_array || instr->sampler_dim == GLSL_SAMPLER_DIM_CUBE;
1606 txq_args[txq_arg_count++] = LLVMConstInt(ctx->i32, 0, false);
1607 txq_args[txq_arg_count++] = tinfo->args[1];
1608 txq_args[txq_arg_count++] = LLVMConstInt(ctx->i32, 0xf, 0); /* dmask */
1609 txq_args[txq_arg_count++] = LLVMConstInt(ctx->i32, 0, 0); /* unorm */
1610 txq_args[txq_arg_count++] = LLVMConstInt(ctx->i32, 0, 0); /* r128 */
1611 txq_args[txq_arg_count++] = LLVMConstInt(ctx->i32, da ? 1 : 0, 0);
1612 txq_args[txq_arg_count++] = LLVMConstInt(ctx->i32, 0, 0); /* glc */
1613 txq_args[txq_arg_count++] = LLVMConstInt(ctx->i32, 0, 0); /* slc */
1614 txq_args[txq_arg_count++] = LLVMConstInt(ctx->i32, 0, 0); /* tfe */
1615 txq_args[txq_arg_count++] = LLVMConstInt(ctx->i32, 0, 0); /* lwe */
1616 size = ac_emit_llvm_intrinsic(&ctx->ac, "llvm.SI.getresinfo.i32", ctx->v4i32,
1617 txq_args, txq_arg_count,
1618 AC_FUNC_ATTR_READNONE);
1619
1620 for (c = 0; c < 2; c++) {
1621 half_texel[c] = LLVMBuildExtractElement(ctx->builder, size,
1622 LLVMConstInt(ctx->i32, c, false), "");
1623 half_texel[c] = LLVMBuildUIToFP(ctx->builder, half_texel[c], ctx->f32, "");
1624 half_texel[c] = ac_emit_fdiv(&ctx->ac, ctx->f32one, half_texel[c]);
1625 half_texel[c] = LLVMBuildFMul(ctx->builder, half_texel[c],
1626 LLVMConstReal(ctx->f32, -0.5), "");
1627 }
1628 }
1629
1630 for (c = 0; c < 2; c++) {
1631 LLVMValueRef tmp;
1632 LLVMValueRef index = LLVMConstInt(ctx->i32, coord_vgpr_index + c, 0);
1633 tmp = LLVMBuildExtractElement(ctx->builder, coord, index, "");
1634 tmp = LLVMBuildBitCast(ctx->builder, tmp, ctx->f32, "");
1635 tmp = LLVMBuildFAdd(ctx->builder, tmp, half_texel[c], "");
1636 tmp = LLVMBuildBitCast(ctx->builder, tmp, ctx->i32, "");
1637 coord = LLVMBuildInsertElement(ctx->builder, coord, tmp, index, "");
1638 }
1639
1640 tinfo->args[0] = coord;
1641 return ac_emit_llvm_intrinsic(&ctx->ac, intr_name, tinfo->dst_type, tinfo->args, tinfo->arg_count,
1642 AC_FUNC_ATTR_READNONE | AC_FUNC_ATTR_NOUNWIND);
1643
1644 }
1645
1646 static LLVMValueRef build_tex_intrinsic(struct nir_to_llvm_context *ctx,
1647 nir_tex_instr *instr,
1648 struct ac_tex_info *tinfo)
1649 {
1650 const char *name = "llvm.SI.image.sample";
1651 const char *infix = "";
1652 char intr_name[127];
1653 char type[64];
1654 bool is_shadow = instr->is_shadow;
1655 bool has_offset = tinfo->has_offset;
1656 switch (instr->op) {
1657 case nir_texop_txf:
1658 case nir_texop_txf_ms:
1659 case nir_texop_samples_identical:
1660 name = instr->sampler_dim == GLSL_SAMPLER_DIM_MS ? "llvm.SI.image.load" :
1661 instr->sampler_dim == GLSL_SAMPLER_DIM_BUF ? "llvm.SI.vs.load.input" :
1662 "llvm.SI.image.load.mip";
1663 is_shadow = false;
1664 has_offset = false;
1665 break;
1666 case nir_texop_txb:
1667 infix = ".b";
1668 break;
1669 case nir_texop_txl:
1670 infix = ".l";
1671 break;
1672 case nir_texop_txs:
1673 name = "llvm.SI.getresinfo";
1674 break;
1675 case nir_texop_query_levels:
1676 name = "llvm.SI.getresinfo";
1677 break;
1678 case nir_texop_tex:
1679 if (ctx->stage != MESA_SHADER_FRAGMENT)
1680 infix = ".lz";
1681 break;
1682 case nir_texop_txd:
1683 infix = ".d";
1684 break;
1685 case nir_texop_tg4:
1686 name = "llvm.SI.gather4";
1687 infix = ".lz";
1688 break;
1689 case nir_texop_lod:
1690 name = "llvm.SI.getlod";
1691 is_shadow = false;
1692 has_offset = false;
1693 break;
1694 default:
1695 break;
1696 }
1697
1698 build_int_type_name(LLVMTypeOf(tinfo->args[0]), type, sizeof(type));
1699 sprintf(intr_name, "%s%s%s%s.%s", name, is_shadow ? ".c" : "", infix,
1700 has_offset ? ".o" : "", type);
1701
1702 if (instr->op == nir_texop_tg4) {
1703 enum glsl_base_type stype = glsl_get_sampler_result_type(instr->texture->var->type);
1704 if (stype == GLSL_TYPE_UINT || stype == GLSL_TYPE_INT) {
1705 return radv_lower_gather4_integer(ctx, tinfo, instr, intr_name,
1706 (int)has_offset + (int)is_shadow);
1707 }
1708 }
1709 return ac_emit_llvm_intrinsic(&ctx->ac, intr_name, tinfo->dst_type, tinfo->args, tinfo->arg_count,
1710 AC_FUNC_ATTR_READNONE | AC_FUNC_ATTR_NOUNWIND);
1711
1712 }
1713
1714 static LLVMValueRef visit_vulkan_resource_index(struct nir_to_llvm_context *ctx,
1715 nir_intrinsic_instr *instr)
1716 {
1717 LLVMValueRef index = get_src(ctx, instr->src[0]);
1718 unsigned desc_set = nir_intrinsic_desc_set(instr);
1719 unsigned binding = nir_intrinsic_binding(instr);
1720 LLVMValueRef desc_ptr = ctx->descriptor_sets[desc_set];
1721 struct radv_descriptor_set_layout *layout = ctx->options->layout->set[desc_set].layout;
1722 unsigned base_offset = layout->binding[binding].offset;
1723 LLVMValueRef offset, stride;
1724
1725 if (layout->binding[binding].type == VK_DESCRIPTOR_TYPE_UNIFORM_BUFFER_DYNAMIC ||
1726 layout->binding[binding].type == VK_DESCRIPTOR_TYPE_STORAGE_BUFFER_DYNAMIC) {
1727 desc_ptr = ctx->push_constants;
1728 base_offset = ctx->options->layout->push_constant_size;
1729 base_offset += 16 * layout->binding[binding].dynamic_offset_offset;
1730 stride = LLVMConstInt(ctx->i32, 16, false);
1731 } else
1732 stride = LLVMConstInt(ctx->i32, layout->binding[binding].size, false);
1733
1734 offset = LLVMConstInt(ctx->i32, base_offset, false);
1735 index = LLVMBuildMul(ctx->builder, index, stride, "");
1736 offset = LLVMBuildAdd(ctx->builder, offset, index, "");
1737
1738 desc_ptr = build_gep0(ctx, desc_ptr, offset);
1739 desc_ptr = cast_ptr(ctx, desc_ptr, ctx->v4i32);
1740 LLVMSetMetadata(desc_ptr, ctx->uniform_md_kind, ctx->empty_md);
1741
1742 return LLVMBuildLoad(ctx->builder, desc_ptr, "");
1743 }
1744
1745 static LLVMValueRef visit_load_push_constant(struct nir_to_llvm_context *ctx,
1746 nir_intrinsic_instr *instr)
1747 {
1748 LLVMValueRef ptr, addr;
1749
1750 addr = LLVMConstInt(ctx->i32, nir_intrinsic_base(instr), 0);
1751 addr = LLVMBuildAdd(ctx->builder, addr, get_src(ctx, instr->src[0]), "");
1752
1753 ptr = build_gep0(ctx, ctx->push_constants, addr);
1754 ptr = cast_ptr(ctx, ptr, get_def_type(ctx, &instr->dest.ssa));
1755
1756 return LLVMBuildLoad(ctx->builder, ptr, "");
1757 }
1758
1759 static LLVMValueRef visit_get_buffer_size(struct nir_to_llvm_context *ctx,
1760 nir_intrinsic_instr *instr)
1761 {
1762 LLVMValueRef desc = get_src(ctx, instr->src[0]);
1763
1764 return get_buffer_size(ctx, desc, false);
1765 }
1766 static void visit_store_ssbo(struct nir_to_llvm_context *ctx,
1767 nir_intrinsic_instr *instr)
1768 {
1769 const char *store_name;
1770 LLVMTypeRef data_type = ctx->f32;
1771 unsigned writemask = nir_intrinsic_write_mask(instr);
1772 LLVMValueRef base_data, base_offset;
1773 LLVMValueRef params[6];
1774
1775 if (ctx->stage == MESA_SHADER_FRAGMENT)
1776 ctx->shader_info->fs.writes_memory = true;
1777
1778 params[1] = get_src(ctx, instr->src[1]);
1779 params[2] = LLVMConstInt(ctx->i32, 0, false); /* vindex */
1780 params[4] = LLVMConstInt(ctx->i1, 0, false); /* glc */
1781 params[5] = LLVMConstInt(ctx->i1, 0, false); /* slc */
1782
1783 if (instr->num_components > 1)
1784 data_type = LLVMVectorType(ctx->f32, instr->num_components);
1785
1786 base_data = to_float(ctx, get_src(ctx, instr->src[0]));
1787 base_data = trim_vector(ctx, base_data, instr->num_components);
1788 base_data = LLVMBuildBitCast(ctx->builder, base_data,
1789 data_type, "");
1790 base_offset = get_src(ctx, instr->src[2]); /* voffset */
1791 while (writemask) {
1792 int start, count;
1793 LLVMValueRef data;
1794 LLVMValueRef offset;
1795 LLVMValueRef tmp;
1796 u_bit_scan_consecutive_range(&writemask, &start, &count);
1797
1798 /* Due to an LLVM limitation, split 3-element writes
1799 * into a 2-element and a 1-element write. */
1800 if (count == 3) {
1801 writemask |= 1 << (start + 2);
1802 count = 2;
1803 }
1804
1805 if (count == 4) {
1806 store_name = "llvm.amdgcn.buffer.store.v4f32";
1807 data = base_data;
1808 } else if (count == 2) {
1809 tmp = LLVMBuildExtractElement(ctx->builder,
1810 base_data, LLVMConstInt(ctx->i32, start, false), "");
1811 data = LLVMBuildInsertElement(ctx->builder, LLVMGetUndef(ctx->v2f32), tmp,
1812 ctx->i32zero, "");
1813
1814 tmp = LLVMBuildExtractElement(ctx->builder,
1815 base_data, LLVMConstInt(ctx->i32, start + 1, false), "");
1816 data = LLVMBuildInsertElement(ctx->builder, data, tmp,
1817 ctx->i32one, "");
1818 store_name = "llvm.amdgcn.buffer.store.v2f32";
1819
1820 } else {
1821 assert(count == 1);
1822 if (get_llvm_num_components(base_data) > 1)
1823 data = LLVMBuildExtractElement(ctx->builder, base_data,
1824 LLVMConstInt(ctx->i32, start, false), "");
1825 else
1826 data = base_data;
1827 store_name = "llvm.amdgcn.buffer.store.f32";
1828 }
1829
1830 offset = base_offset;
1831 if (start != 0) {
1832 offset = LLVMBuildAdd(ctx->builder, offset, LLVMConstInt(ctx->i32, start * 4, false), "");
1833 }
1834 params[0] = data;
1835 params[3] = offset;
1836 ac_emit_llvm_intrinsic(&ctx->ac, store_name,
1837 ctx->voidt, params, 6, 0);
1838 }
1839 }
1840
1841 static LLVMValueRef visit_atomic_ssbo(struct nir_to_llvm_context *ctx,
1842 nir_intrinsic_instr *instr)
1843 {
1844 const char *name;
1845 LLVMValueRef params[6];
1846 int arg_count = 0;
1847 if (ctx->stage == MESA_SHADER_FRAGMENT)
1848 ctx->shader_info->fs.writes_memory = true;
1849
1850 if (instr->intrinsic == nir_intrinsic_ssbo_atomic_comp_swap) {
1851 params[arg_count++] = llvm_extract_elem(ctx, get_src(ctx, instr->src[3]), 0);
1852 }
1853 params[arg_count++] = llvm_extract_elem(ctx, get_src(ctx, instr->src[2]), 0);
1854 params[arg_count++] = get_src(ctx, instr->src[0]);
1855 params[arg_count++] = LLVMConstInt(ctx->i32, 0, false); /* vindex */
1856 params[arg_count++] = get_src(ctx, instr->src[1]); /* voffset */
1857 params[arg_count++] = LLVMConstInt(ctx->i1, 0, false); /* slc */
1858
1859 switch (instr->intrinsic) {
1860 case nir_intrinsic_ssbo_atomic_add:
1861 name = "llvm.amdgcn.buffer.atomic.add";
1862 break;
1863 case nir_intrinsic_ssbo_atomic_imin:
1864 name = "llvm.amdgcn.buffer.atomic.smin";
1865 break;
1866 case nir_intrinsic_ssbo_atomic_umin:
1867 name = "llvm.amdgcn.buffer.atomic.umin";
1868 break;
1869 case nir_intrinsic_ssbo_atomic_imax:
1870 name = "llvm.amdgcn.buffer.atomic.smax";
1871 break;
1872 case nir_intrinsic_ssbo_atomic_umax:
1873 name = "llvm.amdgcn.buffer.atomic.umax";
1874 break;
1875 case nir_intrinsic_ssbo_atomic_and:
1876 name = "llvm.amdgcn.buffer.atomic.and";
1877 break;
1878 case nir_intrinsic_ssbo_atomic_or:
1879 name = "llvm.amdgcn.buffer.atomic.or";
1880 break;
1881 case nir_intrinsic_ssbo_atomic_xor:
1882 name = "llvm.amdgcn.buffer.atomic.xor";
1883 break;
1884 case nir_intrinsic_ssbo_atomic_exchange:
1885 name = "llvm.amdgcn.buffer.atomic.swap";
1886 break;
1887 case nir_intrinsic_ssbo_atomic_comp_swap:
1888 name = "llvm.amdgcn.buffer.atomic.cmpswap";
1889 break;
1890 default:
1891 abort();
1892 }
1893
1894 return ac_emit_llvm_intrinsic(&ctx->ac, name, ctx->i32, params, arg_count, 0);
1895 }
1896
1897 static LLVMValueRef visit_load_buffer(struct nir_to_llvm_context *ctx,
1898 nir_intrinsic_instr *instr)
1899 {
1900 const char *load_name;
1901 LLVMTypeRef data_type = ctx->f32;
1902 if (instr->num_components == 3)
1903 data_type = LLVMVectorType(ctx->f32, 4);
1904 else if (instr->num_components > 1)
1905 data_type = LLVMVectorType(ctx->f32, instr->num_components);
1906
1907 if (instr->num_components == 4 || instr->num_components == 3)
1908 load_name = "llvm.amdgcn.buffer.load.v4f32";
1909 else if (instr->num_components == 2)
1910 load_name = "llvm.amdgcn.buffer.load.v2f32";
1911 else if (instr->num_components == 1)
1912 load_name = "llvm.amdgcn.buffer.load.f32";
1913 else
1914 abort();
1915
1916 LLVMValueRef params[] = {
1917 get_src(ctx, instr->src[0]),
1918 LLVMConstInt(ctx->i32, 0, false),
1919 get_src(ctx, instr->src[1]),
1920 LLVMConstInt(ctx->i1, 0, false),
1921 LLVMConstInt(ctx->i1, 0, false),
1922 };
1923
1924 LLVMValueRef ret =
1925 ac_emit_llvm_intrinsic(&ctx->ac, load_name, data_type, params, 5, 0);
1926
1927 if (instr->num_components == 3)
1928 ret = trim_vector(ctx, ret, 3);
1929
1930 return LLVMBuildBitCast(ctx->builder, ret,
1931 get_def_type(ctx, &instr->dest.ssa), "");
1932 }
1933
1934 static LLVMValueRef visit_load_ubo_buffer(struct nir_to_llvm_context *ctx,
1935 nir_intrinsic_instr *instr)
1936 {
1937 LLVMValueRef results[4], ret;
1938 LLVMValueRef rsrc = get_src(ctx, instr->src[0]);
1939 LLVMValueRef offset = get_src(ctx, instr->src[1]);
1940
1941 rsrc = LLVMBuildBitCast(ctx->builder, rsrc, LLVMVectorType(ctx->i8, 16), "");
1942
1943 for (unsigned i = 0; i < instr->num_components; ++i) {
1944 LLVMValueRef params[] = {
1945 rsrc,
1946 LLVMBuildAdd(ctx->builder, LLVMConstInt(ctx->i32, 4 * i, 0),
1947 offset, "")
1948 };
1949 results[i] = ac_emit_llvm_intrinsic(&ctx->ac, "llvm.SI.load.const", ctx->f32,
1950 params, 2, AC_FUNC_ATTR_READNONE);
1951 }
1952
1953
1954 ret = ac_build_gather_values(&ctx->ac, results, instr->num_components);
1955 return LLVMBuildBitCast(ctx->builder, ret,
1956 get_def_type(ctx, &instr->dest.ssa), "");
1957 }
1958
1959 static void
1960 radv_get_deref_offset(struct nir_to_llvm_context *ctx, nir_deref *tail,
1961 bool vs_in, unsigned *const_out, LLVMValueRef *indir_out)
1962 {
1963 unsigned const_offset = 0;
1964 LLVMValueRef offset = NULL;
1965
1966
1967 while (tail->child != NULL) {
1968 const struct glsl_type *parent_type = tail->type;
1969 tail = tail->child;
1970
1971 if (tail->deref_type == nir_deref_type_array) {
1972 nir_deref_array *deref_array = nir_deref_as_array(tail);
1973 LLVMValueRef index, stride, local_offset;
1974 unsigned size = glsl_count_attribute_slots(tail->type, vs_in);
1975
1976 const_offset += size * deref_array->base_offset;
1977 if (deref_array->deref_array_type == nir_deref_array_type_direct)
1978 continue;
1979
1980 assert(deref_array->deref_array_type == nir_deref_array_type_indirect);
1981 index = get_src(ctx, deref_array->indirect);
1982 stride = LLVMConstInt(ctx->i32, size, 0);
1983 local_offset = LLVMBuildMul(ctx->builder, stride, index, "");
1984
1985 if (offset)
1986 offset = LLVMBuildAdd(ctx->builder, offset, local_offset, "");
1987 else
1988 offset = local_offset;
1989 } else if (tail->deref_type == nir_deref_type_struct) {
1990 nir_deref_struct *deref_struct = nir_deref_as_struct(tail);
1991
1992 for (unsigned i = 0; i < deref_struct->index; i++) {
1993 const struct glsl_type *ft = glsl_get_struct_field(parent_type, i);
1994 const_offset += glsl_count_attribute_slots(ft, vs_in);
1995 }
1996 } else
1997 unreachable("unsupported deref type");
1998
1999 }
2000
2001 if (const_offset && offset)
2002 offset = LLVMBuildAdd(ctx->builder, offset,
2003 LLVMConstInt(ctx->i32, const_offset, 0),
2004 "");
2005
2006 *const_out = const_offset;
2007 *indir_out = offset;
2008 }
2009
2010 static LLVMValueRef visit_load_var(struct nir_to_llvm_context *ctx,
2011 nir_intrinsic_instr *instr)
2012 {
2013 LLVMValueRef values[4];
2014 int idx = instr->variables[0]->var->data.driver_location;
2015 int ve = instr->dest.ssa.num_components;
2016 LLVMValueRef indir_index;
2017 unsigned const_index;
2018 switch (instr->variables[0]->var->data.mode) {
2019 case nir_var_shader_in:
2020 radv_get_deref_offset(ctx, &instr->variables[0]->deref,
2021 ctx->stage == MESA_SHADER_VERTEX,
2022 &const_index, &indir_index);
2023 for (unsigned chan = 0; chan < ve; chan++) {
2024 if (indir_index) {
2025 unsigned count = glsl_count_attribute_slots(
2026 instr->variables[0]->var->type,
2027 ctx->stage == MESA_SHADER_VERTEX);
2028 LLVMValueRef tmp_vec = ac_build_gather_values_extended(
2029 &ctx->ac, ctx->inputs + idx + chan, count,
2030 4, false);
2031
2032 values[chan] = LLVMBuildExtractElement(ctx->builder,
2033 tmp_vec,
2034 indir_index, "");
2035 } else
2036 values[chan] = ctx->inputs[idx + chan + const_index * 4];
2037 }
2038 return to_integer(ctx, ac_build_gather_values(&ctx->ac, values, ve));
2039 break;
2040 case nir_var_local:
2041 radv_get_deref_offset(ctx, &instr->variables[0]->deref, false,
2042 &const_index, &indir_index);
2043 for (unsigned chan = 0; chan < ve; chan++) {
2044 if (indir_index) {
2045 unsigned count = glsl_count_attribute_slots(
2046 instr->variables[0]->var->type, false);
2047 LLVMValueRef tmp_vec = ac_build_gather_values_extended(
2048 &ctx->ac, ctx->locals + idx + chan, count,
2049 4, true);
2050
2051 values[chan] = LLVMBuildExtractElement(ctx->builder,
2052 tmp_vec,
2053 indir_index, "");
2054 } else {
2055 values[chan] = LLVMBuildLoad(ctx->builder, ctx->locals[idx + chan + const_index * 4], "");
2056 }
2057 }
2058 return to_integer(ctx, ac_build_gather_values(&ctx->ac, values, ve));
2059 case nir_var_shader_out:
2060 radv_get_deref_offset(ctx, &instr->variables[0]->deref, false,
2061 &const_index, &indir_index);
2062 for (unsigned chan = 0; chan < ve; chan++) {
2063 if (indir_index) {
2064 unsigned count = glsl_count_attribute_slots(
2065 instr->variables[0]->var->type, false);
2066 LLVMValueRef tmp_vec = ac_build_gather_values_extended(
2067 &ctx->ac, ctx->outputs + idx + chan, count,
2068 4, true);
2069
2070 values[chan] = LLVMBuildExtractElement(ctx->builder,
2071 tmp_vec,
2072 indir_index, "");
2073 } else {
2074 values[chan] = LLVMBuildLoad(ctx->builder,
2075 ctx->outputs[idx + chan + const_index * 4],
2076 "");
2077 }
2078 }
2079 return to_integer(ctx, ac_build_gather_values(&ctx->ac, values, ve));
2080 case nir_var_shared: {
2081 radv_get_deref_offset(ctx, &instr->variables[0]->deref, false,
2082 &const_index, &indir_index);
2083 LLVMValueRef ptr = get_shared_memory_ptr(ctx, idx, ctx->i32);
2084 LLVMValueRef derived_ptr;
2085
2086 for (unsigned chan = 0; chan < ve; chan++) {
2087 LLVMValueRef index = LLVMConstInt(ctx->i32, chan, false);
2088 if (indir_index)
2089 index = LLVMBuildAdd(ctx->builder, index, indir_index, "");
2090 derived_ptr = LLVMBuildGEP(ctx->builder, ptr, &index, 1, "");
2091 values[chan] = LLVMBuildLoad(ctx->builder, derived_ptr, "");
2092 }
2093 return to_integer(ctx, ac_build_gather_values(&ctx->ac, values, ve));
2094 }
2095 default:
2096 break;
2097 }
2098 return NULL;
2099 }
2100
2101 static void
2102 visit_store_var(struct nir_to_llvm_context *ctx,
2103 nir_intrinsic_instr *instr)
2104 {
2105 LLVMValueRef temp_ptr, value;
2106 int idx = instr->variables[0]->var->data.driver_location;
2107 LLVMValueRef src = to_float(ctx, get_src(ctx, instr->src[0]));
2108 int writemask = instr->const_index[0];
2109 LLVMValueRef indir_index;
2110 unsigned const_index;
2111 switch (instr->variables[0]->var->data.mode) {
2112 case nir_var_shader_out:
2113 radv_get_deref_offset(ctx, &instr->variables[0]->deref, false,
2114 &const_index, &indir_index);
2115 for (unsigned chan = 0; chan < 4; chan++) {
2116 int stride = 4;
2117 if (!(writemask & (1 << chan)))
2118 continue;
2119 if (get_llvm_num_components(src) == 1)
2120 value = src;
2121 else
2122 value = LLVMBuildExtractElement(ctx->builder, src,
2123 LLVMConstInt(ctx->i32,
2124 chan, false),
2125 "");
2126
2127 if (instr->variables[0]->var->data.location == VARYING_SLOT_CLIP_DIST0 ||
2128 instr->variables[0]->var->data.location == VARYING_SLOT_CULL_DIST0)
2129 stride = 1;
2130 if (indir_index) {
2131 unsigned count = glsl_count_attribute_slots(
2132 instr->variables[0]->var->type, false);
2133 LLVMValueRef tmp_vec = ac_build_gather_values_extended(
2134 &ctx->ac, ctx->outputs + idx + chan, count,
2135 stride, true);
2136
2137 if (get_llvm_num_components(tmp_vec) > 1) {
2138 tmp_vec = LLVMBuildInsertElement(ctx->builder, tmp_vec,
2139 value, indir_index, "");
2140 } else
2141 tmp_vec = value;
2142 build_store_values_extended(ctx, ctx->outputs + idx + chan,
2143 count, stride, tmp_vec);
2144
2145 } else {
2146 temp_ptr = ctx->outputs[idx + chan + const_index * stride];
2147
2148 LLVMBuildStore(ctx->builder, value, temp_ptr);
2149 }
2150 }
2151 break;
2152 case nir_var_local:
2153 radv_get_deref_offset(ctx, &instr->variables[0]->deref, false,
2154 &const_index, &indir_index);
2155 for (unsigned chan = 0; chan < 4; chan++) {
2156 if (!(writemask & (1 << chan)))
2157 continue;
2158
2159 if (get_llvm_num_components(src) == 1)
2160 value = src;
2161 else
2162 value = LLVMBuildExtractElement(ctx->builder, src,
2163 LLVMConstInt(ctx->i32, chan, false), "");
2164 if (indir_index) {
2165 unsigned count = glsl_count_attribute_slots(
2166 instr->variables[0]->var->type, false);
2167 LLVMValueRef tmp_vec = ac_build_gather_values_extended(
2168 &ctx->ac, ctx->locals + idx + chan, count,
2169 4, true);
2170
2171 tmp_vec = LLVMBuildInsertElement(ctx->builder, tmp_vec,
2172 value, indir_index, "");
2173 build_store_values_extended(ctx, ctx->locals + idx + chan,
2174 count, 4, tmp_vec);
2175 } else {
2176 temp_ptr = ctx->locals[idx + chan + const_index * 4];
2177
2178 LLVMBuildStore(ctx->builder, value, temp_ptr);
2179 }
2180 }
2181 break;
2182 case nir_var_shared: {
2183 LLVMValueRef ptr;
2184 radv_get_deref_offset(ctx, &instr->variables[0]->deref, false,
2185 &const_index, &indir_index);
2186
2187 ptr = get_shared_memory_ptr(ctx, idx, ctx->i32);
2188 LLVMValueRef derived_ptr;
2189
2190 for (unsigned chan = 0; chan < 4; chan++) {
2191 if (!(writemask & (1 << chan)))
2192 continue;
2193
2194 LLVMValueRef index = LLVMConstInt(ctx->i32, chan, false);
2195
2196 if (get_llvm_num_components(src) == 1)
2197 value = src;
2198 else
2199 value = LLVMBuildExtractElement(ctx->builder, src,
2200 LLVMConstInt(ctx->i32,
2201 chan, false),
2202 "");
2203
2204 if (indir_index)
2205 index = LLVMBuildAdd(ctx->builder, index, indir_index, "");
2206
2207 derived_ptr = LLVMBuildGEP(ctx->builder, ptr, &index, 1, "");
2208 LLVMBuildStore(ctx->builder,
2209 to_integer(ctx, value), derived_ptr);
2210 }
2211 break;
2212 }
2213 default:
2214 break;
2215 }
2216 }
2217
2218 static int image_type_to_components_count(enum glsl_sampler_dim dim, bool array)
2219 {
2220 switch (dim) {
2221 case GLSL_SAMPLER_DIM_BUF:
2222 return 1;
2223 case GLSL_SAMPLER_DIM_1D:
2224 return array ? 2 : 1;
2225 case GLSL_SAMPLER_DIM_2D:
2226 return array ? 3 : 2;
2227 case GLSL_SAMPLER_DIM_MS:
2228 return array ? 4 : 3;
2229 case GLSL_SAMPLER_DIM_3D:
2230 case GLSL_SAMPLER_DIM_CUBE:
2231 return 3;
2232 case GLSL_SAMPLER_DIM_RECT:
2233 case GLSL_SAMPLER_DIM_SUBPASS:
2234 return 2;
2235 case GLSL_SAMPLER_DIM_SUBPASS_MS:
2236 return 3;
2237 default:
2238 break;
2239 }
2240 return 0;
2241 }
2242
2243 static LLVMValueRef get_image_coords(struct nir_to_llvm_context *ctx,
2244 nir_intrinsic_instr *instr, bool add_frag_pos)
2245 {
2246 const struct glsl_type *type = instr->variables[0]->var->type;
2247 if(instr->variables[0]->deref.child)
2248 type = instr->variables[0]->deref.child->type;
2249
2250 LLVMValueRef src0 = get_src(ctx, instr->src[0]);
2251 LLVMValueRef coords[4];
2252 LLVMValueRef masks[] = {
2253 LLVMConstInt(ctx->i32, 0, false), LLVMConstInt(ctx->i32, 1, false),
2254 LLVMConstInt(ctx->i32, 2, false), LLVMConstInt(ctx->i32, 3, false),
2255 };
2256 LLVMValueRef res;
2257 int count;
2258 enum glsl_sampler_dim dim = glsl_get_sampler_dim(type);
2259 bool is_ms = (dim == GLSL_SAMPLER_DIM_MS ||
2260 dim == GLSL_SAMPLER_DIM_SUBPASS_MS);
2261
2262 count = image_type_to_components_count(dim,
2263 glsl_sampler_type_is_array(type));
2264
2265 if (count == 1) {
2266 if (instr->src[0].ssa->num_components)
2267 res = LLVMBuildExtractElement(ctx->builder, src0, masks[0], "");
2268 else
2269 res = src0;
2270 } else {
2271 int chan;
2272 if (is_ms)
2273 count--;
2274 for (chan = 0; chan < count; ++chan) {
2275 coords[chan] = LLVMBuildExtractElement(ctx->builder, src0, masks[chan], "");
2276 }
2277
2278 if (add_frag_pos) {
2279 for (chan = 0; chan < count; ++chan)
2280 coords[chan] = LLVMBuildAdd(ctx->builder, coords[chan], LLVMBuildFPToUI(ctx->builder, ctx->frag_pos[chan], ctx->i32, ""), "");
2281 }
2282 if (is_ms) {
2283 coords[count] = llvm_extract_elem(ctx, get_src(ctx, instr->src[1]), 0);
2284 count++;
2285 }
2286
2287 if (count == 3) {
2288 coords[3] = LLVMGetUndef(ctx->i32);
2289 count = 4;
2290 }
2291 res = ac_build_gather_values(&ctx->ac, coords, count);
2292 }
2293 return res;
2294 }
2295
2296 static void build_type_name_for_intr(
2297 LLVMTypeRef type,
2298 char *buf, unsigned bufsize)
2299 {
2300 LLVMTypeRef elem_type = type;
2301
2302 assert(bufsize >= 8);
2303
2304 if (LLVMGetTypeKind(type) == LLVMVectorTypeKind) {
2305 int ret = snprintf(buf, bufsize, "v%u",
2306 LLVMGetVectorSize(type));
2307 if (ret < 0) {
2308 char *type_name = LLVMPrintTypeToString(type);
2309 fprintf(stderr, "Error building type name for: %s\n",
2310 type_name);
2311 return;
2312 }
2313 elem_type = LLVMGetElementType(type);
2314 buf += ret;
2315 bufsize -= ret;
2316 }
2317 switch (LLVMGetTypeKind(elem_type)) {
2318 default: break;
2319 case LLVMIntegerTypeKind:
2320 snprintf(buf, bufsize, "i%d", LLVMGetIntTypeWidth(elem_type));
2321 break;
2322 case LLVMFloatTypeKind:
2323 snprintf(buf, bufsize, "f32");
2324 break;
2325 case LLVMDoubleTypeKind:
2326 snprintf(buf, bufsize, "f64");
2327 break;
2328 }
2329 }
2330
2331 static void get_image_intr_name(const char *base_name,
2332 LLVMTypeRef data_type,
2333 LLVMTypeRef coords_type,
2334 LLVMTypeRef rsrc_type,
2335 char *out_name, unsigned out_len)
2336 {
2337 char coords_type_name[8];
2338
2339 build_type_name_for_intr(coords_type, coords_type_name,
2340 sizeof(coords_type_name));
2341
2342 if (HAVE_LLVM <= 0x0309) {
2343 snprintf(out_name, out_len, "%s.%s", base_name, coords_type_name);
2344 } else {
2345 char data_type_name[8];
2346 char rsrc_type_name[8];
2347
2348 build_type_name_for_intr(data_type, data_type_name,
2349 sizeof(data_type_name));
2350 build_type_name_for_intr(rsrc_type, rsrc_type_name,
2351 sizeof(rsrc_type_name));
2352 snprintf(out_name, out_len, "%s.%s.%s.%s", base_name,
2353 data_type_name, coords_type_name, rsrc_type_name);
2354 }
2355 }
2356
2357 static LLVMValueRef visit_image_load(struct nir_to_llvm_context *ctx,
2358 nir_intrinsic_instr *instr)
2359 {
2360 LLVMValueRef params[7];
2361 LLVMValueRef res;
2362 char intrinsic_name[64];
2363 const nir_variable *var = instr->variables[0]->var;
2364 const struct glsl_type *type = var->type;
2365 if(instr->variables[0]->deref.child)
2366 type = instr->variables[0]->deref.child->type;
2367
2368 type = glsl_without_array(type);
2369 if (glsl_get_sampler_dim(type) == GLSL_SAMPLER_DIM_BUF) {
2370 params[0] = get_sampler_desc(ctx, instr->variables[0], DESC_BUFFER);
2371 params[1] = LLVMBuildExtractElement(ctx->builder, get_src(ctx, instr->src[0]),
2372 LLVMConstInt(ctx->i32, 0, false), ""); /* vindex */
2373 params[2] = LLVMConstInt(ctx->i32, 0, false); /* voffset */
2374 params[3] = LLVMConstInt(ctx->i1, 0, false); /* glc */
2375 params[4] = LLVMConstInt(ctx->i1, 0, false); /* slc */
2376 res = ac_emit_llvm_intrinsic(&ctx->ac, "llvm.amdgcn.buffer.load.format.v4f32", ctx->v4f32,
2377 params, 5, 0);
2378
2379 res = trim_vector(ctx, res, instr->dest.ssa.num_components);
2380 res = to_integer(ctx, res);
2381 } else {
2382 bool is_da = glsl_sampler_type_is_array(type) ||
2383 glsl_get_sampler_dim(type) == GLSL_SAMPLER_DIM_CUBE;
2384 bool add_frag_pos = glsl_get_sampler_dim(type) == GLSL_SAMPLER_DIM_SUBPASS;
2385 LLVMValueRef da = is_da ? ctx->i32one : ctx->i32zero;
2386 LLVMValueRef glc = LLVMConstInt(ctx->i1, 0, false);
2387 LLVMValueRef slc = LLVMConstInt(ctx->i1, 0, false);
2388
2389 params[0] = get_image_coords(ctx, instr, add_frag_pos);
2390 params[1] = get_sampler_desc(ctx, instr->variables[0], DESC_IMAGE);
2391 params[2] = LLVMConstInt(ctx->i32, 15, false); /* dmask */
2392 if (HAVE_LLVM <= 0x0309) {
2393 params[3] = LLVMConstInt(ctx->i1, 0, false); /* r128 */
2394 params[4] = da;
2395 params[5] = glc;
2396 params[6] = slc;
2397 } else {
2398 LLVMValueRef lwe = LLVMConstInt(ctx->i1, 0, false);
2399 params[3] = glc;
2400 params[4] = slc;
2401 params[5] = lwe;
2402 params[6] = da;
2403 }
2404
2405 get_image_intr_name("llvm.amdgcn.image.load",
2406 ctx->v4f32, /* vdata */
2407 LLVMTypeOf(params[0]), /* coords */
2408 LLVMTypeOf(params[1]), /* rsrc */
2409 intrinsic_name, sizeof(intrinsic_name));
2410
2411 res = ac_emit_llvm_intrinsic(&ctx->ac, intrinsic_name, ctx->v4f32,
2412 params, 7, AC_FUNC_ATTR_READONLY);
2413 }
2414 return to_integer(ctx, res);
2415 }
2416
2417 static void visit_image_store(struct nir_to_llvm_context *ctx,
2418 nir_intrinsic_instr *instr)
2419 {
2420 LLVMValueRef params[8];
2421 char intrinsic_name[64];
2422 const nir_variable *var = instr->variables[0]->var;
2423 LLVMValueRef i1false = LLVMConstInt(ctx->i1, 0, 0);
2424 LLVMValueRef i1true = LLVMConstInt(ctx->i1, 1, 0);
2425 const struct glsl_type *type = glsl_without_array(var->type);
2426
2427 if (ctx->stage == MESA_SHADER_FRAGMENT)
2428 ctx->shader_info->fs.writes_memory = true;
2429
2430 if (glsl_get_sampler_dim(type) == GLSL_SAMPLER_DIM_BUF) {
2431 params[0] = to_float(ctx, get_src(ctx, instr->src[2])); /* data */
2432 params[1] = get_sampler_desc(ctx, instr->variables[0], DESC_BUFFER);
2433 params[2] = LLVMBuildExtractElement(ctx->builder, get_src(ctx, instr->src[0]),
2434 LLVMConstInt(ctx->i32, 0, false), ""); /* vindex */
2435 params[3] = LLVMConstInt(ctx->i32, 0, false); /* voffset */
2436 params[4] = i1false; /* glc */
2437 params[5] = i1false; /* slc */
2438 ac_emit_llvm_intrinsic(&ctx->ac, "llvm.amdgcn.buffer.store.format.v4f32", ctx->voidt,
2439 params, 6, 0);
2440 } else {
2441 bool is_da = glsl_sampler_type_is_array(type) ||
2442 glsl_get_sampler_dim(type) == GLSL_SAMPLER_DIM_CUBE;
2443 LLVMValueRef da = is_da ? i1true : i1false;
2444 LLVMValueRef glc = i1false;
2445 LLVMValueRef slc = i1false;
2446
2447 params[0] = to_float(ctx, get_src(ctx, instr->src[2]));
2448 params[1] = get_image_coords(ctx, instr, false); /* coords */
2449 params[2] = get_sampler_desc(ctx, instr->variables[0], DESC_IMAGE);
2450 params[3] = LLVMConstInt(ctx->i32, 15, false); /* dmask */
2451 if (HAVE_LLVM <= 0x0309) {
2452 params[4] = i1false; /* r128 */
2453 params[5] = da;
2454 params[6] = glc;
2455 params[7] = slc;
2456 } else {
2457 LLVMValueRef lwe = i1false;
2458 params[4] = glc;
2459 params[5] = slc;
2460 params[6] = lwe;
2461 params[7] = da;
2462 }
2463
2464 get_image_intr_name("llvm.amdgcn.image.store",
2465 LLVMTypeOf(params[0]), /* vdata */
2466 LLVMTypeOf(params[1]), /* coords */
2467 LLVMTypeOf(params[2]), /* rsrc */
2468 intrinsic_name, sizeof(intrinsic_name));
2469
2470 ac_emit_llvm_intrinsic(&ctx->ac, intrinsic_name, ctx->voidt,
2471 params, 8, 0);
2472 }
2473
2474 }
2475
2476 static LLVMValueRef visit_image_atomic(struct nir_to_llvm_context *ctx,
2477 nir_intrinsic_instr *instr)
2478 {
2479 LLVMValueRef params[6];
2480 int param_count = 0;
2481 const nir_variable *var = instr->variables[0]->var;
2482 LLVMValueRef i1false = LLVMConstInt(ctx->i1, 0, 0);
2483 LLVMValueRef i1true = LLVMConstInt(ctx->i1, 1, 0);
2484 const char *base_name = "llvm.amdgcn.image.atomic";
2485 const char *atomic_name;
2486 LLVMValueRef coords;
2487 char intrinsic_name[32], coords_type[8];
2488 const struct glsl_type *type = glsl_without_array(var->type);
2489
2490 if (ctx->stage == MESA_SHADER_FRAGMENT)
2491 ctx->shader_info->fs.writes_memory = true;
2492
2493 params[param_count++] = get_src(ctx, instr->src[2]);
2494 if (instr->intrinsic == nir_intrinsic_image_atomic_comp_swap)
2495 params[param_count++] = get_src(ctx, instr->src[3]);
2496
2497 if (glsl_get_sampler_dim(type) == GLSL_SAMPLER_DIM_BUF) {
2498 params[param_count++] = get_sampler_desc(ctx, instr->variables[0], DESC_BUFFER);
2499 coords = params[param_count++] = LLVMBuildExtractElement(ctx->builder, get_src(ctx, instr->src[0]),
2500 LLVMConstInt(ctx->i32, 0, false), ""); /* vindex */
2501 params[param_count++] = ctx->i32zero; /* voffset */
2502 params[param_count++] = i1false; /* glc */
2503 params[param_count++] = i1false; /* slc */
2504 } else {
2505 bool da = glsl_sampler_type_is_array(type) ||
2506 glsl_get_sampler_dim(type) == GLSL_SAMPLER_DIM_CUBE;
2507
2508 coords = params[param_count++] = get_image_coords(ctx, instr, false);
2509 params[param_count++] = get_sampler_desc(ctx, instr->variables[0], DESC_IMAGE);
2510 params[param_count++] = i1false; /* r128 */
2511 params[param_count++] = da ? i1true : i1false; /* da */
2512 params[param_count++] = i1false; /* slc */
2513 }
2514
2515 switch (instr->intrinsic) {
2516 case nir_intrinsic_image_atomic_add:
2517 atomic_name = "add";
2518 break;
2519 case nir_intrinsic_image_atomic_min:
2520 atomic_name = "smin";
2521 break;
2522 case nir_intrinsic_image_atomic_max:
2523 atomic_name = "smax";
2524 break;
2525 case nir_intrinsic_image_atomic_and:
2526 atomic_name = "and";
2527 break;
2528 case nir_intrinsic_image_atomic_or:
2529 atomic_name = "or";
2530 break;
2531 case nir_intrinsic_image_atomic_xor:
2532 atomic_name = "xor";
2533 break;
2534 case nir_intrinsic_image_atomic_exchange:
2535 atomic_name = "swap";
2536 break;
2537 case nir_intrinsic_image_atomic_comp_swap:
2538 atomic_name = "cmpswap";
2539 break;
2540 default:
2541 abort();
2542 }
2543 build_int_type_name(LLVMTypeOf(coords),
2544 coords_type, sizeof(coords_type));
2545
2546 snprintf(intrinsic_name, sizeof(intrinsic_name),
2547 "%s.%s.%s", base_name, atomic_name, coords_type);
2548 return ac_emit_llvm_intrinsic(&ctx->ac, intrinsic_name, ctx->i32, params, param_count, 0);
2549 }
2550
2551 static LLVMValueRef visit_image_size(struct nir_to_llvm_context *ctx,
2552 nir_intrinsic_instr *instr)
2553 {
2554 LLVMValueRef res;
2555 LLVMValueRef params[10];
2556 const nir_variable *var = instr->variables[0]->var;
2557 const struct glsl_type *type = instr->variables[0]->var->type;
2558 bool da = glsl_sampler_type_is_array(var->type) ||
2559 glsl_get_sampler_dim(var->type) == GLSL_SAMPLER_DIM_CUBE;
2560 if(instr->variables[0]->deref.child)
2561 type = instr->variables[0]->deref.child->type;
2562
2563 if (glsl_get_sampler_dim(type) == GLSL_SAMPLER_DIM_BUF)
2564 return get_buffer_size(ctx, get_sampler_desc(ctx, instr->variables[0], DESC_BUFFER), true);
2565 params[0] = ctx->i32zero;
2566 params[1] = get_sampler_desc(ctx, instr->variables[0], DESC_IMAGE);
2567 params[2] = LLVMConstInt(ctx->i32, 15, false);
2568 params[3] = ctx->i32zero;
2569 params[4] = ctx->i32zero;
2570 params[5] = da ? ctx->i32one : ctx->i32zero;
2571 params[6] = ctx->i32zero;
2572 params[7] = ctx->i32zero;
2573 params[8] = ctx->i32zero;
2574 params[9] = ctx->i32zero;
2575
2576 res = ac_emit_llvm_intrinsic(&ctx->ac, "llvm.SI.getresinfo.i32", ctx->v4i32,
2577 params, 10, AC_FUNC_ATTR_READNONE);
2578
2579 if (glsl_get_sampler_dim(type) == GLSL_SAMPLER_DIM_CUBE &&
2580 glsl_sampler_type_is_array(type)) {
2581 LLVMValueRef two = LLVMConstInt(ctx->i32, 2, false);
2582 LLVMValueRef six = LLVMConstInt(ctx->i32, 6, false);
2583 LLVMValueRef z = LLVMBuildExtractElement(ctx->builder, res, two, "");
2584 z = LLVMBuildSDiv(ctx->builder, z, six, "");
2585 res = LLVMBuildInsertElement(ctx->builder, res, z, two, "");
2586 }
2587 return res;
2588 }
2589
2590 static void emit_waitcnt(struct nir_to_llvm_context *ctx)
2591 {
2592 LLVMValueRef args[1] = {
2593 LLVMConstInt(ctx->i32, 0xf70, false),
2594 };
2595 ac_emit_llvm_intrinsic(&ctx->ac, "llvm.amdgcn.s.waitcnt",
2596 ctx->voidt, args, 1, 0);
2597 }
2598
2599 static void emit_barrier(struct nir_to_llvm_context *ctx)
2600 {
2601 // TODO tess
2602 ac_emit_llvm_intrinsic(&ctx->ac, "llvm.amdgcn.s.barrier",
2603 ctx->voidt, NULL, 0, 0);
2604 }
2605
2606 static void emit_discard_if(struct nir_to_llvm_context *ctx,
2607 nir_intrinsic_instr *instr)
2608 {
2609 LLVMValueRef cond;
2610 ctx->shader_info->fs.can_discard = true;
2611
2612 cond = LLVMBuildICmp(ctx->builder, LLVMIntNE,
2613 get_src(ctx, instr->src[0]),
2614 ctx->i32zero, "");
2615
2616 cond = LLVMBuildSelect(ctx->builder, cond,
2617 LLVMConstReal(ctx->f32, -1.0f),
2618 ctx->f32zero, "");
2619 ac_emit_llvm_intrinsic(&ctx->ac, "llvm.AMDGPU.kill",
2620 ctx->voidt,
2621 &cond, 1, 0);
2622 }
2623
2624 static LLVMValueRef
2625 visit_load_local_invocation_index(struct nir_to_llvm_context *ctx)
2626 {
2627 LLVMValueRef result;
2628 LLVMValueRef thread_id = get_thread_id(ctx);
2629 result = LLVMBuildAnd(ctx->builder, ctx->tg_size,
2630 LLVMConstInt(ctx->i32, 0xfc0, false), "");
2631
2632 return LLVMBuildAdd(ctx->builder, result, thread_id, "");
2633 }
2634
2635 static LLVMValueRef visit_var_atomic(struct nir_to_llvm_context *ctx,
2636 nir_intrinsic_instr *instr)
2637 {
2638 LLVMValueRef ptr, result;
2639 int idx = instr->variables[0]->var->data.driver_location;
2640 LLVMValueRef src = get_src(ctx, instr->src[0]);
2641 ptr = get_shared_memory_ptr(ctx, idx, ctx->i32);
2642
2643 if (instr->intrinsic == nir_intrinsic_var_atomic_comp_swap) {
2644 LLVMValueRef src1 = get_src(ctx, instr->src[1]);
2645 result = LLVMBuildAtomicCmpXchg(ctx->builder,
2646 ptr, src, src1,
2647 LLVMAtomicOrderingSequentiallyConsistent,
2648 LLVMAtomicOrderingSequentiallyConsistent,
2649 false);
2650 } else {
2651 LLVMAtomicRMWBinOp op;
2652 switch (instr->intrinsic) {
2653 case nir_intrinsic_var_atomic_add:
2654 op = LLVMAtomicRMWBinOpAdd;
2655 break;
2656 case nir_intrinsic_var_atomic_umin:
2657 op = LLVMAtomicRMWBinOpUMin;
2658 break;
2659 case nir_intrinsic_var_atomic_umax:
2660 op = LLVMAtomicRMWBinOpUMax;
2661 break;
2662 case nir_intrinsic_var_atomic_imin:
2663 op = LLVMAtomicRMWBinOpMin;
2664 break;
2665 case nir_intrinsic_var_atomic_imax:
2666 op = LLVMAtomicRMWBinOpMax;
2667 break;
2668 case nir_intrinsic_var_atomic_and:
2669 op = LLVMAtomicRMWBinOpAnd;
2670 break;
2671 case nir_intrinsic_var_atomic_or:
2672 op = LLVMAtomicRMWBinOpOr;
2673 break;
2674 case nir_intrinsic_var_atomic_xor:
2675 op = LLVMAtomicRMWBinOpXor;
2676 break;
2677 case nir_intrinsic_var_atomic_exchange:
2678 op = LLVMAtomicRMWBinOpXchg;
2679 break;
2680 default:
2681 return NULL;
2682 }
2683
2684 result = LLVMBuildAtomicRMW(ctx->builder, op, ptr, to_integer(ctx, src),
2685 LLVMAtomicOrderingSequentiallyConsistent,
2686 false);
2687 }
2688 return result;
2689 }
2690
2691 #define INTERP_CENTER 0
2692 #define INTERP_CENTROID 1
2693 #define INTERP_SAMPLE 2
2694
2695 static LLVMValueRef lookup_interp_param(struct nir_to_llvm_context *ctx,
2696 enum glsl_interp_mode interp, unsigned location)
2697 {
2698 switch (interp) {
2699 case INTERP_MODE_FLAT:
2700 default:
2701 return NULL;
2702 case INTERP_MODE_SMOOTH:
2703 case INTERP_MODE_NONE:
2704 if (location == INTERP_CENTER)
2705 return ctx->persp_center;
2706 else if (location == INTERP_CENTROID)
2707 return ctx->persp_centroid;
2708 else if (location == INTERP_SAMPLE)
2709 return ctx->persp_sample;
2710 break;
2711 case INTERP_MODE_NOPERSPECTIVE:
2712 if (location == INTERP_CENTER)
2713 return ctx->linear_center;
2714 else if (location == INTERP_CENTROID)
2715 return ctx->linear_centroid;
2716 else if (location == INTERP_SAMPLE)
2717 return ctx->linear_sample;
2718 break;
2719 }
2720 return NULL;
2721 }
2722
2723 static LLVMValueRef load_sample_position(struct nir_to_llvm_context *ctx,
2724 LLVMValueRef sample_id)
2725 {
2726 /* offset = sample_id * 8 (8 = 2 floats containing samplepos.xy) */
2727 LLVMValueRef offset0 = LLVMBuildMul(ctx->builder, sample_id, LLVMConstInt(ctx->i32, 8, false), "");
2728 LLVMValueRef offset1 = LLVMBuildAdd(ctx->builder, offset0, LLVMConstInt(ctx->i32, 4, false), "");
2729 LLVMValueRef result[2];
2730
2731 result[0] = build_indexed_load_const(ctx, ctx->sample_positions, offset0);
2732 result[1] = build_indexed_load_const(ctx, ctx->sample_positions, offset1);
2733
2734 return ac_build_gather_values(&ctx->ac, result, 2);
2735 }
2736
2737 static LLVMValueRef load_sample_pos(struct nir_to_llvm_context *ctx)
2738 {
2739 LLVMValueRef values[2];
2740
2741 values[0] = emit_ffract(ctx, ctx->frag_pos[0]);
2742 values[1] = emit_ffract(ctx, ctx->frag_pos[1]);
2743 return ac_build_gather_values(&ctx->ac, values, 2);
2744 }
2745
2746 static LLVMValueRef visit_interp(struct nir_to_llvm_context *ctx,
2747 nir_intrinsic_instr *instr)
2748 {
2749 LLVMValueRef result[2];
2750 LLVMValueRef interp_param, attr_number;
2751 unsigned location;
2752 unsigned chan;
2753 LLVMValueRef src_c0, src_c1;
2754 const char *intr_name;
2755 LLVMValueRef src0;
2756 int input_index = instr->variables[0]->var->data.location - VARYING_SLOT_VAR0;
2757 switch (instr->intrinsic) {
2758 case nir_intrinsic_interp_var_at_centroid:
2759 location = INTERP_CENTROID;
2760 break;
2761 case nir_intrinsic_interp_var_at_sample:
2762 case nir_intrinsic_interp_var_at_offset:
2763 location = INTERP_SAMPLE;
2764 src0 = get_src(ctx, instr->src[0]);
2765 break;
2766 default:
2767 break;
2768 }
2769
2770 if (instr->intrinsic == nir_intrinsic_interp_var_at_offset) {
2771 src_c0 = to_float(ctx, LLVMBuildExtractElement(ctx->builder, src0, ctx->i32zero, ""));
2772 src_c1 = to_float(ctx, LLVMBuildExtractElement(ctx->builder, src0, ctx->i32one, ""));
2773 } else if (instr->intrinsic == nir_intrinsic_interp_var_at_sample) {
2774 LLVMValueRef sample_position;
2775 LLVMValueRef halfval = LLVMConstReal(ctx->f32, 0.5f);
2776
2777 /* fetch sample ID */
2778 sample_position = load_sample_position(ctx, src0);
2779
2780 src_c0 = LLVMBuildExtractElement(ctx->builder, sample_position, ctx->i32zero, "");
2781 src_c0 = LLVMBuildFSub(ctx->builder, src_c0, halfval, "");
2782 src_c1 = LLVMBuildExtractElement(ctx->builder, sample_position, ctx->i32one, "");
2783 src_c1 = LLVMBuildFSub(ctx->builder, src_c1, halfval, "");
2784 }
2785 interp_param = lookup_interp_param(ctx, instr->variables[0]->var->data.interpolation, location);
2786 attr_number = LLVMConstInt(ctx->i32, input_index, false);
2787
2788 if (location == INTERP_SAMPLE) {
2789 LLVMValueRef ij_out[2];
2790 LLVMValueRef ddxy_out = emit_ddxy_interp(ctx, interp_param);
2791
2792 /*
2793 * take the I then J parameters, and the DDX/Y for it, and
2794 * calculate the IJ inputs for the interpolator.
2795 * temp1 = ddx * offset/sample.x + I;
2796 * interp_param.I = ddy * offset/sample.y + temp1;
2797 * temp1 = ddx * offset/sample.x + J;
2798 * interp_param.J = ddy * offset/sample.y + temp1;
2799 */
2800 for (unsigned i = 0; i < 2; i++) {
2801 LLVMValueRef ix_ll = LLVMConstInt(ctx->i32, i, false);
2802 LLVMValueRef iy_ll = LLVMConstInt(ctx->i32, i + 2, false);
2803 LLVMValueRef ddx_el = LLVMBuildExtractElement(ctx->builder,
2804 ddxy_out, ix_ll, "");
2805 LLVMValueRef ddy_el = LLVMBuildExtractElement(ctx->builder,
2806 ddxy_out, iy_ll, "");
2807 LLVMValueRef interp_el = LLVMBuildExtractElement(ctx->builder,
2808 interp_param, ix_ll, "");
2809 LLVMValueRef temp1, temp2;
2810
2811 interp_el = LLVMBuildBitCast(ctx->builder, interp_el,
2812 ctx->f32, "");
2813
2814 temp1 = LLVMBuildFMul(ctx->builder, ddx_el, src_c0, "");
2815 temp1 = LLVMBuildFAdd(ctx->builder, temp1, interp_el, "");
2816
2817 temp2 = LLVMBuildFMul(ctx->builder, ddy_el, src_c1, "");
2818 temp2 = LLVMBuildFAdd(ctx->builder, temp2, temp1, "");
2819
2820 ij_out[i] = LLVMBuildBitCast(ctx->builder,
2821 temp2, ctx->i32, "");
2822 }
2823 interp_param = ac_build_gather_values(&ctx->ac, ij_out, 2);
2824
2825 }
2826 intr_name = interp_param ? "llvm.SI.fs.interp" : "llvm.SI.fs.constant";
2827 for (chan = 0; chan < 2; chan++) {
2828 LLVMValueRef args[4];
2829 LLVMValueRef llvm_chan = LLVMConstInt(ctx->i32, chan, false);
2830
2831 args[0] = llvm_chan;
2832 args[1] = attr_number;
2833 args[2] = ctx->prim_mask;
2834 args[3] = interp_param;
2835 result[chan] = ac_emit_llvm_intrinsic(&ctx->ac, intr_name,
2836 ctx->f32, args, args[3] ? 4 : 3,
2837 AC_FUNC_ATTR_READNONE);
2838 }
2839 return ac_build_gather_values(&ctx->ac, result, 2);
2840 }
2841
2842 static void visit_intrinsic(struct nir_to_llvm_context *ctx,
2843 nir_intrinsic_instr *instr)
2844 {
2845 LLVMValueRef result = NULL;
2846
2847 switch (instr->intrinsic) {
2848 case nir_intrinsic_load_work_group_id: {
2849 result = ctx->workgroup_ids;
2850 break;
2851 }
2852 case nir_intrinsic_load_base_vertex: {
2853 result = ctx->base_vertex;
2854 break;
2855 }
2856 case nir_intrinsic_load_vertex_id_zero_base: {
2857 result = ctx->vertex_id;
2858 break;
2859 }
2860 case nir_intrinsic_load_local_invocation_id: {
2861 result = ctx->local_invocation_ids;
2862 break;
2863 }
2864 case nir_intrinsic_load_base_instance:
2865 result = ctx->start_instance;
2866 break;
2867 case nir_intrinsic_load_sample_id:
2868 ctx->shader_info->fs.force_persample = true;
2869 result = unpack_param(ctx, ctx->ancillary, 8, 4);
2870 break;
2871 case nir_intrinsic_load_sample_pos:
2872 ctx->shader_info->fs.force_persample = true;
2873 result = load_sample_pos(ctx);
2874 break;
2875 case nir_intrinsic_load_front_face:
2876 result = ctx->front_face;
2877 break;
2878 case nir_intrinsic_load_instance_id:
2879 result = ctx->instance_id;
2880 ctx->shader_info->vs.vgpr_comp_cnt = MAX2(3,
2881 ctx->shader_info->vs.vgpr_comp_cnt);
2882 break;
2883 case nir_intrinsic_load_num_work_groups:
2884 result = ctx->num_work_groups;
2885 break;
2886 case nir_intrinsic_load_local_invocation_index:
2887 result = visit_load_local_invocation_index(ctx);
2888 break;
2889 case nir_intrinsic_load_push_constant:
2890 result = visit_load_push_constant(ctx, instr);
2891 break;
2892 case nir_intrinsic_vulkan_resource_index:
2893 result = visit_vulkan_resource_index(ctx, instr);
2894 break;
2895 case nir_intrinsic_store_ssbo:
2896 visit_store_ssbo(ctx, instr);
2897 break;
2898 case nir_intrinsic_load_ssbo:
2899 result = visit_load_buffer(ctx, instr);
2900 break;
2901 case nir_intrinsic_ssbo_atomic_add:
2902 case nir_intrinsic_ssbo_atomic_imin:
2903 case nir_intrinsic_ssbo_atomic_umin:
2904 case nir_intrinsic_ssbo_atomic_imax:
2905 case nir_intrinsic_ssbo_atomic_umax:
2906 case nir_intrinsic_ssbo_atomic_and:
2907 case nir_intrinsic_ssbo_atomic_or:
2908 case nir_intrinsic_ssbo_atomic_xor:
2909 case nir_intrinsic_ssbo_atomic_exchange:
2910 case nir_intrinsic_ssbo_atomic_comp_swap:
2911 result = visit_atomic_ssbo(ctx, instr);
2912 break;
2913 case nir_intrinsic_load_ubo:
2914 result = visit_load_ubo_buffer(ctx, instr);
2915 break;
2916 case nir_intrinsic_get_buffer_size:
2917 result = visit_get_buffer_size(ctx, instr);
2918 break;
2919 case nir_intrinsic_load_var:
2920 result = visit_load_var(ctx, instr);
2921 break;
2922 case nir_intrinsic_store_var:
2923 visit_store_var(ctx, instr);
2924 break;
2925 case nir_intrinsic_image_load:
2926 result = visit_image_load(ctx, instr);
2927 break;
2928 case nir_intrinsic_image_store:
2929 visit_image_store(ctx, instr);
2930 break;
2931 case nir_intrinsic_image_atomic_add:
2932 case nir_intrinsic_image_atomic_min:
2933 case nir_intrinsic_image_atomic_max:
2934 case nir_intrinsic_image_atomic_and:
2935 case nir_intrinsic_image_atomic_or:
2936 case nir_intrinsic_image_atomic_xor:
2937 case nir_intrinsic_image_atomic_exchange:
2938 case nir_intrinsic_image_atomic_comp_swap:
2939 result = visit_image_atomic(ctx, instr);
2940 break;
2941 case nir_intrinsic_image_size:
2942 result = visit_image_size(ctx, instr);
2943 break;
2944 case nir_intrinsic_discard:
2945 ctx->shader_info->fs.can_discard = true;
2946 ac_emit_llvm_intrinsic(&ctx->ac, "llvm.AMDGPU.kilp",
2947 ctx->voidt,
2948 NULL, 0, 0);
2949 break;
2950 case nir_intrinsic_discard_if:
2951 emit_discard_if(ctx, instr);
2952 break;
2953 case nir_intrinsic_memory_barrier:
2954 emit_waitcnt(ctx);
2955 break;
2956 case nir_intrinsic_barrier:
2957 emit_barrier(ctx);
2958 break;
2959 case nir_intrinsic_var_atomic_add:
2960 case nir_intrinsic_var_atomic_imin:
2961 case nir_intrinsic_var_atomic_umin:
2962 case nir_intrinsic_var_atomic_imax:
2963 case nir_intrinsic_var_atomic_umax:
2964 case nir_intrinsic_var_atomic_and:
2965 case nir_intrinsic_var_atomic_or:
2966 case nir_intrinsic_var_atomic_xor:
2967 case nir_intrinsic_var_atomic_exchange:
2968 case nir_intrinsic_var_atomic_comp_swap:
2969 result = visit_var_atomic(ctx, instr);
2970 break;
2971 case nir_intrinsic_interp_var_at_centroid:
2972 case nir_intrinsic_interp_var_at_sample:
2973 case nir_intrinsic_interp_var_at_offset:
2974 result = visit_interp(ctx, instr);
2975 break;
2976 default:
2977 fprintf(stderr, "Unknown intrinsic: ");
2978 nir_print_instr(&instr->instr, stderr);
2979 fprintf(stderr, "\n");
2980 break;
2981 }
2982 if (result) {
2983 _mesa_hash_table_insert(ctx->defs, &instr->dest.ssa, result);
2984 }
2985 }
2986
2987 static LLVMValueRef get_sampler_desc(struct nir_to_llvm_context *ctx,
2988 nir_deref_var *deref,
2989 enum desc_type desc_type)
2990 {
2991 unsigned desc_set = deref->var->data.descriptor_set;
2992 LLVMValueRef list = ctx->descriptor_sets[desc_set];
2993 struct radv_descriptor_set_layout *layout = ctx->options->layout->set[desc_set].layout;
2994 struct radv_descriptor_set_binding_layout *binding = layout->binding + deref->var->data.binding;
2995 unsigned offset = binding->offset;
2996 unsigned stride = binding->size;
2997 unsigned type_size;
2998 LLVMBuilderRef builder = ctx->builder;
2999 LLVMTypeRef type;
3000 LLVMValueRef index = NULL;
3001
3002 assert(deref->var->data.binding < layout->binding_count);
3003
3004 switch (desc_type) {
3005 case DESC_IMAGE:
3006 type = ctx->v8i32;
3007 type_size = 32;
3008 break;
3009 case DESC_FMASK:
3010 type = ctx->v8i32;
3011 offset += 32;
3012 type_size = 32;
3013 break;
3014 case DESC_SAMPLER:
3015 type = ctx->v4i32;
3016 if (binding->type == VK_DESCRIPTOR_TYPE_COMBINED_IMAGE_SAMPLER)
3017 offset += 64;
3018
3019 type_size = 16;
3020 break;
3021 case DESC_BUFFER:
3022 type = ctx->v4i32;
3023 type_size = 16;
3024 break;
3025 default:
3026 unreachable("invalid desc_type\n");
3027 }
3028
3029 if (deref->deref.child) {
3030 nir_deref_array *child = (nir_deref_array*)deref->deref.child;
3031
3032 assert(child->deref_array_type != nir_deref_array_type_wildcard);
3033 offset += child->base_offset * stride;
3034 if (child->deref_array_type == nir_deref_array_type_indirect) {
3035 index = get_src(ctx, child->indirect);
3036 }
3037 }
3038
3039 assert(stride % type_size == 0);
3040
3041 if (!index)
3042 index = ctx->i32zero;
3043
3044 index = LLVMBuildMul(builder, index, LLVMConstInt(ctx->i32, stride / type_size, 0), "");
3045
3046 list = build_gep0(ctx, list, LLVMConstInt(ctx->i32, offset, 0));
3047 list = LLVMBuildPointerCast(builder, list, const_array(type, 0), "");
3048
3049 return build_indexed_load_const(ctx, list, index);
3050 }
3051
3052 static void set_tex_fetch_args(struct nir_to_llvm_context *ctx,
3053 struct ac_tex_info *tinfo,
3054 nir_tex_instr *instr,
3055 nir_texop op,
3056 LLVMValueRef res_ptr, LLVMValueRef samp_ptr,
3057 LLVMValueRef *param, unsigned count,
3058 unsigned dmask)
3059 {
3060 int num_args;
3061 unsigned is_rect = 0;
3062 bool da = instr->is_array || instr->sampler_dim == GLSL_SAMPLER_DIM_CUBE;
3063
3064 if (op == nir_texop_lod)
3065 da = false;
3066 /* Pad to power of two vector */
3067 while (count < util_next_power_of_two(count))
3068 param[count++] = LLVMGetUndef(ctx->i32);
3069
3070 if (count > 1)
3071 tinfo->args[0] = ac_build_gather_values(&ctx->ac, param, count);
3072 else
3073 tinfo->args[0] = param[0];
3074
3075 tinfo->args[1] = res_ptr;
3076 num_args = 2;
3077
3078 if (op == nir_texop_txf ||
3079 op == nir_texop_txf_ms ||
3080 op == nir_texop_query_levels ||
3081 op == nir_texop_texture_samples ||
3082 op == nir_texop_txs)
3083 tinfo->dst_type = ctx->v4i32;
3084 else {
3085 tinfo->dst_type = ctx->v4f32;
3086 tinfo->args[num_args++] = samp_ptr;
3087 }
3088
3089 if (instr->sampler_dim == GLSL_SAMPLER_DIM_BUF && op == nir_texop_txf) {
3090 tinfo->args[0] = res_ptr;
3091 tinfo->args[1] = LLVMConstInt(ctx->i32, 0, false);
3092 tinfo->args[2] = param[0];
3093 tinfo->arg_count = 3;
3094 return;
3095 }
3096
3097 tinfo->args[num_args++] = LLVMConstInt(ctx->i32, dmask, 0);
3098 tinfo->args[num_args++] = LLVMConstInt(ctx->i32, is_rect, 0); /* unorm */
3099 tinfo->args[num_args++] = LLVMConstInt(ctx->i32, 0, 0); /* r128 */
3100 tinfo->args[num_args++] = LLVMConstInt(ctx->i32, da ? 1 : 0, 0);
3101 tinfo->args[num_args++] = LLVMConstInt(ctx->i32, 0, 0); /* glc */
3102 tinfo->args[num_args++] = LLVMConstInt(ctx->i32, 0, 0); /* slc */
3103 tinfo->args[num_args++] = LLVMConstInt(ctx->i32, 0, 0); /* tfe */
3104 tinfo->args[num_args++] = LLVMConstInt(ctx->i32, 0, 0); /* lwe */
3105
3106 tinfo->arg_count = num_args;
3107 }
3108
3109 /* Disable anisotropic filtering if BASE_LEVEL == LAST_LEVEL.
3110 *
3111 * SI-CI:
3112 * If BASE_LEVEL == LAST_LEVEL, the shader must disable anisotropic
3113 * filtering manually. The driver sets img7 to a mask clearing
3114 * MAX_ANISO_RATIO if BASE_LEVEL == LAST_LEVEL. The shader must do:
3115 * s_and_b32 samp0, samp0, img7
3116 *
3117 * VI:
3118 * The ANISO_OVERRIDE sampler field enables this fix in TA.
3119 */
3120 static LLVMValueRef sici_fix_sampler_aniso(struct nir_to_llvm_context *ctx,
3121 LLVMValueRef res, LLVMValueRef samp)
3122 {
3123 LLVMBuilderRef builder = ctx->builder;
3124 LLVMValueRef img7, samp0;
3125
3126 if (ctx->options->chip_class >= VI)
3127 return samp;
3128
3129 img7 = LLVMBuildExtractElement(builder, res,
3130 LLVMConstInt(ctx->i32, 7, 0), "");
3131 samp0 = LLVMBuildExtractElement(builder, samp,
3132 LLVMConstInt(ctx->i32, 0, 0), "");
3133 samp0 = LLVMBuildAnd(builder, samp0, img7, "");
3134 return LLVMBuildInsertElement(builder, samp, samp0,
3135 LLVMConstInt(ctx->i32, 0, 0), "");
3136 }
3137
3138 static void tex_fetch_ptrs(struct nir_to_llvm_context *ctx,
3139 nir_tex_instr *instr,
3140 LLVMValueRef *res_ptr, LLVMValueRef *samp_ptr,
3141 LLVMValueRef *fmask_ptr)
3142 {
3143 if (instr->sampler_dim == GLSL_SAMPLER_DIM_BUF)
3144 *res_ptr = get_sampler_desc(ctx, instr->texture, DESC_BUFFER);
3145 else
3146 *res_ptr = get_sampler_desc(ctx, instr->texture, DESC_IMAGE);
3147 if (samp_ptr) {
3148 if (instr->sampler)
3149 *samp_ptr = get_sampler_desc(ctx, instr->sampler, DESC_SAMPLER);
3150 else
3151 *samp_ptr = get_sampler_desc(ctx, instr->texture, DESC_SAMPLER);
3152 if (instr->sampler_dim < GLSL_SAMPLER_DIM_RECT)
3153 *samp_ptr = sici_fix_sampler_aniso(ctx, *res_ptr, *samp_ptr);
3154 }
3155 if (fmask_ptr && !instr->sampler && (instr->op == nir_texop_txf_ms ||
3156 instr->op == nir_texop_samples_identical))
3157 *fmask_ptr = get_sampler_desc(ctx, instr->texture, DESC_FMASK);
3158 }
3159
3160 static void visit_tex(struct nir_to_llvm_context *ctx, nir_tex_instr *instr)
3161 {
3162 LLVMValueRef result = NULL;
3163 struct ac_tex_info tinfo = { 0 };
3164 unsigned dmask = 0xf;
3165 LLVMValueRef address[16];
3166 LLVMValueRef coords[5];
3167 LLVMValueRef coord = NULL, lod = NULL, comparator = NULL;
3168 LLVMValueRef bias = NULL, offsets = NULL;
3169 LLVMValueRef res_ptr, samp_ptr, fmask_ptr = NULL, sample_index = NULL;
3170 LLVMValueRef ddx = NULL, ddy = NULL;
3171 LLVMValueRef derivs[6];
3172 unsigned chan, count = 0;
3173 unsigned const_src = 0, num_deriv_comp = 0;
3174
3175 tex_fetch_ptrs(ctx, instr, &res_ptr, &samp_ptr, &fmask_ptr);
3176
3177 for (unsigned i = 0; i < instr->num_srcs; i++) {
3178 switch (instr->src[i].src_type) {
3179 case nir_tex_src_coord:
3180 coord = get_src(ctx, instr->src[i].src);
3181 break;
3182 case nir_tex_src_projector:
3183 break;
3184 case nir_tex_src_comparator:
3185 comparator = get_src(ctx, instr->src[i].src);
3186 break;
3187 case nir_tex_src_offset:
3188 offsets = get_src(ctx, instr->src[i].src);
3189 const_src = i;
3190 break;
3191 case nir_tex_src_bias:
3192 bias = get_src(ctx, instr->src[i].src);
3193 break;
3194 case nir_tex_src_lod:
3195 lod = get_src(ctx, instr->src[i].src);
3196 break;
3197 case nir_tex_src_ms_index:
3198 sample_index = get_src(ctx, instr->src[i].src);
3199 break;
3200 case nir_tex_src_ms_mcs:
3201 break;
3202 case nir_tex_src_ddx:
3203 ddx = get_src(ctx, instr->src[i].src);
3204 num_deriv_comp = instr->src[i].src.ssa->num_components;
3205 break;
3206 case nir_tex_src_ddy:
3207 ddy = get_src(ctx, instr->src[i].src);
3208 break;
3209 case nir_tex_src_texture_offset:
3210 case nir_tex_src_sampler_offset:
3211 case nir_tex_src_plane:
3212 default:
3213 break;
3214 }
3215 }
3216
3217 if (instr->op == nir_texop_texture_samples) {
3218 LLVMValueRef res, samples, is_msaa;
3219 res = LLVMBuildBitCast(ctx->builder, res_ptr, ctx->v8i32, "");
3220 samples = LLVMBuildExtractElement(ctx->builder, res,
3221 LLVMConstInt(ctx->i32, 3, false), "");
3222 is_msaa = LLVMBuildLShr(ctx->builder, samples,
3223 LLVMConstInt(ctx->i32, 28, false), "");
3224 is_msaa = LLVMBuildAnd(ctx->builder, is_msaa,
3225 LLVMConstInt(ctx->i32, 0xe, false), "");
3226 is_msaa = LLVMBuildICmp(ctx->builder, LLVMIntEQ, is_msaa,
3227 LLVMConstInt(ctx->i32, 0xe, false), "");
3228
3229 samples = LLVMBuildLShr(ctx->builder, samples,
3230 LLVMConstInt(ctx->i32, 16, false), "");
3231 samples = LLVMBuildAnd(ctx->builder, samples,
3232 LLVMConstInt(ctx->i32, 0xf, false), "");
3233 samples = LLVMBuildShl(ctx->builder, ctx->i32one,
3234 samples, "");
3235 samples = LLVMBuildSelect(ctx->builder, is_msaa, samples,
3236 ctx->i32one, "");
3237 result = samples;
3238 goto write_result;
3239 }
3240
3241 if (coord)
3242 for (chan = 0; chan < instr->coord_components; chan++)
3243 coords[chan] = llvm_extract_elem(ctx, coord, chan);
3244
3245 if (offsets && instr->op != nir_texop_txf) {
3246 LLVMValueRef offset[3], pack;
3247 for (chan = 0; chan < 3; ++chan)
3248 offset[chan] = ctx->i32zero;
3249
3250 tinfo.has_offset = true;
3251 for (chan = 0; chan < get_llvm_num_components(offsets); chan++) {
3252 offset[chan] = llvm_extract_elem(ctx, offsets, chan);
3253 offset[chan] = LLVMBuildAnd(ctx->builder, offset[chan],
3254 LLVMConstInt(ctx->i32, 0x3f, false), "");
3255 if (chan)
3256 offset[chan] = LLVMBuildShl(ctx->builder, offset[chan],
3257 LLVMConstInt(ctx->i32, chan * 8, false), "");
3258 }
3259 pack = LLVMBuildOr(ctx->builder, offset[0], offset[1], "");
3260 pack = LLVMBuildOr(ctx->builder, pack, offset[2], "");
3261 address[count++] = pack;
3262
3263 }
3264 /* pack LOD bias value */
3265 if (instr->op == nir_texop_txb && bias) {
3266 address[count++] = bias;
3267 }
3268
3269 /* Pack depth comparison value */
3270 if (instr->is_shadow && comparator) {
3271 address[count++] = llvm_extract_elem(ctx, comparator, 0);
3272 }
3273
3274 /* pack derivatives */
3275 if (ddx || ddy) {
3276 switch (instr->sampler_dim) {
3277 case GLSL_SAMPLER_DIM_3D:
3278 case GLSL_SAMPLER_DIM_CUBE:
3279 num_deriv_comp = 3;
3280 break;
3281 case GLSL_SAMPLER_DIM_2D:
3282 default:
3283 num_deriv_comp = 2;
3284 break;
3285 case GLSL_SAMPLER_DIM_1D:
3286 num_deriv_comp = 1;
3287 break;
3288 }
3289
3290 for (unsigned i = 0; i < num_deriv_comp; i++) {
3291 derivs[i * 2] = to_float(ctx, llvm_extract_elem(ctx, ddx, i));
3292 derivs[i * 2 + 1] = to_float(ctx, llvm_extract_elem(ctx, ddy, i));
3293 }
3294 }
3295
3296 if (instr->sampler_dim == GLSL_SAMPLER_DIM_CUBE && coord) {
3297 for (chan = 0; chan < instr->coord_components; chan++)
3298 coords[chan] = to_float(ctx, coords[chan]);
3299 if (instr->coord_components == 3)
3300 coords[3] = LLVMGetUndef(ctx->f32);
3301 ac_prepare_cube_coords(&ctx->ac,
3302 instr->op == nir_texop_txd, instr->is_array,
3303 coords, derivs);
3304 if (num_deriv_comp)
3305 num_deriv_comp--;
3306 }
3307
3308 if (ddx || ddy) {
3309 for (unsigned i = 0; i < num_deriv_comp * 2; i++)
3310 address[count++] = derivs[i];
3311 }
3312
3313 /* Pack texture coordinates */
3314 if (coord) {
3315 address[count++] = coords[0];
3316 if (instr->coord_components > 1)
3317 address[count++] = coords[1];
3318 if (instr->coord_components > 2) {
3319 /* This seems like a bit of a hack - but it passes Vulkan CTS with it */
3320 if (instr->sampler_dim != GLSL_SAMPLER_DIM_3D && instr->op != nir_texop_txf) {
3321 coords[2] = to_float(ctx, coords[2]);
3322 coords[2] = ac_emit_llvm_intrinsic(&ctx->ac, "llvm.rint.f32", ctx->f32, &coords[2],
3323 1, 0);
3324 coords[2] = to_integer(ctx, coords[2]);
3325 }
3326 address[count++] = coords[2];
3327 }
3328 }
3329
3330 /* Pack LOD */
3331 if ((instr->op == nir_texop_txl || instr->op == nir_texop_txf) && lod) {
3332 address[count++] = lod;
3333 } else if (instr->op == nir_texop_txf_ms && sample_index) {
3334 address[count++] = sample_index;
3335 } else if(instr->op == nir_texop_txs) {
3336 count = 0;
3337 if (lod)
3338 address[count++] = lod;
3339 else
3340 address[count++] = ctx->i32zero;
3341 }
3342
3343 for (chan = 0; chan < count; chan++) {
3344 address[chan] = LLVMBuildBitCast(ctx->builder,
3345 address[chan], ctx->i32, "");
3346 }
3347
3348 if (instr->op == nir_texop_samples_identical) {
3349 LLVMValueRef txf_address[4];
3350 struct ac_tex_info txf_info = { 0 };
3351 unsigned txf_count = count;
3352 memcpy(txf_address, address, sizeof(txf_address));
3353
3354 if (!instr->is_array)
3355 txf_address[2] = ctx->i32zero;
3356 txf_address[3] = ctx->i32zero;
3357
3358 set_tex_fetch_args(ctx, &txf_info, instr, nir_texop_txf,
3359 fmask_ptr, NULL,
3360 txf_address, txf_count, 0xf);
3361
3362 result = build_tex_intrinsic(ctx, instr, &txf_info);
3363
3364 result = LLVMBuildExtractElement(ctx->builder, result, ctx->i32zero, "");
3365 result = emit_int_cmp(ctx, LLVMIntEQ, result, ctx->i32zero);
3366 goto write_result;
3367 }
3368
3369 /* Adjust the sample index according to FMASK.
3370 *
3371 * For uncompressed MSAA surfaces, FMASK should return 0x76543210,
3372 * which is the identity mapping. Each nibble says which physical sample
3373 * should be fetched to get that sample.
3374 *
3375 * For example, 0x11111100 means there are only 2 samples stored and
3376 * the second sample covers 3/4 of the pixel. When reading samples 0
3377 * and 1, return physical sample 0 (determined by the first two 0s
3378 * in FMASK), otherwise return physical sample 1.
3379 *
3380 * The sample index should be adjusted as follows:
3381 * sample_index = (fmask >> (sample_index * 4)) & 0xF;
3382 */
3383 if (instr->sampler_dim == GLSL_SAMPLER_DIM_MS) {
3384 LLVMValueRef txf_address[4];
3385 struct ac_tex_info txf_info = { 0 };
3386 unsigned txf_count = count;
3387 memcpy(txf_address, address, sizeof(txf_address));
3388
3389 if (!instr->is_array)
3390 txf_address[2] = ctx->i32zero;
3391 txf_address[3] = ctx->i32zero;
3392
3393 set_tex_fetch_args(ctx, &txf_info, instr, nir_texop_txf,
3394 fmask_ptr, NULL,
3395 txf_address, txf_count, 0xf);
3396
3397 result = build_tex_intrinsic(ctx, instr, &txf_info);
3398 LLVMValueRef four = LLVMConstInt(ctx->i32, 4, false);
3399 LLVMValueRef F = LLVMConstInt(ctx->i32, 0xf, false);
3400
3401 LLVMValueRef fmask = LLVMBuildExtractElement(ctx->builder,
3402 result,
3403 ctx->i32zero, "");
3404
3405 unsigned sample_chan = instr->is_array ? 3 : 2;
3406
3407 LLVMValueRef sample_index4 =
3408 LLVMBuildMul(ctx->builder, address[sample_chan], four, "");
3409 LLVMValueRef shifted_fmask =
3410 LLVMBuildLShr(ctx->builder, fmask, sample_index4, "");
3411 LLVMValueRef final_sample =
3412 LLVMBuildAnd(ctx->builder, shifted_fmask, F, "");
3413
3414 /* Don't rewrite the sample index if WORD1.DATA_FORMAT of the FMASK
3415 * resource descriptor is 0 (invalid),
3416 */
3417 LLVMValueRef fmask_desc =
3418 LLVMBuildBitCast(ctx->builder, fmask_ptr,
3419 ctx->v8i32, "");
3420
3421 LLVMValueRef fmask_word1 =
3422 LLVMBuildExtractElement(ctx->builder, fmask_desc,
3423 ctx->i32one, "");
3424
3425 LLVMValueRef word1_is_nonzero =
3426 LLVMBuildICmp(ctx->builder, LLVMIntNE,
3427 fmask_word1, ctx->i32zero, "");
3428
3429 /* Replace the MSAA sample index. */
3430 address[sample_chan] =
3431 LLVMBuildSelect(ctx->builder, word1_is_nonzero,
3432 final_sample, address[sample_chan], "");
3433 }
3434
3435 if (offsets && instr->op == nir_texop_txf) {
3436 nir_const_value *const_offset =
3437 nir_src_as_const_value(instr->src[const_src].src);
3438 int num_offsets = instr->src[const_src].src.ssa->num_components;
3439 assert(const_offset);
3440 num_offsets = MIN2(num_offsets, instr->coord_components);
3441 if (num_offsets > 2)
3442 address[2] = LLVMBuildAdd(ctx->builder,
3443 address[2], LLVMConstInt(ctx->i32, const_offset->i32[2], false), "");
3444 if (num_offsets > 1)
3445 address[1] = LLVMBuildAdd(ctx->builder,
3446 address[1], LLVMConstInt(ctx->i32, const_offset->i32[1], false), "");
3447 address[0] = LLVMBuildAdd(ctx->builder,
3448 address[0], LLVMConstInt(ctx->i32, const_offset->i32[0], false), "");
3449
3450 }
3451
3452 /* TODO TG4 support */
3453 if (instr->op == nir_texop_tg4) {
3454 if (instr->is_shadow)
3455 dmask = 1;
3456 else
3457 dmask = 1 << instr->component;
3458 }
3459 set_tex_fetch_args(ctx, &tinfo, instr, instr->op,
3460 res_ptr, samp_ptr, address, count, dmask);
3461
3462 result = build_tex_intrinsic(ctx, instr, &tinfo);
3463
3464 if (instr->op == nir_texop_query_levels)
3465 result = LLVMBuildExtractElement(ctx->builder, result, LLVMConstInt(ctx->i32, 3, false), "");
3466 else if (instr->is_shadow && instr->op != nir_texop_txs && instr->op != nir_texop_lod && instr->op != nir_texop_tg4)
3467 result = LLVMBuildExtractElement(ctx->builder, result, ctx->i32zero, "");
3468 else if (instr->op == nir_texop_txs &&
3469 instr->sampler_dim == GLSL_SAMPLER_DIM_CUBE &&
3470 instr->is_array) {
3471 LLVMValueRef two = LLVMConstInt(ctx->i32, 2, false);
3472 LLVMValueRef six = LLVMConstInt(ctx->i32, 6, false);
3473 LLVMValueRef z = LLVMBuildExtractElement(ctx->builder, result, two, "");
3474 z = LLVMBuildSDiv(ctx->builder, z, six, "");
3475 result = LLVMBuildInsertElement(ctx->builder, result, z, two, "");
3476 } else if (instr->dest.ssa.num_components != 4)
3477 result = trim_vector(ctx, result, instr->dest.ssa.num_components);
3478
3479 write_result:
3480 if (result) {
3481 assert(instr->dest.is_ssa);
3482 result = to_integer(ctx, result);
3483 _mesa_hash_table_insert(ctx->defs, &instr->dest.ssa, result);
3484 }
3485 }
3486
3487
3488 static void visit_phi(struct nir_to_llvm_context *ctx, nir_phi_instr *instr)
3489 {
3490 LLVMTypeRef type = get_def_type(ctx, &instr->dest.ssa);
3491 LLVMValueRef result = LLVMBuildPhi(ctx->builder, type, "");
3492
3493 _mesa_hash_table_insert(ctx->defs, &instr->dest.ssa, result);
3494 _mesa_hash_table_insert(ctx->phis, instr, result);
3495 }
3496
3497 static void visit_post_phi(struct nir_to_llvm_context *ctx,
3498 nir_phi_instr *instr,
3499 LLVMValueRef llvm_phi)
3500 {
3501 nir_foreach_phi_src(src, instr) {
3502 LLVMBasicBlockRef block = get_block(ctx, src->pred);
3503 LLVMValueRef llvm_src = get_src(ctx, src->src);
3504
3505 LLVMAddIncoming(llvm_phi, &llvm_src, &block, 1);
3506 }
3507 }
3508
3509 static void phi_post_pass(struct nir_to_llvm_context *ctx)
3510 {
3511 struct hash_entry *entry;
3512 hash_table_foreach(ctx->phis, entry) {
3513 visit_post_phi(ctx, (nir_phi_instr*)entry->key,
3514 (LLVMValueRef)entry->data);
3515 }
3516 }
3517
3518
3519 static void visit_ssa_undef(struct nir_to_llvm_context *ctx,
3520 nir_ssa_undef_instr *instr)
3521 {
3522 unsigned num_components = instr->def.num_components;
3523 LLVMValueRef undef;
3524
3525 if (num_components == 1)
3526 undef = LLVMGetUndef(ctx->i32);
3527 else {
3528 undef = LLVMGetUndef(LLVMVectorType(ctx->i32, num_components));
3529 }
3530 _mesa_hash_table_insert(ctx->defs, &instr->def, undef);
3531 }
3532
3533 static void visit_jump(struct nir_to_llvm_context *ctx,
3534 nir_jump_instr *instr)
3535 {
3536 switch (instr->type) {
3537 case nir_jump_break:
3538 LLVMBuildBr(ctx->builder, ctx->break_block);
3539 LLVMClearInsertionPosition(ctx->builder);
3540 break;
3541 case nir_jump_continue:
3542 LLVMBuildBr(ctx->builder, ctx->continue_block);
3543 LLVMClearInsertionPosition(ctx->builder);
3544 break;
3545 default:
3546 fprintf(stderr, "Unknown NIR jump instr: ");
3547 nir_print_instr(&instr->instr, stderr);
3548 fprintf(stderr, "\n");
3549 abort();
3550 }
3551 }
3552
3553 static void visit_cf_list(struct nir_to_llvm_context *ctx,
3554 struct exec_list *list);
3555
3556 static void visit_block(struct nir_to_llvm_context *ctx, nir_block *block)
3557 {
3558 LLVMBasicBlockRef llvm_block = LLVMGetInsertBlock(ctx->builder);
3559 nir_foreach_instr(instr, block)
3560 {
3561 switch (instr->type) {
3562 case nir_instr_type_alu:
3563 visit_alu(ctx, nir_instr_as_alu(instr));
3564 break;
3565 case nir_instr_type_load_const:
3566 visit_load_const(ctx, nir_instr_as_load_const(instr));
3567 break;
3568 case nir_instr_type_intrinsic:
3569 visit_intrinsic(ctx, nir_instr_as_intrinsic(instr));
3570 break;
3571 case nir_instr_type_tex:
3572 visit_tex(ctx, nir_instr_as_tex(instr));
3573 break;
3574 case nir_instr_type_phi:
3575 visit_phi(ctx, nir_instr_as_phi(instr));
3576 break;
3577 case nir_instr_type_ssa_undef:
3578 visit_ssa_undef(ctx, nir_instr_as_ssa_undef(instr));
3579 break;
3580 case nir_instr_type_jump:
3581 visit_jump(ctx, nir_instr_as_jump(instr));
3582 break;
3583 default:
3584 fprintf(stderr, "Unknown NIR instr type: ");
3585 nir_print_instr(instr, stderr);
3586 fprintf(stderr, "\n");
3587 abort();
3588 }
3589 }
3590
3591 _mesa_hash_table_insert(ctx->defs, block, llvm_block);
3592 }
3593
3594 static void visit_if(struct nir_to_llvm_context *ctx, nir_if *if_stmt)
3595 {
3596 LLVMValueRef value = get_src(ctx, if_stmt->condition);
3597
3598 LLVMBasicBlockRef merge_block =
3599 LLVMAppendBasicBlockInContext(ctx->context, ctx->main_function, "");
3600 LLVMBasicBlockRef if_block =
3601 LLVMAppendBasicBlockInContext(ctx->context, ctx->main_function, "");
3602 LLVMBasicBlockRef else_block = merge_block;
3603 if (!exec_list_is_empty(&if_stmt->else_list))
3604 else_block = LLVMAppendBasicBlockInContext(
3605 ctx->context, ctx->main_function, "");
3606
3607 LLVMValueRef cond = LLVMBuildICmp(ctx->builder, LLVMIntNE, value,
3608 LLVMConstInt(ctx->i32, 0, false), "");
3609 LLVMBuildCondBr(ctx->builder, cond, if_block, else_block);
3610
3611 LLVMPositionBuilderAtEnd(ctx->builder, if_block);
3612 visit_cf_list(ctx, &if_stmt->then_list);
3613 if (LLVMGetInsertBlock(ctx->builder))
3614 LLVMBuildBr(ctx->builder, merge_block);
3615
3616 if (!exec_list_is_empty(&if_stmt->else_list)) {
3617 LLVMPositionBuilderAtEnd(ctx->builder, else_block);
3618 visit_cf_list(ctx, &if_stmt->else_list);
3619 if (LLVMGetInsertBlock(ctx->builder))
3620 LLVMBuildBr(ctx->builder, merge_block);
3621 }
3622
3623 LLVMPositionBuilderAtEnd(ctx->builder, merge_block);
3624 }
3625
3626 static void visit_loop(struct nir_to_llvm_context *ctx, nir_loop *loop)
3627 {
3628 LLVMBasicBlockRef continue_parent = ctx->continue_block;
3629 LLVMBasicBlockRef break_parent = ctx->break_block;
3630
3631 ctx->continue_block =
3632 LLVMAppendBasicBlockInContext(ctx->context, ctx->main_function, "");
3633 ctx->break_block =
3634 LLVMAppendBasicBlockInContext(ctx->context, ctx->main_function, "");
3635
3636 LLVMBuildBr(ctx->builder, ctx->continue_block);
3637 LLVMPositionBuilderAtEnd(ctx->builder, ctx->continue_block);
3638 visit_cf_list(ctx, &loop->body);
3639
3640 if (LLVMGetInsertBlock(ctx->builder))
3641 LLVMBuildBr(ctx->builder, ctx->continue_block);
3642 LLVMPositionBuilderAtEnd(ctx->builder, ctx->break_block);
3643
3644 ctx->continue_block = continue_parent;
3645 ctx->break_block = break_parent;
3646 }
3647
3648 static void visit_cf_list(struct nir_to_llvm_context *ctx,
3649 struct exec_list *list)
3650 {
3651 foreach_list_typed(nir_cf_node, node, node, list)
3652 {
3653 switch (node->type) {
3654 case nir_cf_node_block:
3655 visit_block(ctx, nir_cf_node_as_block(node));
3656 break;
3657
3658 case nir_cf_node_if:
3659 visit_if(ctx, nir_cf_node_as_if(node));
3660 break;
3661
3662 case nir_cf_node_loop:
3663 visit_loop(ctx, nir_cf_node_as_loop(node));
3664 break;
3665
3666 default:
3667 assert(0);
3668 }
3669 }
3670 }
3671
3672 static void
3673 handle_vs_input_decl(struct nir_to_llvm_context *ctx,
3674 struct nir_variable *variable)
3675 {
3676 LLVMValueRef t_list_ptr = ctx->vertex_buffers;
3677 LLVMValueRef t_offset;
3678 LLVMValueRef t_list;
3679 LLVMValueRef args[3];
3680 LLVMValueRef input;
3681 LLVMValueRef buffer_index;
3682 int index = variable->data.location - VERT_ATTRIB_GENERIC0;
3683 int idx = variable->data.location;
3684 unsigned attrib_count = glsl_count_attribute_slots(variable->type, true);
3685
3686 variable->data.driver_location = idx * 4;
3687
3688 if (ctx->options->key.vs.instance_rate_inputs & (1u << index)) {
3689 buffer_index = LLVMBuildAdd(ctx->builder, ctx->instance_id,
3690 ctx->start_instance, "");
3691 ctx->shader_info->vs.vgpr_comp_cnt = MAX2(3,
3692 ctx->shader_info->vs.vgpr_comp_cnt);
3693 } else
3694 buffer_index = LLVMBuildAdd(ctx->builder, ctx->vertex_id,
3695 ctx->base_vertex, "");
3696
3697 for (unsigned i = 0; i < attrib_count; ++i, ++idx) {
3698 t_offset = LLVMConstInt(ctx->i32, index + i, false);
3699
3700 t_list = build_indexed_load_const(ctx, t_list_ptr, t_offset);
3701 args[0] = t_list;
3702 args[1] = LLVMConstInt(ctx->i32, 0, false);
3703 args[2] = buffer_index;
3704 input = ac_emit_llvm_intrinsic(&ctx->ac,
3705 "llvm.SI.vs.load.input", ctx->v4f32, args, 3,
3706 AC_FUNC_ATTR_READNONE | AC_FUNC_ATTR_NOUNWIND);
3707
3708 for (unsigned chan = 0; chan < 4; chan++) {
3709 LLVMValueRef llvm_chan = LLVMConstInt(ctx->i32, chan, false);
3710 ctx->inputs[radeon_llvm_reg_index_soa(idx, chan)] =
3711 to_integer(ctx, LLVMBuildExtractElement(ctx->builder,
3712 input, llvm_chan, ""));
3713 }
3714 }
3715 }
3716
3717
3718 static void interp_fs_input(struct nir_to_llvm_context *ctx,
3719 unsigned attr,
3720 LLVMValueRef interp_param,
3721 LLVMValueRef prim_mask,
3722 LLVMValueRef result[4])
3723 {
3724 const char *intr_name;
3725 LLVMValueRef attr_number;
3726 unsigned chan;
3727
3728 attr_number = LLVMConstInt(ctx->i32, attr, false);
3729
3730 /* fs.constant returns the param from the middle vertex, so it's not
3731 * really useful for flat shading. It's meant to be used for custom
3732 * interpolation (but the intrinsic can't fetch from the other two
3733 * vertices).
3734 *
3735 * Luckily, it doesn't matter, because we rely on the FLAT_SHADE state
3736 * to do the right thing. The only reason we use fs.constant is that
3737 * fs.interp cannot be used on integers, because they can be equal
3738 * to NaN.
3739 */
3740 intr_name = interp_param ? "llvm.SI.fs.interp" : "llvm.SI.fs.constant";
3741
3742 for (chan = 0; chan < 4; chan++) {
3743 LLVMValueRef args[4];
3744 LLVMValueRef llvm_chan = LLVMConstInt(ctx->i32, chan, false);
3745
3746 args[0] = llvm_chan;
3747 args[1] = attr_number;
3748 args[2] = prim_mask;
3749 args[3] = interp_param;
3750 result[chan] = ac_emit_llvm_intrinsic(&ctx->ac, intr_name,
3751 ctx->f32, args, args[3] ? 4 : 3,
3752 AC_FUNC_ATTR_READNONE | AC_FUNC_ATTR_NOUNWIND);
3753 }
3754 }
3755
3756 static void
3757 handle_fs_input_decl(struct nir_to_llvm_context *ctx,
3758 struct nir_variable *variable)
3759 {
3760 int idx = variable->data.location;
3761 unsigned attrib_count = glsl_count_attribute_slots(variable->type, false);
3762 LLVMValueRef interp;
3763
3764 variable->data.driver_location = idx * 4;
3765 ctx->input_mask |= ((1ull << attrib_count) - 1) << variable->data.location;
3766
3767 if (glsl_get_base_type(glsl_without_array(variable->type)) == GLSL_TYPE_FLOAT) {
3768 unsigned interp_type;
3769 if (variable->data.sample) {
3770 interp_type = INTERP_SAMPLE;
3771 ctx->shader_info->fs.force_persample = true;
3772 } else if (variable->data.centroid)
3773 interp_type = INTERP_CENTROID;
3774 else
3775 interp_type = INTERP_CENTER;
3776
3777 interp = lookup_interp_param(ctx, variable->data.interpolation, interp_type);
3778 } else
3779 interp = NULL;
3780
3781 for (unsigned i = 0; i < attrib_count; ++i)
3782 ctx->inputs[radeon_llvm_reg_index_soa(idx + i, 0)] = interp;
3783
3784 }
3785
3786 static void
3787 handle_shader_input_decl(struct nir_to_llvm_context *ctx,
3788 struct nir_variable *variable)
3789 {
3790 switch (ctx->stage) {
3791 case MESA_SHADER_VERTEX:
3792 handle_vs_input_decl(ctx, variable);
3793 break;
3794 case MESA_SHADER_FRAGMENT:
3795 handle_fs_input_decl(ctx, variable);
3796 break;
3797 default:
3798 break;
3799 }
3800
3801 }
3802
3803 static void
3804 handle_fs_inputs_pre(struct nir_to_llvm_context *ctx,
3805 struct nir_shader *nir)
3806 {
3807 unsigned index = 0;
3808 for (unsigned i = 0; i < RADEON_LLVM_MAX_INPUTS; ++i) {
3809 LLVMValueRef interp_param;
3810 LLVMValueRef *inputs = ctx->inputs +radeon_llvm_reg_index_soa(i, 0);
3811
3812 if (!(ctx->input_mask & (1ull << i)))
3813 continue;
3814
3815 if (i >= VARYING_SLOT_VAR0 || i == VARYING_SLOT_PNTC) {
3816 interp_param = *inputs;
3817 interp_fs_input(ctx, index, interp_param, ctx->prim_mask,
3818 inputs);
3819
3820 if (!interp_param)
3821 ctx->shader_info->fs.flat_shaded_mask |= 1u << index;
3822 ++index;
3823 } else if (i == VARYING_SLOT_POS) {
3824 for(int i = 0; i < 3; ++i)
3825 inputs[i] = ctx->frag_pos[i];
3826
3827 inputs[3] = ac_emit_fdiv(&ctx->ac, ctx->f32one, ctx->frag_pos[3]);
3828 }
3829 }
3830 ctx->shader_info->fs.num_interp = index;
3831 if (ctx->input_mask & (1 << VARYING_SLOT_PNTC))
3832 ctx->shader_info->fs.has_pcoord = true;
3833 ctx->shader_info->fs.input_mask = ctx->input_mask >> VARYING_SLOT_VAR0;
3834 }
3835
3836 static LLVMValueRef
3837 ac_build_alloca(struct nir_to_llvm_context *ctx,
3838 LLVMTypeRef type,
3839 const char *name)
3840 {
3841 LLVMBuilderRef builder = ctx->builder;
3842 LLVMBasicBlockRef current_block = LLVMGetInsertBlock(builder);
3843 LLVMValueRef function = LLVMGetBasicBlockParent(current_block);
3844 LLVMBasicBlockRef first_block = LLVMGetEntryBasicBlock(function);
3845 LLVMValueRef first_instr = LLVMGetFirstInstruction(first_block);
3846 LLVMBuilderRef first_builder = LLVMCreateBuilderInContext(ctx->context);
3847 LLVMValueRef res;
3848
3849 if (first_instr) {
3850 LLVMPositionBuilderBefore(first_builder, first_instr);
3851 } else {
3852 LLVMPositionBuilderAtEnd(first_builder, first_block);
3853 }
3854
3855 res = LLVMBuildAlloca(first_builder, type, name);
3856 LLVMBuildStore(builder, LLVMConstNull(type), res);
3857
3858 LLVMDisposeBuilder(first_builder);
3859
3860 return res;
3861 }
3862
3863 static LLVMValueRef si_build_alloca_undef(struct nir_to_llvm_context *ctx,
3864 LLVMTypeRef type,
3865 const char *name)
3866 {
3867 LLVMValueRef ptr = ac_build_alloca(ctx, type, name);
3868 LLVMBuildStore(ctx->builder, LLVMGetUndef(type), ptr);
3869 return ptr;
3870 }
3871
3872 static void
3873 handle_shader_output_decl(struct nir_to_llvm_context *ctx,
3874 struct nir_variable *variable)
3875 {
3876 int idx = variable->data.location + variable->data.index;
3877 unsigned attrib_count = glsl_count_attribute_slots(variable->type, false);
3878
3879 variable->data.driver_location = idx * 4;
3880
3881 if (ctx->stage == MESA_SHADER_VERTEX) {
3882
3883 if (idx == VARYING_SLOT_CLIP_DIST0 ||
3884 idx == VARYING_SLOT_CULL_DIST0) {
3885 int length = glsl_get_length(variable->type);
3886 if (idx == VARYING_SLOT_CLIP_DIST0) {
3887 ctx->shader_info->vs.clip_dist_mask = (1 << length) - 1;
3888 ctx->num_clips = length;
3889 } else if (idx == VARYING_SLOT_CULL_DIST0) {
3890 ctx->shader_info->vs.cull_dist_mask = (1 << length) - 1;
3891 ctx->num_culls = length;
3892 }
3893 if (length > 4)
3894 attrib_count = 2;
3895 else
3896 attrib_count = 1;
3897 }
3898 }
3899
3900 for (unsigned i = 0; i < attrib_count; ++i) {
3901 for (unsigned chan = 0; chan < 4; chan++) {
3902 ctx->outputs[radeon_llvm_reg_index_soa(idx + i, chan)] =
3903 si_build_alloca_undef(ctx, ctx->f32, "");
3904 }
3905 }
3906 ctx->output_mask |= ((1ull << attrib_count) - 1) << idx;
3907 }
3908
3909 static void
3910 setup_locals(struct nir_to_llvm_context *ctx,
3911 struct nir_function *func)
3912 {
3913 int i, j;
3914 ctx->num_locals = 0;
3915 nir_foreach_variable(variable, &func->impl->locals) {
3916 unsigned attrib_count = glsl_count_attribute_slots(variable->type, false);
3917 variable->data.driver_location = ctx->num_locals * 4;
3918 ctx->num_locals += attrib_count;
3919 }
3920 ctx->locals = malloc(4 * ctx->num_locals * sizeof(LLVMValueRef));
3921 if (!ctx->locals)
3922 return;
3923
3924 for (i = 0; i < ctx->num_locals; i++) {
3925 for (j = 0; j < 4; j++) {
3926 ctx->locals[i * 4 + j] =
3927 si_build_alloca_undef(ctx, ctx->f32, "temp");
3928 }
3929 }
3930 }
3931
3932 static LLVMValueRef
3933 emit_float_saturate(struct nir_to_llvm_context *ctx, LLVMValueRef v, float lo, float hi)
3934 {
3935 v = to_float(ctx, v);
3936 v = emit_intrin_2f_param(ctx, "llvm.maxnum.f32", v, LLVMConstReal(ctx->f32, lo));
3937 return emit_intrin_2f_param(ctx, "llvm.minnum.f32", v, LLVMConstReal(ctx->f32, hi));
3938 }
3939
3940
3941 static LLVMValueRef emit_pack_int16(struct nir_to_llvm_context *ctx,
3942 LLVMValueRef src0, LLVMValueRef src1)
3943 {
3944 LLVMValueRef const16 = LLVMConstInt(ctx->i32, 16, false);
3945 LLVMValueRef comp[2];
3946
3947 comp[0] = LLVMBuildAnd(ctx->builder, src0, LLVMConstInt(ctx-> i32, 65535, 0), "");
3948 comp[1] = LLVMBuildAnd(ctx->builder, src1, LLVMConstInt(ctx-> i32, 65535, 0), "");
3949 comp[1] = LLVMBuildShl(ctx->builder, comp[1], const16, "");
3950 return LLVMBuildOr(ctx->builder, comp[0], comp[1], "");
3951 }
3952
3953 /* Initialize arguments for the shader export intrinsic */
3954 static void
3955 si_llvm_init_export_args(struct nir_to_llvm_context *ctx,
3956 LLVMValueRef *values,
3957 unsigned target,
3958 LLVMValueRef *args)
3959 {
3960 /* Default is 0xf. Adjusted below depending on the format. */
3961 args[0] = LLVMConstInt(ctx->i32, target != V_008DFC_SQ_EXP_NULL ? 0xf : 0, false);
3962 /* Specify whether the EXEC mask represents the valid mask */
3963 args[1] = LLVMConstInt(ctx->i32, 0, false);
3964
3965 /* Specify whether this is the last export */
3966 args[2] = LLVMConstInt(ctx->i32, 0, false);
3967 /* Specify the target we are exporting */
3968 args[3] = LLVMConstInt(ctx->i32, target, false);
3969
3970 args[4] = LLVMConstInt(ctx->i32, 0, false); /* COMPR flag */
3971 args[5] = LLVMGetUndef(ctx->f32);
3972 args[6] = LLVMGetUndef(ctx->f32);
3973 args[7] = LLVMGetUndef(ctx->f32);
3974 args[8] = LLVMGetUndef(ctx->f32);
3975
3976 if (!values)
3977 return;
3978
3979 if (ctx->stage == MESA_SHADER_FRAGMENT && target >= V_008DFC_SQ_EXP_MRT) {
3980 LLVMValueRef val[4];
3981 unsigned index = target - V_008DFC_SQ_EXP_MRT;
3982 unsigned col_format = (ctx->options->key.fs.col_format >> (4 * index)) & 0xf;
3983 bool is_int8 = (ctx->options->key.fs.is_int8 >> index) & 1;
3984
3985 switch(col_format) {
3986 case V_028714_SPI_SHADER_ZERO:
3987 args[0] = LLVMConstInt(ctx->i32, 0x0, 0);
3988 args[3] = LLVMConstInt(ctx->i32, V_008DFC_SQ_EXP_NULL, 0);
3989 break;
3990
3991 case V_028714_SPI_SHADER_32_R:
3992 args[0] = LLVMConstInt(ctx->i32, 0x1, 0);
3993 args[5] = values[0];
3994 break;
3995
3996 case V_028714_SPI_SHADER_32_GR:
3997 args[0] = LLVMConstInt(ctx->i32, 0x3, 0);
3998 args[5] = values[0];
3999 args[6] = values[1];
4000 break;
4001
4002 case V_028714_SPI_SHADER_32_AR:
4003 args[0] = LLVMConstInt(ctx->i32, 0x9, 0);
4004 args[5] = values[0];
4005 args[8] = values[3];
4006 break;
4007
4008 case V_028714_SPI_SHADER_FP16_ABGR:
4009 args[4] = ctx->i32one;
4010
4011 for (unsigned chan = 0; chan < 2; chan++) {
4012 LLVMValueRef pack_args[2] = {
4013 values[2 * chan],
4014 values[2 * chan + 1]
4015 };
4016 LLVMValueRef packed;
4017
4018 packed = ac_emit_llvm_intrinsic(&ctx->ac, "llvm.SI.packf16",
4019 ctx->i32, pack_args, 2,
4020 AC_FUNC_ATTR_READNONE);
4021 args[chan + 5] = packed;
4022 }
4023 break;
4024
4025 case V_028714_SPI_SHADER_UNORM16_ABGR:
4026 for (unsigned chan = 0; chan < 4; chan++) {
4027 val[chan] = emit_float_saturate(ctx, values[chan], 0, 1);
4028 val[chan] = LLVMBuildFMul(ctx->builder, val[chan],
4029 LLVMConstReal(ctx->f32, 65535), "");
4030 val[chan] = LLVMBuildFAdd(ctx->builder, val[chan],
4031 LLVMConstReal(ctx->f32, 0.5), "");
4032 val[chan] = LLVMBuildFPToUI(ctx->builder, val[chan],
4033 ctx->i32, "");
4034 }
4035
4036 args[4] = ctx->i32one;
4037 args[5] = emit_pack_int16(ctx, val[0], val[1]);
4038 args[6] = emit_pack_int16(ctx, val[2], val[3]);
4039 break;
4040
4041 case V_028714_SPI_SHADER_SNORM16_ABGR:
4042 for (unsigned chan = 0; chan < 4; chan++) {
4043 val[chan] = emit_float_saturate(ctx, values[chan], -1, 1);
4044 val[chan] = LLVMBuildFMul(ctx->builder, val[chan],
4045 LLVMConstReal(ctx->f32, 32767), "");
4046
4047 /* If positive, add 0.5, else add -0.5. */
4048 val[chan] = LLVMBuildFAdd(ctx->builder, val[chan],
4049 LLVMBuildSelect(ctx->builder,
4050 LLVMBuildFCmp(ctx->builder, LLVMRealOGE,
4051 val[chan], ctx->f32zero, ""),
4052 LLVMConstReal(ctx->f32, 0.5),
4053 LLVMConstReal(ctx->f32, -0.5), ""), "");
4054 val[chan] = LLVMBuildFPToSI(ctx->builder, val[chan], ctx->i32, "");
4055 }
4056
4057 args[4] = ctx->i32one;
4058 args[5] = emit_pack_int16(ctx, val[0], val[1]);
4059 args[6] = emit_pack_int16(ctx, val[2], val[3]);
4060 break;
4061
4062 case V_028714_SPI_SHADER_UINT16_ABGR: {
4063 LLVMValueRef max = LLVMConstInt(ctx->i32, is_int8 ? 255 : 65535, 0);
4064
4065 for (unsigned chan = 0; chan < 4; chan++) {
4066 val[chan] = to_integer(ctx, values[chan]);
4067 val[chan] = emit_minmax_int(ctx, LLVMIntULT, val[chan], max);
4068 }
4069
4070 args[4] = ctx->i32one;
4071 args[5] = emit_pack_int16(ctx, val[0], val[1]);
4072 args[6] = emit_pack_int16(ctx, val[2], val[3]);
4073 break;
4074 }
4075
4076 case V_028714_SPI_SHADER_SINT16_ABGR: {
4077 LLVMValueRef max = LLVMConstInt(ctx->i32, is_int8 ? 127 : 32767, 0);
4078 LLVMValueRef min = LLVMConstInt(ctx->i32, is_int8 ? -128 : -32768, 0);
4079
4080 /* Clamp. */
4081 for (unsigned chan = 0; chan < 4; chan++) {
4082 val[chan] = to_integer(ctx, values[chan]);
4083 val[chan] = emit_minmax_int(ctx, LLVMIntSLT, val[chan], max);
4084 val[chan] = emit_minmax_int(ctx, LLVMIntSGT, val[chan], min);
4085 }
4086
4087 args[4] = ctx->i32one;
4088 args[5] = emit_pack_int16(ctx, val[0], val[1]);
4089 args[6] = emit_pack_int16(ctx, val[2], val[3]);
4090 break;
4091 }
4092
4093 default:
4094 case V_028714_SPI_SHADER_32_ABGR:
4095 memcpy(&args[5], values, sizeof(values[0]) * 4);
4096 break;
4097 }
4098 } else
4099 memcpy(&args[5], values, sizeof(values[0]) * 4);
4100
4101 for (unsigned i = 5; i < 9; ++i)
4102 args[i] = to_float(ctx, args[i]);
4103 }
4104
4105 static void
4106 handle_vs_outputs_post(struct nir_to_llvm_context *ctx)
4107 {
4108 uint32_t param_count = 0;
4109 unsigned target;
4110 unsigned pos_idx, num_pos_exports = 0;
4111 LLVMValueRef args[9];
4112 LLVMValueRef pos_args[4][9] = { { 0 } };
4113 LLVMValueRef psize_value = NULL, layer_value = NULL, viewport_index_value = NULL;
4114 int i;
4115 const uint64_t clip_mask = ctx->output_mask & ((1ull << VARYING_SLOT_CLIP_DIST0) |
4116 (1ull << VARYING_SLOT_CLIP_DIST1) |
4117 (1ull << VARYING_SLOT_CULL_DIST0) |
4118 (1ull << VARYING_SLOT_CULL_DIST1));
4119
4120 if (clip_mask) {
4121 LLVMValueRef slots[8];
4122 unsigned j;
4123
4124 if (ctx->shader_info->vs.cull_dist_mask)
4125 ctx->shader_info->vs.cull_dist_mask <<= ctx->num_clips;
4126
4127 i = VARYING_SLOT_CLIP_DIST0;
4128 for (j = 0; j < ctx->num_clips; j++)
4129 slots[j] = to_float(ctx, LLVMBuildLoad(ctx->builder,
4130 ctx->outputs[radeon_llvm_reg_index_soa(i, j)], ""));
4131 i = VARYING_SLOT_CULL_DIST0;
4132 for (j = 0; j < ctx->num_culls; j++)
4133 slots[ctx->num_clips + j] = to_float(ctx, LLVMBuildLoad(ctx->builder,
4134 ctx->outputs[radeon_llvm_reg_index_soa(i, j)], ""));
4135
4136 for (i = ctx->num_clips + ctx->num_culls; i < 8; i++)
4137 slots[i] = LLVMGetUndef(ctx->f32);
4138
4139 if (ctx->num_clips + ctx->num_culls > 4) {
4140 target = V_008DFC_SQ_EXP_POS + 3;
4141 si_llvm_init_export_args(ctx, &slots[4], target, args);
4142 memcpy(pos_args[target - V_008DFC_SQ_EXP_POS],
4143 args, sizeof(args));
4144 }
4145
4146 target = V_008DFC_SQ_EXP_POS + 2;
4147 si_llvm_init_export_args(ctx, &slots[0], target, args);
4148 memcpy(pos_args[target - V_008DFC_SQ_EXP_POS],
4149 args, sizeof(args));
4150
4151 }
4152
4153 for (unsigned i = 0; i < RADEON_LLVM_MAX_OUTPUTS; ++i) {
4154 LLVMValueRef values[4];
4155 if (!(ctx->output_mask & (1ull << i)))
4156 continue;
4157
4158 for (unsigned j = 0; j < 4; j++)
4159 values[j] = to_float(ctx, LLVMBuildLoad(ctx->builder,
4160 ctx->outputs[radeon_llvm_reg_index_soa(i, j)], ""));
4161
4162 if (i == VARYING_SLOT_POS) {
4163 target = V_008DFC_SQ_EXP_POS;
4164 } else if (i == VARYING_SLOT_CLIP_DIST0 ||
4165 i == VARYING_SLOT_CLIP_DIST1 ||
4166 i == VARYING_SLOT_CULL_DIST0 ||
4167 i == VARYING_SLOT_CULL_DIST1) {
4168 continue;
4169 } else if (i == VARYING_SLOT_PSIZ) {
4170 ctx->shader_info->vs.writes_pointsize = true;
4171 psize_value = values[0];
4172 continue;
4173 } else if (i == VARYING_SLOT_LAYER) {
4174 ctx->shader_info->vs.writes_layer = true;
4175 layer_value = values[0];
4176 continue;
4177 } else if (i == VARYING_SLOT_VIEWPORT) {
4178 ctx->shader_info->vs.writes_viewport_index = true;
4179 viewport_index_value = values[0];
4180 continue;
4181 } else if (i >= VARYING_SLOT_VAR0) {
4182 ctx->shader_info->vs.export_mask |= 1u << (i - VARYING_SLOT_VAR0);
4183 target = V_008DFC_SQ_EXP_PARAM + param_count;
4184 param_count++;
4185 }
4186
4187 si_llvm_init_export_args(ctx, values, target, args);
4188
4189 if (target >= V_008DFC_SQ_EXP_POS &&
4190 target <= (V_008DFC_SQ_EXP_POS + 3)) {
4191 memcpy(pos_args[target - V_008DFC_SQ_EXP_POS],
4192 args, sizeof(args));
4193 } else {
4194 ac_emit_llvm_intrinsic(&ctx->ac,
4195 "llvm.SI.export",
4196 ctx->voidt,
4197 args, 9, 0);
4198 }
4199 }
4200
4201 /* We need to add the position output manually if it's missing. */
4202 if (!pos_args[0][0]) {
4203 pos_args[0][0] = LLVMConstInt(ctx->i32, 0xf, false);
4204 pos_args[0][1] = ctx->i32zero; /* EXEC mask */
4205 pos_args[0][2] = ctx->i32zero; /* last export? */
4206 pos_args[0][3] = LLVMConstInt(ctx->i32, V_008DFC_SQ_EXP_POS, false);
4207 pos_args[0][4] = ctx->i32zero; /* COMPR flag */
4208 pos_args[0][5] = ctx->f32zero; /* X */
4209 pos_args[0][6] = ctx->f32zero; /* Y */
4210 pos_args[0][7] = ctx->f32zero; /* Z */
4211 pos_args[0][8] = ctx->f32one; /* W */
4212 }
4213
4214 uint32_t mask = ((ctx->shader_info->vs.writes_pointsize == true ? 1 : 0) |
4215 (ctx->shader_info->vs.writes_layer == true ? 4 : 0) |
4216 (ctx->shader_info->vs.writes_viewport_index == true ? 8 : 0));
4217 if (mask) {
4218 pos_args[1][0] = LLVMConstInt(ctx->i32, mask, false); /* writemask */
4219 pos_args[1][1] = ctx->i32zero; /* EXEC mask */
4220 pos_args[1][2] = ctx->i32zero; /* last export? */
4221 pos_args[1][3] = LLVMConstInt(ctx->i32, V_008DFC_SQ_EXP_POS + 1, false);
4222 pos_args[1][4] = ctx->i32zero; /* COMPR flag */
4223 pos_args[1][5] = ctx->f32zero; /* X */
4224 pos_args[1][6] = ctx->f32zero; /* Y */
4225 pos_args[1][7] = ctx->f32zero; /* Z */
4226 pos_args[1][8] = ctx->f32zero; /* W */
4227
4228 if (ctx->shader_info->vs.writes_pointsize == true)
4229 pos_args[1][5] = psize_value;
4230 if (ctx->shader_info->vs.writes_layer == true)
4231 pos_args[1][7] = layer_value;
4232 if (ctx->shader_info->vs.writes_viewport_index == true)
4233 pos_args[1][8] = viewport_index_value;
4234 }
4235 for (i = 0; i < 4; i++) {
4236 if (pos_args[i][0])
4237 num_pos_exports++;
4238 }
4239
4240 pos_idx = 0;
4241 for (i = 0; i < 4; i++) {
4242 if (!pos_args[i][0])
4243 continue;
4244
4245 /* Specify the target we are exporting */
4246 pos_args[i][3] = LLVMConstInt(ctx->i32, V_008DFC_SQ_EXP_POS + pos_idx++, false);
4247 if (pos_idx == num_pos_exports)
4248 pos_args[i][2] = ctx->i32one;
4249 ac_emit_llvm_intrinsic(&ctx->ac,
4250 "llvm.SI.export",
4251 ctx->voidt,
4252 pos_args[i], 9, 0);
4253 }
4254
4255 ctx->shader_info->vs.pos_exports = num_pos_exports;
4256 ctx->shader_info->vs.param_exports = param_count;
4257 }
4258
4259 static void
4260 si_export_mrt_color(struct nir_to_llvm_context *ctx,
4261 LLVMValueRef *color, unsigned param, bool is_last)
4262 {
4263 LLVMValueRef args[9];
4264 /* Export */
4265 si_llvm_init_export_args(ctx, color, param,
4266 args);
4267
4268 if (is_last) {
4269 args[1] = ctx->i32one; /* whether the EXEC mask is valid */
4270 args[2] = ctx->i32one; /* DONE bit */
4271 } else if (args[0] == ctx->i32zero)
4272 return; /* unnecessary NULL export */
4273
4274 ac_emit_llvm_intrinsic(&ctx->ac, "llvm.SI.export",
4275 ctx->voidt, args, 9, 0);
4276 }
4277
4278 static void
4279 si_export_mrt_z(struct nir_to_llvm_context *ctx,
4280 LLVMValueRef depth, LLVMValueRef stencil,
4281 LLVMValueRef samplemask)
4282 {
4283 LLVMValueRef args[9];
4284 unsigned mask = 0;
4285 args[1] = ctx->i32one; /* whether the EXEC mask is valid */
4286 args[2] = ctx->i32one; /* DONE bit */
4287 /* Specify the target we are exporting */
4288 args[3] = LLVMConstInt(ctx->i32, V_008DFC_SQ_EXP_MRTZ, false);
4289
4290 args[4] = ctx->i32zero; /* COMP flag */
4291 args[5] = LLVMGetUndef(ctx->f32); /* R, depth */
4292 args[6] = LLVMGetUndef(ctx->f32); /* G, stencil test val[0:7], stencil op val[8:15] */
4293 args[7] = LLVMGetUndef(ctx->f32); /* B, sample mask */
4294 args[8] = LLVMGetUndef(ctx->f32); /* A, alpha to mask */
4295
4296 if (depth) {
4297 args[5] = depth;
4298 mask |= 0x1;
4299 }
4300
4301 if (stencil) {
4302 args[6] = stencil;
4303 mask |= 0x2;
4304 }
4305
4306 if (samplemask) {
4307 args[7] = samplemask;
4308 mask |= 0x04;
4309 }
4310
4311 /* SI (except OLAND) has a bug that it only looks
4312 * at the X writemask component. */
4313 if (ctx->options->chip_class == SI &&
4314 ctx->options->family != CHIP_OLAND)
4315 mask |= 0x01;
4316
4317 args[0] = LLVMConstInt(ctx->i32, mask, false);
4318 ac_emit_llvm_intrinsic(&ctx->ac, "llvm.SI.export",
4319 ctx->voidt, args, 9, 0);
4320 }
4321
4322 static void
4323 handle_fs_outputs_post(struct nir_to_llvm_context *ctx)
4324 {
4325 unsigned index = 0;
4326 LLVMValueRef depth = NULL, stencil = NULL, samplemask = NULL;
4327
4328 for (unsigned i = 0; i < RADEON_LLVM_MAX_OUTPUTS; ++i) {
4329 LLVMValueRef values[4];
4330
4331 if (!(ctx->output_mask & (1ull << i)))
4332 continue;
4333
4334 if (i == FRAG_RESULT_DEPTH) {
4335 ctx->shader_info->fs.writes_z = true;
4336 depth = to_float(ctx, LLVMBuildLoad(ctx->builder,
4337 ctx->outputs[radeon_llvm_reg_index_soa(i, 0)], ""));
4338 } else if (i == FRAG_RESULT_STENCIL) {
4339 ctx->shader_info->fs.writes_stencil = true;
4340 stencil = to_float(ctx, LLVMBuildLoad(ctx->builder,
4341 ctx->outputs[radeon_llvm_reg_index_soa(i, 0)], ""));
4342 } else {
4343 bool last = false;
4344 for (unsigned j = 0; j < 4; j++)
4345 values[j] = to_float(ctx, LLVMBuildLoad(ctx->builder,
4346 ctx->outputs[radeon_llvm_reg_index_soa(i, j)], ""));
4347
4348 if (!ctx->shader_info->fs.writes_z && !ctx->shader_info->fs.writes_stencil)
4349 last = ctx->output_mask <= ((1ull << (i + 1)) - 1);
4350
4351 si_export_mrt_color(ctx, values, V_008DFC_SQ_EXP_MRT + index, last);
4352 index++;
4353 }
4354 }
4355
4356 if (depth || stencil)
4357 si_export_mrt_z(ctx, depth, stencil, samplemask);
4358 else if (!index)
4359 si_export_mrt_color(ctx, NULL, V_008DFC_SQ_EXP_NULL, true);
4360
4361 ctx->shader_info->fs.output_mask = index ? ((1ull << index) - 1) : 0;
4362 }
4363
4364 static void
4365 handle_shader_outputs_post(struct nir_to_llvm_context *ctx)
4366 {
4367 switch (ctx->stage) {
4368 case MESA_SHADER_VERTEX:
4369 handle_vs_outputs_post(ctx);
4370 break;
4371 case MESA_SHADER_FRAGMENT:
4372 handle_fs_outputs_post(ctx);
4373 break;
4374 default:
4375 break;
4376 }
4377 }
4378
4379 static void
4380 handle_shared_compute_var(struct nir_to_llvm_context *ctx,
4381 struct nir_variable *variable, uint32_t *offset, int idx)
4382 {
4383 unsigned size = glsl_count_attribute_slots(variable->type, false);
4384 variable->data.driver_location = *offset;
4385 *offset += size;
4386 }
4387
4388 static void ac_llvm_finalize_module(struct nir_to_llvm_context * ctx)
4389 {
4390 LLVMPassManagerRef passmgr;
4391 /* Create the pass manager */
4392 passmgr = LLVMCreateFunctionPassManagerForModule(
4393 ctx->module);
4394
4395 /* This pass should eliminate all the load and store instructions */
4396 LLVMAddPromoteMemoryToRegisterPass(passmgr);
4397
4398 /* Add some optimization passes */
4399 LLVMAddScalarReplAggregatesPass(passmgr);
4400 LLVMAddLICMPass(passmgr);
4401 LLVMAddAggressiveDCEPass(passmgr);
4402 LLVMAddCFGSimplificationPass(passmgr);
4403 LLVMAddInstructionCombiningPass(passmgr);
4404
4405 /* Run the pass */
4406 LLVMInitializeFunctionPassManager(passmgr);
4407 LLVMRunFunctionPassManager(passmgr, ctx->main_function);
4408 LLVMFinalizeFunctionPassManager(passmgr);
4409
4410 LLVMDisposeBuilder(ctx->builder);
4411 LLVMDisposePassManager(passmgr);
4412 }
4413
4414 static
4415 LLVMModuleRef ac_translate_nir_to_llvm(LLVMTargetMachineRef tm,
4416 struct nir_shader *nir,
4417 struct ac_shader_variant_info *shader_info,
4418 const struct ac_nir_compiler_options *options)
4419 {
4420 struct nir_to_llvm_context ctx = {0};
4421 struct nir_function *func;
4422 unsigned i;
4423 ctx.options = options;
4424 ctx.shader_info = shader_info;
4425 ctx.context = LLVMContextCreate();
4426 ctx.module = LLVMModuleCreateWithNameInContext("shader", ctx.context);
4427
4428 ac_llvm_context_init(&ctx.ac, ctx.context);
4429 ctx.ac.module = ctx.module;
4430
4431 ctx.has_ds_bpermute = ctx.options->chip_class >= VI;
4432
4433 memset(shader_info, 0, sizeof(*shader_info));
4434
4435 LLVMSetTarget(ctx.module, "amdgcn--");
4436 setup_types(&ctx);
4437
4438 ctx.builder = LLVMCreateBuilderInContext(ctx.context);
4439 ctx.ac.builder = ctx.builder;
4440 ctx.stage = nir->stage;
4441
4442 for (i = 0; i < AC_UD_MAX_SETS; i++)
4443 shader_info->user_sgprs_locs.descriptor_sets[i].sgpr_idx = -1;
4444 for (i = 0; i < AC_UD_MAX_UD; i++)
4445 shader_info->user_sgprs_locs.shader_data[i].sgpr_idx = -1;
4446
4447 create_function(&ctx);
4448
4449 if (nir->stage == MESA_SHADER_COMPUTE) {
4450 int num_shared = 0;
4451 nir_foreach_variable(variable, &nir->shared)
4452 num_shared++;
4453 if (num_shared) {
4454 int idx = 0;
4455 uint32_t shared_size = 0;
4456 LLVMValueRef var;
4457 LLVMTypeRef i8p = LLVMPointerType(ctx.i8, LOCAL_ADDR_SPACE);
4458 nir_foreach_variable(variable, &nir->shared) {
4459 handle_shared_compute_var(&ctx, variable, &shared_size, idx);
4460 idx++;
4461 }
4462
4463 shared_size *= 4;
4464 var = LLVMAddGlobalInAddressSpace(ctx.module,
4465 LLVMArrayType(ctx.i8, shared_size),
4466 "compute_lds",
4467 LOCAL_ADDR_SPACE);
4468 LLVMSetAlignment(var, 4);
4469 ctx.shared_memory = LLVMBuildBitCast(ctx.builder, var, i8p, "");
4470 }
4471 }
4472
4473 nir_foreach_variable(variable, &nir->inputs)
4474 handle_shader_input_decl(&ctx, variable);
4475
4476 if (nir->stage == MESA_SHADER_FRAGMENT)
4477 handle_fs_inputs_pre(&ctx, nir);
4478
4479 nir_foreach_variable(variable, &nir->outputs)
4480 handle_shader_output_decl(&ctx, variable);
4481
4482 ctx.defs = _mesa_hash_table_create(NULL, _mesa_hash_pointer,
4483 _mesa_key_pointer_equal);
4484 ctx.phis = _mesa_hash_table_create(NULL, _mesa_hash_pointer,
4485 _mesa_key_pointer_equal);
4486
4487 func = (struct nir_function *)exec_list_get_head(&nir->functions);
4488
4489 setup_locals(&ctx, func);
4490
4491 visit_cf_list(&ctx, &func->impl->body);
4492 phi_post_pass(&ctx);
4493
4494 handle_shader_outputs_post(&ctx);
4495 LLVMBuildRetVoid(ctx.builder);
4496
4497 ac_llvm_finalize_module(&ctx);
4498 free(ctx.locals);
4499 ralloc_free(ctx.defs);
4500 ralloc_free(ctx.phis);
4501
4502 return ctx.module;
4503 }
4504
4505 static void ac_diagnostic_handler(LLVMDiagnosticInfoRef di, void *context)
4506 {
4507 unsigned *retval = (unsigned *)context;
4508 LLVMDiagnosticSeverity severity = LLVMGetDiagInfoSeverity(di);
4509 char *description = LLVMGetDiagInfoDescription(di);
4510
4511 if (severity == LLVMDSError) {
4512 *retval = 1;
4513 fprintf(stderr, "LLVM triggered Diagnostic Handler: %s\n",
4514 description);
4515 }
4516
4517 LLVMDisposeMessage(description);
4518 }
4519
4520 static unsigned ac_llvm_compile(LLVMModuleRef M,
4521 struct ac_shader_binary *binary,
4522 LLVMTargetMachineRef tm)
4523 {
4524 unsigned retval = 0;
4525 char *err;
4526 LLVMContextRef llvm_ctx;
4527 LLVMMemoryBufferRef out_buffer;
4528 unsigned buffer_size;
4529 const char *buffer_data;
4530 LLVMBool mem_err;
4531
4532 /* Setup Diagnostic Handler*/
4533 llvm_ctx = LLVMGetModuleContext(M);
4534
4535 LLVMContextSetDiagnosticHandler(llvm_ctx, ac_diagnostic_handler,
4536 &retval);
4537
4538 /* Compile IR*/
4539 mem_err = LLVMTargetMachineEmitToMemoryBuffer(tm, M, LLVMObjectFile,
4540 &err, &out_buffer);
4541
4542 /* Process Errors/Warnings */
4543 if (mem_err) {
4544 fprintf(stderr, "%s: %s", __FUNCTION__, err);
4545 free(err);
4546 retval = 1;
4547 goto out;
4548 }
4549
4550 /* Extract Shader Code*/
4551 buffer_size = LLVMGetBufferSize(out_buffer);
4552 buffer_data = LLVMGetBufferStart(out_buffer);
4553
4554 ac_elf_read(buffer_data, buffer_size, binary);
4555
4556 /* Clean up */
4557 LLVMDisposeMemoryBuffer(out_buffer);
4558
4559 out:
4560 return retval;
4561 }
4562
4563 static void ac_compile_llvm_module(LLVMTargetMachineRef tm,
4564 LLVMModuleRef llvm_module,
4565 struct ac_shader_binary *binary,
4566 struct ac_shader_config *config,
4567 struct ac_shader_variant_info *shader_info,
4568 gl_shader_stage stage,
4569 bool dump_shader)
4570 {
4571 if (dump_shader)
4572 LLVMDumpModule(llvm_module);
4573
4574 memset(binary, 0, sizeof(*binary));
4575 int v = ac_llvm_compile(llvm_module, binary, tm);
4576 if (v) {
4577 fprintf(stderr, "compile failed\n");
4578 }
4579
4580 if (dump_shader)
4581 fprintf(stderr, "disasm:\n%s\n", binary->disasm_string);
4582
4583 ac_shader_binary_read_config(binary, config, 0);
4584
4585 LLVMContextRef ctx = LLVMGetModuleContext(llvm_module);
4586 LLVMDisposeModule(llvm_module);
4587 LLVMContextDispose(ctx);
4588
4589 if (stage == MESA_SHADER_FRAGMENT) {
4590 shader_info->num_input_vgprs = 0;
4591 if (G_0286CC_PERSP_SAMPLE_ENA(config->spi_ps_input_addr))
4592 shader_info->num_input_vgprs += 2;
4593 if (G_0286CC_PERSP_CENTER_ENA(config->spi_ps_input_addr))
4594 shader_info->num_input_vgprs += 2;
4595 if (G_0286CC_PERSP_CENTROID_ENA(config->spi_ps_input_addr))
4596 shader_info->num_input_vgprs += 2;
4597 if (G_0286CC_PERSP_PULL_MODEL_ENA(config->spi_ps_input_addr))
4598 shader_info->num_input_vgprs += 3;
4599 if (G_0286CC_LINEAR_SAMPLE_ENA(config->spi_ps_input_addr))
4600 shader_info->num_input_vgprs += 2;
4601 if (G_0286CC_LINEAR_CENTER_ENA(config->spi_ps_input_addr))
4602 shader_info->num_input_vgprs += 2;
4603 if (G_0286CC_LINEAR_CENTROID_ENA(config->spi_ps_input_addr))
4604 shader_info->num_input_vgprs += 2;
4605 if (G_0286CC_LINE_STIPPLE_TEX_ENA(config->spi_ps_input_addr))
4606 shader_info->num_input_vgprs += 1;
4607 if (G_0286CC_POS_X_FLOAT_ENA(config->spi_ps_input_addr))
4608 shader_info->num_input_vgprs += 1;
4609 if (G_0286CC_POS_Y_FLOAT_ENA(config->spi_ps_input_addr))
4610 shader_info->num_input_vgprs += 1;
4611 if (G_0286CC_POS_Z_FLOAT_ENA(config->spi_ps_input_addr))
4612 shader_info->num_input_vgprs += 1;
4613 if (G_0286CC_POS_W_FLOAT_ENA(config->spi_ps_input_addr))
4614 shader_info->num_input_vgprs += 1;
4615 if (G_0286CC_FRONT_FACE_ENA(config->spi_ps_input_addr))
4616 shader_info->num_input_vgprs += 1;
4617 if (G_0286CC_ANCILLARY_ENA(config->spi_ps_input_addr))
4618 shader_info->num_input_vgprs += 1;
4619 if (G_0286CC_SAMPLE_COVERAGE_ENA(config->spi_ps_input_addr))
4620 shader_info->num_input_vgprs += 1;
4621 if (G_0286CC_POS_FIXED_PT_ENA(config->spi_ps_input_addr))
4622 shader_info->num_input_vgprs += 1;
4623 }
4624 config->num_vgprs = MAX2(config->num_vgprs, shader_info->num_input_vgprs);
4625
4626 /* +3 for scratch wave offset and VCC */
4627 config->num_sgprs = MAX2(config->num_sgprs,
4628 shader_info->num_input_sgprs + 3);
4629 }
4630
4631 void ac_compile_nir_shader(LLVMTargetMachineRef tm,
4632 struct ac_shader_binary *binary,
4633 struct ac_shader_config *config,
4634 struct ac_shader_variant_info *shader_info,
4635 struct nir_shader *nir,
4636 const struct ac_nir_compiler_options *options,
4637 bool dump_shader)
4638 {
4639
4640 LLVMModuleRef llvm_module = ac_translate_nir_to_llvm(tm, nir, shader_info,
4641 options);
4642
4643 ac_compile_llvm_module(tm, llvm_module, binary, config, shader_info, nir->stage, dump_shader);
4644 switch (nir->stage) {
4645 case MESA_SHADER_COMPUTE:
4646 for (int i = 0; i < 3; ++i)
4647 shader_info->cs.block_size[i] = nir->info->cs.local_size[i];
4648 break;
4649 case MESA_SHADER_FRAGMENT:
4650 shader_info->fs.early_fragment_test = nir->info->fs.early_fragment_tests;
4651 break;
4652 default:
4653 break;
4654 }
4655 }