2 * Copyright © 2016 Bas Nieuwenhuizen
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
24 #include "ac_nir_to_llvm.h"
25 #include "ac_llvm_build.h"
26 #include "ac_llvm_util.h"
27 #include "ac_binary.h"
30 #include "../vulkan/radv_descriptor_set.h"
31 #include "util/bitscan.h"
32 #include <llvm-c/Transforms/Scalar.h>
33 #include "ac_shader_abi.h"
34 #include "ac_shader_info.h"
35 #include "ac_exp_param.h"
37 enum radeon_llvm_calling_convention
{
38 RADEON_LLVM_AMDGPU_VS
= 87,
39 RADEON_LLVM_AMDGPU_GS
= 88,
40 RADEON_LLVM_AMDGPU_PS
= 89,
41 RADEON_LLVM_AMDGPU_CS
= 90,
44 #define CONST_ADDR_SPACE 2
45 #define LOCAL_ADDR_SPACE 3
47 #define RADEON_LLVM_MAX_INPUTS (VARYING_SLOT_VAR31 + 1)
48 #define RADEON_LLVM_MAX_OUTPUTS (VARYING_SLOT_VAR31 + 1)
50 struct nir_to_llvm_context
;
52 struct ac_nir_context
{
53 struct ac_llvm_context ac
;
54 struct ac_shader_abi
*abi
;
56 gl_shader_stage stage
;
58 struct hash_table
*defs
;
59 struct hash_table
*phis
;
60 struct hash_table
*vars
;
62 LLVMValueRef main_function
;
63 LLVMBasicBlockRef continue_block
;
64 LLVMBasicBlockRef break_block
;
66 LLVMValueRef outputs
[RADEON_LLVM_MAX_OUTPUTS
* 4];
71 struct nir_to_llvm_context
*nctx
; /* TODO get rid of this */
74 struct nir_to_llvm_context
{
75 struct ac_llvm_context ac
;
76 const struct ac_nir_compiler_options
*options
;
77 struct ac_shader_variant_info
*shader_info
;
78 struct ac_shader_abi abi
;
79 struct ac_nir_context
*nir
;
81 unsigned max_workgroup_size
;
82 LLVMContextRef context
;
84 LLVMBuilderRef builder
;
85 LLVMValueRef main_function
;
87 struct hash_table
*defs
;
88 struct hash_table
*phis
;
90 LLVMValueRef descriptor_sets
[AC_UD_MAX_SETS
];
91 LLVMValueRef ring_offsets
;
92 LLVMValueRef push_constants
;
93 LLVMValueRef num_work_groups
;
94 LLVMValueRef workgroup_ids
;
95 LLVMValueRef local_invocation_ids
;
98 LLVMValueRef vertex_buffers
;
99 LLVMValueRef rel_auto_id
;
100 LLVMValueRef vs_prim_id
;
101 LLVMValueRef ls_out_layout
;
102 LLVMValueRef es2gs_offset
;
104 LLVMValueRef tcs_offchip_layout
;
105 LLVMValueRef tcs_out_offsets
;
106 LLVMValueRef tcs_out_layout
;
107 LLVMValueRef tcs_in_layout
;
109 LLVMValueRef tess_factor_offset
;
110 LLVMValueRef tcs_patch_id
;
111 LLVMValueRef tcs_rel_ids
;
112 LLVMValueRef tes_rel_patch_id
;
113 LLVMValueRef tes_patch_id
;
117 LLVMValueRef gsvs_ring_stride
;
118 LLVMValueRef gsvs_num_entries
;
119 LLVMValueRef gs2vs_offset
;
120 LLVMValueRef gs_wave_id
;
121 LLVMValueRef gs_vtx_offset
[6];
122 LLVMValueRef gs_prim_id
, gs_invocation_id
;
124 LLVMValueRef esgs_ring
;
125 LLVMValueRef gsvs_ring
;
126 LLVMValueRef hs_ring_tess_offchip
;
127 LLVMValueRef hs_ring_tess_factor
;
129 LLVMValueRef prim_mask
;
130 LLVMValueRef sample_pos_offset
;
131 LLVMValueRef persp_sample
, persp_center
, persp_centroid
;
132 LLVMValueRef linear_sample
, linear_center
, linear_centroid
;
151 LLVMValueRef i1false
;
152 LLVMValueRef i32zero
;
154 LLVMValueRef f32zero
;
156 LLVMValueRef v4f32empty
;
158 unsigned uniform_md_kind
;
159 LLVMValueRef empty_md
;
160 gl_shader_stage stage
;
163 LLVMValueRef inputs
[RADEON_LLVM_MAX_INPUTS
* 4];
166 uint64_t output_mask
;
167 uint8_t num_output_clips
;
168 uint8_t num_output_culls
;
170 bool is_gs_copy_shader
;
171 LLVMValueRef gs_next_vertex
;
172 unsigned gs_max_out_vertices
;
174 unsigned tes_primitive_mode
;
175 uint64_t tess_outputs_written
;
176 uint64_t tess_patch_outputs_written
;
179 static inline struct nir_to_llvm_context
*
180 nir_to_llvm_context_from_abi(struct ac_shader_abi
*abi
)
182 struct nir_to_llvm_context
*ctx
= NULL
;
183 return container_of(abi
, ctx
, abi
);
186 static LLVMValueRef
get_sampler_desc(struct ac_nir_context
*ctx
,
187 const nir_deref_var
*deref
,
188 enum ac_descriptor_type desc_type
,
189 bool image
, bool write
);
191 static unsigned radeon_llvm_reg_index_soa(unsigned index
, unsigned chan
)
193 return (index
* 4) + chan
;
196 static unsigned shader_io_get_unique_index(gl_varying_slot slot
)
198 /* handle patch indices separate */
199 if (slot
== VARYING_SLOT_TESS_LEVEL_OUTER
)
201 if (slot
== VARYING_SLOT_TESS_LEVEL_INNER
)
203 if (slot
>= VARYING_SLOT_PATCH0
&& slot
<= VARYING_SLOT_TESS_MAX
)
204 return 2 + (slot
- VARYING_SLOT_PATCH0
);
206 if (slot
== VARYING_SLOT_POS
)
208 if (slot
== VARYING_SLOT_PSIZ
)
210 if (slot
== VARYING_SLOT_CLIP_DIST0
)
212 /* 3 is reserved for clip dist as well */
213 if (slot
>= VARYING_SLOT_VAR0
&& slot
<= VARYING_SLOT_VAR31
)
214 return 4 + (slot
- VARYING_SLOT_VAR0
);
215 unreachable("illegal slot in get unique index\n");
218 static unsigned llvm_get_type_size(LLVMTypeRef type
)
220 LLVMTypeKind kind
= LLVMGetTypeKind(type
);
223 case LLVMIntegerTypeKind
:
224 return LLVMGetIntTypeWidth(type
) / 8;
225 case LLVMFloatTypeKind
:
227 case LLVMPointerTypeKind
:
229 case LLVMVectorTypeKind
:
230 return LLVMGetVectorSize(type
) *
231 llvm_get_type_size(LLVMGetElementType(type
));
238 static void set_llvm_calling_convention(LLVMValueRef func
,
239 gl_shader_stage stage
)
241 enum radeon_llvm_calling_convention calling_conv
;
244 case MESA_SHADER_VERTEX
:
245 case MESA_SHADER_TESS_CTRL
:
246 case MESA_SHADER_TESS_EVAL
:
247 calling_conv
= RADEON_LLVM_AMDGPU_VS
;
249 case MESA_SHADER_GEOMETRY
:
250 calling_conv
= RADEON_LLVM_AMDGPU_GS
;
252 case MESA_SHADER_FRAGMENT
:
253 calling_conv
= RADEON_LLVM_AMDGPU_PS
;
255 case MESA_SHADER_COMPUTE
:
256 calling_conv
= RADEON_LLVM_AMDGPU_CS
;
259 unreachable("Unhandle shader type");
262 LLVMSetFunctionCallConv(func
, calling_conv
);
267 LLVMTypeRef types
[MAX_ARGS
];
268 LLVMValueRef
*assign
[MAX_ARGS
];
269 unsigned array_params_mask
;
271 uint8_t user_sgpr_count
;
273 uint8_t num_user_sgprs_used
;
274 uint8_t num_sgprs_used
;
275 uint8_t num_vgprs_used
;
279 add_argument(struct arg_info
*info
,
280 LLVMTypeRef type
, LLVMValueRef
*param_ptr
)
282 assert(info
->count
< MAX_ARGS
);
283 info
->assign
[info
->count
] = param_ptr
;
284 info
->types
[info
->count
] = type
;
289 add_sgpr_argument(struct arg_info
*info
,
290 LLVMTypeRef type
, LLVMValueRef
*param_ptr
)
292 add_argument(info
, type
, param_ptr
);
293 info
->num_sgprs_used
+= llvm_get_type_size(type
) / 4;
298 add_user_sgpr_argument(struct arg_info
*info
,
300 LLVMValueRef
*param_ptr
)
302 add_sgpr_argument(info
, type
, param_ptr
);
303 info
->num_user_sgprs_used
+= llvm_get_type_size(type
) / 4;
304 info
->user_sgpr_count
++;
308 add_vgpr_argument(struct arg_info
*info
,
310 LLVMValueRef
*param_ptr
)
312 add_argument(info
, type
, param_ptr
);
313 info
->num_vgprs_used
+= llvm_get_type_size(type
) / 4;
317 add_user_sgpr_array_argument(struct arg_info
*info
,
319 LLVMValueRef
*param_ptr
)
321 info
->array_params_mask
|= (1 << info
->count
);
322 add_user_sgpr_argument(info
, type
, param_ptr
);
325 static void assign_arguments(LLVMValueRef main_function
,
326 struct arg_info
*info
)
329 for (i
= 0; i
< info
->count
; i
++) {
331 *info
->assign
[i
] = LLVMGetParam(main_function
, i
);
336 create_llvm_function(LLVMContextRef ctx
, LLVMModuleRef module
,
337 LLVMBuilderRef builder
, LLVMTypeRef
*return_types
,
338 unsigned num_return_elems
,
339 struct arg_info
*args
,
340 unsigned max_workgroup_size
,
343 LLVMTypeRef main_function_type
, ret_type
;
344 LLVMBasicBlockRef main_function_body
;
346 if (num_return_elems
)
347 ret_type
= LLVMStructTypeInContext(ctx
, return_types
,
348 num_return_elems
, true);
350 ret_type
= LLVMVoidTypeInContext(ctx
);
352 /* Setup the function */
354 LLVMFunctionType(ret_type
, args
->types
, args
->count
, 0);
355 LLVMValueRef main_function
=
356 LLVMAddFunction(module
, "main", main_function_type
);
358 LLVMAppendBasicBlockInContext(ctx
, main_function
, "main_body");
359 LLVMPositionBuilderAtEnd(builder
, main_function_body
);
361 LLVMSetFunctionCallConv(main_function
, RADEON_LLVM_AMDGPU_CS
);
362 for (unsigned i
= 0; i
< args
->sgpr_count
; ++i
) {
363 if (args
->array_params_mask
& (1 << i
)) {
364 LLVMValueRef P
= LLVMGetParam(main_function
, i
);
365 ac_add_function_attr(ctx
, main_function
, i
+ 1, AC_FUNC_ATTR_BYVAL
);
366 ac_add_attr_dereferenceable(P
, UINT64_MAX
);
369 ac_add_function_attr(ctx
, main_function
, i
+ 1, AC_FUNC_ATTR_INREG
);
373 if (max_workgroup_size
) {
374 ac_llvm_add_target_dep_function_attr(main_function
,
375 "amdgpu-max-work-group-size",
379 /* These were copied from some LLVM test. */
380 LLVMAddTargetDependentFunctionAttr(main_function
,
381 "less-precise-fpmad",
383 LLVMAddTargetDependentFunctionAttr(main_function
,
386 LLVMAddTargetDependentFunctionAttr(main_function
,
389 LLVMAddTargetDependentFunctionAttr(main_function
,
393 return main_function
;
396 static LLVMTypeRef
const_array(LLVMTypeRef elem_type
, int num_elements
)
398 return LLVMPointerType(LLVMArrayType(elem_type
, num_elements
),
402 static LLVMTypeRef
to_integer_type_scalar(struct ac_llvm_context
*ctx
, LLVMTypeRef t
)
404 if (t
== ctx
->f16
|| t
== ctx
->i16
)
406 else if (t
== ctx
->f32
|| t
== ctx
->i32
)
408 else if (t
== ctx
->f64
|| t
== ctx
->i64
)
411 unreachable("Unhandled integer size");
414 static LLVMTypeRef
to_integer_type(struct ac_llvm_context
*ctx
, LLVMTypeRef t
)
416 if (LLVMGetTypeKind(t
) == LLVMVectorTypeKind
) {
417 LLVMTypeRef elem_type
= LLVMGetElementType(t
);
418 return LLVMVectorType(to_integer_type_scalar(ctx
, elem_type
),
419 LLVMGetVectorSize(t
));
421 return to_integer_type_scalar(ctx
, t
);
424 static LLVMValueRef
to_integer(struct ac_llvm_context
*ctx
, LLVMValueRef v
)
426 LLVMTypeRef type
= LLVMTypeOf(v
);
427 return LLVMBuildBitCast(ctx
->builder
, v
, to_integer_type(ctx
, type
), "");
430 static LLVMTypeRef
to_float_type_scalar(struct ac_llvm_context
*ctx
, LLVMTypeRef t
)
432 if (t
== ctx
->i16
|| t
== ctx
->f16
)
434 else if (t
== ctx
->i32
|| t
== ctx
->f32
)
436 else if (t
== ctx
->i64
|| t
== ctx
->f64
)
439 unreachable("Unhandled float size");
442 static LLVMTypeRef
to_float_type(struct ac_llvm_context
*ctx
, LLVMTypeRef t
)
444 if (LLVMGetTypeKind(t
) == LLVMVectorTypeKind
) {
445 LLVMTypeRef elem_type
= LLVMGetElementType(t
);
446 return LLVMVectorType(to_float_type_scalar(ctx
, elem_type
),
447 LLVMGetVectorSize(t
));
449 return to_float_type_scalar(ctx
, t
);
452 static LLVMValueRef
to_float(struct ac_llvm_context
*ctx
, LLVMValueRef v
)
454 LLVMTypeRef type
= LLVMTypeOf(v
);
455 return LLVMBuildBitCast(ctx
->builder
, v
, to_float_type(ctx
, type
), "");
458 static int get_elem_bits(struct ac_llvm_context
*ctx
, LLVMTypeRef type
)
460 if (LLVMGetTypeKind(type
) == LLVMVectorTypeKind
)
461 type
= LLVMGetElementType(type
);
463 if (LLVMGetTypeKind(type
) == LLVMIntegerTypeKind
)
464 return LLVMGetIntTypeWidth(type
);
466 if (type
== ctx
->f16
)
468 if (type
== ctx
->f32
)
470 if (type
== ctx
->f64
)
473 unreachable("Unhandled type kind in get_elem_bits");
476 static LLVMValueRef
unpack_param(struct ac_llvm_context
*ctx
,
477 LLVMValueRef param
, unsigned rshift
,
480 LLVMValueRef value
= param
;
482 value
= LLVMBuildLShr(ctx
->builder
, value
,
483 LLVMConstInt(ctx
->i32
, rshift
, false), "");
485 if (rshift
+ bitwidth
< 32) {
486 unsigned mask
= (1 << bitwidth
) - 1;
487 value
= LLVMBuildAnd(ctx
->builder
, value
,
488 LLVMConstInt(ctx
->i32
, mask
, false), "");
493 static LLVMValueRef
get_rel_patch_id(struct nir_to_llvm_context
*ctx
)
495 switch (ctx
->stage
) {
496 case MESA_SHADER_TESS_CTRL
:
497 return unpack_param(&ctx
->ac
, ctx
->tcs_rel_ids
, 0, 8);
498 case MESA_SHADER_TESS_EVAL
:
499 return ctx
->tes_rel_patch_id
;
502 unreachable("Illegal stage");
506 /* Tessellation shaders pass outputs to the next shader using LDS.
508 * LS outputs = TCS inputs
509 * TCS outputs = TES inputs
512 * - TCS inputs for patch 0
513 * - TCS inputs for patch 1
514 * - TCS inputs for patch 2 = get_tcs_in_current_patch_offset (if RelPatchID==2)
516 * - TCS outputs for patch 0 = get_tcs_out_patch0_offset
517 * - Per-patch TCS outputs for patch 0 = get_tcs_out_patch0_patch_data_offset
518 * - TCS outputs for patch 1
519 * - Per-patch TCS outputs for patch 1
520 * - TCS outputs for patch 2 = get_tcs_out_current_patch_offset (if RelPatchID==2)
521 * - Per-patch TCS outputs for patch 2 = get_tcs_out_current_patch_data_offset (if RelPatchID==2)
524 * All three shaders VS(LS), TCS, TES share the same LDS space.
527 get_tcs_in_patch_stride(struct nir_to_llvm_context
*ctx
)
529 if (ctx
->stage
== MESA_SHADER_VERTEX
)
530 return unpack_param(&ctx
->ac
, ctx
->ls_out_layout
, 0, 13);
531 else if (ctx
->stage
== MESA_SHADER_TESS_CTRL
)
532 return unpack_param(&ctx
->ac
, ctx
->tcs_in_layout
, 0, 13);
540 get_tcs_out_patch_stride(struct nir_to_llvm_context
*ctx
)
542 return unpack_param(&ctx
->ac
, ctx
->tcs_out_layout
, 0, 13);
546 get_tcs_out_patch0_offset(struct nir_to_llvm_context
*ctx
)
548 return LLVMBuildMul(ctx
->builder
,
549 unpack_param(&ctx
->ac
, ctx
->tcs_out_offsets
, 0, 16),
550 LLVMConstInt(ctx
->i32
, 4, false), "");
554 get_tcs_out_patch0_patch_data_offset(struct nir_to_llvm_context
*ctx
)
556 return LLVMBuildMul(ctx
->builder
,
557 unpack_param(&ctx
->ac
, ctx
->tcs_out_offsets
, 16, 16),
558 LLVMConstInt(ctx
->i32
, 4, false), "");
562 get_tcs_in_current_patch_offset(struct nir_to_llvm_context
*ctx
)
564 LLVMValueRef patch_stride
= get_tcs_in_patch_stride(ctx
);
565 LLVMValueRef rel_patch_id
= get_rel_patch_id(ctx
);
567 return LLVMBuildMul(ctx
->builder
, patch_stride
, rel_patch_id
, "");
571 get_tcs_out_current_patch_offset(struct nir_to_llvm_context
*ctx
)
573 LLVMValueRef patch0_offset
= get_tcs_out_patch0_offset(ctx
);
574 LLVMValueRef patch_stride
= get_tcs_out_patch_stride(ctx
);
575 LLVMValueRef rel_patch_id
= get_rel_patch_id(ctx
);
577 return LLVMBuildAdd(ctx
->builder
, patch0_offset
,
578 LLVMBuildMul(ctx
->builder
, patch_stride
,
584 get_tcs_out_current_patch_data_offset(struct nir_to_llvm_context
*ctx
)
586 LLVMValueRef patch0_patch_data_offset
=
587 get_tcs_out_patch0_patch_data_offset(ctx
);
588 LLVMValueRef patch_stride
= get_tcs_out_patch_stride(ctx
);
589 LLVMValueRef rel_patch_id
= get_rel_patch_id(ctx
);
591 return LLVMBuildAdd(ctx
->builder
, patch0_patch_data_offset
,
592 LLVMBuildMul(ctx
->builder
, patch_stride
,
597 static void set_userdata_location(struct ac_userdata_info
*ud_info
, uint8_t *sgpr_idx
, uint8_t num_sgprs
)
599 ud_info
->sgpr_idx
= *sgpr_idx
;
600 ud_info
->num_sgprs
= num_sgprs
;
601 ud_info
->indirect
= false;
602 ud_info
->indirect_offset
= 0;
603 *sgpr_idx
+= num_sgprs
;
606 static void set_userdata_location_shader(struct nir_to_llvm_context
*ctx
,
607 int idx
, uint8_t *sgpr_idx
, uint8_t num_sgprs
)
609 set_userdata_location(&ctx
->shader_info
->user_sgprs_locs
.shader_data
[idx
], sgpr_idx
, num_sgprs
);
613 static void set_userdata_location_indirect(struct ac_userdata_info
*ud_info
, uint8_t sgpr_idx
, uint8_t num_sgprs
,
614 uint32_t indirect_offset
)
616 ud_info
->sgpr_idx
= sgpr_idx
;
617 ud_info
->num_sgprs
= num_sgprs
;
618 ud_info
->indirect
= true;
619 ud_info
->indirect_offset
= indirect_offset
;
622 static void declare_tess_lds(struct nir_to_llvm_context
*ctx
)
624 unsigned lds_size
= ctx
->options
->chip_class
>= CIK
? 65536 : 32768;
625 ctx
->lds
= LLVMBuildIntToPtr(ctx
->builder
, ctx
->i32zero
,
626 LLVMPointerType(LLVMArrayType(ctx
->i32
, lds_size
/ 4), LOCAL_ADDR_SPACE
),
630 struct user_sgpr_info
{
631 bool need_ring_offsets
;
633 bool indirect_all_descriptor_sets
;
636 static void allocate_user_sgprs(struct nir_to_llvm_context
*ctx
,
637 struct user_sgpr_info
*user_sgpr_info
)
639 memset(user_sgpr_info
, 0, sizeof(struct user_sgpr_info
));
641 /* until we sort out scratch/global buffers always assign ring offsets for gs/vs/es */
642 if (ctx
->stage
== MESA_SHADER_GEOMETRY
||
643 ctx
->stage
== MESA_SHADER_VERTEX
||
644 ctx
->stage
== MESA_SHADER_TESS_CTRL
||
645 ctx
->stage
== MESA_SHADER_TESS_EVAL
||
646 ctx
->is_gs_copy_shader
)
647 user_sgpr_info
->need_ring_offsets
= true;
649 if (ctx
->stage
== MESA_SHADER_FRAGMENT
&&
650 ctx
->shader_info
->info
.ps
.needs_sample_positions
)
651 user_sgpr_info
->need_ring_offsets
= true;
653 /* 2 user sgprs will nearly always be allocated for scratch/rings */
654 if (ctx
->options
->supports_spill
|| user_sgpr_info
->need_ring_offsets
) {
655 user_sgpr_info
->sgpr_count
+= 2;
658 switch (ctx
->stage
) {
659 case MESA_SHADER_COMPUTE
:
660 user_sgpr_info
->sgpr_count
+= ctx
->shader_info
->info
.cs
.grid_components_used
;
662 case MESA_SHADER_FRAGMENT
:
663 user_sgpr_info
->sgpr_count
+= ctx
->shader_info
->info
.ps
.needs_sample_positions
;
665 case MESA_SHADER_VERTEX
:
666 if (!ctx
->is_gs_copy_shader
) {
667 user_sgpr_info
->sgpr_count
+= ctx
->shader_info
->info
.vs
.has_vertex_buffers
? 2 : 0;
668 if (ctx
->shader_info
->info
.vs
.needs_draw_id
) {
669 user_sgpr_info
->sgpr_count
+= 3;
671 user_sgpr_info
->sgpr_count
+= 2;
674 if (ctx
->options
->key
.vs
.as_ls
)
675 user_sgpr_info
->sgpr_count
++;
677 case MESA_SHADER_TESS_CTRL
:
678 user_sgpr_info
->sgpr_count
+= 4;
680 case MESA_SHADER_TESS_EVAL
:
681 user_sgpr_info
->sgpr_count
+= 1;
683 case MESA_SHADER_GEOMETRY
:
684 user_sgpr_info
->sgpr_count
+= 2;
690 if (ctx
->shader_info
->info
.needs_push_constants
)
691 user_sgpr_info
->sgpr_count
+= 2;
693 uint32_t remaining_sgprs
= 16 - user_sgpr_info
->sgpr_count
;
694 if (remaining_sgprs
/ 2 < util_bitcount(ctx
->shader_info
->info
.desc_set_used_mask
)) {
695 user_sgpr_info
->sgpr_count
+= 2;
696 user_sgpr_info
->indirect_all_descriptor_sets
= true;
698 user_sgpr_info
->sgpr_count
+= util_bitcount(ctx
->shader_info
->info
.desc_set_used_mask
) * 2;
702 static void create_function(struct nir_to_llvm_context
*ctx
)
704 unsigned num_sets
= ctx
->options
->layout
? ctx
->options
->layout
->num_sets
: 0;
705 uint8_t user_sgpr_idx
;
706 struct user_sgpr_info user_sgpr_info
;
707 struct arg_info args
= {};
708 LLVMValueRef desc_sets
;
710 allocate_user_sgprs(ctx
, &user_sgpr_info
);
711 if (user_sgpr_info
.need_ring_offsets
&& !ctx
->options
->supports_spill
) {
712 add_user_sgpr_argument(&args
, const_array(ctx
->v4i32
, 16), &ctx
->ring_offsets
); /* address of rings */
715 /* 1 for each descriptor set */
716 if (!user_sgpr_info
.indirect_all_descriptor_sets
) {
717 for (unsigned i
= 0; i
< num_sets
; ++i
) {
718 if (ctx
->options
->layout
->set
[i
].layout
->shader_stages
& (1 << ctx
->stage
)) {
719 add_user_sgpr_array_argument(&args
, const_array(ctx
->i8
, 1024 * 1024), &ctx
->descriptor_sets
[i
]);
723 add_user_sgpr_array_argument(&args
, const_array(const_array(ctx
->i8
, 1024 * 1024), 32), &desc_sets
);
725 if (ctx
->shader_info
->info
.needs_push_constants
) {
726 /* 1 for push constants and dynamic descriptors */
727 add_user_sgpr_array_argument(&args
, const_array(ctx
->i8
, 1024 * 1024), &ctx
->push_constants
);
730 switch (ctx
->stage
) {
731 case MESA_SHADER_COMPUTE
:
732 if (ctx
->shader_info
->info
.cs
.grid_components_used
)
733 add_user_sgpr_argument(&args
, LLVMVectorType(ctx
->i32
, ctx
->shader_info
->info
.cs
.grid_components_used
), &ctx
->num_work_groups
); /* grid size */
734 add_sgpr_argument(&args
, LLVMVectorType(ctx
->i32
, 3), &ctx
->workgroup_ids
);
735 add_sgpr_argument(&args
, ctx
->i32
, &ctx
->tg_size
);
736 add_vgpr_argument(&args
, LLVMVectorType(ctx
->i32
, 3), &ctx
->local_invocation_ids
);
738 case MESA_SHADER_VERTEX
:
739 if (!ctx
->is_gs_copy_shader
) {
740 if (ctx
->shader_info
->info
.vs
.has_vertex_buffers
)
741 add_user_sgpr_argument(&args
, const_array(ctx
->v4i32
, 16), &ctx
->vertex_buffers
); /* vertex buffers */
742 add_user_sgpr_argument(&args
, ctx
->i32
, &ctx
->abi
.base_vertex
); // base vertex
743 add_user_sgpr_argument(&args
, ctx
->i32
, &ctx
->abi
.start_instance
);// start instance
744 if (ctx
->shader_info
->info
.vs
.needs_draw_id
)
745 add_user_sgpr_argument(&args
, ctx
->i32
, &ctx
->abi
.draw_id
); // draw id
747 if (ctx
->options
->key
.vs
.as_es
)
748 add_sgpr_argument(&args
, ctx
->i32
, &ctx
->es2gs_offset
); // es2gs offset
749 else if (ctx
->options
->key
.vs
.as_ls
)
750 add_user_sgpr_argument(&args
, ctx
->i32
, &ctx
->ls_out_layout
); // ls out layout
751 add_vgpr_argument(&args
, ctx
->i32
, &ctx
->abi
.vertex_id
); // vertex id
752 if (!ctx
->is_gs_copy_shader
) {
753 add_vgpr_argument(&args
, ctx
->i32
, &ctx
->rel_auto_id
); // rel auto id
754 add_vgpr_argument(&args
, ctx
->i32
, &ctx
->vs_prim_id
); // vs prim id
755 add_vgpr_argument(&args
, ctx
->i32
, &ctx
->abi
.instance_id
); // instance id
758 case MESA_SHADER_TESS_CTRL
:
759 add_user_sgpr_argument(&args
, ctx
->i32
, &ctx
->tcs_offchip_layout
); // tcs offchip layout
760 add_user_sgpr_argument(&args
, ctx
->i32
, &ctx
->tcs_out_offsets
); // tcs out offsets
761 add_user_sgpr_argument(&args
, ctx
->i32
, &ctx
->tcs_out_layout
); // tcs out layout
762 add_user_sgpr_argument(&args
, ctx
->i32
, &ctx
->tcs_in_layout
); // tcs in layout
763 add_sgpr_argument(&args
, ctx
->i32
, &ctx
->oc_lds
); // param oc lds
764 add_sgpr_argument(&args
, ctx
->i32
, &ctx
->tess_factor_offset
); // tess factor offset
765 add_vgpr_argument(&args
, ctx
->i32
, &ctx
->tcs_patch_id
); // patch id
766 add_vgpr_argument(&args
, ctx
->i32
, &ctx
->tcs_rel_ids
); // rel ids;
768 case MESA_SHADER_TESS_EVAL
:
769 add_user_sgpr_argument(&args
, ctx
->i32
, &ctx
->tcs_offchip_layout
); // tcs offchip layout
770 if (ctx
->options
->key
.tes
.as_es
) {
771 add_sgpr_argument(&args
, ctx
->i32
, &ctx
->oc_lds
); // OC LDS
772 add_sgpr_argument(&args
, ctx
->i32
, NULL
); //
773 add_sgpr_argument(&args
, ctx
->i32
, &ctx
->es2gs_offset
); // es2gs offset
775 add_sgpr_argument(&args
, ctx
->i32
, NULL
); //
776 add_sgpr_argument(&args
, ctx
->i32
, &ctx
->oc_lds
); // OC LDS
778 add_vgpr_argument(&args
, ctx
->f32
, &ctx
->tes_u
); // tes_u
779 add_vgpr_argument(&args
, ctx
->f32
, &ctx
->tes_v
); // tes_v
780 add_vgpr_argument(&args
, ctx
->i32
, &ctx
->tes_rel_patch_id
); // tes rel patch id
781 add_vgpr_argument(&args
, ctx
->i32
, &ctx
->tes_patch_id
); // tes patch id
783 case MESA_SHADER_GEOMETRY
:
784 add_user_sgpr_argument(&args
, ctx
->i32
, &ctx
->gsvs_ring_stride
); // gsvs stride
785 add_user_sgpr_argument(&args
, ctx
->i32
, &ctx
->gsvs_num_entries
); // gsvs num entires
786 add_sgpr_argument(&args
, ctx
->i32
, &ctx
->gs2vs_offset
); // gs2vs offset
787 add_sgpr_argument(&args
, ctx
->i32
, &ctx
->gs_wave_id
); // wave id
788 add_vgpr_argument(&args
, ctx
->i32
, &ctx
->gs_vtx_offset
[0]); // vtx0
789 add_vgpr_argument(&args
, ctx
->i32
, &ctx
->gs_vtx_offset
[1]); // vtx1
790 add_vgpr_argument(&args
, ctx
->i32
, &ctx
->gs_prim_id
); // prim id
791 add_vgpr_argument(&args
, ctx
->i32
, &ctx
->gs_vtx_offset
[2]);
792 add_vgpr_argument(&args
, ctx
->i32
, &ctx
->gs_vtx_offset
[3]);
793 add_vgpr_argument(&args
, ctx
->i32
, &ctx
->gs_vtx_offset
[4]);
794 add_vgpr_argument(&args
, ctx
->i32
, &ctx
->gs_vtx_offset
[5]);
795 add_vgpr_argument(&args
, ctx
->i32
, &ctx
->gs_invocation_id
);
797 case MESA_SHADER_FRAGMENT
:
798 if (ctx
->shader_info
->info
.ps
.needs_sample_positions
)
799 add_user_sgpr_argument(&args
, ctx
->i32
, &ctx
->sample_pos_offset
); /* sample position offset */
800 add_sgpr_argument(&args
, ctx
->i32
, &ctx
->prim_mask
); /* prim mask */
801 add_vgpr_argument(&args
, ctx
->v2i32
, &ctx
->persp_sample
); /* persp sample */
802 add_vgpr_argument(&args
, ctx
->v2i32
, &ctx
->persp_center
); /* persp center */
803 add_vgpr_argument(&args
, ctx
->v2i32
, &ctx
->persp_centroid
); /* persp centroid */
804 add_vgpr_argument(&args
, ctx
->v3i32
, NULL
); /* persp pull model */
805 add_vgpr_argument(&args
, ctx
->v2i32
, &ctx
->linear_sample
); /* linear sample */
806 add_vgpr_argument(&args
, ctx
->v2i32
, &ctx
->linear_center
); /* linear center */
807 add_vgpr_argument(&args
, ctx
->v2i32
, &ctx
->linear_centroid
); /* linear centroid */
808 add_vgpr_argument(&args
, ctx
->f32
, NULL
); /* line stipple tex */
809 add_vgpr_argument(&args
, ctx
->f32
, &ctx
->abi
.frag_pos
[0]); /* pos x float */
810 add_vgpr_argument(&args
, ctx
->f32
, &ctx
->abi
.frag_pos
[1]); /* pos y float */
811 add_vgpr_argument(&args
, ctx
->f32
, &ctx
->abi
.frag_pos
[2]); /* pos z float */
812 add_vgpr_argument(&args
, ctx
->f32
, &ctx
->abi
.frag_pos
[3]); /* pos w float */
813 add_vgpr_argument(&args
, ctx
->i32
, &ctx
->abi
.front_face
); /* front face */
814 add_vgpr_argument(&args
, ctx
->i32
, &ctx
->abi
.ancillary
); /* ancillary */
815 add_vgpr_argument(&args
, ctx
->i32
, &ctx
->abi
.sample_coverage
); /* sample coverage */
816 add_vgpr_argument(&args
, ctx
->i32
, NULL
); /* fixed pt */
819 unreachable("Shader stage not implemented");
822 ctx
->main_function
= create_llvm_function(
823 ctx
->context
, ctx
->module
, ctx
->builder
, NULL
, 0, &args
,
824 ctx
->max_workgroup_size
,
825 ctx
->options
->unsafe_math
);
826 set_llvm_calling_convention(ctx
->main_function
, ctx
->stage
);
829 ctx
->shader_info
->num_input_vgprs
= 0;
830 ctx
->shader_info
->num_input_sgprs
= ctx
->shader_info
->num_user_sgprs
=
831 ctx
->options
->supports_spill
? 2 : 0;
833 ctx
->shader_info
->num_user_sgprs
+= args
.num_user_sgprs_used
;
834 ctx
->shader_info
->num_input_sgprs
+= args
.num_sgprs_used
;
836 if (ctx
->stage
!= MESA_SHADER_FRAGMENT
)
837 ctx
->shader_info
->num_input_vgprs
= args
.num_vgprs_used
;
839 assign_arguments(ctx
->main_function
, &args
);
843 if (ctx
->options
->supports_spill
|| user_sgpr_info
.need_ring_offsets
) {
844 set_userdata_location_shader(ctx
, AC_UD_SCRATCH_RING_OFFSETS
, &user_sgpr_idx
, 2);
845 if (ctx
->options
->supports_spill
) {
846 ctx
->ring_offsets
= ac_build_intrinsic(&ctx
->ac
, "llvm.amdgcn.implicit.buffer.ptr",
847 LLVMPointerType(ctx
->i8
, CONST_ADDR_SPACE
),
848 NULL
, 0, AC_FUNC_ATTR_READNONE
);
849 ctx
->ring_offsets
= LLVMBuildBitCast(ctx
->builder
, ctx
->ring_offsets
,
850 const_array(ctx
->v4i32
, 16), "");
854 if (!user_sgpr_info
.indirect_all_descriptor_sets
) {
855 for (unsigned i
= 0; i
< num_sets
; ++i
) {
856 if (ctx
->options
->layout
->set
[i
].layout
->shader_stages
& (1 << ctx
->stage
)) {
857 set_userdata_location(&ctx
->shader_info
->user_sgprs_locs
.descriptor_sets
[i
], &user_sgpr_idx
, 2);
859 ctx
->descriptor_sets
[i
] = NULL
;
862 uint32_t desc_sgpr_idx
= user_sgpr_idx
;
863 set_userdata_location_shader(ctx
, AC_UD_INDIRECT_DESCRIPTOR_SETS
, &user_sgpr_idx
, 2);
865 for (unsigned i
= 0; i
< num_sets
; ++i
) {
866 if (ctx
->options
->layout
->set
[i
].layout
->shader_stages
& (1 << ctx
->stage
)) {
867 set_userdata_location_indirect(&ctx
->shader_info
->user_sgprs_locs
.descriptor_sets
[i
], desc_sgpr_idx
, 2, i
* 8);
868 ctx
->descriptor_sets
[i
] = ac_build_indexed_load_const(&ctx
->ac
, desc_sets
, LLVMConstInt(ctx
->i32
, i
, false));
871 ctx
->descriptor_sets
[i
] = NULL
;
873 ctx
->shader_info
->need_indirect_descriptor_sets
= true;
876 if (ctx
->shader_info
->info
.needs_push_constants
) {
877 set_userdata_location_shader(ctx
, AC_UD_PUSH_CONSTANTS
, &user_sgpr_idx
, 2);
880 switch (ctx
->stage
) {
881 case MESA_SHADER_COMPUTE
:
882 if (ctx
->shader_info
->info
.cs
.grid_components_used
) {
883 set_userdata_location_shader(ctx
, AC_UD_CS_GRID_SIZE
, &user_sgpr_idx
, ctx
->shader_info
->info
.cs
.grid_components_used
);
886 case MESA_SHADER_VERTEX
:
887 if (!ctx
->is_gs_copy_shader
) {
888 if (ctx
->shader_info
->info
.vs
.has_vertex_buffers
) {
889 set_userdata_location_shader(ctx
, AC_UD_VS_VERTEX_BUFFERS
, &user_sgpr_idx
, 2);
892 if (ctx
->shader_info
->info
.vs
.needs_draw_id
)
895 set_userdata_location_shader(ctx
, AC_UD_VS_BASE_VERTEX_START_INSTANCE
, &user_sgpr_idx
, vs_num
);
897 if (ctx
->options
->key
.vs
.as_ls
) {
898 set_userdata_location_shader(ctx
, AC_UD_VS_LS_TCS_IN_LAYOUT
, &user_sgpr_idx
, 1);
900 if (ctx
->options
->key
.vs
.as_ls
)
901 declare_tess_lds(ctx
);
903 case MESA_SHADER_TESS_CTRL
:
904 set_userdata_location_shader(ctx
, AC_UD_TCS_OFFCHIP_LAYOUT
, &user_sgpr_idx
, 4);
905 declare_tess_lds(ctx
);
907 case MESA_SHADER_TESS_EVAL
:
908 set_userdata_location_shader(ctx
, AC_UD_TES_OFFCHIP_LAYOUT
, &user_sgpr_idx
, 1);
910 case MESA_SHADER_GEOMETRY
:
911 set_userdata_location_shader(ctx
, AC_UD_GS_VS_RING_STRIDE_ENTRIES
, &user_sgpr_idx
, 2);
913 case MESA_SHADER_FRAGMENT
:
914 if (ctx
->shader_info
->info
.ps
.needs_sample_positions
) {
915 set_userdata_location_shader(ctx
, AC_UD_PS_SAMPLE_POS_OFFSET
, &user_sgpr_idx
, 1);
919 unreachable("Shader stage not implemented");
923 static void setup_types(struct nir_to_llvm_context
*ctx
)
925 LLVMValueRef args
[4];
927 ctx
->voidt
= LLVMVoidTypeInContext(ctx
->context
);
928 ctx
->i1
= LLVMIntTypeInContext(ctx
->context
, 1);
929 ctx
->i8
= LLVMIntTypeInContext(ctx
->context
, 8);
930 ctx
->i16
= LLVMIntTypeInContext(ctx
->context
, 16);
931 ctx
->i32
= LLVMIntTypeInContext(ctx
->context
, 32);
932 ctx
->i64
= LLVMIntTypeInContext(ctx
->context
, 64);
933 ctx
->v2i32
= LLVMVectorType(ctx
->i32
, 2);
934 ctx
->v3i32
= LLVMVectorType(ctx
->i32
, 3);
935 ctx
->v4i32
= LLVMVectorType(ctx
->i32
, 4);
936 ctx
->v8i32
= LLVMVectorType(ctx
->i32
, 8);
937 ctx
->f32
= LLVMFloatTypeInContext(ctx
->context
);
938 ctx
->f16
= LLVMHalfTypeInContext(ctx
->context
);
939 ctx
->f64
= LLVMDoubleTypeInContext(ctx
->context
);
940 ctx
->v2f32
= LLVMVectorType(ctx
->f32
, 2);
941 ctx
->v4f32
= LLVMVectorType(ctx
->f32
, 4);
943 ctx
->i1false
= LLVMConstInt(ctx
->i1
, 0, false);
944 ctx
->i1true
= LLVMConstInt(ctx
->i1
, 1, false);
945 ctx
->i32zero
= LLVMConstInt(ctx
->i32
, 0, false);
946 ctx
->i32one
= LLVMConstInt(ctx
->i32
, 1, false);
947 ctx
->f32zero
= LLVMConstReal(ctx
->f32
, 0.0);
948 ctx
->f32one
= LLVMConstReal(ctx
->f32
, 1.0);
950 args
[0] = ctx
->f32zero
;
951 args
[1] = ctx
->f32zero
;
952 args
[2] = ctx
->f32zero
;
953 args
[3] = ctx
->f32one
;
954 ctx
->v4f32empty
= LLVMConstVector(args
, 4);
956 ctx
->uniform_md_kind
=
957 LLVMGetMDKindIDInContext(ctx
->context
, "amdgpu.uniform", 14);
958 ctx
->empty_md
= LLVMMDNodeInContext(ctx
->context
, NULL
, 0);
960 args
[0] = LLVMConstReal(ctx
->f32
, 2.5);
963 static int get_llvm_num_components(LLVMValueRef value
)
965 LLVMTypeRef type
= LLVMTypeOf(value
);
966 unsigned num_components
= LLVMGetTypeKind(type
) == LLVMVectorTypeKind
967 ? LLVMGetVectorSize(type
)
969 return num_components
;
972 static LLVMValueRef
llvm_extract_elem(struct ac_llvm_context
*ac
,
976 int count
= get_llvm_num_components(value
);
978 assert(index
< count
);
982 return LLVMBuildExtractElement(ac
->builder
, value
,
983 LLVMConstInt(ac
->i32
, index
, false), "");
986 static LLVMValueRef
trim_vector(struct ac_llvm_context
*ctx
,
987 LLVMValueRef value
, unsigned count
)
989 unsigned num_components
= get_llvm_num_components(value
);
990 if (count
== num_components
)
993 LLVMValueRef masks
[] = {
994 LLVMConstInt(ctx
->i32
, 0, false), LLVMConstInt(ctx
->i32
, 1, false),
995 LLVMConstInt(ctx
->i32
, 2, false), LLVMConstInt(ctx
->i32
, 3, false)};
998 return LLVMBuildExtractElement(ctx
->builder
, value
, masks
[0],
1001 LLVMValueRef swizzle
= LLVMConstVector(masks
, count
);
1002 return LLVMBuildShuffleVector(ctx
->builder
, value
, value
, swizzle
, "");
1006 build_store_values_extended(struct ac_llvm_context
*ac
,
1007 LLVMValueRef
*values
,
1008 unsigned value_count
,
1009 unsigned value_stride
,
1012 LLVMBuilderRef builder
= ac
->builder
;
1015 for (i
= 0; i
< value_count
; i
++) {
1016 LLVMValueRef ptr
= values
[i
* value_stride
];
1017 LLVMValueRef index
= LLVMConstInt(ac
->i32
, i
, false);
1018 LLVMValueRef value
= LLVMBuildExtractElement(builder
, vec
, index
, "");
1019 LLVMBuildStore(builder
, value
, ptr
);
1023 static LLVMTypeRef
get_def_type(struct ac_nir_context
*ctx
,
1024 const nir_ssa_def
*def
)
1026 LLVMTypeRef type
= LLVMIntTypeInContext(ctx
->ac
.context
, def
->bit_size
);
1027 if (def
->num_components
> 1) {
1028 type
= LLVMVectorType(type
, def
->num_components
);
1033 static LLVMValueRef
get_src(struct ac_nir_context
*nir
, nir_src src
)
1036 struct hash_entry
*entry
= _mesa_hash_table_search(nir
->defs
, src
.ssa
);
1037 return (LLVMValueRef
)entry
->data
;
1041 static LLVMBasicBlockRef
get_block(struct ac_nir_context
*nir
,
1042 const struct nir_block
*b
)
1044 struct hash_entry
*entry
= _mesa_hash_table_search(nir
->defs
, b
);
1045 return (LLVMBasicBlockRef
)entry
->data
;
1048 static LLVMValueRef
get_alu_src(struct ac_nir_context
*ctx
,
1050 unsigned num_components
)
1052 LLVMValueRef value
= get_src(ctx
, src
.src
);
1053 bool need_swizzle
= false;
1056 LLVMTypeRef type
= LLVMTypeOf(value
);
1057 unsigned src_components
= LLVMGetTypeKind(type
) == LLVMVectorTypeKind
1058 ? LLVMGetVectorSize(type
)
1061 for (unsigned i
= 0; i
< num_components
; ++i
) {
1062 assert(src
.swizzle
[i
] < src_components
);
1063 if (src
.swizzle
[i
] != i
)
1064 need_swizzle
= true;
1067 if (need_swizzle
|| num_components
!= src_components
) {
1068 LLVMValueRef masks
[] = {
1069 LLVMConstInt(ctx
->ac
.i32
, src
.swizzle
[0], false),
1070 LLVMConstInt(ctx
->ac
.i32
, src
.swizzle
[1], false),
1071 LLVMConstInt(ctx
->ac
.i32
, src
.swizzle
[2], false),
1072 LLVMConstInt(ctx
->ac
.i32
, src
.swizzle
[3], false)};
1074 if (src_components
> 1 && num_components
== 1) {
1075 value
= LLVMBuildExtractElement(ctx
->ac
.builder
, value
,
1077 } else if (src_components
== 1 && num_components
> 1) {
1078 LLVMValueRef values
[] = {value
, value
, value
, value
};
1079 value
= ac_build_gather_values(&ctx
->ac
, values
, num_components
);
1081 LLVMValueRef swizzle
= LLVMConstVector(masks
, num_components
);
1082 value
= LLVMBuildShuffleVector(ctx
->ac
.builder
, value
, value
,
1086 assert(!src
.negate
);
1091 static LLVMValueRef
emit_int_cmp(struct ac_llvm_context
*ctx
,
1092 LLVMIntPredicate pred
, LLVMValueRef src0
,
1095 LLVMValueRef result
= LLVMBuildICmp(ctx
->builder
, pred
, src0
, src1
, "");
1096 return LLVMBuildSelect(ctx
->builder
, result
,
1097 LLVMConstInt(ctx
->i32
, 0xFFFFFFFF, false),
1098 LLVMConstInt(ctx
->i32
, 0, false), "");
1101 static LLVMValueRef
emit_float_cmp(struct ac_llvm_context
*ctx
,
1102 LLVMRealPredicate pred
, LLVMValueRef src0
,
1105 LLVMValueRef result
;
1106 src0
= to_float(ctx
, src0
);
1107 src1
= to_float(ctx
, src1
);
1108 result
= LLVMBuildFCmp(ctx
->builder
, pred
, src0
, src1
, "");
1109 return LLVMBuildSelect(ctx
->builder
, result
,
1110 LLVMConstInt(ctx
->i32
, 0xFFFFFFFF, false),
1111 LLVMConstInt(ctx
->i32
, 0, false), "");
1114 static LLVMValueRef
emit_intrin_1f_param(struct ac_llvm_context
*ctx
,
1116 LLVMTypeRef result_type
,
1120 LLVMValueRef params
[] = {
1121 to_float(ctx
, src0
),
1124 MAYBE_UNUSED
const int length
= snprintf(name
, sizeof(name
), "%s.f%d", intrin
,
1125 get_elem_bits(ctx
, result_type
));
1126 assert(length
< sizeof(name
));
1127 return ac_build_intrinsic(ctx
, name
, result_type
, params
, 1, AC_FUNC_ATTR_READNONE
);
1130 static LLVMValueRef
emit_intrin_2f_param(struct ac_llvm_context
*ctx
,
1132 LLVMTypeRef result_type
,
1133 LLVMValueRef src0
, LLVMValueRef src1
)
1136 LLVMValueRef params
[] = {
1137 to_float(ctx
, src0
),
1138 to_float(ctx
, src1
),
1141 MAYBE_UNUSED
const int length
= snprintf(name
, sizeof(name
), "%s.f%d", intrin
,
1142 get_elem_bits(ctx
, result_type
));
1143 assert(length
< sizeof(name
));
1144 return ac_build_intrinsic(ctx
, name
, result_type
, params
, 2, AC_FUNC_ATTR_READNONE
);
1147 static LLVMValueRef
emit_intrin_3f_param(struct ac_llvm_context
*ctx
,
1149 LLVMTypeRef result_type
,
1150 LLVMValueRef src0
, LLVMValueRef src1
, LLVMValueRef src2
)
1153 LLVMValueRef params
[] = {
1154 to_float(ctx
, src0
),
1155 to_float(ctx
, src1
),
1156 to_float(ctx
, src2
),
1159 MAYBE_UNUSED
const int length
= snprintf(name
, sizeof(name
), "%s.f%d", intrin
,
1160 get_elem_bits(ctx
, result_type
));
1161 assert(length
< sizeof(name
));
1162 return ac_build_intrinsic(ctx
, name
, result_type
, params
, 3, AC_FUNC_ATTR_READNONE
);
1165 static LLVMValueRef
emit_bcsel(struct ac_llvm_context
*ctx
,
1166 LLVMValueRef src0
, LLVMValueRef src1
, LLVMValueRef src2
)
1168 LLVMValueRef v
= LLVMBuildICmp(ctx
->builder
, LLVMIntNE
, src0
,
1170 return LLVMBuildSelect(ctx
->builder
, v
, src1
, src2
, "");
1173 static LLVMValueRef
emit_find_lsb(struct ac_llvm_context
*ctx
,
1176 LLVMValueRef params
[2] = {
1179 /* The value of 1 means that ffs(x=0) = undef, so LLVM won't
1180 * add special code to check for x=0. The reason is that
1181 * the LLVM behavior for x=0 is different from what we
1184 * The hardware already implements the correct behavior.
1186 LLVMConstInt(ctx
->i1
, 1, false),
1189 LLVMValueRef lsb
= ac_build_intrinsic(ctx
, "llvm.cttz.i32", ctx
->i32
,
1191 AC_FUNC_ATTR_READNONE
);
1193 /* TODO: We need an intrinsic to skip this conditional. */
1194 /* Check for zero: */
1195 return LLVMBuildSelect(ctx
->builder
, LLVMBuildICmp(ctx
->builder
,
1198 LLVMConstInt(ctx
->i32
, -1, 0), lsb
, "");
1201 static LLVMValueRef
emit_ifind_msb(struct ac_llvm_context
*ctx
,
1204 return ac_build_imsb(ctx
, src0
, ctx
->i32
);
1207 static LLVMValueRef
emit_ufind_msb(struct ac_llvm_context
*ctx
,
1210 return ac_build_umsb(ctx
, src0
, ctx
->i32
);
1213 static LLVMValueRef
emit_minmax_int(struct ac_llvm_context
*ctx
,
1214 LLVMIntPredicate pred
,
1215 LLVMValueRef src0
, LLVMValueRef src1
)
1217 return LLVMBuildSelect(ctx
->builder
,
1218 LLVMBuildICmp(ctx
->builder
, pred
, src0
, src1
, ""),
1223 static LLVMValueRef
emit_iabs(struct ac_llvm_context
*ctx
,
1226 return emit_minmax_int(ctx
, LLVMIntSGT
, src0
,
1227 LLVMBuildNeg(ctx
->builder
, src0
, ""));
1230 static LLVMValueRef
emit_fsign(struct ac_llvm_context
*ctx
,
1233 LLVMValueRef cmp
, val
;
1235 cmp
= LLVMBuildFCmp(ctx
->builder
, LLVMRealOGT
, src0
, ctx
->f32_0
, "");
1236 val
= LLVMBuildSelect(ctx
->builder
, cmp
, ctx
->f32_1
, src0
, "");
1237 cmp
= LLVMBuildFCmp(ctx
->builder
, LLVMRealOGE
, val
, ctx
->f32_0
, "");
1238 val
= LLVMBuildSelect(ctx
->builder
, cmp
, val
, LLVMConstReal(ctx
->f32
, -1.0), "");
1242 static LLVMValueRef
emit_isign(struct ac_llvm_context
*ctx
,
1245 LLVMValueRef cmp
, val
;
1247 cmp
= LLVMBuildICmp(ctx
->builder
, LLVMIntSGT
, src0
, ctx
->i32_0
, "");
1248 val
= LLVMBuildSelect(ctx
->builder
, cmp
, ctx
->i32_1
, src0
, "");
1249 cmp
= LLVMBuildICmp(ctx
->builder
, LLVMIntSGE
, val
, ctx
->i32_0
, "");
1250 val
= LLVMBuildSelect(ctx
->builder
, cmp
, val
, LLVMConstInt(ctx
->i32
, -1, true), "");
1254 static LLVMValueRef
emit_ffract(struct ac_llvm_context
*ctx
,
1257 const char *intr
= "llvm.floor.f32";
1258 LLVMValueRef fsrc0
= to_float(ctx
, src0
);
1259 LLVMValueRef params
[] = {
1262 LLVMValueRef floor
= ac_build_intrinsic(ctx
, intr
,
1263 ctx
->f32
, params
, 1,
1264 AC_FUNC_ATTR_READNONE
);
1265 return LLVMBuildFSub(ctx
->builder
, fsrc0
, floor
, "");
1268 static LLVMValueRef
emit_uint_carry(struct ac_llvm_context
*ctx
,
1270 LLVMValueRef src0
, LLVMValueRef src1
)
1272 LLVMTypeRef ret_type
;
1273 LLVMTypeRef types
[] = { ctx
->i32
, ctx
->i1
};
1275 LLVMValueRef params
[] = { src0
, src1
};
1276 ret_type
= LLVMStructTypeInContext(ctx
->context
, types
,
1279 res
= ac_build_intrinsic(ctx
, intrin
, ret_type
,
1280 params
, 2, AC_FUNC_ATTR_READNONE
);
1282 res
= LLVMBuildExtractValue(ctx
->builder
, res
, 1, "");
1283 res
= LLVMBuildZExt(ctx
->builder
, res
, ctx
->i32
, "");
1287 static LLVMValueRef
emit_b2f(struct ac_llvm_context
*ctx
,
1290 return LLVMBuildAnd(ctx
->builder
, src0
, LLVMBuildBitCast(ctx
->builder
, LLVMConstReal(ctx
->f32
, 1.0), ctx
->i32
, ""), "");
1293 static LLVMValueRef
emit_f2b(struct ac_llvm_context
*ctx
,
1296 src0
= to_float(ctx
, src0
);
1297 return LLVMBuildSExt(ctx
->builder
,
1298 LLVMBuildFCmp(ctx
->builder
, LLVMRealUNE
, src0
, ctx
->f32_0
, ""),
1302 static LLVMValueRef
emit_b2i(struct ac_llvm_context
*ctx
,
1305 return LLVMBuildAnd(ctx
->builder
, src0
, ctx
->i32_1
, "");
1308 static LLVMValueRef
emit_i2b(struct ac_llvm_context
*ctx
,
1311 return LLVMBuildSExt(ctx
->builder
,
1312 LLVMBuildICmp(ctx
->builder
, LLVMIntNE
, src0
, ctx
->i32_0
, ""),
1316 static LLVMValueRef
emit_f2f16(struct nir_to_llvm_context
*ctx
,
1319 LLVMValueRef result
;
1322 src0
= to_float(&ctx
->ac
, src0
);
1323 result
= LLVMBuildFPTrunc(ctx
->builder
, src0
, ctx
->f16
, "");
1325 if (ctx
->options
->chip_class
>= VI
) {
1326 LLVMValueRef args
[2];
1327 /* Check if the result is a denormal - and flush to 0 if so. */
1329 args
[1] = LLVMConstInt(ctx
->i32
, N_SUBNORMAL
| P_SUBNORMAL
, false);
1330 cond
= ac_build_intrinsic(&ctx
->ac
, "llvm.amdgcn.class.f16", ctx
->i1
, args
, 2, AC_FUNC_ATTR_READNONE
);
1333 /* need to convert back up to f32 */
1334 result
= LLVMBuildFPExt(ctx
->builder
, result
, ctx
->f32
, "");
1336 if (ctx
->options
->chip_class
>= VI
)
1337 result
= LLVMBuildSelect(ctx
->builder
, cond
, ctx
->f32zero
, result
, "");
1340 /* 0x38800000 is smallest half float value (2^-14) in 32-bit float,
1341 * so compare the result and flush to 0 if it's smaller.
1343 LLVMValueRef temp
, cond2
;
1344 temp
= emit_intrin_1f_param(&ctx
->ac
, "llvm.fabs",
1346 cond
= LLVMBuildFCmp(ctx
->builder
, LLVMRealUGT
,
1347 LLVMBuildBitCast(ctx
->builder
, LLVMConstInt(ctx
->i32
, 0x38800000, false), ctx
->f32
, ""),
1349 cond2
= LLVMBuildFCmp(ctx
->builder
, LLVMRealUNE
,
1350 temp
, ctx
->f32zero
, "");
1351 cond
= LLVMBuildAnd(ctx
->builder
, cond
, cond2
, "");
1352 result
= LLVMBuildSelect(ctx
->builder
, cond
, ctx
->f32zero
, result
, "");
1357 static LLVMValueRef
emit_umul_high(struct ac_llvm_context
*ctx
,
1358 LLVMValueRef src0
, LLVMValueRef src1
)
1360 LLVMValueRef dst64
, result
;
1361 src0
= LLVMBuildZExt(ctx
->builder
, src0
, ctx
->i64
, "");
1362 src1
= LLVMBuildZExt(ctx
->builder
, src1
, ctx
->i64
, "");
1364 dst64
= LLVMBuildMul(ctx
->builder
, src0
, src1
, "");
1365 dst64
= LLVMBuildLShr(ctx
->builder
, dst64
, LLVMConstInt(ctx
->i64
, 32, false), "");
1366 result
= LLVMBuildTrunc(ctx
->builder
, dst64
, ctx
->i32
, "");
1370 static LLVMValueRef
emit_imul_high(struct ac_llvm_context
*ctx
,
1371 LLVMValueRef src0
, LLVMValueRef src1
)
1373 LLVMValueRef dst64
, result
;
1374 src0
= LLVMBuildSExt(ctx
->builder
, src0
, ctx
->i64
, "");
1375 src1
= LLVMBuildSExt(ctx
->builder
, src1
, ctx
->i64
, "");
1377 dst64
= LLVMBuildMul(ctx
->builder
, src0
, src1
, "");
1378 dst64
= LLVMBuildAShr(ctx
->builder
, dst64
, LLVMConstInt(ctx
->i64
, 32, false), "");
1379 result
= LLVMBuildTrunc(ctx
->builder
, dst64
, ctx
->i32
, "");
1383 static LLVMValueRef
emit_bitfield_extract(struct ac_llvm_context
*ctx
,
1385 const LLVMValueRef srcs
[3])
1387 LLVMValueRef result
;
1388 LLVMValueRef icond
= LLVMBuildICmp(ctx
->builder
, LLVMIntEQ
, srcs
[2], LLVMConstInt(ctx
->i32
, 32, false), "");
1390 result
= ac_build_bfe(ctx
, srcs
[0], srcs
[1], srcs
[2], is_signed
);
1391 result
= LLVMBuildSelect(ctx
->builder
, icond
, srcs
[0], result
, "");
1395 static LLVMValueRef
emit_bitfield_insert(struct ac_llvm_context
*ctx
,
1396 LLVMValueRef src0
, LLVMValueRef src1
,
1397 LLVMValueRef src2
, LLVMValueRef src3
)
1399 LLVMValueRef bfi_args
[3], result
;
1401 bfi_args
[0] = LLVMBuildShl(ctx
->builder
,
1402 LLVMBuildSub(ctx
->builder
,
1403 LLVMBuildShl(ctx
->builder
,
1408 bfi_args
[1] = LLVMBuildShl(ctx
->builder
, src1
, src2
, "");
1411 LLVMValueRef icond
= LLVMBuildICmp(ctx
->builder
, LLVMIntEQ
, src3
, LLVMConstInt(ctx
->i32
, 32, false), "");
1414 * (arg0 & arg1) | (~arg0 & arg2) = arg2 ^ (arg0 & (arg1 ^ arg2)
1415 * Use the right-hand side, which the LLVM backend can convert to V_BFI.
1417 result
= LLVMBuildXor(ctx
->builder
, bfi_args
[2],
1418 LLVMBuildAnd(ctx
->builder
, bfi_args
[0],
1419 LLVMBuildXor(ctx
->builder
, bfi_args
[1], bfi_args
[2], ""), ""), "");
1421 result
= LLVMBuildSelect(ctx
->builder
, icond
, src1
, result
, "");
1425 static LLVMValueRef
emit_pack_half_2x16(struct ac_llvm_context
*ctx
,
1428 LLVMValueRef const16
= LLVMConstInt(ctx
->i32
, 16, false);
1430 LLVMValueRef comp
[2];
1432 src0
= to_float(ctx
, src0
);
1433 comp
[0] = LLVMBuildExtractElement(ctx
->builder
, src0
, ctx
->i32_0
, "");
1434 comp
[1] = LLVMBuildExtractElement(ctx
->builder
, src0
, ctx
->i32_1
, "");
1435 for (i
= 0; i
< 2; i
++) {
1436 comp
[i
] = LLVMBuildFPTrunc(ctx
->builder
, comp
[i
], ctx
->f16
, "");
1437 comp
[i
] = LLVMBuildBitCast(ctx
->builder
, comp
[i
], ctx
->i16
, "");
1438 comp
[i
] = LLVMBuildZExt(ctx
->builder
, comp
[i
], ctx
->i32
, "");
1441 comp
[1] = LLVMBuildShl(ctx
->builder
, comp
[1], const16
, "");
1442 comp
[0] = LLVMBuildOr(ctx
->builder
, comp
[0], comp
[1], "");
1447 static LLVMValueRef
emit_unpack_half_2x16(struct ac_llvm_context
*ctx
,
1450 LLVMValueRef const16
= LLVMConstInt(ctx
->i32
, 16, false);
1451 LLVMValueRef temps
[2], result
, val
;
1454 for (i
= 0; i
< 2; i
++) {
1455 val
= i
== 1 ? LLVMBuildLShr(ctx
->builder
, src0
, const16
, "") : src0
;
1456 val
= LLVMBuildTrunc(ctx
->builder
, val
, ctx
->i16
, "");
1457 val
= LLVMBuildBitCast(ctx
->builder
, val
, ctx
->f16
, "");
1458 temps
[i
] = LLVMBuildFPExt(ctx
->builder
, val
, ctx
->f32
, "");
1461 LLVMTypeRef v2f32
= LLVMVectorType(ctx
->f32
, 2);
1462 result
= LLVMBuildInsertElement(ctx
->builder
, LLVMGetUndef(v2f32
), temps
[0],
1464 result
= LLVMBuildInsertElement(ctx
->builder
, result
, temps
[1],
1469 static LLVMValueRef
emit_ddxy(struct ac_nir_context
*ctx
,
1475 LLVMValueRef result
;
1476 bool has_ds_bpermute
= ctx
->abi
->chip_class
>= VI
;
1478 if (op
== nir_op_fddx_fine
|| op
== nir_op_fddx
)
1479 mask
= AC_TID_MASK_LEFT
;
1480 else if (op
== nir_op_fddy_fine
|| op
== nir_op_fddy
)
1481 mask
= AC_TID_MASK_TOP
;
1483 mask
= AC_TID_MASK_TOP_LEFT
;
1485 /* for DDX we want to next X pixel, DDY next Y pixel. */
1486 if (op
== nir_op_fddx_fine
||
1487 op
== nir_op_fddx_coarse
||
1493 result
= ac_build_ddxy(&ctx
->ac
, has_ds_bpermute
,
1500 * this takes an I,J coordinate pair,
1501 * and works out the X and Y derivatives.
1502 * it returns DDX(I), DDX(J), DDY(I), DDY(J).
1504 static LLVMValueRef
emit_ddxy_interp(
1505 struct ac_nir_context
*ctx
,
1506 LLVMValueRef interp_ij
)
1508 LLVMValueRef result
[4], a
;
1511 for (i
= 0; i
< 2; i
++) {
1512 a
= LLVMBuildExtractElement(ctx
->ac
.builder
, interp_ij
,
1513 LLVMConstInt(ctx
->ac
.i32
, i
, false), "");
1514 result
[i
] = emit_ddxy(ctx
, nir_op_fddx
, a
);
1515 result
[2+i
] = emit_ddxy(ctx
, nir_op_fddy
, a
);
1517 return ac_build_gather_values(&ctx
->ac
, result
, 4);
1520 static void visit_alu(struct ac_nir_context
*ctx
, const nir_alu_instr
*instr
)
1522 LLVMValueRef src
[4], result
= NULL
;
1523 unsigned num_components
= instr
->dest
.dest
.ssa
.num_components
;
1524 unsigned src_components
;
1525 LLVMTypeRef def_type
= get_def_type(ctx
, &instr
->dest
.dest
.ssa
);
1527 assert(nir_op_infos
[instr
->op
].num_inputs
<= ARRAY_SIZE(src
));
1528 switch (instr
->op
) {
1534 case nir_op_pack_half_2x16
:
1537 case nir_op_unpack_half_2x16
:
1541 src_components
= num_components
;
1544 for (unsigned i
= 0; i
< nir_op_infos
[instr
->op
].num_inputs
; i
++)
1545 src
[i
] = get_alu_src(ctx
, instr
->src
[i
], src_components
);
1547 switch (instr
->op
) {
1553 src
[0] = to_float(&ctx
->ac
, src
[0]);
1554 result
= LLVMBuildFNeg(ctx
->ac
.builder
, src
[0], "");
1557 result
= LLVMBuildNeg(ctx
->ac
.builder
, src
[0], "");
1560 result
= LLVMBuildNot(ctx
->ac
.builder
, src
[0], "");
1563 result
= LLVMBuildAdd(ctx
->ac
.builder
, src
[0], src
[1], "");
1566 src
[0] = to_float(&ctx
->ac
, src
[0]);
1567 src
[1] = to_float(&ctx
->ac
, src
[1]);
1568 result
= LLVMBuildFAdd(ctx
->ac
.builder
, src
[0], src
[1], "");
1571 src
[0] = to_float(&ctx
->ac
, src
[0]);
1572 src
[1] = to_float(&ctx
->ac
, src
[1]);
1573 result
= LLVMBuildFSub(ctx
->ac
.builder
, src
[0], src
[1], "");
1576 result
= LLVMBuildSub(ctx
->ac
.builder
, src
[0], src
[1], "");
1579 result
= LLVMBuildMul(ctx
->ac
.builder
, src
[0], src
[1], "");
1582 result
= LLVMBuildSRem(ctx
->ac
.builder
, src
[0], src
[1], "");
1585 result
= LLVMBuildURem(ctx
->ac
.builder
, src
[0], src
[1], "");
1588 src
[0] = to_float(&ctx
->ac
, src
[0]);
1589 src
[1] = to_float(&ctx
->ac
, src
[1]);
1590 result
= ac_build_fdiv(&ctx
->ac
, src
[0], src
[1]);
1591 result
= emit_intrin_1f_param(&ctx
->ac
, "llvm.floor",
1592 to_float_type(&ctx
->ac
, def_type
), result
);
1593 result
= LLVMBuildFMul(ctx
->ac
.builder
, src
[1] , result
, "");
1594 result
= LLVMBuildFSub(ctx
->ac
.builder
, src
[0], result
, "");
1597 src
[0] = to_float(&ctx
->ac
, src
[0]);
1598 src
[1] = to_float(&ctx
->ac
, src
[1]);
1599 result
= LLVMBuildFRem(ctx
->ac
.builder
, src
[0], src
[1], "");
1602 result
= LLVMBuildSRem(ctx
->ac
.builder
, src
[0], src
[1], "");
1605 result
= LLVMBuildSDiv(ctx
->ac
.builder
, src
[0], src
[1], "");
1608 result
= LLVMBuildUDiv(ctx
->ac
.builder
, src
[0], src
[1], "");
1611 src
[0] = to_float(&ctx
->ac
, src
[0]);
1612 src
[1] = to_float(&ctx
->ac
, src
[1]);
1613 result
= LLVMBuildFMul(ctx
->ac
.builder
, src
[0], src
[1], "");
1616 src
[0] = to_float(&ctx
->ac
, src
[0]);
1617 src
[1] = to_float(&ctx
->ac
, src
[1]);
1618 result
= ac_build_fdiv(&ctx
->ac
, src
[0], src
[1]);
1621 src
[0] = to_float(&ctx
->ac
, src
[0]);
1622 result
= ac_build_fdiv(&ctx
->ac
, ctx
->ac
.f32_1
, src
[0]);
1625 result
= LLVMBuildAnd(ctx
->ac
.builder
, src
[0], src
[1], "");
1628 result
= LLVMBuildOr(ctx
->ac
.builder
, src
[0], src
[1], "");
1631 result
= LLVMBuildXor(ctx
->ac
.builder
, src
[0], src
[1], "");
1634 result
= LLVMBuildShl(ctx
->ac
.builder
, src
[0],
1635 LLVMBuildZExt(ctx
->ac
.builder
, src
[1],
1636 LLVMTypeOf(src
[0]), ""),
1640 result
= LLVMBuildAShr(ctx
->ac
.builder
, src
[0],
1641 LLVMBuildZExt(ctx
->ac
.builder
, src
[1],
1642 LLVMTypeOf(src
[0]), ""),
1646 result
= LLVMBuildLShr(ctx
->ac
.builder
, src
[0],
1647 LLVMBuildZExt(ctx
->ac
.builder
, src
[1],
1648 LLVMTypeOf(src
[0]), ""),
1652 result
= emit_int_cmp(&ctx
->ac
, LLVMIntSLT
, src
[0], src
[1]);
1655 result
= emit_int_cmp(&ctx
->ac
, LLVMIntNE
, src
[0], src
[1]);
1658 result
= emit_int_cmp(&ctx
->ac
, LLVMIntEQ
, src
[0], src
[1]);
1661 result
= emit_int_cmp(&ctx
->ac
, LLVMIntSGE
, src
[0], src
[1]);
1664 result
= emit_int_cmp(&ctx
->ac
, LLVMIntULT
, src
[0], src
[1]);
1667 result
= emit_int_cmp(&ctx
->ac
, LLVMIntUGE
, src
[0], src
[1]);
1670 result
= emit_float_cmp(&ctx
->ac
, LLVMRealUEQ
, src
[0], src
[1]);
1673 result
= emit_float_cmp(&ctx
->ac
, LLVMRealUNE
, src
[0], src
[1]);
1676 result
= emit_float_cmp(&ctx
->ac
, LLVMRealULT
, src
[0], src
[1]);
1679 result
= emit_float_cmp(&ctx
->ac
, LLVMRealUGE
, src
[0], src
[1]);
1682 result
= emit_intrin_1f_param(&ctx
->ac
, "llvm.fabs",
1683 to_float_type(&ctx
->ac
, def_type
), src
[0]);
1686 result
= emit_iabs(&ctx
->ac
, src
[0]);
1689 result
= emit_minmax_int(&ctx
->ac
, LLVMIntSGT
, src
[0], src
[1]);
1692 result
= emit_minmax_int(&ctx
->ac
, LLVMIntSLT
, src
[0], src
[1]);
1695 result
= emit_minmax_int(&ctx
->ac
, LLVMIntUGT
, src
[0], src
[1]);
1698 result
= emit_minmax_int(&ctx
->ac
, LLVMIntULT
, src
[0], src
[1]);
1701 result
= emit_isign(&ctx
->ac
, src
[0]);
1704 src
[0] = to_float(&ctx
->ac
, src
[0]);
1705 result
= emit_fsign(&ctx
->ac
, src
[0]);
1708 result
= emit_intrin_1f_param(&ctx
->ac
, "llvm.floor",
1709 to_float_type(&ctx
->ac
, def_type
), src
[0]);
1712 result
= emit_intrin_1f_param(&ctx
->ac
, "llvm.trunc",
1713 to_float_type(&ctx
->ac
, def_type
), src
[0]);
1716 result
= emit_intrin_1f_param(&ctx
->ac
, "llvm.ceil",
1717 to_float_type(&ctx
->ac
, def_type
), src
[0]);
1719 case nir_op_fround_even
:
1720 result
= emit_intrin_1f_param(&ctx
->ac
, "llvm.rint",
1721 to_float_type(&ctx
->ac
, def_type
),src
[0]);
1724 result
= emit_ffract(&ctx
->ac
, src
[0]);
1727 result
= emit_intrin_1f_param(&ctx
->ac
, "llvm.sin",
1728 to_float_type(&ctx
->ac
, def_type
), src
[0]);
1731 result
= emit_intrin_1f_param(&ctx
->ac
, "llvm.cos",
1732 to_float_type(&ctx
->ac
, def_type
), src
[0]);
1735 result
= emit_intrin_1f_param(&ctx
->ac
, "llvm.sqrt",
1736 to_float_type(&ctx
->ac
, def_type
), src
[0]);
1739 result
= emit_intrin_1f_param(&ctx
->ac
, "llvm.exp2",
1740 to_float_type(&ctx
->ac
, def_type
), src
[0]);
1743 result
= emit_intrin_1f_param(&ctx
->ac
, "llvm.log2",
1744 to_float_type(&ctx
->ac
, def_type
), src
[0]);
1747 result
= emit_intrin_1f_param(&ctx
->ac
, "llvm.sqrt",
1748 to_float_type(&ctx
->ac
, def_type
), src
[0]);
1749 result
= ac_build_fdiv(&ctx
->ac
, ctx
->ac
.f32_1
, result
);
1752 result
= emit_intrin_2f_param(&ctx
->ac
, "llvm.pow",
1753 to_float_type(&ctx
->ac
, def_type
), src
[0], src
[1]);
1756 result
= emit_intrin_2f_param(&ctx
->ac
, "llvm.maxnum",
1757 to_float_type(&ctx
->ac
, def_type
), src
[0], src
[1]);
1758 if (instr
->dest
.dest
.ssa
.bit_size
== 32)
1759 result
= emit_intrin_1f_param(&ctx
->ac
, "llvm.canonicalize",
1760 to_float_type(&ctx
->ac
, def_type
),
1764 result
= emit_intrin_2f_param(&ctx
->ac
, "llvm.minnum",
1765 to_float_type(&ctx
->ac
, def_type
), src
[0], src
[1]);
1766 if (instr
->dest
.dest
.ssa
.bit_size
== 32)
1767 result
= emit_intrin_1f_param(&ctx
->ac
, "llvm.canonicalize",
1768 to_float_type(&ctx
->ac
, def_type
),
1772 result
= emit_intrin_3f_param(&ctx
->ac
, "llvm.fma",
1773 to_float_type(&ctx
->ac
, def_type
), src
[0], src
[1], src
[2]);
1775 case nir_op_ibitfield_extract
:
1776 result
= emit_bitfield_extract(&ctx
->ac
, true, src
);
1778 case nir_op_ubitfield_extract
:
1779 result
= emit_bitfield_extract(&ctx
->ac
, false, src
);
1781 case nir_op_bitfield_insert
:
1782 result
= emit_bitfield_insert(&ctx
->ac
, src
[0], src
[1], src
[2], src
[3]);
1784 case nir_op_bitfield_reverse
:
1785 result
= ac_build_intrinsic(&ctx
->ac
, "llvm.bitreverse.i32", ctx
->ac
.i32
, src
, 1, AC_FUNC_ATTR_READNONE
);
1787 case nir_op_bit_count
:
1788 result
= ac_build_intrinsic(&ctx
->ac
, "llvm.ctpop.i32", ctx
->ac
.i32
, src
, 1, AC_FUNC_ATTR_READNONE
);
1793 for (unsigned i
= 0; i
< nir_op_infos
[instr
->op
].num_inputs
; i
++)
1794 src
[i
] = to_integer(&ctx
->ac
, src
[i
]);
1795 result
= ac_build_gather_values(&ctx
->ac
, src
, num_components
);
1799 src
[0] = to_float(&ctx
->ac
, src
[0]);
1800 result
= LLVMBuildFPToSI(ctx
->ac
.builder
, src
[0], def_type
, "");
1804 src
[0] = to_float(&ctx
->ac
, src
[0]);
1805 result
= LLVMBuildFPToUI(ctx
->ac
.builder
, src
[0], def_type
, "");
1809 result
= LLVMBuildSIToFP(ctx
->ac
.builder
, src
[0], to_float_type(&ctx
->ac
, def_type
), "");
1813 result
= LLVMBuildUIToFP(ctx
->ac
.builder
, src
[0], to_float_type(&ctx
->ac
, def_type
), "");
1816 result
= LLVMBuildFPExt(ctx
->ac
.builder
, src
[0], to_float_type(&ctx
->ac
, def_type
), "");
1819 result
= LLVMBuildFPTrunc(ctx
->ac
.builder
, src
[0], to_float_type(&ctx
->ac
, def_type
), "");
1823 if (get_elem_bits(&ctx
->ac
, LLVMTypeOf(src
[0])) < get_elem_bits(&ctx
->ac
, def_type
))
1824 result
= LLVMBuildZExt(ctx
->ac
.builder
, src
[0], def_type
, "");
1826 result
= LLVMBuildTrunc(ctx
->ac
.builder
, src
[0], def_type
, "");
1830 if (get_elem_bits(&ctx
->ac
, LLVMTypeOf(src
[0])) < get_elem_bits(&ctx
->ac
, def_type
))
1831 result
= LLVMBuildSExt(ctx
->ac
.builder
, src
[0], def_type
, "");
1833 result
= LLVMBuildTrunc(ctx
->ac
.builder
, src
[0], def_type
, "");
1836 result
= emit_bcsel(&ctx
->ac
, src
[0], src
[1], src
[2]);
1838 case nir_op_find_lsb
:
1839 result
= emit_find_lsb(&ctx
->ac
, src
[0]);
1841 case nir_op_ufind_msb
:
1842 result
= emit_ufind_msb(&ctx
->ac
, src
[0]);
1844 case nir_op_ifind_msb
:
1845 result
= emit_ifind_msb(&ctx
->ac
, src
[0]);
1847 case nir_op_uadd_carry
:
1848 result
= emit_uint_carry(&ctx
->ac
, "llvm.uadd.with.overflow.i32", src
[0], src
[1]);
1850 case nir_op_usub_borrow
:
1851 result
= emit_uint_carry(&ctx
->ac
, "llvm.usub.with.overflow.i32", src
[0], src
[1]);
1854 result
= emit_b2f(&ctx
->ac
, src
[0]);
1857 result
= emit_f2b(&ctx
->ac
, src
[0]);
1860 result
= emit_b2i(&ctx
->ac
, src
[0]);
1863 result
= emit_i2b(&ctx
->ac
, src
[0]);
1865 case nir_op_fquantize2f16
:
1866 result
= emit_f2f16(ctx
->nctx
, src
[0]);
1868 case nir_op_umul_high
:
1869 result
= emit_umul_high(&ctx
->ac
, src
[0], src
[1]);
1871 case nir_op_imul_high
:
1872 result
= emit_imul_high(&ctx
->ac
, src
[0], src
[1]);
1874 case nir_op_pack_half_2x16
:
1875 result
= emit_pack_half_2x16(&ctx
->ac
, src
[0]);
1877 case nir_op_unpack_half_2x16
:
1878 result
= emit_unpack_half_2x16(&ctx
->ac
, src
[0]);
1882 case nir_op_fddx_fine
:
1883 case nir_op_fddy_fine
:
1884 case nir_op_fddx_coarse
:
1885 case nir_op_fddy_coarse
:
1886 result
= emit_ddxy(ctx
, instr
->op
, src
[0]);
1889 case nir_op_unpack_64_2x32_split_x
: {
1890 assert(instr
->src
[0].src
.ssa
->num_components
== 1);
1891 LLVMValueRef tmp
= LLVMBuildBitCast(ctx
->ac
.builder
, src
[0],
1892 LLVMVectorType(ctx
->ac
.i32
, 2),
1894 result
= LLVMBuildExtractElement(ctx
->ac
.builder
, tmp
,
1899 case nir_op_unpack_64_2x32_split_y
: {
1900 assert(instr
->src
[0].src
.ssa
->num_components
== 1);
1901 LLVMValueRef tmp
= LLVMBuildBitCast(ctx
->ac
.builder
, src
[0],
1902 LLVMVectorType(ctx
->ac
.i32
, 2),
1904 result
= LLVMBuildExtractElement(ctx
->ac
.builder
, tmp
,
1909 case nir_op_pack_64_2x32_split
: {
1910 LLVMValueRef tmp
= LLVMGetUndef(LLVMVectorType(ctx
->ac
.i32
, 2));
1911 tmp
= LLVMBuildInsertElement(ctx
->ac
.builder
, tmp
,
1912 src
[0], ctx
->ac
.i32_0
, "");
1913 tmp
= LLVMBuildInsertElement(ctx
->ac
.builder
, tmp
,
1914 src
[1], ctx
->ac
.i32_1
, "");
1915 result
= LLVMBuildBitCast(ctx
->ac
.builder
, tmp
, ctx
->ac
.i64
, "");
1920 fprintf(stderr
, "Unknown NIR alu instr: ");
1921 nir_print_instr(&instr
->instr
, stderr
);
1922 fprintf(stderr
, "\n");
1927 assert(instr
->dest
.dest
.is_ssa
);
1928 result
= to_integer(&ctx
->ac
, result
);
1929 _mesa_hash_table_insert(ctx
->defs
, &instr
->dest
.dest
.ssa
,
1934 static void visit_load_const(struct ac_nir_context
*ctx
,
1935 const nir_load_const_instr
*instr
)
1937 LLVMValueRef values
[4], value
= NULL
;
1938 LLVMTypeRef element_type
=
1939 LLVMIntTypeInContext(ctx
->ac
.context
, instr
->def
.bit_size
);
1941 for (unsigned i
= 0; i
< instr
->def
.num_components
; ++i
) {
1942 switch (instr
->def
.bit_size
) {
1944 values
[i
] = LLVMConstInt(element_type
,
1945 instr
->value
.u32
[i
], false);
1948 values
[i
] = LLVMConstInt(element_type
,
1949 instr
->value
.u64
[i
], false);
1953 "unsupported nir load_const bit_size: %d\n",
1954 instr
->def
.bit_size
);
1958 if (instr
->def
.num_components
> 1) {
1959 value
= LLVMConstVector(values
, instr
->def
.num_components
);
1963 _mesa_hash_table_insert(ctx
->defs
, &instr
->def
, value
);
1966 static LLVMValueRef
cast_ptr(struct nir_to_llvm_context
*ctx
, LLVMValueRef ptr
,
1969 int addr_space
= LLVMGetPointerAddressSpace(LLVMTypeOf(ptr
));
1970 return LLVMBuildBitCast(ctx
->builder
, ptr
,
1971 LLVMPointerType(type
, addr_space
), "");
1975 get_buffer_size(struct ac_nir_context
*ctx
, LLVMValueRef descriptor
, bool in_elements
)
1978 LLVMBuildExtractElement(ctx
->ac
.builder
, descriptor
,
1979 LLVMConstInt(ctx
->ac
.i32
, 2, false), "");
1982 if (ctx
->abi
->chip_class
>= VI
&& in_elements
) {
1983 /* On VI, the descriptor contains the size in bytes,
1984 * but TXQ must return the size in elements.
1985 * The stride is always non-zero for resources using TXQ.
1987 LLVMValueRef stride
=
1988 LLVMBuildExtractElement(ctx
->ac
.builder
, descriptor
,
1989 LLVMConstInt(ctx
->ac
.i32
, 1, false), "");
1990 stride
= LLVMBuildLShr(ctx
->ac
.builder
, stride
,
1991 LLVMConstInt(ctx
->ac
.i32
, 16, false), "");
1992 stride
= LLVMBuildAnd(ctx
->ac
.builder
, stride
,
1993 LLVMConstInt(ctx
->ac
.i32
, 0x3fff, false), "");
1995 size
= LLVMBuildUDiv(ctx
->ac
.builder
, size
, stride
, "");
2001 * Given the i32 or vNi32 \p type, generate the textual name (e.g. for use with
2004 static void build_int_type_name(
2006 char *buf
, unsigned bufsize
)
2008 assert(bufsize
>= 6);
2010 if (LLVMGetTypeKind(type
) == LLVMVectorTypeKind
)
2011 snprintf(buf
, bufsize
, "v%ui32",
2012 LLVMGetVectorSize(type
));
2017 static LLVMValueRef
radv_lower_gather4_integer(struct ac_llvm_context
*ctx
,
2018 struct ac_image_args
*args
,
2019 const nir_tex_instr
*instr
)
2021 enum glsl_base_type stype
= glsl_get_sampler_result_type(instr
->texture
->var
->type
);
2022 LLVMValueRef coord
= args
->addr
;
2023 LLVMValueRef half_texel
[2];
2024 LLVMValueRef compare_cube_wa
;
2025 LLVMValueRef result
;
2027 unsigned coord_vgpr_index
= (unsigned)args
->offset
+ (unsigned)args
->compare
;
2031 struct ac_image_args txq_args
= { 0 };
2033 txq_args
.da
= instr
->is_array
|| instr
->sampler_dim
== GLSL_SAMPLER_DIM_CUBE
;
2034 txq_args
.opcode
= ac_image_get_resinfo
;
2035 txq_args
.dmask
= 0xf;
2036 txq_args
.addr
= ctx
->i32_0
;
2037 txq_args
.resource
= args
->resource
;
2038 LLVMValueRef size
= ac_build_image_opcode(ctx
, &txq_args
);
2040 for (c
= 0; c
< 2; c
++) {
2041 half_texel
[c
] = LLVMBuildExtractElement(ctx
->builder
, size
,
2042 LLVMConstInt(ctx
->i32
, c
, false), "");
2043 half_texel
[c
] = LLVMBuildUIToFP(ctx
->builder
, half_texel
[c
], ctx
->f32
, "");
2044 half_texel
[c
] = ac_build_fdiv(ctx
, ctx
->f32_1
, half_texel
[c
]);
2045 half_texel
[c
] = LLVMBuildFMul(ctx
->builder
, half_texel
[c
],
2046 LLVMConstReal(ctx
->f32
, -0.5), "");
2050 LLVMValueRef orig_coords
= args
->addr
;
2052 for (c
= 0; c
< 2; c
++) {
2054 LLVMValueRef index
= LLVMConstInt(ctx
->i32
, coord_vgpr_index
+ c
, 0);
2055 tmp
= LLVMBuildExtractElement(ctx
->builder
, coord
, index
, "");
2056 tmp
= LLVMBuildBitCast(ctx
->builder
, tmp
, ctx
->f32
, "");
2057 tmp
= LLVMBuildFAdd(ctx
->builder
, tmp
, half_texel
[c
], "");
2058 tmp
= LLVMBuildBitCast(ctx
->builder
, tmp
, ctx
->i32
, "");
2059 coord
= LLVMBuildInsertElement(ctx
->builder
, coord
, tmp
, index
, "");
2064 * Apparantly cube has issue with integer types that the workaround doesn't solve,
2065 * so this tests if the format is 8_8_8_8 and an integer type do an alternate
2066 * workaround by sampling using a scaled type and converting.
2067 * This is taken from amdgpu-pro shaders.
2069 /* NOTE this produces some ugly code compared to amdgpu-pro,
2070 * LLVM ends up dumping SGPRs into VGPRs to deal with the compare/select,
2071 * and then reads them back. -pro generates two selects,
2072 * one s_cmp for the descriptor rewriting
2073 * one v_cmp for the coordinate and result changes.
2075 if (instr
->sampler_dim
== GLSL_SAMPLER_DIM_CUBE
) {
2076 LLVMValueRef tmp
, tmp2
;
2078 /* workaround 8/8/8/8 uint/sint cube gather bug */
2079 /* first detect it then change to a scaled read and f2i */
2080 tmp
= LLVMBuildExtractElement(ctx
->builder
, args
->resource
, ctx
->i32_1
, "");
2083 /* extract the DATA_FORMAT */
2084 tmp
= ac_build_bfe(ctx
, tmp
, LLVMConstInt(ctx
->i32
, 20, false),
2085 LLVMConstInt(ctx
->i32
, 6, false), false);
2087 /* is the DATA_FORMAT == 8_8_8_8 */
2088 compare_cube_wa
= LLVMBuildICmp(ctx
->builder
, LLVMIntEQ
, tmp
, LLVMConstInt(ctx
->i32
, V_008F14_IMG_DATA_FORMAT_8_8_8_8
, false), "");
2090 if (stype
== GLSL_TYPE_UINT
)
2091 /* Create a NUM FORMAT - 0x2 or 0x4 - USCALED or UINT */
2092 tmp
= LLVMBuildSelect(ctx
->builder
, compare_cube_wa
, LLVMConstInt(ctx
->i32
, 0x8000000, false),
2093 LLVMConstInt(ctx
->i32
, 0x10000000, false), "");
2095 /* Create a NUM FORMAT - 0x3 or 0x5 - SSCALED or SINT */
2096 tmp
= LLVMBuildSelect(ctx
->builder
, compare_cube_wa
, LLVMConstInt(ctx
->i32
, 0xc000000, false),
2097 LLVMConstInt(ctx
->i32
, 0x14000000, false), "");
2099 /* replace the NUM FORMAT in the descriptor */
2100 tmp2
= LLVMBuildAnd(ctx
->builder
, tmp2
, LLVMConstInt(ctx
->i32
, C_008F14_NUM_FORMAT_GFX6
, false), "");
2101 tmp2
= LLVMBuildOr(ctx
->builder
, tmp2
, tmp
, "");
2103 args
->resource
= LLVMBuildInsertElement(ctx
->builder
, args
->resource
, tmp2
, ctx
->i32_1
, "");
2105 /* don't modify the coordinates for this case */
2106 coord
= LLVMBuildSelect(ctx
->builder
, compare_cube_wa
, orig_coords
, coord
, "");
2109 result
= ac_build_image_opcode(ctx
, args
);
2111 if (instr
->sampler_dim
== GLSL_SAMPLER_DIM_CUBE
) {
2112 LLVMValueRef tmp
, tmp2
;
2114 /* if the cube workaround is in place, f2i the result. */
2115 for (c
= 0; c
< 4; c
++) {
2116 tmp
= LLVMBuildExtractElement(ctx
->builder
, result
, LLVMConstInt(ctx
->i32
, c
, false), "");
2117 if (stype
== GLSL_TYPE_UINT
)
2118 tmp2
= LLVMBuildFPToUI(ctx
->builder
, tmp
, ctx
->i32
, "");
2120 tmp2
= LLVMBuildFPToSI(ctx
->builder
, tmp
, ctx
->i32
, "");
2121 tmp
= LLVMBuildBitCast(ctx
->builder
, tmp
, ctx
->i32
, "");
2122 tmp2
= LLVMBuildBitCast(ctx
->builder
, tmp2
, ctx
->i32
, "");
2123 tmp
= LLVMBuildSelect(ctx
->builder
, compare_cube_wa
, tmp2
, tmp
, "");
2124 tmp
= LLVMBuildBitCast(ctx
->builder
, tmp
, ctx
->f32
, "");
2125 result
= LLVMBuildInsertElement(ctx
->builder
, result
, tmp
, LLVMConstInt(ctx
->i32
, c
, false), "");
2131 static LLVMValueRef
build_tex_intrinsic(struct ac_nir_context
*ctx
,
2132 const nir_tex_instr
*instr
,
2134 struct ac_image_args
*args
)
2136 if (instr
->sampler_dim
== GLSL_SAMPLER_DIM_BUF
) {
2137 return ac_build_buffer_load_format(&ctx
->ac
,
2140 LLVMConstInt(ctx
->ac
.i32
, 0, false),
2144 args
->opcode
= ac_image_sample
;
2145 args
->compare
= instr
->is_shadow
;
2147 switch (instr
->op
) {
2149 case nir_texop_txf_ms
:
2150 case nir_texop_samples_identical
:
2151 args
->opcode
= instr
->sampler_dim
== GLSL_SAMPLER_DIM_MS
? ac_image_load
: ac_image_load_mip
;
2152 args
->compare
= false;
2153 args
->offset
= false;
2160 args
->level_zero
= true;
2165 case nir_texop_query_levels
:
2166 args
->opcode
= ac_image_get_resinfo
;
2169 if (ctx
->stage
!= MESA_SHADER_FRAGMENT
)
2170 args
->level_zero
= true;
2176 args
->opcode
= ac_image_gather4
;
2177 args
->level_zero
= true;
2180 args
->opcode
= ac_image_get_lod
;
2181 args
->compare
= false;
2182 args
->offset
= false;
2188 if (instr
->op
== nir_texop_tg4
&& ctx
->abi
->chip_class
<= VI
) {
2189 enum glsl_base_type stype
= glsl_get_sampler_result_type(instr
->texture
->var
->type
);
2190 if (stype
== GLSL_TYPE_UINT
|| stype
== GLSL_TYPE_INT
) {
2191 return radv_lower_gather4_integer(&ctx
->ac
, args
, instr
);
2194 return ac_build_image_opcode(&ctx
->ac
, args
);
2197 static LLVMValueRef
visit_vulkan_resource_index(struct nir_to_llvm_context
*ctx
,
2198 nir_intrinsic_instr
*instr
)
2200 LLVMValueRef index
= get_src(ctx
->nir
, instr
->src
[0]);
2201 unsigned desc_set
= nir_intrinsic_desc_set(instr
);
2202 unsigned binding
= nir_intrinsic_binding(instr
);
2203 LLVMValueRef desc_ptr
= ctx
->descriptor_sets
[desc_set
];
2204 struct radv_pipeline_layout
*pipeline_layout
= ctx
->options
->layout
;
2205 struct radv_descriptor_set_layout
*layout
= pipeline_layout
->set
[desc_set
].layout
;
2206 unsigned base_offset
= layout
->binding
[binding
].offset
;
2207 LLVMValueRef offset
, stride
;
2209 if (layout
->binding
[binding
].type
== VK_DESCRIPTOR_TYPE_UNIFORM_BUFFER_DYNAMIC
||
2210 layout
->binding
[binding
].type
== VK_DESCRIPTOR_TYPE_STORAGE_BUFFER_DYNAMIC
) {
2211 unsigned idx
= pipeline_layout
->set
[desc_set
].dynamic_offset_start
+
2212 layout
->binding
[binding
].dynamic_offset_offset
;
2213 desc_ptr
= ctx
->push_constants
;
2214 base_offset
= pipeline_layout
->push_constant_size
+ 16 * idx
;
2215 stride
= LLVMConstInt(ctx
->i32
, 16, false);
2217 stride
= LLVMConstInt(ctx
->i32
, layout
->binding
[binding
].size
, false);
2219 offset
= LLVMConstInt(ctx
->i32
, base_offset
, false);
2220 index
= LLVMBuildMul(ctx
->builder
, index
, stride
, "");
2221 offset
= LLVMBuildAdd(ctx
->builder
, offset
, index
, "");
2223 desc_ptr
= ac_build_gep0(&ctx
->ac
, desc_ptr
, offset
);
2224 desc_ptr
= cast_ptr(ctx
, desc_ptr
, ctx
->v4i32
);
2225 LLVMSetMetadata(desc_ptr
, ctx
->uniform_md_kind
, ctx
->empty_md
);
2227 return LLVMBuildLoad(ctx
->builder
, desc_ptr
, "");
2230 static LLVMValueRef
visit_load_push_constant(struct nir_to_llvm_context
*ctx
,
2231 nir_intrinsic_instr
*instr
)
2233 LLVMValueRef ptr
, addr
;
2235 addr
= LLVMConstInt(ctx
->i32
, nir_intrinsic_base(instr
), 0);
2236 addr
= LLVMBuildAdd(ctx
->builder
, addr
, get_src(ctx
->nir
, instr
->src
[0]), "");
2238 ptr
= ac_build_gep0(&ctx
->ac
, ctx
->push_constants
, addr
);
2239 ptr
= cast_ptr(ctx
, ptr
, get_def_type(ctx
->nir
, &instr
->dest
.ssa
));
2241 return LLVMBuildLoad(ctx
->builder
, ptr
, "");
2244 static LLVMValueRef
visit_get_buffer_size(struct ac_nir_context
*ctx
,
2245 const nir_intrinsic_instr
*instr
)
2247 LLVMValueRef desc
= get_src(ctx
, instr
->src
[0]);
2249 return get_buffer_size(ctx
, desc
, false);
2251 static void visit_store_ssbo(struct ac_nir_context
*ctx
,
2252 nir_intrinsic_instr
*instr
)
2254 const char *store_name
;
2255 LLVMValueRef src_data
= get_src(ctx
, instr
->src
[0]);
2256 LLVMTypeRef data_type
= ctx
->ac
.f32
;
2257 int elem_size_mult
= get_elem_bits(&ctx
->ac
, LLVMTypeOf(src_data
)) / 32;
2258 int components_32bit
= elem_size_mult
* instr
->num_components
;
2259 unsigned writemask
= nir_intrinsic_write_mask(instr
);
2260 LLVMValueRef base_data
, base_offset
;
2261 LLVMValueRef params
[6];
2262 LLVMValueRef i1false
= LLVMConstInt(ctx
->ac
.i1
, 0, false);
2264 params
[1] = ctx
->abi
->load_ssbo(ctx
->abi
,
2265 get_src(ctx
, instr
->src
[1]), true);
2266 params
[2] = LLVMConstInt(ctx
->ac
.i32
, 0, false); /* vindex */
2267 params
[4] = i1false
; /* glc */
2268 params
[5] = i1false
; /* slc */
2270 if (components_32bit
> 1)
2271 data_type
= LLVMVectorType(ctx
->ac
.f32
, components_32bit
);
2273 base_data
= to_float(&ctx
->ac
, src_data
);
2274 base_data
= trim_vector(&ctx
->ac
, base_data
, instr
->num_components
);
2275 base_data
= LLVMBuildBitCast(ctx
->ac
.builder
, base_data
,
2277 base_offset
= get_src(ctx
, instr
->src
[2]); /* voffset */
2281 LLVMValueRef offset
;
2283 u_bit_scan_consecutive_range(&writemask
, &start
, &count
);
2285 /* Due to an LLVM limitation, split 3-element writes
2286 * into a 2-element and a 1-element write. */
2288 writemask
|= 1 << (start
+ 2);
2292 start
*= elem_size_mult
;
2293 count
*= elem_size_mult
;
2296 writemask
|= ((1u << (count
- 4)) - 1u) << (start
+ 4);
2301 store_name
= "llvm.amdgcn.buffer.store.v4f32";
2303 } else if (count
== 2) {
2304 LLVMTypeRef v2f32
= LLVMVectorType(ctx
->ac
.f32
, 2);
2306 tmp
= LLVMBuildExtractElement(ctx
->ac
.builder
,
2307 base_data
, LLVMConstInt(ctx
->ac
.i32
, start
, false), "");
2308 data
= LLVMBuildInsertElement(ctx
->ac
.builder
, LLVMGetUndef(v2f32
), tmp
,
2311 tmp
= LLVMBuildExtractElement(ctx
->ac
.builder
,
2312 base_data
, LLVMConstInt(ctx
->ac
.i32
, start
+ 1, false), "");
2313 data
= LLVMBuildInsertElement(ctx
->ac
.builder
, data
, tmp
,
2315 store_name
= "llvm.amdgcn.buffer.store.v2f32";
2319 if (get_llvm_num_components(base_data
) > 1)
2320 data
= LLVMBuildExtractElement(ctx
->ac
.builder
, base_data
,
2321 LLVMConstInt(ctx
->ac
.i32
, start
, false), "");
2324 store_name
= "llvm.amdgcn.buffer.store.f32";
2327 offset
= base_offset
;
2329 offset
= LLVMBuildAdd(ctx
->ac
.builder
, offset
, LLVMConstInt(ctx
->ac
.i32
, start
* 4, false), "");
2333 ac_build_intrinsic(&ctx
->ac
, store_name
,
2334 ctx
->ac
.voidt
, params
, 6, 0);
2338 static LLVMValueRef
visit_atomic_ssbo(struct ac_nir_context
*ctx
,
2339 const nir_intrinsic_instr
*instr
)
2342 LLVMValueRef params
[6];
2345 if (instr
->intrinsic
== nir_intrinsic_ssbo_atomic_comp_swap
) {
2346 params
[arg_count
++] = llvm_extract_elem(&ctx
->ac
, get_src(ctx
, instr
->src
[3]), 0);
2348 params
[arg_count
++] = llvm_extract_elem(&ctx
->ac
, get_src(ctx
, instr
->src
[2]), 0);
2349 params
[arg_count
++] = ctx
->abi
->load_ssbo(ctx
->abi
,
2350 get_src(ctx
, instr
->src
[0]),
2352 params
[arg_count
++] = LLVMConstInt(ctx
->ac
.i32
, 0, false); /* vindex */
2353 params
[arg_count
++] = get_src(ctx
, instr
->src
[1]); /* voffset */
2354 params
[arg_count
++] = LLVMConstInt(ctx
->ac
.i1
, 0, false); /* slc */
2356 switch (instr
->intrinsic
) {
2357 case nir_intrinsic_ssbo_atomic_add
:
2358 name
= "llvm.amdgcn.buffer.atomic.add";
2360 case nir_intrinsic_ssbo_atomic_imin
:
2361 name
= "llvm.amdgcn.buffer.atomic.smin";
2363 case nir_intrinsic_ssbo_atomic_umin
:
2364 name
= "llvm.amdgcn.buffer.atomic.umin";
2366 case nir_intrinsic_ssbo_atomic_imax
:
2367 name
= "llvm.amdgcn.buffer.atomic.smax";
2369 case nir_intrinsic_ssbo_atomic_umax
:
2370 name
= "llvm.amdgcn.buffer.atomic.umax";
2372 case nir_intrinsic_ssbo_atomic_and
:
2373 name
= "llvm.amdgcn.buffer.atomic.and";
2375 case nir_intrinsic_ssbo_atomic_or
:
2376 name
= "llvm.amdgcn.buffer.atomic.or";
2378 case nir_intrinsic_ssbo_atomic_xor
:
2379 name
= "llvm.amdgcn.buffer.atomic.xor";
2381 case nir_intrinsic_ssbo_atomic_exchange
:
2382 name
= "llvm.amdgcn.buffer.atomic.swap";
2384 case nir_intrinsic_ssbo_atomic_comp_swap
:
2385 name
= "llvm.amdgcn.buffer.atomic.cmpswap";
2391 return ac_build_intrinsic(&ctx
->ac
, name
, ctx
->ac
.i32
, params
, arg_count
, 0);
2394 static LLVMValueRef
visit_load_buffer(struct ac_nir_context
*ctx
,
2395 const nir_intrinsic_instr
*instr
)
2397 LLVMValueRef results
[2];
2398 int load_components
;
2399 int num_components
= instr
->num_components
;
2400 if (instr
->dest
.ssa
.bit_size
== 64)
2401 num_components
*= 2;
2403 for (int i
= 0; i
< num_components
; i
+= load_components
) {
2404 load_components
= MIN2(num_components
- i
, 4);
2405 const char *load_name
;
2406 LLVMTypeRef data_type
= ctx
->ac
.f32
;
2407 LLVMValueRef offset
= LLVMConstInt(ctx
->ac
.i32
, i
* 4, false);
2408 offset
= LLVMBuildAdd(ctx
->ac
.builder
, get_src(ctx
, instr
->src
[1]), offset
, "");
2410 if (load_components
== 3)
2411 data_type
= LLVMVectorType(ctx
->ac
.f32
, 4);
2412 else if (load_components
> 1)
2413 data_type
= LLVMVectorType(ctx
->ac
.f32
, load_components
);
2415 if (load_components
>= 3)
2416 load_name
= "llvm.amdgcn.buffer.load.v4f32";
2417 else if (load_components
== 2)
2418 load_name
= "llvm.amdgcn.buffer.load.v2f32";
2419 else if (load_components
== 1)
2420 load_name
= "llvm.amdgcn.buffer.load.f32";
2422 unreachable("unhandled number of components");
2424 LLVMValueRef i1false
= LLVMConstInt(ctx
->ac
.i1
, 0, false);
2425 LLVMValueRef params
[] = {
2426 ctx
->abi
->load_ssbo(ctx
->abi
,
2427 get_src(ctx
, instr
->src
[0]),
2429 LLVMConstInt(ctx
->ac
.i32
, 0, false),
2435 results
[i
] = ac_build_intrinsic(&ctx
->ac
, load_name
, data_type
, params
, 5, 0);
2439 LLVMValueRef ret
= results
[0];
2440 if (num_components
> 4 || num_components
== 3) {
2441 LLVMValueRef masks
[] = {
2442 LLVMConstInt(ctx
->ac
.i32
, 0, false), LLVMConstInt(ctx
->ac
.i32
, 1, false),
2443 LLVMConstInt(ctx
->ac
.i32
, 2, false), LLVMConstInt(ctx
->ac
.i32
, 3, false),
2444 LLVMConstInt(ctx
->ac
.i32
, 4, false), LLVMConstInt(ctx
->ac
.i32
, 5, false),
2445 LLVMConstInt(ctx
->ac
.i32
, 6, false), LLVMConstInt(ctx
->ac
.i32
, 7, false)
2448 LLVMValueRef swizzle
= LLVMConstVector(masks
, num_components
);
2449 ret
= LLVMBuildShuffleVector(ctx
->ac
.builder
, results
[0],
2450 results
[num_components
> 4 ? 1 : 0], swizzle
, "");
2453 return LLVMBuildBitCast(ctx
->ac
.builder
, ret
,
2454 get_def_type(ctx
, &instr
->dest
.ssa
), "");
2457 static LLVMValueRef
visit_load_ubo_buffer(struct ac_nir_context
*ctx
,
2458 const nir_intrinsic_instr
*instr
)
2460 LLVMValueRef results
[8], ret
;
2461 LLVMValueRef rsrc
= get_src(ctx
, instr
->src
[0]);
2462 LLVMValueRef offset
= get_src(ctx
, instr
->src
[1]);
2463 int num_components
= instr
->num_components
;
2465 if (ctx
->abi
->load_ubo
)
2466 rsrc
= ctx
->abi
->load_ubo(ctx
->abi
, rsrc
);
2468 if (instr
->dest
.ssa
.bit_size
== 64)
2469 num_components
*= 2;
2471 for (unsigned i
= 0; i
< num_components
; ++i
) {
2472 LLVMValueRef params
[] = {
2474 LLVMBuildAdd(ctx
->ac
.builder
, LLVMConstInt(ctx
->ac
.i32
, 4 * i
, 0),
2477 results
[i
] = ac_build_intrinsic(&ctx
->ac
, "llvm.SI.load.const.v4i32", ctx
->ac
.f32
,
2479 AC_FUNC_ATTR_READNONE
|
2480 AC_FUNC_ATTR_LEGACY
);
2484 ret
= ac_build_gather_values(&ctx
->ac
, results
, instr
->num_components
);
2485 return LLVMBuildBitCast(ctx
->ac
.builder
, ret
,
2486 get_def_type(ctx
, &instr
->dest
.ssa
), "");
2490 get_deref_offset(struct ac_nir_context
*ctx
, nir_deref_var
*deref
,
2491 bool vs_in
, unsigned *vertex_index_out
,
2492 LLVMValueRef
*vertex_index_ref
,
2493 unsigned *const_out
, LLVMValueRef
*indir_out
)
2495 unsigned const_offset
= 0;
2496 nir_deref
*tail
= &deref
->deref
;
2497 LLVMValueRef offset
= NULL
;
2499 if (vertex_index_out
!= NULL
|| vertex_index_ref
!= NULL
) {
2501 nir_deref_array
*deref_array
= nir_deref_as_array(tail
);
2502 if (vertex_index_out
)
2503 *vertex_index_out
= deref_array
->base_offset
;
2505 if (vertex_index_ref
) {
2506 LLVMValueRef vtx
= LLVMConstInt(ctx
->ac
.i32
, deref_array
->base_offset
, false);
2507 if (deref_array
->deref_array_type
== nir_deref_array_type_indirect
) {
2508 vtx
= LLVMBuildAdd(ctx
->ac
.builder
, vtx
, get_src(ctx
, deref_array
->indirect
), "");
2510 *vertex_index_ref
= vtx
;
2514 if (deref
->var
->data
.compact
) {
2515 assert(tail
->child
->deref_type
== nir_deref_type_array
);
2516 assert(glsl_type_is_scalar(glsl_without_array(deref
->var
->type
)));
2517 nir_deref_array
*deref_array
= nir_deref_as_array(tail
->child
);
2518 /* We always lower indirect dereferences for "compact" array vars. */
2519 assert(deref_array
->deref_array_type
== nir_deref_array_type_direct
);
2521 const_offset
= deref_array
->base_offset
;
2525 while (tail
->child
!= NULL
) {
2526 const struct glsl_type
*parent_type
= tail
->type
;
2529 if (tail
->deref_type
== nir_deref_type_array
) {
2530 nir_deref_array
*deref_array
= nir_deref_as_array(tail
);
2531 LLVMValueRef index
, stride
, local_offset
;
2532 unsigned size
= glsl_count_attribute_slots(tail
->type
, vs_in
);
2534 const_offset
+= size
* deref_array
->base_offset
;
2535 if (deref_array
->deref_array_type
== nir_deref_array_type_direct
)
2538 assert(deref_array
->deref_array_type
== nir_deref_array_type_indirect
);
2539 index
= get_src(ctx
, deref_array
->indirect
);
2540 stride
= LLVMConstInt(ctx
->ac
.i32
, size
, 0);
2541 local_offset
= LLVMBuildMul(ctx
->ac
.builder
, stride
, index
, "");
2544 offset
= LLVMBuildAdd(ctx
->ac
.builder
, offset
, local_offset
, "");
2546 offset
= local_offset
;
2547 } else if (tail
->deref_type
== nir_deref_type_struct
) {
2548 nir_deref_struct
*deref_struct
= nir_deref_as_struct(tail
);
2550 for (unsigned i
= 0; i
< deref_struct
->index
; i
++) {
2551 const struct glsl_type
*ft
= glsl_get_struct_field(parent_type
, i
);
2552 const_offset
+= glsl_count_attribute_slots(ft
, vs_in
);
2555 unreachable("unsupported deref type");
2559 if (const_offset
&& offset
)
2560 offset
= LLVMBuildAdd(ctx
->ac
.builder
, offset
,
2561 LLVMConstInt(ctx
->ac
.i32
, const_offset
, 0),
2564 *const_out
= const_offset
;
2565 *indir_out
= offset
;
2569 lds_load(struct nir_to_llvm_context
*ctx
,
2570 LLVMValueRef dw_addr
)
2573 value
= ac_build_indexed_load(&ctx
->ac
, ctx
->lds
, dw_addr
, false);
2578 lds_store(struct nir_to_llvm_context
*ctx
,
2579 LLVMValueRef dw_addr
, LLVMValueRef value
)
2581 value
= LLVMBuildBitCast(ctx
->builder
, value
, ctx
->i32
, "");
2582 ac_build_indexed_store(&ctx
->ac
, ctx
->lds
,
2586 /* The offchip buffer layout for TCS->TES is
2588 * - attribute 0 of patch 0 vertex 0
2589 * - attribute 0 of patch 0 vertex 1
2590 * - attribute 0 of patch 0 vertex 2
2592 * - attribute 0 of patch 1 vertex 0
2593 * - attribute 0 of patch 1 vertex 1
2595 * - attribute 1 of patch 0 vertex 0
2596 * - attribute 1 of patch 0 vertex 1
2598 * - per patch attribute 0 of patch 0
2599 * - per patch attribute 0 of patch 1
2602 * Note that every attribute has 4 components.
2604 static LLVMValueRef
get_tcs_tes_buffer_address(struct nir_to_llvm_context
*ctx
,
2605 LLVMValueRef vertex_index
,
2606 LLVMValueRef param_index
)
2608 LLVMValueRef base_addr
, vertices_per_patch
, num_patches
, total_vertices
;
2609 LLVMValueRef param_stride
, constant16
;
2610 LLVMValueRef rel_patch_id
= get_rel_patch_id(ctx
);
2612 vertices_per_patch
= unpack_param(&ctx
->ac
, ctx
->tcs_offchip_layout
, 9, 6);
2613 num_patches
= unpack_param(&ctx
->ac
, ctx
->tcs_offchip_layout
, 0, 9);
2614 total_vertices
= LLVMBuildMul(ctx
->builder
, vertices_per_patch
,
2617 constant16
= LLVMConstInt(ctx
->i32
, 16, false);
2619 base_addr
= LLVMBuildMul(ctx
->builder
, rel_patch_id
,
2620 vertices_per_patch
, "");
2622 base_addr
= LLVMBuildAdd(ctx
->builder
, base_addr
,
2625 param_stride
= total_vertices
;
2627 base_addr
= rel_patch_id
;
2628 param_stride
= num_patches
;
2631 base_addr
= LLVMBuildAdd(ctx
->builder
, base_addr
,
2632 LLVMBuildMul(ctx
->builder
, param_index
,
2633 param_stride
, ""), "");
2635 base_addr
= LLVMBuildMul(ctx
->builder
, base_addr
, constant16
, "");
2637 if (!vertex_index
) {
2638 LLVMValueRef patch_data_offset
=
2639 unpack_param(&ctx
->ac
, ctx
->tcs_offchip_layout
, 16, 16);
2641 base_addr
= LLVMBuildAdd(ctx
->builder
, base_addr
,
2642 patch_data_offset
, "");
2647 static LLVMValueRef
get_tcs_tes_buffer_address_params(struct nir_to_llvm_context
*ctx
,
2649 unsigned const_index
,
2651 LLVMValueRef vertex_index
,
2652 LLVMValueRef indir_index
)
2654 LLVMValueRef param_index
;
2657 param_index
= LLVMBuildAdd(ctx
->builder
, LLVMConstInt(ctx
->i32
, param
, false),
2660 if (const_index
&& !is_compact
)
2661 param
+= const_index
;
2662 param_index
= LLVMConstInt(ctx
->i32
, param
, false);
2664 return get_tcs_tes_buffer_address(ctx
, vertex_index
, param_index
);
2668 mark_tess_output(struct nir_to_llvm_context
*ctx
,
2669 bool is_patch
, uint32_t param
)
2673 ctx
->tess_patch_outputs_written
|= (1ull << param
);
2675 ctx
->tess_outputs_written
|= (1ull << param
);
2679 get_dw_address(struct nir_to_llvm_context
*ctx
,
2680 LLVMValueRef dw_addr
,
2682 unsigned const_index
,
2683 bool compact_const_index
,
2684 LLVMValueRef vertex_index
,
2685 LLVMValueRef stride
,
2686 LLVMValueRef indir_index
)
2691 dw_addr
= LLVMBuildAdd(ctx
->builder
, dw_addr
,
2692 LLVMBuildMul(ctx
->builder
,
2698 dw_addr
= LLVMBuildAdd(ctx
->builder
, dw_addr
,
2699 LLVMBuildMul(ctx
->builder
, indir_index
,
2700 LLVMConstInt(ctx
->i32
, 4, false), ""), "");
2701 else if (const_index
&& !compact_const_index
)
2702 dw_addr
= LLVMBuildAdd(ctx
->builder
, dw_addr
,
2703 LLVMConstInt(ctx
->i32
, const_index
, false), "");
2705 dw_addr
= LLVMBuildAdd(ctx
->builder
, dw_addr
,
2706 LLVMConstInt(ctx
->i32
, param
* 4, false), "");
2708 if (const_index
&& compact_const_index
)
2709 dw_addr
= LLVMBuildAdd(ctx
->builder
, dw_addr
,
2710 LLVMConstInt(ctx
->i32
, const_index
, false), "");
2715 load_tcs_input(struct nir_to_llvm_context
*ctx
,
2716 nir_intrinsic_instr
*instr
)
2718 LLVMValueRef dw_addr
, stride
;
2719 unsigned const_index
;
2720 LLVMValueRef vertex_index
;
2721 LLVMValueRef indir_index
;
2723 LLVMValueRef value
[4], result
;
2724 const bool per_vertex
= nir_is_per_vertex_io(instr
->variables
[0]->var
, ctx
->stage
);
2725 const bool is_compact
= instr
->variables
[0]->var
->data
.compact
;
2726 param
= shader_io_get_unique_index(instr
->variables
[0]->var
->data
.location
);
2727 get_deref_offset(ctx
->nir
, instr
->variables
[0],
2728 false, NULL
, per_vertex
? &vertex_index
: NULL
,
2729 &const_index
, &indir_index
);
2731 stride
= unpack_param(&ctx
->ac
, ctx
->tcs_in_layout
, 13, 8);
2732 dw_addr
= get_tcs_in_current_patch_offset(ctx
);
2733 dw_addr
= get_dw_address(ctx
, dw_addr
, param
, const_index
, is_compact
, vertex_index
, stride
,
2736 for (unsigned i
= 0; i
< instr
->num_components
; i
++) {
2737 value
[i
] = lds_load(ctx
, dw_addr
);
2738 dw_addr
= LLVMBuildAdd(ctx
->builder
, dw_addr
,
2741 result
= ac_build_gather_values(&ctx
->ac
, value
, instr
->num_components
);
2742 result
= LLVMBuildBitCast(ctx
->builder
, result
, get_def_type(ctx
->nir
, &instr
->dest
.ssa
), "");
2747 load_tcs_output(struct nir_to_llvm_context
*ctx
,
2748 nir_intrinsic_instr
*instr
)
2750 LLVMValueRef dw_addr
, stride
;
2751 LLVMValueRef value
[4], result
;
2752 LLVMValueRef vertex_index
= NULL
;
2753 LLVMValueRef indir_index
= NULL
;
2754 unsigned const_index
= 0;
2756 const bool per_vertex
= nir_is_per_vertex_io(instr
->variables
[0]->var
, ctx
->stage
);
2757 const bool is_compact
= instr
->variables
[0]->var
->data
.compact
;
2758 param
= shader_io_get_unique_index(instr
->variables
[0]->var
->data
.location
);
2759 get_deref_offset(ctx
->nir
, instr
->variables
[0],
2760 false, NULL
, per_vertex
? &vertex_index
: NULL
,
2761 &const_index
, &indir_index
);
2763 if (!instr
->variables
[0]->var
->data
.patch
) {
2764 stride
= unpack_param(&ctx
->ac
, ctx
->tcs_out_layout
, 13, 8);
2765 dw_addr
= get_tcs_out_current_patch_offset(ctx
);
2767 dw_addr
= get_tcs_out_current_patch_data_offset(ctx
);
2770 dw_addr
= get_dw_address(ctx
, dw_addr
, param
, const_index
, is_compact
, vertex_index
, stride
,
2773 for (unsigned i
= 0; i
< instr
->num_components
; i
++) {
2774 value
[i
] = lds_load(ctx
, dw_addr
);
2775 dw_addr
= LLVMBuildAdd(ctx
->builder
, dw_addr
,
2778 result
= ac_build_gather_values(&ctx
->ac
, value
, instr
->num_components
);
2779 result
= LLVMBuildBitCast(ctx
->builder
, result
, get_def_type(ctx
->nir
, &instr
->dest
.ssa
), "");
2784 store_tcs_output(struct nir_to_llvm_context
*ctx
,
2785 nir_intrinsic_instr
*instr
,
2789 LLVMValueRef stride
, dw_addr
;
2790 LLVMValueRef buf_addr
= NULL
;
2791 LLVMValueRef vertex_index
= NULL
;
2792 LLVMValueRef indir_index
= NULL
;
2793 unsigned const_index
= 0;
2795 const bool per_vertex
= nir_is_per_vertex_io(instr
->variables
[0]->var
, ctx
->stage
);
2796 const bool is_compact
= instr
->variables
[0]->var
->data
.compact
;
2798 get_deref_offset(ctx
->nir
, instr
->variables
[0],
2799 false, NULL
, per_vertex
? &vertex_index
: NULL
,
2800 &const_index
, &indir_index
);
2802 param
= shader_io_get_unique_index(instr
->variables
[0]->var
->data
.location
);
2803 if (instr
->variables
[0]->var
->data
.location
== VARYING_SLOT_CLIP_DIST0
&&
2804 is_compact
&& const_index
> 3) {
2809 if (!instr
->variables
[0]->var
->data
.patch
) {
2810 stride
= unpack_param(&ctx
->ac
, ctx
->tcs_out_layout
, 13, 8);
2811 dw_addr
= get_tcs_out_current_patch_offset(ctx
);
2813 dw_addr
= get_tcs_out_current_patch_data_offset(ctx
);
2816 mark_tess_output(ctx
, instr
->variables
[0]->var
->data
.patch
, param
);
2818 dw_addr
= get_dw_address(ctx
, dw_addr
, param
, const_index
, is_compact
, vertex_index
, stride
,
2820 buf_addr
= get_tcs_tes_buffer_address_params(ctx
, param
, const_index
, is_compact
,
2821 vertex_index
, indir_index
);
2823 unsigned base
= is_compact
? const_index
: 0;
2824 for (unsigned chan
= 0; chan
< 8; chan
++) {
2825 bool is_tess_factor
= false;
2826 if (!(writemask
& (1 << chan
)))
2828 LLVMValueRef value
= llvm_extract_elem(&ctx
->ac
, src
, chan
);
2830 lds_store(ctx
, dw_addr
, value
);
2832 if (instr
->variables
[0]->var
->data
.location
== VARYING_SLOT_TESS_LEVEL_INNER
||
2833 instr
->variables
[0]->var
->data
.location
== VARYING_SLOT_TESS_LEVEL_OUTER
)
2834 is_tess_factor
= true;
2836 if (!is_tess_factor
&& writemask
!= 0xF)
2837 ac_build_buffer_store_dword(&ctx
->ac
, ctx
->hs_ring_tess_offchip
, value
, 1,
2838 buf_addr
, ctx
->oc_lds
,
2839 4 * (base
+ chan
), 1, 0, true, false);
2841 dw_addr
= LLVMBuildAdd(ctx
->builder
, dw_addr
,
2845 if (writemask
== 0xF) {
2846 ac_build_buffer_store_dword(&ctx
->ac
, ctx
->hs_ring_tess_offchip
, src
, 4,
2847 buf_addr
, ctx
->oc_lds
,
2848 (base
* 4), 1, 0, true, false);
2853 load_tes_input(struct nir_to_llvm_context
*ctx
,
2854 const nir_intrinsic_instr
*instr
)
2856 LLVMValueRef buf_addr
;
2857 LLVMValueRef result
;
2858 LLVMValueRef vertex_index
= NULL
;
2859 LLVMValueRef indir_index
= NULL
;
2860 unsigned const_index
= 0;
2862 const bool per_vertex
= nir_is_per_vertex_io(instr
->variables
[0]->var
, ctx
->stage
);
2863 const bool is_compact
= instr
->variables
[0]->var
->data
.compact
;
2865 get_deref_offset(ctx
->nir
, instr
->variables
[0],
2866 false, NULL
, per_vertex
? &vertex_index
: NULL
,
2867 &const_index
, &indir_index
);
2868 param
= shader_io_get_unique_index(instr
->variables
[0]->var
->data
.location
);
2869 if (instr
->variables
[0]->var
->data
.location
== VARYING_SLOT_CLIP_DIST0
&&
2870 is_compact
&& const_index
> 3) {
2874 buf_addr
= get_tcs_tes_buffer_address_params(ctx
, param
, const_index
,
2875 is_compact
, vertex_index
, indir_index
);
2877 result
= ac_build_buffer_load(&ctx
->ac
, ctx
->hs_ring_tess_offchip
, instr
->num_components
, NULL
,
2878 buf_addr
, ctx
->oc_lds
, is_compact
? (4 * const_index
) : 0, 1, 0, true, false);
2879 result
= trim_vector(&ctx
->ac
, result
, instr
->num_components
);
2880 result
= LLVMBuildBitCast(ctx
->builder
, result
, get_def_type(ctx
->nir
, &instr
->dest
.ssa
), "");
2885 load_gs_input(struct nir_to_llvm_context
*ctx
,
2886 nir_intrinsic_instr
*instr
)
2888 LLVMValueRef indir_index
, vtx_offset
;
2889 unsigned const_index
;
2890 LLVMValueRef args
[9];
2891 unsigned param
, vtx_offset_param
;
2892 LLVMValueRef value
[4], result
;
2893 unsigned vertex_index
;
2894 get_deref_offset(ctx
->nir
, instr
->variables
[0],
2895 false, &vertex_index
, NULL
,
2896 &const_index
, &indir_index
);
2897 vtx_offset_param
= vertex_index
;
2898 assert(vtx_offset_param
< 6);
2899 vtx_offset
= LLVMBuildMul(ctx
->builder
, ctx
->gs_vtx_offset
[vtx_offset_param
],
2900 LLVMConstInt(ctx
->i32
, 4, false), "");
2902 param
= shader_io_get_unique_index(instr
->variables
[0]->var
->data
.location
);
2903 for (unsigned i
= 0; i
< instr
->num_components
; i
++) {
2905 args
[0] = ctx
->esgs_ring
;
2906 args
[1] = vtx_offset
;
2907 args
[2] = LLVMConstInt(ctx
->i32
, (param
* 4 + i
+ const_index
) * 256, false);
2908 args
[3] = ctx
->i32zero
;
2909 args
[4] = ctx
->i32one
; /* OFFEN */
2910 args
[5] = ctx
->i32zero
; /* IDXEN */
2911 args
[6] = ctx
->i32one
; /* GLC */
2912 args
[7] = ctx
->i32zero
; /* SLC */
2913 args
[8] = ctx
->i32zero
; /* TFE */
2915 value
[i
] = ac_build_intrinsic(&ctx
->ac
, "llvm.SI.buffer.load.dword.i32.i32",
2917 AC_FUNC_ATTR_READONLY
|
2918 AC_FUNC_ATTR_LEGACY
);
2920 result
= ac_build_gather_values(&ctx
->ac
, value
, instr
->num_components
);
2926 build_gep_for_deref(struct ac_nir_context
*ctx
,
2927 nir_deref_var
*deref
)
2929 struct hash_entry
*entry
= _mesa_hash_table_search(ctx
->vars
, deref
->var
);
2930 assert(entry
->data
);
2931 LLVMValueRef val
= entry
->data
;
2932 nir_deref
*tail
= deref
->deref
.child
;
2933 while (tail
!= NULL
) {
2934 LLVMValueRef offset
;
2935 switch (tail
->deref_type
) {
2936 case nir_deref_type_array
: {
2937 nir_deref_array
*array
= nir_deref_as_array(tail
);
2938 offset
= LLVMConstInt(ctx
->ac
.i32
, array
->base_offset
, 0);
2939 if (array
->deref_array_type
==
2940 nir_deref_array_type_indirect
) {
2941 offset
= LLVMBuildAdd(ctx
->ac
.builder
, offset
,
2948 case nir_deref_type_struct
: {
2949 nir_deref_struct
*deref_struct
=
2950 nir_deref_as_struct(tail
);
2951 offset
= LLVMConstInt(ctx
->ac
.i32
,
2952 deref_struct
->index
, 0);
2956 unreachable("bad deref type");
2958 val
= ac_build_gep0(&ctx
->ac
, val
, offset
);
2964 static LLVMValueRef
visit_load_var(struct ac_nir_context
*ctx
,
2965 nir_intrinsic_instr
*instr
)
2967 LLVMValueRef values
[8];
2968 int idx
= instr
->variables
[0]->var
->data
.driver_location
;
2969 int ve
= instr
->dest
.ssa
.num_components
;
2970 LLVMValueRef indir_index
;
2972 unsigned const_index
;
2973 bool vs_in
= ctx
->stage
== MESA_SHADER_VERTEX
&&
2974 instr
->variables
[0]->var
->data
.mode
== nir_var_shader_in
;
2975 get_deref_offset(ctx
, instr
->variables
[0], vs_in
, NULL
, NULL
,
2976 &const_index
, &indir_index
);
2978 if (instr
->dest
.ssa
.bit_size
== 64)
2981 switch (instr
->variables
[0]->var
->data
.mode
) {
2982 case nir_var_shader_in
:
2983 if (ctx
->stage
== MESA_SHADER_TESS_CTRL
)
2984 return load_tcs_input(ctx
->nctx
, instr
);
2985 if (ctx
->stage
== MESA_SHADER_TESS_EVAL
)
2986 return load_tes_input(ctx
->nctx
, instr
);
2987 if (ctx
->stage
== MESA_SHADER_GEOMETRY
) {
2988 return load_gs_input(ctx
->nctx
, instr
);
2990 for (unsigned chan
= 0; chan
< ve
; chan
++) {
2992 unsigned count
= glsl_count_attribute_slots(
2993 instr
->variables
[0]->var
->type
,
2994 ctx
->stage
== MESA_SHADER_VERTEX
);
2996 LLVMValueRef tmp_vec
= ac_build_gather_values_extended(
2997 &ctx
->ac
, ctx
->abi
->inputs
+ idx
+ chan
, count
,
3000 values
[chan
] = LLVMBuildExtractElement(ctx
->ac
.builder
,
3004 values
[chan
] = ctx
->abi
->inputs
[idx
+ chan
+ const_index
* 4];
3008 for (unsigned chan
= 0; chan
< ve
; chan
++) {
3010 unsigned count
= glsl_count_attribute_slots(
3011 instr
->variables
[0]->var
->type
, false);
3013 LLVMValueRef tmp_vec
= ac_build_gather_values_extended(
3014 &ctx
->ac
, ctx
->locals
+ idx
+ chan
, count
,
3017 values
[chan
] = LLVMBuildExtractElement(ctx
->ac
.builder
,
3021 values
[chan
] = LLVMBuildLoad(ctx
->ac
.builder
, ctx
->locals
[idx
+ chan
+ const_index
* 4], "");
3025 case nir_var_shared
: {
3026 LLVMValueRef address
= build_gep_for_deref(ctx
,
3027 instr
->variables
[0]);
3028 LLVMValueRef val
= LLVMBuildLoad(ctx
->ac
.builder
, address
, "");
3029 return LLVMBuildBitCast(ctx
->ac
.builder
, val
,
3030 get_def_type(ctx
, &instr
->dest
.ssa
),
3033 case nir_var_shader_out
:
3034 if (ctx
->stage
== MESA_SHADER_TESS_CTRL
)
3035 return load_tcs_output(ctx
->nctx
, instr
);
3036 for (unsigned chan
= 0; chan
< ve
; chan
++) {
3038 unsigned count
= glsl_count_attribute_slots(
3039 instr
->variables
[0]->var
->type
, false);
3041 LLVMValueRef tmp_vec
= ac_build_gather_values_extended(
3042 &ctx
->ac
, ctx
->outputs
+ idx
+ chan
, count
,
3045 values
[chan
] = LLVMBuildExtractElement(ctx
->ac
.builder
,
3049 values
[chan
] = LLVMBuildLoad(ctx
->ac
.builder
,
3050 ctx
->outputs
[idx
+ chan
+ const_index
* 4],
3056 unreachable("unhandle variable mode");
3058 ret
= ac_build_gather_values(&ctx
->ac
, values
, ve
);
3059 return LLVMBuildBitCast(ctx
->ac
.builder
, ret
, get_def_type(ctx
, &instr
->dest
.ssa
), "");
3063 visit_store_var(struct ac_nir_context
*ctx
,
3064 nir_intrinsic_instr
*instr
)
3066 LLVMValueRef temp_ptr
, value
;
3067 int idx
= instr
->variables
[0]->var
->data
.driver_location
;
3068 LLVMValueRef src
= to_float(&ctx
->ac
, get_src(ctx
, instr
->src
[0]));
3069 int writemask
= instr
->const_index
[0];
3070 LLVMValueRef indir_index
;
3071 unsigned const_index
;
3072 get_deref_offset(ctx
, instr
->variables
[0], false,
3073 NULL
, NULL
, &const_index
, &indir_index
);
3075 if (get_elem_bits(&ctx
->ac
, LLVMTypeOf(src
)) == 64) {
3076 int old_writemask
= writemask
;
3078 src
= LLVMBuildBitCast(ctx
->ac
.builder
, src
,
3079 LLVMVectorType(ctx
->ac
.f32
, get_llvm_num_components(src
) * 2),
3083 for (unsigned chan
= 0; chan
< 4; chan
++) {
3084 if (old_writemask
& (1 << chan
))
3085 writemask
|= 3u << (2 * chan
);
3089 switch (instr
->variables
[0]->var
->data
.mode
) {
3090 case nir_var_shader_out
:
3092 if (ctx
->stage
== MESA_SHADER_TESS_CTRL
) {
3093 store_tcs_output(ctx
->nctx
, instr
, src
, writemask
);
3097 for (unsigned chan
= 0; chan
< 8; chan
++) {
3099 if (!(writemask
& (1 << chan
)))
3102 value
= llvm_extract_elem(&ctx
->ac
, src
, chan
);
3104 if (instr
->variables
[0]->var
->data
.compact
)
3107 unsigned count
= glsl_count_attribute_slots(
3108 instr
->variables
[0]->var
->type
, false);
3110 LLVMValueRef tmp_vec
= ac_build_gather_values_extended(
3111 &ctx
->ac
, ctx
->outputs
+ idx
+ chan
, count
,
3112 stride
, true, true);
3114 tmp_vec
= LLVMBuildInsertElement(ctx
->ac
.builder
, tmp_vec
,
3115 value
, indir_index
, "");
3116 build_store_values_extended(&ctx
->ac
, ctx
->outputs
+ idx
+ chan
,
3117 count
, stride
, tmp_vec
);
3120 temp_ptr
= ctx
->outputs
[idx
+ chan
+ const_index
* stride
];
3122 LLVMBuildStore(ctx
->ac
.builder
, value
, temp_ptr
);
3127 for (unsigned chan
= 0; chan
< 8; chan
++) {
3128 if (!(writemask
& (1 << chan
)))
3131 value
= llvm_extract_elem(&ctx
->ac
, src
, chan
);
3133 unsigned count
= glsl_count_attribute_slots(
3134 instr
->variables
[0]->var
->type
, false);
3136 LLVMValueRef tmp_vec
= ac_build_gather_values_extended(
3137 &ctx
->ac
, ctx
->locals
+ idx
+ chan
, count
,
3140 tmp_vec
= LLVMBuildInsertElement(ctx
->ac
.builder
, tmp_vec
,
3141 value
, indir_index
, "");
3142 build_store_values_extended(&ctx
->ac
, ctx
->locals
+ idx
+ chan
,
3145 temp_ptr
= ctx
->locals
[idx
+ chan
+ const_index
* 4];
3147 LLVMBuildStore(ctx
->ac
.builder
, value
, temp_ptr
);
3151 case nir_var_shared
: {
3152 int writemask
= instr
->const_index
[0];
3153 LLVMValueRef address
= build_gep_for_deref(ctx
,
3154 instr
->variables
[0]);
3155 LLVMValueRef val
= get_src(ctx
, instr
->src
[0]);
3156 unsigned components
=
3157 glsl_get_vector_elements(
3158 nir_deref_tail(&instr
->variables
[0]->deref
)->type
);
3159 if (writemask
== (1 << components
) - 1) {
3160 val
= LLVMBuildBitCast(
3161 ctx
->ac
.builder
, val
,
3162 LLVMGetElementType(LLVMTypeOf(address
)), "");
3163 LLVMBuildStore(ctx
->ac
.builder
, val
, address
);
3165 for (unsigned chan
= 0; chan
< 4; chan
++) {
3166 if (!(writemask
& (1 << chan
)))
3169 LLVMBuildStructGEP(ctx
->ac
.builder
,
3171 LLVMValueRef src
= llvm_extract_elem(&ctx
->ac
, val
,
3173 src
= LLVMBuildBitCast(
3174 ctx
->ac
.builder
, src
,
3175 LLVMGetElementType(LLVMTypeOf(ptr
)), "");
3176 LLVMBuildStore(ctx
->ac
.builder
, src
, ptr
);
3186 static int image_type_to_components_count(enum glsl_sampler_dim dim
, bool array
)
3189 case GLSL_SAMPLER_DIM_BUF
:
3191 case GLSL_SAMPLER_DIM_1D
:
3192 return array
? 2 : 1;
3193 case GLSL_SAMPLER_DIM_2D
:
3194 return array
? 3 : 2;
3195 case GLSL_SAMPLER_DIM_MS
:
3196 return array
? 4 : 3;
3197 case GLSL_SAMPLER_DIM_3D
:
3198 case GLSL_SAMPLER_DIM_CUBE
:
3200 case GLSL_SAMPLER_DIM_RECT
:
3201 case GLSL_SAMPLER_DIM_SUBPASS
:
3203 case GLSL_SAMPLER_DIM_SUBPASS_MS
:
3213 /* Adjust the sample index according to FMASK.
3215 * For uncompressed MSAA surfaces, FMASK should return 0x76543210,
3216 * which is the identity mapping. Each nibble says which physical sample
3217 * should be fetched to get that sample.
3219 * For example, 0x11111100 means there are only 2 samples stored and
3220 * the second sample covers 3/4 of the pixel. When reading samples 0
3221 * and 1, return physical sample 0 (determined by the first two 0s
3222 * in FMASK), otherwise return physical sample 1.
3224 * The sample index should be adjusted as follows:
3225 * sample_index = (fmask >> (sample_index * 4)) & 0xF;
3227 static LLVMValueRef
adjust_sample_index_using_fmask(struct ac_llvm_context
*ctx
,
3228 LLVMValueRef coord_x
, LLVMValueRef coord_y
,
3229 LLVMValueRef coord_z
,
3230 LLVMValueRef sample_index
,
3231 LLVMValueRef fmask_desc_ptr
)
3233 LLVMValueRef fmask_load_address
[4];
3236 fmask_load_address
[0] = coord_x
;
3237 fmask_load_address
[1] = coord_y
;
3239 fmask_load_address
[2] = coord_z
;
3240 fmask_load_address
[3] = LLVMGetUndef(ctx
->i32
);
3243 struct ac_image_args args
= {0};
3245 args
.opcode
= ac_image_load
;
3246 args
.da
= coord_z
? true : false;
3247 args
.resource
= fmask_desc_ptr
;
3249 args
.addr
= ac_build_gather_values(ctx
, fmask_load_address
, coord_z
? 4 : 2);
3251 res
= ac_build_image_opcode(ctx
, &args
);
3253 res
= to_integer(ctx
, res
);
3254 LLVMValueRef four
= LLVMConstInt(ctx
->i32
, 4, false);
3255 LLVMValueRef F
= LLVMConstInt(ctx
->i32
, 0xf, false);
3257 LLVMValueRef fmask
= LLVMBuildExtractElement(ctx
->builder
,
3261 LLVMValueRef sample_index4
=
3262 LLVMBuildMul(ctx
->builder
, sample_index
, four
, "");
3263 LLVMValueRef shifted_fmask
=
3264 LLVMBuildLShr(ctx
->builder
, fmask
, sample_index4
, "");
3265 LLVMValueRef final_sample
=
3266 LLVMBuildAnd(ctx
->builder
, shifted_fmask
, F
, "");
3268 /* Don't rewrite the sample index if WORD1.DATA_FORMAT of the FMASK
3269 * resource descriptor is 0 (invalid),
3271 LLVMValueRef fmask_desc
=
3272 LLVMBuildBitCast(ctx
->builder
, fmask_desc_ptr
,
3275 LLVMValueRef fmask_word1
=
3276 LLVMBuildExtractElement(ctx
->builder
, fmask_desc
,
3279 LLVMValueRef word1_is_nonzero
=
3280 LLVMBuildICmp(ctx
->builder
, LLVMIntNE
,
3281 fmask_word1
, ctx
->i32_0
, "");
3283 /* Replace the MSAA sample index. */
3285 LLVMBuildSelect(ctx
->builder
, word1_is_nonzero
,
3286 final_sample
, sample_index
, "");
3287 return sample_index
;
3290 static LLVMValueRef
get_image_coords(struct ac_nir_context
*ctx
,
3291 const nir_intrinsic_instr
*instr
)
3293 const struct glsl_type
*type
= instr
->variables
[0]->var
->type
;
3294 if(instr
->variables
[0]->deref
.child
)
3295 type
= instr
->variables
[0]->deref
.child
->type
;
3297 LLVMValueRef src0
= get_src(ctx
, instr
->src
[0]);
3298 LLVMValueRef coords
[4];
3299 LLVMValueRef masks
[] = {
3300 LLVMConstInt(ctx
->ac
.i32
, 0, false), LLVMConstInt(ctx
->ac
.i32
, 1, false),
3301 LLVMConstInt(ctx
->ac
.i32
, 2, false), LLVMConstInt(ctx
->ac
.i32
, 3, false),
3304 LLVMValueRef sample_index
= llvm_extract_elem(&ctx
->ac
, get_src(ctx
, instr
->src
[1]), 0);
3307 enum glsl_sampler_dim dim
= glsl_get_sampler_dim(type
);
3308 bool add_frag_pos
= (dim
== GLSL_SAMPLER_DIM_SUBPASS
||
3309 dim
== GLSL_SAMPLER_DIM_SUBPASS_MS
);
3310 bool is_ms
= (dim
== GLSL_SAMPLER_DIM_MS
||
3311 dim
== GLSL_SAMPLER_DIM_SUBPASS_MS
);
3313 count
= image_type_to_components_count(dim
,
3314 glsl_sampler_type_is_array(type
));
3317 LLVMValueRef fmask_load_address
[3];
3320 fmask_load_address
[0] = LLVMBuildExtractElement(ctx
->ac
.builder
, src0
, masks
[0], "");
3321 fmask_load_address
[1] = LLVMBuildExtractElement(ctx
->ac
.builder
, src0
, masks
[1], "");
3322 if (glsl_sampler_type_is_array(type
))
3323 fmask_load_address
[2] = LLVMBuildExtractElement(ctx
->ac
.builder
, src0
, masks
[2], "");
3325 fmask_load_address
[2] = NULL
;
3327 for (chan
= 0; chan
< 2; ++chan
)
3328 fmask_load_address
[chan
] =
3329 LLVMBuildAdd(ctx
->ac
.builder
, fmask_load_address
[chan
],
3330 LLVMBuildFPToUI(ctx
->ac
.builder
, ctx
->abi
->frag_pos
[chan
],
3331 ctx
->ac
.i32
, ""), "");
3333 sample_index
= adjust_sample_index_using_fmask(&ctx
->ac
,
3334 fmask_load_address
[0],
3335 fmask_load_address
[1],
3336 fmask_load_address
[2],
3338 get_sampler_desc(ctx
, instr
->variables
[0], AC_DESC_FMASK
, true, false));
3341 if (instr
->src
[0].ssa
->num_components
)
3342 res
= LLVMBuildExtractElement(ctx
->ac
.builder
, src0
, masks
[0], "");
3349 for (chan
= 0; chan
< count
; ++chan
) {
3350 coords
[chan
] = LLVMBuildExtractElement(ctx
->ac
.builder
, src0
, masks
[chan
], "");
3354 for (chan
= 0; chan
< count
; ++chan
)
3355 coords
[chan
] = LLVMBuildAdd(ctx
->ac
.builder
, coords
[chan
], LLVMBuildFPToUI(ctx
->ac
.builder
, ctx
->abi
->frag_pos
[chan
],
3356 ctx
->ac
.i32
, ""), "");
3359 coords
[count
] = sample_index
;
3364 coords
[3] = LLVMGetUndef(ctx
->ac
.i32
);
3367 res
= ac_build_gather_values(&ctx
->ac
, coords
, count
);
3372 static LLVMValueRef
visit_image_load(struct ac_nir_context
*ctx
,
3373 const nir_intrinsic_instr
*instr
)
3375 LLVMValueRef params
[7];
3377 char intrinsic_name
[64];
3378 const nir_variable
*var
= instr
->variables
[0]->var
;
3379 const struct glsl_type
*type
= var
->type
;
3380 LLVMValueRef i1false
= LLVMConstInt(ctx
->ac
.i1
, 0, false);
3381 LLVMValueRef i1true
= LLVMConstInt(ctx
->ac
.i1
, 1, false);
3383 if(instr
->variables
[0]->deref
.child
)
3384 type
= instr
->variables
[0]->deref
.child
->type
;
3386 type
= glsl_without_array(type
);
3387 if (glsl_get_sampler_dim(type
) == GLSL_SAMPLER_DIM_BUF
) {
3388 params
[0] = get_sampler_desc(ctx
, instr
->variables
[0], AC_DESC_BUFFER
, true, false);
3389 params
[1] = LLVMBuildExtractElement(ctx
->ac
.builder
, get_src(ctx
, instr
->src
[0]),
3390 ctx
->ac
.i32_0
, ""); /* vindex */
3391 params
[2] = ctx
->ac
.i32_0
; /* voffset */
3392 params
[3] = i1false
; /* glc */
3393 params
[4] = i1false
; /* slc */
3394 res
= ac_build_intrinsic(&ctx
->ac
, "llvm.amdgcn.buffer.load.format.v4f32", ctx
->ac
.v4f32
,
3397 res
= trim_vector(&ctx
->ac
, res
, instr
->dest
.ssa
.num_components
);
3398 res
= to_integer(&ctx
->ac
, res
);
3400 bool is_da
= glsl_sampler_type_is_array(type
) ||
3401 glsl_get_sampler_dim(type
) == GLSL_SAMPLER_DIM_CUBE
;
3402 LLVMValueRef da
= is_da
? i1true
: i1false
;
3403 LLVMValueRef glc
= i1false
;
3404 LLVMValueRef slc
= i1false
;
3406 params
[0] = get_image_coords(ctx
, instr
);
3407 params
[1] = get_sampler_desc(ctx
, instr
->variables
[0], AC_DESC_IMAGE
, true, false);
3408 params
[2] = LLVMConstInt(ctx
->ac
.i32
, 15, false); /* dmask */
3409 if (HAVE_LLVM
<= 0x0309) {
3410 params
[3] = i1false
; /* r128 */
3415 LLVMValueRef lwe
= i1false
;
3422 ac_get_image_intr_name("llvm.amdgcn.image.load",
3423 ctx
->ac
.v4f32
, /* vdata */
3424 LLVMTypeOf(params
[0]), /* coords */
3425 LLVMTypeOf(params
[1]), /* rsrc */
3426 intrinsic_name
, sizeof(intrinsic_name
));
3428 res
= ac_build_intrinsic(&ctx
->ac
, intrinsic_name
, ctx
->ac
.v4f32
,
3429 params
, 7, AC_FUNC_ATTR_READONLY
);
3431 return to_integer(&ctx
->ac
, res
);
3434 static void visit_image_store(struct ac_nir_context
*ctx
,
3435 nir_intrinsic_instr
*instr
)
3437 LLVMValueRef params
[8];
3438 char intrinsic_name
[64];
3439 const nir_variable
*var
= instr
->variables
[0]->var
;
3440 const struct glsl_type
*type
= glsl_without_array(var
->type
);
3441 LLVMValueRef i1false
= LLVMConstInt(ctx
->ac
.i1
, 0, false);
3442 LLVMValueRef i1true
= LLVMConstInt(ctx
->ac
.i1
, 1, false);
3443 LLVMValueRef glc
= i1false
;
3444 bool force_glc
= ctx
->abi
->chip_class
== SI
;
3448 if (glsl_get_sampler_dim(type
) == GLSL_SAMPLER_DIM_BUF
) {
3449 params
[0] = to_float(&ctx
->ac
, get_src(ctx
, instr
->src
[2])); /* data */
3450 params
[1] = get_sampler_desc(ctx
, instr
->variables
[0], AC_DESC_BUFFER
, true, true);
3451 params
[2] = LLVMBuildExtractElement(ctx
->ac
.builder
, get_src(ctx
, instr
->src
[0]),
3452 ctx
->ac
.i32_0
, ""); /* vindex */
3453 params
[3] = ctx
->ac
.i32_0
; /* voffset */
3454 params
[4] = glc
; /* glc */
3455 params
[5] = i1false
; /* slc */
3456 ac_build_intrinsic(&ctx
->ac
, "llvm.amdgcn.buffer.store.format.v4f32", ctx
->ac
.voidt
,
3459 bool is_da
= glsl_sampler_type_is_array(type
) ||
3460 glsl_get_sampler_dim(type
) == GLSL_SAMPLER_DIM_CUBE
;
3461 LLVMValueRef da
= is_da
? i1true
: i1false
;
3462 LLVMValueRef slc
= i1false
;
3464 params
[0] = to_float(&ctx
->ac
, get_src(ctx
, instr
->src
[2]));
3465 params
[1] = get_image_coords(ctx
, instr
); /* coords */
3466 params
[2] = get_sampler_desc(ctx
, instr
->variables
[0], AC_DESC_IMAGE
, true, true);
3467 params
[3] = LLVMConstInt(ctx
->ac
.i32
, 15, false); /* dmask */
3468 if (HAVE_LLVM
<= 0x0309) {
3469 params
[4] = i1false
; /* r128 */
3474 LLVMValueRef lwe
= i1false
;
3481 ac_get_image_intr_name("llvm.amdgcn.image.store",
3482 LLVMTypeOf(params
[0]), /* vdata */
3483 LLVMTypeOf(params
[1]), /* coords */
3484 LLVMTypeOf(params
[2]), /* rsrc */
3485 intrinsic_name
, sizeof(intrinsic_name
));
3487 ac_build_intrinsic(&ctx
->ac
, intrinsic_name
, ctx
->ac
.voidt
,
3493 static LLVMValueRef
visit_image_atomic(struct ac_nir_context
*ctx
,
3494 const nir_intrinsic_instr
*instr
)
3496 LLVMValueRef params
[6];
3497 int param_count
= 0;
3498 const nir_variable
*var
= instr
->variables
[0]->var
;
3500 const char *atomic_name
;
3501 char intrinsic_name
[41];
3502 const struct glsl_type
*type
= glsl_without_array(var
->type
);
3503 LLVMValueRef i1false
= LLVMConstInt(ctx
->ac
.i1
, 0, false);
3504 LLVMValueRef i1true
= LLVMConstInt(ctx
->ac
.i1
, 1, false);
3505 MAYBE_UNUSED
int length
;
3507 switch (instr
->intrinsic
) {
3508 case nir_intrinsic_image_atomic_add
:
3509 atomic_name
= "add";
3511 case nir_intrinsic_image_atomic_min
:
3512 atomic_name
= "smin";
3514 case nir_intrinsic_image_atomic_max
:
3515 atomic_name
= "smax";
3517 case nir_intrinsic_image_atomic_and
:
3518 atomic_name
= "and";
3520 case nir_intrinsic_image_atomic_or
:
3523 case nir_intrinsic_image_atomic_xor
:
3524 atomic_name
= "xor";
3526 case nir_intrinsic_image_atomic_exchange
:
3527 atomic_name
= "swap";
3529 case nir_intrinsic_image_atomic_comp_swap
:
3530 atomic_name
= "cmpswap";
3536 if (instr
->intrinsic
== nir_intrinsic_image_atomic_comp_swap
)
3537 params
[param_count
++] = get_src(ctx
, instr
->src
[3]);
3538 params
[param_count
++] = get_src(ctx
, instr
->src
[2]);
3540 if (glsl_get_sampler_dim(type
) == GLSL_SAMPLER_DIM_BUF
) {
3541 params
[param_count
++] = get_sampler_desc(ctx
, instr
->variables
[0], AC_DESC_BUFFER
,
3543 params
[param_count
++] = LLVMBuildExtractElement(ctx
->ac
.builder
, get_src(ctx
, instr
->src
[0]),
3544 ctx
->ac
.i32_0
, ""); /* vindex */
3545 params
[param_count
++] = ctx
->ac
.i32_0
; /* voffset */
3546 params
[param_count
++] = i1false
; /* slc */
3548 length
= snprintf(intrinsic_name
, sizeof(intrinsic_name
),
3549 "llvm.amdgcn.buffer.atomic.%s", atomic_name
);
3551 char coords_type
[8];
3553 bool da
= glsl_sampler_type_is_array(type
) ||
3554 glsl_get_sampler_dim(type
) == GLSL_SAMPLER_DIM_CUBE
;
3556 LLVMValueRef coords
= params
[param_count
++] = get_image_coords(ctx
, instr
);
3557 params
[param_count
++] = get_sampler_desc(ctx
, instr
->variables
[0], AC_DESC_IMAGE
,
3559 params
[param_count
++] = i1false
; /* r128 */
3560 params
[param_count
++] = da
? i1true
: i1false
; /* da */
3561 params
[param_count
++] = i1false
; /* slc */
3563 build_int_type_name(LLVMTypeOf(coords
),
3564 coords_type
, sizeof(coords_type
));
3566 length
= snprintf(intrinsic_name
, sizeof(intrinsic_name
),
3567 "llvm.amdgcn.image.atomic.%s.%s", atomic_name
, coords_type
);
3570 assert(length
< sizeof(intrinsic_name
));
3571 return ac_build_intrinsic(&ctx
->ac
, intrinsic_name
, ctx
->ac
.i32
, params
, param_count
, 0);
3574 static LLVMValueRef
visit_image_size(struct ac_nir_context
*ctx
,
3575 const nir_intrinsic_instr
*instr
)
3578 const nir_variable
*var
= instr
->variables
[0]->var
;
3579 const struct glsl_type
*type
= instr
->variables
[0]->var
->type
;
3580 bool da
= glsl_sampler_type_is_array(var
->type
) ||
3581 glsl_get_sampler_dim(var
->type
) == GLSL_SAMPLER_DIM_CUBE
;
3582 if(instr
->variables
[0]->deref
.child
)
3583 type
= instr
->variables
[0]->deref
.child
->type
;
3585 if (glsl_get_sampler_dim(type
) == GLSL_SAMPLER_DIM_BUF
)
3586 return get_buffer_size(ctx
,
3587 get_sampler_desc(ctx
, instr
->variables
[0],
3588 AC_DESC_BUFFER
, true, false), true);
3590 struct ac_image_args args
= { 0 };
3594 args
.resource
= get_sampler_desc(ctx
, instr
->variables
[0], AC_DESC_IMAGE
, true, false);
3595 args
.opcode
= ac_image_get_resinfo
;
3596 args
.addr
= ctx
->ac
.i32_0
;
3598 res
= ac_build_image_opcode(&ctx
->ac
, &args
);
3600 if (glsl_get_sampler_dim(type
) == GLSL_SAMPLER_DIM_CUBE
&&
3601 glsl_sampler_type_is_array(type
)) {
3602 LLVMValueRef two
= LLVMConstInt(ctx
->ac
.i32
, 2, false);
3603 LLVMValueRef six
= LLVMConstInt(ctx
->ac
.i32
, 6, false);
3604 LLVMValueRef z
= LLVMBuildExtractElement(ctx
->ac
.builder
, res
, two
, "");
3605 z
= LLVMBuildSDiv(ctx
->ac
.builder
, z
, six
, "");
3606 res
= LLVMBuildInsertElement(ctx
->ac
.builder
, res
, z
, two
, "");
3611 #define NOOP_WAITCNT 0xf7f
3612 #define LGKM_CNT 0x07f
3613 #define VM_CNT 0xf70
3615 static void emit_waitcnt(struct nir_to_llvm_context
*ctx
,
3618 LLVMValueRef args
[1] = {
3619 LLVMConstInt(ctx
->i32
, simm16
, false),
3621 ac_build_intrinsic(&ctx
->ac
, "llvm.amdgcn.s.waitcnt",
3622 ctx
->voidt
, args
, 1, 0);
3625 static void emit_barrier(struct nir_to_llvm_context
*ctx
)
3627 /* SI only (thanks to a hw bug workaround):
3628 * The real barrier instruction isn’t needed, because an entire patch
3629 * always fits into a single wave.
3631 if (ctx
->options
->chip_class
== SI
&&
3632 ctx
->stage
== MESA_SHADER_TESS_CTRL
) {
3633 emit_waitcnt(ctx
, LGKM_CNT
& VM_CNT
);
3636 ac_build_intrinsic(&ctx
->ac
, "llvm.amdgcn.s.barrier",
3637 ctx
->voidt
, NULL
, 0, AC_FUNC_ATTR_CONVERGENT
);
3640 static void emit_discard_if(struct ac_nir_context
*ctx
,
3641 const nir_intrinsic_instr
*instr
)
3645 cond
= LLVMBuildICmp(ctx
->ac
.builder
, LLVMIntNE
,
3646 get_src(ctx
, instr
->src
[0]),
3649 cond
= LLVMBuildSelect(ctx
->ac
.builder
, cond
,
3650 LLVMConstReal(ctx
->ac
.f32
, -1.0f
),
3652 ac_build_kill(&ctx
->ac
, cond
);
3656 visit_load_local_invocation_index(struct nir_to_llvm_context
*ctx
)
3658 LLVMValueRef result
;
3659 LLVMValueRef thread_id
= ac_get_thread_id(&ctx
->ac
);
3660 result
= LLVMBuildAnd(ctx
->builder
, ctx
->tg_size
,
3661 LLVMConstInt(ctx
->i32
, 0xfc0, false), "");
3663 return LLVMBuildAdd(ctx
->builder
, result
, thread_id
, "");
3666 static LLVMValueRef
visit_var_atomic(struct nir_to_llvm_context
*ctx
,
3667 const nir_intrinsic_instr
*instr
)
3669 LLVMValueRef ptr
, result
;
3670 LLVMValueRef src
= get_src(ctx
->nir
, instr
->src
[0]);
3671 ptr
= build_gep_for_deref(ctx
->nir
, instr
->variables
[0]);
3673 if (instr
->intrinsic
== nir_intrinsic_var_atomic_comp_swap
) {
3674 LLVMValueRef src1
= get_src(ctx
->nir
, instr
->src
[1]);
3675 result
= LLVMBuildAtomicCmpXchg(ctx
->builder
,
3677 LLVMAtomicOrderingSequentiallyConsistent
,
3678 LLVMAtomicOrderingSequentiallyConsistent
,
3681 LLVMAtomicRMWBinOp op
;
3682 switch (instr
->intrinsic
) {
3683 case nir_intrinsic_var_atomic_add
:
3684 op
= LLVMAtomicRMWBinOpAdd
;
3686 case nir_intrinsic_var_atomic_umin
:
3687 op
= LLVMAtomicRMWBinOpUMin
;
3689 case nir_intrinsic_var_atomic_umax
:
3690 op
= LLVMAtomicRMWBinOpUMax
;
3692 case nir_intrinsic_var_atomic_imin
:
3693 op
= LLVMAtomicRMWBinOpMin
;
3695 case nir_intrinsic_var_atomic_imax
:
3696 op
= LLVMAtomicRMWBinOpMax
;
3698 case nir_intrinsic_var_atomic_and
:
3699 op
= LLVMAtomicRMWBinOpAnd
;
3701 case nir_intrinsic_var_atomic_or
:
3702 op
= LLVMAtomicRMWBinOpOr
;
3704 case nir_intrinsic_var_atomic_xor
:
3705 op
= LLVMAtomicRMWBinOpXor
;
3707 case nir_intrinsic_var_atomic_exchange
:
3708 op
= LLVMAtomicRMWBinOpXchg
;
3714 result
= LLVMBuildAtomicRMW(ctx
->builder
, op
, ptr
, to_integer(&ctx
->ac
, src
),
3715 LLVMAtomicOrderingSequentiallyConsistent
,
3721 #define INTERP_CENTER 0
3722 #define INTERP_CENTROID 1
3723 #define INTERP_SAMPLE 2
3725 static LLVMValueRef
lookup_interp_param(struct nir_to_llvm_context
*ctx
,
3726 enum glsl_interp_mode interp
, unsigned location
)
3729 case INTERP_MODE_FLAT
:
3732 case INTERP_MODE_SMOOTH
:
3733 case INTERP_MODE_NONE
:
3734 if (location
== INTERP_CENTER
)
3735 return ctx
->persp_center
;
3736 else if (location
== INTERP_CENTROID
)
3737 return ctx
->persp_centroid
;
3738 else if (location
== INTERP_SAMPLE
)
3739 return ctx
->persp_sample
;
3741 case INTERP_MODE_NOPERSPECTIVE
:
3742 if (location
== INTERP_CENTER
)
3743 return ctx
->linear_center
;
3744 else if (location
== INTERP_CENTROID
)
3745 return ctx
->linear_centroid
;
3746 else if (location
== INTERP_SAMPLE
)
3747 return ctx
->linear_sample
;
3753 static LLVMValueRef
load_sample_position(struct nir_to_llvm_context
*ctx
,
3754 LLVMValueRef sample_id
)
3756 LLVMValueRef result
;
3757 LLVMValueRef ptr
= ac_build_gep0(&ctx
->ac
, ctx
->ring_offsets
, LLVMConstInt(ctx
->i32
, RING_PS_SAMPLE_POSITIONS
, false));
3759 ptr
= LLVMBuildBitCast(ctx
->builder
, ptr
,
3760 const_array(ctx
->v2f32
, 64), "");
3762 sample_id
= LLVMBuildAdd(ctx
->builder
, sample_id
, ctx
->sample_pos_offset
, "");
3763 result
= ac_build_indexed_load(&ctx
->ac
, ptr
, sample_id
, false);
3768 static LLVMValueRef
load_sample_pos(struct ac_nir_context
*ctx
)
3770 LLVMValueRef values
[2];
3772 values
[0] = emit_ffract(&ctx
->ac
, ctx
->abi
->frag_pos
[0]);
3773 values
[1] = emit_ffract(&ctx
->ac
, ctx
->abi
->frag_pos
[1]);
3774 return ac_build_gather_values(&ctx
->ac
, values
, 2);
3777 static LLVMValueRef
visit_interp(struct nir_to_llvm_context
*ctx
,
3778 const nir_intrinsic_instr
*instr
)
3780 LLVMValueRef result
[2];
3781 LLVMValueRef interp_param
, attr_number
;
3784 LLVMValueRef src_c0
, src_c1
;
3786 int input_index
= instr
->variables
[0]->var
->data
.location
- VARYING_SLOT_VAR0
;
3787 switch (instr
->intrinsic
) {
3788 case nir_intrinsic_interp_var_at_centroid
:
3789 location
= INTERP_CENTROID
;
3791 case nir_intrinsic_interp_var_at_sample
:
3792 case nir_intrinsic_interp_var_at_offset
:
3793 location
= INTERP_CENTER
;
3794 src0
= get_src(ctx
->nir
, instr
->src
[0]);
3800 if (instr
->intrinsic
== nir_intrinsic_interp_var_at_offset
) {
3801 src_c0
= to_float(&ctx
->ac
, LLVMBuildExtractElement(ctx
->builder
, src0
, ctx
->i32zero
, ""));
3802 src_c1
= to_float(&ctx
->ac
, LLVMBuildExtractElement(ctx
->builder
, src0
, ctx
->i32one
, ""));
3803 } else if (instr
->intrinsic
== nir_intrinsic_interp_var_at_sample
) {
3804 LLVMValueRef sample_position
;
3805 LLVMValueRef halfval
= LLVMConstReal(ctx
->f32
, 0.5f
);
3807 /* fetch sample ID */
3808 sample_position
= load_sample_position(ctx
, src0
);
3810 src_c0
= LLVMBuildExtractElement(ctx
->builder
, sample_position
, ctx
->i32zero
, "");
3811 src_c0
= LLVMBuildFSub(ctx
->builder
, src_c0
, halfval
, "");
3812 src_c1
= LLVMBuildExtractElement(ctx
->builder
, sample_position
, ctx
->i32one
, "");
3813 src_c1
= LLVMBuildFSub(ctx
->builder
, src_c1
, halfval
, "");
3815 interp_param
= lookup_interp_param(ctx
, instr
->variables
[0]->var
->data
.interpolation
, location
);
3816 attr_number
= LLVMConstInt(ctx
->i32
, input_index
, false);
3818 if (location
== INTERP_SAMPLE
|| location
== INTERP_CENTER
) {
3819 LLVMValueRef ij_out
[2];
3820 LLVMValueRef ddxy_out
= emit_ddxy_interp(ctx
->nir
, interp_param
);
3823 * take the I then J parameters, and the DDX/Y for it, and
3824 * calculate the IJ inputs for the interpolator.
3825 * temp1 = ddx * offset/sample.x + I;
3826 * interp_param.I = ddy * offset/sample.y + temp1;
3827 * temp1 = ddx * offset/sample.x + J;
3828 * interp_param.J = ddy * offset/sample.y + temp1;
3830 for (unsigned i
= 0; i
< 2; i
++) {
3831 LLVMValueRef ix_ll
= LLVMConstInt(ctx
->i32
, i
, false);
3832 LLVMValueRef iy_ll
= LLVMConstInt(ctx
->i32
, i
+ 2, false);
3833 LLVMValueRef ddx_el
= LLVMBuildExtractElement(ctx
->builder
,
3834 ddxy_out
, ix_ll
, "");
3835 LLVMValueRef ddy_el
= LLVMBuildExtractElement(ctx
->builder
,
3836 ddxy_out
, iy_ll
, "");
3837 LLVMValueRef interp_el
= LLVMBuildExtractElement(ctx
->builder
,
3838 interp_param
, ix_ll
, "");
3839 LLVMValueRef temp1
, temp2
;
3841 interp_el
= LLVMBuildBitCast(ctx
->builder
, interp_el
,
3844 temp1
= LLVMBuildFMul(ctx
->builder
, ddx_el
, src_c0
, "");
3845 temp1
= LLVMBuildFAdd(ctx
->builder
, temp1
, interp_el
, "");
3847 temp2
= LLVMBuildFMul(ctx
->builder
, ddy_el
, src_c1
, "");
3848 temp2
= LLVMBuildFAdd(ctx
->builder
, temp2
, temp1
, "");
3850 ij_out
[i
] = LLVMBuildBitCast(ctx
->builder
,
3851 temp2
, ctx
->i32
, "");
3853 interp_param
= ac_build_gather_values(&ctx
->ac
, ij_out
, 2);
3857 for (chan
= 0; chan
< 2; chan
++) {
3858 LLVMValueRef llvm_chan
= LLVMConstInt(ctx
->i32
, chan
, false);
3861 interp_param
= LLVMBuildBitCast(ctx
->builder
,
3862 interp_param
, LLVMVectorType(ctx
->f32
, 2), "");
3863 LLVMValueRef i
= LLVMBuildExtractElement(
3864 ctx
->builder
, interp_param
, ctx
->i32zero
, "");
3865 LLVMValueRef j
= LLVMBuildExtractElement(
3866 ctx
->builder
, interp_param
, ctx
->i32one
, "");
3868 result
[chan
] = ac_build_fs_interp(&ctx
->ac
,
3869 llvm_chan
, attr_number
,
3870 ctx
->prim_mask
, i
, j
);
3872 result
[chan
] = ac_build_fs_interp_mov(&ctx
->ac
,
3873 LLVMConstInt(ctx
->i32
, 2, false),
3874 llvm_chan
, attr_number
,
3878 return ac_build_gather_values(&ctx
->ac
, result
, 2);
3882 visit_emit_vertex(struct nir_to_llvm_context
*ctx
,
3883 const nir_intrinsic_instr
*instr
)
3885 LLVMValueRef gs_next_vertex
;
3886 LLVMValueRef can_emit
, kill
;
3889 assert(instr
->const_index
[0] == 0);
3890 /* Write vertex attribute values to GSVS ring */
3891 gs_next_vertex
= LLVMBuildLoad(ctx
->builder
,
3892 ctx
->gs_next_vertex
,
3895 /* If this thread has already emitted the declared maximum number of
3896 * vertices, kill it: excessive vertex emissions are not supposed to
3897 * have any effect, and GS threads have no externally observable
3898 * effects other than emitting vertices.
3900 can_emit
= LLVMBuildICmp(ctx
->builder
, LLVMIntULT
, gs_next_vertex
,
3901 LLVMConstInt(ctx
->i32
, ctx
->gs_max_out_vertices
, false), "");
3903 kill
= LLVMBuildSelect(ctx
->builder
, can_emit
,
3904 LLVMConstReal(ctx
->f32
, 1.0f
),
3905 LLVMConstReal(ctx
->f32
, -1.0f
), "");
3906 ac_build_kill(&ctx
->ac
, kill
);
3908 /* loop num outputs */
3910 for (unsigned i
= 0; i
< RADEON_LLVM_MAX_OUTPUTS
; ++i
) {
3911 LLVMValueRef
*out_ptr
= &ctx
->nir
->outputs
[i
* 4];
3916 if (!(ctx
->output_mask
& (1ull << i
)))
3919 if (i
== VARYING_SLOT_CLIP_DIST0
) {
3920 /* pack clip and cull into a single set of slots */
3921 length
= ctx
->num_output_clips
+ ctx
->num_output_culls
;
3925 for (unsigned j
= 0; j
< length
; j
++) {
3926 LLVMValueRef out_val
= LLVMBuildLoad(ctx
->builder
,
3928 LLVMValueRef voffset
= LLVMConstInt(ctx
->i32
, (slot
* 4 + j
) * ctx
->gs_max_out_vertices
, false);
3929 voffset
= LLVMBuildAdd(ctx
->builder
, voffset
, gs_next_vertex
, "");
3930 voffset
= LLVMBuildMul(ctx
->builder
, voffset
, LLVMConstInt(ctx
->i32
, 4, false), "");
3932 out_val
= LLVMBuildBitCast(ctx
->builder
, out_val
, ctx
->i32
, "");
3934 ac_build_buffer_store_dword(&ctx
->ac
, ctx
->gsvs_ring
,
3936 voffset
, ctx
->gs2vs_offset
, 0,
3942 gs_next_vertex
= LLVMBuildAdd(ctx
->builder
, gs_next_vertex
,
3944 LLVMBuildStore(ctx
->builder
, gs_next_vertex
, ctx
->gs_next_vertex
);
3946 ac_build_sendmsg(&ctx
->ac
, AC_SENDMSG_GS_OP_EMIT
| AC_SENDMSG_GS
| (0 << 8), ctx
->gs_wave_id
);
3950 visit_end_primitive(struct nir_to_llvm_context
*ctx
,
3951 const nir_intrinsic_instr
*instr
)
3953 ac_build_sendmsg(&ctx
->ac
, AC_SENDMSG_GS_OP_CUT
| AC_SENDMSG_GS
| (0 << 8), ctx
->gs_wave_id
);
3957 visit_load_tess_coord(struct nir_to_llvm_context
*ctx
,
3958 const nir_intrinsic_instr
*instr
)
3960 LLVMValueRef coord
[4] = {
3967 if (ctx
->tes_primitive_mode
== GL_TRIANGLES
)
3968 coord
[2] = LLVMBuildFSub(ctx
->builder
, ctx
->f32one
,
3969 LLVMBuildFAdd(ctx
->builder
, coord
[0], coord
[1], ""), "");
3971 LLVMValueRef result
= ac_build_gather_values(&ctx
->ac
, coord
, instr
->num_components
);
3972 return LLVMBuildBitCast(ctx
->builder
, result
,
3973 get_def_type(ctx
->nir
, &instr
->dest
.ssa
), "");
3976 static void visit_intrinsic(struct ac_nir_context
*ctx
,
3977 nir_intrinsic_instr
*instr
)
3979 LLVMValueRef result
= NULL
;
3981 switch (instr
->intrinsic
) {
3982 case nir_intrinsic_load_work_group_id
: {
3983 result
= ctx
->nctx
->workgroup_ids
;
3986 case nir_intrinsic_load_base_vertex
: {
3987 result
= ctx
->abi
->base_vertex
;
3990 case nir_intrinsic_load_vertex_id_zero_base
: {
3991 result
= ctx
->abi
->vertex_id
;
3994 case nir_intrinsic_load_local_invocation_id
: {
3995 result
= ctx
->nctx
->local_invocation_ids
;
3998 case nir_intrinsic_load_base_instance
:
3999 result
= ctx
->abi
->start_instance
;
4001 case nir_intrinsic_load_draw_id
:
4002 result
= ctx
->abi
->draw_id
;
4004 case nir_intrinsic_load_invocation_id
:
4005 if (ctx
->stage
== MESA_SHADER_TESS_CTRL
)
4006 result
= unpack_param(&ctx
->ac
, ctx
->nctx
->tcs_rel_ids
, 8, 5);
4008 result
= ctx
->nctx
->gs_invocation_id
;
4010 case nir_intrinsic_load_primitive_id
:
4011 if (ctx
->stage
== MESA_SHADER_GEOMETRY
) {
4012 ctx
->nctx
->shader_info
->gs
.uses_prim_id
= true;
4013 result
= ctx
->nctx
->gs_prim_id
;
4014 } else if (ctx
->stage
== MESA_SHADER_TESS_CTRL
) {
4015 ctx
->nctx
->shader_info
->tcs
.uses_prim_id
= true;
4016 result
= ctx
->nctx
->tcs_patch_id
;
4017 } else if (ctx
->stage
== MESA_SHADER_TESS_EVAL
) {
4018 ctx
->nctx
->shader_info
->tcs
.uses_prim_id
= true;
4019 result
= ctx
->nctx
->tes_patch_id
;
4021 fprintf(stderr
, "Unknown primitive id intrinsic: %d", ctx
->stage
);
4023 case nir_intrinsic_load_sample_id
:
4024 result
= unpack_param(&ctx
->ac
, ctx
->abi
->ancillary
, 8, 4);
4026 case nir_intrinsic_load_sample_pos
:
4027 result
= load_sample_pos(ctx
);
4029 case nir_intrinsic_load_sample_mask_in
:
4030 result
= ctx
->abi
->sample_coverage
;
4032 case nir_intrinsic_load_frag_coord
: {
4033 LLVMValueRef values
[4] = {
4034 ctx
->abi
->frag_pos
[0],
4035 ctx
->abi
->frag_pos
[1],
4036 ctx
->abi
->frag_pos
[2],
4037 ac_build_fdiv(&ctx
->ac
, ctx
->ac
.f32_1
, ctx
->abi
->frag_pos
[3])
4039 result
= ac_build_gather_values(&ctx
->ac
, values
, 4);
4042 case nir_intrinsic_load_front_face
:
4043 result
= ctx
->abi
->front_face
;
4045 case nir_intrinsic_load_instance_id
:
4046 result
= ctx
->abi
->instance_id
;
4048 case nir_intrinsic_load_num_work_groups
:
4049 result
= ctx
->nctx
->num_work_groups
;
4051 case nir_intrinsic_load_local_invocation_index
:
4052 result
= visit_load_local_invocation_index(ctx
->nctx
);
4054 case nir_intrinsic_load_push_constant
:
4055 result
= visit_load_push_constant(ctx
->nctx
, instr
);
4057 case nir_intrinsic_vulkan_resource_index
:
4058 result
= visit_vulkan_resource_index(ctx
->nctx
, instr
);
4060 case nir_intrinsic_store_ssbo
:
4061 visit_store_ssbo(ctx
, instr
);
4063 case nir_intrinsic_load_ssbo
:
4064 result
= visit_load_buffer(ctx
, instr
);
4066 case nir_intrinsic_ssbo_atomic_add
:
4067 case nir_intrinsic_ssbo_atomic_imin
:
4068 case nir_intrinsic_ssbo_atomic_umin
:
4069 case nir_intrinsic_ssbo_atomic_imax
:
4070 case nir_intrinsic_ssbo_atomic_umax
:
4071 case nir_intrinsic_ssbo_atomic_and
:
4072 case nir_intrinsic_ssbo_atomic_or
:
4073 case nir_intrinsic_ssbo_atomic_xor
:
4074 case nir_intrinsic_ssbo_atomic_exchange
:
4075 case nir_intrinsic_ssbo_atomic_comp_swap
:
4076 result
= visit_atomic_ssbo(ctx
, instr
);
4078 case nir_intrinsic_load_ubo
:
4079 result
= visit_load_ubo_buffer(ctx
, instr
);
4081 case nir_intrinsic_get_buffer_size
:
4082 result
= visit_get_buffer_size(ctx
, instr
);
4084 case nir_intrinsic_load_var
:
4085 result
= visit_load_var(ctx
, instr
);
4087 case nir_intrinsic_store_var
:
4088 visit_store_var(ctx
, instr
);
4090 case nir_intrinsic_image_load
:
4091 result
= visit_image_load(ctx
, instr
);
4093 case nir_intrinsic_image_store
:
4094 visit_image_store(ctx
, instr
);
4096 case nir_intrinsic_image_atomic_add
:
4097 case nir_intrinsic_image_atomic_min
:
4098 case nir_intrinsic_image_atomic_max
:
4099 case nir_intrinsic_image_atomic_and
:
4100 case nir_intrinsic_image_atomic_or
:
4101 case nir_intrinsic_image_atomic_xor
:
4102 case nir_intrinsic_image_atomic_exchange
:
4103 case nir_intrinsic_image_atomic_comp_swap
:
4104 result
= visit_image_atomic(ctx
, instr
);
4106 case nir_intrinsic_image_size
:
4107 result
= visit_image_size(ctx
, instr
);
4109 case nir_intrinsic_discard
:
4110 ac_build_intrinsic(&ctx
->ac
, "llvm.AMDGPU.kilp",
4111 LLVMVoidTypeInContext(ctx
->ac
.context
),
4112 NULL
, 0, AC_FUNC_ATTR_LEGACY
);
4114 case nir_intrinsic_discard_if
:
4115 emit_discard_if(ctx
, instr
);
4117 case nir_intrinsic_memory_barrier
:
4118 emit_waitcnt(ctx
->nctx
, VM_CNT
);
4120 case nir_intrinsic_barrier
:
4121 emit_barrier(ctx
->nctx
);
4123 case nir_intrinsic_var_atomic_add
:
4124 case nir_intrinsic_var_atomic_imin
:
4125 case nir_intrinsic_var_atomic_umin
:
4126 case nir_intrinsic_var_atomic_imax
:
4127 case nir_intrinsic_var_atomic_umax
:
4128 case nir_intrinsic_var_atomic_and
:
4129 case nir_intrinsic_var_atomic_or
:
4130 case nir_intrinsic_var_atomic_xor
:
4131 case nir_intrinsic_var_atomic_exchange
:
4132 case nir_intrinsic_var_atomic_comp_swap
:
4133 result
= visit_var_atomic(ctx
->nctx
, instr
);
4135 case nir_intrinsic_interp_var_at_centroid
:
4136 case nir_intrinsic_interp_var_at_sample
:
4137 case nir_intrinsic_interp_var_at_offset
:
4138 result
= visit_interp(ctx
->nctx
, instr
);
4140 case nir_intrinsic_emit_vertex
:
4141 visit_emit_vertex(ctx
->nctx
, instr
);
4143 case nir_intrinsic_end_primitive
:
4144 visit_end_primitive(ctx
->nctx
, instr
);
4146 case nir_intrinsic_load_tess_coord
:
4147 result
= visit_load_tess_coord(ctx
->nctx
, instr
);
4149 case nir_intrinsic_load_patch_vertices_in
:
4150 result
= LLVMConstInt(ctx
->ac
.i32
, ctx
->nctx
->options
->key
.tcs
.input_vertices
, false);
4153 fprintf(stderr
, "Unknown intrinsic: ");
4154 nir_print_instr(&instr
->instr
, stderr
);
4155 fprintf(stderr
, "\n");
4159 _mesa_hash_table_insert(ctx
->defs
, &instr
->dest
.ssa
, result
);
4163 static LLVMValueRef
radv_load_ssbo(struct ac_shader_abi
*abi
,
4164 LLVMValueRef buffer
, bool write
)
4166 struct nir_to_llvm_context
*ctx
= nir_to_llvm_context_from_abi(abi
);
4168 if (write
&& ctx
->stage
== MESA_SHADER_FRAGMENT
)
4169 ctx
->shader_info
->fs
.writes_memory
= true;
4174 static LLVMValueRef
radv_get_sampler_desc(struct ac_shader_abi
*abi
,
4175 unsigned descriptor_set
,
4176 unsigned base_index
,
4177 unsigned constant_index
,
4179 enum ac_descriptor_type desc_type
,
4180 bool image
, bool write
)
4182 struct nir_to_llvm_context
*ctx
= nir_to_llvm_context_from_abi(abi
);
4183 LLVMValueRef list
= ctx
->descriptor_sets
[descriptor_set
];
4184 struct radv_descriptor_set_layout
*layout
= ctx
->options
->layout
->set
[descriptor_set
].layout
;
4185 struct radv_descriptor_set_binding_layout
*binding
= layout
->binding
+ base_index
;
4186 unsigned offset
= binding
->offset
;
4187 unsigned stride
= binding
->size
;
4189 LLVMBuilderRef builder
= ctx
->builder
;
4192 assert(base_index
< layout
->binding_count
);
4194 if (write
&& ctx
->stage
== MESA_SHADER_FRAGMENT
)
4195 ctx
->shader_info
->fs
.writes_memory
= true;
4197 switch (desc_type
) {
4207 case AC_DESC_SAMPLER
:
4209 if (binding
->type
== VK_DESCRIPTOR_TYPE_COMBINED_IMAGE_SAMPLER
)
4214 case AC_DESC_BUFFER
:
4219 unreachable("invalid desc_type\n");
4222 offset
+= constant_index
* stride
;
4224 if (desc_type
== AC_DESC_SAMPLER
&& binding
->immutable_samplers_offset
&&
4225 (!index
|| binding
->immutable_samplers_equal
)) {
4226 if (binding
->immutable_samplers_equal
)
4229 const uint32_t *samplers
= radv_immutable_samplers(layout
, binding
);
4231 LLVMValueRef constants
[] = {
4232 LLVMConstInt(ctx
->i32
, samplers
[constant_index
* 4 + 0], 0),
4233 LLVMConstInt(ctx
->i32
, samplers
[constant_index
* 4 + 1], 0),
4234 LLVMConstInt(ctx
->i32
, samplers
[constant_index
* 4 + 2], 0),
4235 LLVMConstInt(ctx
->i32
, samplers
[constant_index
* 4 + 3], 0),
4237 return ac_build_gather_values(&ctx
->ac
, constants
, 4);
4240 assert(stride
% type_size
== 0);
4243 index
= ctx
->i32zero
;
4245 index
= LLVMBuildMul(builder
, index
, LLVMConstInt(ctx
->i32
, stride
/ type_size
, 0), "");
4247 list
= ac_build_gep0(&ctx
->ac
, list
, LLVMConstInt(ctx
->i32
, offset
, 0));
4248 list
= LLVMBuildPointerCast(builder
, list
, const_array(type
, 0), "");
4250 return ac_build_indexed_load_const(&ctx
->ac
, list
, index
);
4253 static LLVMValueRef
get_sampler_desc(struct ac_nir_context
*ctx
,
4254 const nir_deref_var
*deref
,
4255 enum ac_descriptor_type desc_type
,
4256 bool image
, bool write
)
4258 LLVMValueRef index
= NULL
;
4259 unsigned constant_index
= 0;
4260 const nir_deref
*tail
= &deref
->deref
;
4262 while (tail
->child
) {
4263 const nir_deref_array
*child
= nir_deref_as_array(tail
->child
);
4264 unsigned array_size
= glsl_get_aoa_size(tail
->child
->type
);
4269 assert(child
->deref_array_type
!= nir_deref_array_type_wildcard
);
4271 if (child
->deref_array_type
== nir_deref_array_type_indirect
) {
4272 LLVMValueRef indirect
= get_src(ctx
, child
->indirect
);
4274 indirect
= LLVMBuildMul(ctx
->ac
.builder
, indirect
,
4275 LLVMConstInt(ctx
->ac
.i32
, array_size
, false), "");
4280 index
= LLVMBuildAdd(ctx
->ac
.builder
, index
, indirect
, "");
4283 constant_index
+= child
->base_offset
* array_size
;
4285 tail
= &child
->deref
;
4288 return ctx
->abi
->load_sampler_desc(ctx
->abi
,
4289 deref
->var
->data
.descriptor_set
,
4290 deref
->var
->data
.binding
,
4291 constant_index
, index
,
4292 desc_type
, image
, write
);
4295 static void set_tex_fetch_args(struct ac_llvm_context
*ctx
,
4296 struct ac_image_args
*args
,
4297 const nir_tex_instr
*instr
,
4299 LLVMValueRef res_ptr
, LLVMValueRef samp_ptr
,
4300 LLVMValueRef
*param
, unsigned count
,
4303 unsigned is_rect
= 0;
4304 bool da
= instr
->is_array
|| instr
->sampler_dim
== GLSL_SAMPLER_DIM_CUBE
;
4306 if (op
== nir_texop_lod
)
4308 /* Pad to power of two vector */
4309 while (count
< util_next_power_of_two(count
))
4310 param
[count
++] = LLVMGetUndef(ctx
->i32
);
4313 args
->addr
= ac_build_gather_values(ctx
, param
, count
);
4315 args
->addr
= param
[0];
4317 args
->resource
= res_ptr
;
4318 args
->sampler
= samp_ptr
;
4320 if (instr
->sampler_dim
== GLSL_SAMPLER_DIM_BUF
&& op
== nir_texop_txf
) {
4321 args
->addr
= param
[0];
4325 args
->dmask
= dmask
;
4326 args
->unorm
= is_rect
;
4330 /* Disable anisotropic filtering if BASE_LEVEL == LAST_LEVEL.
4333 * If BASE_LEVEL == LAST_LEVEL, the shader must disable anisotropic
4334 * filtering manually. The driver sets img7 to a mask clearing
4335 * MAX_ANISO_RATIO if BASE_LEVEL == LAST_LEVEL. The shader must do:
4336 * s_and_b32 samp0, samp0, img7
4339 * The ANISO_OVERRIDE sampler field enables this fix in TA.
4341 static LLVMValueRef
sici_fix_sampler_aniso(struct ac_nir_context
*ctx
,
4342 LLVMValueRef res
, LLVMValueRef samp
)
4344 LLVMBuilderRef builder
= ctx
->ac
.builder
;
4345 LLVMValueRef img7
, samp0
;
4347 if (ctx
->abi
->chip_class
>= VI
)
4350 img7
= LLVMBuildExtractElement(builder
, res
,
4351 LLVMConstInt(ctx
->ac
.i32
, 7, 0), "");
4352 samp0
= LLVMBuildExtractElement(builder
, samp
,
4353 LLVMConstInt(ctx
->ac
.i32
, 0, 0), "");
4354 samp0
= LLVMBuildAnd(builder
, samp0
, img7
, "");
4355 return LLVMBuildInsertElement(builder
, samp
, samp0
,
4356 LLVMConstInt(ctx
->ac
.i32
, 0, 0), "");
4359 static void tex_fetch_ptrs(struct ac_nir_context
*ctx
,
4360 nir_tex_instr
*instr
,
4361 LLVMValueRef
*res_ptr
, LLVMValueRef
*samp_ptr
,
4362 LLVMValueRef
*fmask_ptr
)
4364 if (instr
->sampler_dim
== GLSL_SAMPLER_DIM_BUF
)
4365 *res_ptr
= get_sampler_desc(ctx
, instr
->texture
, AC_DESC_BUFFER
, false, false);
4367 *res_ptr
= get_sampler_desc(ctx
, instr
->texture
, AC_DESC_IMAGE
, false, false);
4370 *samp_ptr
= get_sampler_desc(ctx
, instr
->sampler
, AC_DESC_SAMPLER
, false, false);
4372 *samp_ptr
= get_sampler_desc(ctx
, instr
->texture
, AC_DESC_SAMPLER
, false, false);
4373 if (instr
->sampler_dim
< GLSL_SAMPLER_DIM_RECT
)
4374 *samp_ptr
= sici_fix_sampler_aniso(ctx
, *res_ptr
, *samp_ptr
);
4376 if (fmask_ptr
&& !instr
->sampler
&& (instr
->op
== nir_texop_txf_ms
||
4377 instr
->op
== nir_texop_samples_identical
))
4378 *fmask_ptr
= get_sampler_desc(ctx
, instr
->texture
, AC_DESC_FMASK
, false, false);
4381 static LLVMValueRef
apply_round_slice(struct ac_llvm_context
*ctx
,
4384 coord
= to_float(ctx
, coord
);
4385 coord
= ac_build_intrinsic(ctx
, "llvm.rint.f32", ctx
->f32
, &coord
, 1, 0);
4386 coord
= to_integer(ctx
, coord
);
4390 static void visit_tex(struct ac_nir_context
*ctx
, nir_tex_instr
*instr
)
4392 LLVMValueRef result
= NULL
;
4393 struct ac_image_args args
= { 0 };
4394 unsigned dmask
= 0xf;
4395 LLVMValueRef address
[16];
4396 LLVMValueRef coords
[5];
4397 LLVMValueRef coord
= NULL
, lod
= NULL
, comparator
= NULL
;
4398 LLVMValueRef bias
= NULL
, offsets
= NULL
;
4399 LLVMValueRef res_ptr
, samp_ptr
, fmask_ptr
= NULL
, sample_index
= NULL
;
4400 LLVMValueRef ddx
= NULL
, ddy
= NULL
;
4401 LLVMValueRef derivs
[6];
4402 unsigned chan
, count
= 0;
4403 unsigned const_src
= 0, num_deriv_comp
= 0;
4404 bool lod_is_zero
= false;
4406 tex_fetch_ptrs(ctx
, instr
, &res_ptr
, &samp_ptr
, &fmask_ptr
);
4408 for (unsigned i
= 0; i
< instr
->num_srcs
; i
++) {
4409 switch (instr
->src
[i
].src_type
) {
4410 case nir_tex_src_coord
:
4411 coord
= get_src(ctx
, instr
->src
[i
].src
);
4413 case nir_tex_src_projector
:
4415 case nir_tex_src_comparator
:
4416 comparator
= get_src(ctx
, instr
->src
[i
].src
);
4418 case nir_tex_src_offset
:
4419 offsets
= get_src(ctx
, instr
->src
[i
].src
);
4422 case nir_tex_src_bias
:
4423 bias
= get_src(ctx
, instr
->src
[i
].src
);
4425 case nir_tex_src_lod
: {
4426 nir_const_value
*val
= nir_src_as_const_value(instr
->src
[i
].src
);
4428 if (val
&& val
->i32
[0] == 0)
4430 lod
= get_src(ctx
, instr
->src
[i
].src
);
4433 case nir_tex_src_ms_index
:
4434 sample_index
= get_src(ctx
, instr
->src
[i
].src
);
4436 case nir_tex_src_ms_mcs
:
4438 case nir_tex_src_ddx
:
4439 ddx
= get_src(ctx
, instr
->src
[i
].src
);
4440 num_deriv_comp
= instr
->src
[i
].src
.ssa
->num_components
;
4442 case nir_tex_src_ddy
:
4443 ddy
= get_src(ctx
, instr
->src
[i
].src
);
4445 case nir_tex_src_texture_offset
:
4446 case nir_tex_src_sampler_offset
:
4447 case nir_tex_src_plane
:
4453 if (instr
->op
== nir_texop_txs
&& instr
->sampler_dim
== GLSL_SAMPLER_DIM_BUF
) {
4454 result
= get_buffer_size(ctx
, res_ptr
, true);
4458 if (instr
->op
== nir_texop_texture_samples
) {
4459 LLVMValueRef res
, samples
, is_msaa
;
4460 res
= LLVMBuildBitCast(ctx
->ac
.builder
, res_ptr
, ctx
->ac
.v8i32
, "");
4461 samples
= LLVMBuildExtractElement(ctx
->ac
.builder
, res
,
4462 LLVMConstInt(ctx
->ac
.i32
, 3, false), "");
4463 is_msaa
= LLVMBuildLShr(ctx
->ac
.builder
, samples
,
4464 LLVMConstInt(ctx
->ac
.i32
, 28, false), "");
4465 is_msaa
= LLVMBuildAnd(ctx
->ac
.builder
, is_msaa
,
4466 LLVMConstInt(ctx
->ac
.i32
, 0xe, false), "");
4467 is_msaa
= LLVMBuildICmp(ctx
->ac
.builder
, LLVMIntEQ
, is_msaa
,
4468 LLVMConstInt(ctx
->ac
.i32
, 0xe, false), "");
4470 samples
= LLVMBuildLShr(ctx
->ac
.builder
, samples
,
4471 LLVMConstInt(ctx
->ac
.i32
, 16, false), "");
4472 samples
= LLVMBuildAnd(ctx
->ac
.builder
, samples
,
4473 LLVMConstInt(ctx
->ac
.i32
, 0xf, false), "");
4474 samples
= LLVMBuildShl(ctx
->ac
.builder
, ctx
->ac
.i32_1
,
4476 samples
= LLVMBuildSelect(ctx
->ac
.builder
, is_msaa
, samples
,
4483 for (chan
= 0; chan
< instr
->coord_components
; chan
++)
4484 coords
[chan
] = llvm_extract_elem(&ctx
->ac
, coord
, chan
);
4486 if (offsets
&& instr
->op
!= nir_texop_txf
) {
4487 LLVMValueRef offset
[3], pack
;
4488 for (chan
= 0; chan
< 3; ++chan
)
4489 offset
[chan
] = ctx
->ac
.i32_0
;
4492 for (chan
= 0; chan
< get_llvm_num_components(offsets
); chan
++) {
4493 offset
[chan
] = llvm_extract_elem(&ctx
->ac
, offsets
, chan
);
4494 offset
[chan
] = LLVMBuildAnd(ctx
->ac
.builder
, offset
[chan
],
4495 LLVMConstInt(ctx
->ac
.i32
, 0x3f, false), "");
4497 offset
[chan
] = LLVMBuildShl(ctx
->ac
.builder
, offset
[chan
],
4498 LLVMConstInt(ctx
->ac
.i32
, chan
* 8, false), "");
4500 pack
= LLVMBuildOr(ctx
->ac
.builder
, offset
[0], offset
[1], "");
4501 pack
= LLVMBuildOr(ctx
->ac
.builder
, pack
, offset
[2], "");
4502 address
[count
++] = pack
;
4505 /* pack LOD bias value */
4506 if (instr
->op
== nir_texop_txb
&& bias
) {
4507 address
[count
++] = bias
;
4510 /* Pack depth comparison value */
4511 if (instr
->is_shadow
&& comparator
) {
4512 LLVMValueRef z
= to_float(&ctx
->ac
,
4513 llvm_extract_elem(&ctx
->ac
, comparator
, 0));
4515 /* TC-compatible HTILE promotes Z16 and Z24 to Z32_FLOAT,
4516 * so the depth comparison value isn't clamped for Z16 and
4517 * Z24 anymore. Do it manually here.
4519 * It's unnecessary if the original texture format was
4520 * Z32_FLOAT, but we don't know that here.
4522 if (ctx
->abi
->chip_class
== VI
)
4523 z
= ac_build_clamp(&ctx
->ac
, z
);
4525 address
[count
++] = z
;
4528 /* pack derivatives */
4530 switch (instr
->sampler_dim
) {
4531 case GLSL_SAMPLER_DIM_3D
:
4532 case GLSL_SAMPLER_DIM_CUBE
:
4535 case GLSL_SAMPLER_DIM_2D
:
4539 case GLSL_SAMPLER_DIM_1D
:
4544 for (unsigned i
= 0; i
< num_deriv_comp
; i
++) {
4545 derivs
[i
] = to_float(&ctx
->ac
, llvm_extract_elem(&ctx
->ac
, ddx
, i
));
4546 derivs
[num_deriv_comp
+ i
] = to_float(&ctx
->ac
, llvm_extract_elem(&ctx
->ac
, ddy
, i
));
4550 if (instr
->sampler_dim
== GLSL_SAMPLER_DIM_CUBE
&& coord
) {
4551 if (instr
->is_array
&& instr
->op
!= nir_texop_lod
)
4552 coords
[3] = apply_round_slice(&ctx
->ac
, coords
[3]);
4553 for (chan
= 0; chan
< instr
->coord_components
; chan
++)
4554 coords
[chan
] = to_float(&ctx
->ac
, coords
[chan
]);
4555 if (instr
->coord_components
== 3)
4556 coords
[3] = LLVMGetUndef(ctx
->ac
.f32
);
4557 ac_prepare_cube_coords(&ctx
->ac
,
4558 instr
->op
== nir_texop_txd
, instr
->is_array
,
4565 for (unsigned i
= 0; i
< num_deriv_comp
* 2; i
++)
4566 address
[count
++] = derivs
[i
];
4569 /* Pack texture coordinates */
4571 address
[count
++] = coords
[0];
4572 if (instr
->coord_components
> 1) {
4573 if (instr
->sampler_dim
== GLSL_SAMPLER_DIM_1D
&& instr
->is_array
&& instr
->op
!= nir_texop_txf
) {
4574 coords
[1] = apply_round_slice(&ctx
->ac
, coords
[1]);
4576 address
[count
++] = coords
[1];
4578 if (instr
->coord_components
> 2) {
4579 /* This seems like a bit of a hack - but it passes Vulkan CTS with it */
4580 if (instr
->sampler_dim
!= GLSL_SAMPLER_DIM_3D
&&
4581 instr
->sampler_dim
!= GLSL_SAMPLER_DIM_CUBE
&&
4582 instr
->op
!= nir_texop_txf
) {
4583 coords
[2] = apply_round_slice(&ctx
->ac
, coords
[2]);
4585 address
[count
++] = coords
[2];
4590 if (lod
&& ((instr
->op
== nir_texop_txl
&& !lod_is_zero
) ||
4591 instr
->op
== nir_texop_txf
)) {
4592 address
[count
++] = lod
;
4593 } else if (instr
->op
== nir_texop_txf_ms
&& sample_index
) {
4594 address
[count
++] = sample_index
;
4595 } else if(instr
->op
== nir_texop_txs
) {
4598 address
[count
++] = lod
;
4600 address
[count
++] = ctx
->ac
.i32_0
;
4603 for (chan
= 0; chan
< count
; chan
++) {
4604 address
[chan
] = LLVMBuildBitCast(ctx
->ac
.builder
,
4605 address
[chan
], ctx
->ac
.i32
, "");
4608 if (instr
->op
== nir_texop_samples_identical
) {
4609 LLVMValueRef txf_address
[4];
4610 struct ac_image_args txf_args
= { 0 };
4611 unsigned txf_count
= count
;
4612 memcpy(txf_address
, address
, sizeof(txf_address
));
4614 if (!instr
->is_array
)
4615 txf_address
[2] = ctx
->ac
.i32_0
;
4616 txf_address
[3] = ctx
->ac
.i32_0
;
4618 set_tex_fetch_args(&ctx
->ac
, &txf_args
, instr
, nir_texop_txf
,
4620 txf_address
, txf_count
, 0xf);
4622 result
= build_tex_intrinsic(ctx
, instr
, false, &txf_args
);
4624 result
= LLVMBuildExtractElement(ctx
->ac
.builder
, result
, ctx
->ac
.i32_0
, "");
4625 result
= emit_int_cmp(&ctx
->ac
, LLVMIntEQ
, result
, ctx
->ac
.i32_0
);
4629 if (instr
->sampler_dim
== GLSL_SAMPLER_DIM_MS
&&
4630 instr
->op
!= nir_texop_txs
) {
4631 unsigned sample_chan
= instr
->is_array
? 3 : 2;
4632 address
[sample_chan
] = adjust_sample_index_using_fmask(&ctx
->ac
,
4635 instr
->is_array
? address
[2] : NULL
,
4636 address
[sample_chan
],
4640 if (offsets
&& instr
->op
== nir_texop_txf
) {
4641 nir_const_value
*const_offset
=
4642 nir_src_as_const_value(instr
->src
[const_src
].src
);
4643 int num_offsets
= instr
->src
[const_src
].src
.ssa
->num_components
;
4644 assert(const_offset
);
4645 num_offsets
= MIN2(num_offsets
, instr
->coord_components
);
4646 if (num_offsets
> 2)
4647 address
[2] = LLVMBuildAdd(ctx
->ac
.builder
,
4648 address
[2], LLVMConstInt(ctx
->ac
.i32
, const_offset
->i32
[2], false), "");
4649 if (num_offsets
> 1)
4650 address
[1] = LLVMBuildAdd(ctx
->ac
.builder
,
4651 address
[1], LLVMConstInt(ctx
->ac
.i32
, const_offset
->i32
[1], false), "");
4652 address
[0] = LLVMBuildAdd(ctx
->ac
.builder
,
4653 address
[0], LLVMConstInt(ctx
->ac
.i32
, const_offset
->i32
[0], false), "");
4657 /* TODO TG4 support */
4658 if (instr
->op
== nir_texop_tg4
) {
4659 if (instr
->is_shadow
)
4662 dmask
= 1 << instr
->component
;
4664 set_tex_fetch_args(&ctx
->ac
, &args
, instr
, instr
->op
,
4665 res_ptr
, samp_ptr
, address
, count
, dmask
);
4667 result
= build_tex_intrinsic(ctx
, instr
, lod_is_zero
, &args
);
4669 if (instr
->op
== nir_texop_query_levels
)
4670 result
= LLVMBuildExtractElement(ctx
->ac
.builder
, result
, LLVMConstInt(ctx
->ac
.i32
, 3, false), "");
4671 else if (instr
->is_shadow
&& instr
->is_new_style_shadow
&&
4672 instr
->op
!= nir_texop_txs
&& instr
->op
!= nir_texop_lod
&&
4673 instr
->op
!= nir_texop_tg4
)
4674 result
= LLVMBuildExtractElement(ctx
->ac
.builder
, result
, ctx
->ac
.i32_0
, "");
4675 else if (instr
->op
== nir_texop_txs
&&
4676 instr
->sampler_dim
== GLSL_SAMPLER_DIM_CUBE
&&
4678 LLVMValueRef two
= LLVMConstInt(ctx
->ac
.i32
, 2, false);
4679 LLVMValueRef six
= LLVMConstInt(ctx
->ac
.i32
, 6, false);
4680 LLVMValueRef z
= LLVMBuildExtractElement(ctx
->ac
.builder
, result
, two
, "");
4681 z
= LLVMBuildSDiv(ctx
->ac
.builder
, z
, six
, "");
4682 result
= LLVMBuildInsertElement(ctx
->ac
.builder
, result
, z
, two
, "");
4683 } else if (instr
->dest
.ssa
.num_components
!= 4)
4684 result
= trim_vector(&ctx
->ac
, result
, instr
->dest
.ssa
.num_components
);
4688 assert(instr
->dest
.is_ssa
);
4689 result
= to_integer(&ctx
->ac
, result
);
4690 _mesa_hash_table_insert(ctx
->defs
, &instr
->dest
.ssa
, result
);
4695 static void visit_phi(struct ac_nir_context
*ctx
, nir_phi_instr
*instr
)
4697 LLVMTypeRef type
= get_def_type(ctx
, &instr
->dest
.ssa
);
4698 LLVMValueRef result
= LLVMBuildPhi(ctx
->ac
.builder
, type
, "");
4700 _mesa_hash_table_insert(ctx
->defs
, &instr
->dest
.ssa
, result
);
4701 _mesa_hash_table_insert(ctx
->phis
, instr
, result
);
4704 static void visit_post_phi(struct ac_nir_context
*ctx
,
4705 nir_phi_instr
*instr
,
4706 LLVMValueRef llvm_phi
)
4708 nir_foreach_phi_src(src
, instr
) {
4709 LLVMBasicBlockRef block
= get_block(ctx
, src
->pred
);
4710 LLVMValueRef llvm_src
= get_src(ctx
, src
->src
);
4712 LLVMAddIncoming(llvm_phi
, &llvm_src
, &block
, 1);
4716 static void phi_post_pass(struct ac_nir_context
*ctx
)
4718 struct hash_entry
*entry
;
4719 hash_table_foreach(ctx
->phis
, entry
) {
4720 visit_post_phi(ctx
, (nir_phi_instr
*)entry
->key
,
4721 (LLVMValueRef
)entry
->data
);
4726 static void visit_ssa_undef(struct ac_nir_context
*ctx
,
4727 const nir_ssa_undef_instr
*instr
)
4729 unsigned num_components
= instr
->def
.num_components
;
4732 if (num_components
== 1)
4733 undef
= LLVMGetUndef(ctx
->ac
.i32
);
4735 undef
= LLVMGetUndef(LLVMVectorType(ctx
->ac
.i32
, num_components
));
4737 _mesa_hash_table_insert(ctx
->defs
, &instr
->def
, undef
);
4740 static void visit_jump(struct ac_nir_context
*ctx
,
4741 const nir_jump_instr
*instr
)
4743 switch (instr
->type
) {
4744 case nir_jump_break
:
4745 LLVMBuildBr(ctx
->ac
.builder
, ctx
->break_block
);
4746 LLVMClearInsertionPosition(ctx
->ac
.builder
);
4748 case nir_jump_continue
:
4749 LLVMBuildBr(ctx
->ac
.builder
, ctx
->continue_block
);
4750 LLVMClearInsertionPosition(ctx
->ac
.builder
);
4753 fprintf(stderr
, "Unknown NIR jump instr: ");
4754 nir_print_instr(&instr
->instr
, stderr
);
4755 fprintf(stderr
, "\n");
4760 static void visit_cf_list(struct ac_nir_context
*ctx
,
4761 struct exec_list
*list
);
4763 static void visit_block(struct ac_nir_context
*ctx
, nir_block
*block
)
4765 LLVMBasicBlockRef llvm_block
= LLVMGetInsertBlock(ctx
->ac
.builder
);
4766 nir_foreach_instr(instr
, block
)
4768 switch (instr
->type
) {
4769 case nir_instr_type_alu
:
4770 visit_alu(ctx
, nir_instr_as_alu(instr
));
4772 case nir_instr_type_load_const
:
4773 visit_load_const(ctx
, nir_instr_as_load_const(instr
));
4775 case nir_instr_type_intrinsic
:
4776 visit_intrinsic(ctx
, nir_instr_as_intrinsic(instr
));
4778 case nir_instr_type_tex
:
4779 visit_tex(ctx
, nir_instr_as_tex(instr
));
4781 case nir_instr_type_phi
:
4782 visit_phi(ctx
, nir_instr_as_phi(instr
));
4784 case nir_instr_type_ssa_undef
:
4785 visit_ssa_undef(ctx
, nir_instr_as_ssa_undef(instr
));
4787 case nir_instr_type_jump
:
4788 visit_jump(ctx
, nir_instr_as_jump(instr
));
4791 fprintf(stderr
, "Unknown NIR instr type: ");
4792 nir_print_instr(instr
, stderr
);
4793 fprintf(stderr
, "\n");
4798 _mesa_hash_table_insert(ctx
->defs
, block
, llvm_block
);
4801 static void visit_if(struct ac_nir_context
*ctx
, nir_if
*if_stmt
)
4803 LLVMValueRef value
= get_src(ctx
, if_stmt
->condition
);
4805 LLVMValueRef fn
= LLVMGetBasicBlockParent(LLVMGetInsertBlock(ctx
->ac
.builder
));
4806 LLVMBasicBlockRef merge_block
=
4807 LLVMAppendBasicBlockInContext(ctx
->ac
.context
, fn
, "");
4808 LLVMBasicBlockRef if_block
=
4809 LLVMAppendBasicBlockInContext(ctx
->ac
.context
, fn
, "");
4810 LLVMBasicBlockRef else_block
= merge_block
;
4811 if (!exec_list_is_empty(&if_stmt
->else_list
))
4812 else_block
= LLVMAppendBasicBlockInContext(
4813 ctx
->ac
.context
, fn
, "");
4815 LLVMValueRef cond
= LLVMBuildICmp(ctx
->ac
.builder
, LLVMIntNE
, value
,
4816 LLVMConstInt(ctx
->ac
.i32
, 0, false), "");
4817 LLVMBuildCondBr(ctx
->ac
.builder
, cond
, if_block
, else_block
);
4819 LLVMPositionBuilderAtEnd(ctx
->ac
.builder
, if_block
);
4820 visit_cf_list(ctx
, &if_stmt
->then_list
);
4821 if (LLVMGetInsertBlock(ctx
->ac
.builder
))
4822 LLVMBuildBr(ctx
->ac
.builder
, merge_block
);
4824 if (!exec_list_is_empty(&if_stmt
->else_list
)) {
4825 LLVMPositionBuilderAtEnd(ctx
->ac
.builder
, else_block
);
4826 visit_cf_list(ctx
, &if_stmt
->else_list
);
4827 if (LLVMGetInsertBlock(ctx
->ac
.builder
))
4828 LLVMBuildBr(ctx
->ac
.builder
, merge_block
);
4831 LLVMPositionBuilderAtEnd(ctx
->ac
.builder
, merge_block
);
4834 static void visit_loop(struct ac_nir_context
*ctx
, nir_loop
*loop
)
4836 LLVMValueRef fn
= LLVMGetBasicBlockParent(LLVMGetInsertBlock(ctx
->ac
.builder
));
4837 LLVMBasicBlockRef continue_parent
= ctx
->continue_block
;
4838 LLVMBasicBlockRef break_parent
= ctx
->break_block
;
4840 ctx
->continue_block
=
4841 LLVMAppendBasicBlockInContext(ctx
->ac
.context
, fn
, "");
4843 LLVMAppendBasicBlockInContext(ctx
->ac
.context
, fn
, "");
4845 LLVMBuildBr(ctx
->ac
.builder
, ctx
->continue_block
);
4846 LLVMPositionBuilderAtEnd(ctx
->ac
.builder
, ctx
->continue_block
);
4847 visit_cf_list(ctx
, &loop
->body
);
4849 if (LLVMGetInsertBlock(ctx
->ac
.builder
))
4850 LLVMBuildBr(ctx
->ac
.builder
, ctx
->continue_block
);
4851 LLVMPositionBuilderAtEnd(ctx
->ac
.builder
, ctx
->break_block
);
4853 ctx
->continue_block
= continue_parent
;
4854 ctx
->break_block
= break_parent
;
4857 static void visit_cf_list(struct ac_nir_context
*ctx
,
4858 struct exec_list
*list
)
4860 foreach_list_typed(nir_cf_node
, node
, node
, list
)
4862 switch (node
->type
) {
4863 case nir_cf_node_block
:
4864 visit_block(ctx
, nir_cf_node_as_block(node
));
4867 case nir_cf_node_if
:
4868 visit_if(ctx
, nir_cf_node_as_if(node
));
4871 case nir_cf_node_loop
:
4872 visit_loop(ctx
, nir_cf_node_as_loop(node
));
4882 handle_vs_input_decl(struct nir_to_llvm_context
*ctx
,
4883 struct nir_variable
*variable
)
4885 LLVMValueRef t_list_ptr
= ctx
->vertex_buffers
;
4886 LLVMValueRef t_offset
;
4887 LLVMValueRef t_list
;
4889 LLVMValueRef buffer_index
;
4890 int index
= variable
->data
.location
- VERT_ATTRIB_GENERIC0
;
4891 int idx
= variable
->data
.location
;
4892 unsigned attrib_count
= glsl_count_attribute_slots(variable
->type
, true);
4894 variable
->data
.driver_location
= idx
* 4;
4896 if (ctx
->options
->key
.vs
.instance_rate_inputs
& (1u << index
)) {
4897 buffer_index
= LLVMBuildAdd(ctx
->builder
, ctx
->abi
.instance_id
,
4898 ctx
->abi
.start_instance
, "");
4899 ctx
->shader_info
->vs
.vgpr_comp_cnt
= MAX2(3,
4900 ctx
->shader_info
->vs
.vgpr_comp_cnt
);
4902 buffer_index
= LLVMBuildAdd(ctx
->builder
, ctx
->abi
.vertex_id
,
4903 ctx
->abi
.base_vertex
, "");
4905 for (unsigned i
= 0; i
< attrib_count
; ++i
, ++idx
) {
4906 t_offset
= LLVMConstInt(ctx
->i32
, index
+ i
, false);
4908 t_list
= ac_build_indexed_load_const(&ctx
->ac
, t_list_ptr
, t_offset
);
4910 input
= ac_build_buffer_load_format(&ctx
->ac
, t_list
,
4912 LLVMConstInt(ctx
->i32
, 0, false),
4915 for (unsigned chan
= 0; chan
< 4; chan
++) {
4916 LLVMValueRef llvm_chan
= LLVMConstInt(ctx
->i32
, chan
, false);
4917 ctx
->inputs
[radeon_llvm_reg_index_soa(idx
, chan
)] =
4918 to_integer(&ctx
->ac
, LLVMBuildExtractElement(ctx
->builder
,
4919 input
, llvm_chan
, ""));
4924 static void interp_fs_input(struct nir_to_llvm_context
*ctx
,
4926 LLVMValueRef interp_param
,
4927 LLVMValueRef prim_mask
,
4928 LLVMValueRef result
[4])
4930 LLVMValueRef attr_number
;
4933 bool interp
= interp_param
!= NULL
;
4935 attr_number
= LLVMConstInt(ctx
->i32
, attr
, false);
4937 /* fs.constant returns the param from the middle vertex, so it's not
4938 * really useful for flat shading. It's meant to be used for custom
4939 * interpolation (but the intrinsic can't fetch from the other two
4942 * Luckily, it doesn't matter, because we rely on the FLAT_SHADE state
4943 * to do the right thing. The only reason we use fs.constant is that
4944 * fs.interp cannot be used on integers, because they can be equal
4948 interp_param
= LLVMBuildBitCast(ctx
->builder
, interp_param
,
4949 LLVMVectorType(ctx
->f32
, 2), "");
4951 i
= LLVMBuildExtractElement(ctx
->builder
, interp_param
,
4953 j
= LLVMBuildExtractElement(ctx
->builder
, interp_param
,
4957 for (chan
= 0; chan
< 4; chan
++) {
4958 LLVMValueRef llvm_chan
= LLVMConstInt(ctx
->i32
, chan
, false);
4961 result
[chan
] = ac_build_fs_interp(&ctx
->ac
,
4966 result
[chan
] = ac_build_fs_interp_mov(&ctx
->ac
,
4967 LLVMConstInt(ctx
->i32
, 2, false),
4976 handle_fs_input_decl(struct nir_to_llvm_context
*ctx
,
4977 struct nir_variable
*variable
)
4979 int idx
= variable
->data
.location
;
4980 unsigned attrib_count
= glsl_count_attribute_slots(variable
->type
, false);
4981 LLVMValueRef interp
;
4983 variable
->data
.driver_location
= idx
* 4;
4984 ctx
->input_mask
|= ((1ull << attrib_count
) - 1) << variable
->data
.location
;
4986 if (glsl_get_base_type(glsl_without_array(variable
->type
)) == GLSL_TYPE_FLOAT
) {
4987 unsigned interp_type
;
4988 if (variable
->data
.sample
) {
4989 interp_type
= INTERP_SAMPLE
;
4990 ctx
->shader_info
->info
.ps
.force_persample
= true;
4991 } else if (variable
->data
.centroid
)
4992 interp_type
= INTERP_CENTROID
;
4994 interp_type
= INTERP_CENTER
;
4996 interp
= lookup_interp_param(ctx
, variable
->data
.interpolation
, interp_type
);
5000 for (unsigned i
= 0; i
< attrib_count
; ++i
)
5001 ctx
->inputs
[radeon_llvm_reg_index_soa(idx
+ i
, 0)] = interp
;
5006 handle_shader_input_decl(struct nir_to_llvm_context
*ctx
,
5007 struct nir_variable
*variable
)
5009 switch (ctx
->stage
) {
5010 case MESA_SHADER_VERTEX
:
5011 handle_vs_input_decl(ctx
, variable
);
5013 case MESA_SHADER_FRAGMENT
:
5014 handle_fs_input_decl(ctx
, variable
);
5023 handle_fs_inputs_pre(struct nir_to_llvm_context
*ctx
,
5024 struct nir_shader
*nir
)
5027 for (unsigned i
= 0; i
< RADEON_LLVM_MAX_INPUTS
; ++i
) {
5028 LLVMValueRef interp_param
;
5029 LLVMValueRef
*inputs
= ctx
->inputs
+radeon_llvm_reg_index_soa(i
, 0);
5031 if (!(ctx
->input_mask
& (1ull << i
)))
5034 if (i
>= VARYING_SLOT_VAR0
|| i
== VARYING_SLOT_PNTC
||
5035 i
== VARYING_SLOT_PRIMITIVE_ID
|| i
== VARYING_SLOT_LAYER
) {
5036 interp_param
= *inputs
;
5037 interp_fs_input(ctx
, index
, interp_param
, ctx
->prim_mask
,
5041 ctx
->shader_info
->fs
.flat_shaded_mask
|= 1u << index
;
5043 } else if (i
== VARYING_SLOT_POS
) {
5044 for(int i
= 0; i
< 3; ++i
)
5045 inputs
[i
] = ctx
->abi
.frag_pos
[i
];
5047 inputs
[3] = ac_build_fdiv(&ctx
->ac
, ctx
->f32one
,
5048 ctx
->abi
.frag_pos
[3]);
5051 ctx
->shader_info
->fs
.num_interp
= index
;
5052 if (ctx
->input_mask
& (1 << VARYING_SLOT_PNTC
))
5053 ctx
->shader_info
->fs
.has_pcoord
= true;
5054 if (ctx
->input_mask
& (1 << VARYING_SLOT_PRIMITIVE_ID
))
5055 ctx
->shader_info
->fs
.prim_id_input
= true;
5056 if (ctx
->input_mask
& (1 << VARYING_SLOT_LAYER
))
5057 ctx
->shader_info
->fs
.layer_input
= true;
5058 ctx
->shader_info
->fs
.input_mask
= ctx
->input_mask
>> VARYING_SLOT_VAR0
;
5062 ac_build_alloca(struct ac_llvm_context
*ac
,
5066 LLVMBuilderRef builder
= ac
->builder
;
5067 LLVMBasicBlockRef current_block
= LLVMGetInsertBlock(builder
);
5068 LLVMValueRef function
= LLVMGetBasicBlockParent(current_block
);
5069 LLVMBasicBlockRef first_block
= LLVMGetEntryBasicBlock(function
);
5070 LLVMValueRef first_instr
= LLVMGetFirstInstruction(first_block
);
5071 LLVMBuilderRef first_builder
= LLVMCreateBuilderInContext(ac
->context
);
5075 LLVMPositionBuilderBefore(first_builder
, first_instr
);
5077 LLVMPositionBuilderAtEnd(first_builder
, first_block
);
5080 res
= LLVMBuildAlloca(first_builder
, type
, name
);
5081 LLVMBuildStore(builder
, LLVMConstNull(type
), res
);
5083 LLVMDisposeBuilder(first_builder
);
5088 static LLVMValueRef
si_build_alloca_undef(struct ac_llvm_context
*ac
,
5092 LLVMValueRef ptr
= ac_build_alloca(ac
, type
, name
);
5093 LLVMBuildStore(ac
->builder
, LLVMGetUndef(type
), ptr
);
5098 scan_shader_output_decl(struct nir_to_llvm_context
*ctx
,
5099 struct nir_variable
*variable
)
5101 int idx
= variable
->data
.location
+ variable
->data
.index
;
5102 unsigned attrib_count
= glsl_count_attribute_slots(variable
->type
, false);
5103 uint64_t mask_attribs
;
5105 variable
->data
.driver_location
= idx
* 4;
5107 /* tess ctrl has it's own load/store paths for outputs */
5108 if (ctx
->stage
== MESA_SHADER_TESS_CTRL
)
5111 mask_attribs
= ((1ull << attrib_count
) - 1) << idx
;
5112 if (ctx
->stage
== MESA_SHADER_VERTEX
||
5113 ctx
->stage
== MESA_SHADER_TESS_EVAL
||
5114 ctx
->stage
== MESA_SHADER_GEOMETRY
) {
5115 if (idx
== VARYING_SLOT_CLIP_DIST0
) {
5116 int length
= ctx
->num_output_clips
+ ctx
->num_output_culls
;
5117 if (ctx
->stage
== MESA_SHADER_VERTEX
) {
5118 ctx
->shader_info
->vs
.outinfo
.clip_dist_mask
= (1 << ctx
->num_output_clips
) - 1;
5119 ctx
->shader_info
->vs
.outinfo
.cull_dist_mask
= (1 << ctx
->num_output_culls
) - 1;
5121 if (ctx
->stage
== MESA_SHADER_TESS_EVAL
) {
5122 ctx
->shader_info
->tes
.outinfo
.clip_dist_mask
= (1 << ctx
->num_output_clips
) - 1;
5123 ctx
->shader_info
->tes
.outinfo
.cull_dist_mask
= (1 << ctx
->num_output_culls
) - 1;
5130 mask_attribs
= 1ull << idx
;
5134 ctx
->output_mask
|= mask_attribs
;
5138 handle_shader_output_decl(struct ac_nir_context
*ctx
,
5139 struct nir_shader
*nir
,
5140 struct nir_variable
*variable
)
5142 unsigned output_loc
= variable
->data
.driver_location
/ 4;
5143 unsigned attrib_count
= glsl_count_attribute_slots(variable
->type
, false);
5145 /* tess ctrl has it's own load/store paths for outputs */
5146 if (ctx
->stage
== MESA_SHADER_TESS_CTRL
)
5149 if (ctx
->stage
== MESA_SHADER_VERTEX
||
5150 ctx
->stage
== MESA_SHADER_TESS_EVAL
||
5151 ctx
->stage
== MESA_SHADER_GEOMETRY
) {
5152 int idx
= variable
->data
.location
+ variable
->data
.index
;
5153 if (idx
== VARYING_SLOT_CLIP_DIST0
) {
5154 int length
= nir
->info
.clip_distance_array_size
+
5155 nir
->info
.cull_distance_array_size
;
5164 for (unsigned i
= 0; i
< attrib_count
; ++i
) {
5165 for (unsigned chan
= 0; chan
< 4; chan
++) {
5166 ctx
->outputs
[radeon_llvm_reg_index_soa(output_loc
+ i
, chan
)] =
5167 si_build_alloca_undef(&ctx
->ac
, ctx
->ac
.f32
, "");
5173 glsl_base_to_llvm_type(struct nir_to_llvm_context
*ctx
,
5174 enum glsl_base_type type
)
5178 case GLSL_TYPE_UINT
:
5179 case GLSL_TYPE_BOOL
:
5180 case GLSL_TYPE_SUBROUTINE
:
5182 case GLSL_TYPE_FLOAT
: /* TODO handle mediump */
5184 case GLSL_TYPE_INT64
:
5185 case GLSL_TYPE_UINT64
:
5187 case GLSL_TYPE_DOUBLE
:
5190 unreachable("unknown GLSL type");
5195 glsl_to_llvm_type(struct nir_to_llvm_context
*ctx
,
5196 const struct glsl_type
*type
)
5198 if (glsl_type_is_scalar(type
)) {
5199 return glsl_base_to_llvm_type(ctx
, glsl_get_base_type(type
));
5202 if (glsl_type_is_vector(type
)) {
5203 return LLVMVectorType(
5204 glsl_base_to_llvm_type(ctx
, glsl_get_base_type(type
)),
5205 glsl_get_vector_elements(type
));
5208 if (glsl_type_is_matrix(type
)) {
5209 return LLVMArrayType(
5210 glsl_to_llvm_type(ctx
, glsl_get_column_type(type
)),
5211 glsl_get_matrix_columns(type
));
5214 if (glsl_type_is_array(type
)) {
5215 return LLVMArrayType(
5216 glsl_to_llvm_type(ctx
, glsl_get_array_element(type
)),
5217 glsl_get_length(type
));
5220 assert(glsl_type_is_struct(type
));
5222 LLVMTypeRef member_types
[glsl_get_length(type
)];
5224 for (unsigned i
= 0; i
< glsl_get_length(type
); i
++) {
5226 glsl_to_llvm_type(ctx
,
5227 glsl_get_struct_field(type
, i
));
5230 return LLVMStructTypeInContext(ctx
->context
, member_types
,
5231 glsl_get_length(type
), false);
5235 setup_locals(struct ac_nir_context
*ctx
,
5236 struct nir_function
*func
)
5239 ctx
->num_locals
= 0;
5240 nir_foreach_variable(variable
, &func
->impl
->locals
) {
5241 unsigned attrib_count
= glsl_count_attribute_slots(variable
->type
, false);
5242 variable
->data
.driver_location
= ctx
->num_locals
* 4;
5243 ctx
->num_locals
+= attrib_count
;
5245 ctx
->locals
= malloc(4 * ctx
->num_locals
* sizeof(LLVMValueRef
));
5249 for (i
= 0; i
< ctx
->num_locals
; i
++) {
5250 for (j
= 0; j
< 4; j
++) {
5251 ctx
->locals
[i
* 4 + j
] =
5252 si_build_alloca_undef(&ctx
->ac
, ctx
->ac
.f32
, "temp");
5258 setup_shared(struct ac_nir_context
*ctx
,
5259 struct nir_shader
*nir
)
5261 nir_foreach_variable(variable
, &nir
->shared
) {
5262 LLVMValueRef shared
=
5263 LLVMAddGlobalInAddressSpace(
5264 ctx
->ac
.module
, glsl_to_llvm_type(ctx
->nctx
, variable
->type
),
5265 variable
->name
? variable
->name
: "",
5267 _mesa_hash_table_insert(ctx
->vars
, variable
, shared
);
5272 emit_float_saturate(struct ac_llvm_context
*ctx
, LLVMValueRef v
, float lo
, float hi
)
5274 v
= to_float(ctx
, v
);
5275 v
= emit_intrin_2f_param(ctx
, "llvm.maxnum", ctx
->f32
, v
, LLVMConstReal(ctx
->f32
, lo
));
5276 return emit_intrin_2f_param(ctx
, "llvm.minnum", ctx
->f32
, v
, LLVMConstReal(ctx
->f32
, hi
));
5280 static LLVMValueRef
emit_pack_int16(struct nir_to_llvm_context
*ctx
,
5281 LLVMValueRef src0
, LLVMValueRef src1
)
5283 LLVMValueRef const16
= LLVMConstInt(ctx
->i32
, 16, false);
5284 LLVMValueRef comp
[2];
5286 comp
[0] = LLVMBuildAnd(ctx
->builder
, src0
, LLVMConstInt(ctx
-> i32
, 65535, 0), "");
5287 comp
[1] = LLVMBuildAnd(ctx
->builder
, src1
, LLVMConstInt(ctx
-> i32
, 65535, 0), "");
5288 comp
[1] = LLVMBuildShl(ctx
->builder
, comp
[1], const16
, "");
5289 return LLVMBuildOr(ctx
->builder
, comp
[0], comp
[1], "");
5292 /* Initialize arguments for the shader export intrinsic */
5294 si_llvm_init_export_args(struct nir_to_llvm_context
*ctx
,
5295 LLVMValueRef
*values
,
5297 struct ac_export_args
*args
)
5299 /* Default is 0xf. Adjusted below depending on the format. */
5300 args
->enabled_channels
= 0xf;
5302 /* Specify whether the EXEC mask represents the valid mask */
5303 args
->valid_mask
= 0;
5305 /* Specify whether this is the last export */
5308 /* Specify the target we are exporting */
5309 args
->target
= target
;
5311 args
->compr
= false;
5312 args
->out
[0] = LLVMGetUndef(ctx
->f32
);
5313 args
->out
[1] = LLVMGetUndef(ctx
->f32
);
5314 args
->out
[2] = LLVMGetUndef(ctx
->f32
);
5315 args
->out
[3] = LLVMGetUndef(ctx
->f32
);
5320 if (ctx
->stage
== MESA_SHADER_FRAGMENT
&& target
>= V_008DFC_SQ_EXP_MRT
) {
5321 LLVMValueRef val
[4];
5322 unsigned index
= target
- V_008DFC_SQ_EXP_MRT
;
5323 unsigned col_format
= (ctx
->options
->key
.fs
.col_format
>> (4 * index
)) & 0xf;
5324 bool is_int8
= (ctx
->options
->key
.fs
.is_int8
>> index
) & 1;
5325 bool is_int10
= (ctx
->options
->key
.fs
.is_int10
>> index
) & 1;
5327 switch(col_format
) {
5328 case V_028714_SPI_SHADER_ZERO
:
5329 args
->enabled_channels
= 0; /* writemask */
5330 args
->target
= V_008DFC_SQ_EXP_NULL
;
5333 case V_028714_SPI_SHADER_32_R
:
5334 args
->enabled_channels
= 1;
5335 args
->out
[0] = values
[0];
5338 case V_028714_SPI_SHADER_32_GR
:
5339 args
->enabled_channels
= 0x3;
5340 args
->out
[0] = values
[0];
5341 args
->out
[1] = values
[1];
5344 case V_028714_SPI_SHADER_32_AR
:
5345 args
->enabled_channels
= 0x9;
5346 args
->out
[0] = values
[0];
5347 args
->out
[3] = values
[3];
5350 case V_028714_SPI_SHADER_FP16_ABGR
:
5353 for (unsigned chan
= 0; chan
< 2; chan
++) {
5354 LLVMValueRef pack_args
[2] = {
5356 values
[2 * chan
+ 1]
5358 LLVMValueRef packed
;
5360 packed
= ac_build_cvt_pkrtz_f16(&ctx
->ac
, pack_args
);
5361 args
->out
[chan
] = packed
;
5365 case V_028714_SPI_SHADER_UNORM16_ABGR
:
5366 for (unsigned chan
= 0; chan
< 4; chan
++) {
5367 val
[chan
] = ac_build_clamp(&ctx
->ac
, values
[chan
]);
5368 val
[chan
] = LLVMBuildFMul(ctx
->builder
, val
[chan
],
5369 LLVMConstReal(ctx
->f32
, 65535), "");
5370 val
[chan
] = LLVMBuildFAdd(ctx
->builder
, val
[chan
],
5371 LLVMConstReal(ctx
->f32
, 0.5), "");
5372 val
[chan
] = LLVMBuildFPToUI(ctx
->builder
, val
[chan
],
5377 args
->out
[0] = emit_pack_int16(ctx
, val
[0], val
[1]);
5378 args
->out
[1] = emit_pack_int16(ctx
, val
[2], val
[3]);
5381 case V_028714_SPI_SHADER_SNORM16_ABGR
:
5382 for (unsigned chan
= 0; chan
< 4; chan
++) {
5383 val
[chan
] = emit_float_saturate(&ctx
->ac
, values
[chan
], -1, 1);
5384 val
[chan
] = LLVMBuildFMul(ctx
->builder
, val
[chan
],
5385 LLVMConstReal(ctx
->f32
, 32767), "");
5387 /* If positive, add 0.5, else add -0.5. */
5388 val
[chan
] = LLVMBuildFAdd(ctx
->builder
, val
[chan
],
5389 LLVMBuildSelect(ctx
->builder
,
5390 LLVMBuildFCmp(ctx
->builder
, LLVMRealOGE
,
5391 val
[chan
], ctx
->f32zero
, ""),
5392 LLVMConstReal(ctx
->f32
, 0.5),
5393 LLVMConstReal(ctx
->f32
, -0.5), ""), "");
5394 val
[chan
] = LLVMBuildFPToSI(ctx
->builder
, val
[chan
], ctx
->i32
, "");
5398 args
->out
[0] = emit_pack_int16(ctx
, val
[0], val
[1]);
5399 args
->out
[1] = emit_pack_int16(ctx
, val
[2], val
[3]);
5402 case V_028714_SPI_SHADER_UINT16_ABGR
: {
5403 LLVMValueRef max_rgb
= LLVMConstInt(ctx
->i32
,
5404 is_int8
? 255 : is_int10
? 1023 : 65535, 0);
5405 LLVMValueRef max_alpha
= !is_int10
? max_rgb
: LLVMConstInt(ctx
->i32
, 3, 0);
5407 for (unsigned chan
= 0; chan
< 4; chan
++) {
5408 val
[chan
] = to_integer(&ctx
->ac
, values
[chan
]);
5409 val
[chan
] = emit_minmax_int(&ctx
->ac
, LLVMIntULT
, val
[chan
], chan
== 3 ? max_alpha
: max_rgb
);
5413 args
->out
[0] = emit_pack_int16(ctx
, val
[0], val
[1]);
5414 args
->out
[1] = emit_pack_int16(ctx
, val
[2], val
[3]);
5418 case V_028714_SPI_SHADER_SINT16_ABGR
: {
5419 LLVMValueRef max_rgb
= LLVMConstInt(ctx
->i32
,
5420 is_int8
? 127 : is_int10
? 511 : 32767, 0);
5421 LLVMValueRef min_rgb
= LLVMConstInt(ctx
->i32
,
5422 is_int8
? -128 : is_int10
? -512 : -32768, 0);
5423 LLVMValueRef max_alpha
= !is_int10
? max_rgb
: ctx
->i32one
;
5424 LLVMValueRef min_alpha
= !is_int10
? min_rgb
: LLVMConstInt(ctx
->i32
, -2, 0);
5427 for (unsigned chan
= 0; chan
< 4; chan
++) {
5428 val
[chan
] = to_integer(&ctx
->ac
, values
[chan
]);
5429 val
[chan
] = emit_minmax_int(&ctx
->ac
, LLVMIntSLT
, val
[chan
], chan
== 3 ? max_alpha
: max_rgb
);
5430 val
[chan
] = emit_minmax_int(&ctx
->ac
, LLVMIntSGT
, val
[chan
], chan
== 3 ? min_alpha
: min_rgb
);
5434 args
->out
[0] = emit_pack_int16(ctx
, val
[0], val
[1]);
5435 args
->out
[1] = emit_pack_int16(ctx
, val
[2], val
[3]);
5440 case V_028714_SPI_SHADER_32_ABGR
:
5441 memcpy(&args
->out
[0], values
, sizeof(values
[0]) * 4);
5445 memcpy(&args
->out
[0], values
, sizeof(values
[0]) * 4);
5447 for (unsigned i
= 0; i
< 4; ++i
)
5448 args
->out
[i
] = to_float(&ctx
->ac
, args
->out
[i
]);
5452 handle_vs_outputs_post(struct nir_to_llvm_context
*ctx
,
5453 bool export_prim_id
,
5454 struct ac_vs_output_info
*outinfo
)
5456 uint32_t param_count
= 0;
5458 unsigned pos_idx
, num_pos_exports
= 0;
5459 struct ac_export_args args
, pos_args
[4] = {};
5460 LLVMValueRef psize_value
= NULL
, layer_value
= NULL
, viewport_index_value
= NULL
;
5463 memset(outinfo
->vs_output_param_offset
, AC_EXP_PARAM_UNDEFINED
,
5464 sizeof(outinfo
->vs_output_param_offset
));
5466 if (ctx
->output_mask
& (1ull << VARYING_SLOT_CLIP_DIST0
)) {
5467 LLVMValueRef slots
[8];
5470 if (outinfo
->cull_dist_mask
)
5471 outinfo
->cull_dist_mask
<<= ctx
->num_output_clips
;
5473 i
= VARYING_SLOT_CLIP_DIST0
;
5474 for (j
= 0; j
< ctx
->num_output_clips
+ ctx
->num_output_culls
; j
++)
5475 slots
[j
] = to_float(&ctx
->ac
, LLVMBuildLoad(ctx
->builder
,
5476 ctx
->nir
->outputs
[radeon_llvm_reg_index_soa(i
, j
)], ""));
5478 for (i
= ctx
->num_output_clips
+ ctx
->num_output_culls
; i
< 8; i
++)
5479 slots
[i
] = LLVMGetUndef(ctx
->f32
);
5481 if (ctx
->num_output_clips
+ ctx
->num_output_culls
> 4) {
5482 target
= V_008DFC_SQ_EXP_POS
+ 3;
5483 si_llvm_init_export_args(ctx
, &slots
[4], target
, &args
);
5484 memcpy(&pos_args
[target
- V_008DFC_SQ_EXP_POS
],
5485 &args
, sizeof(args
));
5488 target
= V_008DFC_SQ_EXP_POS
+ 2;
5489 si_llvm_init_export_args(ctx
, &slots
[0], target
, &args
);
5490 memcpy(&pos_args
[target
- V_008DFC_SQ_EXP_POS
],
5491 &args
, sizeof(args
));
5495 LLVMValueRef pos_values
[4] = {ctx
->f32zero
, ctx
->f32zero
, ctx
->f32zero
, ctx
->f32one
};
5496 if (ctx
->output_mask
& (1ull << VARYING_SLOT_POS
)) {
5497 for (unsigned j
= 0; j
< 4; j
++)
5498 pos_values
[j
] = LLVMBuildLoad(ctx
->builder
,
5499 ctx
->nir
->outputs
[radeon_llvm_reg_index_soa(VARYING_SLOT_POS
, j
)], "");
5501 si_llvm_init_export_args(ctx
, pos_values
, V_008DFC_SQ_EXP_POS
, &pos_args
[0]);
5503 if (ctx
->output_mask
& (1ull << VARYING_SLOT_PSIZ
)) {
5504 outinfo
->writes_pointsize
= true;
5505 psize_value
= LLVMBuildLoad(ctx
->builder
,
5506 ctx
->nir
->outputs
[radeon_llvm_reg_index_soa(VARYING_SLOT_PSIZ
, 0)], "");
5509 if (ctx
->output_mask
& (1ull << VARYING_SLOT_LAYER
)) {
5510 outinfo
->writes_layer
= true;
5511 layer_value
= LLVMBuildLoad(ctx
->builder
,
5512 ctx
->nir
->outputs
[radeon_llvm_reg_index_soa(VARYING_SLOT_LAYER
, 0)], "");
5515 if (ctx
->output_mask
& (1ull << VARYING_SLOT_VIEWPORT
)) {
5516 outinfo
->writes_viewport_index
= true;
5517 viewport_index_value
= LLVMBuildLoad(ctx
->builder
,
5518 ctx
->nir
->outputs
[radeon_llvm_reg_index_soa(VARYING_SLOT_VIEWPORT
, 0)], "");
5521 uint32_t mask
= ((outinfo
->writes_pointsize
== true ? 1 : 0) |
5522 (outinfo
->writes_layer
== true ? 4 : 0) |
5523 (outinfo
->writes_viewport_index
== true ? 8 : 0));
5525 pos_args
[1].enabled_channels
= mask
;
5526 pos_args
[1].valid_mask
= 0;
5527 pos_args
[1].done
= 0;
5528 pos_args
[1].target
= V_008DFC_SQ_EXP_POS
+ 1;
5529 pos_args
[1].compr
= 0;
5530 pos_args
[1].out
[0] = ctx
->f32zero
; /* X */
5531 pos_args
[1].out
[1] = ctx
->f32zero
; /* Y */
5532 pos_args
[1].out
[2] = ctx
->f32zero
; /* Z */
5533 pos_args
[1].out
[3] = ctx
->f32zero
; /* W */
5535 if (outinfo
->writes_pointsize
== true)
5536 pos_args
[1].out
[0] = psize_value
;
5537 if (outinfo
->writes_layer
== true)
5538 pos_args
[1].out
[2] = layer_value
;
5539 if (outinfo
->writes_viewport_index
== true)
5540 pos_args
[1].out
[3] = viewport_index_value
;
5542 for (i
= 0; i
< 4; i
++) {
5543 if (pos_args
[i
].out
[0])
5548 for (i
= 0; i
< 4; i
++) {
5549 if (!pos_args
[i
].out
[0])
5552 /* Specify the target we are exporting */
5553 pos_args
[i
].target
= V_008DFC_SQ_EXP_POS
+ pos_idx
++;
5554 if (pos_idx
== num_pos_exports
)
5555 pos_args
[i
].done
= 1;
5556 ac_build_export(&ctx
->ac
, &pos_args
[i
]);
5559 for (unsigned i
= 0; i
< RADEON_LLVM_MAX_OUTPUTS
; ++i
) {
5560 LLVMValueRef values
[4];
5561 if (!(ctx
->output_mask
& (1ull << i
)))
5564 for (unsigned j
= 0; j
< 4; j
++)
5565 values
[j
] = to_float(&ctx
->ac
, LLVMBuildLoad(ctx
->builder
,
5566 ctx
->nir
->outputs
[radeon_llvm_reg_index_soa(i
, j
)], ""));
5568 if (i
== VARYING_SLOT_LAYER
) {
5569 target
= V_008DFC_SQ_EXP_PARAM
+ param_count
;
5570 outinfo
->vs_output_param_offset
[VARYING_SLOT_LAYER
] = param_count
;
5572 } else if (i
== VARYING_SLOT_PRIMITIVE_ID
) {
5573 target
= V_008DFC_SQ_EXP_PARAM
+ param_count
;
5574 outinfo
->vs_output_param_offset
[VARYING_SLOT_PRIMITIVE_ID
] = param_count
;
5576 } else if (i
>= VARYING_SLOT_VAR0
) {
5577 outinfo
->export_mask
|= 1u << (i
- VARYING_SLOT_VAR0
);
5578 target
= V_008DFC_SQ_EXP_PARAM
+ param_count
;
5579 outinfo
->vs_output_param_offset
[i
] = param_count
;
5584 si_llvm_init_export_args(ctx
, values
, target
, &args
);
5586 if (target
>= V_008DFC_SQ_EXP_POS
&&
5587 target
<= (V_008DFC_SQ_EXP_POS
+ 3)) {
5588 memcpy(&pos_args
[target
- V_008DFC_SQ_EXP_POS
],
5589 &args
, sizeof(args
));
5591 ac_build_export(&ctx
->ac
, &args
);
5595 if (export_prim_id
) {
5596 LLVMValueRef values
[4];
5597 target
= V_008DFC_SQ_EXP_PARAM
+ param_count
;
5598 outinfo
->vs_output_param_offset
[VARYING_SLOT_PRIMITIVE_ID
] = param_count
;
5601 values
[0] = ctx
->vs_prim_id
;
5602 ctx
->shader_info
->vs
.vgpr_comp_cnt
= MAX2(2,
5603 ctx
->shader_info
->vs
.vgpr_comp_cnt
);
5604 for (unsigned j
= 1; j
< 4; j
++)
5605 values
[j
] = ctx
->f32zero
;
5606 si_llvm_init_export_args(ctx
, values
, target
, &args
);
5607 ac_build_export(&ctx
->ac
, &args
);
5608 outinfo
->export_prim_id
= true;
5611 outinfo
->pos_exports
= num_pos_exports
;
5612 outinfo
->param_exports
= param_count
;
5616 handle_es_outputs_post(struct nir_to_llvm_context
*ctx
,
5617 struct ac_es_output_info
*outinfo
)
5620 uint64_t max_output_written
= 0;
5621 for (unsigned i
= 0; i
< RADEON_LLVM_MAX_OUTPUTS
; ++i
) {
5622 LLVMValueRef
*out_ptr
= &ctx
->nir
->outputs
[i
* 4];
5626 if (!(ctx
->output_mask
& (1ull << i
)))
5629 if (i
== VARYING_SLOT_CLIP_DIST0
)
5630 length
= ctx
->num_output_clips
+ ctx
->num_output_culls
;
5632 param_index
= shader_io_get_unique_index(i
);
5634 max_output_written
= MAX2(param_index
+ (length
> 4), max_output_written
);
5636 for (j
= 0; j
< length
; j
++) {
5637 LLVMValueRef out_val
= LLVMBuildLoad(ctx
->builder
, out_ptr
[j
], "");
5638 out_val
= LLVMBuildBitCast(ctx
->builder
, out_val
, ctx
->i32
, "");
5640 ac_build_buffer_store_dword(&ctx
->ac
,
5643 NULL
, ctx
->es2gs_offset
,
5644 (4 * param_index
+ j
) * 4,
5648 outinfo
->esgs_itemsize
= (max_output_written
+ 1) * 16;
5652 handle_ls_outputs_post(struct nir_to_llvm_context
*ctx
)
5654 LLVMValueRef vertex_id
= ctx
->rel_auto_id
;
5655 LLVMValueRef vertex_dw_stride
= unpack_param(&ctx
->ac
, ctx
->ls_out_layout
, 13, 8);
5656 LLVMValueRef base_dw_addr
= LLVMBuildMul(ctx
->builder
, vertex_id
,
5657 vertex_dw_stride
, "");
5659 for (unsigned i
= 0; i
< RADEON_LLVM_MAX_OUTPUTS
; ++i
) {
5660 LLVMValueRef
*out_ptr
= &ctx
->nir
->outputs
[i
* 4];
5663 if (!(ctx
->output_mask
& (1ull << i
)))
5666 if (i
== VARYING_SLOT_CLIP_DIST0
)
5667 length
= ctx
->num_output_clips
+ ctx
->num_output_culls
;
5668 int param
= shader_io_get_unique_index(i
);
5669 mark_tess_output(ctx
, false, param
);
5671 mark_tess_output(ctx
, false, param
+ 1);
5672 LLVMValueRef dw_addr
= LLVMBuildAdd(ctx
->builder
, base_dw_addr
,
5673 LLVMConstInt(ctx
->i32
, param
* 4, false),
5675 for (unsigned j
= 0; j
< length
; j
++) {
5676 lds_store(ctx
, dw_addr
,
5677 LLVMBuildLoad(ctx
->builder
, out_ptr
[j
], ""));
5678 dw_addr
= LLVMBuildAdd(ctx
->builder
, dw_addr
, ctx
->i32one
, "");
5683 struct ac_build_if_state
5685 struct nir_to_llvm_context
*ctx
;
5686 LLVMValueRef condition
;
5687 LLVMBasicBlockRef entry_block
;
5688 LLVMBasicBlockRef true_block
;
5689 LLVMBasicBlockRef false_block
;
5690 LLVMBasicBlockRef merge_block
;
5693 static LLVMBasicBlockRef
5694 ac_build_insert_new_block(struct nir_to_llvm_context
*ctx
, const char *name
)
5696 LLVMBasicBlockRef current_block
;
5697 LLVMBasicBlockRef next_block
;
5698 LLVMBasicBlockRef new_block
;
5700 /* get current basic block */
5701 current_block
= LLVMGetInsertBlock(ctx
->builder
);
5703 /* chqeck if there's another block after this one */
5704 next_block
= LLVMGetNextBasicBlock(current_block
);
5706 /* insert the new block before the next block */
5707 new_block
= LLVMInsertBasicBlockInContext(ctx
->context
, next_block
, name
);
5710 /* append new block after current block */
5711 LLVMValueRef function
= LLVMGetBasicBlockParent(current_block
);
5712 new_block
= LLVMAppendBasicBlockInContext(ctx
->context
, function
, name
);
5718 ac_nir_build_if(struct ac_build_if_state
*ifthen
,
5719 struct nir_to_llvm_context
*ctx
,
5720 LLVMValueRef condition
)
5722 LLVMBasicBlockRef block
= LLVMGetInsertBlock(ctx
->builder
);
5724 memset(ifthen
, 0, sizeof *ifthen
);
5726 ifthen
->condition
= condition
;
5727 ifthen
->entry_block
= block
;
5729 /* create endif/merge basic block for the phi functions */
5730 ifthen
->merge_block
= ac_build_insert_new_block(ctx
, "endif-block");
5732 /* create/insert true_block before merge_block */
5733 ifthen
->true_block
=
5734 LLVMInsertBasicBlockInContext(ctx
->context
,
5735 ifthen
->merge_block
,
5738 /* successive code goes into the true block */
5739 LLVMPositionBuilderAtEnd(ctx
->builder
, ifthen
->true_block
);
5743 * End a conditional.
5746 ac_nir_build_endif(struct ac_build_if_state
*ifthen
)
5748 LLVMBuilderRef builder
= ifthen
->ctx
->builder
;
5750 /* Insert branch to the merge block from current block */
5751 LLVMBuildBr(builder
, ifthen
->merge_block
);
5754 * Now patch in the various branch instructions.
5757 /* Insert the conditional branch instruction at the end of entry_block */
5758 LLVMPositionBuilderAtEnd(builder
, ifthen
->entry_block
);
5759 if (ifthen
->false_block
) {
5760 /* we have an else clause */
5761 LLVMBuildCondBr(builder
, ifthen
->condition
,
5762 ifthen
->true_block
, ifthen
->false_block
);
5765 /* no else clause */
5766 LLVMBuildCondBr(builder
, ifthen
->condition
,
5767 ifthen
->true_block
, ifthen
->merge_block
);
5770 /* Resume building code at end of the ifthen->merge_block */
5771 LLVMPositionBuilderAtEnd(builder
, ifthen
->merge_block
);
5775 write_tess_factors(struct nir_to_llvm_context
*ctx
)
5777 unsigned stride
, outer_comps
, inner_comps
;
5778 struct ac_build_if_state if_ctx
, inner_if_ctx
;
5779 LLVMValueRef invocation_id
= unpack_param(&ctx
->ac
, ctx
->tcs_rel_ids
, 8, 5);
5780 LLVMValueRef rel_patch_id
= unpack_param(&ctx
->ac
, ctx
->tcs_rel_ids
, 0, 8);
5781 unsigned tess_inner_index
, tess_outer_index
;
5782 LLVMValueRef lds_base
, lds_inner
, lds_outer
, byteoffset
, buffer
;
5783 LLVMValueRef out
[6], vec0
, vec1
, tf_base
, inner
[4], outer
[4];
5787 switch (ctx
->options
->key
.tcs
.primitive_mode
) {
5807 ac_nir_build_if(&if_ctx
, ctx
,
5808 LLVMBuildICmp(ctx
->builder
, LLVMIntEQ
,
5809 invocation_id
, ctx
->i32zero
, ""));
5811 tess_inner_index
= shader_io_get_unique_index(VARYING_SLOT_TESS_LEVEL_INNER
);
5812 tess_outer_index
= shader_io_get_unique_index(VARYING_SLOT_TESS_LEVEL_OUTER
);
5814 mark_tess_output(ctx
, true, tess_inner_index
);
5815 mark_tess_output(ctx
, true, tess_outer_index
);
5816 lds_base
= get_tcs_out_current_patch_data_offset(ctx
);
5817 lds_inner
= LLVMBuildAdd(ctx
->builder
, lds_base
,
5818 LLVMConstInt(ctx
->i32
, tess_inner_index
* 4, false), "");
5819 lds_outer
= LLVMBuildAdd(ctx
->builder
, lds_base
,
5820 LLVMConstInt(ctx
->i32
, tess_outer_index
* 4, false), "");
5822 for (i
= 0; i
< 4; i
++) {
5823 inner
[i
] = LLVMGetUndef(ctx
->i32
);
5824 outer
[i
] = LLVMGetUndef(ctx
->i32
);
5828 if (ctx
->options
->key
.tcs
.primitive_mode
== GL_ISOLINES
) {
5829 outer
[0] = out
[1] = lds_load(ctx
, lds_outer
);
5830 lds_outer
= LLVMBuildAdd(ctx
->builder
, lds_outer
,
5831 LLVMConstInt(ctx
->i32
, 1, false), "");
5832 outer
[1] = out
[0] = lds_load(ctx
, lds_outer
);
5834 for (i
= 0; i
< outer_comps
; i
++) {
5836 lds_load(ctx
, lds_outer
);
5837 lds_outer
= LLVMBuildAdd(ctx
->builder
, lds_outer
,
5838 LLVMConstInt(ctx
->i32
, 1, false), "");
5840 for (i
= 0; i
< inner_comps
; i
++) {
5841 inner
[i
] = out
[outer_comps
+i
] =
5842 lds_load(ctx
, lds_inner
);
5843 lds_inner
= LLVMBuildAdd(ctx
->builder
, lds_inner
,
5844 LLVMConstInt(ctx
->i32
, 1, false), "");
5848 /* Convert the outputs to vectors for stores. */
5849 vec0
= ac_build_gather_values(&ctx
->ac
, out
, MIN2(stride
, 4));
5853 vec1
= ac_build_gather_values(&ctx
->ac
, out
+ 4, stride
- 4);
5856 buffer
= ctx
->hs_ring_tess_factor
;
5857 tf_base
= ctx
->tess_factor_offset
;
5858 byteoffset
= LLVMBuildMul(ctx
->builder
, rel_patch_id
,
5859 LLVMConstInt(ctx
->i32
, 4 * stride
, false), "");
5861 ac_nir_build_if(&inner_if_ctx
, ctx
,
5862 LLVMBuildICmp(ctx
->builder
, LLVMIntEQ
,
5863 rel_patch_id
, ctx
->i32zero
, ""));
5865 /* Store the dynamic HS control word. */
5866 ac_build_buffer_store_dword(&ctx
->ac
, buffer
,
5867 LLVMConstInt(ctx
->i32
, 0x80000000, false),
5868 1, ctx
->i32zero
, tf_base
,
5869 0, 1, 0, true, false);
5870 ac_nir_build_endif(&inner_if_ctx
);
5872 /* Store the tessellation factors. */
5873 ac_build_buffer_store_dword(&ctx
->ac
, buffer
, vec0
,
5874 MIN2(stride
, 4), byteoffset
, tf_base
,
5875 4, 1, 0, true, false);
5877 ac_build_buffer_store_dword(&ctx
->ac
, buffer
, vec1
,
5878 stride
- 4, byteoffset
, tf_base
,
5879 20, 1, 0, true, false);
5881 //TODO store to offchip for TES to read - only if TES reads them
5883 LLVMValueRef inner_vec
, outer_vec
, tf_outer_offset
;
5884 LLVMValueRef tf_inner_offset
;
5885 unsigned param_outer
, param_inner
;
5887 param_outer
= shader_io_get_unique_index(VARYING_SLOT_TESS_LEVEL_OUTER
);
5888 tf_outer_offset
= get_tcs_tes_buffer_address(ctx
, NULL
,
5889 LLVMConstInt(ctx
->i32
, param_outer
, 0));
5891 outer_vec
= ac_build_gather_values(&ctx
->ac
, outer
,
5892 util_next_power_of_two(outer_comps
));
5894 ac_build_buffer_store_dword(&ctx
->ac
, ctx
->hs_ring_tess_offchip
, outer_vec
,
5895 outer_comps
, tf_outer_offset
,
5896 ctx
->oc_lds
, 0, 1, 0, true, false);
5898 param_inner
= shader_io_get_unique_index(VARYING_SLOT_TESS_LEVEL_INNER
);
5899 tf_inner_offset
= get_tcs_tes_buffer_address(ctx
, NULL
,
5900 LLVMConstInt(ctx
->i32
, param_inner
, 0));
5902 inner_vec
= inner_comps
== 1 ? inner
[0] :
5903 ac_build_gather_values(&ctx
->ac
, inner
, inner_comps
);
5904 ac_build_buffer_store_dword(&ctx
->ac
, ctx
->hs_ring_tess_offchip
, inner_vec
,
5905 inner_comps
, tf_inner_offset
,
5906 ctx
->oc_lds
, 0, 1, 0, true, false);
5909 ac_nir_build_endif(&if_ctx
);
5913 handle_tcs_outputs_post(struct nir_to_llvm_context
*ctx
)
5915 write_tess_factors(ctx
);
5919 si_export_mrt_color(struct nir_to_llvm_context
*ctx
,
5920 LLVMValueRef
*color
, unsigned param
, bool is_last
,
5921 struct ac_export_args
*args
)
5924 si_llvm_init_export_args(ctx
, color
, param
,
5928 args
->valid_mask
= 1; /* whether the EXEC mask is valid */
5929 args
->done
= 1; /* DONE bit */
5930 } else if (!args
->enabled_channels
)
5931 return false; /* unnecessary NULL export */
5937 si_export_mrt_z(struct nir_to_llvm_context
*ctx
,
5938 LLVMValueRef depth
, LLVMValueRef stencil
,
5939 LLVMValueRef samplemask
)
5941 struct ac_export_args args
;
5943 args
.enabled_channels
= 0;
5944 args
.valid_mask
= 1;
5946 args
.target
= V_008DFC_SQ_EXP_MRTZ
;
5949 args
.out
[0] = LLVMGetUndef(ctx
->f32
); /* R, depth */
5950 args
.out
[1] = LLVMGetUndef(ctx
->f32
); /* G, stencil test val[0:7], stencil op val[8:15] */
5951 args
.out
[2] = LLVMGetUndef(ctx
->f32
); /* B, sample mask */
5952 args
.out
[3] = LLVMGetUndef(ctx
->f32
); /* A, alpha to mask */
5955 args
.out
[0] = depth
;
5956 args
.enabled_channels
|= 0x1;
5960 args
.out
[1] = stencil
;
5961 args
.enabled_channels
|= 0x2;
5965 args
.out
[2] = samplemask
;
5966 args
.enabled_channels
|= 0x4;
5969 /* SI (except OLAND and HAINAN) has a bug that it only looks
5970 * at the X writemask component. */
5971 if (ctx
->options
->chip_class
== SI
&&
5972 ctx
->options
->family
!= CHIP_OLAND
&&
5973 ctx
->options
->family
!= CHIP_HAINAN
)
5974 args
.enabled_channels
|= 0x1;
5976 ac_build_export(&ctx
->ac
, &args
);
5980 handle_fs_outputs_post(struct nir_to_llvm_context
*ctx
)
5983 LLVMValueRef depth
= NULL
, stencil
= NULL
, samplemask
= NULL
;
5984 struct ac_export_args color_args
[8];
5986 for (unsigned i
= 0; i
< RADEON_LLVM_MAX_OUTPUTS
; ++i
) {
5987 LLVMValueRef values
[4];
5989 if (!(ctx
->output_mask
& (1ull << i
)))
5992 if (i
== FRAG_RESULT_DEPTH
) {
5993 ctx
->shader_info
->fs
.writes_z
= true;
5994 depth
= to_float(&ctx
->ac
, LLVMBuildLoad(ctx
->builder
,
5995 ctx
->nir
->outputs
[radeon_llvm_reg_index_soa(i
, 0)], ""));
5996 } else if (i
== FRAG_RESULT_STENCIL
) {
5997 ctx
->shader_info
->fs
.writes_stencil
= true;
5998 stencil
= to_float(&ctx
->ac
, LLVMBuildLoad(ctx
->builder
,
5999 ctx
->nir
->outputs
[radeon_llvm_reg_index_soa(i
, 0)], ""));
6000 } else if (i
== FRAG_RESULT_SAMPLE_MASK
) {
6001 ctx
->shader_info
->fs
.writes_sample_mask
= true;
6002 samplemask
= to_float(&ctx
->ac
, LLVMBuildLoad(ctx
->builder
,
6003 ctx
->nir
->outputs
[radeon_llvm_reg_index_soa(i
, 0)], ""));
6006 for (unsigned j
= 0; j
< 4; j
++)
6007 values
[j
] = to_float(&ctx
->ac
, LLVMBuildLoad(ctx
->builder
,
6008 ctx
->nir
->outputs
[radeon_llvm_reg_index_soa(i
, j
)], ""));
6010 if (!ctx
->shader_info
->fs
.writes_z
&& !ctx
->shader_info
->fs
.writes_stencil
&& !ctx
->shader_info
->fs
.writes_sample_mask
)
6011 last
= ctx
->output_mask
<= ((1ull << (i
+ 1)) - 1);
6013 bool ret
= si_export_mrt_color(ctx
, values
, V_008DFC_SQ_EXP_MRT
+ (i
- FRAG_RESULT_DATA0
), last
, &color_args
[index
]);
6019 for (unsigned i
= 0; i
< index
; i
++)
6020 ac_build_export(&ctx
->ac
, &color_args
[i
]);
6021 if (depth
|| stencil
|| samplemask
)
6022 si_export_mrt_z(ctx
, depth
, stencil
, samplemask
);
6024 si_export_mrt_color(ctx
, NULL
, V_008DFC_SQ_EXP_NULL
, true, &color_args
[0]);
6025 ac_build_export(&ctx
->ac
, &color_args
[0]);
6028 ctx
->shader_info
->fs
.output_mask
= index
? ((1ull << index
) - 1) : 0;
6032 emit_gs_epilogue(struct nir_to_llvm_context
*ctx
)
6034 ac_build_sendmsg(&ctx
->ac
, AC_SENDMSG_GS_OP_NOP
| AC_SENDMSG_GS_DONE
, ctx
->gs_wave_id
);
6038 handle_shader_outputs_post(struct ac_shader_abi
*abi
, unsigned max_outputs
,
6039 LLVMValueRef
*addrs
)
6041 struct nir_to_llvm_context
*ctx
= nir_to_llvm_context_from_abi(abi
);
6043 switch (ctx
->stage
) {
6044 case MESA_SHADER_VERTEX
:
6045 if (ctx
->options
->key
.vs
.as_ls
)
6046 handle_ls_outputs_post(ctx
);
6047 else if (ctx
->options
->key
.vs
.as_es
)
6048 handle_es_outputs_post(ctx
, &ctx
->shader_info
->vs
.es_info
);
6050 handle_vs_outputs_post(ctx
, ctx
->options
->key
.vs
.export_prim_id
,
6051 &ctx
->shader_info
->vs
.outinfo
);
6053 case MESA_SHADER_FRAGMENT
:
6054 handle_fs_outputs_post(ctx
);
6056 case MESA_SHADER_GEOMETRY
:
6057 emit_gs_epilogue(ctx
);
6059 case MESA_SHADER_TESS_CTRL
:
6060 handle_tcs_outputs_post(ctx
);
6062 case MESA_SHADER_TESS_EVAL
:
6063 if (ctx
->options
->key
.tes
.as_es
)
6064 handle_es_outputs_post(ctx
, &ctx
->shader_info
->tes
.es_info
);
6066 handle_vs_outputs_post(ctx
, ctx
->options
->key
.tes
.export_prim_id
,
6067 &ctx
->shader_info
->tes
.outinfo
);
6074 static void ac_llvm_finalize_module(struct nir_to_llvm_context
* ctx
)
6076 LLVMPassManagerRef passmgr
;
6077 /* Create the pass manager */
6078 passmgr
= LLVMCreateFunctionPassManagerForModule(
6081 /* This pass should eliminate all the load and store instructions */
6082 LLVMAddPromoteMemoryToRegisterPass(passmgr
);
6084 /* Add some optimization passes */
6085 LLVMAddScalarReplAggregatesPass(passmgr
);
6086 LLVMAddLICMPass(passmgr
);
6087 LLVMAddAggressiveDCEPass(passmgr
);
6088 LLVMAddCFGSimplificationPass(passmgr
);
6089 LLVMAddInstructionCombiningPass(passmgr
);
6092 LLVMInitializeFunctionPassManager(passmgr
);
6093 LLVMRunFunctionPassManager(passmgr
, ctx
->main_function
);
6094 LLVMFinalizeFunctionPassManager(passmgr
);
6096 LLVMDisposeBuilder(ctx
->builder
);
6097 LLVMDisposePassManager(passmgr
);
6101 ac_nir_eliminate_const_vs_outputs(struct nir_to_llvm_context
*ctx
)
6103 struct ac_vs_output_info
*outinfo
;
6105 switch (ctx
->stage
) {
6106 case MESA_SHADER_FRAGMENT
:
6107 case MESA_SHADER_COMPUTE
:
6108 case MESA_SHADER_TESS_CTRL
:
6109 case MESA_SHADER_GEOMETRY
:
6111 case MESA_SHADER_VERTEX
:
6112 if (ctx
->options
->key
.vs
.as_ls
||
6113 ctx
->options
->key
.vs
.as_es
)
6115 outinfo
= &ctx
->shader_info
->vs
.outinfo
;
6117 case MESA_SHADER_TESS_EVAL
:
6118 if (ctx
->options
->key
.vs
.as_es
)
6120 outinfo
= &ctx
->shader_info
->tes
.outinfo
;
6123 unreachable("Unhandled shader type");
6126 ac_optimize_vs_outputs(&ctx
->ac
,
6128 outinfo
->vs_output_param_offset
,
6130 &outinfo
->param_exports
);
6134 ac_setup_rings(struct nir_to_llvm_context
*ctx
)
6136 if ((ctx
->stage
== MESA_SHADER_VERTEX
&& ctx
->options
->key
.vs
.as_es
) ||
6137 (ctx
->stage
== MESA_SHADER_TESS_EVAL
&& ctx
->options
->key
.tes
.as_es
)) {
6138 ctx
->esgs_ring
= ac_build_indexed_load_const(&ctx
->ac
, ctx
->ring_offsets
, LLVMConstInt(ctx
->i32
, RING_ESGS_VS
, false));
6141 if (ctx
->is_gs_copy_shader
) {
6142 ctx
->gsvs_ring
= ac_build_indexed_load_const(&ctx
->ac
, ctx
->ring_offsets
, LLVMConstInt(ctx
->i32
, RING_GSVS_VS
, false));
6144 if (ctx
->stage
== MESA_SHADER_GEOMETRY
) {
6146 ctx
->esgs_ring
= ac_build_indexed_load_const(&ctx
->ac
, ctx
->ring_offsets
, LLVMConstInt(ctx
->i32
, RING_ESGS_GS
, false));
6147 ctx
->gsvs_ring
= ac_build_indexed_load_const(&ctx
->ac
, ctx
->ring_offsets
, LLVMConstInt(ctx
->i32
, RING_GSVS_GS
, false));
6149 ctx
->gsvs_ring
= LLVMBuildBitCast(ctx
->builder
, ctx
->gsvs_ring
, ctx
->v4i32
, "");
6151 ctx
->gsvs_ring
= LLVMBuildInsertElement(ctx
->builder
, ctx
->gsvs_ring
, ctx
->gsvs_num_entries
, LLVMConstInt(ctx
->i32
, 2, false), "");
6152 tmp
= LLVMBuildExtractElement(ctx
->builder
, ctx
->gsvs_ring
, ctx
->i32one
, "");
6153 tmp
= LLVMBuildOr(ctx
->builder
, tmp
, ctx
->gsvs_ring_stride
, "");
6154 ctx
->gsvs_ring
= LLVMBuildInsertElement(ctx
->builder
, ctx
->gsvs_ring
, tmp
, ctx
->i32one
, "");
6157 if (ctx
->stage
== MESA_SHADER_TESS_CTRL
||
6158 ctx
->stage
== MESA_SHADER_TESS_EVAL
) {
6159 ctx
->hs_ring_tess_offchip
= ac_build_indexed_load_const(&ctx
->ac
, ctx
->ring_offsets
, LLVMConstInt(ctx
->i32
, RING_HS_TESS_OFFCHIP
, false));
6160 ctx
->hs_ring_tess_factor
= ac_build_indexed_load_const(&ctx
->ac
, ctx
->ring_offsets
, LLVMConstInt(ctx
->i32
, RING_HS_TESS_FACTOR
, false));
6165 ac_nir_get_max_workgroup_size(enum chip_class chip_class
,
6166 const struct nir_shader
*nir
)
6168 switch (nir
->stage
) {
6169 case MESA_SHADER_TESS_CTRL
:
6170 return chip_class
>= CIK
? 128 : 64;
6171 case MESA_SHADER_GEOMETRY
:
6173 case MESA_SHADER_COMPUTE
:
6179 unsigned max_workgroup_size
= nir
->info
.cs
.local_size
[0] *
6180 nir
->info
.cs
.local_size
[1] *
6181 nir
->info
.cs
.local_size
[2];
6182 return max_workgroup_size
;
6185 void ac_nir_translate(struct ac_llvm_context
*ac
, struct ac_shader_abi
*abi
,
6186 struct nir_shader
*nir
, struct nir_to_llvm_context
*nctx
)
6188 struct ac_nir_context ctx
= {};
6189 struct nir_function
*func
;
6198 ctx
.stage
= nir
->stage
;
6200 ctx
.main_function
= LLVMGetBasicBlockParent(LLVMGetInsertBlock(ctx
.ac
.builder
));
6202 nir_foreach_variable(variable
, &nir
->outputs
)
6203 handle_shader_output_decl(&ctx
, nir
, variable
);
6205 ctx
.defs
= _mesa_hash_table_create(NULL
, _mesa_hash_pointer
,
6206 _mesa_key_pointer_equal
);
6207 ctx
.phis
= _mesa_hash_table_create(NULL
, _mesa_hash_pointer
,
6208 _mesa_key_pointer_equal
);
6209 ctx
.vars
= _mesa_hash_table_create(NULL
, _mesa_hash_pointer
,
6210 _mesa_key_pointer_equal
);
6212 func
= (struct nir_function
*)exec_list_get_head(&nir
->functions
);
6214 setup_locals(&ctx
, func
);
6216 if (nir
->stage
== MESA_SHADER_COMPUTE
)
6217 setup_shared(&ctx
, nir
);
6219 visit_cf_list(&ctx
, &func
->impl
->body
);
6220 phi_post_pass(&ctx
);
6222 ctx
.abi
->emit_outputs(ctx
.abi
, RADEON_LLVM_MAX_OUTPUTS
,
6226 ralloc_free(ctx
.defs
);
6227 ralloc_free(ctx
.phis
);
6228 ralloc_free(ctx
.vars
);
6235 LLVMModuleRef
ac_translate_nir_to_llvm(LLVMTargetMachineRef tm
,
6236 struct nir_shader
*nir
,
6237 struct ac_shader_variant_info
*shader_info
,
6238 const struct ac_nir_compiler_options
*options
)
6240 struct nir_to_llvm_context ctx
= {0};
6242 ctx
.options
= options
;
6243 ctx
.shader_info
= shader_info
;
6244 ctx
.context
= LLVMContextCreate();
6245 ctx
.module
= LLVMModuleCreateWithNameInContext("shader", ctx
.context
);
6247 ac_llvm_context_init(&ctx
.ac
, ctx
.context
);
6248 ctx
.ac
.module
= ctx
.module
;
6250 memset(shader_info
, 0, sizeof(*shader_info
));
6252 ac_nir_shader_info_pass(nir
, options
, &shader_info
->info
);
6254 LLVMSetTarget(ctx
.module
, options
->supports_spill
? "amdgcn-mesa-mesa3d" : "amdgcn--");
6256 LLVMTargetDataRef data_layout
= LLVMCreateTargetDataLayout(tm
);
6257 char *data_layout_str
= LLVMCopyStringRepOfTargetData(data_layout
);
6258 LLVMSetDataLayout(ctx
.module
, data_layout_str
);
6259 LLVMDisposeTargetData(data_layout
);
6260 LLVMDisposeMessage(data_layout_str
);
6264 ctx
.builder
= LLVMCreateBuilderInContext(ctx
.context
);
6265 ctx
.ac
.builder
= ctx
.builder
;
6266 ctx
.stage
= nir
->stage
;
6267 ctx
.max_workgroup_size
= ac_nir_get_max_workgroup_size(ctx
.options
->chip_class
, nir
);
6269 for (i
= 0; i
< AC_UD_MAX_SETS
; i
++)
6270 shader_info
->user_sgprs_locs
.descriptor_sets
[i
].sgpr_idx
= -1;
6271 for (i
= 0; i
< AC_UD_MAX_UD
; i
++)
6272 shader_info
->user_sgprs_locs
.shader_data
[i
].sgpr_idx
= -1;
6274 create_function(&ctx
);
6276 if (nir
->stage
== MESA_SHADER_GEOMETRY
) {
6277 ctx
.gs_next_vertex
= ac_build_alloca(&ctx
.ac
, ctx
.i32
, "gs_next_vertex");
6279 ctx
.gs_max_out_vertices
= nir
->info
.gs
.vertices_out
;
6280 } else if (nir
->stage
== MESA_SHADER_TESS_EVAL
) {
6281 ctx
.tes_primitive_mode
= nir
->info
.tess
.primitive_mode
;
6282 } else if (nir
->stage
== MESA_SHADER_VERTEX
) {
6283 if (shader_info
->info
.vs
.needs_instance_id
) {
6284 ctx
.shader_info
->vs
.vgpr_comp_cnt
=
6285 MAX2(3, ctx
.shader_info
->vs
.vgpr_comp_cnt
);
6287 } else if (nir
->stage
== MESA_SHADER_FRAGMENT
) {
6288 shader_info
->fs
.can_discard
= nir
->info
.fs
.uses_discard
;
6291 ac_setup_rings(&ctx
);
6293 ctx
.num_output_clips
= nir
->info
.clip_distance_array_size
;
6294 ctx
.num_output_culls
= nir
->info
.cull_distance_array_size
;
6296 nir_foreach_variable(variable
, &nir
->inputs
)
6297 handle_shader_input_decl(&ctx
, variable
);
6299 if (nir
->stage
== MESA_SHADER_FRAGMENT
)
6300 handle_fs_inputs_pre(&ctx
, nir
);
6302 ctx
.abi
.chip_class
= options
->chip_class
;
6303 ctx
.abi
.inputs
= &ctx
.inputs
[0];
6304 ctx
.abi
.emit_outputs
= handle_shader_outputs_post
;
6305 ctx
.abi
.load_ssbo
= radv_load_ssbo
;
6306 ctx
.abi
.load_sampler_desc
= radv_get_sampler_desc
;
6308 nir_foreach_variable(variable
, &nir
->outputs
)
6309 scan_shader_output_decl(&ctx
, variable
);
6311 ac_nir_translate(&ctx
.ac
, &ctx
.abi
, nir
, &ctx
);
6313 LLVMBuildRetVoid(ctx
.builder
);
6315 ac_llvm_finalize_module(&ctx
);
6317 ac_nir_eliminate_const_vs_outputs(&ctx
);
6319 if (nir
->stage
== MESA_SHADER_GEOMETRY
) {
6320 unsigned addclip
= ctx
.num_output_clips
+ ctx
.num_output_culls
> 4;
6321 shader_info
->gs
.gsvs_vertex_size
= (util_bitcount64(ctx
.output_mask
) + addclip
) * 16;
6322 shader_info
->gs
.max_gsvs_emit_size
= shader_info
->gs
.gsvs_vertex_size
*
6323 nir
->info
.gs
.vertices_out
;
6324 } else if (nir
->stage
== MESA_SHADER_TESS_CTRL
) {
6325 shader_info
->tcs
.outputs_written
= ctx
.tess_outputs_written
;
6326 shader_info
->tcs
.patch_outputs_written
= ctx
.tess_patch_outputs_written
;
6327 } else if (nir
->stage
== MESA_SHADER_VERTEX
&& ctx
.options
->key
.vs
.as_ls
) {
6328 shader_info
->vs
.outputs_written
= ctx
.tess_outputs_written
;
6334 static void ac_diagnostic_handler(LLVMDiagnosticInfoRef di
, void *context
)
6336 unsigned *retval
= (unsigned *)context
;
6337 LLVMDiagnosticSeverity severity
= LLVMGetDiagInfoSeverity(di
);
6338 char *description
= LLVMGetDiagInfoDescription(di
);
6340 if (severity
== LLVMDSError
) {
6342 fprintf(stderr
, "LLVM triggered Diagnostic Handler: %s\n",
6346 LLVMDisposeMessage(description
);
6349 static unsigned ac_llvm_compile(LLVMModuleRef M
,
6350 struct ac_shader_binary
*binary
,
6351 LLVMTargetMachineRef tm
)
6353 unsigned retval
= 0;
6355 LLVMContextRef llvm_ctx
;
6356 LLVMMemoryBufferRef out_buffer
;
6357 unsigned buffer_size
;
6358 const char *buffer_data
;
6361 /* Setup Diagnostic Handler*/
6362 llvm_ctx
= LLVMGetModuleContext(M
);
6364 LLVMContextSetDiagnosticHandler(llvm_ctx
, ac_diagnostic_handler
,
6368 mem_err
= LLVMTargetMachineEmitToMemoryBuffer(tm
, M
, LLVMObjectFile
,
6371 /* Process Errors/Warnings */
6373 fprintf(stderr
, "%s: %s", __FUNCTION__
, err
);
6379 /* Extract Shader Code*/
6380 buffer_size
= LLVMGetBufferSize(out_buffer
);
6381 buffer_data
= LLVMGetBufferStart(out_buffer
);
6383 ac_elf_read(buffer_data
, buffer_size
, binary
);
6386 LLVMDisposeMemoryBuffer(out_buffer
);
6392 static void ac_compile_llvm_module(LLVMTargetMachineRef tm
,
6393 LLVMModuleRef llvm_module
,
6394 struct ac_shader_binary
*binary
,
6395 struct ac_shader_config
*config
,
6396 struct ac_shader_variant_info
*shader_info
,
6397 gl_shader_stage stage
,
6398 bool dump_shader
, bool supports_spill
)
6401 ac_dump_module(llvm_module
);
6403 memset(binary
, 0, sizeof(*binary
));
6404 int v
= ac_llvm_compile(llvm_module
, binary
, tm
);
6406 fprintf(stderr
, "compile failed\n");
6410 fprintf(stderr
, "disasm:\n%s\n", binary
->disasm_string
);
6412 ac_shader_binary_read_config(binary
, config
, 0, supports_spill
);
6414 LLVMContextRef ctx
= LLVMGetModuleContext(llvm_module
);
6415 LLVMDisposeModule(llvm_module
);
6416 LLVMContextDispose(ctx
);
6418 if (stage
== MESA_SHADER_FRAGMENT
) {
6419 shader_info
->num_input_vgprs
= 0;
6420 if (G_0286CC_PERSP_SAMPLE_ENA(config
->spi_ps_input_addr
))
6421 shader_info
->num_input_vgprs
+= 2;
6422 if (G_0286CC_PERSP_CENTER_ENA(config
->spi_ps_input_addr
))
6423 shader_info
->num_input_vgprs
+= 2;
6424 if (G_0286CC_PERSP_CENTROID_ENA(config
->spi_ps_input_addr
))
6425 shader_info
->num_input_vgprs
+= 2;
6426 if (G_0286CC_PERSP_PULL_MODEL_ENA(config
->spi_ps_input_addr
))
6427 shader_info
->num_input_vgprs
+= 3;
6428 if (G_0286CC_LINEAR_SAMPLE_ENA(config
->spi_ps_input_addr
))
6429 shader_info
->num_input_vgprs
+= 2;
6430 if (G_0286CC_LINEAR_CENTER_ENA(config
->spi_ps_input_addr
))
6431 shader_info
->num_input_vgprs
+= 2;
6432 if (G_0286CC_LINEAR_CENTROID_ENA(config
->spi_ps_input_addr
))
6433 shader_info
->num_input_vgprs
+= 2;
6434 if (G_0286CC_LINE_STIPPLE_TEX_ENA(config
->spi_ps_input_addr
))
6435 shader_info
->num_input_vgprs
+= 1;
6436 if (G_0286CC_POS_X_FLOAT_ENA(config
->spi_ps_input_addr
))
6437 shader_info
->num_input_vgprs
+= 1;
6438 if (G_0286CC_POS_Y_FLOAT_ENA(config
->spi_ps_input_addr
))
6439 shader_info
->num_input_vgprs
+= 1;
6440 if (G_0286CC_POS_Z_FLOAT_ENA(config
->spi_ps_input_addr
))
6441 shader_info
->num_input_vgprs
+= 1;
6442 if (G_0286CC_POS_W_FLOAT_ENA(config
->spi_ps_input_addr
))
6443 shader_info
->num_input_vgprs
+= 1;
6444 if (G_0286CC_FRONT_FACE_ENA(config
->spi_ps_input_addr
))
6445 shader_info
->num_input_vgprs
+= 1;
6446 if (G_0286CC_ANCILLARY_ENA(config
->spi_ps_input_addr
))
6447 shader_info
->num_input_vgprs
+= 1;
6448 if (G_0286CC_SAMPLE_COVERAGE_ENA(config
->spi_ps_input_addr
))
6449 shader_info
->num_input_vgprs
+= 1;
6450 if (G_0286CC_POS_FIXED_PT_ENA(config
->spi_ps_input_addr
))
6451 shader_info
->num_input_vgprs
+= 1;
6453 config
->num_vgprs
= MAX2(config
->num_vgprs
, shader_info
->num_input_vgprs
);
6455 /* +3 for scratch wave offset and VCC */
6456 config
->num_sgprs
= MAX2(config
->num_sgprs
,
6457 shader_info
->num_input_sgprs
+ 3);
6460 void ac_compile_nir_shader(LLVMTargetMachineRef tm
,
6461 struct ac_shader_binary
*binary
,
6462 struct ac_shader_config
*config
,
6463 struct ac_shader_variant_info
*shader_info
,
6464 struct nir_shader
*nir
,
6465 const struct ac_nir_compiler_options
*options
,
6469 LLVMModuleRef llvm_module
= ac_translate_nir_to_llvm(tm
, nir
, shader_info
,
6472 ac_compile_llvm_module(tm
, llvm_module
, binary
, config
, shader_info
, nir
->stage
, dump_shader
, options
->supports_spill
);
6473 switch (nir
->stage
) {
6474 case MESA_SHADER_COMPUTE
:
6475 for (int i
= 0; i
< 3; ++i
)
6476 shader_info
->cs
.block_size
[i
] = nir
->info
.cs
.local_size
[i
];
6478 case MESA_SHADER_FRAGMENT
:
6479 shader_info
->fs
.early_fragment_test
= nir
->info
.fs
.early_fragment_tests
;
6481 case MESA_SHADER_GEOMETRY
:
6482 shader_info
->gs
.vertices_in
= nir
->info
.gs
.vertices_in
;
6483 shader_info
->gs
.vertices_out
= nir
->info
.gs
.vertices_out
;
6484 shader_info
->gs
.output_prim
= nir
->info
.gs
.output_primitive
;
6485 shader_info
->gs
.invocations
= nir
->info
.gs
.invocations
;
6487 case MESA_SHADER_TESS_EVAL
:
6488 shader_info
->tes
.primitive_mode
= nir
->info
.tess
.primitive_mode
;
6489 shader_info
->tes
.spacing
= nir
->info
.tess
.spacing
;
6490 shader_info
->tes
.ccw
= nir
->info
.tess
.ccw
;
6491 shader_info
->tes
.point_mode
= nir
->info
.tess
.point_mode
;
6492 shader_info
->tes
.as_es
= options
->key
.tes
.as_es
;
6494 case MESA_SHADER_TESS_CTRL
:
6495 shader_info
->tcs
.tcs_vertices_out
= nir
->info
.tess
.tcs_vertices_out
;
6497 case MESA_SHADER_VERTEX
:
6498 shader_info
->vs
.as_es
= options
->key
.vs
.as_es
;
6499 shader_info
->vs
.as_ls
= options
->key
.vs
.as_ls
;
6500 /* in LS mode we need at least 1, invocation id needs 3, handled elsewhere */
6501 if (options
->key
.vs
.as_ls
)
6502 shader_info
->vs
.vgpr_comp_cnt
= MAX2(1, shader_info
->vs
.vgpr_comp_cnt
);
6510 ac_gs_copy_shader_emit(struct nir_to_llvm_context
*ctx
)
6512 LLVMValueRef args
[9];
6513 args
[0] = ctx
->gsvs_ring
;
6514 args
[1] = LLVMBuildMul(ctx
->builder
, ctx
->abi
.vertex_id
, LLVMConstInt(ctx
->i32
, 4, false), "");
6515 args
[3] = ctx
->i32zero
;
6516 args
[4] = ctx
->i32one
; /* OFFEN */
6517 args
[5] = ctx
->i32zero
; /* IDXEN */
6518 args
[6] = ctx
->i32one
; /* GLC */
6519 args
[7] = ctx
->i32one
; /* SLC */
6520 args
[8] = ctx
->i32zero
; /* TFE */
6524 for (unsigned i
= 0; i
< RADEON_LLVM_MAX_OUTPUTS
; ++i
) {
6528 if (!(ctx
->output_mask
& (1ull << i
)))
6531 if (i
== VARYING_SLOT_CLIP_DIST0
) {
6532 /* unpack clip and cull from a single set of slots */
6533 length
= ctx
->num_output_clips
+ ctx
->num_output_culls
;
6538 for (unsigned j
= 0; j
< length
; j
++) {
6540 args
[2] = LLVMConstInt(ctx
->i32
,
6542 ctx
->gs_max_out_vertices
* 16 * 4, false);
6544 value
= ac_build_intrinsic(&ctx
->ac
,
6545 "llvm.SI.buffer.load.dword.i32.i32",
6547 AC_FUNC_ATTR_READONLY
|
6548 AC_FUNC_ATTR_LEGACY
);
6550 LLVMBuildStore(ctx
->builder
,
6551 to_float(&ctx
->ac
, value
), ctx
->nir
->outputs
[radeon_llvm_reg_index_soa(i
, j
)]);
6555 handle_vs_outputs_post(ctx
, false, &ctx
->shader_info
->vs
.outinfo
);
6558 void ac_create_gs_copy_shader(LLVMTargetMachineRef tm
,
6559 struct nir_shader
*geom_shader
,
6560 struct ac_shader_binary
*binary
,
6561 struct ac_shader_config
*config
,
6562 struct ac_shader_variant_info
*shader_info
,
6563 const struct ac_nir_compiler_options
*options
,
6566 struct nir_to_llvm_context ctx
= {0};
6567 ctx
.context
= LLVMContextCreate();
6568 ctx
.module
= LLVMModuleCreateWithNameInContext("shader", ctx
.context
);
6569 ctx
.options
= options
;
6570 ctx
.shader_info
= shader_info
;
6572 ac_llvm_context_init(&ctx
.ac
, ctx
.context
);
6573 ctx
.ac
.module
= ctx
.module
;
6575 ctx
.is_gs_copy_shader
= true;
6576 LLVMSetTarget(ctx
.module
, "amdgcn--");
6579 ctx
.builder
= LLVMCreateBuilderInContext(ctx
.context
);
6580 ctx
.ac
.builder
= ctx
.builder
;
6581 ctx
.stage
= MESA_SHADER_VERTEX
;
6583 create_function(&ctx
);
6585 ctx
.gs_max_out_vertices
= geom_shader
->info
.gs
.vertices_out
;
6586 ac_setup_rings(&ctx
);
6588 ctx
.num_output_clips
= geom_shader
->info
.clip_distance_array_size
;
6589 ctx
.num_output_culls
= geom_shader
->info
.cull_distance_array_size
;
6591 struct ac_nir_context nir_ctx
= {};
6592 nir_ctx
.ac
= ctx
.ac
;
6593 nir_ctx
.abi
= &ctx
.abi
;
6595 nir_ctx
.nctx
= &ctx
;
6598 nir_foreach_variable(variable
, &geom_shader
->outputs
) {
6599 scan_shader_output_decl(&ctx
, variable
);
6600 handle_shader_output_decl(&nir_ctx
, geom_shader
, variable
);
6603 ac_gs_copy_shader_emit(&ctx
);
6607 LLVMBuildRetVoid(ctx
.builder
);
6609 ac_llvm_finalize_module(&ctx
);
6611 ac_compile_llvm_module(tm
, ctx
.module
, binary
, config
, shader_info
,
6613 dump_shader
, options
->supports_spill
);