projects / mesa.git / blob
? search:
summary | shortlog | log | commit | commitdiff | tree
history | raw | HEAD
radeonsi/nir: implement FBFETCH for KHR_blend_equation_advanced
[mesa.git] / src / amd / common / ac_nir_to_llvm.c
1 /*
2 * Copyright © 2016 Bas Nieuwenhuizen
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
21 * IN THE SOFTWARE.
22 */
23
24 #include "ac_nir_to_llvm.h"
25 #include "ac_llvm_build.h"
26 #include "ac_llvm_util.h"
27 #include "ac_binary.h"
28 #include "sid.h"
29 #include "nir/nir.h"
30 #include "nir/nir_deref.h"
31 #include "util/bitscan.h"
32 #include "util/u_math.h"
33 #include "ac_shader_abi.h"
34 #include "ac_shader_util.h"
35
36 struct ac_nir_context {
37 struct ac_llvm_context ac;
38 struct ac_shader_abi *abi;
39
40 gl_shader_stage stage;
41 shader_info *info;
42
43 LLVMValueRef *ssa_defs;
44
45 struct hash_table *defs;
46 struct hash_table *phis;
47 struct hash_table *vars;
48
49 LLVMValueRef main_function;
50 LLVMBasicBlockRef continue_block;
51 LLVMBasicBlockRef break_block;
52
53 int num_locals;
54 LLVMValueRef *locals;
55 };
56
57 static LLVMValueRef get_sampler_desc(struct ac_nir_context *ctx,
58 nir_deref_instr *deref_instr,
59 enum ac_descriptor_type desc_type,
60 const nir_instr *instr,
61 bool image, bool write);
62
63 static void
64 build_store_values_extended(struct ac_llvm_context *ac,
65 LLVMValueRef *values,
66 unsigned value_count,
67 unsigned value_stride,
68 LLVMValueRef vec)
69 {
70 LLVMBuilderRef builder = ac->builder;
71 unsigned i;
72
73 for (i = 0; i < value_count; i++) {
74 LLVMValueRef ptr = values[i * value_stride];
75 LLVMValueRef index = LLVMConstInt(ac->i32, i, false);
76 LLVMValueRef value = LLVMBuildExtractElement(builder, vec, index, "");
77 LLVMBuildStore(builder, value, ptr);
78 }
79 }
80
81 static enum ac_image_dim
82 get_ac_sampler_dim(const struct ac_llvm_context *ctx, enum glsl_sampler_dim dim,
83 bool is_array)
84 {
85 switch (dim) {
86 case GLSL_SAMPLER_DIM_1D:
87 if (ctx->chip_class == GFX9)
88 return is_array ? ac_image_2darray : ac_image_2d;
89 return is_array ? ac_image_1darray : ac_image_1d;
90 case GLSL_SAMPLER_DIM_2D:
91 case GLSL_SAMPLER_DIM_RECT:
92 case GLSL_SAMPLER_DIM_EXTERNAL:
93 return is_array ? ac_image_2darray : ac_image_2d;
94 case GLSL_SAMPLER_DIM_3D:
95 return ac_image_3d;
96 case GLSL_SAMPLER_DIM_CUBE:
97 return ac_image_cube;
98 case GLSL_SAMPLER_DIM_MS:
99 return is_array ? ac_image_2darraymsaa : ac_image_2dmsaa;
100 case GLSL_SAMPLER_DIM_SUBPASS:
101 return ac_image_2darray;
102 case GLSL_SAMPLER_DIM_SUBPASS_MS:
103 return ac_image_2darraymsaa;
104 default:
105 unreachable("bad sampler dim");
106 }
107 }
108
109 static enum ac_image_dim
110 get_ac_image_dim(const struct ac_llvm_context *ctx, enum glsl_sampler_dim sdim,
111 bool is_array)
112 {
113 enum ac_image_dim dim = get_ac_sampler_dim(ctx, sdim, is_array);
114
115 if (dim == ac_image_cube ||
116 (ctx->chip_class <= GFX8 && dim == ac_image_3d))
117 dim = ac_image_2darray;
118
119 return dim;
120 }
121
122 static LLVMTypeRef get_def_type(struct ac_nir_context *ctx,
123 const nir_ssa_def *def)
124 {
125 LLVMTypeRef type = LLVMIntTypeInContext(ctx->ac.context, def->bit_size);
126 if (def->num_components > 1) {
127 type = LLVMVectorType(type, def->num_components);
128 }
129 return type;
130 }
131
132 static LLVMValueRef get_src(struct ac_nir_context *nir, nir_src src)
133 {
134 assert(src.is_ssa);
135 return nir->ssa_defs[src.ssa->index];
136 }
137
138 static LLVMValueRef
139 get_memory_ptr(struct ac_nir_context *ctx, nir_src src)
140 {
141 LLVMValueRef ptr = get_src(ctx, src);
142 ptr = LLVMBuildGEP(ctx->ac.builder, ctx->ac.lds, &ptr, 1, "");
143 int addr_space = LLVMGetPointerAddressSpace(LLVMTypeOf(ptr));
144
145 return LLVMBuildBitCast(ctx->ac.builder, ptr,
146 LLVMPointerType(ctx->ac.i32, addr_space), "");
147 }
148
149 static LLVMBasicBlockRef get_block(struct ac_nir_context *nir,
150 const struct nir_block *b)
151 {
152 struct hash_entry *entry = _mesa_hash_table_search(nir->defs, b);
153 return (LLVMBasicBlockRef)entry->data;
154 }
155
156 static LLVMValueRef get_alu_src(struct ac_nir_context *ctx,
157 nir_alu_src src,
158 unsigned num_components)
159 {
160 LLVMValueRef value = get_src(ctx, src.src);
161 bool need_swizzle = false;
162
163 assert(value);
164 unsigned src_components = ac_get_llvm_num_components(value);
165 for (unsigned i = 0; i < num_components; ++i) {
166 assert(src.swizzle[i] < src_components);
167 if (src.swizzle[i] != i)
168 need_swizzle = true;
169 }
170
171 if (need_swizzle || num_components != src_components) {
172 LLVMValueRef masks[] = {
173 LLVMConstInt(ctx->ac.i32, src.swizzle[0], false),
174 LLVMConstInt(ctx->ac.i32, src.swizzle[1], false),
175 LLVMConstInt(ctx->ac.i32, src.swizzle[2], false),
176 LLVMConstInt(ctx->ac.i32, src.swizzle[3], false)};
177
178 if (src_components > 1 && num_components == 1) {
179 value = LLVMBuildExtractElement(ctx->ac.builder, value,
180 masks[0], "");
181 } else if (src_components == 1 && num_components > 1) {
182 LLVMValueRef values[] = {value, value, value, value};
183 value = ac_build_gather_values(&ctx->ac, values, num_components);
184 } else {
185 LLVMValueRef swizzle = LLVMConstVector(masks, num_components);
186 value = LLVMBuildShuffleVector(ctx->ac.builder, value, value,
187 swizzle, "");
188 }
189 }
190 assert(!src.negate);
191 assert(!src.abs);
192 return value;
193 }
194
195 static LLVMValueRef emit_int_cmp(struct ac_llvm_context *ctx,
196 LLVMIntPredicate pred, LLVMValueRef src0,
197 LLVMValueRef src1)
198 {
199 LLVMValueRef result = LLVMBuildICmp(ctx->builder, pred, src0, src1, "");
200 return LLVMBuildSelect(ctx->builder, result,
201 LLVMConstInt(ctx->i32, 0xFFFFFFFF, false),
202 ctx->i32_0, "");
203 }
204
205 static LLVMValueRef emit_float_cmp(struct ac_llvm_context *ctx,
206 LLVMRealPredicate pred, LLVMValueRef src0,
207 LLVMValueRef src1)
208 {
209 LLVMValueRef result;
210 src0 = ac_to_float(ctx, src0);
211 src1 = ac_to_float(ctx, src1);
212 result = LLVMBuildFCmp(ctx->builder, pred, src0, src1, "");
213 return LLVMBuildSelect(ctx->builder, result,
214 LLVMConstInt(ctx->i32, 0xFFFFFFFF, false),
215 ctx->i32_0, "");
216 }
217
218 static LLVMValueRef emit_intrin_1f_param(struct ac_llvm_context *ctx,
219 const char *intrin,
220 LLVMTypeRef result_type,
221 LLVMValueRef src0)
222 {
223 char name[64];
224 LLVMValueRef params[] = {
225 ac_to_float(ctx, src0),
226 };
227
228 MAYBE_UNUSED const int length = snprintf(name, sizeof(name), "%s.f%d", intrin,
229 ac_get_elem_bits(ctx, result_type));
230 assert(length < sizeof(name));
231 return ac_build_intrinsic(ctx, name, result_type, params, 1, AC_FUNC_ATTR_READNONE);
232 }
233
234 static LLVMValueRef emit_intrin_2f_param(struct ac_llvm_context *ctx,
235 const char *intrin,
236 LLVMTypeRef result_type,
237 LLVMValueRef src0, LLVMValueRef src1)
238 {
239 char name[64];
240 LLVMValueRef params[] = {
241 ac_to_float(ctx, src0),
242 ac_to_float(ctx, src1),
243 };
244
245 MAYBE_UNUSED const int length = snprintf(name, sizeof(name), "%s.f%d", intrin,
246 ac_get_elem_bits(ctx, result_type));
247 assert(length < sizeof(name));
248 return ac_build_intrinsic(ctx, name, result_type, params, 2, AC_FUNC_ATTR_READNONE);
249 }
250
251 static LLVMValueRef emit_intrin_3f_param(struct ac_llvm_context *ctx,
252 const char *intrin,
253 LLVMTypeRef result_type,
254 LLVMValueRef src0, LLVMValueRef src1, LLVMValueRef src2)
255 {
256 char name[64];
257 LLVMValueRef params[] = {
258 ac_to_float(ctx, src0),
259 ac_to_float(ctx, src1),
260 ac_to_float(ctx, src2),
261 };
262
263 MAYBE_UNUSED const int length = snprintf(name, sizeof(name), "%s.f%d", intrin,
264 ac_get_elem_bits(ctx, result_type));
265 assert(length < sizeof(name));
266 return ac_build_intrinsic(ctx, name, result_type, params, 3, AC_FUNC_ATTR_READNONE);
267 }
268
269 static LLVMValueRef emit_bcsel(struct ac_llvm_context *ctx,
270 LLVMValueRef src0, LLVMValueRef src1, LLVMValueRef src2)
271 {
272 assert(LLVMGetTypeKind(LLVMTypeOf(src0)) != LLVMVectorTypeKind);
273
274 LLVMValueRef v = LLVMBuildICmp(ctx->builder, LLVMIntNE, src0,
275 ctx->i32_0, "");
276 return LLVMBuildSelect(ctx->builder, v,
277 ac_to_integer_or_pointer(ctx, src1),
278 ac_to_integer_or_pointer(ctx, src2), "");
279 }
280
281 static LLVMValueRef emit_iabs(struct ac_llvm_context *ctx,
282 LLVMValueRef src0)
283 {
284 return ac_build_imax(ctx, src0, LLVMBuildNeg(ctx->builder, src0, ""));
285 }
286
287 static LLVMValueRef emit_uint_carry(struct ac_llvm_context *ctx,
288 const char *intrin,
289 LLVMValueRef src0, LLVMValueRef src1)
290 {
291 LLVMTypeRef ret_type;
292 LLVMTypeRef types[] = { ctx->i32, ctx->i1 };
293 LLVMValueRef res;
294 LLVMValueRef params[] = { src0, src1 };
295 ret_type = LLVMStructTypeInContext(ctx->context, types,
296 2, true);
297
298 res = ac_build_intrinsic(ctx, intrin, ret_type,
299 params, 2, AC_FUNC_ATTR_READNONE);
300
301 res = LLVMBuildExtractValue(ctx->builder, res, 1, "");
302 res = LLVMBuildZExt(ctx->builder, res, ctx->i32, "");
303 return res;
304 }
305
306 static LLVMValueRef emit_b2f(struct ac_llvm_context *ctx,
307 LLVMValueRef src0,
308 unsigned bitsize)
309 {
310 LLVMValueRef result = LLVMBuildAnd(ctx->builder, src0,
311 LLVMBuildBitCast(ctx->builder, LLVMConstReal(ctx->f32, 1.0), ctx->i32, ""),
312 "");
313 result = LLVMBuildBitCast(ctx->builder, result, ctx->f32, "");
314
315 switch (bitsize) {
316 case 16:
317 return LLVMBuildFPTrunc(ctx->builder, result, ctx->f16, "");
318 case 32:
319 return result;
320 case 64:
321 return LLVMBuildFPExt(ctx->builder, result, ctx->f64, "");
322 default:
323 unreachable("Unsupported bit size.");
324 }
325 }
326
327 static LLVMValueRef emit_f2b(struct ac_llvm_context *ctx,
328 LLVMValueRef src0)
329 {
330 src0 = ac_to_float(ctx, src0);
331 LLVMValueRef zero = LLVMConstNull(LLVMTypeOf(src0));
332 return LLVMBuildSExt(ctx->builder,
333 LLVMBuildFCmp(ctx->builder, LLVMRealUNE, src0, zero, ""),
334 ctx->i32, "");
335 }
336
337 static LLVMValueRef emit_b2i(struct ac_llvm_context *ctx,
338 LLVMValueRef src0,
339 unsigned bitsize)
340 {
341 LLVMValueRef result = LLVMBuildAnd(ctx->builder, src0, ctx->i32_1, "");
342
343 switch (bitsize) {
344 case 8:
345 return LLVMBuildTrunc(ctx->builder, result, ctx->i8, "");
346 case 16:
347 return LLVMBuildTrunc(ctx->builder, result, ctx->i16, "");
348 case 32:
349 return result;
350 case 64:
351 return LLVMBuildZExt(ctx->builder, result, ctx->i64, "");
352 default:
353 unreachable("Unsupported bit size.");
354 }
355 }
356
357 static LLVMValueRef emit_i2b(struct ac_llvm_context *ctx,
358 LLVMValueRef src0)
359 {
360 LLVMValueRef zero = LLVMConstNull(LLVMTypeOf(src0));
361 return LLVMBuildSExt(ctx->builder,
362 LLVMBuildICmp(ctx->builder, LLVMIntNE, src0, zero, ""),
363 ctx->i32, "");
364 }
365
366 static LLVMValueRef emit_f2f16(struct ac_llvm_context *ctx,
367 LLVMValueRef src0)
368 {
369 LLVMValueRef result;
370 LLVMValueRef cond = NULL;
371
372 src0 = ac_to_float(ctx, src0);
373 result = LLVMBuildFPTrunc(ctx->builder, src0, ctx->f16, "");
374
375 if (ctx->chip_class >= GFX8) {
376 LLVMValueRef args[2];
377 /* Check if the result is a denormal - and flush to 0 if so. */
378 args[0] = result;
379 args[1] = LLVMConstInt(ctx->i32, N_SUBNORMAL | P_SUBNORMAL, false);
380 cond = ac_build_intrinsic(ctx, "llvm.amdgcn.class.f16", ctx->i1, args, 2, AC_FUNC_ATTR_READNONE);
381 }
382
383 /* need to convert back up to f32 */
384 result = LLVMBuildFPExt(ctx->builder, result, ctx->f32, "");
385
386 if (ctx->chip_class >= GFX8)
387 result = LLVMBuildSelect(ctx->builder, cond, ctx->f32_0, result, "");
388 else {
389 /* for GFX6-GFX7 */
390 /* 0x38800000 is smallest half float value (2^-14) in 32-bit float,
391 * so compare the result and flush to 0 if it's smaller.
392 */
393 LLVMValueRef temp, cond2;
394 temp = emit_intrin_1f_param(ctx, "llvm.fabs", ctx->f32, result);
395 cond = LLVMBuildFCmp(ctx->builder, LLVMRealUGT,
396 LLVMBuildBitCast(ctx->builder, LLVMConstInt(ctx->i32, 0x38800000, false), ctx->f32, ""),
397 temp, "");
398 cond2 = LLVMBuildFCmp(ctx->builder, LLVMRealUNE,
399 temp, ctx->f32_0, "");
400 cond = LLVMBuildAnd(ctx->builder, cond, cond2, "");
401 result = LLVMBuildSelect(ctx->builder, cond, ctx->f32_0, result, "");
402 }
403 return result;
404 }
405
406 static LLVMValueRef emit_umul_high(struct ac_llvm_context *ctx,
407 LLVMValueRef src0, LLVMValueRef src1)
408 {
409 LLVMValueRef dst64, result;
410 src0 = LLVMBuildZExt(ctx->builder, src0, ctx->i64, "");
411 src1 = LLVMBuildZExt(ctx->builder, src1, ctx->i64, "");
412
413 dst64 = LLVMBuildMul(ctx->builder, src0, src1, "");
414 dst64 = LLVMBuildLShr(ctx->builder, dst64, LLVMConstInt(ctx->i64, 32, false), "");
415 result = LLVMBuildTrunc(ctx->builder, dst64, ctx->i32, "");
416 return result;
417 }
418
419 static LLVMValueRef emit_imul_high(struct ac_llvm_context *ctx,
420 LLVMValueRef src0, LLVMValueRef src1)
421 {
422 LLVMValueRef dst64, result;
423 src0 = LLVMBuildSExt(ctx->builder, src0, ctx->i64, "");
424 src1 = LLVMBuildSExt(ctx->builder, src1, ctx->i64, "");
425
426 dst64 = LLVMBuildMul(ctx->builder, src0, src1, "");
427 dst64 = LLVMBuildAShr(ctx->builder, dst64, LLVMConstInt(ctx->i64, 32, false), "");
428 result = LLVMBuildTrunc(ctx->builder, dst64, ctx->i32, "");
429 return result;
430 }
431
432 static LLVMValueRef emit_bfm(struct ac_llvm_context *ctx,
433 LLVMValueRef bits, LLVMValueRef offset)
434 {
435 /* mask = ((1 << bits) - 1) << offset */
436 return LLVMBuildShl(ctx->builder,
437 LLVMBuildSub(ctx->builder,
438 LLVMBuildShl(ctx->builder,
439 ctx->i32_1,
440 bits, ""),
441 ctx->i32_1, ""),
442 offset, "");
443 }
444
445 static LLVMValueRef emit_bitfield_select(struct ac_llvm_context *ctx,
446 LLVMValueRef mask, LLVMValueRef insert,
447 LLVMValueRef base)
448 {
449 /* Calculate:
450 * (mask & insert) | (~mask & base) = base ^ (mask & (insert ^ base))
451 * Use the right-hand side, which the LLVM backend can convert to V_BFI.
452 */
453 return LLVMBuildXor(ctx->builder, base,
454 LLVMBuildAnd(ctx->builder, mask,
455 LLVMBuildXor(ctx->builder, insert, base, ""), ""), "");
456 }
457
458 static LLVMValueRef emit_pack_2x16(struct ac_llvm_context *ctx,
459 LLVMValueRef src0,
460 LLVMValueRef (*pack)(struct ac_llvm_context *ctx,
461 LLVMValueRef args[2]))
462 {
463 LLVMValueRef comp[2];
464
465 src0 = ac_to_float(ctx, src0);
466 comp[0] = LLVMBuildExtractElement(ctx->builder, src0, ctx->i32_0, "");
467 comp[1] = LLVMBuildExtractElement(ctx->builder, src0, ctx->i32_1, "");
468
469 return LLVMBuildBitCast(ctx->builder, pack(ctx, comp), ctx->i32, "");
470 }
471
472 static LLVMValueRef emit_unpack_half_2x16(struct ac_llvm_context *ctx,
473 LLVMValueRef src0)
474 {
475 LLVMValueRef const16 = LLVMConstInt(ctx->i32, 16, false);
476 LLVMValueRef temps[2], val;
477 int i;
478
479 for (i = 0; i < 2; i++) {
480 val = i == 1 ? LLVMBuildLShr(ctx->builder, src0, const16, "") : src0;
481 val = LLVMBuildTrunc(ctx->builder, val, ctx->i16, "");
482 val = LLVMBuildBitCast(ctx->builder, val, ctx->f16, "");
483 temps[i] = LLVMBuildFPExt(ctx->builder, val, ctx->f32, "");
484 }
485 return ac_build_gather_values(ctx, temps, 2);
486 }
487
488 static LLVMValueRef emit_ddxy(struct ac_nir_context *ctx,
489 nir_op op,
490 LLVMValueRef src0)
491 {
492 unsigned mask;
493 int idx;
494 LLVMValueRef result;
495
496 if (op == nir_op_fddx_fine)
497 mask = AC_TID_MASK_LEFT;
498 else if (op == nir_op_fddy_fine)
499 mask = AC_TID_MASK_TOP;
500 else
501 mask = AC_TID_MASK_TOP_LEFT;
502
503 /* for DDX we want to next X pixel, DDY next Y pixel. */
504 if (op == nir_op_fddx_fine ||
505 op == nir_op_fddx_coarse ||
506 op == nir_op_fddx)
507 idx = 1;
508 else
509 idx = 2;
510
511 result = ac_build_ddxy(&ctx->ac, mask, idx, src0);
512 return result;
513 }
514
515 static void visit_alu(struct ac_nir_context *ctx, const nir_alu_instr *instr)
516 {
517 LLVMValueRef src[4], result = NULL;
518 unsigned num_components = instr->dest.dest.ssa.num_components;
519 unsigned src_components;
520 LLVMTypeRef def_type = get_def_type(ctx, &instr->dest.dest.ssa);
521
522 assert(nir_op_infos[instr->op].num_inputs <= ARRAY_SIZE(src));
523 switch (instr->op) {
524 case nir_op_vec2:
525 case nir_op_vec3:
526 case nir_op_vec4:
527 src_components = 1;
528 break;
529 case nir_op_pack_half_2x16:
530 case nir_op_pack_snorm_2x16:
531 case nir_op_pack_unorm_2x16:
532 src_components = 2;
533 break;
534 case nir_op_unpack_half_2x16:
535 src_components = 1;
536 break;
537 case nir_op_cube_face_coord:
538 case nir_op_cube_face_index:
539 src_components = 3;
540 break;
541 default:
542 src_components = num_components;
543 break;
544 }
545 for (unsigned i = 0; i < nir_op_infos[instr->op].num_inputs; i++)
546 src[i] = get_alu_src(ctx, instr->src[i], src_components);
547
548 switch (instr->op) {
549 case nir_op_mov:
550 result = src[0];
551 break;
552 case nir_op_fneg:
553 src[0] = ac_to_float(&ctx->ac, src[0]);
554 result = LLVMBuildFNeg(ctx->ac.builder, src[0], "");
555 break;
556 case nir_op_ineg:
557 result = LLVMBuildNeg(ctx->ac.builder, src[0], "");
558 break;
559 case nir_op_inot:
560 result = LLVMBuildNot(ctx->ac.builder, src[0], "");
561 break;
562 case nir_op_iadd:
563 result = LLVMBuildAdd(ctx->ac.builder, src[0], src[1], "");
564 break;
565 case nir_op_fadd:
566 src[0] = ac_to_float(&ctx->ac, src[0]);
567 src[1] = ac_to_float(&ctx->ac, src[1]);
568 result = LLVMBuildFAdd(ctx->ac.builder, src[0], src[1], "");
569 break;
570 case nir_op_fsub:
571 src[0] = ac_to_float(&ctx->ac, src[0]);
572 src[1] = ac_to_float(&ctx->ac, src[1]);
573 result = LLVMBuildFSub(ctx->ac.builder, src[0], src[1], "");
574 break;
575 case nir_op_isub:
576 result = LLVMBuildSub(ctx->ac.builder, src[0], src[1], "");
577 break;
578 case nir_op_imul:
579 result = LLVMBuildMul(ctx->ac.builder, src[0], src[1], "");
580 break;
581 case nir_op_imod:
582 result = LLVMBuildSRem(ctx->ac.builder, src[0], src[1], "");
583 break;
584 case nir_op_umod:
585 result = LLVMBuildURem(ctx->ac.builder, src[0], src[1], "");
586 break;
587 case nir_op_fmod:
588 src[0] = ac_to_float(&ctx->ac, src[0]);
589 src[1] = ac_to_float(&ctx->ac, src[1]);
590 result = ac_build_fdiv(&ctx->ac, src[0], src[1]);
591 result = emit_intrin_1f_param(&ctx->ac, "llvm.floor",
592 ac_to_float_type(&ctx->ac, def_type), result);
593 result = LLVMBuildFMul(ctx->ac.builder, src[1] , result, "");
594 result = LLVMBuildFSub(ctx->ac.builder, src[0], result, "");
595 break;
596 case nir_op_frem:
597 src[0] = ac_to_float(&ctx->ac, src[0]);
598 src[1] = ac_to_float(&ctx->ac, src[1]);
599 result = LLVMBuildFRem(ctx->ac.builder, src[0], src[1], "");
600 break;
601 case nir_op_irem:
602 result = LLVMBuildSRem(ctx->ac.builder, src[0], src[1], "");
603 break;
604 case nir_op_idiv:
605 result = LLVMBuildSDiv(ctx->ac.builder, src[0], src[1], "");
606 break;
607 case nir_op_udiv:
608 result = LLVMBuildUDiv(ctx->ac.builder, src[0], src[1], "");
609 break;
610 case nir_op_fmul:
611 src[0] = ac_to_float(&ctx->ac, src[0]);
612 src[1] = ac_to_float(&ctx->ac, src[1]);
613 result = LLVMBuildFMul(ctx->ac.builder, src[0], src[1], "");
614 break;
615 case nir_op_frcp:
616 src[0] = ac_to_float(&ctx->ac, src[0]);
617 result = ac_build_fdiv(&ctx->ac, LLVMConstReal(LLVMTypeOf(src[0]), 1.0), src[0]);
618 break;
619 case nir_op_iand:
620 result = LLVMBuildAnd(ctx->ac.builder, src[0], src[1], "");
621 break;
622 case nir_op_ior:
623 result = LLVMBuildOr(ctx->ac.builder, src[0], src[1], "");
624 break;
625 case nir_op_ixor:
626 result = LLVMBuildXor(ctx->ac.builder, src[0], src[1], "");
627 break;
628 case nir_op_ishl:
629 if (ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[1])) < ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[0])))
630 src[1] = LLVMBuildZExt(ctx->ac.builder, src[1],
631 LLVMTypeOf(src[0]), "");
632 else if (ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[1])) > ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[0])))
633 src[1] = LLVMBuildTrunc(ctx->ac.builder, src[1],
634 LLVMTypeOf(src[0]), "");
635 result = LLVMBuildShl(ctx->ac.builder, src[0], src[1], "");
636 break;
637 case nir_op_ishr:
638 if (ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[1])) < ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[0])))
639 src[1] = LLVMBuildZExt(ctx->ac.builder, src[1],
640 LLVMTypeOf(src[0]), "");
641 else if (ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[1])) > ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[0])))
642 src[1] = LLVMBuildTrunc(ctx->ac.builder, src[1],
643 LLVMTypeOf(src[0]), "");
644 result = LLVMBuildAShr(ctx->ac.builder, src[0], src[1], "");
645 break;
646 case nir_op_ushr:
647 if (ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[1])) < ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[0])))
648 src[1] = LLVMBuildZExt(ctx->ac.builder, src[1],
649 LLVMTypeOf(src[0]), "");
650 else if (ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[1])) > ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[0])))
651 src[1] = LLVMBuildTrunc(ctx->ac.builder, src[1],
652 LLVMTypeOf(src[0]), "");
653 result = LLVMBuildLShr(ctx->ac.builder, src[0], src[1], "");
654 break;
655 case nir_op_ilt32:
656 result = emit_int_cmp(&ctx->ac, LLVMIntSLT, src[0], src[1]);
657 break;
658 case nir_op_ine32:
659 result = emit_int_cmp(&ctx->ac, LLVMIntNE, src[0], src[1]);
660 break;
661 case nir_op_ieq32:
662 result = emit_int_cmp(&ctx->ac, LLVMIntEQ, src[0], src[1]);
663 break;
664 case nir_op_ige32:
665 result = emit_int_cmp(&ctx->ac, LLVMIntSGE, src[0], src[1]);
666 break;
667 case nir_op_ult32:
668 result = emit_int_cmp(&ctx->ac, LLVMIntULT, src[0], src[1]);
669 break;
670 case nir_op_uge32:
671 result = emit_int_cmp(&ctx->ac, LLVMIntUGE, src[0], src[1]);
672 break;
673 case nir_op_feq32:
674 result = emit_float_cmp(&ctx->ac, LLVMRealOEQ, src[0], src[1]);
675 break;
676 case nir_op_fne32:
677 result = emit_float_cmp(&ctx->ac, LLVMRealUNE, src[0], src[1]);
678 break;
679 case nir_op_flt32:
680 result = emit_float_cmp(&ctx->ac, LLVMRealOLT, src[0], src[1]);
681 break;
682 case nir_op_fge32:
683 result = emit_float_cmp(&ctx->ac, LLVMRealOGE, src[0], src[1]);
684 break;
685 case nir_op_fabs:
686 result = emit_intrin_1f_param(&ctx->ac, "llvm.fabs",
687 ac_to_float_type(&ctx->ac, def_type), src[0]);
688 break;
689 case nir_op_iabs:
690 result = emit_iabs(&ctx->ac, src[0]);
691 break;
692 case nir_op_imax:
693 result = ac_build_imax(&ctx->ac, src[0], src[1]);
694 break;
695 case nir_op_imin:
696 result = ac_build_imin(&ctx->ac, src[0], src[1]);
697 break;
698 case nir_op_umax:
699 result = ac_build_umax(&ctx->ac, src[0], src[1]);
700 break;
701 case nir_op_umin:
702 result = ac_build_umin(&ctx->ac, src[0], src[1]);
703 break;
704 case nir_op_isign:
705 result = ac_build_isign(&ctx->ac, src[0],
706 instr->dest.dest.ssa.bit_size);
707 break;
708 case nir_op_fsign:
709 src[0] = ac_to_float(&ctx->ac, src[0]);
710 result = ac_build_fsign(&ctx->ac, src[0],
711 instr->dest.dest.ssa.bit_size);
712 break;
713 case nir_op_ffloor:
714 result = emit_intrin_1f_param(&ctx->ac, "llvm.floor",
715 ac_to_float_type(&ctx->ac, def_type), src[0]);
716 break;
717 case nir_op_ftrunc:
718 result = emit_intrin_1f_param(&ctx->ac, "llvm.trunc",
719 ac_to_float_type(&ctx->ac, def_type), src[0]);
720 break;
721 case nir_op_fceil:
722 result = emit_intrin_1f_param(&ctx->ac, "llvm.ceil",
723 ac_to_float_type(&ctx->ac, def_type), src[0]);
724 break;
725 case nir_op_fround_even:
726 result = emit_intrin_1f_param(&ctx->ac, "llvm.rint",
727 ac_to_float_type(&ctx->ac, def_type),src[0]);
728 break;
729 case nir_op_ffract:
730 src[0] = ac_to_float(&ctx->ac, src[0]);
731 result = ac_build_fract(&ctx->ac, src[0],
732 instr->dest.dest.ssa.bit_size);
733 break;
734 case nir_op_fsin:
735 result = emit_intrin_1f_param(&ctx->ac, "llvm.sin",
736 ac_to_float_type(&ctx->ac, def_type), src[0]);
737 break;
738 case nir_op_fcos:
739 result = emit_intrin_1f_param(&ctx->ac, "llvm.cos",
740 ac_to_float_type(&ctx->ac, def_type), src[0]);
741 break;
742 case nir_op_fsqrt:
743 result = emit_intrin_1f_param(&ctx->ac, "llvm.sqrt",
744 ac_to_float_type(&ctx->ac, def_type), src[0]);
745 break;
746 case nir_op_fexp2:
747 result = emit_intrin_1f_param(&ctx->ac, "llvm.exp2",
748 ac_to_float_type(&ctx->ac, def_type), src[0]);
749 break;
750 case nir_op_flog2:
751 result = emit_intrin_1f_param(&ctx->ac, "llvm.log2",
752 ac_to_float_type(&ctx->ac, def_type), src[0]);
753 break;
754 case nir_op_frsq:
755 result = emit_intrin_1f_param(&ctx->ac, "llvm.sqrt",
756 ac_to_float_type(&ctx->ac, def_type), src[0]);
757 result = ac_build_fdiv(&ctx->ac, LLVMConstReal(LLVMTypeOf(result), 1.0), result);
758 break;
759 case nir_op_frexp_exp:
760 src[0] = ac_to_float(&ctx->ac, src[0]);
761 result = ac_build_frexp_exp(&ctx->ac, src[0],
762 ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[0])));
763 if (ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[0])) == 16)
764 result = LLVMBuildSExt(ctx->ac.builder, result,
765 ctx->ac.i32, "");
766 break;
767 case nir_op_frexp_sig:
768 src[0] = ac_to_float(&ctx->ac, src[0]);
769 result = ac_build_frexp_mant(&ctx->ac, src[0],
770 instr->dest.dest.ssa.bit_size);
771 break;
772 case nir_op_fpow:
773 result = emit_intrin_2f_param(&ctx->ac, "llvm.pow",
774 ac_to_float_type(&ctx->ac, def_type), src[0], src[1]);
775 break;
776 case nir_op_fmax:
777 result = emit_intrin_2f_param(&ctx->ac, "llvm.maxnum",
778 ac_to_float_type(&ctx->ac, def_type), src[0], src[1]);
779 if (ctx->ac.chip_class < GFX9 &&
780 instr->dest.dest.ssa.bit_size == 32) {
781 /* Only pre-GFX9 chips do not flush denorms. */
782 result = emit_intrin_1f_param(&ctx->ac, "llvm.canonicalize",
783 ac_to_float_type(&ctx->ac, def_type),
784 result);
785 }
786 break;
787 case nir_op_fmin:
788 result = emit_intrin_2f_param(&ctx->ac, "llvm.minnum",
789 ac_to_float_type(&ctx->ac, def_type), src[0], src[1]);
790 if (ctx->ac.chip_class < GFX9 &&
791 instr->dest.dest.ssa.bit_size == 32) {
792 /* Only pre-GFX9 chips do not flush denorms. */
793 result = emit_intrin_1f_param(&ctx->ac, "llvm.canonicalize",
794 ac_to_float_type(&ctx->ac, def_type),
795 result);
796 }
797 break;
798 case nir_op_ffma:
799 result = emit_intrin_3f_param(&ctx->ac, "llvm.fmuladd",
800 ac_to_float_type(&ctx->ac, def_type), src[0], src[1], src[2]);
801 break;
802 case nir_op_ldexp:
803 src[0] = ac_to_float(&ctx->ac, src[0]);
804 if (ac_get_elem_bits(&ctx->ac, def_type) == 32)
805 result = ac_build_intrinsic(&ctx->ac, "llvm.amdgcn.ldexp.f32", ctx->ac.f32, src, 2, AC_FUNC_ATTR_READNONE);
806 else if (ac_get_elem_bits(&ctx->ac, def_type) == 16)
807 result = ac_build_intrinsic(&ctx->ac, "llvm.amdgcn.ldexp.f16", ctx->ac.f16, src, 2, AC_FUNC_ATTR_READNONE);
808 else
809 result = ac_build_intrinsic(&ctx->ac, "llvm.amdgcn.ldexp.f64", ctx->ac.f64, src, 2, AC_FUNC_ATTR_READNONE);
810 break;
811 case nir_op_bfm:
812 result = emit_bfm(&ctx->ac, src[0], src[1]);
813 break;
814 case nir_op_bitfield_select:
815 result = emit_bitfield_select(&ctx->ac, src[0], src[1], src[2]);
816 break;
817 case nir_op_ubfe:
818 result = ac_build_bfe(&ctx->ac, src[0], src[1], src[2], false);
819 break;
820 case nir_op_ibfe:
821 result = ac_build_bfe(&ctx->ac, src[0], src[1], src[2], true);
822 break;
823 case nir_op_bitfield_reverse:
824 result = ac_build_bitfield_reverse(&ctx->ac, src[0]);
825 break;
826 case nir_op_bit_count:
827 result = ac_build_bit_count(&ctx->ac, src[0]);
828 break;
829 case nir_op_vec2:
830 case nir_op_vec3:
831 case nir_op_vec4:
832 for (unsigned i = 0; i < nir_op_infos[instr->op].num_inputs; i++)
833 src[i] = ac_to_integer(&ctx->ac, src[i]);
834 result = ac_build_gather_values(&ctx->ac, src, num_components);
835 break;
836 case nir_op_f2i8:
837 case nir_op_f2i16:
838 case nir_op_f2i32:
839 case nir_op_f2i64:
840 src[0] = ac_to_float(&ctx->ac, src[0]);
841 result = LLVMBuildFPToSI(ctx->ac.builder, src[0], def_type, "");
842 break;
843 case nir_op_f2u8:
844 case nir_op_f2u16:
845 case nir_op_f2u32:
846 case nir_op_f2u64:
847 src[0] = ac_to_float(&ctx->ac, src[0]);
848 result = LLVMBuildFPToUI(ctx->ac.builder, src[0], def_type, "");
849 break;
850 case nir_op_i2f16:
851 case nir_op_i2f32:
852 case nir_op_i2f64:
853 result = LLVMBuildSIToFP(ctx->ac.builder, src[0], ac_to_float_type(&ctx->ac, def_type), "");
854 break;
855 case nir_op_u2f16:
856 case nir_op_u2f32:
857 case nir_op_u2f64:
858 result = LLVMBuildUIToFP(ctx->ac.builder, src[0], ac_to_float_type(&ctx->ac, def_type), "");
859 break;
860 case nir_op_f2f16_rtz:
861 src[0] = ac_to_float(&ctx->ac, src[0]);
862 if (LLVMTypeOf(src[0]) == ctx->ac.f64)
863 src[0] = LLVMBuildFPTrunc(ctx->ac.builder, src[0], ctx->ac.f32, "");
864 LLVMValueRef param[2] = { src[0], ctx->ac.f32_0 };
865 result = ac_build_cvt_pkrtz_f16(&ctx->ac, param);
866 result = LLVMBuildExtractElement(ctx->ac.builder, result, ctx->ac.i32_0, "");
867 break;
868 case nir_op_f2f16_rtne:
869 case nir_op_f2f16:
870 case nir_op_f2f32:
871 case nir_op_f2f64:
872 src[0] = ac_to_float(&ctx->ac, src[0]);
873 if (ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[0])) < ac_get_elem_bits(&ctx->ac, def_type))
874 result = LLVMBuildFPExt(ctx->ac.builder, src[0], ac_to_float_type(&ctx->ac, def_type), "");
875 else
876 result = LLVMBuildFPTrunc(ctx->ac.builder, src[0], ac_to_float_type(&ctx->ac, def_type), "");
877 break;
878 case nir_op_u2u8:
879 case nir_op_u2u16:
880 case nir_op_u2u32:
881 case nir_op_u2u64:
882 if (ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[0])) < ac_get_elem_bits(&ctx->ac, def_type))
883 result = LLVMBuildZExt(ctx->ac.builder, src[0], def_type, "");
884 else
885 result = LLVMBuildTrunc(ctx->ac.builder, src[0], def_type, "");
886 break;
887 case nir_op_i2i8:
888 case nir_op_i2i16:
889 case nir_op_i2i32:
890 case nir_op_i2i64:
891 if (ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[0])) < ac_get_elem_bits(&ctx->ac, def_type))
892 result = LLVMBuildSExt(ctx->ac.builder, src[0], def_type, "");
893 else
894 result = LLVMBuildTrunc(ctx->ac.builder, src[0], def_type, "");
895 break;
896 case nir_op_b32csel:
897 result = emit_bcsel(&ctx->ac, src[0], src[1], src[2]);
898 break;
899 case nir_op_find_lsb:
900 result = ac_find_lsb(&ctx->ac, ctx->ac.i32, src[0]);
901 break;
902 case nir_op_ufind_msb:
903 result = ac_build_umsb(&ctx->ac, src[0], ctx->ac.i32);
904 break;
905 case nir_op_ifind_msb:
906 result = ac_build_imsb(&ctx->ac, src[0], ctx->ac.i32);
907 break;
908 case nir_op_uadd_carry:
909 result = emit_uint_carry(&ctx->ac, "llvm.uadd.with.overflow.i32", src[0], src[1]);
910 break;
911 case nir_op_usub_borrow:
912 result = emit_uint_carry(&ctx->ac, "llvm.usub.with.overflow.i32", src[0], src[1]);
913 break;
914 case nir_op_b2f16:
915 case nir_op_b2f32:
916 case nir_op_b2f64:
917 result = emit_b2f(&ctx->ac, src[0], instr->dest.dest.ssa.bit_size);
918 break;
919 case nir_op_f2b32:
920 result = emit_f2b(&ctx->ac, src[0]);
921 break;
922 case nir_op_b2i8:
923 case nir_op_b2i16:
924 case nir_op_b2i32:
925 case nir_op_b2i64:
926 result = emit_b2i(&ctx->ac, src[0], instr->dest.dest.ssa.bit_size);
927 break;
928 case nir_op_i2b32:
929 result = emit_i2b(&ctx->ac, src[0]);
930 break;
931 case nir_op_fquantize2f16:
932 result = emit_f2f16(&ctx->ac, src[0]);
933 break;
934 case nir_op_umul_high:
935 result = emit_umul_high(&ctx->ac, src[0], src[1]);
936 break;
937 case nir_op_imul_high:
938 result = emit_imul_high(&ctx->ac, src[0], src[1]);
939 break;
940 case nir_op_pack_half_2x16:
941 result = emit_pack_2x16(&ctx->ac, src[0], ac_build_cvt_pkrtz_f16);
942 break;
943 case nir_op_pack_snorm_2x16:
944 result = emit_pack_2x16(&ctx->ac, src[0], ac_build_cvt_pknorm_i16);
945 break;
946 case nir_op_pack_unorm_2x16:
947 result = emit_pack_2x16(&ctx->ac, src[0], ac_build_cvt_pknorm_u16);
948 break;
949 case nir_op_unpack_half_2x16:
950 result = emit_unpack_half_2x16(&ctx->ac, src[0]);
951 break;
952 case nir_op_fddx:
953 case nir_op_fddy:
954 case nir_op_fddx_fine:
955 case nir_op_fddy_fine:
956 case nir_op_fddx_coarse:
957 case nir_op_fddy_coarse:
958 result = emit_ddxy(ctx, instr->op, src[0]);
959 break;
960
961 case nir_op_unpack_64_2x32_split_x: {
962 assert(ac_get_llvm_num_components(src[0]) == 1);
963 LLVMValueRef tmp = LLVMBuildBitCast(ctx->ac.builder, src[0],
964 ctx->ac.v2i32,
965 "");
966 result = LLVMBuildExtractElement(ctx->ac.builder, tmp,
967 ctx->ac.i32_0, "");
968 break;
969 }
970
971 case nir_op_unpack_64_2x32_split_y: {
972 assert(ac_get_llvm_num_components(src[0]) == 1);
973 LLVMValueRef tmp = LLVMBuildBitCast(ctx->ac.builder, src[0],
974 ctx->ac.v2i32,
975 "");
976 result = LLVMBuildExtractElement(ctx->ac.builder, tmp,
977 ctx->ac.i32_1, "");
978 break;
979 }
980
981 case nir_op_pack_64_2x32_split: {
982 LLVMValueRef tmp = ac_build_gather_values(&ctx->ac, src, 2);
983 result = LLVMBuildBitCast(ctx->ac.builder, tmp, ctx->ac.i64, "");
984 break;
985 }
986
987 case nir_op_pack_32_2x16_split: {
988 LLVMValueRef tmp = ac_build_gather_values(&ctx->ac, src, 2);
989 result = LLVMBuildBitCast(ctx->ac.builder, tmp, ctx->ac.i32, "");
990 break;
991 }
992
993 case nir_op_unpack_32_2x16_split_x: {
994 LLVMValueRef tmp = LLVMBuildBitCast(ctx->ac.builder, src[0],
995 ctx->ac.v2i16,
996 "");
997 result = LLVMBuildExtractElement(ctx->ac.builder, tmp,
998 ctx->ac.i32_0, "");
999 break;
1000 }
1001
1002 case nir_op_unpack_32_2x16_split_y: {
1003 LLVMValueRef tmp = LLVMBuildBitCast(ctx->ac.builder, src[0],
1004 ctx->ac.v2i16,
1005 "");
1006 result = LLVMBuildExtractElement(ctx->ac.builder, tmp,
1007 ctx->ac.i32_1, "");
1008 break;
1009 }
1010
1011 case nir_op_cube_face_coord: {
1012 src[0] = ac_to_float(&ctx->ac, src[0]);
1013 LLVMValueRef results[2];
1014 LLVMValueRef in[3];
1015 for (unsigned chan = 0; chan < 3; chan++)
1016 in[chan] = ac_llvm_extract_elem(&ctx->ac, src[0], chan);
1017 results[0] = ac_build_intrinsic(&ctx->ac, "llvm.amdgcn.cubesc",
1018 ctx->ac.f32, in, 3, AC_FUNC_ATTR_READNONE);
1019 results[1] = ac_build_intrinsic(&ctx->ac, "llvm.amdgcn.cubetc",
1020 ctx->ac.f32, in, 3, AC_FUNC_ATTR_READNONE);
1021 LLVMValueRef ma = ac_build_intrinsic(&ctx->ac, "llvm.amdgcn.cubema",
1022 ctx->ac.f32, in, 3, AC_FUNC_ATTR_READNONE);
1023 results[0] = ac_build_fdiv(&ctx->ac, results[0], ma);
1024 results[1] = ac_build_fdiv(&ctx->ac, results[1], ma);
1025 LLVMValueRef offset = LLVMConstReal(ctx->ac.f32, 0.5);
1026 results[0] = LLVMBuildFAdd(ctx->ac.builder, results[0], offset, "");
1027 results[1] = LLVMBuildFAdd(ctx->ac.builder, results[1], offset, "");
1028 result = ac_build_gather_values(&ctx->ac, results, 2);
1029 break;
1030 }
1031
1032 case nir_op_cube_face_index: {
1033 src[0] = ac_to_float(&ctx->ac, src[0]);
1034 LLVMValueRef in[3];
1035 for (unsigned chan = 0; chan < 3; chan++)
1036 in[chan] = ac_llvm_extract_elem(&ctx->ac, src[0], chan);
1037 result = ac_build_intrinsic(&ctx->ac, "llvm.amdgcn.cubeid",
1038 ctx->ac.f32, in, 3, AC_FUNC_ATTR_READNONE);
1039 break;
1040 }
1041
1042 case nir_op_fmin3:
1043 result = emit_intrin_2f_param(&ctx->ac, "llvm.minnum",
1044 ac_to_float_type(&ctx->ac, def_type), src[0], src[1]);
1045 result = emit_intrin_2f_param(&ctx->ac, "llvm.minnum",
1046 ac_to_float_type(&ctx->ac, def_type), result, src[2]);
1047 break;
1048 case nir_op_umin3:
1049 result = ac_build_umin(&ctx->ac, src[0], src[1]);
1050 result = ac_build_umin(&ctx->ac, result, src[2]);
1051 break;
1052 case nir_op_imin3:
1053 result = ac_build_imin(&ctx->ac, src[0], src[1]);
1054 result = ac_build_imin(&ctx->ac, result, src[2]);
1055 break;
1056 case nir_op_fmax3:
1057 result = emit_intrin_2f_param(&ctx->ac, "llvm.maxnum",
1058 ac_to_float_type(&ctx->ac, def_type), src[0], src[1]);
1059 result = emit_intrin_2f_param(&ctx->ac, "llvm.maxnum",
1060 ac_to_float_type(&ctx->ac, def_type), result, src[2]);
1061 break;
1062 case nir_op_umax3:
1063 result = ac_build_umax(&ctx->ac, src[0], src[1]);
1064 result = ac_build_umax(&ctx->ac, result, src[2]);
1065 break;
1066 case nir_op_imax3:
1067 result = ac_build_imax(&ctx->ac, src[0], src[1]);
1068 result = ac_build_imax(&ctx->ac, result, src[2]);
1069 break;
1070 case nir_op_fmed3: {
1071 src[0] = ac_to_float(&ctx->ac, src[0]);
1072 src[1] = ac_to_float(&ctx->ac, src[1]);
1073 src[2] = ac_to_float(&ctx->ac, src[2]);
1074 result = ac_build_fmed3(&ctx->ac, src[0], src[1], src[2],
1075 instr->dest.dest.ssa.bit_size);
1076 break;
1077 }
1078 case nir_op_imed3: {
1079 LLVMValueRef tmp1 = ac_build_imin(&ctx->ac, src[0], src[1]);
1080 LLVMValueRef tmp2 = ac_build_imax(&ctx->ac, src[0], src[1]);
1081 tmp2 = ac_build_imin(&ctx->ac, tmp2, src[2]);
1082 result = ac_build_imax(&ctx->ac, tmp1, tmp2);
1083 break;
1084 }
1085 case nir_op_umed3: {
1086 LLVMValueRef tmp1 = ac_build_umin(&ctx->ac, src[0], src[1]);
1087 LLVMValueRef tmp2 = ac_build_umax(&ctx->ac, src[0], src[1]);
1088 tmp2 = ac_build_umin(&ctx->ac, tmp2, src[2]);
1089 result = ac_build_umax(&ctx->ac, tmp1, tmp2);
1090 break;
1091 }
1092
1093 default:
1094 fprintf(stderr, "Unknown NIR alu instr: ");
1095 nir_print_instr(&instr->instr, stderr);
1096 fprintf(stderr, "\n");
1097 abort();
1098 }
1099
1100 if (result) {
1101 assert(instr->dest.dest.is_ssa);
1102 result = ac_to_integer_or_pointer(&ctx->ac, result);
1103 ctx->ssa_defs[instr->dest.dest.ssa.index] = result;
1104 }
1105 }
1106
1107 static void visit_load_const(struct ac_nir_context *ctx,
1108 const nir_load_const_instr *instr)
1109 {
1110 LLVMValueRef values[4], value = NULL;
1111 LLVMTypeRef element_type =
1112 LLVMIntTypeInContext(ctx->ac.context, instr->def.bit_size);
1113
1114 for (unsigned i = 0; i < instr->def.num_components; ++i) {
1115 switch (instr->def.bit_size) {
1116 case 8:
1117 values[i] = LLVMConstInt(element_type,
1118 instr->value[i].u8, false);
1119 break;
1120 case 16:
1121 values[i] = LLVMConstInt(element_type,
1122 instr->value[i].u16, false);
1123 break;
1124 case 32:
1125 values[i] = LLVMConstInt(element_type,
1126 instr->value[i].u32, false);
1127 break;
1128 case 64:
1129 values[i] = LLVMConstInt(element_type,
1130 instr->value[i].u64, false);
1131 break;
1132 default:
1133 fprintf(stderr,
1134 "unsupported nir load_const bit_size: %d\n",
1135 instr->def.bit_size);
1136 abort();
1137 }
1138 }
1139 if (instr->def.num_components > 1) {
1140 value = LLVMConstVector(values, instr->def.num_components);
1141 } else
1142 value = values[0];
1143
1144 ctx->ssa_defs[instr->def.index] = value;
1145 }
1146
1147 static LLVMValueRef
1148 get_buffer_size(struct ac_nir_context *ctx, LLVMValueRef descriptor, bool in_elements)
1149 {
1150 LLVMValueRef size =
1151 LLVMBuildExtractElement(ctx->ac.builder, descriptor,
1152 LLVMConstInt(ctx->ac.i32, 2, false), "");
1153
1154 /* GFX8 only */
1155 if (ctx->ac.chip_class == GFX8 && in_elements) {
1156 /* On GFX8, the descriptor contains the size in bytes,
1157 * but TXQ must return the size in elements.
1158 * The stride is always non-zero for resources using TXQ.
1159 */
1160 LLVMValueRef stride =
1161 LLVMBuildExtractElement(ctx->ac.builder, descriptor,
1162 ctx->ac.i32_1, "");
1163 stride = LLVMBuildLShr(ctx->ac.builder, stride,
1164 LLVMConstInt(ctx->ac.i32, 16, false), "");
1165 stride = LLVMBuildAnd(ctx->ac.builder, stride,
1166 LLVMConstInt(ctx->ac.i32, 0x3fff, false), "");
1167
1168 size = LLVMBuildUDiv(ctx->ac.builder, size, stride, "");
1169 }
1170 return size;
1171 }
1172
1173 static LLVMValueRef lower_gather4_integer(struct ac_llvm_context *ctx,
1174 nir_variable *var,
1175 struct ac_image_args *args,
1176 const nir_tex_instr *instr)
1177 {
1178 const struct glsl_type *type = glsl_without_array(var->type);
1179 enum glsl_base_type stype = glsl_get_sampler_result_type(type);
1180 LLVMValueRef half_texel[2];
1181 LLVMValueRef compare_cube_wa = NULL;
1182 LLVMValueRef result;
1183
1184 //TODO Rect
1185 {
1186 struct ac_image_args txq_args = { 0 };
1187
1188 txq_args.dim = get_ac_sampler_dim(ctx, instr->sampler_dim, instr->is_array);
1189 txq_args.opcode = ac_image_get_resinfo;
1190 txq_args.dmask = 0xf;
1191 txq_args.lod = ctx->i32_0;
1192 txq_args.resource = args->resource;
1193 txq_args.attributes = AC_FUNC_ATTR_READNONE;
1194 LLVMValueRef size = ac_build_image_opcode(ctx, &txq_args);
1195
1196 for (unsigned c = 0; c < 2; c++) {
1197 half_texel[c] = LLVMBuildExtractElement(ctx->builder, size,
1198 LLVMConstInt(ctx->i32, c, false), "");
1199 half_texel[c] = LLVMBuildUIToFP(ctx->builder, half_texel[c], ctx->f32, "");
1200 half_texel[c] = ac_build_fdiv(ctx, ctx->f32_1, half_texel[c]);
1201 half_texel[c] = LLVMBuildFMul(ctx->builder, half_texel[c],
1202 LLVMConstReal(ctx->f32, -0.5), "");
1203 }
1204 }
1205
1206 LLVMValueRef orig_coords[2] = { args->coords[0], args->coords[1] };
1207
1208 for (unsigned c = 0; c < 2; c++) {
1209 LLVMValueRef tmp;
1210 tmp = LLVMBuildBitCast(ctx->builder, args->coords[c], ctx->f32, "");
1211 args->coords[c] = LLVMBuildFAdd(ctx->builder, tmp, half_texel[c], "");
1212 }
1213
1214 /*
1215 * Apparantly cube has issue with integer types that the workaround doesn't solve,
1216 * so this tests if the format is 8_8_8_8 and an integer type do an alternate
1217 * workaround by sampling using a scaled type and converting.
1218 * This is taken from amdgpu-pro shaders.
1219 */
1220 /* NOTE this produces some ugly code compared to amdgpu-pro,
1221 * LLVM ends up dumping SGPRs into VGPRs to deal with the compare/select,
1222 * and then reads them back. -pro generates two selects,
1223 * one s_cmp for the descriptor rewriting
1224 * one v_cmp for the coordinate and result changes.
1225 */
1226 if (instr->sampler_dim == GLSL_SAMPLER_DIM_CUBE) {
1227 LLVMValueRef tmp, tmp2;
1228
1229 /* workaround 8/8/8/8 uint/sint cube gather bug */
1230 /* first detect it then change to a scaled read and f2i */
1231 tmp = LLVMBuildExtractElement(ctx->builder, args->resource, ctx->i32_1, "");
1232 tmp2 = tmp;
1233
1234 /* extract the DATA_FORMAT */
1235 tmp = ac_build_bfe(ctx, tmp, LLVMConstInt(ctx->i32, 20, false),
1236 LLVMConstInt(ctx->i32, 6, false), false);
1237
1238 /* is the DATA_FORMAT == 8_8_8_8 */
1239 compare_cube_wa = LLVMBuildICmp(ctx->builder, LLVMIntEQ, tmp, LLVMConstInt(ctx->i32, V_008F14_IMG_DATA_FORMAT_8_8_8_8, false), "");
1240
1241 if (stype == GLSL_TYPE_UINT)
1242 /* Create a NUM FORMAT - 0x2 or 0x4 - USCALED or UINT */
1243 tmp = LLVMBuildSelect(ctx->builder, compare_cube_wa, LLVMConstInt(ctx->i32, 0x8000000, false),
1244 LLVMConstInt(ctx->i32, 0x10000000, false), "");
1245 else
1246 /* Create a NUM FORMAT - 0x3 or 0x5 - SSCALED or SINT */
1247 tmp = LLVMBuildSelect(ctx->builder, compare_cube_wa, LLVMConstInt(ctx->i32, 0xc000000, false),
1248 LLVMConstInt(ctx->i32, 0x14000000, false), "");
1249
1250 /* replace the NUM FORMAT in the descriptor */
1251 tmp2 = LLVMBuildAnd(ctx->builder, tmp2, LLVMConstInt(ctx->i32, C_008F14_NUM_FORMAT, false), "");
1252 tmp2 = LLVMBuildOr(ctx->builder, tmp2, tmp, "");
1253
1254 args->resource = LLVMBuildInsertElement(ctx->builder, args->resource, tmp2, ctx->i32_1, "");
1255
1256 /* don't modify the coordinates for this case */
1257 for (unsigned c = 0; c < 2; ++c)
1258 args->coords[c] = LLVMBuildSelect(
1259 ctx->builder, compare_cube_wa,
1260 orig_coords[c], args->coords[c], "");
1261 }
1262
1263 args->attributes = AC_FUNC_ATTR_READNONE;
1264 result = ac_build_image_opcode(ctx, args);
1265
1266 if (instr->sampler_dim == GLSL_SAMPLER_DIM_CUBE) {
1267 LLVMValueRef tmp, tmp2;
1268
1269 /* if the cube workaround is in place, f2i the result. */
1270 for (unsigned c = 0; c < 4; c++) {
1271 tmp = LLVMBuildExtractElement(ctx->builder, result, LLVMConstInt(ctx->i32, c, false), "");
1272 if (stype == GLSL_TYPE_UINT)
1273 tmp2 = LLVMBuildFPToUI(ctx->builder, tmp, ctx->i32, "");
1274 else
1275 tmp2 = LLVMBuildFPToSI(ctx->builder, tmp, ctx->i32, "");
1276 tmp = LLVMBuildBitCast(ctx->builder, tmp, ctx->i32, "");
1277 tmp2 = LLVMBuildBitCast(ctx->builder, tmp2, ctx->i32, "");
1278 tmp = LLVMBuildSelect(ctx->builder, compare_cube_wa, tmp2, tmp, "");
1279 tmp = LLVMBuildBitCast(ctx->builder, tmp, ctx->f32, "");
1280 result = LLVMBuildInsertElement(ctx->builder, result, tmp, LLVMConstInt(ctx->i32, c, false), "");
1281 }
1282 }
1283 return result;
1284 }
1285
1286 static nir_deref_instr *get_tex_texture_deref(const nir_tex_instr *instr)
1287 {
1288 nir_deref_instr *texture_deref_instr = NULL;
1289
1290 for (unsigned i = 0; i < instr->num_srcs; i++) {
1291 switch (instr->src[i].src_type) {
1292 case nir_tex_src_texture_deref:
1293 texture_deref_instr = nir_src_as_deref(instr->src[i].src);
1294 break;
1295 default:
1296 break;
1297 }
1298 }
1299 return texture_deref_instr;
1300 }
1301
1302 static LLVMValueRef build_tex_intrinsic(struct ac_nir_context *ctx,
1303 const nir_tex_instr *instr,
1304 struct ac_image_args *args)
1305 {
1306 if (instr->sampler_dim == GLSL_SAMPLER_DIM_BUF) {
1307 unsigned mask = nir_ssa_def_components_read(&instr->dest.ssa);
1308
1309 if (ctx->abi->gfx9_stride_size_workaround) {
1310 return ac_build_buffer_load_format_gfx9_safe(&ctx->ac,
1311 args->resource,
1312 args->coords[0],
1313 ctx->ac.i32_0,
1314 util_last_bit(mask),
1315 0, true);
1316 } else {
1317 return ac_build_buffer_load_format(&ctx->ac,
1318 args->resource,
1319 args->coords[0],
1320 ctx->ac.i32_0,
1321 util_last_bit(mask),
1322 0, true);
1323 }
1324 }
1325
1326 args->opcode = ac_image_sample;
1327
1328 switch (instr->op) {
1329 case nir_texop_txf:
1330 case nir_texop_txf_ms:
1331 case nir_texop_samples_identical:
1332 args->opcode = args->level_zero ||
1333 instr->sampler_dim == GLSL_SAMPLER_DIM_MS ?
1334 ac_image_load : ac_image_load_mip;
1335 args->level_zero = false;
1336 break;
1337 case nir_texop_txs:
1338 case nir_texop_query_levels:
1339 args->opcode = ac_image_get_resinfo;
1340 if (!args->lod)
1341 args->lod = ctx->ac.i32_0;
1342 args->level_zero = false;
1343 break;
1344 case nir_texop_tex:
1345 if (ctx->stage != MESA_SHADER_FRAGMENT) {
1346 assert(!args->lod);
1347 args->level_zero = true;
1348 }
1349 break;
1350 case nir_texop_tg4:
1351 args->opcode = ac_image_gather4;
1352 args->level_zero = true;
1353 break;
1354 case nir_texop_lod:
1355 args->opcode = ac_image_get_lod;
1356 break;
1357 default:
1358 break;
1359 }
1360
1361 if (instr->op == nir_texop_tg4 && ctx->ac.chip_class <= GFX8) {
1362 nir_deref_instr *texture_deref_instr = get_tex_texture_deref(instr);
1363 nir_variable *var = nir_deref_instr_get_variable(texture_deref_instr);
1364 const struct glsl_type *type = glsl_without_array(var->type);
1365 enum glsl_base_type stype = glsl_get_sampler_result_type(type);
1366 if (stype == GLSL_TYPE_UINT || stype == GLSL_TYPE_INT) {
1367 return lower_gather4_integer(&ctx->ac, var, args, instr);
1368 }
1369 }
1370
1371 /* Fixup for GFX9 which allocates 1D textures as 2D. */
1372 if (instr->op == nir_texop_lod && ctx->ac.chip_class == GFX9) {
1373 if ((args->dim == ac_image_2darray ||
1374 args->dim == ac_image_2d) && !args->coords[1]) {
1375 args->coords[1] = ctx->ac.i32_0;
1376 }
1377 }
1378
1379 args->attributes = AC_FUNC_ATTR_READNONE;
1380 bool cs_derivs = ctx->stage == MESA_SHADER_COMPUTE &&
1381 ctx->info->cs.derivative_group != DERIVATIVE_GROUP_NONE;
1382 if (ctx->stage == MESA_SHADER_FRAGMENT || cs_derivs) {
1383 /* Prevent texture instructions with implicit derivatives from being
1384 * sinked into branches. */
1385 switch (instr->op) {
1386 case nir_texop_tex:
1387 case nir_texop_txb:
1388 case nir_texop_lod:
1389 args->attributes |= AC_FUNC_ATTR_CONVERGENT;
1390 break;
1391 default:
1392 break;
1393 }
1394 }
1395
1396 return ac_build_image_opcode(&ctx->ac, args);
1397 }
1398
1399 static LLVMValueRef visit_vulkan_resource_reindex(struct ac_nir_context *ctx,
1400 nir_intrinsic_instr *instr)
1401 {
1402 LLVMValueRef ptr = get_src(ctx, instr->src[0]);
1403 LLVMValueRef index = get_src(ctx, instr->src[1]);
1404
1405 LLVMValueRef result = LLVMBuildGEP(ctx->ac.builder, ptr, &index, 1, "");
1406 LLVMSetMetadata(result, ctx->ac.uniform_md_kind, ctx->ac.empty_md);
1407 return result;
1408 }
1409
1410 static LLVMValueRef visit_load_push_constant(struct ac_nir_context *ctx,
1411 nir_intrinsic_instr *instr)
1412 {
1413 LLVMValueRef ptr, addr;
1414 LLVMValueRef src0 = get_src(ctx, instr->src[0]);
1415 unsigned index = nir_intrinsic_base(instr);
1416
1417 addr = LLVMConstInt(ctx->ac.i32, index, 0);
1418 addr = LLVMBuildAdd(ctx->ac.builder, addr, src0, "");
1419
1420 /* Load constant values from user SGPRS when possible, otherwise
1421 * fallback to the default path that loads directly from memory.
1422 */
1423 if (LLVMIsConstant(src0) &&
1424 instr->dest.ssa.bit_size == 32) {
1425 unsigned count = instr->dest.ssa.num_components;
1426 unsigned offset = index;
1427
1428 offset += LLVMConstIntGetZExtValue(src0);
1429 offset /= 4;
1430
1431 offset -= ctx->abi->base_inline_push_consts;
1432
1433 if (offset + count <= ctx->abi->num_inline_push_consts) {
1434 return ac_build_gather_values(&ctx->ac,
1435 ctx->abi->inline_push_consts + offset,
1436 count);
1437 }
1438 }
1439
1440 ptr = LLVMBuildGEP(ctx->ac.builder, ctx->abi->push_constants, &addr, 1, "");
1441
1442 if (instr->dest.ssa.bit_size == 8) {
1443 unsigned load_dwords = instr->dest.ssa.num_components > 1 ? 2 : 1;
1444 LLVMTypeRef vec_type = LLVMVectorType(LLVMInt8TypeInContext(ctx->ac.context), 4 * load_dwords);
1445 ptr = ac_cast_ptr(&ctx->ac, ptr, vec_type);
1446 LLVMValueRef res = LLVMBuildLoad(ctx->ac.builder, ptr, "");
1447
1448 LLVMValueRef params[3];
1449 if (load_dwords > 1) {
1450 LLVMValueRef res_vec = LLVMBuildBitCast(ctx->ac.builder, res, LLVMVectorType(ctx->ac.i32, 2), "");
1451 params[0] = LLVMBuildExtractElement(ctx->ac.builder, res_vec, LLVMConstInt(ctx->ac.i32, 1, false), "");
1452 params[1] = LLVMBuildExtractElement(ctx->ac.builder, res_vec, LLVMConstInt(ctx->ac.i32, 0, false), "");
1453 } else {
1454 res = LLVMBuildBitCast(ctx->ac.builder, res, ctx->ac.i32, "");
1455 params[0] = ctx->ac.i32_0;
1456 params[1] = res;
1457 }
1458 params[2] = addr;
1459 res = ac_build_intrinsic(&ctx->ac, "llvm.amdgcn.alignbyte", ctx->ac.i32, params, 3, 0);
1460
1461 res = LLVMBuildTrunc(ctx->ac.builder, res, LLVMIntTypeInContext(ctx->ac.context, instr->dest.ssa.num_components * 8), "");
1462 if (instr->dest.ssa.num_components > 1)
1463 res = LLVMBuildBitCast(ctx->ac.builder, res, LLVMVectorType(LLVMInt8TypeInContext(ctx->ac.context), instr->dest.ssa.num_components), "");
1464 return res;
1465 } else if (instr->dest.ssa.bit_size == 16) {
1466 unsigned load_dwords = instr->dest.ssa.num_components / 2 + 1;
1467 LLVMTypeRef vec_type = LLVMVectorType(LLVMInt16TypeInContext(ctx->ac.context), 2 * load_dwords);
1468 ptr = ac_cast_ptr(&ctx->ac, ptr, vec_type);
1469 LLVMValueRef res = LLVMBuildLoad(ctx->ac.builder, ptr, "");
1470 res = LLVMBuildBitCast(ctx->ac.builder, res, vec_type, "");
1471 LLVMValueRef cond = LLVMBuildLShr(ctx->ac.builder, addr, ctx->ac.i32_1, "");
1472 cond = LLVMBuildTrunc(ctx->ac.builder, cond, ctx->ac.i1, "");
1473 LLVMValueRef mask[] = { LLVMConstInt(ctx->ac.i32, 0, false), LLVMConstInt(ctx->ac.i32, 1, false),
1474 LLVMConstInt(ctx->ac.i32, 2, false), LLVMConstInt(ctx->ac.i32, 3, false),
1475 LLVMConstInt(ctx->ac.i32, 4, false)};
1476 LLVMValueRef swizzle_aligned = LLVMConstVector(&mask[0], instr->dest.ssa.num_components);
1477 LLVMValueRef swizzle_unaligned = LLVMConstVector(&mask[1], instr->dest.ssa.num_components);
1478 LLVMValueRef shuffle_aligned = LLVMBuildShuffleVector(ctx->ac.builder, res, res, swizzle_aligned, "");
1479 LLVMValueRef shuffle_unaligned = LLVMBuildShuffleVector(ctx->ac.builder, res, res, swizzle_unaligned, "");
1480 res = LLVMBuildSelect(ctx->ac.builder, cond, shuffle_unaligned, shuffle_aligned, "");
1481 return LLVMBuildBitCast(ctx->ac.builder, res, get_def_type(ctx, &instr->dest.ssa), "");
1482 }
1483
1484 ptr = ac_cast_ptr(&ctx->ac, ptr, get_def_type(ctx, &instr->dest.ssa));
1485
1486 return LLVMBuildLoad(ctx->ac.builder, ptr, "");
1487 }
1488
1489 static LLVMValueRef visit_get_buffer_size(struct ac_nir_context *ctx,
1490 const nir_intrinsic_instr *instr)
1491 {
1492 LLVMValueRef index = get_src(ctx, instr->src[0]);
1493
1494 return get_buffer_size(ctx, ctx->abi->load_ssbo(ctx->abi, index, false), false);
1495 }
1496
1497 static uint32_t widen_mask(uint32_t mask, unsigned multiplier)
1498 {
1499 uint32_t new_mask = 0;
1500 for(unsigned i = 0; i < 32 && (1u << i) <= mask; ++i)
1501 if (mask & (1u << i))
1502 new_mask |= ((1u << multiplier) - 1u) << (i * multiplier);
1503 return new_mask;
1504 }
1505
1506 static LLVMValueRef extract_vector_range(struct ac_llvm_context *ctx, LLVMValueRef src,
1507 unsigned start, unsigned count)
1508 {
1509 LLVMValueRef mask[] = {
1510 ctx->i32_0, ctx->i32_1,
1511 LLVMConstInt(ctx->i32, 2, false), LLVMConstInt(ctx->i32, 3, false) };
1512
1513 unsigned src_elements = ac_get_llvm_num_components(src);
1514
1515 if (count == src_elements) {
1516 assert(start == 0);
1517 return src;
1518 } else if (count == 1) {
1519 assert(start < src_elements);
1520 return LLVMBuildExtractElement(ctx->builder, src, mask[start], "");
1521 } else {
1522 assert(start + count <= src_elements);
1523 assert(count <= 4);
1524 LLVMValueRef swizzle = LLVMConstVector(&mask[start], count);
1525 return LLVMBuildShuffleVector(ctx->builder, src, src, swizzle, "");
1526 }
1527 }
1528
1529 static unsigned get_cache_policy(struct ac_nir_context *ctx,
1530 enum gl_access_qualifier access,
1531 bool may_store_unaligned,
1532 bool writeonly_memory)
1533 {
1534 unsigned cache_policy = 0;
1535
1536 /* GFX6 has a TC L1 bug causing corruption of 8bit/16bit stores. All
1537 * store opcodes not aligned to a dword are affected. The only way to
1538 * get unaligned stores is through shader images.
1539 */
1540 if (((may_store_unaligned && ctx->ac.chip_class == GFX6) ||
1541 /* If this is write-only, don't keep data in L1 to prevent
1542 * evicting L1 cache lines that may be needed by other
1543 * instructions.
1544 */
1545 writeonly_memory ||
1546 access & (ACCESS_COHERENT | ACCESS_VOLATILE))) {
1547 cache_policy |= ac_glc;
1548 }
1549
1550 return cache_policy;
1551 }
1552
1553 static void visit_store_ssbo(struct ac_nir_context *ctx,
1554 nir_intrinsic_instr *instr)
1555 {
1556 LLVMValueRef src_data = get_src(ctx, instr->src[0]);
1557 int elem_size_bytes = ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src_data)) / 8;
1558 unsigned writemask = nir_intrinsic_write_mask(instr);
1559 enum gl_access_qualifier access = nir_intrinsic_access(instr);
1560 bool writeonly_memory = access & ACCESS_NON_READABLE;
1561 unsigned cache_policy = get_cache_policy(ctx, access, false, writeonly_memory);
1562
1563 LLVMValueRef rsrc = ctx->abi->load_ssbo(ctx->abi,
1564 get_src(ctx, instr->src[1]), true);
1565 LLVMValueRef base_data = src_data;
1566 base_data = ac_trim_vector(&ctx->ac, base_data, instr->num_components);
1567 LLVMValueRef base_offset = get_src(ctx, instr->src[2]);
1568
1569 while (writemask) {
1570 int start, count;
1571 LLVMValueRef data, offset;
1572 LLVMTypeRef data_type;
1573
1574 u_bit_scan_consecutive_range(&writemask, &start, &count);
1575
1576 /* Due to an LLVM limitation with LLVM < 9, split 3-element
1577 * writes into a 2-element and a 1-element write. */
1578 if (count == 3 &&
1579 (elem_size_bytes != 4 || !ac_has_vec3_support(ctx->ac.chip_class, false))) {
1580 writemask |= 1 << (start + 2);
1581 count = 2;
1582 }
1583 int num_bytes = count * elem_size_bytes; /* count in bytes */
1584
1585 /* we can only store 4 DWords at the same time.
1586 * can only happen for 64 Bit vectors. */
1587 if (num_bytes > 16) {
1588 writemask |= ((1u << (count - 2)) - 1u) << (start + 2);
1589 count = 2;
1590 num_bytes = 16;
1591 }
1592
1593 /* check alignment of 16 Bit stores */
1594 if (elem_size_bytes == 2 && num_bytes > 2 && (start % 2) == 1) {
1595 writemask |= ((1u << (count - 1)) - 1u) << (start + 1);
1596 count = 1;
1597 num_bytes = 2;
1598 }
1599 data = extract_vector_range(&ctx->ac, base_data, start, count);
1600
1601 offset = LLVMBuildAdd(ctx->ac.builder, base_offset,
1602 LLVMConstInt(ctx->ac.i32, start * elem_size_bytes, false), "");
1603
1604 if (num_bytes == 1) {
1605 ac_build_tbuffer_store_byte(&ctx->ac, rsrc, data,
1606 offset, ctx->ac.i32_0,
1607 cache_policy);
1608 } else if (num_bytes == 2) {
1609 ac_build_tbuffer_store_short(&ctx->ac, rsrc, data,
1610 offset, ctx->ac.i32_0,
1611 cache_policy);
1612 } else {
1613 int num_channels = num_bytes / 4;
1614
1615 switch (num_bytes) {
1616 case 16: /* v4f32 */
1617 data_type = ctx->ac.v4f32;
1618 break;
1619 case 12: /* v3f32 */
1620 data_type = ctx->ac.v3f32;
1621 break;
1622 case 8: /* v2f32 */
1623 data_type = ctx->ac.v2f32;
1624 break;
1625 case 4: /* f32 */
1626 data_type = ctx->ac.f32;
1627 break;
1628 default:
1629 unreachable("Malformed vector store.");
1630 }
1631 data = LLVMBuildBitCast(ctx->ac.builder, data, data_type, "");
1632
1633 ac_build_buffer_store_dword(&ctx->ac, rsrc, data,
1634 num_channels, offset,
1635 ctx->ac.i32_0, 0,
1636 cache_policy, false);
1637 }
1638 }
1639 }
1640
1641 static LLVMValueRef visit_atomic_ssbo(struct ac_nir_context *ctx,
1642 const nir_intrinsic_instr *instr)
1643 {
1644 LLVMTypeRef return_type = LLVMTypeOf(get_src(ctx, instr->src[2]));
1645 const char *op;
1646 char name[64], type[8];
1647 LLVMValueRef params[6];
1648 int arg_count = 0;
1649
1650 switch (instr->intrinsic) {
1651 case nir_intrinsic_ssbo_atomic_add:
1652 op = "add";
1653 break;
1654 case nir_intrinsic_ssbo_atomic_imin:
1655 op = "smin";
1656 break;
1657 case nir_intrinsic_ssbo_atomic_umin:
1658 op = "umin";
1659 break;
1660 case nir_intrinsic_ssbo_atomic_imax:
1661 op = "smax";
1662 break;
1663 case nir_intrinsic_ssbo_atomic_umax:
1664 op = "umax";
1665 break;
1666 case nir_intrinsic_ssbo_atomic_and:
1667 op = "and";
1668 break;
1669 case nir_intrinsic_ssbo_atomic_or:
1670 op = "or";
1671 break;
1672 case nir_intrinsic_ssbo_atomic_xor:
1673 op = "xor";
1674 break;
1675 case nir_intrinsic_ssbo_atomic_exchange:
1676 op = "swap";
1677 break;
1678 case nir_intrinsic_ssbo_atomic_comp_swap:
1679 op = "cmpswap";
1680 break;
1681 default:
1682 abort();
1683 }
1684
1685 if (instr->intrinsic == nir_intrinsic_ssbo_atomic_comp_swap) {
1686 params[arg_count++] = ac_llvm_extract_elem(&ctx->ac, get_src(ctx, instr->src[3]), 0);
1687 }
1688 params[arg_count++] = ac_llvm_extract_elem(&ctx->ac, get_src(ctx, instr->src[2]), 0);
1689 params[arg_count++] = ctx->abi->load_ssbo(ctx->abi,
1690 get_src(ctx, instr->src[0]),
1691 true);
1692
1693 if (HAVE_LLVM >= 0x900) {
1694 /* XXX: The new raw/struct atomic intrinsics are buggy with
1695 * LLVM 8, see r358579.
1696 */
1697 params[arg_count++] = get_src(ctx, instr->src[1]); /* voffset */
1698 params[arg_count++] = ctx->ac.i32_0; /* soffset */
1699 params[arg_count++] = ctx->ac.i32_0; /* slc */
1700
1701 ac_build_type_name_for_intr(return_type, type, sizeof(type));
1702 snprintf(name, sizeof(name),
1703 "llvm.amdgcn.raw.buffer.atomic.%s.%s", op, type);
1704 } else {
1705 params[arg_count++] = ctx->ac.i32_0; /* vindex */
1706 params[arg_count++] = get_src(ctx, instr->src[1]); /* voffset */
1707 params[arg_count++] = ctx->ac.i1false; /* slc */
1708
1709 assert(return_type == ctx->ac.i32);
1710 snprintf(name, sizeof(name),
1711 "llvm.amdgcn.buffer.atomic.%s", op);
1712 }
1713
1714 return ac_build_intrinsic(&ctx->ac, name, return_type, params,
1715 arg_count, 0);
1716 }
1717
1718 static LLVMValueRef visit_load_buffer(struct ac_nir_context *ctx,
1719 const nir_intrinsic_instr *instr)
1720 {
1721 int elem_size_bytes = instr->dest.ssa.bit_size / 8;
1722 int num_components = instr->num_components;
1723 enum gl_access_qualifier access = nir_intrinsic_access(instr);
1724 unsigned cache_policy = get_cache_policy(ctx, access, false, false);
1725
1726 LLVMValueRef offset = get_src(ctx, instr->src[1]);
1727 LLVMValueRef rsrc = ctx->abi->load_ssbo(ctx->abi,
1728 get_src(ctx, instr->src[0]), false);
1729 LLVMValueRef vindex = ctx->ac.i32_0;
1730
1731 LLVMTypeRef def_type = get_def_type(ctx, &instr->dest.ssa);
1732 LLVMTypeRef def_elem_type = num_components > 1 ? LLVMGetElementType(def_type) : def_type;
1733
1734 LLVMValueRef results[4];
1735 for (int i = 0; i < num_components;) {
1736 int num_elems = num_components - i;
1737 if (elem_size_bytes < 4 && nir_intrinsic_align(instr) % 4 != 0)
1738 num_elems = 1;
1739 if (num_elems * elem_size_bytes > 16)
1740 num_elems = 16 / elem_size_bytes;
1741 int load_bytes = num_elems * elem_size_bytes;
1742
1743 LLVMValueRef immoffset = LLVMConstInt(ctx->ac.i32, i * elem_size_bytes, false);
1744
1745 LLVMValueRef ret;
1746
1747 if (load_bytes == 1) {
1748 ret = ac_build_tbuffer_load_byte(&ctx->ac,
1749 rsrc,
1750 offset,
1751 ctx->ac.i32_0,
1752 immoffset,
1753 cache_policy);
1754 } else if (load_bytes == 2) {
1755 ret = ac_build_tbuffer_load_short(&ctx->ac,
1756 rsrc,
1757 offset,
1758 ctx->ac.i32_0,
1759 immoffset,
1760 cache_policy);
1761 } else {
1762 int num_channels = util_next_power_of_two(load_bytes) / 4;
1763 bool can_speculate = access & ACCESS_CAN_REORDER;
1764
1765 ret = ac_build_buffer_load(&ctx->ac, rsrc, num_channels,
1766 vindex, offset, immoffset, 0,
1767 cache_policy, can_speculate, false);
1768 }
1769
1770 LLVMTypeRef byte_vec = LLVMVectorType(ctx->ac.i8, ac_get_type_size(LLVMTypeOf(ret)));
1771 ret = LLVMBuildBitCast(ctx->ac.builder, ret, byte_vec, "");
1772 ret = ac_trim_vector(&ctx->ac, ret, load_bytes);
1773
1774 LLVMTypeRef ret_type = LLVMVectorType(def_elem_type, num_elems);
1775 ret = LLVMBuildBitCast(ctx->ac.builder, ret, ret_type, "");
1776
1777 for (unsigned j = 0; j < num_elems; j++) {
1778 results[i + j] = LLVMBuildExtractElement(ctx->ac.builder, ret, LLVMConstInt(ctx->ac.i32, j, false), "");
1779 }
1780 i += num_elems;
1781 }
1782
1783 return ac_build_gather_values(&ctx->ac, results, num_components);
1784 }
1785
1786 static LLVMValueRef visit_load_ubo_buffer(struct ac_nir_context *ctx,
1787 const nir_intrinsic_instr *instr)
1788 {
1789 LLVMValueRef ret;
1790 LLVMValueRef rsrc = get_src(ctx, instr->src[0]);
1791 LLVMValueRef offset = get_src(ctx, instr->src[1]);
1792 int num_components = instr->num_components;
1793
1794 if (ctx->abi->load_ubo)
1795 rsrc = ctx->abi->load_ubo(ctx->abi, rsrc);
1796
1797 if (instr->dest.ssa.bit_size == 64)
1798 num_components *= 2;
1799
1800 if (instr->dest.ssa.bit_size == 16 || instr->dest.ssa.bit_size == 8) {
1801 unsigned load_bytes = instr->dest.ssa.bit_size / 8;
1802 LLVMValueRef results[num_components];
1803 for (unsigned i = 0; i < num_components; ++i) {
1804 LLVMValueRef immoffset = LLVMConstInt(ctx->ac.i32,
1805 load_bytes * i, 0);
1806
1807 if (load_bytes == 1) {
1808 results[i] = ac_build_tbuffer_load_byte(&ctx->ac,
1809 rsrc,
1810 offset,
1811 ctx->ac.i32_0,
1812 immoffset,
1813 0);
1814 } else {
1815 assert(load_bytes == 2);
1816 results[i] = ac_build_tbuffer_load_short(&ctx->ac,
1817 rsrc,
1818 offset,
1819 ctx->ac.i32_0,
1820 immoffset,
1821 0);
1822 }
1823 }
1824 ret = ac_build_gather_values(&ctx->ac, results, num_components);
1825 } else {
1826 ret = ac_build_buffer_load(&ctx->ac, rsrc, num_components, NULL, offset,
1827 NULL, 0, 0, true, true);
1828
1829 ret = ac_trim_vector(&ctx->ac, ret, num_components);
1830 }
1831
1832 return LLVMBuildBitCast(ctx->ac.builder, ret,
1833 get_def_type(ctx, &instr->dest.ssa), "");
1834 }
1835
1836 static void
1837 get_deref_offset(struct ac_nir_context *ctx, nir_deref_instr *instr,
1838 bool vs_in, unsigned *vertex_index_out,
1839 LLVMValueRef *vertex_index_ref,
1840 unsigned *const_out, LLVMValueRef *indir_out)
1841 {
1842 nir_variable *var = nir_deref_instr_get_variable(instr);
1843 nir_deref_path path;
1844 unsigned idx_lvl = 1;
1845
1846 nir_deref_path_init(&path, instr, NULL);
1847
1848 if (vertex_index_out != NULL || vertex_index_ref != NULL) {
1849 if (vertex_index_ref) {
1850 *vertex_index_ref = get_src(ctx, path.path[idx_lvl]->arr.index);
1851 if (vertex_index_out)
1852 *vertex_index_out = 0;
1853 } else {
1854 *vertex_index_out = nir_src_as_uint(path.path[idx_lvl]->arr.index);
1855 }
1856 ++idx_lvl;
1857 }
1858
1859 uint32_t const_offset = 0;
1860 LLVMValueRef offset = NULL;
1861
1862 if (var->data.compact) {
1863 assert(instr->deref_type == nir_deref_type_array);
1864 const_offset = nir_src_as_uint(instr->arr.index);
1865 goto out;
1866 }
1867
1868 for (; path.path[idx_lvl]; ++idx_lvl) {
1869 const struct glsl_type *parent_type = path.path[idx_lvl - 1]->type;
1870 if (path.path[idx_lvl]->deref_type == nir_deref_type_struct) {
1871 unsigned index = path.path[idx_lvl]->strct.index;
1872
1873 for (unsigned i = 0; i < index; i++) {
1874 const struct glsl_type *ft = glsl_get_struct_field(parent_type, i);
1875 const_offset += glsl_count_attribute_slots(ft, vs_in);
1876 }
1877 } else if(path.path[idx_lvl]->deref_type == nir_deref_type_array) {
1878 unsigned size = glsl_count_attribute_slots(path.path[idx_lvl]->type, vs_in);
1879 LLVMValueRef array_off = LLVMBuildMul(ctx->ac.builder, LLVMConstInt(ctx->ac.i32, size, 0),
1880 get_src(ctx, path.path[idx_lvl]->arr.index), "");
1881 if (offset)
1882 offset = LLVMBuildAdd(ctx->ac.builder, offset, array_off, "");
1883 else
1884 offset = array_off;
1885 } else
1886 unreachable("Uhandled deref type in get_deref_instr_offset");
1887 }
1888
1889 out:
1890 nir_deref_path_finish(&path);
1891
1892 if (const_offset && offset)
1893 offset = LLVMBuildAdd(ctx->ac.builder, offset,
1894 LLVMConstInt(ctx->ac.i32, const_offset, 0),
1895 "");
1896
1897 *const_out = const_offset;
1898 *indir_out = offset;
1899 }
1900
1901 static LLVMValueRef load_tess_varyings(struct ac_nir_context *ctx,
1902 nir_intrinsic_instr *instr,
1903 bool load_inputs)
1904 {
1905 LLVMValueRef result;
1906 LLVMValueRef vertex_index = NULL;
1907 LLVMValueRef indir_index = NULL;
1908 unsigned const_index = 0;
1909
1910 nir_variable *var = nir_deref_instr_get_variable(nir_instr_as_deref(instr->src[0].ssa->parent_instr));
1911
1912 unsigned location = var->data.location;
1913 unsigned driver_location = var->data.driver_location;
1914 const bool is_patch = var->data.patch;
1915 const bool is_compact = var->data.compact;
1916
1917 get_deref_offset(ctx, nir_instr_as_deref(instr->src[0].ssa->parent_instr),
1918 false, NULL, is_patch ? NULL : &vertex_index,
1919 &const_index, &indir_index);
1920
1921 LLVMTypeRef dest_type = get_def_type(ctx, &instr->dest.ssa);
1922
1923 LLVMTypeRef src_component_type;
1924 if (LLVMGetTypeKind(dest_type) == LLVMVectorTypeKind)
1925 src_component_type = LLVMGetElementType(dest_type);
1926 else
1927 src_component_type = dest_type;
1928
1929 result = ctx->abi->load_tess_varyings(ctx->abi, src_component_type,
1930 vertex_index, indir_index,
1931 const_index, location, driver_location,
1932 var->data.location_frac,
1933 instr->num_components,
1934 is_patch, is_compact, load_inputs);
1935 if (instr->dest.ssa.bit_size == 16) {
1936 result = ac_to_integer(&ctx->ac, result);
1937 result = LLVMBuildTrunc(ctx->ac.builder, result, dest_type, "");
1938 }
1939 return LLVMBuildBitCast(ctx->ac.builder, result, dest_type, "");
1940 }
1941
1942 static unsigned
1943 type_scalar_size_bytes(const struct glsl_type *type)
1944 {
1945 assert(glsl_type_is_vector_or_scalar(type) ||
1946 glsl_type_is_matrix(type));
1947 return glsl_type_is_boolean(type) ? 4 : glsl_get_bit_size(type) / 8;
1948 }
1949
1950 static LLVMValueRef visit_load_var(struct ac_nir_context *ctx,
1951 nir_intrinsic_instr *instr)
1952 {
1953 nir_deref_instr *deref = nir_instr_as_deref(instr->src[0].ssa->parent_instr);
1954 nir_variable *var = nir_deref_instr_get_variable(deref);
1955
1956 LLVMValueRef values[8];
1957 int idx = 0;
1958 int ve = instr->dest.ssa.num_components;
1959 unsigned comp = 0;
1960 LLVMValueRef indir_index;
1961 LLVMValueRef ret;
1962 unsigned const_index;
1963 unsigned stride = 4;
1964 int mode = deref->mode;
1965
1966 if (var) {
1967 bool vs_in = ctx->stage == MESA_SHADER_VERTEX &&
1968 var->data.mode == nir_var_shader_in;
1969 idx = var->data.driver_location;
1970 comp = var->data.location_frac;
1971 mode = var->data.mode;
1972
1973 get_deref_offset(ctx, deref, vs_in, NULL, NULL,
1974 &const_index, &indir_index);
1975
1976 if (var->data.compact) {
1977 stride = 1;
1978 const_index += comp;
1979 comp = 0;
1980 }
1981 }
1982
1983 if (instr->dest.ssa.bit_size == 64 &&
1984 (deref->mode == nir_var_shader_in ||
1985 deref->mode == nir_var_shader_out ||
1986 deref->mode == nir_var_function_temp))
1987 ve *= 2;
1988
1989 switch (mode) {
1990 case nir_var_shader_in:
1991 if (ctx->stage == MESA_SHADER_TESS_CTRL ||
1992 ctx->stage == MESA_SHADER_TESS_EVAL) {
1993 return load_tess_varyings(ctx, instr, true);
1994 }
1995
1996 if (ctx->stage == MESA_SHADER_GEOMETRY) {
1997 LLVMTypeRef type = LLVMIntTypeInContext(ctx->ac.context, instr->dest.ssa.bit_size);
1998 LLVMValueRef indir_index;
1999 unsigned const_index, vertex_index;
2000 get_deref_offset(ctx, deref, false, &vertex_index, NULL,
2001 &const_index, &indir_index);
2002
2003 return ctx->abi->load_inputs(ctx->abi, var->data.location,
2004 var->data.driver_location,
2005 var->data.location_frac,
2006 instr->num_components, vertex_index, const_index, type);
2007 }
2008
2009 for (unsigned chan = comp; chan < ve + comp; chan++) {
2010 if (indir_index) {
2011 unsigned count = glsl_count_attribute_slots(
2012 var->type,
2013 ctx->stage == MESA_SHADER_VERTEX);
2014 count -= chan / 4;
2015 LLVMValueRef tmp_vec = ac_build_gather_values_extended(
2016 &ctx->ac, ctx->abi->inputs + idx + chan, count,
2017 stride, false, true);
2018
2019 values[chan] = LLVMBuildExtractElement(ctx->ac.builder,
2020 tmp_vec,
2021 indir_index, "");
2022 } else
2023 values[chan] = ctx->abi->inputs[idx + chan + const_index * stride];
2024 }
2025 break;
2026 case nir_var_function_temp:
2027 for (unsigned chan = 0; chan < ve; chan++) {
2028 if (indir_index) {
2029 unsigned count = glsl_count_attribute_slots(
2030 var->type, false);
2031 count -= chan / 4;
2032 LLVMValueRef tmp_vec = ac_build_gather_values_extended(
2033 &ctx->ac, ctx->locals + idx + chan, count,
2034 stride, true, true);
2035
2036 values[chan] = LLVMBuildExtractElement(ctx->ac.builder,
2037 tmp_vec,
2038 indir_index, "");
2039 } else {
2040 values[chan] = LLVMBuildLoad(ctx->ac.builder, ctx->locals[idx + chan + const_index * stride], "");
2041 }
2042 }
2043 break;
2044 case nir_var_mem_shared: {
2045 LLVMValueRef address = get_src(ctx, instr->src[0]);
2046 LLVMValueRef val = LLVMBuildLoad(ctx->ac.builder, address, "");
2047 return LLVMBuildBitCast(ctx->ac.builder, val,
2048 get_def_type(ctx, &instr->dest.ssa),
2049 "");
2050 }
2051 case nir_var_shader_out:
2052 if (ctx->stage == MESA_SHADER_TESS_CTRL) {
2053 return load_tess_varyings(ctx, instr, false);
2054 }
2055
2056 if (ctx->stage == MESA_SHADER_FRAGMENT &&
2057 var->data.fb_fetch_output &&
2058 ctx->abi->emit_fbfetch)
2059 return ctx->abi->emit_fbfetch(ctx->abi);
2060
2061 for (unsigned chan = comp; chan < ve + comp; chan++) {
2062 if (indir_index) {
2063 unsigned count = glsl_count_attribute_slots(
2064 var->type, false);
2065 count -= chan / 4;
2066 LLVMValueRef tmp_vec = ac_build_gather_values_extended(
2067 &ctx->ac, ctx->abi->outputs + idx + chan, count,
2068 stride, true, true);
2069
2070 values[chan] = LLVMBuildExtractElement(ctx->ac.builder,
2071 tmp_vec,
2072 indir_index, "");
2073 } else {
2074 values[chan] = LLVMBuildLoad(ctx->ac.builder,
2075 ctx->abi->outputs[idx + chan + const_index * stride],
2076 "");
2077 }
2078 }
2079 break;
2080 case nir_var_mem_global: {
2081 LLVMValueRef address = get_src(ctx, instr->src[0]);
2082 unsigned explicit_stride = glsl_get_explicit_stride(deref->type);
2083 unsigned natural_stride = type_scalar_size_bytes(deref->type);
2084 unsigned stride = explicit_stride ? explicit_stride : natural_stride;
2085
2086 LLVMTypeRef result_type = get_def_type(ctx, &instr->dest.ssa);
2087 if (stride != natural_stride) {
2088 LLVMTypeRef ptr_type = LLVMPointerType(LLVMGetElementType(result_type),
2089 LLVMGetPointerAddressSpace(LLVMTypeOf(address)));
2090 address = LLVMBuildBitCast(ctx->ac.builder, address, ptr_type , "");
2091
2092 for (unsigned i = 0; i < instr->dest.ssa.num_components; ++i) {
2093 LLVMValueRef offset = LLVMConstInt(ctx->ac.i32, i * stride / natural_stride, 0);
2094 values[i] = LLVMBuildLoad(ctx->ac.builder,
2095 ac_build_gep_ptr(&ctx->ac, address, offset), "");
2096 }
2097 return ac_build_gather_values(&ctx->ac, values, instr->dest.ssa.num_components);
2098 } else {
2099 LLVMTypeRef ptr_type = LLVMPointerType(result_type,
2100 LLVMGetPointerAddressSpace(LLVMTypeOf(address)));
2101 address = LLVMBuildBitCast(ctx->ac.builder, address, ptr_type , "");
2102 LLVMValueRef val = LLVMBuildLoad(ctx->ac.builder, address, "");
2103 return val;
2104 }
2105 }
2106 default:
2107 unreachable("unhandle variable mode");
2108 }
2109 ret = ac_build_varying_gather_values(&ctx->ac, values, ve, comp);
2110 return LLVMBuildBitCast(ctx->ac.builder, ret, get_def_type(ctx, &instr->dest.ssa), "");
2111 }
2112
2113 static void
2114 visit_store_var(struct ac_nir_context *ctx,
2115 nir_intrinsic_instr *instr)
2116 {
2117 nir_deref_instr *deref = nir_instr_as_deref(instr->src[0].ssa->parent_instr);
2118 nir_variable *var = nir_deref_instr_get_variable(deref);
2119
2120 LLVMValueRef temp_ptr, value;
2121 int idx = 0;
2122 unsigned comp = 0;
2123 LLVMValueRef src = ac_to_float(&ctx->ac, get_src(ctx, instr->src[1]));
2124 int writemask = instr->const_index[0];
2125 LLVMValueRef indir_index;
2126 unsigned const_index;
2127
2128 if (var) {
2129 get_deref_offset(ctx, deref, false,
2130 NULL, NULL, &const_index, &indir_index);
2131 idx = var->data.driver_location;
2132 comp = var->data.location_frac;
2133
2134 if (var->data.compact) {
2135 const_index += comp;
2136 comp = 0;
2137 }
2138 }
2139
2140 if (ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src)) == 64 &&
2141 (deref->mode == nir_var_shader_out ||
2142 deref->mode == nir_var_function_temp)) {
2143
2144 src = LLVMBuildBitCast(ctx->ac.builder, src,
2145 LLVMVectorType(ctx->ac.f32, ac_get_llvm_num_components(src) * 2),
2146 "");
2147
2148 writemask = widen_mask(writemask, 2);
2149 }
2150
2151 writemask = writemask << comp;
2152
2153 switch (deref->mode) {
2154 case nir_var_shader_out:
2155
2156 if (ctx->stage == MESA_SHADER_TESS_CTRL) {
2157 LLVMValueRef vertex_index = NULL;
2158 LLVMValueRef indir_index = NULL;
2159 unsigned const_index = 0;
2160 const bool is_patch = var->data.patch;
2161
2162 get_deref_offset(ctx, deref, false, NULL,
2163 is_patch ? NULL : &vertex_index,
2164 &const_index, &indir_index);
2165
2166 ctx->abi->store_tcs_outputs(ctx->abi, var,
2167 vertex_index, indir_index,
2168 const_index, src, writemask);
2169 return;
2170 }
2171
2172 for (unsigned chan = 0; chan < 8; chan++) {
2173 int stride = 4;
2174 if (!(writemask & (1 << chan)))
2175 continue;
2176
2177 value = ac_llvm_extract_elem(&ctx->ac, src, chan - comp);
2178
2179 if (var->data.compact)
2180 stride = 1;
2181 if (indir_index) {
2182 unsigned count = glsl_count_attribute_slots(
2183 var->type, false);
2184 count -= chan / 4;
2185 LLVMValueRef tmp_vec = ac_build_gather_values_extended(
2186 &ctx->ac, ctx->abi->outputs + idx + chan, count,
2187 stride, true, true);
2188
2189 tmp_vec = LLVMBuildInsertElement(ctx->ac.builder, tmp_vec,
2190 value, indir_index, "");
2191 build_store_values_extended(&ctx->ac, ctx->abi->outputs + idx + chan,
2192 count, stride, tmp_vec);
2193
2194 } else {
2195 temp_ptr = ctx->abi->outputs[idx + chan + const_index * stride];
2196
2197 LLVMBuildStore(ctx->ac.builder, value, temp_ptr);
2198 }
2199 }
2200 break;
2201 case nir_var_function_temp:
2202 for (unsigned chan = 0; chan < 8; chan++) {
2203 if (!(writemask & (1 << chan)))
2204 continue;
2205
2206 value = ac_llvm_extract_elem(&ctx->ac, src, chan);
2207 if (indir_index) {
2208 unsigned count = glsl_count_attribute_slots(
2209 var->type, false);
2210 count -= chan / 4;
2211 LLVMValueRef tmp_vec = ac_build_gather_values_extended(
2212 &ctx->ac, ctx->locals + idx + chan, count,
2213 4, true, true);
2214
2215 tmp_vec = LLVMBuildInsertElement(ctx->ac.builder, tmp_vec,
2216 value, indir_index, "");
2217 build_store_values_extended(&ctx->ac, ctx->locals + idx + chan,
2218 count, 4, tmp_vec);
2219 } else {
2220 temp_ptr = ctx->locals[idx + chan + const_index * 4];
2221
2222 LLVMBuildStore(ctx->ac.builder, value, temp_ptr);
2223 }
2224 }
2225 break;
2226
2227 case nir_var_mem_global:
2228 case nir_var_mem_shared: {
2229 int writemask = instr->const_index[0];
2230 LLVMValueRef address = get_src(ctx, instr->src[0]);
2231 LLVMValueRef val = get_src(ctx, instr->src[1]);
2232
2233 unsigned explicit_stride = glsl_get_explicit_stride(deref->type);
2234 unsigned natural_stride = type_scalar_size_bytes(deref->type);
2235 unsigned stride = explicit_stride ? explicit_stride : natural_stride;
2236
2237 LLVMTypeRef ptr_type = LLVMPointerType(LLVMTypeOf(val),
2238 LLVMGetPointerAddressSpace(LLVMTypeOf(address)));
2239 address = LLVMBuildBitCast(ctx->ac.builder, address, ptr_type , "");
2240
2241 if (writemask == (1u << ac_get_llvm_num_components(val)) - 1 &&
2242 stride == natural_stride) {
2243 LLVMTypeRef ptr_type = LLVMPointerType(LLVMTypeOf(val),
2244 LLVMGetPointerAddressSpace(LLVMTypeOf(address)));
2245 address = LLVMBuildBitCast(ctx->ac.builder, address, ptr_type , "");
2246
2247 val = LLVMBuildBitCast(ctx->ac.builder, val,
2248 LLVMGetElementType(LLVMTypeOf(address)), "");
2249 LLVMBuildStore(ctx->ac.builder, val, address);
2250 } else {
2251 LLVMTypeRef ptr_type = LLVMPointerType(LLVMGetElementType(LLVMTypeOf(val)),
2252 LLVMGetPointerAddressSpace(LLVMTypeOf(address)));
2253 address = LLVMBuildBitCast(ctx->ac.builder, address, ptr_type , "");
2254 for (unsigned chan = 0; chan < 4; chan++) {
2255 if (!(writemask & (1 << chan)))
2256 continue;
2257
2258 LLVMValueRef offset = LLVMConstInt(ctx->ac.i32, chan * stride / natural_stride, 0);
2259
2260 LLVMValueRef ptr = ac_build_gep_ptr(&ctx->ac, address, offset);
2261 LLVMValueRef src = ac_llvm_extract_elem(&ctx->ac, val,
2262 chan);
2263 src = LLVMBuildBitCast(ctx->ac.builder, src,
2264 LLVMGetElementType(LLVMTypeOf(ptr)), "");
2265 LLVMBuildStore(ctx->ac.builder, src, ptr);
2266 }
2267 }
2268 break;
2269 }
2270 default:
2271 abort();
2272 break;
2273 }
2274 }
2275
2276 static int image_type_to_components_count(enum glsl_sampler_dim dim, bool array)
2277 {
2278 switch (dim) {
2279 case GLSL_SAMPLER_DIM_BUF:
2280 return 1;
2281 case GLSL_SAMPLER_DIM_1D:
2282 return array ? 2 : 1;
2283 case GLSL_SAMPLER_DIM_2D:
2284 return array ? 3 : 2;
2285 case GLSL_SAMPLER_DIM_MS:
2286 return array ? 4 : 3;
2287 case GLSL_SAMPLER_DIM_3D:
2288 case GLSL_SAMPLER_DIM_CUBE:
2289 return 3;
2290 case GLSL_SAMPLER_DIM_RECT:
2291 case GLSL_SAMPLER_DIM_SUBPASS:
2292 return 2;
2293 case GLSL_SAMPLER_DIM_SUBPASS_MS:
2294 return 3;
2295 default:
2296 break;
2297 }
2298 return 0;
2299 }
2300
2301 static LLVMValueRef adjust_sample_index_using_fmask(struct ac_llvm_context *ctx,
2302 LLVMValueRef coord_x, LLVMValueRef coord_y,
2303 LLVMValueRef coord_z,
2304 LLVMValueRef sample_index,
2305 LLVMValueRef fmask_desc_ptr)
2306 {
2307 unsigned sample_chan = coord_z ? 3 : 2;
2308 LLVMValueRef addr[4] = {coord_x, coord_y, coord_z};
2309 addr[sample_chan] = sample_index;
2310
2311 ac_apply_fmask_to_sample(ctx, fmask_desc_ptr, addr, coord_z != NULL);
2312 return addr[sample_chan];
2313 }
2314
2315 static nir_deref_instr *get_image_deref(const nir_intrinsic_instr *instr)
2316 {
2317 assert(instr->src[0].is_ssa);
2318 return nir_instr_as_deref(instr->src[0].ssa->parent_instr);
2319 }
2320
2321 static LLVMValueRef get_image_descriptor(struct ac_nir_context *ctx,
2322 const nir_intrinsic_instr *instr,
2323 enum ac_descriptor_type desc_type,
2324 bool write)
2325 {
2326 nir_deref_instr *deref_instr =
2327 instr->src[0].ssa->parent_instr->type == nir_instr_type_deref ?
2328 nir_instr_as_deref(instr->src[0].ssa->parent_instr) : NULL;
2329
2330 return get_sampler_desc(ctx, deref_instr, desc_type, &instr->instr, true, write);
2331 }
2332
2333 static void get_image_coords(struct ac_nir_context *ctx,
2334 const nir_intrinsic_instr *instr,
2335 struct ac_image_args *args,
2336 enum glsl_sampler_dim dim,
2337 bool is_array)
2338 {
2339 LLVMValueRef src0 = get_src(ctx, instr->src[1]);
2340 LLVMValueRef masks[] = {
2341 LLVMConstInt(ctx->ac.i32, 0, false), LLVMConstInt(ctx->ac.i32, 1, false),
2342 LLVMConstInt(ctx->ac.i32, 2, false), LLVMConstInt(ctx->ac.i32, 3, false),
2343 };
2344 LLVMValueRef sample_index = ac_llvm_extract_elem(&ctx->ac, get_src(ctx, instr->src[2]), 0);
2345
2346 int count;
2347 MAYBE_UNUSED bool add_frag_pos = (dim == GLSL_SAMPLER_DIM_SUBPASS ||
2348 dim == GLSL_SAMPLER_DIM_SUBPASS_MS);
2349 bool is_ms = (dim == GLSL_SAMPLER_DIM_MS ||
2350 dim == GLSL_SAMPLER_DIM_SUBPASS_MS);
2351 bool gfx9_1d = ctx->ac.chip_class == GFX9 && dim == GLSL_SAMPLER_DIM_1D;
2352 assert(!add_frag_pos && "Input attachments should be lowered by this point.");
2353 count = image_type_to_components_count(dim, is_array);
2354
2355 if (is_ms && (instr->intrinsic == nir_intrinsic_image_deref_load ||
2356 instr->intrinsic == nir_intrinsic_bindless_image_load)) {
2357 LLVMValueRef fmask_load_address[3];
2358
2359 fmask_load_address[0] = LLVMBuildExtractElement(ctx->ac.builder, src0, masks[0], "");
2360 fmask_load_address[1] = LLVMBuildExtractElement(ctx->ac.builder, src0, masks[1], "");
2361 if (is_array)
2362 fmask_load_address[2] = LLVMBuildExtractElement(ctx->ac.builder, src0, masks[2], "");
2363 else
2364 fmask_load_address[2] = NULL;
2365
2366 sample_index = adjust_sample_index_using_fmask(&ctx->ac,
2367 fmask_load_address[0],
2368 fmask_load_address[1],
2369 fmask_load_address[2],
2370 sample_index,
2371 get_sampler_desc(ctx, nir_instr_as_deref(instr->src[0].ssa->parent_instr),
2372 AC_DESC_FMASK, &instr->instr, false, false));
2373 }
2374 if (count == 1 && !gfx9_1d) {
2375 if (instr->src[1].ssa->num_components)
2376 args->coords[0] = LLVMBuildExtractElement(ctx->ac.builder, src0, masks[0], "");
2377 else
2378 args->coords[0] = src0;
2379 } else {
2380 int chan;
2381 if (is_ms)
2382 count--;
2383 for (chan = 0; chan < count; ++chan) {
2384 args->coords[chan] = ac_llvm_extract_elem(&ctx->ac, src0, chan);
2385 }
2386
2387 if (gfx9_1d) {
2388 if (is_array) {
2389 args->coords[2] = args->coords[1];
2390 args->coords[1] = ctx->ac.i32_0;
2391 } else
2392 args->coords[1] = ctx->ac.i32_0;
2393 count++;
2394 }
2395
2396 if (is_ms) {
2397 args->coords[count] = sample_index;
2398 count++;
2399 }
2400 }
2401 }
2402
2403 static LLVMValueRef get_image_buffer_descriptor(struct ac_nir_context *ctx,
2404 const nir_intrinsic_instr *instr,
2405 bool write, bool atomic)
2406 {
2407 LLVMValueRef rsrc = get_image_descriptor(ctx, instr, AC_DESC_BUFFER, write);
2408 if (ctx->abi->gfx9_stride_size_workaround ||
2409 (ctx->abi->gfx9_stride_size_workaround_for_atomic && atomic)) {
2410 LLVMValueRef elem_count = LLVMBuildExtractElement(ctx->ac.builder, rsrc, LLVMConstInt(ctx->ac.i32, 2, 0), "");
2411 LLVMValueRef stride = LLVMBuildExtractElement(ctx->ac.builder, rsrc, LLVMConstInt(ctx->ac.i32, 1, 0), "");
2412 stride = LLVMBuildLShr(ctx->ac.builder, stride, LLVMConstInt(ctx->ac.i32, 16, 0), "");
2413
2414 LLVMValueRef new_elem_count = LLVMBuildSelect(ctx->ac.builder,
2415 LLVMBuildICmp(ctx->ac.builder, LLVMIntUGT, elem_count, stride, ""),
2416 elem_count, stride, "");
2417
2418 rsrc = LLVMBuildInsertElement(ctx->ac.builder, rsrc, new_elem_count,
2419 LLVMConstInt(ctx->ac.i32, 2, 0), "");
2420 }
2421 return rsrc;
2422 }
2423
2424 static LLVMValueRef visit_image_load(struct ac_nir_context *ctx,
2425 const nir_intrinsic_instr *instr,
2426 bool bindless)
2427 {
2428 LLVMValueRef res;
2429
2430 enum glsl_sampler_dim dim;
2431 enum gl_access_qualifier access;
2432 bool is_array;
2433 if (bindless) {
2434 dim = nir_intrinsic_image_dim(instr);
2435 access = nir_intrinsic_access(instr);
2436 is_array = nir_intrinsic_image_array(instr);
2437 } else {
2438 const nir_deref_instr *image_deref = get_image_deref(instr);
2439 const struct glsl_type *type = image_deref->type;
2440 const nir_variable *var = nir_deref_instr_get_variable(image_deref);
2441 dim = glsl_get_sampler_dim(type);
2442 access = var->data.image.access;
2443 is_array = glsl_sampler_type_is_array(type);
2444 }
2445
2446 struct ac_image_args args = {};
2447
2448 args.cache_policy = get_cache_policy(ctx, access, false, false);
2449
2450 if (dim == GLSL_SAMPLER_DIM_BUF) {
2451 unsigned mask = nir_ssa_def_components_read(&instr->dest.ssa);
2452 unsigned num_channels = util_last_bit(mask);
2453 LLVMValueRef rsrc, vindex;
2454
2455 rsrc = get_image_buffer_descriptor(ctx, instr, false, false);
2456 vindex = LLVMBuildExtractElement(ctx->ac.builder, get_src(ctx, instr->src[1]),
2457 ctx->ac.i32_0, "");
2458
2459 bool can_speculate = access & ACCESS_CAN_REORDER;
2460 res = ac_build_buffer_load_format(&ctx->ac, rsrc, vindex,
2461 ctx->ac.i32_0, num_channels,
2462 args.cache_policy,
2463 can_speculate);
2464 res = ac_build_expand_to_vec4(&ctx->ac, res, num_channels);
2465
2466 res = ac_trim_vector(&ctx->ac, res, instr->dest.ssa.num_components);
2467 res = ac_to_integer(&ctx->ac, res);
2468 } else {
2469 args.opcode = ac_image_load;
2470 get_image_coords(ctx, instr, &args, dim, is_array);
2471 args.resource = get_image_descriptor(ctx, instr, AC_DESC_IMAGE, false);
2472 args.dim = get_ac_image_dim(&ctx->ac, dim, is_array);
2473 args.dmask = 15;
2474 args.attributes = AC_FUNC_ATTR_READONLY;
2475
2476 res = ac_build_image_opcode(&ctx->ac, &args);
2477 }
2478 return res;
2479 }
2480
2481 static void visit_image_store(struct ac_nir_context *ctx,
2482 nir_intrinsic_instr *instr,
2483 bool bindless)
2484 {
2485
2486
2487 enum glsl_sampler_dim dim;
2488 enum gl_access_qualifier access;
2489 bool is_array;
2490 if (bindless) {
2491 dim = nir_intrinsic_image_dim(instr);
2492 access = nir_intrinsic_access(instr);
2493 is_array = nir_intrinsic_image_array(instr);
2494 } else {
2495 const nir_deref_instr *image_deref = get_image_deref(instr);
2496 const struct glsl_type *type = image_deref->type;
2497 const nir_variable *var = nir_deref_instr_get_variable(image_deref);
2498 dim = glsl_get_sampler_dim(type);
2499 access = var->data.image.access;
2500 is_array = glsl_sampler_type_is_array(type);
2501 }
2502
2503 bool writeonly_memory = access & ACCESS_NON_READABLE;
2504 struct ac_image_args args = {};
2505
2506 args.cache_policy = get_cache_policy(ctx, access, true, writeonly_memory);
2507
2508 if (dim == GLSL_SAMPLER_DIM_BUF) {
2509 LLVMValueRef rsrc = get_image_buffer_descriptor(ctx, instr, true, false);
2510 LLVMValueRef src = ac_to_float(&ctx->ac, get_src(ctx, instr->src[3]));
2511 unsigned src_channels = ac_get_llvm_num_components(src);
2512 LLVMValueRef vindex;
2513
2514 if (src_channels == 3)
2515 src = ac_build_expand_to_vec4(&ctx->ac, src, 3);
2516
2517 vindex = LLVMBuildExtractElement(ctx->ac.builder,
2518 get_src(ctx, instr->src[1]),
2519 ctx->ac.i32_0, "");
2520
2521 ac_build_buffer_store_format(&ctx->ac, rsrc, src, vindex,
2522 ctx->ac.i32_0, src_channels,
2523 args.cache_policy);
2524 } else {
2525 args.opcode = ac_image_store;
2526 args.data[0] = ac_to_float(&ctx->ac, get_src(ctx, instr->src[3]));
2527 get_image_coords(ctx, instr, &args, dim, is_array);
2528 args.resource = get_image_descriptor(ctx, instr, AC_DESC_IMAGE, true);
2529 args.dim = get_ac_image_dim(&ctx->ac, dim, is_array);
2530 args.dmask = 15;
2531
2532 ac_build_image_opcode(&ctx->ac, &args);
2533 }
2534
2535 }
2536
2537 static LLVMValueRef visit_image_atomic(struct ac_nir_context *ctx,
2538 const nir_intrinsic_instr *instr,
2539 bool bindless)
2540 {
2541 LLVMValueRef params[7];
2542 int param_count = 0;
2543
2544 bool cmpswap = instr->intrinsic == nir_intrinsic_image_deref_atomic_comp_swap ||
2545 instr->intrinsic == nir_intrinsic_bindless_image_atomic_comp_swap;
2546 const char *atomic_name;
2547 char intrinsic_name[64];
2548 enum ac_atomic_op atomic_subop;
2549 MAYBE_UNUSED int length;
2550
2551 enum glsl_sampler_dim dim;
2552 bool is_unsigned = false;
2553 bool is_array;
2554 if (bindless) {
2555 if (instr->intrinsic == nir_intrinsic_bindless_image_atomic_min ||
2556 instr->intrinsic == nir_intrinsic_bindless_image_atomic_max) {
2557 const GLenum format = nir_intrinsic_format(instr);
2558 assert(format == GL_R32UI || format == GL_R32I);
2559 is_unsigned = format == GL_R32UI;
2560 }
2561 dim = nir_intrinsic_image_dim(instr);
2562 is_array = nir_intrinsic_image_array(instr);
2563 } else {
2564 const struct glsl_type *type = get_image_deref(instr)->type;
2565 is_unsigned = glsl_get_sampler_result_type(type) == GLSL_TYPE_UINT;
2566 dim = glsl_get_sampler_dim(type);
2567 is_array = glsl_sampler_type_is_array(type);
2568 }
2569
2570 switch (instr->intrinsic) {
2571 case nir_intrinsic_bindless_image_atomic_add:
2572 case nir_intrinsic_image_deref_atomic_add:
2573 atomic_name = "add";
2574 atomic_subop = ac_atomic_add;
2575 break;
2576 case nir_intrinsic_bindless_image_atomic_min:
2577 case nir_intrinsic_image_deref_atomic_min:
2578 atomic_name = is_unsigned ? "umin" : "smin";
2579 atomic_subop = is_unsigned ? ac_atomic_umin : ac_atomic_smin;
2580 break;
2581 case nir_intrinsic_bindless_image_atomic_max:
2582 case nir_intrinsic_image_deref_atomic_max:
2583 atomic_name = is_unsigned ? "umax" : "smax";
2584 atomic_subop = is_unsigned ? ac_atomic_umax : ac_atomic_smax;
2585 break;
2586 case nir_intrinsic_bindless_image_atomic_and:
2587 case nir_intrinsic_image_deref_atomic_and:
2588 atomic_name = "and";
2589 atomic_subop = ac_atomic_and;
2590 break;
2591 case nir_intrinsic_bindless_image_atomic_or:
2592 case nir_intrinsic_image_deref_atomic_or:
2593 atomic_name = "or";
2594 atomic_subop = ac_atomic_or;
2595 break;
2596 case nir_intrinsic_bindless_image_atomic_xor:
2597 case nir_intrinsic_image_deref_atomic_xor:
2598 atomic_name = "xor";
2599 atomic_subop = ac_atomic_xor;
2600 break;
2601 case nir_intrinsic_bindless_image_atomic_exchange:
2602 case nir_intrinsic_image_deref_atomic_exchange:
2603 atomic_name = "swap";
2604 atomic_subop = ac_atomic_swap;
2605 break;
2606 case nir_intrinsic_bindless_image_atomic_comp_swap:
2607 case nir_intrinsic_image_deref_atomic_comp_swap:
2608 atomic_name = "cmpswap";
2609 atomic_subop = 0; /* not used */
2610 break;
2611 default:
2612 abort();
2613 }
2614
2615 if (cmpswap)
2616 params[param_count++] = get_src(ctx, instr->src[4]);
2617 params[param_count++] = get_src(ctx, instr->src[3]);
2618
2619 if (dim == GLSL_SAMPLER_DIM_BUF) {
2620 params[param_count++] = get_image_buffer_descriptor(ctx, instr, true, true);
2621 params[param_count++] = LLVMBuildExtractElement(ctx->ac.builder, get_src(ctx, instr->src[1]),
2622 ctx->ac.i32_0, ""); /* vindex */
2623 params[param_count++] = ctx->ac.i32_0; /* voffset */
2624 if (HAVE_LLVM >= 0x900) {
2625 /* XXX: The new raw/struct atomic intrinsics are buggy
2626 * with LLVM 8, see r358579.
2627 */
2628 params[param_count++] = ctx->ac.i32_0; /* soffset */
2629 params[param_count++] = ctx->ac.i32_0; /* slc */
2630
2631 length = snprintf(intrinsic_name, sizeof(intrinsic_name),
2632 "llvm.amdgcn.struct.buffer.atomic.%s.i32", atomic_name);
2633 } else {
2634 params[param_count++] = ctx->ac.i1false; /* slc */
2635
2636 length = snprintf(intrinsic_name, sizeof(intrinsic_name),
2637 "llvm.amdgcn.buffer.atomic.%s", atomic_name);
2638 }
2639
2640 assert(length < sizeof(intrinsic_name));
2641 return ac_build_intrinsic(&ctx->ac, intrinsic_name, ctx->ac.i32,
2642 params, param_count, 0);
2643 } else {
2644 struct ac_image_args args = {};
2645 args.opcode = cmpswap ? ac_image_atomic_cmpswap : ac_image_atomic;
2646 args.atomic = atomic_subop;
2647 args.data[0] = params[0];
2648 if (cmpswap)
2649 args.data[1] = params[1];
2650 get_image_coords(ctx, instr, &args, dim, is_array);
2651 args.resource = get_image_descriptor(ctx, instr, AC_DESC_IMAGE, true);
2652 args.dim = get_ac_image_dim(&ctx->ac, dim, is_array);
2653
2654 return ac_build_image_opcode(&ctx->ac, &args);
2655 }
2656 }
2657
2658 static LLVMValueRef visit_image_samples(struct ac_nir_context *ctx,
2659 const nir_intrinsic_instr *instr,
2660 bool bindless)
2661 {
2662 enum glsl_sampler_dim dim;
2663 bool is_array;
2664 if (bindless) {
2665 dim = nir_intrinsic_image_dim(instr);
2666 is_array = nir_intrinsic_image_array(instr);
2667 } else {
2668 const struct glsl_type *type = get_image_deref(instr)->type;
2669 dim = glsl_get_sampler_dim(type);
2670 is_array = glsl_sampler_type_is_array(type);
2671 }
2672
2673 struct ac_image_args args = { 0 };
2674 args.dim = get_ac_sampler_dim(&ctx->ac, dim, is_array);
2675 args.dmask = 0xf;
2676 args.resource = get_image_descriptor(ctx, instr, AC_DESC_IMAGE, false);
2677 args.opcode = ac_image_get_resinfo;
2678 args.lod = ctx->ac.i32_0;
2679 args.attributes = AC_FUNC_ATTR_READNONE;
2680
2681 return ac_build_image_opcode(&ctx->ac, &args);
2682 }
2683
2684 static LLVMValueRef visit_image_size(struct ac_nir_context *ctx,
2685 const nir_intrinsic_instr *instr,
2686 bool bindless)
2687 {
2688 LLVMValueRef res;
2689
2690 enum glsl_sampler_dim dim;
2691 bool is_array;
2692 if (bindless) {
2693 dim = nir_intrinsic_image_dim(instr);
2694 is_array = nir_intrinsic_image_array(instr);
2695 } else {
2696 const struct glsl_type *type = get_image_deref(instr)->type;
2697 dim = glsl_get_sampler_dim(type);
2698 is_array = glsl_sampler_type_is_array(type);
2699 }
2700
2701 if (dim == GLSL_SAMPLER_DIM_BUF)
2702 return get_buffer_size(ctx, get_image_descriptor(ctx, instr, AC_DESC_BUFFER, false), true);
2703
2704 struct ac_image_args args = { 0 };
2705
2706 args.dim = get_ac_image_dim(&ctx->ac, dim, is_array);
2707 args.dmask = 0xf;
2708 args.resource = get_image_descriptor(ctx, instr, AC_DESC_IMAGE, false);
2709 args.opcode = ac_image_get_resinfo;
2710 args.lod = ctx->ac.i32_0;
2711 args.attributes = AC_FUNC_ATTR_READNONE;
2712
2713 res = ac_build_image_opcode(&ctx->ac, &args);
2714
2715 LLVMValueRef two = LLVMConstInt(ctx->ac.i32, 2, false);
2716
2717 if (dim == GLSL_SAMPLER_DIM_CUBE && is_array) {
2718 LLVMValueRef six = LLVMConstInt(ctx->ac.i32, 6, false);
2719 LLVMValueRef z = LLVMBuildExtractElement(ctx->ac.builder, res, two, "");
2720 z = LLVMBuildSDiv(ctx->ac.builder, z, six, "");
2721 res = LLVMBuildInsertElement(ctx->ac.builder, res, z, two, "");
2722 }
2723 if (ctx->ac.chip_class == GFX9 && dim == GLSL_SAMPLER_DIM_1D && is_array) {
2724 LLVMValueRef layers = LLVMBuildExtractElement(ctx->ac.builder, res, two, "");
2725 res = LLVMBuildInsertElement(ctx->ac.builder, res, layers,
2726 ctx->ac.i32_1, "");
2727
2728 }
2729 return res;
2730 }
2731
2732 static void emit_membar(struct ac_llvm_context *ac,
2733 const nir_intrinsic_instr *instr)
2734 {
2735 unsigned wait_flags = 0;
2736
2737 switch (instr->intrinsic) {
2738 case nir_intrinsic_memory_barrier:
2739 case nir_intrinsic_group_memory_barrier:
2740 wait_flags = AC_WAIT_LGKM | AC_WAIT_VLOAD | AC_WAIT_VSTORE;
2741 break;
2742 case nir_intrinsic_memory_barrier_atomic_counter:
2743 case nir_intrinsic_memory_barrier_buffer:
2744 case nir_intrinsic_memory_barrier_image:
2745 wait_flags = AC_WAIT_VLOAD | AC_WAIT_VSTORE;
2746 break;
2747 case nir_intrinsic_memory_barrier_shared:
2748 wait_flags = AC_WAIT_LGKM;
2749 break;
2750 default:
2751 break;
2752 }
2753
2754 ac_build_waitcnt(ac, wait_flags);
2755 }
2756
2757 void ac_emit_barrier(struct ac_llvm_context *ac, gl_shader_stage stage)
2758 {
2759 /* GFX6 only (thanks to a hw bug workaround):
2760 * The real barrier instruction isn’t needed, because an entire patch
2761 * always fits into a single wave.
2762 */
2763 if (ac->chip_class == GFX6 && stage == MESA_SHADER_TESS_CTRL) {
2764 ac_build_waitcnt(ac, AC_WAIT_LGKM | AC_WAIT_VLOAD | AC_WAIT_VSTORE);
2765 return;
2766 }
2767 ac_build_s_barrier(ac);
2768 }
2769
2770 static void emit_discard(struct ac_nir_context *ctx,
2771 const nir_intrinsic_instr *instr)
2772 {
2773 LLVMValueRef cond;
2774
2775 if (instr->intrinsic == nir_intrinsic_discard_if) {
2776 cond = LLVMBuildICmp(ctx->ac.builder, LLVMIntEQ,
2777 get_src(ctx, instr->src[0]),
2778 ctx->ac.i32_0, "");
2779 } else {
2780 assert(instr->intrinsic == nir_intrinsic_discard);
2781 cond = ctx->ac.i1false;
2782 }
2783
2784 ctx->abi->emit_kill(ctx->abi, cond);
2785 }
2786
2787 static LLVMValueRef
2788 visit_load_local_invocation_index(struct ac_nir_context *ctx)
2789 {
2790 LLVMValueRef result;
2791 LLVMValueRef thread_id = ac_get_thread_id(&ctx->ac);
2792 result = LLVMBuildAnd(ctx->ac.builder, ctx->abi->tg_size,
2793 LLVMConstInt(ctx->ac.i32, 0xfc0, false), "");
2794
2795 return LLVMBuildAdd(ctx->ac.builder, result, thread_id, "");
2796 }
2797
2798 static LLVMValueRef
2799 visit_load_subgroup_id(struct ac_nir_context *ctx)
2800 {
2801 if (ctx->stage == MESA_SHADER_COMPUTE) {
2802 LLVMValueRef result;
2803 result = LLVMBuildAnd(ctx->ac.builder, ctx->abi->tg_size,
2804 LLVMConstInt(ctx->ac.i32, 0xfc0, false), "");
2805 return LLVMBuildLShr(ctx->ac.builder, result, LLVMConstInt(ctx->ac.i32, 6, false), "");
2806 } else {
2807 return LLVMConstInt(ctx->ac.i32, 0, false);
2808 }
2809 }
2810
2811 static LLVMValueRef
2812 visit_load_num_subgroups(struct ac_nir_context *ctx)
2813 {
2814 if (ctx->stage == MESA_SHADER_COMPUTE) {
2815 return LLVMBuildAnd(ctx->ac.builder, ctx->abi->tg_size,
2816 LLVMConstInt(ctx->ac.i32, 0x3f, false), "");
2817 } else {
2818 return LLVMConstInt(ctx->ac.i32, 1, false);
2819 }
2820 }
2821
2822 static LLVMValueRef
2823 visit_first_invocation(struct ac_nir_context *ctx)
2824 {
2825 LLVMValueRef active_set = ac_build_ballot(&ctx->ac, ctx->ac.i32_1);
2826 const char *intr = ctx->ac.wave_size == 32 ? "llvm.cttz.i32" : "llvm.cttz.i64";
2827
2828 /* The second argument is whether cttz(0) should be defined, but we do not care. */
2829 LLVMValueRef args[] = {active_set, ctx->ac.i1false};
2830 LLVMValueRef result = ac_build_intrinsic(&ctx->ac, intr,
2831 ctx->ac.iN_wavemask, args, 2,
2832 AC_FUNC_ATTR_NOUNWIND |
2833 AC_FUNC_ATTR_READNONE);
2834
2835 return LLVMBuildTrunc(ctx->ac.builder, result, ctx->ac.i32, "");
2836 }
2837
2838 static LLVMValueRef
2839 visit_load_shared(struct ac_nir_context *ctx,
2840 const nir_intrinsic_instr *instr)
2841 {
2842 LLVMValueRef values[4], derived_ptr, index, ret;
2843
2844 LLVMValueRef ptr = get_memory_ptr(ctx, instr->src[0]);
2845
2846 for (int chan = 0; chan < instr->num_components; chan++) {
2847 index = LLVMConstInt(ctx->ac.i32, chan, 0);
2848 derived_ptr = LLVMBuildGEP(ctx->ac.builder, ptr, &index, 1, "");
2849 values[chan] = LLVMBuildLoad(ctx->ac.builder, derived_ptr, "");
2850 }
2851
2852 ret = ac_build_gather_values(&ctx->ac, values, instr->num_components);
2853 return LLVMBuildBitCast(ctx->ac.builder, ret, get_def_type(ctx, &instr->dest.ssa), "");
2854 }
2855
2856 static void
2857 visit_store_shared(struct ac_nir_context *ctx,
2858 const nir_intrinsic_instr *instr)
2859 {
2860 LLVMValueRef derived_ptr, data,index;
2861 LLVMBuilderRef builder = ctx->ac.builder;
2862
2863 LLVMValueRef ptr = get_memory_ptr(ctx, instr->src[1]);
2864 LLVMValueRef src = get_src(ctx, instr->src[0]);
2865
2866 int writemask = nir_intrinsic_write_mask(instr);
2867 for (int chan = 0; chan < 4; chan++) {
2868 if (!(writemask & (1 << chan))) {
2869 continue;
2870 }
2871 data = ac_llvm_extract_elem(&ctx->ac, src, chan);
2872 index = LLVMConstInt(ctx->ac.i32, chan, 0);
2873 derived_ptr = LLVMBuildGEP(builder, ptr, &index, 1, "");
2874 LLVMBuildStore(builder, data, derived_ptr);
2875 }
2876 }
2877
2878 static LLVMValueRef visit_var_atomic(struct ac_nir_context *ctx,
2879 const nir_intrinsic_instr *instr,
2880 LLVMValueRef ptr, int src_idx)
2881 {
2882 LLVMValueRef result;
2883 LLVMValueRef src = get_src(ctx, instr->src[src_idx]);
2884
2885 const char *sync_scope = HAVE_LLVM >= 0x0900 ? "workgroup-one-as" : "workgroup";
2886
2887 if (instr->intrinsic == nir_intrinsic_shared_atomic_comp_swap ||
2888 instr->intrinsic == nir_intrinsic_deref_atomic_comp_swap) {
2889 LLVMValueRef src1 = get_src(ctx, instr->src[src_idx + 1]);
2890 result = ac_build_atomic_cmp_xchg(&ctx->ac, ptr, src, src1, sync_scope);
2891 result = LLVMBuildExtractValue(ctx->ac.builder, result, 0, "");
2892 } else {
2893 LLVMAtomicRMWBinOp op;
2894 switch (instr->intrinsic) {
2895 case nir_intrinsic_shared_atomic_add:
2896 case nir_intrinsic_deref_atomic_add:
2897 op = LLVMAtomicRMWBinOpAdd;
2898 break;
2899 case nir_intrinsic_shared_atomic_umin:
2900 case nir_intrinsic_deref_atomic_umin:
2901 op = LLVMAtomicRMWBinOpUMin;
2902 break;
2903 case nir_intrinsic_shared_atomic_umax:
2904 case nir_intrinsic_deref_atomic_umax:
2905 op = LLVMAtomicRMWBinOpUMax;
2906 break;
2907 case nir_intrinsic_shared_atomic_imin:
2908 case nir_intrinsic_deref_atomic_imin:
2909 op = LLVMAtomicRMWBinOpMin;
2910 break;
2911 case nir_intrinsic_shared_atomic_imax:
2912 case nir_intrinsic_deref_atomic_imax:
2913 op = LLVMAtomicRMWBinOpMax;
2914 break;
2915 case nir_intrinsic_shared_atomic_and:
2916 case nir_intrinsic_deref_atomic_and:
2917 op = LLVMAtomicRMWBinOpAnd;
2918 break;
2919 case nir_intrinsic_shared_atomic_or:
2920 case nir_intrinsic_deref_atomic_or:
2921 op = LLVMAtomicRMWBinOpOr;
2922 break;
2923 case nir_intrinsic_shared_atomic_xor:
2924 case nir_intrinsic_deref_atomic_xor:
2925 op = LLVMAtomicRMWBinOpXor;
2926 break;
2927 case nir_intrinsic_shared_atomic_exchange:
2928 case nir_intrinsic_deref_atomic_exchange:
2929 op = LLVMAtomicRMWBinOpXchg;
2930 break;
2931 default:
2932 return NULL;
2933 }
2934
2935 result = ac_build_atomic_rmw(&ctx->ac, op, ptr, ac_to_integer(&ctx->ac, src), sync_scope);
2936 }
2937 return result;
2938 }
2939
2940 static LLVMValueRef load_sample_pos(struct ac_nir_context *ctx)
2941 {
2942 LLVMValueRef values[2];
2943 LLVMValueRef pos[2];
2944
2945 pos[0] = ac_to_float(&ctx->ac, ctx->abi->frag_pos[0]);
2946 pos[1] = ac_to_float(&ctx->ac, ctx->abi->frag_pos[1]);
2947
2948 values[0] = ac_build_fract(&ctx->ac, pos[0], 32);
2949 values[1] = ac_build_fract(&ctx->ac, pos[1], 32);
2950 return ac_build_gather_values(&ctx->ac, values, 2);
2951 }
2952
2953 static LLVMValueRef barycentric_center(struct ac_nir_context *ctx,
2954 unsigned mode)
2955 {
2956 LLVMValueRef interp_param = ctx->abi->lookup_interp_param(ctx->abi, mode, INTERP_CENTER);
2957 return LLVMBuildBitCast(ctx->ac.builder, interp_param, ctx->ac.v2i32, "");
2958 }
2959
2960 static LLVMValueRef barycentric_offset(struct ac_nir_context *ctx,
2961 unsigned mode,
2962 LLVMValueRef offset)
2963 {
2964 LLVMValueRef interp_param = ctx->abi->lookup_interp_param(ctx->abi, mode, INTERP_CENTER);
2965 LLVMValueRef src_c0 = ac_to_float(&ctx->ac, LLVMBuildExtractElement(ctx->ac.builder, offset, ctx->ac.i32_0, ""));
2966 LLVMValueRef src_c1 = ac_to_float(&ctx->ac, LLVMBuildExtractElement(ctx->ac.builder, offset, ctx->ac.i32_1, ""));
2967
2968 LLVMValueRef ij_out[2];
2969 LLVMValueRef ddxy_out = ac_build_ddxy_interp(&ctx->ac, interp_param);
2970
2971 /*
2972 * take the I then J parameters, and the DDX/Y for it, and
2973 * calculate the IJ inputs for the interpolator.
2974 * temp1 = ddx * offset/sample.x + I;
2975 * interp_param.I = ddy * offset/sample.y + temp1;
2976 * temp1 = ddx * offset/sample.x + J;
2977 * interp_param.J = ddy * offset/sample.y + temp1;
2978 */
2979 for (unsigned i = 0; i < 2; i++) {
2980 LLVMValueRef ix_ll = LLVMConstInt(ctx->ac.i32, i, false);
2981 LLVMValueRef iy_ll = LLVMConstInt(ctx->ac.i32, i + 2, false);
2982 LLVMValueRef ddx_el = LLVMBuildExtractElement(ctx->ac.builder,
2983 ddxy_out, ix_ll, "");
2984 LLVMValueRef ddy_el = LLVMBuildExtractElement(ctx->ac.builder,
2985 ddxy_out, iy_ll, "");
2986 LLVMValueRef interp_el = LLVMBuildExtractElement(ctx->ac.builder,
2987 interp_param, ix_ll, "");
2988 LLVMValueRef temp1, temp2;
2989
2990 interp_el = LLVMBuildBitCast(ctx->ac.builder, interp_el,
2991 ctx->ac.f32, "");
2992
2993 temp1 = ac_build_fmad(&ctx->ac, ddx_el, src_c0, interp_el);
2994 temp2 = ac_build_fmad(&ctx->ac, ddy_el, src_c1, temp1);
2995
2996 ij_out[i] = LLVMBuildBitCast(ctx->ac.builder,
2997 temp2, ctx->ac.i32, "");
2998 }
2999 interp_param = ac_build_gather_values(&ctx->ac, ij_out, 2);
3000 return LLVMBuildBitCast(ctx->ac.builder, interp_param, ctx->ac.v2i32, "");
3001 }
3002
3003 static LLVMValueRef barycentric_centroid(struct ac_nir_context *ctx,
3004 unsigned mode)
3005 {
3006 LLVMValueRef interp_param = ctx->abi->lookup_interp_param(ctx->abi, mode, INTERP_CENTROID);
3007 return LLVMBuildBitCast(ctx->ac.builder, interp_param, ctx->ac.v2i32, "");
3008 }
3009
3010 static LLVMValueRef barycentric_at_sample(struct ac_nir_context *ctx,
3011 unsigned mode,
3012 LLVMValueRef sample_id)
3013 {
3014 LLVMValueRef halfval = LLVMConstReal(ctx->ac.f32, 0.5f);
3015
3016 /* fetch sample ID */
3017 LLVMValueRef sample_pos = ctx->abi->load_sample_position(ctx->abi, sample_id);
3018
3019 LLVMValueRef src_c0 = LLVMBuildExtractElement(ctx->ac.builder, sample_pos, ctx->ac.i32_0, "");
3020 src_c0 = LLVMBuildFSub(ctx->ac.builder, src_c0, halfval, "");
3021 LLVMValueRef src_c1 = LLVMBuildExtractElement(ctx->ac.builder, sample_pos, ctx->ac.i32_1, "");
3022 src_c1 = LLVMBuildFSub(ctx->ac.builder, src_c1, halfval, "");
3023 LLVMValueRef coords[] = { src_c0, src_c1 };
3024 LLVMValueRef offset = ac_build_gather_values(&ctx->ac, coords, 2);
3025
3026 return barycentric_offset(ctx, mode, offset);
3027 }
3028
3029
3030 static LLVMValueRef barycentric_sample(struct ac_nir_context *ctx,
3031 unsigned mode)
3032 {
3033 LLVMValueRef interp_param = ctx->abi->lookup_interp_param(ctx->abi, mode, INTERP_SAMPLE);
3034 return LLVMBuildBitCast(ctx->ac.builder, interp_param, ctx->ac.v2i32, "");
3035 }
3036
3037 static LLVMValueRef load_interpolated_input(struct ac_nir_context *ctx,
3038 LLVMValueRef interp_param,
3039 unsigned index, unsigned comp_start,
3040 unsigned num_components,
3041 unsigned bitsize)
3042 {
3043 LLVMValueRef attr_number = LLVMConstInt(ctx->ac.i32, index, false);
3044
3045 interp_param = LLVMBuildBitCast(ctx->ac.builder,
3046 interp_param, ctx->ac.v2f32, "");
3047 LLVMValueRef i = LLVMBuildExtractElement(
3048 ctx->ac.builder, interp_param, ctx->ac.i32_0, "");
3049 LLVMValueRef j = LLVMBuildExtractElement(
3050 ctx->ac.builder, interp_param, ctx->ac.i32_1, "");
3051
3052 LLVMValueRef values[4];
3053 assert(bitsize == 16 || bitsize == 32);
3054 for (unsigned comp = 0; comp < num_components; comp++) {
3055 LLVMValueRef llvm_chan = LLVMConstInt(ctx->ac.i32, comp_start + comp, false);
3056 if (bitsize == 16) {
3057 values[comp] = ac_build_fs_interp_f16(&ctx->ac, llvm_chan, attr_number,
3058 ctx->abi->prim_mask, i, j);
3059 } else {
3060 values[comp] = ac_build_fs_interp(&ctx->ac, llvm_chan, attr_number,
3061 ctx->abi->prim_mask, i, j);
3062 }
3063 }
3064
3065 return ac_to_integer(&ctx->ac, ac_build_gather_values(&ctx->ac, values, num_components));
3066 }
3067
3068 static LLVMValueRef load_flat_input(struct ac_nir_context *ctx,
3069 unsigned index, unsigned comp_start,
3070 unsigned num_components,
3071 unsigned bit_size)
3072 {
3073 LLVMValueRef attr_number = LLVMConstInt(ctx->ac.i32, index, false);
3074
3075 LLVMValueRef values[8];
3076
3077 /* Each component of a 64-bit value takes up two GL-level channels. */
3078 unsigned channels =
3079 bit_size == 64 ? num_components * 2 : num_components;
3080
3081 for (unsigned chan = 0; chan < channels; chan++) {
3082 if (comp_start + chan > 4)
3083 attr_number = LLVMConstInt(ctx->ac.i32, index + 1, false);
3084 LLVMValueRef llvm_chan = LLVMConstInt(ctx->ac.i32, (comp_start + chan) % 4, false);
3085 values[chan] = ac_build_fs_interp_mov(&ctx->ac,
3086 LLVMConstInt(ctx->ac.i32, 2, false),
3087 llvm_chan,
3088 attr_number,
3089 ctx->abi->prim_mask);
3090 values[chan] = LLVMBuildBitCast(ctx->ac.builder, values[chan], ctx->ac.i32, "");
3091 values[chan] = LLVMBuildTruncOrBitCast(ctx->ac.builder, values[chan],
3092 bit_size == 16 ? ctx->ac.i16 : ctx->ac.i32, "");
3093 }
3094
3095 LLVMValueRef result = ac_build_gather_values(&ctx->ac, values, channels);
3096 if (bit_size == 64) {
3097 LLVMTypeRef type = num_components == 1 ? ctx->ac.i64 :
3098 LLVMVectorType(ctx->ac.i64, num_components);
3099 result = LLVMBuildBitCast(ctx->ac.builder, result, type, "");
3100 }
3101 return result;
3102 }
3103
3104 static void visit_intrinsic(struct ac_nir_context *ctx,
3105 nir_intrinsic_instr *instr)
3106 {
3107 LLVMValueRef result = NULL;
3108
3109 switch (instr->intrinsic) {
3110 case nir_intrinsic_ballot:
3111 result = ac_build_ballot(&ctx->ac, get_src(ctx, instr->src[0]));
3112 break;
3113 case nir_intrinsic_read_invocation:
3114 result = ac_build_readlane(&ctx->ac, get_src(ctx, instr->src[0]),
3115 get_src(ctx, instr->src[1]));
3116 break;
3117 case nir_intrinsic_read_first_invocation:
3118 result = ac_build_readlane(&ctx->ac, get_src(ctx, instr->src[0]), NULL);
3119 break;
3120 case nir_intrinsic_load_subgroup_invocation:
3121 result = ac_get_thread_id(&ctx->ac);
3122 break;
3123 case nir_intrinsic_load_work_group_id: {
3124 LLVMValueRef values[3];
3125
3126 for (int i = 0; i < 3; i++) {
3127 values[i] = ctx->abi->workgroup_ids[i] ?
3128 ctx->abi->workgroup_ids[i] : ctx->ac.i32_0;
3129 }
3130
3131 result = ac_build_gather_values(&ctx->ac, values, 3);
3132 break;
3133 }
3134 case nir_intrinsic_load_base_vertex:
3135 case nir_intrinsic_load_first_vertex:
3136 result = ctx->abi->load_base_vertex(ctx->abi);
3137 break;
3138 case nir_intrinsic_load_local_group_size:
3139 result = ctx->abi->load_local_group_size(ctx->abi);
3140 break;
3141 case nir_intrinsic_load_vertex_id:
3142 result = LLVMBuildAdd(ctx->ac.builder, ctx->abi->vertex_id,
3143 ctx->abi->base_vertex, "");
3144 break;
3145 case nir_intrinsic_load_vertex_id_zero_base: {
3146 result = ctx->abi->vertex_id;
3147 break;
3148 }
3149 case nir_intrinsic_load_local_invocation_id: {
3150 result = ctx->abi->local_invocation_ids;
3151 break;
3152 }
3153 case nir_intrinsic_load_base_instance:
3154 result = ctx->abi->start_instance;
3155 break;
3156 case nir_intrinsic_load_draw_id:
3157 result = ctx->abi->draw_id;
3158 break;
3159 case nir_intrinsic_load_view_index:
3160 result = ctx->abi->view_index;
3161 break;
3162 case nir_intrinsic_load_invocation_id:
3163 if (ctx->stage == MESA_SHADER_TESS_CTRL) {
3164 result = ac_unpack_param(&ctx->ac, ctx->abi->tcs_rel_ids, 8, 5);
3165 } else {
3166 if (ctx->ac.chip_class >= GFX10) {
3167 result = LLVMBuildAnd(ctx->ac.builder,
3168 ctx->abi->gs_invocation_id,
3169 LLVMConstInt(ctx->ac.i32, 127, 0), "");
3170 } else {
3171 result = ctx->abi->gs_invocation_id;
3172 }
3173 }
3174 break;
3175 case nir_intrinsic_load_primitive_id:
3176 if (ctx->stage == MESA_SHADER_GEOMETRY) {
3177 result = ctx->abi->gs_prim_id;
3178 } else if (ctx->stage == MESA_SHADER_TESS_CTRL) {
3179 result = ctx->abi->tcs_patch_id;
3180 } else if (ctx->stage == MESA_SHADER_TESS_EVAL) {
3181 result = ctx->abi->tes_patch_id;
3182 } else
3183 fprintf(stderr, "Unknown primitive id intrinsic: %d", ctx->stage);
3184 break;
3185 case nir_intrinsic_load_sample_id:
3186 result = ac_unpack_param(&ctx->ac, ctx->abi->ancillary, 8, 4);
3187 break;
3188 case nir_intrinsic_load_sample_pos:
3189 result = load_sample_pos(ctx);
3190 break;
3191 case nir_intrinsic_load_sample_mask_in:
3192 result = ctx->abi->load_sample_mask_in(ctx->abi);
3193 break;
3194 case nir_intrinsic_load_frag_coord: {
3195 LLVMValueRef values[4] = {
3196 ctx->abi->frag_pos[0],
3197 ctx->abi->frag_pos[1],
3198 ctx->abi->frag_pos[2],
3199 ac_build_fdiv(&ctx->ac, ctx->ac.f32_1, ctx->abi->frag_pos[3])
3200 };
3201 result = ac_to_integer(&ctx->ac,
3202 ac_build_gather_values(&ctx->ac, values, 4));
3203 break;
3204 }
3205 case nir_intrinsic_load_layer_id:
3206 result = ctx->abi->inputs[ac_llvm_reg_index_soa(VARYING_SLOT_LAYER, 0)];
3207 break;
3208 case nir_intrinsic_load_front_face:
3209 result = ctx->abi->front_face;
3210 break;
3211 case nir_intrinsic_load_helper_invocation:
3212 result = ac_build_load_helper_invocation(&ctx->ac);
3213 break;
3214 case nir_intrinsic_load_color0:
3215 result = ctx->abi->color0;
3216 break;
3217 case nir_intrinsic_load_color1:
3218 result = ctx->abi->color1;
3219 break;
3220 case nir_intrinsic_load_instance_id:
3221 result = ctx->abi->instance_id;
3222 break;
3223 case nir_intrinsic_load_num_work_groups:
3224 result = ctx->abi->num_work_groups;
3225 break;
3226 case nir_intrinsic_load_local_invocation_index:
3227 result = visit_load_local_invocation_index(ctx);
3228 break;
3229 case nir_intrinsic_load_subgroup_id:
3230 result = visit_load_subgroup_id(ctx);
3231 break;
3232 case nir_intrinsic_load_num_subgroups:
3233 result = visit_load_num_subgroups(ctx);
3234 break;
3235 case nir_intrinsic_first_invocation:
3236 result = visit_first_invocation(ctx);
3237 break;
3238 case nir_intrinsic_load_push_constant:
3239 result = visit_load_push_constant(ctx, instr);
3240 break;
3241 case nir_intrinsic_vulkan_resource_index: {
3242 LLVMValueRef index = get_src(ctx, instr->src[0]);
3243 unsigned desc_set = nir_intrinsic_desc_set(instr);
3244 unsigned binding = nir_intrinsic_binding(instr);
3245
3246 result = ctx->abi->load_resource(ctx->abi, index, desc_set,
3247 binding);
3248 break;
3249 }
3250 case nir_intrinsic_vulkan_resource_reindex:
3251 result = visit_vulkan_resource_reindex(ctx, instr);
3252 break;
3253 case nir_intrinsic_store_ssbo:
3254 visit_store_ssbo(ctx, instr);
3255 break;
3256 case nir_intrinsic_load_ssbo:
3257 result = visit_load_buffer(ctx, instr);
3258 break;
3259 case nir_intrinsic_ssbo_atomic_add:
3260 case nir_intrinsic_ssbo_atomic_imin:
3261 case nir_intrinsic_ssbo_atomic_umin:
3262 case nir_intrinsic_ssbo_atomic_imax:
3263 case nir_intrinsic_ssbo_atomic_umax:
3264 case nir_intrinsic_ssbo_atomic_and:
3265 case nir_intrinsic_ssbo_atomic_or:
3266 case nir_intrinsic_ssbo_atomic_xor:
3267 case nir_intrinsic_ssbo_atomic_exchange:
3268 case nir_intrinsic_ssbo_atomic_comp_swap:
3269 result = visit_atomic_ssbo(ctx, instr);
3270 break;
3271 case nir_intrinsic_load_ubo:
3272 result = visit_load_ubo_buffer(ctx, instr);
3273 break;
3274 case nir_intrinsic_get_buffer_size:
3275 result = visit_get_buffer_size(ctx, instr);
3276 break;
3277 case nir_intrinsic_load_deref:
3278 result = visit_load_var(ctx, instr);
3279 break;
3280 case nir_intrinsic_store_deref:
3281 visit_store_var(ctx, instr);
3282 break;
3283 case nir_intrinsic_load_shared:
3284 result = visit_load_shared(ctx, instr);
3285 break;
3286 case nir_intrinsic_store_shared:
3287 visit_store_shared(ctx, instr);
3288 break;
3289 case nir_intrinsic_bindless_image_samples:
3290 result = visit_image_samples(ctx, instr, true);
3291 break;
3292 case nir_intrinsic_image_deref_samples:
3293 result = visit_image_samples(ctx, instr, false);
3294 break;
3295 case nir_intrinsic_bindless_image_load:
3296 result = visit_image_load(ctx, instr, true);
3297 break;
3298 case nir_intrinsic_image_deref_load:
3299 result = visit_image_load(ctx, instr, false);
3300 break;
3301 case nir_intrinsic_bindless_image_store:
3302 visit_image_store(ctx, instr, true);
3303 break;
3304 case nir_intrinsic_image_deref_store:
3305 visit_image_store(ctx, instr, false);
3306 break;
3307 case nir_intrinsic_bindless_image_atomic_add:
3308 case nir_intrinsic_bindless_image_atomic_min:
3309 case nir_intrinsic_bindless_image_atomic_max:
3310 case nir_intrinsic_bindless_image_atomic_and:
3311 case nir_intrinsic_bindless_image_atomic_or:
3312 case nir_intrinsic_bindless_image_atomic_xor:
3313 case nir_intrinsic_bindless_image_atomic_exchange:
3314 case nir_intrinsic_bindless_image_atomic_comp_swap:
3315 result = visit_image_atomic(ctx, instr, true);
3316 break;
3317 case nir_intrinsic_image_deref_atomic_add:
3318 case nir_intrinsic_image_deref_atomic_min:
3319 case nir_intrinsic_image_deref_atomic_max:
3320 case nir_intrinsic_image_deref_atomic_and:
3321 case nir_intrinsic_image_deref_atomic_or:
3322 case nir_intrinsic_image_deref_atomic_xor:
3323 case nir_intrinsic_image_deref_atomic_exchange:
3324 case nir_intrinsic_image_deref_atomic_comp_swap:
3325 result = visit_image_atomic(ctx, instr, false);
3326 break;
3327 case nir_intrinsic_bindless_image_size:
3328 result = visit_image_size(ctx, instr, true);
3329 break;
3330 case nir_intrinsic_image_deref_size:
3331 result = visit_image_size(ctx, instr, false);
3332 break;
3333 case nir_intrinsic_shader_clock:
3334 result = ac_build_shader_clock(&ctx->ac);
3335 break;
3336 case nir_intrinsic_discard:
3337 case nir_intrinsic_discard_if:
3338 emit_discard(ctx, instr);
3339 break;
3340 case nir_intrinsic_memory_barrier:
3341 case nir_intrinsic_group_memory_barrier:
3342 case nir_intrinsic_memory_barrier_atomic_counter:
3343 case nir_intrinsic_memory_barrier_buffer:
3344 case nir_intrinsic_memory_barrier_image:
3345 case nir_intrinsic_memory_barrier_shared:
3346 emit_membar(&ctx->ac, instr);
3347 break;
3348 case nir_intrinsic_barrier:
3349 ac_emit_barrier(&ctx->ac, ctx->stage);
3350 break;
3351 case nir_intrinsic_shared_atomic_add:
3352 case nir_intrinsic_shared_atomic_imin:
3353 case nir_intrinsic_shared_atomic_umin:
3354 case nir_intrinsic_shared_atomic_imax:
3355 case nir_intrinsic_shared_atomic_umax:
3356 case nir_intrinsic_shared_atomic_and:
3357 case nir_intrinsic_shared_atomic_or:
3358 case nir_intrinsic_shared_atomic_xor:
3359 case nir_intrinsic_shared_atomic_exchange:
3360 case nir_intrinsic_shared_atomic_comp_swap: {
3361 LLVMValueRef ptr = get_memory_ptr(ctx, instr->src[0]);
3362 result = visit_var_atomic(ctx, instr, ptr, 1);
3363 break;
3364 }
3365 case nir_intrinsic_deref_atomic_add:
3366 case nir_intrinsic_deref_atomic_imin:
3367 case nir_intrinsic_deref_atomic_umin:
3368 case nir_intrinsic_deref_atomic_imax:
3369 case nir_intrinsic_deref_atomic_umax:
3370 case nir_intrinsic_deref_atomic_and:
3371 case nir_intrinsic_deref_atomic_or:
3372 case nir_intrinsic_deref_atomic_xor:
3373 case nir_intrinsic_deref_atomic_exchange:
3374 case nir_intrinsic_deref_atomic_comp_swap: {
3375 LLVMValueRef ptr = get_src(ctx, instr->src[0]);
3376 result = visit_var_atomic(ctx, instr, ptr, 1);
3377 break;
3378 }
3379 case nir_intrinsic_load_barycentric_pixel:
3380 result = barycentric_center(ctx, nir_intrinsic_interp_mode(instr));
3381 break;
3382 case nir_intrinsic_load_barycentric_centroid:
3383 result = barycentric_centroid(ctx, nir_intrinsic_interp_mode(instr));
3384 break;
3385 case nir_intrinsic_load_barycentric_sample:
3386 result = barycentric_sample(ctx, nir_intrinsic_interp_mode(instr));
3387 break;
3388 case nir_intrinsic_load_barycentric_at_offset: {
3389 LLVMValueRef offset = ac_to_float(&ctx->ac, get_src(ctx, instr->src[0]));
3390 result = barycentric_offset(ctx, nir_intrinsic_interp_mode(instr), offset);
3391 break;
3392 }
3393 case nir_intrinsic_load_barycentric_at_sample: {
3394 LLVMValueRef sample_id = get_src(ctx, instr->src[0]);
3395 result = barycentric_at_sample(ctx, nir_intrinsic_interp_mode(instr), sample_id);
3396 break;
3397 }
3398 case nir_intrinsic_load_interpolated_input: {
3399 /* We assume any indirect loads have been lowered away */
3400 MAYBE_UNUSED nir_const_value *offset = nir_src_as_const_value(instr->src[1]);
3401 assert(offset);
3402 assert(offset[0].i32 == 0);
3403
3404 LLVMValueRef interp_param = get_src(ctx, instr->src[0]);
3405 unsigned index = nir_intrinsic_base(instr);
3406 unsigned component = nir_intrinsic_component(instr);
3407 result = load_interpolated_input(ctx, interp_param, index,
3408 component,
3409 instr->dest.ssa.num_components,
3410 instr->dest.ssa.bit_size);
3411 break;
3412 }
3413 case nir_intrinsic_load_input: {
3414 /* We only lower inputs for fragment shaders ATM */
3415 MAYBE_UNUSED nir_const_value *offset = nir_src_as_const_value(instr->src[0]);
3416 assert(offset);
3417 assert(offset[0].i32 == 0);
3418
3419 unsigned index = nir_intrinsic_base(instr);
3420 unsigned component = nir_intrinsic_component(instr);
3421 result = load_flat_input(ctx, index, component,
3422 instr->dest.ssa.num_components,
3423 instr->dest.ssa.bit_size);
3424 break;
3425 }
3426 case nir_intrinsic_emit_vertex:
3427 ctx->abi->emit_vertex(ctx->abi, nir_intrinsic_stream_id(instr), ctx->abi->outputs);
3428 break;
3429 case nir_intrinsic_end_primitive:
3430 ctx->abi->emit_primitive(ctx->abi, nir_intrinsic_stream_id(instr));
3431 break;
3432 case nir_intrinsic_load_tess_coord:
3433 result = ctx->abi->load_tess_coord(ctx->abi);
3434 break;
3435 case nir_intrinsic_load_tess_level_outer:
3436 result = ctx->abi->load_tess_level(ctx->abi, VARYING_SLOT_TESS_LEVEL_OUTER);
3437 break;
3438 case nir_intrinsic_load_tess_level_inner:
3439 result = ctx->abi->load_tess_level(ctx->abi, VARYING_SLOT_TESS_LEVEL_INNER);
3440 break;
3441 case nir_intrinsic_load_patch_vertices_in:
3442 result = ctx->abi->load_patch_vertices_in(ctx->abi);
3443 break;
3444 case nir_intrinsic_vote_all: {
3445 LLVMValueRef tmp = ac_build_vote_all(&ctx->ac, get_src(ctx, instr->src[0]));
3446 result = LLVMBuildSExt(ctx->ac.builder, tmp, ctx->ac.i32, "");
3447 break;
3448 }
3449 case nir_intrinsic_vote_any: {
3450 LLVMValueRef tmp = ac_build_vote_any(&ctx->ac, get_src(ctx, instr->src[0]));
3451 result = LLVMBuildSExt(ctx->ac.builder, tmp, ctx->ac.i32, "");
3452 break;
3453 }
3454 case nir_intrinsic_shuffle:
3455 result = ac_build_shuffle(&ctx->ac, get_src(ctx, instr->src[0]),
3456 get_src(ctx, instr->src[1]));
3457 break;
3458 case nir_intrinsic_reduce:
3459 result = ac_build_reduce(&ctx->ac,
3460 get_src(ctx, instr->src[0]),
3461 instr->const_index[0],
3462 instr->const_index[1]);
3463 break;
3464 case nir_intrinsic_inclusive_scan:
3465 result = ac_build_inclusive_scan(&ctx->ac,
3466 get_src(ctx, instr->src[0]),
3467 instr->const_index[0]);
3468 break;
3469 case nir_intrinsic_exclusive_scan:
3470 result = ac_build_exclusive_scan(&ctx->ac,
3471 get_src(ctx, instr->src[0]),
3472 instr->const_index[0]);
3473 break;
3474 case nir_intrinsic_quad_broadcast: {
3475 unsigned lane = nir_src_as_uint(instr->src[1]);
3476 result = ac_build_quad_swizzle(&ctx->ac, get_src(ctx, instr->src[0]),
3477 lane, lane, lane, lane);
3478 break;
3479 }
3480 case nir_intrinsic_quad_swap_horizontal:
3481 result = ac_build_quad_swizzle(&ctx->ac, get_src(ctx, instr->src[0]), 1, 0, 3 ,2);
3482 break;
3483 case nir_intrinsic_quad_swap_vertical:
3484 result = ac_build_quad_swizzle(&ctx->ac, get_src(ctx, instr->src[0]), 2, 3, 0 ,1);
3485 break;
3486 case nir_intrinsic_quad_swap_diagonal:
3487 result = ac_build_quad_swizzle(&ctx->ac, get_src(ctx, instr->src[0]), 3, 2, 1 ,0);
3488 break;
3489 case nir_intrinsic_quad_swizzle_amd: {
3490 uint32_t mask = nir_intrinsic_swizzle_mask(instr);
3491 result = ac_build_quad_swizzle(&ctx->ac, get_src(ctx, instr->src[0]),
3492 mask & 0x3, (mask >> 2) & 0x3,
3493 (mask >> 4) & 0x3, (mask >> 6) & 0x3);
3494 break;
3495 }
3496 case nir_intrinsic_masked_swizzle_amd: {
3497 uint32_t mask = nir_intrinsic_swizzle_mask(instr);
3498 result = ac_build_ds_swizzle(&ctx->ac, get_src(ctx, instr->src[0]), mask);
3499 break;
3500 }
3501 case nir_intrinsic_write_invocation_amd:
3502 result = ac_build_writelane(&ctx->ac, get_src(ctx, instr->src[0]),
3503 get_src(ctx, instr->src[1]),
3504 get_src(ctx, instr->src[2]));
3505 break;
3506 case nir_intrinsic_mbcnt_amd:
3507 result = ac_build_mbcnt(&ctx->ac, get_src(ctx, instr->src[0]));
3508 break;
3509 default:
3510 fprintf(stderr, "Unknown intrinsic: ");
3511 nir_print_instr(&instr->instr, stderr);
3512 fprintf(stderr, "\n");
3513 break;
3514 }
3515 if (result) {
3516 ctx->ssa_defs[instr->dest.ssa.index] = result;
3517 }
3518 }
3519
3520 static LLVMValueRef get_bindless_index_from_uniform(struct ac_nir_context *ctx,
3521 unsigned base_index,
3522 unsigned constant_index,
3523 LLVMValueRef dynamic_index)
3524 {
3525 LLVMValueRef offset = LLVMConstInt(ctx->ac.i32, base_index * 4, 0);
3526 LLVMValueRef index = LLVMBuildAdd(ctx->ac.builder, dynamic_index,
3527 LLVMConstInt(ctx->ac.i32, constant_index, 0), "");
3528
3529 /* Bindless uniforms are 64bit so multiple index by 8 */
3530 index = LLVMBuildMul(ctx->ac.builder, index, LLVMConstInt(ctx->ac.i32, 8, 0), "");
3531 offset = LLVMBuildAdd(ctx->ac.builder, offset, index, "");
3532
3533 LLVMValueRef ubo_index = ctx->abi->load_ubo(ctx->abi, ctx->ac.i32_0);
3534
3535 LLVMValueRef ret = ac_build_buffer_load(&ctx->ac, ubo_index, 1, NULL, offset,
3536 NULL, 0, 0, true, true);
3537
3538 return LLVMBuildBitCast(ctx->ac.builder, ret, ctx->ac.i32, "");
3539 }
3540
3541 static LLVMValueRef get_sampler_desc(struct ac_nir_context *ctx,
3542 nir_deref_instr *deref_instr,
3543 enum ac_descriptor_type desc_type,
3544 const nir_instr *instr,
3545 bool image, bool write)
3546 {
3547 LLVMValueRef index = NULL;
3548 unsigned constant_index = 0;
3549 unsigned descriptor_set;
3550 unsigned base_index;
3551 bool bindless = false;
3552
3553 if (!deref_instr) {
3554 descriptor_set = 0;
3555 if (image) {
3556 nir_intrinsic_instr *img_instr = nir_instr_as_intrinsic(instr);
3557 base_index = 0;
3558 bindless = true;
3559 index = get_src(ctx, img_instr->src[0]);
3560 } else {
3561 nir_tex_instr *tex_instr = nir_instr_as_tex(instr);
3562 int sampSrcIdx = nir_tex_instr_src_index(tex_instr,
3563 nir_tex_src_sampler_handle);
3564 if (sampSrcIdx != -1) {
3565 base_index = 0;
3566 bindless = true;
3567 index = get_src(ctx, tex_instr->src[sampSrcIdx].src);
3568 } else {
3569 assert(tex_instr && !image);
3570 base_index = tex_instr->sampler_index;
3571 }
3572 }
3573 } else {
3574 while(deref_instr->deref_type != nir_deref_type_var) {
3575 if (deref_instr->deref_type == nir_deref_type_array) {
3576 unsigned array_size = glsl_get_aoa_size(deref_instr->type);
3577 if (!array_size)
3578 array_size = 1;
3579
3580 if (nir_src_is_const(deref_instr->arr.index)) {
3581 constant_index += array_size * nir_src_as_uint(deref_instr->arr.index);
3582 } else {
3583 LLVMValueRef indirect = get_src(ctx, deref_instr->arr.index);
3584
3585 indirect = LLVMBuildMul(ctx->ac.builder, indirect,
3586 LLVMConstInt(ctx->ac.i32, array_size, false), "");
3587
3588 if (!index)
3589 index = indirect;
3590 else
3591 index = LLVMBuildAdd(ctx->ac.builder, index, indirect, "");
3592 }
3593
3594 deref_instr = nir_src_as_deref(deref_instr->parent);
3595 } else if (deref_instr->deref_type == nir_deref_type_struct) {
3596 unsigned sidx = deref_instr->strct.index;
3597 deref_instr = nir_src_as_deref(deref_instr->parent);
3598 constant_index += glsl_get_struct_location_offset(deref_instr->type, sidx);
3599 } else {
3600 unreachable("Unsupported deref type");
3601 }
3602 }
3603 descriptor_set = deref_instr->var->data.descriptor_set;
3604
3605 if (deref_instr->var->data.bindless) {
3606 /* For now just assert on unhandled variable types */
3607 assert(deref_instr->var->data.mode == nir_var_uniform);
3608
3609 base_index = deref_instr->var->data.driver_location;
3610 bindless = true;
3611
3612 index = index ? index : ctx->ac.i32_0;
3613 index = get_bindless_index_from_uniform(ctx, base_index,
3614 constant_index, index);
3615 } else
3616 base_index = deref_instr->var->data.binding;
3617 }
3618
3619 return ctx->abi->load_sampler_desc(ctx->abi,
3620 descriptor_set,
3621 base_index,
3622 constant_index, index,
3623 desc_type, image, write, bindless);
3624 }
3625
3626 /* Disable anisotropic filtering if BASE_LEVEL == LAST_LEVEL.
3627 *
3628 * GFX6-GFX7:
3629 * If BASE_LEVEL == LAST_LEVEL, the shader must disable anisotropic
3630 * filtering manually. The driver sets img7 to a mask clearing
3631 * MAX_ANISO_RATIO if BASE_LEVEL == LAST_LEVEL. The shader must do:
3632 * s_and_b32 samp0, samp0, img7
3633 *
3634 * GFX8:
3635 * The ANISO_OVERRIDE sampler field enables this fix in TA.
3636 */
3637 static LLVMValueRef sici_fix_sampler_aniso(struct ac_nir_context *ctx,
3638 LLVMValueRef res, LLVMValueRef samp)
3639 {
3640 LLVMBuilderRef builder = ctx->ac.builder;
3641 LLVMValueRef img7, samp0;
3642
3643 if (ctx->ac.chip_class >= GFX8)
3644 return samp;
3645
3646 img7 = LLVMBuildExtractElement(builder, res,
3647 LLVMConstInt(ctx->ac.i32, 7, 0), "");
3648 samp0 = LLVMBuildExtractElement(builder, samp,
3649 LLVMConstInt(ctx->ac.i32, 0, 0), "");
3650 samp0 = LLVMBuildAnd(builder, samp0, img7, "");
3651 return LLVMBuildInsertElement(builder, samp, samp0,
3652 LLVMConstInt(ctx->ac.i32, 0, 0), "");
3653 }
3654
3655 static void tex_fetch_ptrs(struct ac_nir_context *ctx,
3656 nir_tex_instr *instr,
3657 LLVMValueRef *res_ptr, LLVMValueRef *samp_ptr,
3658 LLVMValueRef *fmask_ptr)
3659 {
3660 nir_deref_instr *texture_deref_instr = NULL;
3661 nir_deref_instr *sampler_deref_instr = NULL;
3662 int plane = -1;
3663
3664 for (unsigned i = 0; i < instr->num_srcs; i++) {
3665 switch (instr->src[i].src_type) {
3666 case nir_tex_src_texture_deref:
3667 texture_deref_instr = nir_src_as_deref(instr->src[i].src);
3668 break;
3669 case nir_tex_src_sampler_deref:
3670 sampler_deref_instr = nir_src_as_deref(instr->src[i].src);
3671 break;
3672 case nir_tex_src_plane:
3673 plane = nir_src_as_int(instr->src[i].src);
3674 break;
3675 default:
3676 break;
3677 }
3678 }
3679
3680 if (!sampler_deref_instr)
3681 sampler_deref_instr = texture_deref_instr;
3682
3683 enum ac_descriptor_type main_descriptor = instr->sampler_dim == GLSL_SAMPLER_DIM_BUF ? AC_DESC_BUFFER : AC_DESC_IMAGE;
3684
3685 if (plane >= 0) {
3686 assert(instr->op != nir_texop_txf_ms &&
3687 instr->op != nir_texop_samples_identical);
3688 assert(instr->sampler_dim != GLSL_SAMPLER_DIM_BUF);
3689
3690 main_descriptor = AC_DESC_PLANE_0 + plane;
3691 }
3692
3693 *res_ptr = get_sampler_desc(ctx, texture_deref_instr, main_descriptor, &instr->instr, false, false);
3694
3695 if (samp_ptr) {
3696 *samp_ptr = get_sampler_desc(ctx, sampler_deref_instr, AC_DESC_SAMPLER, &instr->instr, false, false);
3697 if (instr->sampler_dim < GLSL_SAMPLER_DIM_RECT)
3698 *samp_ptr = sici_fix_sampler_aniso(ctx, *res_ptr, *samp_ptr);
3699 }
3700 if (fmask_ptr && (instr->op == nir_texop_txf_ms ||
3701 instr->op == nir_texop_samples_identical))
3702 *fmask_ptr = get_sampler_desc(ctx, texture_deref_instr, AC_DESC_FMASK, &instr->instr, false, false);
3703 }
3704
3705 static LLVMValueRef apply_round_slice(struct ac_llvm_context *ctx,
3706 LLVMValueRef coord)
3707 {
3708 coord = ac_to_float(ctx, coord);
3709 coord = ac_build_round(ctx, coord);
3710 coord = ac_to_integer(ctx, coord);
3711 return coord;
3712 }
3713
3714 static void visit_tex(struct ac_nir_context *ctx, nir_tex_instr *instr)
3715 {
3716 LLVMValueRef result = NULL;
3717 struct ac_image_args args = { 0 };
3718 LLVMValueRef fmask_ptr = NULL, sample_index = NULL;
3719 LLVMValueRef ddx = NULL, ddy = NULL;
3720 unsigned offset_src = 0;
3721
3722 tex_fetch_ptrs(ctx, instr, &args.resource, &args.sampler, &fmask_ptr);
3723
3724 for (unsigned i = 0; i < instr->num_srcs; i++) {
3725 switch (instr->src[i].src_type) {
3726 case nir_tex_src_coord: {
3727 LLVMValueRef coord = get_src(ctx, instr->src[i].src);
3728 for (unsigned chan = 0; chan < instr->coord_components; ++chan)
3729 args.coords[chan] = ac_llvm_extract_elem(&ctx->ac, coord, chan);
3730 break;
3731 }
3732 case nir_tex_src_projector:
3733 break;
3734 case nir_tex_src_comparator:
3735 if (instr->is_shadow)
3736 args.compare = get_src(ctx, instr->src[i].src);
3737 break;
3738 case nir_tex_src_offset:
3739 args.offset = get_src(ctx, instr->src[i].src);
3740 offset_src = i;
3741 break;
3742 case nir_tex_src_bias:
3743 if (instr->op == nir_texop_txb)
3744 args.bias = get_src(ctx, instr->src[i].src);
3745 break;
3746 case nir_tex_src_lod: {
3747 if (nir_src_is_const(instr->src[i].src) && nir_src_as_uint(instr->src[i].src) == 0)
3748 args.level_zero = true;
3749 else
3750 args.lod = get_src(ctx, instr->src[i].src);
3751 break;
3752 }
3753 case nir_tex_src_ms_index:
3754 sample_index = get_src(ctx, instr->src[i].src);
3755 break;
3756 case nir_tex_src_ms_mcs:
3757 break;
3758 case nir_tex_src_ddx:
3759 ddx = get_src(ctx, instr->src[i].src);
3760 break;
3761 case nir_tex_src_ddy:
3762 ddy = get_src(ctx, instr->src[i].src);
3763 break;
3764 case nir_tex_src_texture_offset:
3765 case nir_tex_src_sampler_offset:
3766 case nir_tex_src_plane:
3767 default:
3768 break;
3769 }
3770 }
3771
3772 if (instr->op == nir_texop_txs && instr->sampler_dim == GLSL_SAMPLER_DIM_BUF) {
3773 result = get_buffer_size(ctx, args.resource, true);
3774 goto write_result;
3775 }
3776
3777 if (instr->op == nir_texop_texture_samples) {
3778 LLVMValueRef res, samples, is_msaa;
3779 res = LLVMBuildBitCast(ctx->ac.builder, args.resource, ctx->ac.v8i32, "");
3780 samples = LLVMBuildExtractElement(ctx->ac.builder, res,
3781 LLVMConstInt(ctx->ac.i32, 3, false), "");
3782 is_msaa = LLVMBuildLShr(ctx->ac.builder, samples,
3783 LLVMConstInt(ctx->ac.i32, 28, false), "");
3784 is_msaa = LLVMBuildAnd(ctx->ac.builder, is_msaa,
3785 LLVMConstInt(ctx->ac.i32, 0xe, false), "");
3786 is_msaa = LLVMBuildICmp(ctx->ac.builder, LLVMIntEQ, is_msaa,
3787 LLVMConstInt(ctx->ac.i32, 0xe, false), "");
3788
3789 samples = LLVMBuildLShr(ctx->ac.builder, samples,
3790 LLVMConstInt(ctx->ac.i32, 16, false), "");
3791 samples = LLVMBuildAnd(ctx->ac.builder, samples,
3792 LLVMConstInt(ctx->ac.i32, 0xf, false), "");
3793 samples = LLVMBuildShl(ctx->ac.builder, ctx->ac.i32_1,
3794 samples, "");
3795 samples = LLVMBuildSelect(ctx->ac.builder, is_msaa, samples,
3796 ctx->ac.i32_1, "");
3797 result = samples;
3798 goto write_result;
3799 }
3800
3801 if (args.offset && instr->op != nir_texop_txf && instr->op != nir_texop_txf_ms) {
3802 LLVMValueRef offset[3], pack;
3803 for (unsigned chan = 0; chan < 3; ++chan)
3804 offset[chan] = ctx->ac.i32_0;
3805
3806 unsigned num_components = ac_get_llvm_num_components(args.offset);
3807 for (unsigned chan = 0; chan < num_components; chan++) {
3808 offset[chan] = ac_llvm_extract_elem(&ctx->ac, args.offset, chan);
3809 offset[chan] = LLVMBuildAnd(ctx->ac.builder, offset[chan],
3810 LLVMConstInt(ctx->ac.i32, 0x3f, false), "");
3811 if (chan)
3812 offset[chan] = LLVMBuildShl(ctx->ac.builder, offset[chan],
3813 LLVMConstInt(ctx->ac.i32, chan * 8, false), "");
3814 }
3815 pack = LLVMBuildOr(ctx->ac.builder, offset[0], offset[1], "");
3816 pack = LLVMBuildOr(ctx->ac.builder, pack, offset[2], "");
3817 args.offset = pack;
3818 }
3819
3820 /* TC-compatible HTILE on radeonsi promotes Z16 and Z24 to Z32_FLOAT,
3821 * so the depth comparison value isn't clamped for Z16 and
3822 * Z24 anymore. Do it manually here for GFX8-9; GFX10 has an explicitly
3823 * clamped 32-bit float format.
3824 *
3825 * It's unnecessary if the original texture format was
3826 * Z32_FLOAT, but we don't know that here.
3827 */
3828 if (args.compare &&
3829 ctx->ac.chip_class >= GFX8 &&
3830 ctx->ac.chip_class <= GFX9 &&
3831 ctx->abi->clamp_shadow_reference)
3832 args.compare = ac_build_clamp(&ctx->ac, ac_to_float(&ctx->ac, args.compare));
3833
3834 /* pack derivatives */
3835 if (ddx || ddy) {
3836 int num_src_deriv_channels, num_dest_deriv_channels;
3837 switch (instr->sampler_dim) {
3838 case GLSL_SAMPLER_DIM_3D:
3839 case GLSL_SAMPLER_DIM_CUBE:
3840 num_src_deriv_channels = 3;
3841 num_dest_deriv_channels = 3;
3842 break;
3843 case GLSL_SAMPLER_DIM_2D:
3844 default:
3845 num_src_deriv_channels = 2;
3846 num_dest_deriv_channels = 2;
3847 break;
3848 case GLSL_SAMPLER_DIM_1D:
3849 num_src_deriv_channels = 1;
3850 if (ctx->ac.chip_class == GFX9) {
3851 num_dest_deriv_channels = 2;
3852 } else {
3853 num_dest_deriv_channels = 1;
3854 }
3855 break;
3856 }
3857
3858 for (unsigned i = 0; i < num_src_deriv_channels; i++) {
3859 args.derivs[i] = ac_to_float(&ctx->ac,
3860 ac_llvm_extract_elem(&ctx->ac, ddx, i));
3861 args.derivs[num_dest_deriv_channels + i] = ac_to_float(&ctx->ac,
3862 ac_llvm_extract_elem(&ctx->ac, ddy, i));
3863 }
3864 for (unsigned i = num_src_deriv_channels; i < num_dest_deriv_channels; i++) {
3865 args.derivs[i] = ctx->ac.f32_0;
3866 args.derivs[num_dest_deriv_channels + i] = ctx->ac.f32_0;
3867 }
3868 }
3869
3870 if (instr->sampler_dim == GLSL_SAMPLER_DIM_CUBE && args.coords[0]) {
3871 for (unsigned chan = 0; chan < instr->coord_components; chan++)
3872 args.coords[chan] = ac_to_float(&ctx->ac, args.coords[chan]);
3873 if (instr->coord_components == 3)
3874 args.coords[3] = LLVMGetUndef(ctx->ac.f32);
3875 ac_prepare_cube_coords(&ctx->ac,
3876 instr->op == nir_texop_txd, instr->is_array,
3877 instr->op == nir_texop_lod, args.coords, args.derivs);
3878 }
3879
3880 /* Texture coordinates fixups */
3881 if (instr->coord_components > 1 &&
3882 instr->sampler_dim == GLSL_SAMPLER_DIM_1D &&
3883 instr->is_array &&
3884 instr->op != nir_texop_txf) {
3885 args.coords[1] = apply_round_slice(&ctx->ac, args.coords[1]);
3886 }
3887
3888 if (instr->coord_components > 2 &&
3889 (instr->sampler_dim == GLSL_SAMPLER_DIM_2D ||
3890 instr->sampler_dim == GLSL_SAMPLER_DIM_MS ||
3891 instr->sampler_dim == GLSL_SAMPLER_DIM_SUBPASS ||
3892 instr->sampler_dim == GLSL_SAMPLER_DIM_SUBPASS_MS) &&
3893 instr->is_array &&
3894 instr->op != nir_texop_txf && instr->op != nir_texop_txf_ms) {
3895 args.coords[2] = apply_round_slice(&ctx->ac, args.coords[2]);
3896 }
3897
3898 if (ctx->ac.chip_class == GFX9 &&
3899 instr->sampler_dim == GLSL_SAMPLER_DIM_1D &&
3900 instr->op != nir_texop_lod) {
3901 LLVMValueRef filler;
3902 if (instr->op == nir_texop_txf)
3903 filler = ctx->ac.i32_0;
3904 else
3905 filler = LLVMConstReal(ctx->ac.f32, 0.5);
3906
3907 if (instr->is_array)
3908 args.coords[2] = args.coords[1];
3909 args.coords[1] = filler;
3910 }
3911
3912 /* Pack sample index */
3913 if (instr->op == nir_texop_txf_ms && sample_index)
3914 args.coords[instr->coord_components] = sample_index;
3915
3916 if (instr->op == nir_texop_samples_identical) {
3917 struct ac_image_args txf_args = { 0 };
3918 memcpy(txf_args.coords, args.coords, sizeof(txf_args.coords));
3919
3920 txf_args.dmask = 0xf;
3921 txf_args.resource = fmask_ptr;
3922 txf_args.dim = instr->is_array ? ac_image_2darray : ac_image_2d;
3923 result = build_tex_intrinsic(ctx, instr, &txf_args);
3924
3925 result = LLVMBuildExtractElement(ctx->ac.builder, result, ctx->ac.i32_0, "");
3926 result = emit_int_cmp(&ctx->ac, LLVMIntEQ, result, ctx->ac.i32_0);
3927 goto write_result;
3928 }
3929
3930 if ((instr->sampler_dim == GLSL_SAMPLER_DIM_SUBPASS_MS ||
3931 instr->sampler_dim == GLSL_SAMPLER_DIM_MS) &&
3932 instr->op != nir_texop_txs) {
3933 unsigned sample_chan = instr->is_array ? 3 : 2;
3934 args.coords[sample_chan] = adjust_sample_index_using_fmask(
3935 &ctx->ac, args.coords[0], args.coords[1],
3936 instr->is_array ? args.coords[2] : NULL,
3937 args.coords[sample_chan], fmask_ptr);
3938 }
3939
3940 if (args.offset && (instr->op == nir_texop_txf || instr->op == nir_texop_txf_ms)) {
3941 int num_offsets = instr->src[offset_src].src.ssa->num_components;
3942 num_offsets = MIN2(num_offsets, instr->coord_components);
3943 for (unsigned i = 0; i < num_offsets; ++i) {
3944 args.coords[i] = LLVMBuildAdd(
3945 ctx->ac.builder, args.coords[i],
3946 LLVMConstInt(ctx->ac.i32, nir_src_comp_as_uint(instr->src[offset_src].src, i), false), "");
3947 }
3948 args.offset = NULL;
3949 }
3950
3951 /* DMASK was repurposed for GATHER4. 4 components are always
3952 * returned and DMASK works like a swizzle - it selects
3953 * the component to fetch. The only valid DMASK values are
3954 * 1=red, 2=green, 4=blue, 8=alpha. (e.g. 1 returns
3955 * (red,red,red,red) etc.) The ISA document doesn't mention
3956 * this.
3957 */
3958 args.dmask = 0xf;
3959 if (instr->op == nir_texop_tg4) {
3960 if (instr->is_shadow)
3961 args.dmask = 1;
3962 else
3963 args.dmask = 1 << instr->component;
3964 }
3965
3966 if (instr->sampler_dim != GLSL_SAMPLER_DIM_BUF)
3967 args.dim = get_ac_sampler_dim(&ctx->ac, instr->sampler_dim, instr->is_array);
3968 result = build_tex_intrinsic(ctx, instr, &args);
3969
3970 if (instr->op == nir_texop_query_levels)
3971 result = LLVMBuildExtractElement(ctx->ac.builder, result, LLVMConstInt(ctx->ac.i32, 3, false), "");
3972 else if (instr->is_shadow && instr->is_new_style_shadow &&
3973 instr->op != nir_texop_txs && instr->op != nir_texop_lod &&
3974 instr->op != nir_texop_tg4)
3975 result = LLVMBuildExtractElement(ctx->ac.builder, result, ctx->ac.i32_0, "");
3976 else if (instr->op == nir_texop_txs &&
3977 instr->sampler_dim == GLSL_SAMPLER_DIM_CUBE &&
3978 instr->is_array) {
3979 LLVMValueRef two = LLVMConstInt(ctx->ac.i32, 2, false);
3980 LLVMValueRef six = LLVMConstInt(ctx->ac.i32, 6, false);
3981 LLVMValueRef z = LLVMBuildExtractElement(ctx->ac.builder, result, two, "");
3982 z = LLVMBuildSDiv(ctx->ac.builder, z, six, "");
3983 result = LLVMBuildInsertElement(ctx->ac.builder, result, z, two, "");
3984 } else if (ctx->ac.chip_class == GFX9 &&
3985 instr->op == nir_texop_txs &&
3986 instr->sampler_dim == GLSL_SAMPLER_DIM_1D &&
3987 instr->is_array) {
3988 LLVMValueRef two = LLVMConstInt(ctx->ac.i32, 2, false);
3989 LLVMValueRef layers = LLVMBuildExtractElement(ctx->ac.builder, result, two, "");
3990 result = LLVMBuildInsertElement(ctx->ac.builder, result, layers,
3991 ctx->ac.i32_1, "");
3992 } else if (instr->dest.ssa.num_components != 4)
3993 result = ac_trim_vector(&ctx->ac, result, instr->dest.ssa.num_components);
3994
3995 write_result:
3996 if (result) {
3997 assert(instr->dest.is_ssa);
3998 result = ac_to_integer(&ctx->ac, result);
3999 ctx->ssa_defs[instr->dest.ssa.index] = result;
4000 }
4001 }
4002
4003
4004 static void visit_phi(struct ac_nir_context *ctx, nir_phi_instr *instr)
4005 {
4006 LLVMTypeRef type = get_def_type(ctx, &instr->dest.ssa);
4007 LLVMValueRef result = LLVMBuildPhi(ctx->ac.builder, type, "");
4008
4009 ctx->ssa_defs[instr->dest.ssa.index] = result;
4010 _mesa_hash_table_insert(ctx->phis, instr, result);
4011 }
4012
4013 static void visit_post_phi(struct ac_nir_context *ctx,
4014 nir_phi_instr *instr,
4015 LLVMValueRef llvm_phi)
4016 {
4017 nir_foreach_phi_src(src, instr) {
4018 LLVMBasicBlockRef block = get_block(ctx, src->pred);
4019 LLVMValueRef llvm_src = get_src(ctx, src->src);
4020
4021 LLVMAddIncoming(llvm_phi, &llvm_src, &block, 1);
4022 }
4023 }
4024
4025 static void phi_post_pass(struct ac_nir_context *ctx)
4026 {
4027 hash_table_foreach(ctx->phis, entry) {
4028 visit_post_phi(ctx, (nir_phi_instr*)entry->key,
4029 (LLVMValueRef)entry->data);
4030 }
4031 }
4032
4033
4034 static void visit_ssa_undef(struct ac_nir_context *ctx,
4035 const nir_ssa_undef_instr *instr)
4036 {
4037 unsigned num_components = instr->def.num_components;
4038 LLVMTypeRef type = LLVMIntTypeInContext(ctx->ac.context, instr->def.bit_size);
4039 LLVMValueRef undef;
4040
4041 if (num_components == 1)
4042 undef = LLVMGetUndef(type);
4043 else {
4044 undef = LLVMGetUndef(LLVMVectorType(type, num_components));
4045 }
4046 ctx->ssa_defs[instr->def.index] = undef;
4047 }
4048
4049 static void visit_jump(struct ac_llvm_context *ctx,
4050 const nir_jump_instr *instr)
4051 {
4052 switch (instr->type) {
4053 case nir_jump_break:
4054 ac_build_break(ctx);
4055 break;
4056 case nir_jump_continue:
4057 ac_build_continue(ctx);
4058 break;
4059 default:
4060 fprintf(stderr, "Unknown NIR jump instr: ");
4061 nir_print_instr(&instr->instr, stderr);
4062 fprintf(stderr, "\n");
4063 abort();
4064 }
4065 }
4066
4067 static LLVMTypeRef
4068 glsl_base_to_llvm_type(struct ac_llvm_context *ac,
4069 enum glsl_base_type type)
4070 {
4071 switch (type) {
4072 case GLSL_TYPE_INT:
4073 case GLSL_TYPE_UINT:
4074 case GLSL_TYPE_BOOL:
4075 case GLSL_TYPE_SUBROUTINE:
4076 return ac->i32;
4077 case GLSL_TYPE_INT8:
4078 case GLSL_TYPE_UINT8:
4079 return ac->i8;
4080 case GLSL_TYPE_INT16:
4081 case GLSL_TYPE_UINT16:
4082 return ac->i16;
4083 case GLSL_TYPE_FLOAT:
4084 return ac->f32;
4085 case GLSL_TYPE_FLOAT16:
4086 return ac->f16;
4087 case GLSL_TYPE_INT64:
4088 case GLSL_TYPE_UINT64:
4089 return ac->i64;
4090 case GLSL_TYPE_DOUBLE:
4091 return ac->f64;
4092 default:
4093 unreachable("unknown GLSL type");
4094 }
4095 }
4096
4097 static LLVMTypeRef
4098 glsl_to_llvm_type(struct ac_llvm_context *ac,
4099 const struct glsl_type *type)
4100 {
4101 if (glsl_type_is_scalar(type)) {
4102 return glsl_base_to_llvm_type(ac, glsl_get_base_type(type));
4103 }
4104
4105 if (glsl_type_is_vector(type)) {
4106 return LLVMVectorType(
4107 glsl_base_to_llvm_type(ac, glsl_get_base_type(type)),
4108 glsl_get_vector_elements(type));
4109 }
4110
4111 if (glsl_type_is_matrix(type)) {
4112 return LLVMArrayType(
4113 glsl_to_llvm_type(ac, glsl_get_column_type(type)),
4114 glsl_get_matrix_columns(type));
4115 }
4116
4117 if (glsl_type_is_array(type)) {
4118 return LLVMArrayType(
4119 glsl_to_llvm_type(ac, glsl_get_array_element(type)),
4120 glsl_get_length(type));
4121 }
4122
4123 assert(glsl_type_is_struct_or_ifc(type));
4124
4125 LLVMTypeRef member_types[glsl_get_length(type)];
4126
4127 for (unsigned i = 0; i < glsl_get_length(type); i++) {
4128 member_types[i] =
4129 glsl_to_llvm_type(ac,
4130 glsl_get_struct_field(type, i));
4131 }
4132
4133 return LLVMStructTypeInContext(ac->context, member_types,
4134 glsl_get_length(type), false);
4135 }
4136
4137 static void visit_deref(struct ac_nir_context *ctx,
4138 nir_deref_instr *instr)
4139 {
4140 if (instr->mode != nir_var_mem_shared &&
4141 instr->mode != nir_var_mem_global)
4142 return;
4143
4144 LLVMValueRef result = NULL;
4145 switch(instr->deref_type) {
4146 case nir_deref_type_var: {
4147 struct hash_entry *entry = _mesa_hash_table_search(ctx->vars, instr->var);
4148 result = entry->data;
4149 break;
4150 }
4151 case nir_deref_type_struct:
4152 if (instr->mode == nir_var_mem_global) {
4153 nir_deref_instr *parent = nir_deref_instr_parent(instr);
4154 uint64_t offset = glsl_get_struct_field_offset(parent->type,
4155 instr->strct.index);
4156 result = ac_build_gep_ptr(&ctx->ac, get_src(ctx, instr->parent),
4157 LLVMConstInt(ctx->ac.i32, offset, 0));
4158 } else {
4159 result = ac_build_gep0(&ctx->ac, get_src(ctx, instr->parent),
4160 LLVMConstInt(ctx->ac.i32, instr->strct.index, 0));
4161 }
4162 break;
4163 case nir_deref_type_array:
4164 if (instr->mode == nir_var_mem_global) {
4165 nir_deref_instr *parent = nir_deref_instr_parent(instr);
4166 unsigned stride = glsl_get_explicit_stride(parent->type);
4167
4168 if ((glsl_type_is_matrix(parent->type) &&
4169 glsl_matrix_type_is_row_major(parent->type)) ||
4170 (glsl_type_is_vector(parent->type) && stride == 0))
4171 stride = type_scalar_size_bytes(parent->type);
4172
4173 assert(stride > 0);
4174 LLVMValueRef index = get_src(ctx, instr->arr.index);
4175 if (LLVMTypeOf(index) != ctx->ac.i64)
4176 index = LLVMBuildZExt(ctx->ac.builder, index, ctx->ac.i64, "");
4177
4178 LLVMValueRef offset = LLVMBuildMul(ctx->ac.builder, index, LLVMConstInt(ctx->ac.i64, stride, 0), "");
4179
4180 result = ac_build_gep_ptr(&ctx->ac, get_src(ctx, instr->parent), offset);
4181 } else {
4182 result = ac_build_gep0(&ctx->ac, get_src(ctx, instr->parent),
4183 get_src(ctx, instr->arr.index));
4184 }
4185 break;
4186 case nir_deref_type_ptr_as_array:
4187 if (instr->mode == nir_var_mem_global) {
4188 unsigned stride = nir_deref_instr_ptr_as_array_stride(instr);
4189
4190 LLVMValueRef index = get_src(ctx, instr->arr.index);
4191 if (LLVMTypeOf(index) != ctx->ac.i64)
4192 index = LLVMBuildZExt(ctx->ac.builder, index, ctx->ac.i64, "");
4193
4194 LLVMValueRef offset = LLVMBuildMul(ctx->ac.builder, index, LLVMConstInt(ctx->ac.i64, stride, 0), "");
4195
4196 result = ac_build_gep_ptr(&ctx->ac, get_src(ctx, instr->parent), offset);
4197 } else {
4198 result = ac_build_gep_ptr(&ctx->ac, get_src(ctx, instr->parent),
4199 get_src(ctx, instr->arr.index));
4200 }
4201 break;
4202 case nir_deref_type_cast: {
4203 result = get_src(ctx, instr->parent);
4204
4205 /* We can't use the structs from LLVM because the shader
4206 * specifies its own offsets. */
4207 LLVMTypeRef pointee_type = ctx->ac.i8;
4208 if (instr->mode == nir_var_mem_shared)
4209 pointee_type = glsl_to_llvm_type(&ctx->ac, instr->type);
4210
4211 unsigned address_space;
4212
4213 switch(instr->mode) {
4214 case nir_var_mem_shared:
4215 address_space = AC_ADDR_SPACE_LDS;
4216 break;
4217 case nir_var_mem_global:
4218 address_space = AC_ADDR_SPACE_GLOBAL;
4219 break;
4220 default:
4221 unreachable("Unhandled address space");
4222 }
4223
4224 LLVMTypeRef type = LLVMPointerType(pointee_type, address_space);
4225
4226 if (LLVMTypeOf(result) != type) {
4227 if (LLVMGetTypeKind(LLVMTypeOf(result)) == LLVMVectorTypeKind) {
4228 result = LLVMBuildBitCast(ctx->ac.builder, result,
4229 type, "");
4230 } else {
4231 result = LLVMBuildIntToPtr(ctx->ac.builder, result,
4232 type, "");
4233 }
4234 }
4235 break;
4236 }
4237 default:
4238 unreachable("Unhandled deref_instr deref type");
4239 }
4240
4241 ctx->ssa_defs[instr->dest.ssa.index] = result;
4242 }
4243
4244 static void visit_cf_list(struct ac_nir_context *ctx,
4245 struct exec_list *list);
4246
4247 static void visit_block(struct ac_nir_context *ctx, nir_block *block)
4248 {
4249 LLVMBasicBlockRef llvm_block = LLVMGetInsertBlock(ctx->ac.builder);
4250 nir_foreach_instr(instr, block)
4251 {
4252 switch (instr->type) {
4253 case nir_instr_type_alu:
4254 visit_alu(ctx, nir_instr_as_alu(instr));
4255 break;
4256 case nir_instr_type_load_const:
4257 visit_load_const(ctx, nir_instr_as_load_const(instr));
4258 break;
4259 case nir_instr_type_intrinsic:
4260 visit_intrinsic(ctx, nir_instr_as_intrinsic(instr));
4261 break;
4262 case nir_instr_type_tex:
4263 visit_tex(ctx, nir_instr_as_tex(instr));
4264 break;
4265 case nir_instr_type_phi:
4266 visit_phi(ctx, nir_instr_as_phi(instr));
4267 break;
4268 case nir_instr_type_ssa_undef:
4269 visit_ssa_undef(ctx, nir_instr_as_ssa_undef(instr));
4270 break;
4271 case nir_instr_type_jump:
4272 visit_jump(&ctx->ac, nir_instr_as_jump(instr));
4273 break;
4274 case nir_instr_type_deref:
4275 visit_deref(ctx, nir_instr_as_deref(instr));
4276 break;
4277 default:
4278 fprintf(stderr, "Unknown NIR instr type: ");
4279 nir_print_instr(instr, stderr);
4280 fprintf(stderr, "\n");
4281 abort();
4282 }
4283 }
4284
4285 _mesa_hash_table_insert(ctx->defs, block, llvm_block);
4286 }
4287
4288 static void visit_if(struct ac_nir_context *ctx, nir_if *if_stmt)
4289 {
4290 LLVMValueRef value = get_src(ctx, if_stmt->condition);
4291
4292 nir_block *then_block =
4293 (nir_block *) exec_list_get_head(&if_stmt->then_list);
4294
4295 ac_build_uif(&ctx->ac, value, then_block->index);
4296
4297 visit_cf_list(ctx, &if_stmt->then_list);
4298
4299 if (!exec_list_is_empty(&if_stmt->else_list)) {
4300 nir_block *else_block =
4301 (nir_block *) exec_list_get_head(&if_stmt->else_list);
4302
4303 ac_build_else(&ctx->ac, else_block->index);
4304 visit_cf_list(ctx, &if_stmt->else_list);
4305 }
4306
4307 ac_build_endif(&ctx->ac, then_block->index);
4308 }
4309
4310 static void visit_loop(struct ac_nir_context *ctx, nir_loop *loop)
4311 {
4312 nir_block *first_loop_block =
4313 (nir_block *) exec_list_get_head(&loop->body);
4314
4315 ac_build_bgnloop(&ctx->ac, first_loop_block->index);
4316
4317 visit_cf_list(ctx, &loop->body);
4318
4319 ac_build_endloop(&ctx->ac, first_loop_block->index);
4320 }
4321
4322 static void visit_cf_list(struct ac_nir_context *ctx,
4323 struct exec_list *list)
4324 {
4325 foreach_list_typed(nir_cf_node, node, node, list)
4326 {
4327 switch (node->type) {
4328 case nir_cf_node_block:
4329 visit_block(ctx, nir_cf_node_as_block(node));
4330 break;
4331
4332 case nir_cf_node_if:
4333 visit_if(ctx, nir_cf_node_as_if(node));
4334 break;
4335
4336 case nir_cf_node_loop:
4337 visit_loop(ctx, nir_cf_node_as_loop(node));
4338 break;
4339
4340 default:
4341 assert(0);
4342 }
4343 }
4344 }
4345
4346 void
4347 ac_handle_shader_output_decl(struct ac_llvm_context *ctx,
4348 struct ac_shader_abi *abi,
4349 struct nir_shader *nir,
4350 struct nir_variable *variable,
4351 gl_shader_stage stage)
4352 {
4353 unsigned output_loc = variable->data.driver_location / 4;
4354 unsigned attrib_count = glsl_count_attribute_slots(variable->type, false);
4355
4356 /* tess ctrl has it's own load/store paths for outputs */
4357 if (stage == MESA_SHADER_TESS_CTRL)
4358 return;
4359
4360 if (stage == MESA_SHADER_VERTEX ||
4361 stage == MESA_SHADER_TESS_EVAL ||
4362 stage == MESA_SHADER_GEOMETRY) {
4363 int idx = variable->data.location + variable->data.index;
4364 if (idx == VARYING_SLOT_CLIP_DIST0) {
4365 int length = nir->info.clip_distance_array_size +
4366 nir->info.cull_distance_array_size;
4367
4368 if (length > 4)
4369 attrib_count = 2;
4370 else
4371 attrib_count = 1;
4372 }
4373 }
4374
4375 bool is_16bit = glsl_type_is_16bit(glsl_without_array(variable->type));
4376 LLVMTypeRef type = is_16bit ? ctx->f16 : ctx->f32;
4377 for (unsigned i = 0; i < attrib_count; ++i) {
4378 for (unsigned chan = 0; chan < 4; chan++) {
4379 abi->outputs[ac_llvm_reg_index_soa(output_loc + i, chan)] =
4380 ac_build_alloca_undef(ctx, type, "");
4381 }
4382 }
4383 }
4384
4385 static void
4386 setup_locals(struct ac_nir_context *ctx,
4387 struct nir_function *func)
4388 {
4389 int i, j;
4390 ctx->num_locals = 0;
4391 nir_foreach_variable(variable, &func->impl->locals) {
4392 unsigned attrib_count = glsl_count_attribute_slots(variable->type, false);
4393 variable->data.driver_location = ctx->num_locals * 4;
4394 variable->data.location_frac = 0;
4395 ctx->num_locals += attrib_count;
4396 }
4397 ctx->locals = malloc(4 * ctx->num_locals * sizeof(LLVMValueRef));
4398 if (!ctx->locals)
4399 return;
4400
4401 for (i = 0; i < ctx->num_locals; i++) {
4402 for (j = 0; j < 4; j++) {
4403 ctx->locals[i * 4 + j] =
4404 ac_build_alloca_undef(&ctx->ac, ctx->ac.f32, "temp");
4405 }
4406 }
4407 }
4408
4409 static void
4410 setup_shared(struct ac_nir_context *ctx,
4411 struct nir_shader *nir)
4412 {
4413 nir_foreach_variable(variable, &nir->shared) {
4414 LLVMValueRef shared =
4415 LLVMAddGlobalInAddressSpace(
4416 ctx->ac.module, glsl_to_llvm_type(&ctx->ac, variable->type),
4417 variable->name ? variable->name : "",
4418 AC_ADDR_SPACE_LDS);
4419 _mesa_hash_table_insert(ctx->vars, variable, shared);
4420 }
4421 }
4422
4423 void ac_nir_translate(struct ac_llvm_context *ac, struct ac_shader_abi *abi,
4424 struct nir_shader *nir)
4425 {
4426 struct ac_nir_context ctx = {};
4427 struct nir_function *func;
4428
4429 ctx.ac = *ac;
4430 ctx.abi = abi;
4431
4432 ctx.stage = nir->info.stage;
4433 ctx.info = &nir->info;
4434
4435 ctx.main_function = LLVMGetBasicBlockParent(LLVMGetInsertBlock(ctx.ac.builder));
4436
4437 nir_foreach_variable(variable, &nir->outputs)
4438 ac_handle_shader_output_decl(&ctx.ac, ctx.abi, nir, variable,
4439 ctx.stage);
4440
4441 ctx.defs = _mesa_hash_table_create(NULL, _mesa_hash_pointer,
4442 _mesa_key_pointer_equal);
4443 ctx.phis = _mesa_hash_table_create(NULL, _mesa_hash_pointer,
4444 _mesa_key_pointer_equal);
4445 ctx.vars = _mesa_hash_table_create(NULL, _mesa_hash_pointer,
4446 _mesa_key_pointer_equal);
4447
4448 func = (struct nir_function *)exec_list_get_head(&nir->functions);
4449
4450 nir_index_ssa_defs(func->impl);
4451 ctx.ssa_defs = calloc(func->impl->ssa_alloc, sizeof(LLVMValueRef));
4452
4453 setup_locals(&ctx, func);
4454
4455 if (gl_shader_stage_is_compute(nir->info.stage))
4456 setup_shared(&ctx, nir);
4457
4458 visit_cf_list(&ctx, &func->impl->body);
4459 phi_post_pass(&ctx);
4460
4461 if (!gl_shader_stage_is_compute(nir->info.stage))
4462 ctx.abi->emit_outputs(ctx.abi, AC_LLVM_MAX_OUTPUTS,
4463 ctx.abi->outputs);
4464
4465 free(ctx.locals);
4466 free(ctx.ssa_defs);
4467 ralloc_free(ctx.defs);
4468 ralloc_free(ctx.phis);
4469 ralloc_free(ctx.vars);
4470 }
4471
4472 void
4473 ac_lower_indirect_derefs(struct nir_shader *nir, enum chip_class chip_class)
4474 {
4475 /* While it would be nice not to have this flag, we are constrained
4476 * by the reality that LLVM 9.0 has buggy VGPR indexing on GFX9.
4477 */
4478 bool llvm_has_working_vgpr_indexing = chip_class != GFX9;
4479
4480 /* TODO: Indirect indexing of GS inputs is unimplemented.
4481 *
4482 * TCS and TES load inputs directly from LDS or offchip memory, so
4483 * indirect indexing is trivial.
4484 */
4485 nir_variable_mode indirect_mask = 0;
4486 if (nir->info.stage == MESA_SHADER_GEOMETRY ||
4487 (nir->info.stage != MESA_SHADER_TESS_CTRL &&
4488 nir->info.stage != MESA_SHADER_TESS_EVAL &&
4489 !llvm_has_working_vgpr_indexing)) {
4490 indirect_mask |= nir_var_shader_in;
4491 }
4492 if (!llvm_has_working_vgpr_indexing &&
4493 nir->info.stage != MESA_SHADER_TESS_CTRL)
4494 indirect_mask |= nir_var_shader_out;
4495
4496 /* TODO: We shouldn't need to do this, however LLVM isn't currently
4497 * smart enough to handle indirects without causing excess spilling
4498 * causing the gpu to hang.
4499 *
4500 * See the following thread for more details of the problem:
4501 * https://lists.freedesktop.org/archives/mesa-dev/2017-July/162106.html
4502 */
4503 indirect_mask |= nir_var_function_temp;
4504
4505 nir_lower_indirect_derefs(nir, indirect_mask);
4506 }
4507
4508 static unsigned
4509 get_inst_tessfactor_writemask(nir_intrinsic_instr *intrin)
4510 {
4511 if (intrin->intrinsic != nir_intrinsic_store_deref)
4512 return 0;
4513
4514 nir_variable *var =
4515 nir_deref_instr_get_variable(nir_src_as_deref(intrin->src[0]));
4516
4517 if (var->data.mode != nir_var_shader_out)
4518 return 0;
4519
4520 unsigned writemask = 0;
4521 const int location = var->data.location;
4522 unsigned first_component = var->data.location_frac;
4523 unsigned num_comps = intrin->dest.ssa.num_components;
4524
4525 if (location == VARYING_SLOT_TESS_LEVEL_INNER)
4526 writemask = ((1 << (num_comps + 1)) - 1) << first_component;
4527 else if (location == VARYING_SLOT_TESS_LEVEL_OUTER)
4528 writemask = (((1 << (num_comps + 1)) - 1) << first_component) << 4;
4529
4530 return writemask;
4531 }
4532
4533 static void
4534 scan_tess_ctrl(nir_cf_node *cf_node, unsigned *upper_block_tf_writemask,
4535 unsigned *cond_block_tf_writemask,
4536 bool *tessfactors_are_def_in_all_invocs, bool is_nested_cf)
4537 {
4538 switch (cf_node->type) {
4539 case nir_cf_node_block: {
4540 nir_block *block = nir_cf_node_as_block(cf_node);
4541 nir_foreach_instr(instr, block) {
4542 if (instr->type != nir_instr_type_intrinsic)
4543 continue;
4544
4545 nir_intrinsic_instr *intrin = nir_instr_as_intrinsic(instr);
4546 if (intrin->intrinsic == nir_intrinsic_barrier) {
4547
4548 /* If we find a barrier in nested control flow put this in the
4549 * too hard basket. In GLSL this is not possible but it is in
4550 * SPIR-V.
4551 */
4552 if (is_nested_cf) {
4553 *tessfactors_are_def_in_all_invocs = false;
4554 return;
4555 }
4556
4557 /* The following case must be prevented:
4558 * gl_TessLevelInner = ...;
4559 * barrier();
4560 * if (gl_InvocationID == 1)
4561 * gl_TessLevelInner = ...;
4562 *
4563 * If you consider disjoint code segments separated by barriers, each
4564 * such segment that writes tess factor channels should write the same
4565 * channels in all codepaths within that segment.
4566 */
4567 if (upper_block_tf_writemask || cond_block_tf_writemask) {
4568 /* Accumulate the result: */
4569 *tessfactors_are_def_in_all_invocs &=
4570 !(*cond_block_tf_writemask & ~(*upper_block_tf_writemask));
4571
4572 /* Analyze the next code segment from scratch. */
4573 *upper_block_tf_writemask = 0;
4574 *cond_block_tf_writemask = 0;
4575 }
4576 } else
4577 *upper_block_tf_writemask |= get_inst_tessfactor_writemask(intrin);
4578 }
4579
4580 break;
4581 }
4582 case nir_cf_node_if: {
4583 unsigned then_tessfactor_writemask = 0;
4584 unsigned else_tessfactor_writemask = 0;
4585
4586 nir_if *if_stmt = nir_cf_node_as_if(cf_node);
4587 foreach_list_typed(nir_cf_node, nested_node, node, &if_stmt->then_list) {
4588 scan_tess_ctrl(nested_node, &then_tessfactor_writemask,
4589 cond_block_tf_writemask,
4590 tessfactors_are_def_in_all_invocs, true);
4591 }
4592
4593 foreach_list_typed(nir_cf_node, nested_node, node, &if_stmt->else_list) {
4594 scan_tess_ctrl(nested_node, &else_tessfactor_writemask,
4595 cond_block_tf_writemask,
4596 tessfactors_are_def_in_all_invocs, true);
4597 }
4598
4599 if (then_tessfactor_writemask || else_tessfactor_writemask) {
4600 /* If both statements write the same tess factor channels,
4601 * we can say that the upper block writes them too.
4602 */
4603 *upper_block_tf_writemask |= then_tessfactor_writemask &
4604 else_tessfactor_writemask;
4605 *cond_block_tf_writemask |= then_tessfactor_writemask |
4606 else_tessfactor_writemask;
4607 }
4608
4609 break;
4610 }
4611 case nir_cf_node_loop: {
4612 nir_loop *loop = nir_cf_node_as_loop(cf_node);
4613 foreach_list_typed(nir_cf_node, nested_node, node, &loop->body) {
4614 scan_tess_ctrl(nested_node, cond_block_tf_writemask,
4615 cond_block_tf_writemask,
4616 tessfactors_are_def_in_all_invocs, true);
4617 }
4618
4619 break;
4620 }
4621 default:
4622 unreachable("unknown cf node type");
4623 }
4624 }
4625
4626 bool
4627 ac_are_tessfactors_def_in_all_invocs(const struct nir_shader *nir)
4628 {
4629 assert(nir->info.stage == MESA_SHADER_TESS_CTRL);
4630
4631 /* The pass works as follows:
4632 * If all codepaths write tess factors, we can say that all
4633 * invocations define tess factors.
4634 *
4635 * Each tess factor channel is tracked separately.
4636 */
4637 unsigned main_block_tf_writemask = 0; /* if main block writes tess factors */
4638 unsigned cond_block_tf_writemask = 0; /* if cond block writes tess factors */
4639
4640 /* Initial value = true. Here the pass will accumulate results from
4641 * multiple segments surrounded by barriers. If tess factors aren't
4642 * written at all, it's a shader bug and we don't care if this will be
4643 * true.
4644 */
4645 bool tessfactors_are_def_in_all_invocs = true;
4646
4647 nir_foreach_function(function, nir) {
4648 if (function->impl) {
4649 foreach_list_typed(nir_cf_node, node, node, &function->impl->body) {
4650 scan_tess_ctrl(node, &main_block_tf_writemask,
4651 &cond_block_tf_writemask,
4652 &tessfactors_are_def_in_all_invocs,
4653 false);
4654 }
4655 }
4656 }
4657
4658 /* Accumulate the result for the last code segment separated by a
4659 * barrier.
4660 */
4661 if (main_block_tf_writemask || cond_block_tf_writemask) {
4662 tessfactors_are_def_in_all_invocs &=
4663 !(cond_block_tf_writemask & ~main_block_tf_writemask);
4664 }
4665
4666 return tessfactors_are_def_in_all_invocs;
4667 }