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radv/gfx10: enable 1D textures
[mesa.git] / src / amd / common / ac_nir_to_llvm.c
1 /*
2 * Copyright © 2016 Bas Nieuwenhuizen
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
21 * IN THE SOFTWARE.
22 */
23
24 #include "ac_nir_to_llvm.h"
25 #include "ac_llvm_build.h"
26 #include "ac_llvm_util.h"
27 #include "ac_binary.h"
28 #include "sid.h"
29 #include "nir/nir.h"
30 #include "nir/nir_deref.h"
31 #include "util/bitscan.h"
32 #include "util/u_math.h"
33 #include "ac_shader_abi.h"
34 #include "ac_shader_util.h"
35
36 struct ac_nir_context {
37 struct ac_llvm_context ac;
38 struct ac_shader_abi *abi;
39
40 gl_shader_stage stage;
41 shader_info *info;
42
43 LLVMValueRef *ssa_defs;
44
45 struct hash_table *defs;
46 struct hash_table *phis;
47 struct hash_table *vars;
48
49 LLVMValueRef main_function;
50 LLVMBasicBlockRef continue_block;
51 LLVMBasicBlockRef break_block;
52
53 int num_locals;
54 LLVMValueRef *locals;
55 };
56
57 static LLVMValueRef get_sampler_desc(struct ac_nir_context *ctx,
58 nir_deref_instr *deref_instr,
59 enum ac_descriptor_type desc_type,
60 const nir_instr *instr,
61 bool image, bool write);
62
63 static void
64 build_store_values_extended(struct ac_llvm_context *ac,
65 LLVMValueRef *values,
66 unsigned value_count,
67 unsigned value_stride,
68 LLVMValueRef vec)
69 {
70 LLVMBuilderRef builder = ac->builder;
71 unsigned i;
72
73 for (i = 0; i < value_count; i++) {
74 LLVMValueRef ptr = values[i * value_stride];
75 LLVMValueRef index = LLVMConstInt(ac->i32, i, false);
76 LLVMValueRef value = LLVMBuildExtractElement(builder, vec, index, "");
77 LLVMBuildStore(builder, value, ptr);
78 }
79 }
80
81 static enum ac_image_dim
82 get_ac_sampler_dim(const struct ac_llvm_context *ctx, enum glsl_sampler_dim dim,
83 bool is_array)
84 {
85 switch (dim) {
86 case GLSL_SAMPLER_DIM_1D:
87 if (ctx->chip_class == GFX9)
88 return is_array ? ac_image_2darray : ac_image_2d;
89 return is_array ? ac_image_1darray : ac_image_1d;
90 case GLSL_SAMPLER_DIM_2D:
91 case GLSL_SAMPLER_DIM_RECT:
92 case GLSL_SAMPLER_DIM_EXTERNAL:
93 return is_array ? ac_image_2darray : ac_image_2d;
94 case GLSL_SAMPLER_DIM_3D:
95 return ac_image_3d;
96 case GLSL_SAMPLER_DIM_CUBE:
97 return ac_image_cube;
98 case GLSL_SAMPLER_DIM_MS:
99 return is_array ? ac_image_2darraymsaa : ac_image_2dmsaa;
100 case GLSL_SAMPLER_DIM_SUBPASS:
101 return ac_image_2darray;
102 case GLSL_SAMPLER_DIM_SUBPASS_MS:
103 return ac_image_2darraymsaa;
104 default:
105 unreachable("bad sampler dim");
106 }
107 }
108
109 static enum ac_image_dim
110 get_ac_image_dim(const struct ac_llvm_context *ctx, enum glsl_sampler_dim sdim,
111 bool is_array)
112 {
113 enum ac_image_dim dim = get_ac_sampler_dim(ctx, sdim, is_array);
114
115 if (dim == ac_image_cube ||
116 (ctx->chip_class <= GFX8 && dim == ac_image_3d))
117 dim = ac_image_2darray;
118
119 return dim;
120 }
121
122 static LLVMTypeRef get_def_type(struct ac_nir_context *ctx,
123 const nir_ssa_def *def)
124 {
125 LLVMTypeRef type = LLVMIntTypeInContext(ctx->ac.context, def->bit_size);
126 if (def->num_components > 1) {
127 type = LLVMVectorType(type, def->num_components);
128 }
129 return type;
130 }
131
132 static LLVMValueRef get_src(struct ac_nir_context *nir, nir_src src)
133 {
134 assert(src.is_ssa);
135 return nir->ssa_defs[src.ssa->index];
136 }
137
138 static LLVMValueRef
139 get_memory_ptr(struct ac_nir_context *ctx, nir_src src)
140 {
141 LLVMValueRef ptr = get_src(ctx, src);
142 ptr = LLVMBuildGEP(ctx->ac.builder, ctx->ac.lds, &ptr, 1, "");
143 int addr_space = LLVMGetPointerAddressSpace(LLVMTypeOf(ptr));
144
145 return LLVMBuildBitCast(ctx->ac.builder, ptr,
146 LLVMPointerType(ctx->ac.i32, addr_space), "");
147 }
148
149 static LLVMBasicBlockRef get_block(struct ac_nir_context *nir,
150 const struct nir_block *b)
151 {
152 struct hash_entry *entry = _mesa_hash_table_search(nir->defs, b);
153 return (LLVMBasicBlockRef)entry->data;
154 }
155
156 static LLVMValueRef get_alu_src(struct ac_nir_context *ctx,
157 nir_alu_src src,
158 unsigned num_components)
159 {
160 LLVMValueRef value = get_src(ctx, src.src);
161 bool need_swizzle = false;
162
163 assert(value);
164 unsigned src_components = ac_get_llvm_num_components(value);
165 for (unsigned i = 0; i < num_components; ++i) {
166 assert(src.swizzle[i] < src_components);
167 if (src.swizzle[i] != i)
168 need_swizzle = true;
169 }
170
171 if (need_swizzle || num_components != src_components) {
172 LLVMValueRef masks[] = {
173 LLVMConstInt(ctx->ac.i32, src.swizzle[0], false),
174 LLVMConstInt(ctx->ac.i32, src.swizzle[1], false),
175 LLVMConstInt(ctx->ac.i32, src.swizzle[2], false),
176 LLVMConstInt(ctx->ac.i32, src.swizzle[3], false)};
177
178 if (src_components > 1 && num_components == 1) {
179 value = LLVMBuildExtractElement(ctx->ac.builder, value,
180 masks[0], "");
181 } else if (src_components == 1 && num_components > 1) {
182 LLVMValueRef values[] = {value, value, value, value};
183 value = ac_build_gather_values(&ctx->ac, values, num_components);
184 } else {
185 LLVMValueRef swizzle = LLVMConstVector(masks, num_components);
186 value = LLVMBuildShuffleVector(ctx->ac.builder, value, value,
187 swizzle, "");
188 }
189 }
190 assert(!src.negate);
191 assert(!src.abs);
192 return value;
193 }
194
195 static LLVMValueRef emit_int_cmp(struct ac_llvm_context *ctx,
196 LLVMIntPredicate pred, LLVMValueRef src0,
197 LLVMValueRef src1)
198 {
199 LLVMValueRef result = LLVMBuildICmp(ctx->builder, pred, src0, src1, "");
200 return LLVMBuildSelect(ctx->builder, result,
201 LLVMConstInt(ctx->i32, 0xFFFFFFFF, false),
202 ctx->i32_0, "");
203 }
204
205 static LLVMValueRef emit_float_cmp(struct ac_llvm_context *ctx,
206 LLVMRealPredicate pred, LLVMValueRef src0,
207 LLVMValueRef src1)
208 {
209 LLVMValueRef result;
210 src0 = ac_to_float(ctx, src0);
211 src1 = ac_to_float(ctx, src1);
212 result = LLVMBuildFCmp(ctx->builder, pred, src0, src1, "");
213 return LLVMBuildSelect(ctx->builder, result,
214 LLVMConstInt(ctx->i32, 0xFFFFFFFF, false),
215 ctx->i32_0, "");
216 }
217
218 static LLVMValueRef emit_intrin_1f_param(struct ac_llvm_context *ctx,
219 const char *intrin,
220 LLVMTypeRef result_type,
221 LLVMValueRef src0)
222 {
223 char name[64];
224 LLVMValueRef params[] = {
225 ac_to_float(ctx, src0),
226 };
227
228 MAYBE_UNUSED const int length = snprintf(name, sizeof(name), "%s.f%d", intrin,
229 ac_get_elem_bits(ctx, result_type));
230 assert(length < sizeof(name));
231 return ac_build_intrinsic(ctx, name, result_type, params, 1, AC_FUNC_ATTR_READNONE);
232 }
233
234 static LLVMValueRef emit_intrin_2f_param(struct ac_llvm_context *ctx,
235 const char *intrin,
236 LLVMTypeRef result_type,
237 LLVMValueRef src0, LLVMValueRef src1)
238 {
239 char name[64];
240 LLVMValueRef params[] = {
241 ac_to_float(ctx, src0),
242 ac_to_float(ctx, src1),
243 };
244
245 MAYBE_UNUSED const int length = snprintf(name, sizeof(name), "%s.f%d", intrin,
246 ac_get_elem_bits(ctx, result_type));
247 assert(length < sizeof(name));
248 return ac_build_intrinsic(ctx, name, result_type, params, 2, AC_FUNC_ATTR_READNONE);
249 }
250
251 static LLVMValueRef emit_intrin_3f_param(struct ac_llvm_context *ctx,
252 const char *intrin,
253 LLVMTypeRef result_type,
254 LLVMValueRef src0, LLVMValueRef src1, LLVMValueRef src2)
255 {
256 char name[64];
257 LLVMValueRef params[] = {
258 ac_to_float(ctx, src0),
259 ac_to_float(ctx, src1),
260 ac_to_float(ctx, src2),
261 };
262
263 MAYBE_UNUSED const int length = snprintf(name, sizeof(name), "%s.f%d", intrin,
264 ac_get_elem_bits(ctx, result_type));
265 assert(length < sizeof(name));
266 return ac_build_intrinsic(ctx, name, result_type, params, 3, AC_FUNC_ATTR_READNONE);
267 }
268
269 static LLVMValueRef emit_bcsel(struct ac_llvm_context *ctx,
270 LLVMValueRef src0, LLVMValueRef src1, LLVMValueRef src2)
271 {
272 assert(LLVMGetTypeKind(LLVMTypeOf(src0)) != LLVMVectorTypeKind);
273
274 LLVMValueRef v = LLVMBuildICmp(ctx->builder, LLVMIntNE, src0,
275 ctx->i32_0, "");
276 return LLVMBuildSelect(ctx->builder, v,
277 ac_to_integer_or_pointer(ctx, src1),
278 ac_to_integer_or_pointer(ctx, src2), "");
279 }
280
281 static LLVMValueRef emit_iabs(struct ac_llvm_context *ctx,
282 LLVMValueRef src0)
283 {
284 return ac_build_imax(ctx, src0, LLVMBuildNeg(ctx->builder, src0, ""));
285 }
286
287 static LLVMValueRef emit_uint_carry(struct ac_llvm_context *ctx,
288 const char *intrin,
289 LLVMValueRef src0, LLVMValueRef src1)
290 {
291 LLVMTypeRef ret_type;
292 LLVMTypeRef types[] = { ctx->i32, ctx->i1 };
293 LLVMValueRef res;
294 LLVMValueRef params[] = { src0, src1 };
295 ret_type = LLVMStructTypeInContext(ctx->context, types,
296 2, true);
297
298 res = ac_build_intrinsic(ctx, intrin, ret_type,
299 params, 2, AC_FUNC_ATTR_READNONE);
300
301 res = LLVMBuildExtractValue(ctx->builder, res, 1, "");
302 res = LLVMBuildZExt(ctx->builder, res, ctx->i32, "");
303 return res;
304 }
305
306 static LLVMValueRef emit_b2f(struct ac_llvm_context *ctx,
307 LLVMValueRef src0,
308 unsigned bitsize)
309 {
310 LLVMValueRef result = LLVMBuildAnd(ctx->builder, src0,
311 LLVMBuildBitCast(ctx->builder, LLVMConstReal(ctx->f32, 1.0), ctx->i32, ""),
312 "");
313 result = LLVMBuildBitCast(ctx->builder, result, ctx->f32, "");
314
315 switch (bitsize) {
316 case 16:
317 return LLVMBuildFPTrunc(ctx->builder, result, ctx->f16, "");
318 case 32:
319 return result;
320 case 64:
321 return LLVMBuildFPExt(ctx->builder, result, ctx->f64, "");
322 default:
323 unreachable("Unsupported bit size.");
324 }
325 }
326
327 static LLVMValueRef emit_f2b(struct ac_llvm_context *ctx,
328 LLVMValueRef src0)
329 {
330 src0 = ac_to_float(ctx, src0);
331 LLVMValueRef zero = LLVMConstNull(LLVMTypeOf(src0));
332 return LLVMBuildSExt(ctx->builder,
333 LLVMBuildFCmp(ctx->builder, LLVMRealUNE, src0, zero, ""),
334 ctx->i32, "");
335 }
336
337 static LLVMValueRef emit_b2i(struct ac_llvm_context *ctx,
338 LLVMValueRef src0,
339 unsigned bitsize)
340 {
341 LLVMValueRef result = LLVMBuildAnd(ctx->builder, src0, ctx->i32_1, "");
342
343 switch (bitsize) {
344 case 8:
345 return LLVMBuildTrunc(ctx->builder, result, ctx->i8, "");
346 case 16:
347 return LLVMBuildTrunc(ctx->builder, result, ctx->i16, "");
348 case 32:
349 return result;
350 case 64:
351 return LLVMBuildZExt(ctx->builder, result, ctx->i64, "");
352 default:
353 unreachable("Unsupported bit size.");
354 }
355 }
356
357 static LLVMValueRef emit_i2b(struct ac_llvm_context *ctx,
358 LLVMValueRef src0)
359 {
360 LLVMValueRef zero = LLVMConstNull(LLVMTypeOf(src0));
361 return LLVMBuildSExt(ctx->builder,
362 LLVMBuildICmp(ctx->builder, LLVMIntNE, src0, zero, ""),
363 ctx->i32, "");
364 }
365
366 static LLVMValueRef emit_f2f16(struct ac_llvm_context *ctx,
367 LLVMValueRef src0)
368 {
369 LLVMValueRef result;
370 LLVMValueRef cond = NULL;
371
372 src0 = ac_to_float(ctx, src0);
373 result = LLVMBuildFPTrunc(ctx->builder, src0, ctx->f16, "");
374
375 if (ctx->chip_class >= GFX8) {
376 LLVMValueRef args[2];
377 /* Check if the result is a denormal - and flush to 0 if so. */
378 args[0] = result;
379 args[1] = LLVMConstInt(ctx->i32, N_SUBNORMAL | P_SUBNORMAL, false);
380 cond = ac_build_intrinsic(ctx, "llvm.amdgcn.class.f16", ctx->i1, args, 2, AC_FUNC_ATTR_READNONE);
381 }
382
383 /* need to convert back up to f32 */
384 result = LLVMBuildFPExt(ctx->builder, result, ctx->f32, "");
385
386 if (ctx->chip_class >= GFX8)
387 result = LLVMBuildSelect(ctx->builder, cond, ctx->f32_0, result, "");
388 else {
389 /* for GFX6-GFX7 */
390 /* 0x38800000 is smallest half float value (2^-14) in 32-bit float,
391 * so compare the result and flush to 0 if it's smaller.
392 */
393 LLVMValueRef temp, cond2;
394 temp = emit_intrin_1f_param(ctx, "llvm.fabs", ctx->f32, result);
395 cond = LLVMBuildFCmp(ctx->builder, LLVMRealUGT,
396 LLVMBuildBitCast(ctx->builder, LLVMConstInt(ctx->i32, 0x38800000, false), ctx->f32, ""),
397 temp, "");
398 cond2 = LLVMBuildFCmp(ctx->builder, LLVMRealUNE,
399 temp, ctx->f32_0, "");
400 cond = LLVMBuildAnd(ctx->builder, cond, cond2, "");
401 result = LLVMBuildSelect(ctx->builder, cond, ctx->f32_0, result, "");
402 }
403 return result;
404 }
405
406 static LLVMValueRef emit_umul_high(struct ac_llvm_context *ctx,
407 LLVMValueRef src0, LLVMValueRef src1)
408 {
409 LLVMValueRef dst64, result;
410 src0 = LLVMBuildZExt(ctx->builder, src0, ctx->i64, "");
411 src1 = LLVMBuildZExt(ctx->builder, src1, ctx->i64, "");
412
413 dst64 = LLVMBuildMul(ctx->builder, src0, src1, "");
414 dst64 = LLVMBuildLShr(ctx->builder, dst64, LLVMConstInt(ctx->i64, 32, false), "");
415 result = LLVMBuildTrunc(ctx->builder, dst64, ctx->i32, "");
416 return result;
417 }
418
419 static LLVMValueRef emit_imul_high(struct ac_llvm_context *ctx,
420 LLVMValueRef src0, LLVMValueRef src1)
421 {
422 LLVMValueRef dst64, result;
423 src0 = LLVMBuildSExt(ctx->builder, src0, ctx->i64, "");
424 src1 = LLVMBuildSExt(ctx->builder, src1, ctx->i64, "");
425
426 dst64 = LLVMBuildMul(ctx->builder, src0, src1, "");
427 dst64 = LLVMBuildAShr(ctx->builder, dst64, LLVMConstInt(ctx->i64, 32, false), "");
428 result = LLVMBuildTrunc(ctx->builder, dst64, ctx->i32, "");
429 return result;
430 }
431
432 static LLVMValueRef emit_bfm(struct ac_llvm_context *ctx,
433 LLVMValueRef bits, LLVMValueRef offset)
434 {
435 /* mask = ((1 << bits) - 1) << offset */
436 return LLVMBuildShl(ctx->builder,
437 LLVMBuildSub(ctx->builder,
438 LLVMBuildShl(ctx->builder,
439 ctx->i32_1,
440 bits, ""),
441 ctx->i32_1, ""),
442 offset, "");
443 }
444
445 static LLVMValueRef emit_bitfield_select(struct ac_llvm_context *ctx,
446 LLVMValueRef mask, LLVMValueRef insert,
447 LLVMValueRef base)
448 {
449 /* Calculate:
450 * (mask & insert) | (~mask & base) = base ^ (mask & (insert ^ base))
451 * Use the right-hand side, which the LLVM backend can convert to V_BFI.
452 */
453 return LLVMBuildXor(ctx->builder, base,
454 LLVMBuildAnd(ctx->builder, mask,
455 LLVMBuildXor(ctx->builder, insert, base, ""), ""), "");
456 }
457
458 static LLVMValueRef emit_pack_half_2x16(struct ac_llvm_context *ctx,
459 LLVMValueRef src0)
460 {
461 LLVMValueRef comp[2];
462
463 src0 = ac_to_float(ctx, src0);
464 comp[0] = LLVMBuildExtractElement(ctx->builder, src0, ctx->i32_0, "");
465 comp[1] = LLVMBuildExtractElement(ctx->builder, src0, ctx->i32_1, "");
466
467 return LLVMBuildBitCast(ctx->builder, ac_build_cvt_pkrtz_f16(ctx, comp),
468 ctx->i32, "");
469 }
470
471 static LLVMValueRef emit_unpack_half_2x16(struct ac_llvm_context *ctx,
472 LLVMValueRef src0)
473 {
474 LLVMValueRef const16 = LLVMConstInt(ctx->i32, 16, false);
475 LLVMValueRef temps[2], val;
476 int i;
477
478 for (i = 0; i < 2; i++) {
479 val = i == 1 ? LLVMBuildLShr(ctx->builder, src0, const16, "") : src0;
480 val = LLVMBuildTrunc(ctx->builder, val, ctx->i16, "");
481 val = LLVMBuildBitCast(ctx->builder, val, ctx->f16, "");
482 temps[i] = LLVMBuildFPExt(ctx->builder, val, ctx->f32, "");
483 }
484 return ac_build_gather_values(ctx, temps, 2);
485 }
486
487 static LLVMValueRef emit_ddxy(struct ac_nir_context *ctx,
488 nir_op op,
489 LLVMValueRef src0)
490 {
491 unsigned mask;
492 int idx;
493 LLVMValueRef result;
494
495 if (op == nir_op_fddx_fine)
496 mask = AC_TID_MASK_LEFT;
497 else if (op == nir_op_fddy_fine)
498 mask = AC_TID_MASK_TOP;
499 else
500 mask = AC_TID_MASK_TOP_LEFT;
501
502 /* for DDX we want to next X pixel, DDY next Y pixel. */
503 if (op == nir_op_fddx_fine ||
504 op == nir_op_fddx_coarse ||
505 op == nir_op_fddx)
506 idx = 1;
507 else
508 idx = 2;
509
510 result = ac_build_ddxy(&ctx->ac, mask, idx, src0);
511 return result;
512 }
513
514 static void visit_alu(struct ac_nir_context *ctx, const nir_alu_instr *instr)
515 {
516 LLVMValueRef src[4], result = NULL;
517 unsigned num_components = instr->dest.dest.ssa.num_components;
518 unsigned src_components;
519 LLVMTypeRef def_type = get_def_type(ctx, &instr->dest.dest.ssa);
520
521 assert(nir_op_infos[instr->op].num_inputs <= ARRAY_SIZE(src));
522 switch (instr->op) {
523 case nir_op_vec2:
524 case nir_op_vec3:
525 case nir_op_vec4:
526 src_components = 1;
527 break;
528 case nir_op_pack_half_2x16:
529 src_components = 2;
530 break;
531 case nir_op_unpack_half_2x16:
532 src_components = 1;
533 break;
534 case nir_op_cube_face_coord:
535 case nir_op_cube_face_index:
536 src_components = 3;
537 break;
538 default:
539 src_components = num_components;
540 break;
541 }
542 for (unsigned i = 0; i < nir_op_infos[instr->op].num_inputs; i++)
543 src[i] = get_alu_src(ctx, instr->src[i], src_components);
544
545 switch (instr->op) {
546 case nir_op_mov:
547 result = src[0];
548 break;
549 case nir_op_fneg:
550 src[0] = ac_to_float(&ctx->ac, src[0]);
551 result = LLVMBuildFNeg(ctx->ac.builder, src[0], "");
552 break;
553 case nir_op_ineg:
554 result = LLVMBuildNeg(ctx->ac.builder, src[0], "");
555 break;
556 case nir_op_inot:
557 result = LLVMBuildNot(ctx->ac.builder, src[0], "");
558 break;
559 case nir_op_iadd:
560 result = LLVMBuildAdd(ctx->ac.builder, src[0], src[1], "");
561 break;
562 case nir_op_fadd:
563 src[0] = ac_to_float(&ctx->ac, src[0]);
564 src[1] = ac_to_float(&ctx->ac, src[1]);
565 result = LLVMBuildFAdd(ctx->ac.builder, src[0], src[1], "");
566 break;
567 case nir_op_fsub:
568 src[0] = ac_to_float(&ctx->ac, src[0]);
569 src[1] = ac_to_float(&ctx->ac, src[1]);
570 result = LLVMBuildFSub(ctx->ac.builder, src[0], src[1], "");
571 break;
572 case nir_op_isub:
573 result = LLVMBuildSub(ctx->ac.builder, src[0], src[1], "");
574 break;
575 case nir_op_imul:
576 result = LLVMBuildMul(ctx->ac.builder, src[0], src[1], "");
577 break;
578 case nir_op_imod:
579 result = LLVMBuildSRem(ctx->ac.builder, src[0], src[1], "");
580 break;
581 case nir_op_umod:
582 result = LLVMBuildURem(ctx->ac.builder, src[0], src[1], "");
583 break;
584 case nir_op_fmod:
585 src[0] = ac_to_float(&ctx->ac, src[0]);
586 src[1] = ac_to_float(&ctx->ac, src[1]);
587 result = ac_build_fdiv(&ctx->ac, src[0], src[1]);
588 result = emit_intrin_1f_param(&ctx->ac, "llvm.floor",
589 ac_to_float_type(&ctx->ac, def_type), result);
590 result = LLVMBuildFMul(ctx->ac.builder, src[1] , result, "");
591 result = LLVMBuildFSub(ctx->ac.builder, src[0], result, "");
592 break;
593 case nir_op_frem:
594 src[0] = ac_to_float(&ctx->ac, src[0]);
595 src[1] = ac_to_float(&ctx->ac, src[1]);
596 result = LLVMBuildFRem(ctx->ac.builder, src[0], src[1], "");
597 break;
598 case nir_op_irem:
599 result = LLVMBuildSRem(ctx->ac.builder, src[0], src[1], "");
600 break;
601 case nir_op_idiv:
602 result = LLVMBuildSDiv(ctx->ac.builder, src[0], src[1], "");
603 break;
604 case nir_op_udiv:
605 result = LLVMBuildUDiv(ctx->ac.builder, src[0], src[1], "");
606 break;
607 case nir_op_fmul:
608 src[0] = ac_to_float(&ctx->ac, src[0]);
609 src[1] = ac_to_float(&ctx->ac, src[1]);
610 result = LLVMBuildFMul(ctx->ac.builder, src[0], src[1], "");
611 break;
612 case nir_op_frcp:
613 src[0] = ac_to_float(&ctx->ac, src[0]);
614 result = ac_build_fdiv(&ctx->ac, LLVMConstReal(LLVMTypeOf(src[0]), 1.0), src[0]);
615 break;
616 case nir_op_iand:
617 result = LLVMBuildAnd(ctx->ac.builder, src[0], src[1], "");
618 break;
619 case nir_op_ior:
620 result = LLVMBuildOr(ctx->ac.builder, src[0], src[1], "");
621 break;
622 case nir_op_ixor:
623 result = LLVMBuildXor(ctx->ac.builder, src[0], src[1], "");
624 break;
625 case nir_op_ishl:
626 if (ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[1])) < ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[0])))
627 src[1] = LLVMBuildZExt(ctx->ac.builder, src[1],
628 LLVMTypeOf(src[0]), "");
629 else if (ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[1])) > ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[0])))
630 src[1] = LLVMBuildTrunc(ctx->ac.builder, src[1],
631 LLVMTypeOf(src[0]), "");
632 result = LLVMBuildShl(ctx->ac.builder, src[0], src[1], "");
633 break;
634 case nir_op_ishr:
635 if (ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[1])) < ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[0])))
636 src[1] = LLVMBuildZExt(ctx->ac.builder, src[1],
637 LLVMTypeOf(src[0]), "");
638 else if (ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[1])) > ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[0])))
639 src[1] = LLVMBuildTrunc(ctx->ac.builder, src[1],
640 LLVMTypeOf(src[0]), "");
641 result = LLVMBuildAShr(ctx->ac.builder, src[0], src[1], "");
642 break;
643 case nir_op_ushr:
644 if (ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[1])) < ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[0])))
645 src[1] = LLVMBuildZExt(ctx->ac.builder, src[1],
646 LLVMTypeOf(src[0]), "");
647 else if (ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[1])) > ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[0])))
648 src[1] = LLVMBuildTrunc(ctx->ac.builder, src[1],
649 LLVMTypeOf(src[0]), "");
650 result = LLVMBuildLShr(ctx->ac.builder, src[0], src[1], "");
651 break;
652 case nir_op_ilt32:
653 result = emit_int_cmp(&ctx->ac, LLVMIntSLT, src[0], src[1]);
654 break;
655 case nir_op_ine32:
656 result = emit_int_cmp(&ctx->ac, LLVMIntNE, src[0], src[1]);
657 break;
658 case nir_op_ieq32:
659 result = emit_int_cmp(&ctx->ac, LLVMIntEQ, src[0], src[1]);
660 break;
661 case nir_op_ige32:
662 result = emit_int_cmp(&ctx->ac, LLVMIntSGE, src[0], src[1]);
663 break;
664 case nir_op_ult32:
665 result = emit_int_cmp(&ctx->ac, LLVMIntULT, src[0], src[1]);
666 break;
667 case nir_op_uge32:
668 result = emit_int_cmp(&ctx->ac, LLVMIntUGE, src[0], src[1]);
669 break;
670 case nir_op_feq32:
671 result = emit_float_cmp(&ctx->ac, LLVMRealOEQ, src[0], src[1]);
672 break;
673 case nir_op_fne32:
674 result = emit_float_cmp(&ctx->ac, LLVMRealUNE, src[0], src[1]);
675 break;
676 case nir_op_flt32:
677 result = emit_float_cmp(&ctx->ac, LLVMRealOLT, src[0], src[1]);
678 break;
679 case nir_op_fge32:
680 result = emit_float_cmp(&ctx->ac, LLVMRealOGE, src[0], src[1]);
681 break;
682 case nir_op_fabs:
683 result = emit_intrin_1f_param(&ctx->ac, "llvm.fabs",
684 ac_to_float_type(&ctx->ac, def_type), src[0]);
685 break;
686 case nir_op_iabs:
687 result = emit_iabs(&ctx->ac, src[0]);
688 break;
689 case nir_op_imax:
690 result = ac_build_imax(&ctx->ac, src[0], src[1]);
691 break;
692 case nir_op_imin:
693 result = ac_build_imin(&ctx->ac, src[0], src[1]);
694 break;
695 case nir_op_umax:
696 result = ac_build_umax(&ctx->ac, src[0], src[1]);
697 break;
698 case nir_op_umin:
699 result = ac_build_umin(&ctx->ac, src[0], src[1]);
700 break;
701 case nir_op_isign:
702 result = ac_build_isign(&ctx->ac, src[0],
703 instr->dest.dest.ssa.bit_size);
704 break;
705 case nir_op_fsign:
706 src[0] = ac_to_float(&ctx->ac, src[0]);
707 result = ac_build_fsign(&ctx->ac, src[0],
708 instr->dest.dest.ssa.bit_size);
709 break;
710 case nir_op_ffloor:
711 result = emit_intrin_1f_param(&ctx->ac, "llvm.floor",
712 ac_to_float_type(&ctx->ac, def_type), src[0]);
713 break;
714 case nir_op_ftrunc:
715 result = emit_intrin_1f_param(&ctx->ac, "llvm.trunc",
716 ac_to_float_type(&ctx->ac, def_type), src[0]);
717 break;
718 case nir_op_fceil:
719 result = emit_intrin_1f_param(&ctx->ac, "llvm.ceil",
720 ac_to_float_type(&ctx->ac, def_type), src[0]);
721 break;
722 case nir_op_fround_even:
723 result = emit_intrin_1f_param(&ctx->ac, "llvm.rint",
724 ac_to_float_type(&ctx->ac, def_type),src[0]);
725 break;
726 case nir_op_ffract:
727 src[0] = ac_to_float(&ctx->ac, src[0]);
728 result = ac_build_fract(&ctx->ac, src[0],
729 instr->dest.dest.ssa.bit_size);
730 break;
731 case nir_op_fsin:
732 result = emit_intrin_1f_param(&ctx->ac, "llvm.sin",
733 ac_to_float_type(&ctx->ac, def_type), src[0]);
734 break;
735 case nir_op_fcos:
736 result = emit_intrin_1f_param(&ctx->ac, "llvm.cos",
737 ac_to_float_type(&ctx->ac, def_type), src[0]);
738 break;
739 case nir_op_fsqrt:
740 result = emit_intrin_1f_param(&ctx->ac, "llvm.sqrt",
741 ac_to_float_type(&ctx->ac, def_type), src[0]);
742 break;
743 case nir_op_fexp2:
744 result = emit_intrin_1f_param(&ctx->ac, "llvm.exp2",
745 ac_to_float_type(&ctx->ac, def_type), src[0]);
746 break;
747 case nir_op_flog2:
748 result = emit_intrin_1f_param(&ctx->ac, "llvm.log2",
749 ac_to_float_type(&ctx->ac, def_type), src[0]);
750 break;
751 case nir_op_frsq:
752 result = emit_intrin_1f_param(&ctx->ac, "llvm.sqrt",
753 ac_to_float_type(&ctx->ac, def_type), src[0]);
754 result = ac_build_fdiv(&ctx->ac, LLVMConstReal(LLVMTypeOf(result), 1.0), result);
755 break;
756 case nir_op_frexp_exp:
757 src[0] = ac_to_float(&ctx->ac, src[0]);
758 result = ac_build_frexp_exp(&ctx->ac, src[0],
759 ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[0])));
760 if (ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[0])) == 16)
761 result = LLVMBuildSExt(ctx->ac.builder, result,
762 ctx->ac.i32, "");
763 break;
764 case nir_op_frexp_sig:
765 src[0] = ac_to_float(&ctx->ac, src[0]);
766 result = ac_build_frexp_mant(&ctx->ac, src[0],
767 instr->dest.dest.ssa.bit_size);
768 break;
769 case nir_op_fpow:
770 result = emit_intrin_2f_param(&ctx->ac, "llvm.pow",
771 ac_to_float_type(&ctx->ac, def_type), src[0], src[1]);
772 break;
773 case nir_op_fmax:
774 result = emit_intrin_2f_param(&ctx->ac, "llvm.maxnum",
775 ac_to_float_type(&ctx->ac, def_type), src[0], src[1]);
776 if (ctx->ac.chip_class < GFX9 &&
777 instr->dest.dest.ssa.bit_size == 32) {
778 /* Only pre-GFX9 chips do not flush denorms. */
779 result = emit_intrin_1f_param(&ctx->ac, "llvm.canonicalize",
780 ac_to_float_type(&ctx->ac, def_type),
781 result);
782 }
783 break;
784 case nir_op_fmin:
785 result = emit_intrin_2f_param(&ctx->ac, "llvm.minnum",
786 ac_to_float_type(&ctx->ac, def_type), src[0], src[1]);
787 if (ctx->ac.chip_class < GFX9 &&
788 instr->dest.dest.ssa.bit_size == 32) {
789 /* Only pre-GFX9 chips do not flush denorms. */
790 result = emit_intrin_1f_param(&ctx->ac, "llvm.canonicalize",
791 ac_to_float_type(&ctx->ac, def_type),
792 result);
793 }
794 break;
795 case nir_op_ffma:
796 result = emit_intrin_3f_param(&ctx->ac, "llvm.fmuladd",
797 ac_to_float_type(&ctx->ac, def_type), src[0], src[1], src[2]);
798 break;
799 case nir_op_ldexp:
800 src[0] = ac_to_float(&ctx->ac, src[0]);
801 if (ac_get_elem_bits(&ctx->ac, def_type) == 32)
802 result = ac_build_intrinsic(&ctx->ac, "llvm.amdgcn.ldexp.f32", ctx->ac.f32, src, 2, AC_FUNC_ATTR_READNONE);
803 else if (ac_get_elem_bits(&ctx->ac, def_type) == 16)
804 result = ac_build_intrinsic(&ctx->ac, "llvm.amdgcn.ldexp.f16", ctx->ac.f16, src, 2, AC_FUNC_ATTR_READNONE);
805 else
806 result = ac_build_intrinsic(&ctx->ac, "llvm.amdgcn.ldexp.f64", ctx->ac.f64, src, 2, AC_FUNC_ATTR_READNONE);
807 break;
808 case nir_op_bfm:
809 result = emit_bfm(&ctx->ac, src[0], src[1]);
810 break;
811 case nir_op_bitfield_select:
812 result = emit_bitfield_select(&ctx->ac, src[0], src[1], src[2]);
813 break;
814 case nir_op_ubfe:
815 result = ac_build_bfe(&ctx->ac, src[0], src[1], src[2], false);
816 break;
817 case nir_op_ibfe:
818 result = ac_build_bfe(&ctx->ac, src[0], src[1], src[2], true);
819 break;
820 case nir_op_bitfield_reverse:
821 result = ac_build_bitfield_reverse(&ctx->ac, src[0]);
822 break;
823 case nir_op_bit_count:
824 result = ac_build_bit_count(&ctx->ac, src[0]);
825 break;
826 case nir_op_vec2:
827 case nir_op_vec3:
828 case nir_op_vec4:
829 for (unsigned i = 0; i < nir_op_infos[instr->op].num_inputs; i++)
830 src[i] = ac_to_integer(&ctx->ac, src[i]);
831 result = ac_build_gather_values(&ctx->ac, src, num_components);
832 break;
833 case nir_op_f2i8:
834 case nir_op_f2i16:
835 case nir_op_f2i32:
836 case nir_op_f2i64:
837 src[0] = ac_to_float(&ctx->ac, src[0]);
838 result = LLVMBuildFPToSI(ctx->ac.builder, src[0], def_type, "");
839 break;
840 case nir_op_f2u8:
841 case nir_op_f2u16:
842 case nir_op_f2u32:
843 case nir_op_f2u64:
844 src[0] = ac_to_float(&ctx->ac, src[0]);
845 result = LLVMBuildFPToUI(ctx->ac.builder, src[0], def_type, "");
846 break;
847 case nir_op_i2f16:
848 case nir_op_i2f32:
849 case nir_op_i2f64:
850 result = LLVMBuildSIToFP(ctx->ac.builder, src[0], ac_to_float_type(&ctx->ac, def_type), "");
851 break;
852 case nir_op_u2f16:
853 case nir_op_u2f32:
854 case nir_op_u2f64:
855 result = LLVMBuildUIToFP(ctx->ac.builder, src[0], ac_to_float_type(&ctx->ac, def_type), "");
856 break;
857 case nir_op_f2f16_rtz:
858 src[0] = ac_to_float(&ctx->ac, src[0]);
859 if (LLVMTypeOf(src[0]) == ctx->ac.f64)
860 src[0] = LLVMBuildFPTrunc(ctx->ac.builder, src[0], ctx->ac.f32, "");
861 LLVMValueRef param[2] = { src[0], ctx->ac.f32_0 };
862 result = ac_build_cvt_pkrtz_f16(&ctx->ac, param);
863 result = LLVMBuildExtractElement(ctx->ac.builder, result, ctx->ac.i32_0, "");
864 break;
865 case nir_op_f2f16_rtne:
866 case nir_op_f2f16:
867 case nir_op_f2f32:
868 case nir_op_f2f64:
869 src[0] = ac_to_float(&ctx->ac, src[0]);
870 if (ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[0])) < ac_get_elem_bits(&ctx->ac, def_type))
871 result = LLVMBuildFPExt(ctx->ac.builder, src[0], ac_to_float_type(&ctx->ac, def_type), "");
872 else
873 result = LLVMBuildFPTrunc(ctx->ac.builder, src[0], ac_to_float_type(&ctx->ac, def_type), "");
874 break;
875 case nir_op_u2u8:
876 case nir_op_u2u16:
877 case nir_op_u2u32:
878 case nir_op_u2u64:
879 if (ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[0])) < ac_get_elem_bits(&ctx->ac, def_type))
880 result = LLVMBuildZExt(ctx->ac.builder, src[0], def_type, "");
881 else
882 result = LLVMBuildTrunc(ctx->ac.builder, src[0], def_type, "");
883 break;
884 case nir_op_i2i8:
885 case nir_op_i2i16:
886 case nir_op_i2i32:
887 case nir_op_i2i64:
888 if (ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[0])) < ac_get_elem_bits(&ctx->ac, def_type))
889 result = LLVMBuildSExt(ctx->ac.builder, src[0], def_type, "");
890 else
891 result = LLVMBuildTrunc(ctx->ac.builder, src[0], def_type, "");
892 break;
893 case nir_op_b32csel:
894 result = emit_bcsel(&ctx->ac, src[0], src[1], src[2]);
895 break;
896 case nir_op_find_lsb:
897 result = ac_find_lsb(&ctx->ac, ctx->ac.i32, src[0]);
898 break;
899 case nir_op_ufind_msb:
900 result = ac_build_umsb(&ctx->ac, src[0], ctx->ac.i32);
901 break;
902 case nir_op_ifind_msb:
903 result = ac_build_imsb(&ctx->ac, src[0], ctx->ac.i32);
904 break;
905 case nir_op_uadd_carry:
906 result = emit_uint_carry(&ctx->ac, "llvm.uadd.with.overflow.i32", src[0], src[1]);
907 break;
908 case nir_op_usub_borrow:
909 result = emit_uint_carry(&ctx->ac, "llvm.usub.with.overflow.i32", src[0], src[1]);
910 break;
911 case nir_op_b2f16:
912 case nir_op_b2f32:
913 case nir_op_b2f64:
914 result = emit_b2f(&ctx->ac, src[0], instr->dest.dest.ssa.bit_size);
915 break;
916 case nir_op_f2b32:
917 result = emit_f2b(&ctx->ac, src[0]);
918 break;
919 case nir_op_b2i8:
920 case nir_op_b2i16:
921 case nir_op_b2i32:
922 case nir_op_b2i64:
923 result = emit_b2i(&ctx->ac, src[0], instr->dest.dest.ssa.bit_size);
924 break;
925 case nir_op_i2b32:
926 result = emit_i2b(&ctx->ac, src[0]);
927 break;
928 case nir_op_fquantize2f16:
929 result = emit_f2f16(&ctx->ac, src[0]);
930 break;
931 case nir_op_umul_high:
932 result = emit_umul_high(&ctx->ac, src[0], src[1]);
933 break;
934 case nir_op_imul_high:
935 result = emit_imul_high(&ctx->ac, src[0], src[1]);
936 break;
937 case nir_op_pack_half_2x16:
938 result = emit_pack_half_2x16(&ctx->ac, src[0]);
939 break;
940 case nir_op_unpack_half_2x16:
941 result = emit_unpack_half_2x16(&ctx->ac, src[0]);
942 break;
943 case nir_op_fddx:
944 case nir_op_fddy:
945 case nir_op_fddx_fine:
946 case nir_op_fddy_fine:
947 case nir_op_fddx_coarse:
948 case nir_op_fddy_coarse:
949 result = emit_ddxy(ctx, instr->op, src[0]);
950 break;
951
952 case nir_op_unpack_64_2x32_split_x: {
953 assert(ac_get_llvm_num_components(src[0]) == 1);
954 LLVMValueRef tmp = LLVMBuildBitCast(ctx->ac.builder, src[0],
955 ctx->ac.v2i32,
956 "");
957 result = LLVMBuildExtractElement(ctx->ac.builder, tmp,
958 ctx->ac.i32_0, "");
959 break;
960 }
961
962 case nir_op_unpack_64_2x32_split_y: {
963 assert(ac_get_llvm_num_components(src[0]) == 1);
964 LLVMValueRef tmp = LLVMBuildBitCast(ctx->ac.builder, src[0],
965 ctx->ac.v2i32,
966 "");
967 result = LLVMBuildExtractElement(ctx->ac.builder, tmp,
968 ctx->ac.i32_1, "");
969 break;
970 }
971
972 case nir_op_pack_64_2x32_split: {
973 LLVMValueRef tmp = ac_build_gather_values(&ctx->ac, src, 2);
974 result = LLVMBuildBitCast(ctx->ac.builder, tmp, ctx->ac.i64, "");
975 break;
976 }
977
978 case nir_op_pack_32_2x16_split: {
979 LLVMValueRef tmp = ac_build_gather_values(&ctx->ac, src, 2);
980 result = LLVMBuildBitCast(ctx->ac.builder, tmp, ctx->ac.i32, "");
981 break;
982 }
983
984 case nir_op_unpack_32_2x16_split_x: {
985 LLVMValueRef tmp = LLVMBuildBitCast(ctx->ac.builder, src[0],
986 ctx->ac.v2i16,
987 "");
988 result = LLVMBuildExtractElement(ctx->ac.builder, tmp,
989 ctx->ac.i32_0, "");
990 break;
991 }
992
993 case nir_op_unpack_32_2x16_split_y: {
994 LLVMValueRef tmp = LLVMBuildBitCast(ctx->ac.builder, src[0],
995 ctx->ac.v2i16,
996 "");
997 result = LLVMBuildExtractElement(ctx->ac.builder, tmp,
998 ctx->ac.i32_1, "");
999 break;
1000 }
1001
1002 case nir_op_cube_face_coord: {
1003 src[0] = ac_to_float(&ctx->ac, src[0]);
1004 LLVMValueRef results[2];
1005 LLVMValueRef in[3];
1006 for (unsigned chan = 0; chan < 3; chan++)
1007 in[chan] = ac_llvm_extract_elem(&ctx->ac, src[0], chan);
1008 results[0] = ac_build_intrinsic(&ctx->ac, "llvm.amdgcn.cubesc",
1009 ctx->ac.f32, in, 3, AC_FUNC_ATTR_READNONE);
1010 results[1] = ac_build_intrinsic(&ctx->ac, "llvm.amdgcn.cubetc",
1011 ctx->ac.f32, in, 3, AC_FUNC_ATTR_READNONE);
1012 LLVMValueRef ma = ac_build_intrinsic(&ctx->ac, "llvm.amdgcn.cubema",
1013 ctx->ac.f32, in, 3, AC_FUNC_ATTR_READNONE);
1014 results[0] = ac_build_fdiv(&ctx->ac, results[0], ma);
1015 results[1] = ac_build_fdiv(&ctx->ac, results[1], ma);
1016 LLVMValueRef offset = LLVMConstReal(ctx->ac.f32, 0.5);
1017 results[0] = LLVMBuildFAdd(ctx->ac.builder, results[0], offset, "");
1018 results[1] = LLVMBuildFAdd(ctx->ac.builder, results[1], offset, "");
1019 result = ac_build_gather_values(&ctx->ac, results, 2);
1020 break;
1021 }
1022
1023 case nir_op_cube_face_index: {
1024 src[0] = ac_to_float(&ctx->ac, src[0]);
1025 LLVMValueRef in[3];
1026 for (unsigned chan = 0; chan < 3; chan++)
1027 in[chan] = ac_llvm_extract_elem(&ctx->ac, src[0], chan);
1028 result = ac_build_intrinsic(&ctx->ac, "llvm.amdgcn.cubeid",
1029 ctx->ac.f32, in, 3, AC_FUNC_ATTR_READNONE);
1030 break;
1031 }
1032
1033 case nir_op_fmin3:
1034 result = emit_intrin_2f_param(&ctx->ac, "llvm.minnum",
1035 ac_to_float_type(&ctx->ac, def_type), src[0], src[1]);
1036 result = emit_intrin_2f_param(&ctx->ac, "llvm.minnum",
1037 ac_to_float_type(&ctx->ac, def_type), result, src[2]);
1038 break;
1039 case nir_op_umin3:
1040 result = ac_build_umin(&ctx->ac, src[0], src[1]);
1041 result = ac_build_umin(&ctx->ac, result, src[2]);
1042 break;
1043 case nir_op_imin3:
1044 result = ac_build_imin(&ctx->ac, src[0], src[1]);
1045 result = ac_build_imin(&ctx->ac, result, src[2]);
1046 break;
1047 case nir_op_fmax3:
1048 result = emit_intrin_2f_param(&ctx->ac, "llvm.maxnum",
1049 ac_to_float_type(&ctx->ac, def_type), src[0], src[1]);
1050 result = emit_intrin_2f_param(&ctx->ac, "llvm.maxnum",
1051 ac_to_float_type(&ctx->ac, def_type), result, src[2]);
1052 break;
1053 case nir_op_umax3:
1054 result = ac_build_umax(&ctx->ac, src[0], src[1]);
1055 result = ac_build_umax(&ctx->ac, result, src[2]);
1056 break;
1057 case nir_op_imax3:
1058 result = ac_build_imax(&ctx->ac, src[0], src[1]);
1059 result = ac_build_imax(&ctx->ac, result, src[2]);
1060 break;
1061 case nir_op_fmed3: {
1062 src[0] = ac_to_float(&ctx->ac, src[0]);
1063 src[1] = ac_to_float(&ctx->ac, src[1]);
1064 src[2] = ac_to_float(&ctx->ac, src[2]);
1065 result = ac_build_fmed3(&ctx->ac, src[0], src[1], src[2],
1066 instr->dest.dest.ssa.bit_size);
1067 break;
1068 }
1069 case nir_op_imed3: {
1070 LLVMValueRef tmp1 = ac_build_imin(&ctx->ac, src[0], src[1]);
1071 LLVMValueRef tmp2 = ac_build_imax(&ctx->ac, src[0], src[1]);
1072 tmp2 = ac_build_imin(&ctx->ac, tmp2, src[2]);
1073 result = ac_build_imax(&ctx->ac, tmp1, tmp2);
1074 break;
1075 }
1076 case nir_op_umed3: {
1077 LLVMValueRef tmp1 = ac_build_umin(&ctx->ac, src[0], src[1]);
1078 LLVMValueRef tmp2 = ac_build_umax(&ctx->ac, src[0], src[1]);
1079 tmp2 = ac_build_umin(&ctx->ac, tmp2, src[2]);
1080 result = ac_build_umax(&ctx->ac, tmp1, tmp2);
1081 break;
1082 }
1083
1084 default:
1085 fprintf(stderr, "Unknown NIR alu instr: ");
1086 nir_print_instr(&instr->instr, stderr);
1087 fprintf(stderr, "\n");
1088 abort();
1089 }
1090
1091 if (result) {
1092 assert(instr->dest.dest.is_ssa);
1093 result = ac_to_integer_or_pointer(&ctx->ac, result);
1094 ctx->ssa_defs[instr->dest.dest.ssa.index] = result;
1095 }
1096 }
1097
1098 static void visit_load_const(struct ac_nir_context *ctx,
1099 const nir_load_const_instr *instr)
1100 {
1101 LLVMValueRef values[4], value = NULL;
1102 LLVMTypeRef element_type =
1103 LLVMIntTypeInContext(ctx->ac.context, instr->def.bit_size);
1104
1105 for (unsigned i = 0; i < instr->def.num_components; ++i) {
1106 switch (instr->def.bit_size) {
1107 case 8:
1108 values[i] = LLVMConstInt(element_type,
1109 instr->value[i].u8, false);
1110 break;
1111 case 16:
1112 values[i] = LLVMConstInt(element_type,
1113 instr->value[i].u16, false);
1114 break;
1115 case 32:
1116 values[i] = LLVMConstInt(element_type,
1117 instr->value[i].u32, false);
1118 break;
1119 case 64:
1120 values[i] = LLVMConstInt(element_type,
1121 instr->value[i].u64, false);
1122 break;
1123 default:
1124 fprintf(stderr,
1125 "unsupported nir load_const bit_size: %d\n",
1126 instr->def.bit_size);
1127 abort();
1128 }
1129 }
1130 if (instr->def.num_components > 1) {
1131 value = LLVMConstVector(values, instr->def.num_components);
1132 } else
1133 value = values[0];
1134
1135 ctx->ssa_defs[instr->def.index] = value;
1136 }
1137
1138 static LLVMValueRef
1139 get_buffer_size(struct ac_nir_context *ctx, LLVMValueRef descriptor, bool in_elements)
1140 {
1141 LLVMValueRef size =
1142 LLVMBuildExtractElement(ctx->ac.builder, descriptor,
1143 LLVMConstInt(ctx->ac.i32, 2, false), "");
1144
1145 /* GFX8 only */
1146 if (ctx->ac.chip_class == GFX8 && in_elements) {
1147 /* On GFX8, the descriptor contains the size in bytes,
1148 * but TXQ must return the size in elements.
1149 * The stride is always non-zero for resources using TXQ.
1150 */
1151 LLVMValueRef stride =
1152 LLVMBuildExtractElement(ctx->ac.builder, descriptor,
1153 ctx->ac.i32_1, "");
1154 stride = LLVMBuildLShr(ctx->ac.builder, stride,
1155 LLVMConstInt(ctx->ac.i32, 16, false), "");
1156 stride = LLVMBuildAnd(ctx->ac.builder, stride,
1157 LLVMConstInt(ctx->ac.i32, 0x3fff, false), "");
1158
1159 size = LLVMBuildUDiv(ctx->ac.builder, size, stride, "");
1160 }
1161 return size;
1162 }
1163
1164 static LLVMValueRef lower_gather4_integer(struct ac_llvm_context *ctx,
1165 nir_variable *var,
1166 struct ac_image_args *args,
1167 const nir_tex_instr *instr)
1168 {
1169 const struct glsl_type *type = glsl_without_array(var->type);
1170 enum glsl_base_type stype = glsl_get_sampler_result_type(type);
1171 LLVMValueRef half_texel[2];
1172 LLVMValueRef compare_cube_wa = NULL;
1173 LLVMValueRef result;
1174
1175 //TODO Rect
1176 {
1177 struct ac_image_args txq_args = { 0 };
1178
1179 txq_args.dim = get_ac_sampler_dim(ctx, instr->sampler_dim, instr->is_array);
1180 txq_args.opcode = ac_image_get_resinfo;
1181 txq_args.dmask = 0xf;
1182 txq_args.lod = ctx->i32_0;
1183 txq_args.resource = args->resource;
1184 txq_args.attributes = AC_FUNC_ATTR_READNONE;
1185 LLVMValueRef size = ac_build_image_opcode(ctx, &txq_args);
1186
1187 for (unsigned c = 0; c < 2; c++) {
1188 half_texel[c] = LLVMBuildExtractElement(ctx->builder, size,
1189 LLVMConstInt(ctx->i32, c, false), "");
1190 half_texel[c] = LLVMBuildUIToFP(ctx->builder, half_texel[c], ctx->f32, "");
1191 half_texel[c] = ac_build_fdiv(ctx, ctx->f32_1, half_texel[c]);
1192 half_texel[c] = LLVMBuildFMul(ctx->builder, half_texel[c],
1193 LLVMConstReal(ctx->f32, -0.5), "");
1194 }
1195 }
1196
1197 LLVMValueRef orig_coords[2] = { args->coords[0], args->coords[1] };
1198
1199 for (unsigned c = 0; c < 2; c++) {
1200 LLVMValueRef tmp;
1201 tmp = LLVMBuildBitCast(ctx->builder, args->coords[c], ctx->f32, "");
1202 args->coords[c] = LLVMBuildFAdd(ctx->builder, tmp, half_texel[c], "");
1203 }
1204
1205 /*
1206 * Apparantly cube has issue with integer types that the workaround doesn't solve,
1207 * so this tests if the format is 8_8_8_8 and an integer type do an alternate
1208 * workaround by sampling using a scaled type and converting.
1209 * This is taken from amdgpu-pro shaders.
1210 */
1211 /* NOTE this produces some ugly code compared to amdgpu-pro,
1212 * LLVM ends up dumping SGPRs into VGPRs to deal with the compare/select,
1213 * and then reads them back. -pro generates two selects,
1214 * one s_cmp for the descriptor rewriting
1215 * one v_cmp for the coordinate and result changes.
1216 */
1217 if (instr->sampler_dim == GLSL_SAMPLER_DIM_CUBE) {
1218 LLVMValueRef tmp, tmp2;
1219
1220 /* workaround 8/8/8/8 uint/sint cube gather bug */
1221 /* first detect it then change to a scaled read and f2i */
1222 tmp = LLVMBuildExtractElement(ctx->builder, args->resource, ctx->i32_1, "");
1223 tmp2 = tmp;
1224
1225 /* extract the DATA_FORMAT */
1226 tmp = ac_build_bfe(ctx, tmp, LLVMConstInt(ctx->i32, 20, false),
1227 LLVMConstInt(ctx->i32, 6, false), false);
1228
1229 /* is the DATA_FORMAT == 8_8_8_8 */
1230 compare_cube_wa = LLVMBuildICmp(ctx->builder, LLVMIntEQ, tmp, LLVMConstInt(ctx->i32, V_008F14_IMG_DATA_FORMAT_8_8_8_8, false), "");
1231
1232 if (stype == GLSL_TYPE_UINT)
1233 /* Create a NUM FORMAT - 0x2 or 0x4 - USCALED or UINT */
1234 tmp = LLVMBuildSelect(ctx->builder, compare_cube_wa, LLVMConstInt(ctx->i32, 0x8000000, false),
1235 LLVMConstInt(ctx->i32, 0x10000000, false), "");
1236 else
1237 /* Create a NUM FORMAT - 0x3 or 0x5 - SSCALED or SINT */
1238 tmp = LLVMBuildSelect(ctx->builder, compare_cube_wa, LLVMConstInt(ctx->i32, 0xc000000, false),
1239 LLVMConstInt(ctx->i32, 0x14000000, false), "");
1240
1241 /* replace the NUM FORMAT in the descriptor */
1242 tmp2 = LLVMBuildAnd(ctx->builder, tmp2, LLVMConstInt(ctx->i32, C_008F14_NUM_FORMAT, false), "");
1243 tmp2 = LLVMBuildOr(ctx->builder, tmp2, tmp, "");
1244
1245 args->resource = LLVMBuildInsertElement(ctx->builder, args->resource, tmp2, ctx->i32_1, "");
1246
1247 /* don't modify the coordinates for this case */
1248 for (unsigned c = 0; c < 2; ++c)
1249 args->coords[c] = LLVMBuildSelect(
1250 ctx->builder, compare_cube_wa,
1251 orig_coords[c], args->coords[c], "");
1252 }
1253
1254 args->attributes = AC_FUNC_ATTR_READNONE;
1255 result = ac_build_image_opcode(ctx, args);
1256
1257 if (instr->sampler_dim == GLSL_SAMPLER_DIM_CUBE) {
1258 LLVMValueRef tmp, tmp2;
1259
1260 /* if the cube workaround is in place, f2i the result. */
1261 for (unsigned c = 0; c < 4; c++) {
1262 tmp = LLVMBuildExtractElement(ctx->builder, result, LLVMConstInt(ctx->i32, c, false), "");
1263 if (stype == GLSL_TYPE_UINT)
1264 tmp2 = LLVMBuildFPToUI(ctx->builder, tmp, ctx->i32, "");
1265 else
1266 tmp2 = LLVMBuildFPToSI(ctx->builder, tmp, ctx->i32, "");
1267 tmp = LLVMBuildBitCast(ctx->builder, tmp, ctx->i32, "");
1268 tmp2 = LLVMBuildBitCast(ctx->builder, tmp2, ctx->i32, "");
1269 tmp = LLVMBuildSelect(ctx->builder, compare_cube_wa, tmp2, tmp, "");
1270 tmp = LLVMBuildBitCast(ctx->builder, tmp, ctx->f32, "");
1271 result = LLVMBuildInsertElement(ctx->builder, result, tmp, LLVMConstInt(ctx->i32, c, false), "");
1272 }
1273 }
1274 return result;
1275 }
1276
1277 static nir_deref_instr *get_tex_texture_deref(const nir_tex_instr *instr)
1278 {
1279 nir_deref_instr *texture_deref_instr = NULL;
1280
1281 for (unsigned i = 0; i < instr->num_srcs; i++) {
1282 switch (instr->src[i].src_type) {
1283 case nir_tex_src_texture_deref:
1284 texture_deref_instr = nir_src_as_deref(instr->src[i].src);
1285 break;
1286 default:
1287 break;
1288 }
1289 }
1290 return texture_deref_instr;
1291 }
1292
1293 static LLVMValueRef build_tex_intrinsic(struct ac_nir_context *ctx,
1294 const nir_tex_instr *instr,
1295 struct ac_image_args *args)
1296 {
1297 if (instr->sampler_dim == GLSL_SAMPLER_DIM_BUF) {
1298 unsigned mask = nir_ssa_def_components_read(&instr->dest.ssa);
1299
1300 if (ctx->abi->gfx9_stride_size_workaround) {
1301 return ac_build_buffer_load_format_gfx9_safe(&ctx->ac,
1302 args->resource,
1303 args->coords[0],
1304 ctx->ac.i32_0,
1305 util_last_bit(mask),
1306 0, true);
1307 } else {
1308 return ac_build_buffer_load_format(&ctx->ac,
1309 args->resource,
1310 args->coords[0],
1311 ctx->ac.i32_0,
1312 util_last_bit(mask),
1313 0, true);
1314 }
1315 }
1316
1317 args->opcode = ac_image_sample;
1318
1319 switch (instr->op) {
1320 case nir_texop_txf:
1321 case nir_texop_txf_ms:
1322 case nir_texop_samples_identical:
1323 args->opcode = args->level_zero ||
1324 instr->sampler_dim == GLSL_SAMPLER_DIM_MS ?
1325 ac_image_load : ac_image_load_mip;
1326 args->level_zero = false;
1327 break;
1328 case nir_texop_txs:
1329 case nir_texop_query_levels:
1330 args->opcode = ac_image_get_resinfo;
1331 if (!args->lod)
1332 args->lod = ctx->ac.i32_0;
1333 args->level_zero = false;
1334 break;
1335 case nir_texop_tex:
1336 if (ctx->stage != MESA_SHADER_FRAGMENT) {
1337 assert(!args->lod);
1338 args->level_zero = true;
1339 }
1340 break;
1341 case nir_texop_tg4:
1342 args->opcode = ac_image_gather4;
1343 args->level_zero = true;
1344 break;
1345 case nir_texop_lod:
1346 args->opcode = ac_image_get_lod;
1347 break;
1348 default:
1349 break;
1350 }
1351
1352 if (instr->op == nir_texop_tg4 && ctx->ac.chip_class <= GFX8) {
1353 nir_deref_instr *texture_deref_instr = get_tex_texture_deref(instr);
1354 nir_variable *var = nir_deref_instr_get_variable(texture_deref_instr);
1355 const struct glsl_type *type = glsl_without_array(var->type);
1356 enum glsl_base_type stype = glsl_get_sampler_result_type(type);
1357 if (stype == GLSL_TYPE_UINT || stype == GLSL_TYPE_INT) {
1358 return lower_gather4_integer(&ctx->ac, var, args, instr);
1359 }
1360 }
1361
1362 /* Fixup for GFX9 which allocates 1D textures as 2D. */
1363 if (instr->op == nir_texop_lod && ctx->ac.chip_class == GFX9) {
1364 if ((args->dim == ac_image_2darray ||
1365 args->dim == ac_image_2d) && !args->coords[1]) {
1366 args->coords[1] = ctx->ac.i32_0;
1367 }
1368 }
1369
1370 args->attributes = AC_FUNC_ATTR_READNONE;
1371 bool cs_derivs = ctx->stage == MESA_SHADER_COMPUTE &&
1372 ctx->info->cs.derivative_group != DERIVATIVE_GROUP_NONE;
1373 if (ctx->stage == MESA_SHADER_FRAGMENT || cs_derivs) {
1374 /* Prevent texture instructions with implicit derivatives from being
1375 * sinked into branches. */
1376 switch (instr->op) {
1377 case nir_texop_tex:
1378 case nir_texop_txb:
1379 case nir_texop_lod:
1380 args->attributes |= AC_FUNC_ATTR_CONVERGENT;
1381 break;
1382 default:
1383 break;
1384 }
1385 }
1386
1387 return ac_build_image_opcode(&ctx->ac, args);
1388 }
1389
1390 static LLVMValueRef visit_vulkan_resource_reindex(struct ac_nir_context *ctx,
1391 nir_intrinsic_instr *instr)
1392 {
1393 LLVMValueRef ptr = get_src(ctx, instr->src[0]);
1394 LLVMValueRef index = get_src(ctx, instr->src[1]);
1395
1396 LLVMValueRef result = LLVMBuildGEP(ctx->ac.builder, ptr, &index, 1, "");
1397 LLVMSetMetadata(result, ctx->ac.uniform_md_kind, ctx->ac.empty_md);
1398 return result;
1399 }
1400
1401 static LLVMValueRef visit_load_push_constant(struct ac_nir_context *ctx,
1402 nir_intrinsic_instr *instr)
1403 {
1404 LLVMValueRef ptr, addr;
1405 LLVMValueRef src0 = get_src(ctx, instr->src[0]);
1406 unsigned index = nir_intrinsic_base(instr);
1407
1408 addr = LLVMConstInt(ctx->ac.i32, index, 0);
1409 addr = LLVMBuildAdd(ctx->ac.builder, addr, src0, "");
1410
1411 /* Load constant values from user SGPRS when possible, otherwise
1412 * fallback to the default path that loads directly from memory.
1413 */
1414 if (LLVMIsConstant(src0) &&
1415 instr->dest.ssa.bit_size == 32) {
1416 unsigned count = instr->dest.ssa.num_components;
1417 unsigned offset = index;
1418
1419 offset += LLVMConstIntGetZExtValue(src0);
1420 offset /= 4;
1421
1422 offset -= ctx->abi->base_inline_push_consts;
1423
1424 if (offset + count <= ctx->abi->num_inline_push_consts) {
1425 return ac_build_gather_values(&ctx->ac,
1426 ctx->abi->inline_push_consts + offset,
1427 count);
1428 }
1429 }
1430
1431 ptr = LLVMBuildGEP(ctx->ac.builder, ctx->abi->push_constants, &addr, 1, "");
1432
1433 if (instr->dest.ssa.bit_size == 8) {
1434 unsigned load_dwords = instr->dest.ssa.num_components > 1 ? 2 : 1;
1435 LLVMTypeRef vec_type = LLVMVectorType(LLVMInt8TypeInContext(ctx->ac.context), 4 * load_dwords);
1436 ptr = ac_cast_ptr(&ctx->ac, ptr, vec_type);
1437 LLVMValueRef res = LLVMBuildLoad(ctx->ac.builder, ptr, "");
1438
1439 LLVMValueRef params[3];
1440 if (load_dwords > 1) {
1441 LLVMValueRef res_vec = LLVMBuildBitCast(ctx->ac.builder, res, LLVMVectorType(ctx->ac.i32, 2), "");
1442 params[0] = LLVMBuildExtractElement(ctx->ac.builder, res_vec, LLVMConstInt(ctx->ac.i32, 1, false), "");
1443 params[1] = LLVMBuildExtractElement(ctx->ac.builder, res_vec, LLVMConstInt(ctx->ac.i32, 0, false), "");
1444 } else {
1445 res = LLVMBuildBitCast(ctx->ac.builder, res, ctx->ac.i32, "");
1446 params[0] = ctx->ac.i32_0;
1447 params[1] = res;
1448 }
1449 params[2] = addr;
1450 res = ac_build_intrinsic(&ctx->ac, "llvm.amdgcn.alignbyte", ctx->ac.i32, params, 3, 0);
1451
1452 res = LLVMBuildTrunc(ctx->ac.builder, res, LLVMIntTypeInContext(ctx->ac.context, instr->dest.ssa.num_components * 8), "");
1453 if (instr->dest.ssa.num_components > 1)
1454 res = LLVMBuildBitCast(ctx->ac.builder, res, LLVMVectorType(LLVMInt8TypeInContext(ctx->ac.context), instr->dest.ssa.num_components), "");
1455 return res;
1456 } else if (instr->dest.ssa.bit_size == 16) {
1457 unsigned load_dwords = instr->dest.ssa.num_components / 2 + 1;
1458 LLVMTypeRef vec_type = LLVMVectorType(LLVMInt16TypeInContext(ctx->ac.context), 2 * load_dwords);
1459 ptr = ac_cast_ptr(&ctx->ac, ptr, vec_type);
1460 LLVMValueRef res = LLVMBuildLoad(ctx->ac.builder, ptr, "");
1461 res = LLVMBuildBitCast(ctx->ac.builder, res, vec_type, "");
1462 LLVMValueRef cond = LLVMBuildLShr(ctx->ac.builder, addr, ctx->ac.i32_1, "");
1463 cond = LLVMBuildTrunc(ctx->ac.builder, cond, ctx->ac.i1, "");
1464 LLVMValueRef mask[] = { LLVMConstInt(ctx->ac.i32, 0, false), LLVMConstInt(ctx->ac.i32, 1, false),
1465 LLVMConstInt(ctx->ac.i32, 2, false), LLVMConstInt(ctx->ac.i32, 3, false),
1466 LLVMConstInt(ctx->ac.i32, 4, false)};
1467 LLVMValueRef swizzle_aligned = LLVMConstVector(&mask[0], instr->dest.ssa.num_components);
1468 LLVMValueRef swizzle_unaligned = LLVMConstVector(&mask[1], instr->dest.ssa.num_components);
1469 LLVMValueRef shuffle_aligned = LLVMBuildShuffleVector(ctx->ac.builder, res, res, swizzle_aligned, "");
1470 LLVMValueRef shuffle_unaligned = LLVMBuildShuffleVector(ctx->ac.builder, res, res, swizzle_unaligned, "");
1471 res = LLVMBuildSelect(ctx->ac.builder, cond, shuffle_unaligned, shuffle_aligned, "");
1472 return LLVMBuildBitCast(ctx->ac.builder, res, get_def_type(ctx, &instr->dest.ssa), "");
1473 }
1474
1475 ptr = ac_cast_ptr(&ctx->ac, ptr, get_def_type(ctx, &instr->dest.ssa));
1476
1477 return LLVMBuildLoad(ctx->ac.builder, ptr, "");
1478 }
1479
1480 static LLVMValueRef visit_get_buffer_size(struct ac_nir_context *ctx,
1481 const nir_intrinsic_instr *instr)
1482 {
1483 LLVMValueRef index = get_src(ctx, instr->src[0]);
1484
1485 return get_buffer_size(ctx, ctx->abi->load_ssbo(ctx->abi, index, false), false);
1486 }
1487
1488 static uint32_t widen_mask(uint32_t mask, unsigned multiplier)
1489 {
1490 uint32_t new_mask = 0;
1491 for(unsigned i = 0; i < 32 && (1u << i) <= mask; ++i)
1492 if (mask & (1u << i))
1493 new_mask |= ((1u << multiplier) - 1u) << (i * multiplier);
1494 return new_mask;
1495 }
1496
1497 static LLVMValueRef extract_vector_range(struct ac_llvm_context *ctx, LLVMValueRef src,
1498 unsigned start, unsigned count)
1499 {
1500 LLVMValueRef mask[] = {
1501 ctx->i32_0, ctx->i32_1,
1502 LLVMConstInt(ctx->i32, 2, false), LLVMConstInt(ctx->i32, 3, false) };
1503
1504 unsigned src_elements = ac_get_llvm_num_components(src);
1505
1506 if (count == src_elements) {
1507 assert(start == 0);
1508 return src;
1509 } else if (count == 1) {
1510 assert(start < src_elements);
1511 return LLVMBuildExtractElement(ctx->builder, src, mask[start], "");
1512 } else {
1513 assert(start + count <= src_elements);
1514 assert(count <= 4);
1515 LLVMValueRef swizzle = LLVMConstVector(&mask[start], count);
1516 return LLVMBuildShuffleVector(ctx->builder, src, src, swizzle, "");
1517 }
1518 }
1519
1520 static unsigned get_cache_policy(struct ac_nir_context *ctx,
1521 enum gl_access_qualifier access,
1522 bool may_store_unaligned,
1523 bool writeonly_memory)
1524 {
1525 unsigned cache_policy = 0;
1526
1527 /* GFX6 has a TC L1 bug causing corruption of 8bit/16bit stores. All
1528 * store opcodes not aligned to a dword are affected. The only way to
1529 * get unaligned stores is through shader images.
1530 */
1531 if (((may_store_unaligned && ctx->ac.chip_class == GFX6) ||
1532 /* If this is write-only, don't keep data in L1 to prevent
1533 * evicting L1 cache lines that may be needed by other
1534 * instructions.
1535 */
1536 writeonly_memory ||
1537 access & (ACCESS_COHERENT | ACCESS_VOLATILE))) {
1538 cache_policy |= ac_glc;
1539 }
1540
1541 return cache_policy;
1542 }
1543
1544 static void visit_store_ssbo(struct ac_nir_context *ctx,
1545 nir_intrinsic_instr *instr)
1546 {
1547 LLVMValueRef src_data = get_src(ctx, instr->src[0]);
1548 int elem_size_bytes = ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src_data)) / 8;
1549 unsigned writemask = nir_intrinsic_write_mask(instr);
1550 enum gl_access_qualifier access = nir_intrinsic_access(instr);
1551 bool writeonly_memory = access & ACCESS_NON_READABLE;
1552 unsigned cache_policy = get_cache_policy(ctx, access, false, writeonly_memory);
1553
1554 LLVMValueRef rsrc = ctx->abi->load_ssbo(ctx->abi,
1555 get_src(ctx, instr->src[1]), true);
1556 LLVMValueRef base_data = src_data;
1557 base_data = ac_trim_vector(&ctx->ac, base_data, instr->num_components);
1558 LLVMValueRef base_offset = get_src(ctx, instr->src[2]);
1559
1560 while (writemask) {
1561 int start, count;
1562 LLVMValueRef data, offset;
1563 LLVMTypeRef data_type;
1564
1565 u_bit_scan_consecutive_range(&writemask, &start, &count);
1566
1567 /* Due to an LLVM limitation with LLVM < 9, split 3-element
1568 * writes into a 2-element and a 1-element write. */
1569 if (count == 3 &&
1570 (elem_size_bytes != 4 || !ac_has_vec3_support(ctx->ac.chip_class, false))) {
1571 writemask |= 1 << (start + 2);
1572 count = 2;
1573 }
1574 int num_bytes = count * elem_size_bytes; /* count in bytes */
1575
1576 /* we can only store 4 DWords at the same time.
1577 * can only happen for 64 Bit vectors. */
1578 if (num_bytes > 16) {
1579 writemask |= ((1u << (count - 2)) - 1u) << (start + 2);
1580 count = 2;
1581 num_bytes = 16;
1582 }
1583
1584 /* check alignment of 16 Bit stores */
1585 if (elem_size_bytes == 2 && num_bytes > 2 && (start % 2) == 1) {
1586 writemask |= ((1u << (count - 1)) - 1u) << (start + 1);
1587 count = 1;
1588 num_bytes = 2;
1589 }
1590 data = extract_vector_range(&ctx->ac, base_data, start, count);
1591
1592 offset = LLVMBuildAdd(ctx->ac.builder, base_offset,
1593 LLVMConstInt(ctx->ac.i32, start * elem_size_bytes, false), "");
1594
1595 if (num_bytes == 1) {
1596 ac_build_tbuffer_store_byte(&ctx->ac, rsrc, data,
1597 offset, ctx->ac.i32_0,
1598 cache_policy);
1599 } else if (num_bytes == 2) {
1600 ac_build_tbuffer_store_short(&ctx->ac, rsrc, data,
1601 offset, ctx->ac.i32_0,
1602 cache_policy);
1603 } else {
1604 int num_channels = num_bytes / 4;
1605
1606 switch (num_bytes) {
1607 case 16: /* v4f32 */
1608 data_type = ctx->ac.v4f32;
1609 break;
1610 case 12: /* v3f32 */
1611 data_type = ctx->ac.v3f32;
1612 break;
1613 case 8: /* v2f32 */
1614 data_type = ctx->ac.v2f32;
1615 break;
1616 case 4: /* f32 */
1617 data_type = ctx->ac.f32;
1618 break;
1619 default:
1620 unreachable("Malformed vector store.");
1621 }
1622 data = LLVMBuildBitCast(ctx->ac.builder, data, data_type, "");
1623
1624 ac_build_buffer_store_dword(&ctx->ac, rsrc, data,
1625 num_channels, offset,
1626 ctx->ac.i32_0, 0,
1627 cache_policy, false);
1628 }
1629 }
1630 }
1631
1632 static LLVMValueRef visit_atomic_ssbo(struct ac_nir_context *ctx,
1633 const nir_intrinsic_instr *instr)
1634 {
1635 LLVMTypeRef return_type = LLVMTypeOf(get_src(ctx, instr->src[2]));
1636 const char *op;
1637 char name[64], type[8];
1638 LLVMValueRef params[6];
1639 int arg_count = 0;
1640
1641 switch (instr->intrinsic) {
1642 case nir_intrinsic_ssbo_atomic_add:
1643 op = "add";
1644 break;
1645 case nir_intrinsic_ssbo_atomic_imin:
1646 op = "smin";
1647 break;
1648 case nir_intrinsic_ssbo_atomic_umin:
1649 op = "umin";
1650 break;
1651 case nir_intrinsic_ssbo_atomic_imax:
1652 op = "smax";
1653 break;
1654 case nir_intrinsic_ssbo_atomic_umax:
1655 op = "umax";
1656 break;
1657 case nir_intrinsic_ssbo_atomic_and:
1658 op = "and";
1659 break;
1660 case nir_intrinsic_ssbo_atomic_or:
1661 op = "or";
1662 break;
1663 case nir_intrinsic_ssbo_atomic_xor:
1664 op = "xor";
1665 break;
1666 case nir_intrinsic_ssbo_atomic_exchange:
1667 op = "swap";
1668 break;
1669 case nir_intrinsic_ssbo_atomic_comp_swap:
1670 op = "cmpswap";
1671 break;
1672 default:
1673 abort();
1674 }
1675
1676 if (instr->intrinsic == nir_intrinsic_ssbo_atomic_comp_swap) {
1677 params[arg_count++] = ac_llvm_extract_elem(&ctx->ac, get_src(ctx, instr->src[3]), 0);
1678 }
1679 params[arg_count++] = ac_llvm_extract_elem(&ctx->ac, get_src(ctx, instr->src[2]), 0);
1680 params[arg_count++] = ctx->abi->load_ssbo(ctx->abi,
1681 get_src(ctx, instr->src[0]),
1682 true);
1683
1684 if (HAVE_LLVM >= 0x900) {
1685 /* XXX: The new raw/struct atomic intrinsics are buggy with
1686 * LLVM 8, see r358579.
1687 */
1688 params[arg_count++] = get_src(ctx, instr->src[1]); /* voffset */
1689 params[arg_count++] = ctx->ac.i32_0; /* soffset */
1690 params[arg_count++] = ctx->ac.i32_0; /* slc */
1691
1692 ac_build_type_name_for_intr(return_type, type, sizeof(type));
1693 snprintf(name, sizeof(name),
1694 "llvm.amdgcn.raw.buffer.atomic.%s.%s", op, type);
1695 } else {
1696 params[arg_count++] = ctx->ac.i32_0; /* vindex */
1697 params[arg_count++] = get_src(ctx, instr->src[1]); /* voffset */
1698 params[arg_count++] = ctx->ac.i1false; /* slc */
1699
1700 assert(return_type == ctx->ac.i32);
1701 snprintf(name, sizeof(name),
1702 "llvm.amdgcn.buffer.atomic.%s", op);
1703 }
1704
1705 return ac_build_intrinsic(&ctx->ac, name, return_type, params,
1706 arg_count, 0);
1707 }
1708
1709 static LLVMValueRef visit_load_buffer(struct ac_nir_context *ctx,
1710 const nir_intrinsic_instr *instr)
1711 {
1712 int elem_size_bytes = instr->dest.ssa.bit_size / 8;
1713 int num_components = instr->num_components;
1714 enum gl_access_qualifier access = nir_intrinsic_access(instr);
1715 unsigned cache_policy = get_cache_policy(ctx, access, false, false);
1716
1717 LLVMValueRef offset = get_src(ctx, instr->src[1]);
1718 LLVMValueRef rsrc = ctx->abi->load_ssbo(ctx->abi,
1719 get_src(ctx, instr->src[0]), false);
1720 LLVMValueRef vindex = ctx->ac.i32_0;
1721
1722 LLVMTypeRef def_type = get_def_type(ctx, &instr->dest.ssa);
1723 LLVMTypeRef def_elem_type = num_components > 1 ? LLVMGetElementType(def_type) : def_type;
1724
1725 LLVMValueRef results[4];
1726 for (int i = 0; i < num_components;) {
1727 int num_elems = num_components - i;
1728 if (elem_size_bytes < 4 && nir_intrinsic_align(instr) % 4 != 0)
1729 num_elems = 1;
1730 if (num_elems * elem_size_bytes > 16)
1731 num_elems = 16 / elem_size_bytes;
1732 int load_bytes = num_elems * elem_size_bytes;
1733
1734 LLVMValueRef immoffset = LLVMConstInt(ctx->ac.i32, i * elem_size_bytes, false);
1735
1736 LLVMValueRef ret;
1737
1738 if (load_bytes == 1) {
1739 ret = ac_build_tbuffer_load_byte(&ctx->ac,
1740 rsrc,
1741 offset,
1742 ctx->ac.i32_0,
1743 immoffset,
1744 cache_policy);
1745 } else if (load_bytes == 2) {
1746 ret = ac_build_tbuffer_load_short(&ctx->ac,
1747 rsrc,
1748 offset,
1749 ctx->ac.i32_0,
1750 immoffset,
1751 cache_policy);
1752 } else {
1753 int num_channels = util_next_power_of_two(load_bytes) / 4;
1754 bool can_speculate = access & ACCESS_CAN_REORDER;
1755
1756 ret = ac_build_buffer_load(&ctx->ac, rsrc, num_channels,
1757 vindex, offset, immoffset, 0,
1758 cache_policy, can_speculate, false);
1759 }
1760
1761 LLVMTypeRef byte_vec = LLVMVectorType(ctx->ac.i8, ac_get_type_size(LLVMTypeOf(ret)));
1762 ret = LLVMBuildBitCast(ctx->ac.builder, ret, byte_vec, "");
1763 ret = ac_trim_vector(&ctx->ac, ret, load_bytes);
1764
1765 LLVMTypeRef ret_type = LLVMVectorType(def_elem_type, num_elems);
1766 ret = LLVMBuildBitCast(ctx->ac.builder, ret, ret_type, "");
1767
1768 for (unsigned j = 0; j < num_elems; j++) {
1769 results[i + j] = LLVMBuildExtractElement(ctx->ac.builder, ret, LLVMConstInt(ctx->ac.i32, j, false), "");
1770 }
1771 i += num_elems;
1772 }
1773
1774 return ac_build_gather_values(&ctx->ac, results, num_components);
1775 }
1776
1777 static LLVMValueRef visit_load_ubo_buffer(struct ac_nir_context *ctx,
1778 const nir_intrinsic_instr *instr)
1779 {
1780 LLVMValueRef ret;
1781 LLVMValueRef rsrc = get_src(ctx, instr->src[0]);
1782 LLVMValueRef offset = get_src(ctx, instr->src[1]);
1783 int num_components = instr->num_components;
1784
1785 if (ctx->abi->load_ubo)
1786 rsrc = ctx->abi->load_ubo(ctx->abi, rsrc);
1787
1788 if (instr->dest.ssa.bit_size == 64)
1789 num_components *= 2;
1790
1791 if (instr->dest.ssa.bit_size == 16 || instr->dest.ssa.bit_size == 8) {
1792 unsigned load_bytes = instr->dest.ssa.bit_size / 8;
1793 LLVMValueRef results[num_components];
1794 for (unsigned i = 0; i < num_components; ++i) {
1795 LLVMValueRef immoffset = LLVMConstInt(ctx->ac.i32,
1796 load_bytes * i, 0);
1797
1798 if (load_bytes == 1) {
1799 results[i] = ac_build_tbuffer_load_byte(&ctx->ac,
1800 rsrc,
1801 offset,
1802 ctx->ac.i32_0,
1803 immoffset,
1804 0);
1805 } else {
1806 assert(load_bytes == 2);
1807 results[i] = ac_build_tbuffer_load_short(&ctx->ac,
1808 rsrc,
1809 offset,
1810 ctx->ac.i32_0,
1811 immoffset,
1812 0);
1813 }
1814 }
1815 ret = ac_build_gather_values(&ctx->ac, results, num_components);
1816 } else {
1817 ret = ac_build_buffer_load(&ctx->ac, rsrc, num_components, NULL, offset,
1818 NULL, 0, 0, true, true);
1819
1820 ret = ac_trim_vector(&ctx->ac, ret, num_components);
1821 }
1822
1823 return LLVMBuildBitCast(ctx->ac.builder, ret,
1824 get_def_type(ctx, &instr->dest.ssa), "");
1825 }
1826
1827 static void
1828 get_deref_offset(struct ac_nir_context *ctx, nir_deref_instr *instr,
1829 bool vs_in, unsigned *vertex_index_out,
1830 LLVMValueRef *vertex_index_ref,
1831 unsigned *const_out, LLVMValueRef *indir_out)
1832 {
1833 nir_variable *var = nir_deref_instr_get_variable(instr);
1834 nir_deref_path path;
1835 unsigned idx_lvl = 1;
1836
1837 nir_deref_path_init(&path, instr, NULL);
1838
1839 if (vertex_index_out != NULL || vertex_index_ref != NULL) {
1840 if (vertex_index_ref) {
1841 *vertex_index_ref = get_src(ctx, path.path[idx_lvl]->arr.index);
1842 if (vertex_index_out)
1843 *vertex_index_out = 0;
1844 } else {
1845 *vertex_index_out = nir_src_as_uint(path.path[idx_lvl]->arr.index);
1846 }
1847 ++idx_lvl;
1848 }
1849
1850 uint32_t const_offset = 0;
1851 LLVMValueRef offset = NULL;
1852
1853 if (var->data.compact) {
1854 assert(instr->deref_type == nir_deref_type_array);
1855 const_offset = nir_src_as_uint(instr->arr.index);
1856 goto out;
1857 }
1858
1859 for (; path.path[idx_lvl]; ++idx_lvl) {
1860 const struct glsl_type *parent_type = path.path[idx_lvl - 1]->type;
1861 if (path.path[idx_lvl]->deref_type == nir_deref_type_struct) {
1862 unsigned index = path.path[idx_lvl]->strct.index;
1863
1864 for (unsigned i = 0; i < index; i++) {
1865 const struct glsl_type *ft = glsl_get_struct_field(parent_type, i);
1866 const_offset += glsl_count_attribute_slots(ft, vs_in);
1867 }
1868 } else if(path.path[idx_lvl]->deref_type == nir_deref_type_array) {
1869 unsigned size = glsl_count_attribute_slots(path.path[idx_lvl]->type, vs_in);
1870 LLVMValueRef array_off = LLVMBuildMul(ctx->ac.builder, LLVMConstInt(ctx->ac.i32, size, 0),
1871 get_src(ctx, path.path[idx_lvl]->arr.index), "");
1872 if (offset)
1873 offset = LLVMBuildAdd(ctx->ac.builder, offset, array_off, "");
1874 else
1875 offset = array_off;
1876 } else
1877 unreachable("Uhandled deref type in get_deref_instr_offset");
1878 }
1879
1880 out:
1881 nir_deref_path_finish(&path);
1882
1883 if (const_offset && offset)
1884 offset = LLVMBuildAdd(ctx->ac.builder, offset,
1885 LLVMConstInt(ctx->ac.i32, const_offset, 0),
1886 "");
1887
1888 *const_out = const_offset;
1889 *indir_out = offset;
1890 }
1891
1892 static LLVMValueRef load_tess_varyings(struct ac_nir_context *ctx,
1893 nir_intrinsic_instr *instr,
1894 bool load_inputs)
1895 {
1896 LLVMValueRef result;
1897 LLVMValueRef vertex_index = NULL;
1898 LLVMValueRef indir_index = NULL;
1899 unsigned const_index = 0;
1900
1901 nir_variable *var = nir_deref_instr_get_variable(nir_instr_as_deref(instr->src[0].ssa->parent_instr));
1902
1903 unsigned location = var->data.location;
1904 unsigned driver_location = var->data.driver_location;
1905 const bool is_patch = var->data.patch;
1906 const bool is_compact = var->data.compact;
1907
1908 get_deref_offset(ctx, nir_instr_as_deref(instr->src[0].ssa->parent_instr),
1909 false, NULL, is_patch ? NULL : &vertex_index,
1910 &const_index, &indir_index);
1911
1912 LLVMTypeRef dest_type = get_def_type(ctx, &instr->dest.ssa);
1913
1914 LLVMTypeRef src_component_type;
1915 if (LLVMGetTypeKind(dest_type) == LLVMVectorTypeKind)
1916 src_component_type = LLVMGetElementType(dest_type);
1917 else
1918 src_component_type = dest_type;
1919
1920 result = ctx->abi->load_tess_varyings(ctx->abi, src_component_type,
1921 vertex_index, indir_index,
1922 const_index, location, driver_location,
1923 var->data.location_frac,
1924 instr->num_components,
1925 is_patch, is_compact, load_inputs);
1926 if (instr->dest.ssa.bit_size == 16) {
1927 result = ac_to_integer(&ctx->ac, result);
1928 result = LLVMBuildTrunc(ctx->ac.builder, result, dest_type, "");
1929 }
1930 return LLVMBuildBitCast(ctx->ac.builder, result, dest_type, "");
1931 }
1932
1933 static unsigned
1934 type_scalar_size_bytes(const struct glsl_type *type)
1935 {
1936 assert(glsl_type_is_vector_or_scalar(type) ||
1937 glsl_type_is_matrix(type));
1938 return glsl_type_is_boolean(type) ? 4 : glsl_get_bit_size(type) / 8;
1939 }
1940
1941 static LLVMValueRef visit_load_var(struct ac_nir_context *ctx,
1942 nir_intrinsic_instr *instr)
1943 {
1944 nir_deref_instr *deref = nir_instr_as_deref(instr->src[0].ssa->parent_instr);
1945 nir_variable *var = nir_deref_instr_get_variable(deref);
1946
1947 LLVMValueRef values[8];
1948 int idx = 0;
1949 int ve = instr->dest.ssa.num_components;
1950 unsigned comp = 0;
1951 LLVMValueRef indir_index;
1952 LLVMValueRef ret;
1953 unsigned const_index;
1954 unsigned stride = 4;
1955 int mode = deref->mode;
1956
1957 if (var) {
1958 bool vs_in = ctx->stage == MESA_SHADER_VERTEX &&
1959 var->data.mode == nir_var_shader_in;
1960 idx = var->data.driver_location;
1961 comp = var->data.location_frac;
1962 mode = var->data.mode;
1963
1964 get_deref_offset(ctx, deref, vs_in, NULL, NULL,
1965 &const_index, &indir_index);
1966
1967 if (var->data.compact) {
1968 stride = 1;
1969 const_index += comp;
1970 comp = 0;
1971 }
1972 }
1973
1974 if (instr->dest.ssa.bit_size == 64 &&
1975 (deref->mode == nir_var_shader_in ||
1976 deref->mode == nir_var_shader_out ||
1977 deref->mode == nir_var_function_temp))
1978 ve *= 2;
1979
1980 switch (mode) {
1981 case nir_var_shader_in:
1982 if (ctx->stage == MESA_SHADER_TESS_CTRL ||
1983 ctx->stage == MESA_SHADER_TESS_EVAL) {
1984 return load_tess_varyings(ctx, instr, true);
1985 }
1986
1987 if (ctx->stage == MESA_SHADER_GEOMETRY) {
1988 LLVMTypeRef type = LLVMIntTypeInContext(ctx->ac.context, instr->dest.ssa.bit_size);
1989 LLVMValueRef indir_index;
1990 unsigned const_index, vertex_index;
1991 get_deref_offset(ctx, deref, false, &vertex_index, NULL,
1992 &const_index, &indir_index);
1993
1994 return ctx->abi->load_inputs(ctx->abi, var->data.location,
1995 var->data.driver_location,
1996 var->data.location_frac,
1997 instr->num_components, vertex_index, const_index, type);
1998 }
1999
2000 for (unsigned chan = comp; chan < ve + comp; chan++) {
2001 if (indir_index) {
2002 unsigned count = glsl_count_attribute_slots(
2003 var->type,
2004 ctx->stage == MESA_SHADER_VERTEX);
2005 count -= chan / 4;
2006 LLVMValueRef tmp_vec = ac_build_gather_values_extended(
2007 &ctx->ac, ctx->abi->inputs + idx + chan, count,
2008 stride, false, true);
2009
2010 values[chan] = LLVMBuildExtractElement(ctx->ac.builder,
2011 tmp_vec,
2012 indir_index, "");
2013 } else
2014 values[chan] = ctx->abi->inputs[idx + chan + const_index * stride];
2015 }
2016 break;
2017 case nir_var_function_temp:
2018 for (unsigned chan = 0; chan < ve; chan++) {
2019 if (indir_index) {
2020 unsigned count = glsl_count_attribute_slots(
2021 var->type, false);
2022 count -= chan / 4;
2023 LLVMValueRef tmp_vec = ac_build_gather_values_extended(
2024 &ctx->ac, ctx->locals + idx + chan, count,
2025 stride, true, true);
2026
2027 values[chan] = LLVMBuildExtractElement(ctx->ac.builder,
2028 tmp_vec,
2029 indir_index, "");
2030 } else {
2031 values[chan] = LLVMBuildLoad(ctx->ac.builder, ctx->locals[idx + chan + const_index * stride], "");
2032 }
2033 }
2034 break;
2035 case nir_var_mem_shared: {
2036 LLVMValueRef address = get_src(ctx, instr->src[0]);
2037 LLVMValueRef val = LLVMBuildLoad(ctx->ac.builder, address, "");
2038 return LLVMBuildBitCast(ctx->ac.builder, val,
2039 get_def_type(ctx, &instr->dest.ssa),
2040 "");
2041 }
2042 case nir_var_shader_out:
2043 if (ctx->stage == MESA_SHADER_TESS_CTRL) {
2044 return load_tess_varyings(ctx, instr, false);
2045 }
2046
2047 for (unsigned chan = comp; chan < ve + comp; chan++) {
2048 if (indir_index) {
2049 unsigned count = glsl_count_attribute_slots(
2050 var->type, false);
2051 count -= chan / 4;
2052 LLVMValueRef tmp_vec = ac_build_gather_values_extended(
2053 &ctx->ac, ctx->abi->outputs + idx + chan, count,
2054 stride, true, true);
2055
2056 values[chan] = LLVMBuildExtractElement(ctx->ac.builder,
2057 tmp_vec,
2058 indir_index, "");
2059 } else {
2060 values[chan] = LLVMBuildLoad(ctx->ac.builder,
2061 ctx->abi->outputs[idx + chan + const_index * stride],
2062 "");
2063 }
2064 }
2065 break;
2066 case nir_var_mem_global: {
2067 LLVMValueRef address = get_src(ctx, instr->src[0]);
2068 unsigned explicit_stride = glsl_get_explicit_stride(deref->type);
2069 unsigned natural_stride = type_scalar_size_bytes(deref->type);
2070 unsigned stride = explicit_stride ? explicit_stride : natural_stride;
2071
2072 LLVMTypeRef result_type = get_def_type(ctx, &instr->dest.ssa);
2073 if (stride != natural_stride) {
2074 LLVMTypeRef ptr_type = LLVMPointerType(LLVMGetElementType(result_type),
2075 LLVMGetPointerAddressSpace(LLVMTypeOf(address)));
2076 address = LLVMBuildBitCast(ctx->ac.builder, address, ptr_type , "");
2077
2078 for (unsigned i = 0; i < instr->dest.ssa.num_components; ++i) {
2079 LLVMValueRef offset = LLVMConstInt(ctx->ac.i32, i * stride / natural_stride, 0);
2080 values[i] = LLVMBuildLoad(ctx->ac.builder,
2081 ac_build_gep_ptr(&ctx->ac, address, offset), "");
2082 }
2083 return ac_build_gather_values(&ctx->ac, values, instr->dest.ssa.num_components);
2084 } else {
2085 LLVMTypeRef ptr_type = LLVMPointerType(result_type,
2086 LLVMGetPointerAddressSpace(LLVMTypeOf(address)));
2087 address = LLVMBuildBitCast(ctx->ac.builder, address, ptr_type , "");
2088 LLVMValueRef val = LLVMBuildLoad(ctx->ac.builder, address, "");
2089 return val;
2090 }
2091 }
2092 default:
2093 unreachable("unhandle variable mode");
2094 }
2095 ret = ac_build_varying_gather_values(&ctx->ac, values, ve, comp);
2096 return LLVMBuildBitCast(ctx->ac.builder, ret, get_def_type(ctx, &instr->dest.ssa), "");
2097 }
2098
2099 static void
2100 visit_store_var(struct ac_nir_context *ctx,
2101 nir_intrinsic_instr *instr)
2102 {
2103 nir_deref_instr *deref = nir_instr_as_deref(instr->src[0].ssa->parent_instr);
2104 nir_variable *var = nir_deref_instr_get_variable(deref);
2105
2106 LLVMValueRef temp_ptr, value;
2107 int idx = 0;
2108 unsigned comp = 0;
2109 LLVMValueRef src = ac_to_float(&ctx->ac, get_src(ctx, instr->src[1]));
2110 int writemask = instr->const_index[0];
2111 LLVMValueRef indir_index;
2112 unsigned const_index;
2113
2114 if (var) {
2115 get_deref_offset(ctx, deref, false,
2116 NULL, NULL, &const_index, &indir_index);
2117 idx = var->data.driver_location;
2118 comp = var->data.location_frac;
2119
2120 if (var->data.compact) {
2121 const_index += comp;
2122 comp = 0;
2123 }
2124 }
2125
2126 if (ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src)) == 64 &&
2127 (deref->mode == nir_var_shader_out ||
2128 deref->mode == nir_var_function_temp)) {
2129
2130 src = LLVMBuildBitCast(ctx->ac.builder, src,
2131 LLVMVectorType(ctx->ac.f32, ac_get_llvm_num_components(src) * 2),
2132 "");
2133
2134 writemask = widen_mask(writemask, 2);
2135 }
2136
2137 writemask = writemask << comp;
2138
2139 switch (deref->mode) {
2140 case nir_var_shader_out:
2141
2142 if (ctx->stage == MESA_SHADER_TESS_CTRL) {
2143 LLVMValueRef vertex_index = NULL;
2144 LLVMValueRef indir_index = NULL;
2145 unsigned const_index = 0;
2146 const bool is_patch = var->data.patch;
2147
2148 get_deref_offset(ctx, deref, false, NULL,
2149 is_patch ? NULL : &vertex_index,
2150 &const_index, &indir_index);
2151
2152 ctx->abi->store_tcs_outputs(ctx->abi, var,
2153 vertex_index, indir_index,
2154 const_index, src, writemask);
2155 return;
2156 }
2157
2158 for (unsigned chan = 0; chan < 8; chan++) {
2159 int stride = 4;
2160 if (!(writemask & (1 << chan)))
2161 continue;
2162
2163 value = ac_llvm_extract_elem(&ctx->ac, src, chan - comp);
2164
2165 if (var->data.compact)
2166 stride = 1;
2167 if (indir_index) {
2168 unsigned count = glsl_count_attribute_slots(
2169 var->type, false);
2170 count -= chan / 4;
2171 LLVMValueRef tmp_vec = ac_build_gather_values_extended(
2172 &ctx->ac, ctx->abi->outputs + idx + chan, count,
2173 stride, true, true);
2174
2175 tmp_vec = LLVMBuildInsertElement(ctx->ac.builder, tmp_vec,
2176 value, indir_index, "");
2177 build_store_values_extended(&ctx->ac, ctx->abi->outputs + idx + chan,
2178 count, stride, tmp_vec);
2179
2180 } else {
2181 temp_ptr = ctx->abi->outputs[idx + chan + const_index * stride];
2182
2183 LLVMBuildStore(ctx->ac.builder, value, temp_ptr);
2184 }
2185 }
2186 break;
2187 case nir_var_function_temp:
2188 for (unsigned chan = 0; chan < 8; chan++) {
2189 if (!(writemask & (1 << chan)))
2190 continue;
2191
2192 value = ac_llvm_extract_elem(&ctx->ac, src, chan);
2193 if (indir_index) {
2194 unsigned count = glsl_count_attribute_slots(
2195 var->type, false);
2196 count -= chan / 4;
2197 LLVMValueRef tmp_vec = ac_build_gather_values_extended(
2198 &ctx->ac, ctx->locals + idx + chan, count,
2199 4, true, true);
2200
2201 tmp_vec = LLVMBuildInsertElement(ctx->ac.builder, tmp_vec,
2202 value, indir_index, "");
2203 build_store_values_extended(&ctx->ac, ctx->locals + idx + chan,
2204 count, 4, tmp_vec);
2205 } else {
2206 temp_ptr = ctx->locals[idx + chan + const_index * 4];
2207
2208 LLVMBuildStore(ctx->ac.builder, value, temp_ptr);
2209 }
2210 }
2211 break;
2212
2213 case nir_var_mem_global:
2214 case nir_var_mem_shared: {
2215 int writemask = instr->const_index[0];
2216 LLVMValueRef address = get_src(ctx, instr->src[0]);
2217 LLVMValueRef val = get_src(ctx, instr->src[1]);
2218
2219 unsigned explicit_stride = glsl_get_explicit_stride(deref->type);
2220 unsigned natural_stride = type_scalar_size_bytes(deref->type);
2221 unsigned stride = explicit_stride ? explicit_stride : natural_stride;
2222
2223 LLVMTypeRef ptr_type = LLVMPointerType(LLVMTypeOf(val),
2224 LLVMGetPointerAddressSpace(LLVMTypeOf(address)));
2225 address = LLVMBuildBitCast(ctx->ac.builder, address, ptr_type , "");
2226
2227 if (writemask == (1u << ac_get_llvm_num_components(val)) - 1 &&
2228 stride == natural_stride) {
2229 LLVMTypeRef ptr_type = LLVMPointerType(LLVMTypeOf(val),
2230 LLVMGetPointerAddressSpace(LLVMTypeOf(address)));
2231 address = LLVMBuildBitCast(ctx->ac.builder, address, ptr_type , "");
2232
2233 val = LLVMBuildBitCast(ctx->ac.builder, val,
2234 LLVMGetElementType(LLVMTypeOf(address)), "");
2235 LLVMBuildStore(ctx->ac.builder, val, address);
2236 } else {
2237 LLVMTypeRef ptr_type = LLVMPointerType(LLVMGetElementType(LLVMTypeOf(val)),
2238 LLVMGetPointerAddressSpace(LLVMTypeOf(address)));
2239 address = LLVMBuildBitCast(ctx->ac.builder, address, ptr_type , "");
2240 for (unsigned chan = 0; chan < 4; chan++) {
2241 if (!(writemask & (1 << chan)))
2242 continue;
2243
2244 LLVMValueRef offset = LLVMConstInt(ctx->ac.i32, chan * stride / natural_stride, 0);
2245
2246 LLVMValueRef ptr = ac_build_gep_ptr(&ctx->ac, address, offset);
2247 LLVMValueRef src = ac_llvm_extract_elem(&ctx->ac, val,
2248 chan);
2249 src = LLVMBuildBitCast(ctx->ac.builder, src,
2250 LLVMGetElementType(LLVMTypeOf(ptr)), "");
2251 LLVMBuildStore(ctx->ac.builder, src, ptr);
2252 }
2253 }
2254 break;
2255 }
2256 default:
2257 abort();
2258 break;
2259 }
2260 }
2261
2262 static int image_type_to_components_count(enum glsl_sampler_dim dim, bool array)
2263 {
2264 switch (dim) {
2265 case GLSL_SAMPLER_DIM_BUF:
2266 return 1;
2267 case GLSL_SAMPLER_DIM_1D:
2268 return array ? 2 : 1;
2269 case GLSL_SAMPLER_DIM_2D:
2270 return array ? 3 : 2;
2271 case GLSL_SAMPLER_DIM_MS:
2272 return array ? 4 : 3;
2273 case GLSL_SAMPLER_DIM_3D:
2274 case GLSL_SAMPLER_DIM_CUBE:
2275 return 3;
2276 case GLSL_SAMPLER_DIM_RECT:
2277 case GLSL_SAMPLER_DIM_SUBPASS:
2278 return 2;
2279 case GLSL_SAMPLER_DIM_SUBPASS_MS:
2280 return 3;
2281 default:
2282 break;
2283 }
2284 return 0;
2285 }
2286
2287 static LLVMValueRef adjust_sample_index_using_fmask(struct ac_llvm_context *ctx,
2288 LLVMValueRef coord_x, LLVMValueRef coord_y,
2289 LLVMValueRef coord_z,
2290 LLVMValueRef sample_index,
2291 LLVMValueRef fmask_desc_ptr)
2292 {
2293 unsigned sample_chan = coord_z ? 3 : 2;
2294 LLVMValueRef addr[4] = {coord_x, coord_y, coord_z};
2295 addr[sample_chan] = sample_index;
2296
2297 ac_apply_fmask_to_sample(ctx, fmask_desc_ptr, addr, coord_z != NULL);
2298 return addr[sample_chan];
2299 }
2300
2301 static nir_deref_instr *get_image_deref(const nir_intrinsic_instr *instr)
2302 {
2303 assert(instr->src[0].is_ssa);
2304 return nir_instr_as_deref(instr->src[0].ssa->parent_instr);
2305 }
2306
2307 static LLVMValueRef get_image_descriptor(struct ac_nir_context *ctx,
2308 const nir_intrinsic_instr *instr,
2309 enum ac_descriptor_type desc_type,
2310 bool write)
2311 {
2312 nir_deref_instr *deref_instr =
2313 instr->src[0].ssa->parent_instr->type == nir_instr_type_deref ?
2314 nir_instr_as_deref(instr->src[0].ssa->parent_instr) : NULL;
2315
2316 return get_sampler_desc(ctx, deref_instr, desc_type, &instr->instr, true, write);
2317 }
2318
2319 static void get_image_coords(struct ac_nir_context *ctx,
2320 const nir_intrinsic_instr *instr,
2321 struct ac_image_args *args,
2322 enum glsl_sampler_dim dim,
2323 bool is_array)
2324 {
2325 LLVMValueRef src0 = get_src(ctx, instr->src[1]);
2326 LLVMValueRef masks[] = {
2327 LLVMConstInt(ctx->ac.i32, 0, false), LLVMConstInt(ctx->ac.i32, 1, false),
2328 LLVMConstInt(ctx->ac.i32, 2, false), LLVMConstInt(ctx->ac.i32, 3, false),
2329 };
2330 LLVMValueRef sample_index = ac_llvm_extract_elem(&ctx->ac, get_src(ctx, instr->src[2]), 0);
2331
2332 int count;
2333 MAYBE_UNUSED bool add_frag_pos = (dim == GLSL_SAMPLER_DIM_SUBPASS ||
2334 dim == GLSL_SAMPLER_DIM_SUBPASS_MS);
2335 bool is_ms = (dim == GLSL_SAMPLER_DIM_MS ||
2336 dim == GLSL_SAMPLER_DIM_SUBPASS_MS);
2337 bool gfx9_1d = ctx->ac.chip_class == GFX9 && dim == GLSL_SAMPLER_DIM_1D;
2338 assert(!add_frag_pos && "Input attachments should be lowered by this point.");
2339 count = image_type_to_components_count(dim, is_array);
2340
2341 if (is_ms && (instr->intrinsic == nir_intrinsic_image_deref_load ||
2342 instr->intrinsic == nir_intrinsic_bindless_image_load)) {
2343 LLVMValueRef fmask_load_address[3];
2344
2345 fmask_load_address[0] = LLVMBuildExtractElement(ctx->ac.builder, src0, masks[0], "");
2346 fmask_load_address[1] = LLVMBuildExtractElement(ctx->ac.builder, src0, masks[1], "");
2347 if (is_array)
2348 fmask_load_address[2] = LLVMBuildExtractElement(ctx->ac.builder, src0, masks[2], "");
2349 else
2350 fmask_load_address[2] = NULL;
2351
2352 sample_index = adjust_sample_index_using_fmask(&ctx->ac,
2353 fmask_load_address[0],
2354 fmask_load_address[1],
2355 fmask_load_address[2],
2356 sample_index,
2357 get_sampler_desc(ctx, nir_instr_as_deref(instr->src[0].ssa->parent_instr),
2358 AC_DESC_FMASK, &instr->instr, false, false));
2359 }
2360 if (count == 1 && !gfx9_1d) {
2361 if (instr->src[1].ssa->num_components)
2362 args->coords[0] = LLVMBuildExtractElement(ctx->ac.builder, src0, masks[0], "");
2363 else
2364 args->coords[0] = src0;
2365 } else {
2366 int chan;
2367 if (is_ms)
2368 count--;
2369 for (chan = 0; chan < count; ++chan) {
2370 args->coords[chan] = ac_llvm_extract_elem(&ctx->ac, src0, chan);
2371 }
2372
2373 if (gfx9_1d) {
2374 if (is_array) {
2375 args->coords[2] = args->coords[1];
2376 args->coords[1] = ctx->ac.i32_0;
2377 } else
2378 args->coords[1] = ctx->ac.i32_0;
2379 count++;
2380 }
2381
2382 if (is_ms) {
2383 args->coords[count] = sample_index;
2384 count++;
2385 }
2386 }
2387 }
2388
2389 static LLVMValueRef get_image_buffer_descriptor(struct ac_nir_context *ctx,
2390 const nir_intrinsic_instr *instr,
2391 bool write, bool atomic)
2392 {
2393 LLVMValueRef rsrc = get_image_descriptor(ctx, instr, AC_DESC_BUFFER, write);
2394 if (ctx->abi->gfx9_stride_size_workaround ||
2395 (ctx->abi->gfx9_stride_size_workaround_for_atomic && atomic)) {
2396 LLVMValueRef elem_count = LLVMBuildExtractElement(ctx->ac.builder, rsrc, LLVMConstInt(ctx->ac.i32, 2, 0), "");
2397 LLVMValueRef stride = LLVMBuildExtractElement(ctx->ac.builder, rsrc, LLVMConstInt(ctx->ac.i32, 1, 0), "");
2398 stride = LLVMBuildLShr(ctx->ac.builder, stride, LLVMConstInt(ctx->ac.i32, 16, 0), "");
2399
2400 LLVMValueRef new_elem_count = LLVMBuildSelect(ctx->ac.builder,
2401 LLVMBuildICmp(ctx->ac.builder, LLVMIntUGT, elem_count, stride, ""),
2402 elem_count, stride, "");
2403
2404 rsrc = LLVMBuildInsertElement(ctx->ac.builder, rsrc, new_elem_count,
2405 LLVMConstInt(ctx->ac.i32, 2, 0), "");
2406 }
2407 return rsrc;
2408 }
2409
2410 static LLVMValueRef visit_image_load(struct ac_nir_context *ctx,
2411 const nir_intrinsic_instr *instr,
2412 bool bindless)
2413 {
2414 LLVMValueRef res;
2415
2416 enum glsl_sampler_dim dim;
2417 enum gl_access_qualifier access;
2418 bool is_array;
2419 if (bindless) {
2420 dim = nir_intrinsic_image_dim(instr);
2421 access = nir_intrinsic_access(instr);
2422 is_array = nir_intrinsic_image_array(instr);
2423 } else {
2424 const nir_deref_instr *image_deref = get_image_deref(instr);
2425 const struct glsl_type *type = image_deref->type;
2426 const nir_variable *var = nir_deref_instr_get_variable(image_deref);
2427 dim = glsl_get_sampler_dim(type);
2428 access = var->data.image.access;
2429 is_array = glsl_sampler_type_is_array(type);
2430 }
2431
2432 struct ac_image_args args = {};
2433
2434 args.cache_policy = get_cache_policy(ctx, access, false, false);
2435
2436 if (dim == GLSL_SAMPLER_DIM_BUF) {
2437 unsigned mask = nir_ssa_def_components_read(&instr->dest.ssa);
2438 unsigned num_channels = util_last_bit(mask);
2439 LLVMValueRef rsrc, vindex;
2440
2441 rsrc = get_image_buffer_descriptor(ctx, instr, false, false);
2442 vindex = LLVMBuildExtractElement(ctx->ac.builder, get_src(ctx, instr->src[1]),
2443 ctx->ac.i32_0, "");
2444
2445 bool can_speculate = access & ACCESS_CAN_REORDER;
2446 res = ac_build_buffer_load_format(&ctx->ac, rsrc, vindex,
2447 ctx->ac.i32_0, num_channels,
2448 args.cache_policy,
2449 can_speculate);
2450 res = ac_build_expand_to_vec4(&ctx->ac, res, num_channels);
2451
2452 res = ac_trim_vector(&ctx->ac, res, instr->dest.ssa.num_components);
2453 res = ac_to_integer(&ctx->ac, res);
2454 } else {
2455 args.opcode = ac_image_load;
2456 get_image_coords(ctx, instr, &args, dim, is_array);
2457 args.resource = get_image_descriptor(ctx, instr, AC_DESC_IMAGE, false);
2458 args.dim = get_ac_image_dim(&ctx->ac, dim, is_array);
2459 args.dmask = 15;
2460 args.attributes = AC_FUNC_ATTR_READONLY;
2461
2462 res = ac_build_image_opcode(&ctx->ac, &args);
2463 }
2464 return res;
2465 }
2466
2467 static void visit_image_store(struct ac_nir_context *ctx,
2468 nir_intrinsic_instr *instr,
2469 bool bindless)
2470 {
2471
2472
2473 enum glsl_sampler_dim dim;
2474 enum gl_access_qualifier access;
2475 bool is_array;
2476 if (bindless) {
2477 dim = nir_intrinsic_image_dim(instr);
2478 access = nir_intrinsic_access(instr);
2479 is_array = nir_intrinsic_image_array(instr);
2480 } else {
2481 const nir_deref_instr *image_deref = get_image_deref(instr);
2482 const struct glsl_type *type = image_deref->type;
2483 const nir_variable *var = nir_deref_instr_get_variable(image_deref);
2484 dim = glsl_get_sampler_dim(type);
2485 access = var->data.image.access;
2486 is_array = glsl_sampler_type_is_array(type);
2487 }
2488
2489 bool writeonly_memory = access & ACCESS_NON_READABLE;
2490 struct ac_image_args args = {};
2491
2492 args.cache_policy = get_cache_policy(ctx, access, true, writeonly_memory);
2493
2494 if (dim == GLSL_SAMPLER_DIM_BUF) {
2495 LLVMValueRef rsrc = get_image_buffer_descriptor(ctx, instr, true, false);
2496 LLVMValueRef src = ac_to_float(&ctx->ac, get_src(ctx, instr->src[3]));
2497 unsigned src_channels = ac_get_llvm_num_components(src);
2498 LLVMValueRef vindex;
2499
2500 if (src_channels == 3)
2501 src = ac_build_expand_to_vec4(&ctx->ac, src, 3);
2502
2503 vindex = LLVMBuildExtractElement(ctx->ac.builder,
2504 get_src(ctx, instr->src[1]),
2505 ctx->ac.i32_0, "");
2506
2507 ac_build_buffer_store_format(&ctx->ac, rsrc, src, vindex,
2508 ctx->ac.i32_0, src_channels,
2509 args.cache_policy);
2510 } else {
2511 args.opcode = ac_image_store;
2512 args.data[0] = ac_to_float(&ctx->ac, get_src(ctx, instr->src[3]));
2513 get_image_coords(ctx, instr, &args, dim, is_array);
2514 args.resource = get_image_descriptor(ctx, instr, AC_DESC_IMAGE, true);
2515 args.dim = get_ac_image_dim(&ctx->ac, dim, is_array);
2516 args.dmask = 15;
2517
2518 ac_build_image_opcode(&ctx->ac, &args);
2519 }
2520
2521 }
2522
2523 static LLVMValueRef visit_image_atomic(struct ac_nir_context *ctx,
2524 const nir_intrinsic_instr *instr,
2525 bool bindless)
2526 {
2527 LLVMValueRef params[7];
2528 int param_count = 0;
2529
2530 bool cmpswap = instr->intrinsic == nir_intrinsic_image_deref_atomic_comp_swap ||
2531 instr->intrinsic == nir_intrinsic_bindless_image_atomic_comp_swap;
2532 const char *atomic_name;
2533 char intrinsic_name[64];
2534 enum ac_atomic_op atomic_subop;
2535 MAYBE_UNUSED int length;
2536
2537 enum glsl_sampler_dim dim;
2538 bool is_unsigned = false;
2539 bool is_array;
2540 if (bindless) {
2541 if (instr->intrinsic == nir_intrinsic_bindless_image_atomic_min ||
2542 instr->intrinsic == nir_intrinsic_bindless_image_atomic_max) {
2543 const GLenum format = nir_intrinsic_format(instr);
2544 assert(format == GL_R32UI || format == GL_R32I);
2545 is_unsigned = format == GL_R32UI;
2546 }
2547 dim = nir_intrinsic_image_dim(instr);
2548 is_array = nir_intrinsic_image_array(instr);
2549 } else {
2550 const struct glsl_type *type = get_image_deref(instr)->type;
2551 is_unsigned = glsl_get_sampler_result_type(type) == GLSL_TYPE_UINT;
2552 dim = glsl_get_sampler_dim(type);
2553 is_array = glsl_sampler_type_is_array(type);
2554 }
2555
2556 switch (instr->intrinsic) {
2557 case nir_intrinsic_bindless_image_atomic_add:
2558 case nir_intrinsic_image_deref_atomic_add:
2559 atomic_name = "add";
2560 atomic_subop = ac_atomic_add;
2561 break;
2562 case nir_intrinsic_bindless_image_atomic_min:
2563 case nir_intrinsic_image_deref_atomic_min:
2564 atomic_name = is_unsigned ? "umin" : "smin";
2565 atomic_subop = is_unsigned ? ac_atomic_umin : ac_atomic_smin;
2566 break;
2567 case nir_intrinsic_bindless_image_atomic_max:
2568 case nir_intrinsic_image_deref_atomic_max:
2569 atomic_name = is_unsigned ? "umax" : "smax";
2570 atomic_subop = is_unsigned ? ac_atomic_umax : ac_atomic_smax;
2571 break;
2572 case nir_intrinsic_bindless_image_atomic_and:
2573 case nir_intrinsic_image_deref_atomic_and:
2574 atomic_name = "and";
2575 atomic_subop = ac_atomic_and;
2576 break;
2577 case nir_intrinsic_bindless_image_atomic_or:
2578 case nir_intrinsic_image_deref_atomic_or:
2579 atomic_name = "or";
2580 atomic_subop = ac_atomic_or;
2581 break;
2582 case nir_intrinsic_bindless_image_atomic_xor:
2583 case nir_intrinsic_image_deref_atomic_xor:
2584 atomic_name = "xor";
2585 atomic_subop = ac_atomic_xor;
2586 break;
2587 case nir_intrinsic_bindless_image_atomic_exchange:
2588 case nir_intrinsic_image_deref_atomic_exchange:
2589 atomic_name = "swap";
2590 atomic_subop = ac_atomic_swap;
2591 break;
2592 case nir_intrinsic_bindless_image_atomic_comp_swap:
2593 case nir_intrinsic_image_deref_atomic_comp_swap:
2594 atomic_name = "cmpswap";
2595 atomic_subop = 0; /* not used */
2596 break;
2597 default:
2598 abort();
2599 }
2600
2601 if (cmpswap)
2602 params[param_count++] = get_src(ctx, instr->src[4]);
2603 params[param_count++] = get_src(ctx, instr->src[3]);
2604
2605 if (dim == GLSL_SAMPLER_DIM_BUF) {
2606 params[param_count++] = get_image_buffer_descriptor(ctx, instr, true, true);
2607 params[param_count++] = LLVMBuildExtractElement(ctx->ac.builder, get_src(ctx, instr->src[1]),
2608 ctx->ac.i32_0, ""); /* vindex */
2609 params[param_count++] = ctx->ac.i32_0; /* voffset */
2610 if (HAVE_LLVM >= 0x900) {
2611 /* XXX: The new raw/struct atomic intrinsics are buggy
2612 * with LLVM 8, see r358579.
2613 */
2614 params[param_count++] = ctx->ac.i32_0; /* soffset */
2615 params[param_count++] = ctx->ac.i32_0; /* slc */
2616
2617 length = snprintf(intrinsic_name, sizeof(intrinsic_name),
2618 "llvm.amdgcn.struct.buffer.atomic.%s.i32", atomic_name);
2619 } else {
2620 params[param_count++] = ctx->ac.i1false; /* slc */
2621
2622 length = snprintf(intrinsic_name, sizeof(intrinsic_name),
2623 "llvm.amdgcn.buffer.atomic.%s", atomic_name);
2624 }
2625
2626 assert(length < sizeof(intrinsic_name));
2627 return ac_build_intrinsic(&ctx->ac, intrinsic_name, ctx->ac.i32,
2628 params, param_count, 0);
2629 } else {
2630 struct ac_image_args args = {};
2631 args.opcode = cmpswap ? ac_image_atomic_cmpswap : ac_image_atomic;
2632 args.atomic = atomic_subop;
2633 args.data[0] = params[0];
2634 if (cmpswap)
2635 args.data[1] = params[1];
2636 get_image_coords(ctx, instr, &args, dim, is_array);
2637 args.resource = get_image_descriptor(ctx, instr, AC_DESC_IMAGE, true);
2638 args.dim = get_ac_image_dim(&ctx->ac, dim, is_array);
2639
2640 return ac_build_image_opcode(&ctx->ac, &args);
2641 }
2642 }
2643
2644 static LLVMValueRef visit_image_samples(struct ac_nir_context *ctx,
2645 const nir_intrinsic_instr *instr,
2646 bool bindless)
2647 {
2648 enum glsl_sampler_dim dim;
2649 bool is_array;
2650 if (bindless) {
2651 dim = nir_intrinsic_image_dim(instr);
2652 is_array = nir_intrinsic_image_array(instr);
2653 } else {
2654 const struct glsl_type *type = get_image_deref(instr)->type;
2655 dim = glsl_get_sampler_dim(type);
2656 is_array = glsl_sampler_type_is_array(type);
2657 }
2658
2659 struct ac_image_args args = { 0 };
2660 args.dim = get_ac_sampler_dim(&ctx->ac, dim, is_array);
2661 args.dmask = 0xf;
2662 args.resource = get_image_descriptor(ctx, instr, AC_DESC_IMAGE, false);
2663 args.opcode = ac_image_get_resinfo;
2664 args.lod = ctx->ac.i32_0;
2665 args.attributes = AC_FUNC_ATTR_READNONE;
2666
2667 return ac_build_image_opcode(&ctx->ac, &args);
2668 }
2669
2670 static LLVMValueRef visit_image_size(struct ac_nir_context *ctx,
2671 const nir_intrinsic_instr *instr,
2672 bool bindless)
2673 {
2674 LLVMValueRef res;
2675
2676 enum glsl_sampler_dim dim;
2677 bool is_array;
2678 if (bindless) {
2679 dim = nir_intrinsic_image_dim(instr);
2680 is_array = nir_intrinsic_image_array(instr);
2681 } else {
2682 const struct glsl_type *type = get_image_deref(instr)->type;
2683 dim = glsl_get_sampler_dim(type);
2684 is_array = glsl_sampler_type_is_array(type);
2685 }
2686
2687 if (dim == GLSL_SAMPLER_DIM_BUF)
2688 return get_buffer_size(ctx, get_image_descriptor(ctx, instr, AC_DESC_BUFFER, false), true);
2689
2690 struct ac_image_args args = { 0 };
2691
2692 args.dim = get_ac_image_dim(&ctx->ac, dim, is_array);
2693 args.dmask = 0xf;
2694 args.resource = get_image_descriptor(ctx, instr, AC_DESC_IMAGE, false);
2695 args.opcode = ac_image_get_resinfo;
2696 args.lod = ctx->ac.i32_0;
2697 args.attributes = AC_FUNC_ATTR_READNONE;
2698
2699 res = ac_build_image_opcode(&ctx->ac, &args);
2700
2701 LLVMValueRef two = LLVMConstInt(ctx->ac.i32, 2, false);
2702
2703 if (dim == GLSL_SAMPLER_DIM_CUBE && is_array) {
2704 LLVMValueRef six = LLVMConstInt(ctx->ac.i32, 6, false);
2705 LLVMValueRef z = LLVMBuildExtractElement(ctx->ac.builder, res, two, "");
2706 z = LLVMBuildSDiv(ctx->ac.builder, z, six, "");
2707 res = LLVMBuildInsertElement(ctx->ac.builder, res, z, two, "");
2708 }
2709 if (ctx->ac.chip_class == GFX9 && dim == GLSL_SAMPLER_DIM_1D && is_array) {
2710 LLVMValueRef layers = LLVMBuildExtractElement(ctx->ac.builder, res, two, "");
2711 res = LLVMBuildInsertElement(ctx->ac.builder, res, layers,
2712 ctx->ac.i32_1, "");
2713
2714 }
2715 return res;
2716 }
2717
2718 static void emit_membar(struct ac_llvm_context *ac,
2719 const nir_intrinsic_instr *instr)
2720 {
2721 unsigned wait_flags = 0;
2722
2723 switch (instr->intrinsic) {
2724 case nir_intrinsic_memory_barrier:
2725 case nir_intrinsic_group_memory_barrier:
2726 wait_flags = AC_WAIT_LGKM | AC_WAIT_VLOAD | AC_WAIT_VSTORE;
2727 break;
2728 case nir_intrinsic_memory_barrier_atomic_counter:
2729 case nir_intrinsic_memory_barrier_buffer:
2730 case nir_intrinsic_memory_barrier_image:
2731 wait_flags = AC_WAIT_VLOAD | AC_WAIT_VSTORE;
2732 break;
2733 case nir_intrinsic_memory_barrier_shared:
2734 wait_flags = AC_WAIT_LGKM;
2735 break;
2736 default:
2737 break;
2738 }
2739
2740 ac_build_waitcnt(ac, wait_flags);
2741 }
2742
2743 void ac_emit_barrier(struct ac_llvm_context *ac, gl_shader_stage stage)
2744 {
2745 /* GFX6 only (thanks to a hw bug workaround):
2746 * The real barrier instruction isn’t needed, because an entire patch
2747 * always fits into a single wave.
2748 */
2749 if (ac->chip_class == GFX6 && stage == MESA_SHADER_TESS_CTRL) {
2750 ac_build_waitcnt(ac, AC_WAIT_LGKM | AC_WAIT_VLOAD | AC_WAIT_VSTORE);
2751 return;
2752 }
2753 ac_build_s_barrier(ac);
2754 }
2755
2756 static void emit_discard(struct ac_nir_context *ctx,
2757 const nir_intrinsic_instr *instr)
2758 {
2759 LLVMValueRef cond;
2760
2761 if (instr->intrinsic == nir_intrinsic_discard_if) {
2762 cond = LLVMBuildICmp(ctx->ac.builder, LLVMIntEQ,
2763 get_src(ctx, instr->src[0]),
2764 ctx->ac.i32_0, "");
2765 } else {
2766 assert(instr->intrinsic == nir_intrinsic_discard);
2767 cond = ctx->ac.i1false;
2768 }
2769
2770 ctx->abi->emit_kill(ctx->abi, cond);
2771 }
2772
2773 static LLVMValueRef
2774 visit_load_local_invocation_index(struct ac_nir_context *ctx)
2775 {
2776 LLVMValueRef result;
2777 LLVMValueRef thread_id = ac_get_thread_id(&ctx->ac);
2778 result = LLVMBuildAnd(ctx->ac.builder, ctx->abi->tg_size,
2779 LLVMConstInt(ctx->ac.i32, 0xfc0, false), "");
2780
2781 return LLVMBuildAdd(ctx->ac.builder, result, thread_id, "");
2782 }
2783
2784 static LLVMValueRef
2785 visit_load_subgroup_id(struct ac_nir_context *ctx)
2786 {
2787 if (ctx->stage == MESA_SHADER_COMPUTE) {
2788 LLVMValueRef result;
2789 result = LLVMBuildAnd(ctx->ac.builder, ctx->abi->tg_size,
2790 LLVMConstInt(ctx->ac.i32, 0xfc0, false), "");
2791 return LLVMBuildLShr(ctx->ac.builder, result, LLVMConstInt(ctx->ac.i32, 6, false), "");
2792 } else {
2793 return LLVMConstInt(ctx->ac.i32, 0, false);
2794 }
2795 }
2796
2797 static LLVMValueRef
2798 visit_load_num_subgroups(struct ac_nir_context *ctx)
2799 {
2800 if (ctx->stage == MESA_SHADER_COMPUTE) {
2801 return LLVMBuildAnd(ctx->ac.builder, ctx->abi->tg_size,
2802 LLVMConstInt(ctx->ac.i32, 0x3f, false), "");
2803 } else {
2804 return LLVMConstInt(ctx->ac.i32, 1, false);
2805 }
2806 }
2807
2808 static LLVMValueRef
2809 visit_first_invocation(struct ac_nir_context *ctx)
2810 {
2811 LLVMValueRef active_set = ac_build_ballot(&ctx->ac, ctx->ac.i32_1);
2812
2813 /* The second argument is whether cttz(0) should be defined, but we do not care. */
2814 LLVMValueRef args[] = {active_set, ctx->ac.i1false};
2815 LLVMValueRef result = ac_build_intrinsic(&ctx->ac,
2816 "llvm.cttz.i64",
2817 ctx->ac.i64, args, 2,
2818 AC_FUNC_ATTR_NOUNWIND |
2819 AC_FUNC_ATTR_READNONE);
2820
2821 return LLVMBuildTrunc(ctx->ac.builder, result, ctx->ac.i32, "");
2822 }
2823
2824 static LLVMValueRef
2825 visit_load_shared(struct ac_nir_context *ctx,
2826 const nir_intrinsic_instr *instr)
2827 {
2828 LLVMValueRef values[4], derived_ptr, index, ret;
2829
2830 LLVMValueRef ptr = get_memory_ptr(ctx, instr->src[0]);
2831
2832 for (int chan = 0; chan < instr->num_components; chan++) {
2833 index = LLVMConstInt(ctx->ac.i32, chan, 0);
2834 derived_ptr = LLVMBuildGEP(ctx->ac.builder, ptr, &index, 1, "");
2835 values[chan] = LLVMBuildLoad(ctx->ac.builder, derived_ptr, "");
2836 }
2837
2838 ret = ac_build_gather_values(&ctx->ac, values, instr->num_components);
2839 return LLVMBuildBitCast(ctx->ac.builder, ret, get_def_type(ctx, &instr->dest.ssa), "");
2840 }
2841
2842 static void
2843 visit_store_shared(struct ac_nir_context *ctx,
2844 const nir_intrinsic_instr *instr)
2845 {
2846 LLVMValueRef derived_ptr, data,index;
2847 LLVMBuilderRef builder = ctx->ac.builder;
2848
2849 LLVMValueRef ptr = get_memory_ptr(ctx, instr->src[1]);
2850 LLVMValueRef src = get_src(ctx, instr->src[0]);
2851
2852 int writemask = nir_intrinsic_write_mask(instr);
2853 for (int chan = 0; chan < 4; chan++) {
2854 if (!(writemask & (1 << chan))) {
2855 continue;
2856 }
2857 data = ac_llvm_extract_elem(&ctx->ac, src, chan);
2858 index = LLVMConstInt(ctx->ac.i32, chan, 0);
2859 derived_ptr = LLVMBuildGEP(builder, ptr, &index, 1, "");
2860 LLVMBuildStore(builder, data, derived_ptr);
2861 }
2862 }
2863
2864 static LLVMValueRef visit_var_atomic(struct ac_nir_context *ctx,
2865 const nir_intrinsic_instr *instr,
2866 LLVMValueRef ptr, int src_idx)
2867 {
2868 LLVMValueRef result;
2869 LLVMValueRef src = get_src(ctx, instr->src[src_idx]);
2870
2871 const char *sync_scope = HAVE_LLVM >= 0x0900 ? "workgroup-one-as" : "workgroup";
2872
2873 if (instr->intrinsic == nir_intrinsic_shared_atomic_comp_swap ||
2874 instr->intrinsic == nir_intrinsic_deref_atomic_comp_swap) {
2875 LLVMValueRef src1 = get_src(ctx, instr->src[src_idx + 1]);
2876 result = ac_build_atomic_cmp_xchg(&ctx->ac, ptr, src, src1, sync_scope);
2877 result = LLVMBuildExtractValue(ctx->ac.builder, result, 0, "");
2878 } else {
2879 LLVMAtomicRMWBinOp op;
2880 switch (instr->intrinsic) {
2881 case nir_intrinsic_shared_atomic_add:
2882 case nir_intrinsic_deref_atomic_add:
2883 op = LLVMAtomicRMWBinOpAdd;
2884 break;
2885 case nir_intrinsic_shared_atomic_umin:
2886 case nir_intrinsic_deref_atomic_umin:
2887 op = LLVMAtomicRMWBinOpUMin;
2888 break;
2889 case nir_intrinsic_shared_atomic_umax:
2890 case nir_intrinsic_deref_atomic_umax:
2891 op = LLVMAtomicRMWBinOpUMax;
2892 break;
2893 case nir_intrinsic_shared_atomic_imin:
2894 case nir_intrinsic_deref_atomic_imin:
2895 op = LLVMAtomicRMWBinOpMin;
2896 break;
2897 case nir_intrinsic_shared_atomic_imax:
2898 case nir_intrinsic_deref_atomic_imax:
2899 op = LLVMAtomicRMWBinOpMax;
2900 break;
2901 case nir_intrinsic_shared_atomic_and:
2902 case nir_intrinsic_deref_atomic_and:
2903 op = LLVMAtomicRMWBinOpAnd;
2904 break;
2905 case nir_intrinsic_shared_atomic_or:
2906 case nir_intrinsic_deref_atomic_or:
2907 op = LLVMAtomicRMWBinOpOr;
2908 break;
2909 case nir_intrinsic_shared_atomic_xor:
2910 case nir_intrinsic_deref_atomic_xor:
2911 op = LLVMAtomicRMWBinOpXor;
2912 break;
2913 case nir_intrinsic_shared_atomic_exchange:
2914 case nir_intrinsic_deref_atomic_exchange:
2915 op = LLVMAtomicRMWBinOpXchg;
2916 break;
2917 default:
2918 return NULL;
2919 }
2920
2921 result = ac_build_atomic_rmw(&ctx->ac, op, ptr, ac_to_integer(&ctx->ac, src), sync_scope);
2922 }
2923 return result;
2924 }
2925
2926 static LLVMValueRef load_sample_pos(struct ac_nir_context *ctx)
2927 {
2928 LLVMValueRef values[2];
2929 LLVMValueRef pos[2];
2930
2931 pos[0] = ac_to_float(&ctx->ac, ctx->abi->frag_pos[0]);
2932 pos[1] = ac_to_float(&ctx->ac, ctx->abi->frag_pos[1]);
2933
2934 values[0] = ac_build_fract(&ctx->ac, pos[0], 32);
2935 values[1] = ac_build_fract(&ctx->ac, pos[1], 32);
2936 return ac_build_gather_values(&ctx->ac, values, 2);
2937 }
2938
2939 static LLVMValueRef barycentric_center(struct ac_nir_context *ctx,
2940 unsigned mode)
2941 {
2942 LLVMValueRef interp_param = ctx->abi->lookup_interp_param(ctx->abi, mode, INTERP_CENTER);
2943 return LLVMBuildBitCast(ctx->ac.builder, interp_param, ctx->ac.v2i32, "");
2944 }
2945
2946 static LLVMValueRef barycentric_offset(struct ac_nir_context *ctx,
2947 unsigned mode,
2948 LLVMValueRef offset)
2949 {
2950 LLVMValueRef interp_param = ctx->abi->lookup_interp_param(ctx->abi, mode, INTERP_CENTER);
2951 LLVMValueRef src_c0 = ac_to_float(&ctx->ac, LLVMBuildExtractElement(ctx->ac.builder, offset, ctx->ac.i32_0, ""));
2952 LLVMValueRef src_c1 = ac_to_float(&ctx->ac, LLVMBuildExtractElement(ctx->ac.builder, offset, ctx->ac.i32_1, ""));
2953
2954 LLVMValueRef ij_out[2];
2955 LLVMValueRef ddxy_out = ac_build_ddxy_interp(&ctx->ac, interp_param);
2956
2957 /*
2958 * take the I then J parameters, and the DDX/Y for it, and
2959 * calculate the IJ inputs for the interpolator.
2960 * temp1 = ddx * offset/sample.x + I;
2961 * interp_param.I = ddy * offset/sample.y + temp1;
2962 * temp1 = ddx * offset/sample.x + J;
2963 * interp_param.J = ddy * offset/sample.y + temp1;
2964 */
2965 for (unsigned i = 0; i < 2; i++) {
2966 LLVMValueRef ix_ll = LLVMConstInt(ctx->ac.i32, i, false);
2967 LLVMValueRef iy_ll = LLVMConstInt(ctx->ac.i32, i + 2, false);
2968 LLVMValueRef ddx_el = LLVMBuildExtractElement(ctx->ac.builder,
2969 ddxy_out, ix_ll, "");
2970 LLVMValueRef ddy_el = LLVMBuildExtractElement(ctx->ac.builder,
2971 ddxy_out, iy_ll, "");
2972 LLVMValueRef interp_el = LLVMBuildExtractElement(ctx->ac.builder,
2973 interp_param, ix_ll, "");
2974 LLVMValueRef temp1, temp2;
2975
2976 interp_el = LLVMBuildBitCast(ctx->ac.builder, interp_el,
2977 ctx->ac.f32, "");
2978
2979 temp1 = ac_build_fmad(&ctx->ac, ddx_el, src_c0, interp_el);
2980 temp2 = ac_build_fmad(&ctx->ac, ddy_el, src_c1, temp1);
2981
2982 ij_out[i] = LLVMBuildBitCast(ctx->ac.builder,
2983 temp2, ctx->ac.i32, "");
2984 }
2985 interp_param = ac_build_gather_values(&ctx->ac, ij_out, 2);
2986 return LLVMBuildBitCast(ctx->ac.builder, interp_param, ctx->ac.v2i32, "");
2987 }
2988
2989 static LLVMValueRef barycentric_centroid(struct ac_nir_context *ctx,
2990 unsigned mode)
2991 {
2992 LLVMValueRef interp_param = ctx->abi->lookup_interp_param(ctx->abi, mode, INTERP_CENTROID);
2993 return LLVMBuildBitCast(ctx->ac.builder, interp_param, ctx->ac.v2i32, "");
2994 }
2995
2996 static LLVMValueRef barycentric_at_sample(struct ac_nir_context *ctx,
2997 unsigned mode,
2998 LLVMValueRef sample_id)
2999 {
3000 LLVMValueRef halfval = LLVMConstReal(ctx->ac.f32, 0.5f);
3001
3002 /* fetch sample ID */
3003 LLVMValueRef sample_pos = ctx->abi->load_sample_position(ctx->abi, sample_id);
3004
3005 LLVMValueRef src_c0 = LLVMBuildExtractElement(ctx->ac.builder, sample_pos, ctx->ac.i32_0, "");
3006 src_c0 = LLVMBuildFSub(ctx->ac.builder, src_c0, halfval, "");
3007 LLVMValueRef src_c1 = LLVMBuildExtractElement(ctx->ac.builder, sample_pos, ctx->ac.i32_1, "");
3008 src_c1 = LLVMBuildFSub(ctx->ac.builder, src_c1, halfval, "");
3009 LLVMValueRef coords[] = { src_c0, src_c1 };
3010 LLVMValueRef offset = ac_build_gather_values(&ctx->ac, coords, 2);
3011
3012 return barycentric_offset(ctx, mode, offset);
3013 }
3014
3015
3016 static LLVMValueRef barycentric_sample(struct ac_nir_context *ctx,
3017 unsigned mode)
3018 {
3019 LLVMValueRef interp_param = ctx->abi->lookup_interp_param(ctx->abi, mode, INTERP_SAMPLE);
3020 return LLVMBuildBitCast(ctx->ac.builder, interp_param, ctx->ac.v2i32, "");
3021 }
3022
3023 static LLVMValueRef load_interpolated_input(struct ac_nir_context *ctx,
3024 LLVMValueRef interp_param,
3025 unsigned index, unsigned comp_start,
3026 unsigned num_components,
3027 unsigned bitsize)
3028 {
3029 LLVMValueRef attr_number = LLVMConstInt(ctx->ac.i32, index, false);
3030
3031 interp_param = LLVMBuildBitCast(ctx->ac.builder,
3032 interp_param, ctx->ac.v2f32, "");
3033 LLVMValueRef i = LLVMBuildExtractElement(
3034 ctx->ac.builder, interp_param, ctx->ac.i32_0, "");
3035 LLVMValueRef j = LLVMBuildExtractElement(
3036 ctx->ac.builder, interp_param, ctx->ac.i32_1, "");
3037
3038 LLVMValueRef values[4];
3039 assert(bitsize == 16 || bitsize == 32);
3040 for (unsigned comp = 0; comp < num_components; comp++) {
3041 LLVMValueRef llvm_chan = LLVMConstInt(ctx->ac.i32, comp_start + comp, false);
3042 if (bitsize == 16) {
3043 values[comp] = ac_build_fs_interp_f16(&ctx->ac, llvm_chan, attr_number,
3044 ctx->abi->prim_mask, i, j);
3045 } else {
3046 values[comp] = ac_build_fs_interp(&ctx->ac, llvm_chan, attr_number,
3047 ctx->abi->prim_mask, i, j);
3048 }
3049 }
3050
3051 return ac_to_integer(&ctx->ac, ac_build_gather_values(&ctx->ac, values, num_components));
3052 }
3053
3054 static LLVMValueRef load_flat_input(struct ac_nir_context *ctx,
3055 unsigned index, unsigned comp_start,
3056 unsigned num_components,
3057 unsigned bit_size)
3058 {
3059 LLVMValueRef attr_number = LLVMConstInt(ctx->ac.i32, index, false);
3060
3061 LLVMValueRef values[8];
3062
3063 /* Each component of a 64-bit value takes up two GL-level channels. */
3064 unsigned channels =
3065 bit_size == 64 ? num_components * 2 : num_components;
3066
3067 for (unsigned chan = 0; chan < channels; chan++) {
3068 if (comp_start + chan > 4)
3069 attr_number = LLVMConstInt(ctx->ac.i32, index + 1, false);
3070 LLVMValueRef llvm_chan = LLVMConstInt(ctx->ac.i32, (comp_start + chan) % 4, false);
3071 values[chan] = ac_build_fs_interp_mov(&ctx->ac,
3072 LLVMConstInt(ctx->ac.i32, 2, false),
3073 llvm_chan,
3074 attr_number,
3075 ctx->abi->prim_mask);
3076 values[chan] = LLVMBuildBitCast(ctx->ac.builder, values[chan], ctx->ac.i32, "");
3077 values[chan] = LLVMBuildTruncOrBitCast(ctx->ac.builder, values[chan],
3078 bit_size == 16 ? ctx->ac.i16 : ctx->ac.i32, "");
3079 }
3080
3081 LLVMValueRef result = ac_build_gather_values(&ctx->ac, values, channels);
3082 if (bit_size == 64) {
3083 LLVMTypeRef type = num_components == 1 ? ctx->ac.i64 :
3084 LLVMVectorType(ctx->ac.i64, num_components);
3085 result = LLVMBuildBitCast(ctx->ac.builder, result, type, "");
3086 }
3087 return result;
3088 }
3089
3090 static void visit_intrinsic(struct ac_nir_context *ctx,
3091 nir_intrinsic_instr *instr)
3092 {
3093 LLVMValueRef result = NULL;
3094
3095 switch (instr->intrinsic) {
3096 case nir_intrinsic_ballot:
3097 result = ac_build_ballot(&ctx->ac, get_src(ctx, instr->src[0]));
3098 break;
3099 case nir_intrinsic_read_invocation:
3100 result = ac_build_readlane(&ctx->ac, get_src(ctx, instr->src[0]),
3101 get_src(ctx, instr->src[1]));
3102 break;
3103 case nir_intrinsic_read_first_invocation:
3104 result = ac_build_readlane(&ctx->ac, get_src(ctx, instr->src[0]), NULL);
3105 break;
3106 case nir_intrinsic_load_subgroup_invocation:
3107 result = ac_get_thread_id(&ctx->ac);
3108 break;
3109 case nir_intrinsic_load_work_group_id: {
3110 LLVMValueRef values[3];
3111
3112 for (int i = 0; i < 3; i++) {
3113 values[i] = ctx->abi->workgroup_ids[i] ?
3114 ctx->abi->workgroup_ids[i] : ctx->ac.i32_0;
3115 }
3116
3117 result = ac_build_gather_values(&ctx->ac, values, 3);
3118 break;
3119 }
3120 case nir_intrinsic_load_base_vertex:
3121 case nir_intrinsic_load_first_vertex:
3122 result = ctx->abi->load_base_vertex(ctx->abi);
3123 break;
3124 case nir_intrinsic_load_local_group_size:
3125 result = ctx->abi->load_local_group_size(ctx->abi);
3126 break;
3127 case nir_intrinsic_load_vertex_id:
3128 result = LLVMBuildAdd(ctx->ac.builder, ctx->abi->vertex_id,
3129 ctx->abi->base_vertex, "");
3130 break;
3131 case nir_intrinsic_load_vertex_id_zero_base: {
3132 result = ctx->abi->vertex_id;
3133 break;
3134 }
3135 case nir_intrinsic_load_local_invocation_id: {
3136 result = ctx->abi->local_invocation_ids;
3137 break;
3138 }
3139 case nir_intrinsic_load_base_instance:
3140 result = ctx->abi->start_instance;
3141 break;
3142 case nir_intrinsic_load_draw_id:
3143 result = ctx->abi->draw_id;
3144 break;
3145 case nir_intrinsic_load_view_index:
3146 result = ctx->abi->view_index;
3147 break;
3148 case nir_intrinsic_load_invocation_id:
3149 if (ctx->stage == MESA_SHADER_TESS_CTRL) {
3150 result = ac_unpack_param(&ctx->ac, ctx->abi->tcs_rel_ids, 8, 5);
3151 } else {
3152 if (ctx->ac.chip_class >= GFX10) {
3153 result = LLVMBuildAnd(ctx->ac.builder,
3154 ctx->abi->gs_invocation_id,
3155 LLVMConstInt(ctx->ac.i32, 127, 0), "");
3156 } else {
3157 result = ctx->abi->gs_invocation_id;
3158 }
3159 }
3160 break;
3161 case nir_intrinsic_load_primitive_id:
3162 if (ctx->stage == MESA_SHADER_GEOMETRY) {
3163 result = ctx->abi->gs_prim_id;
3164 } else if (ctx->stage == MESA_SHADER_TESS_CTRL) {
3165 result = ctx->abi->tcs_patch_id;
3166 } else if (ctx->stage == MESA_SHADER_TESS_EVAL) {
3167 result = ctx->abi->tes_patch_id;
3168 } else
3169 fprintf(stderr, "Unknown primitive id intrinsic: %d", ctx->stage);
3170 break;
3171 case nir_intrinsic_load_sample_id:
3172 result = ac_unpack_param(&ctx->ac, ctx->abi->ancillary, 8, 4);
3173 break;
3174 case nir_intrinsic_load_sample_pos:
3175 result = load_sample_pos(ctx);
3176 break;
3177 case nir_intrinsic_load_sample_mask_in:
3178 result = ctx->abi->load_sample_mask_in(ctx->abi);
3179 break;
3180 case nir_intrinsic_load_frag_coord: {
3181 LLVMValueRef values[4] = {
3182 ctx->abi->frag_pos[0],
3183 ctx->abi->frag_pos[1],
3184 ctx->abi->frag_pos[2],
3185 ac_build_fdiv(&ctx->ac, ctx->ac.f32_1, ctx->abi->frag_pos[3])
3186 };
3187 result = ac_to_integer(&ctx->ac,
3188 ac_build_gather_values(&ctx->ac, values, 4));
3189 break;
3190 }
3191 case nir_intrinsic_load_layer_id:
3192 result = ctx->abi->inputs[ac_llvm_reg_index_soa(VARYING_SLOT_LAYER, 0)];
3193 break;
3194 case nir_intrinsic_load_front_face:
3195 result = ctx->abi->front_face;
3196 break;
3197 case nir_intrinsic_load_helper_invocation:
3198 result = ac_build_load_helper_invocation(&ctx->ac);
3199 break;
3200 case nir_intrinsic_load_color0:
3201 result = ctx->abi->color0;
3202 break;
3203 case nir_intrinsic_load_color1:
3204 result = ctx->abi->color1;
3205 break;
3206 case nir_intrinsic_load_instance_id:
3207 result = ctx->abi->instance_id;
3208 break;
3209 case nir_intrinsic_load_num_work_groups:
3210 result = ctx->abi->num_work_groups;
3211 break;
3212 case nir_intrinsic_load_local_invocation_index:
3213 result = visit_load_local_invocation_index(ctx);
3214 break;
3215 case nir_intrinsic_load_subgroup_id:
3216 result = visit_load_subgroup_id(ctx);
3217 break;
3218 case nir_intrinsic_load_num_subgroups:
3219 result = visit_load_num_subgroups(ctx);
3220 break;
3221 case nir_intrinsic_first_invocation:
3222 result = visit_first_invocation(ctx);
3223 break;
3224 case nir_intrinsic_load_push_constant:
3225 result = visit_load_push_constant(ctx, instr);
3226 break;
3227 case nir_intrinsic_vulkan_resource_index: {
3228 LLVMValueRef index = get_src(ctx, instr->src[0]);
3229 unsigned desc_set = nir_intrinsic_desc_set(instr);
3230 unsigned binding = nir_intrinsic_binding(instr);
3231
3232 result = ctx->abi->load_resource(ctx->abi, index, desc_set,
3233 binding);
3234 break;
3235 }
3236 case nir_intrinsic_vulkan_resource_reindex:
3237 result = visit_vulkan_resource_reindex(ctx, instr);
3238 break;
3239 case nir_intrinsic_store_ssbo:
3240 visit_store_ssbo(ctx, instr);
3241 break;
3242 case nir_intrinsic_load_ssbo:
3243 result = visit_load_buffer(ctx, instr);
3244 break;
3245 case nir_intrinsic_ssbo_atomic_add:
3246 case nir_intrinsic_ssbo_atomic_imin:
3247 case nir_intrinsic_ssbo_atomic_umin:
3248 case nir_intrinsic_ssbo_atomic_imax:
3249 case nir_intrinsic_ssbo_atomic_umax:
3250 case nir_intrinsic_ssbo_atomic_and:
3251 case nir_intrinsic_ssbo_atomic_or:
3252 case nir_intrinsic_ssbo_atomic_xor:
3253 case nir_intrinsic_ssbo_atomic_exchange:
3254 case nir_intrinsic_ssbo_atomic_comp_swap:
3255 result = visit_atomic_ssbo(ctx, instr);
3256 break;
3257 case nir_intrinsic_load_ubo:
3258 result = visit_load_ubo_buffer(ctx, instr);
3259 break;
3260 case nir_intrinsic_get_buffer_size:
3261 result = visit_get_buffer_size(ctx, instr);
3262 break;
3263 case nir_intrinsic_load_deref:
3264 result = visit_load_var(ctx, instr);
3265 break;
3266 case nir_intrinsic_store_deref:
3267 visit_store_var(ctx, instr);
3268 break;
3269 case nir_intrinsic_load_shared:
3270 result = visit_load_shared(ctx, instr);
3271 break;
3272 case nir_intrinsic_store_shared:
3273 visit_store_shared(ctx, instr);
3274 break;
3275 case nir_intrinsic_bindless_image_samples:
3276 result = visit_image_samples(ctx, instr, true);
3277 break;
3278 case nir_intrinsic_image_deref_samples:
3279 result = visit_image_samples(ctx, instr, false);
3280 break;
3281 case nir_intrinsic_bindless_image_load:
3282 result = visit_image_load(ctx, instr, true);
3283 break;
3284 case nir_intrinsic_image_deref_load:
3285 result = visit_image_load(ctx, instr, false);
3286 break;
3287 case nir_intrinsic_bindless_image_store:
3288 visit_image_store(ctx, instr, true);
3289 break;
3290 case nir_intrinsic_image_deref_store:
3291 visit_image_store(ctx, instr, false);
3292 break;
3293 case nir_intrinsic_bindless_image_atomic_add:
3294 case nir_intrinsic_bindless_image_atomic_min:
3295 case nir_intrinsic_bindless_image_atomic_max:
3296 case nir_intrinsic_bindless_image_atomic_and:
3297 case nir_intrinsic_bindless_image_atomic_or:
3298 case nir_intrinsic_bindless_image_atomic_xor:
3299 case nir_intrinsic_bindless_image_atomic_exchange:
3300 case nir_intrinsic_bindless_image_atomic_comp_swap:
3301 result = visit_image_atomic(ctx, instr, true);
3302 break;
3303 case nir_intrinsic_image_deref_atomic_add:
3304 case nir_intrinsic_image_deref_atomic_min:
3305 case nir_intrinsic_image_deref_atomic_max:
3306 case nir_intrinsic_image_deref_atomic_and:
3307 case nir_intrinsic_image_deref_atomic_or:
3308 case nir_intrinsic_image_deref_atomic_xor:
3309 case nir_intrinsic_image_deref_atomic_exchange:
3310 case nir_intrinsic_image_deref_atomic_comp_swap:
3311 result = visit_image_atomic(ctx, instr, false);
3312 break;
3313 case nir_intrinsic_bindless_image_size:
3314 result = visit_image_size(ctx, instr, true);
3315 break;
3316 case nir_intrinsic_image_deref_size:
3317 result = visit_image_size(ctx, instr, false);
3318 break;
3319 case nir_intrinsic_shader_clock:
3320 result = ac_build_shader_clock(&ctx->ac);
3321 break;
3322 case nir_intrinsic_discard:
3323 case nir_intrinsic_discard_if:
3324 emit_discard(ctx, instr);
3325 break;
3326 case nir_intrinsic_memory_barrier:
3327 case nir_intrinsic_group_memory_barrier:
3328 case nir_intrinsic_memory_barrier_atomic_counter:
3329 case nir_intrinsic_memory_barrier_buffer:
3330 case nir_intrinsic_memory_barrier_image:
3331 case nir_intrinsic_memory_barrier_shared:
3332 emit_membar(&ctx->ac, instr);
3333 break;
3334 case nir_intrinsic_barrier:
3335 ac_emit_barrier(&ctx->ac, ctx->stage);
3336 break;
3337 case nir_intrinsic_shared_atomic_add:
3338 case nir_intrinsic_shared_atomic_imin:
3339 case nir_intrinsic_shared_atomic_umin:
3340 case nir_intrinsic_shared_atomic_imax:
3341 case nir_intrinsic_shared_atomic_umax:
3342 case nir_intrinsic_shared_atomic_and:
3343 case nir_intrinsic_shared_atomic_or:
3344 case nir_intrinsic_shared_atomic_xor:
3345 case nir_intrinsic_shared_atomic_exchange:
3346 case nir_intrinsic_shared_atomic_comp_swap: {
3347 LLVMValueRef ptr = get_memory_ptr(ctx, instr->src[0]);
3348 result = visit_var_atomic(ctx, instr, ptr, 1);
3349 break;
3350 }
3351 case nir_intrinsic_deref_atomic_add:
3352 case nir_intrinsic_deref_atomic_imin:
3353 case nir_intrinsic_deref_atomic_umin:
3354 case nir_intrinsic_deref_atomic_imax:
3355 case nir_intrinsic_deref_atomic_umax:
3356 case nir_intrinsic_deref_atomic_and:
3357 case nir_intrinsic_deref_atomic_or:
3358 case nir_intrinsic_deref_atomic_xor:
3359 case nir_intrinsic_deref_atomic_exchange:
3360 case nir_intrinsic_deref_atomic_comp_swap: {
3361 LLVMValueRef ptr = get_src(ctx, instr->src[0]);
3362 result = visit_var_atomic(ctx, instr, ptr, 1);
3363 break;
3364 }
3365 case nir_intrinsic_load_barycentric_pixel:
3366 result = barycentric_center(ctx, nir_intrinsic_interp_mode(instr));
3367 break;
3368 case nir_intrinsic_load_barycentric_centroid:
3369 result = barycentric_centroid(ctx, nir_intrinsic_interp_mode(instr));
3370 break;
3371 case nir_intrinsic_load_barycentric_sample:
3372 result = barycentric_sample(ctx, nir_intrinsic_interp_mode(instr));
3373 break;
3374 case nir_intrinsic_load_barycentric_at_offset: {
3375 LLVMValueRef offset = ac_to_float(&ctx->ac, get_src(ctx, instr->src[0]));
3376 result = barycentric_offset(ctx, nir_intrinsic_interp_mode(instr), offset);
3377 break;
3378 }
3379 case nir_intrinsic_load_barycentric_at_sample: {
3380 LLVMValueRef sample_id = get_src(ctx, instr->src[0]);
3381 result = barycentric_at_sample(ctx, nir_intrinsic_interp_mode(instr), sample_id);
3382 break;
3383 }
3384 case nir_intrinsic_load_interpolated_input: {
3385 /* We assume any indirect loads have been lowered away */
3386 MAYBE_UNUSED nir_const_value *offset = nir_src_as_const_value(instr->src[1]);
3387 assert(offset);
3388 assert(offset[0].i32 == 0);
3389
3390 LLVMValueRef interp_param = get_src(ctx, instr->src[0]);
3391 unsigned index = nir_intrinsic_base(instr);
3392 unsigned component = nir_intrinsic_component(instr);
3393 result = load_interpolated_input(ctx, interp_param, index,
3394 component,
3395 instr->dest.ssa.num_components,
3396 instr->dest.ssa.bit_size);
3397 break;
3398 }
3399 case nir_intrinsic_load_input: {
3400 /* We only lower inputs for fragment shaders ATM */
3401 MAYBE_UNUSED nir_const_value *offset = nir_src_as_const_value(instr->src[0]);
3402 assert(offset);
3403 assert(offset[0].i32 == 0);
3404
3405 unsigned index = nir_intrinsic_base(instr);
3406 unsigned component = nir_intrinsic_component(instr);
3407 result = load_flat_input(ctx, index, component,
3408 instr->dest.ssa.num_components,
3409 instr->dest.ssa.bit_size);
3410 break;
3411 }
3412 case nir_intrinsic_emit_vertex:
3413 ctx->abi->emit_vertex(ctx->abi, nir_intrinsic_stream_id(instr), ctx->abi->outputs);
3414 break;
3415 case nir_intrinsic_end_primitive:
3416 ctx->abi->emit_primitive(ctx->abi, nir_intrinsic_stream_id(instr));
3417 break;
3418 case nir_intrinsic_load_tess_coord:
3419 result = ctx->abi->load_tess_coord(ctx->abi);
3420 break;
3421 case nir_intrinsic_load_tess_level_outer:
3422 result = ctx->abi->load_tess_level(ctx->abi, VARYING_SLOT_TESS_LEVEL_OUTER);
3423 break;
3424 case nir_intrinsic_load_tess_level_inner:
3425 result = ctx->abi->load_tess_level(ctx->abi, VARYING_SLOT_TESS_LEVEL_INNER);
3426 break;
3427 case nir_intrinsic_load_patch_vertices_in:
3428 result = ctx->abi->load_patch_vertices_in(ctx->abi);
3429 break;
3430 case nir_intrinsic_vote_all: {
3431 LLVMValueRef tmp = ac_build_vote_all(&ctx->ac, get_src(ctx, instr->src[0]));
3432 result = LLVMBuildSExt(ctx->ac.builder, tmp, ctx->ac.i32, "");
3433 break;
3434 }
3435 case nir_intrinsic_vote_any: {
3436 LLVMValueRef tmp = ac_build_vote_any(&ctx->ac, get_src(ctx, instr->src[0]));
3437 result = LLVMBuildSExt(ctx->ac.builder, tmp, ctx->ac.i32, "");
3438 break;
3439 }
3440 case nir_intrinsic_shuffle:
3441 result = ac_build_shuffle(&ctx->ac, get_src(ctx, instr->src[0]),
3442 get_src(ctx, instr->src[1]));
3443 break;
3444 case nir_intrinsic_reduce:
3445 result = ac_build_reduce(&ctx->ac,
3446 get_src(ctx, instr->src[0]),
3447 instr->const_index[0],
3448 instr->const_index[1]);
3449 break;
3450 case nir_intrinsic_inclusive_scan:
3451 result = ac_build_inclusive_scan(&ctx->ac,
3452 get_src(ctx, instr->src[0]),
3453 instr->const_index[0]);
3454 break;
3455 case nir_intrinsic_exclusive_scan:
3456 result = ac_build_exclusive_scan(&ctx->ac,
3457 get_src(ctx, instr->src[0]),
3458 instr->const_index[0]);
3459 break;
3460 case nir_intrinsic_quad_broadcast: {
3461 unsigned lane = nir_src_as_uint(instr->src[1]);
3462 result = ac_build_quad_swizzle(&ctx->ac, get_src(ctx, instr->src[0]),
3463 lane, lane, lane, lane);
3464 break;
3465 }
3466 case nir_intrinsic_quad_swap_horizontal:
3467 result = ac_build_quad_swizzle(&ctx->ac, get_src(ctx, instr->src[0]), 1, 0, 3 ,2);
3468 break;
3469 case nir_intrinsic_quad_swap_vertical:
3470 result = ac_build_quad_swizzle(&ctx->ac, get_src(ctx, instr->src[0]), 2, 3, 0 ,1);
3471 break;
3472 case nir_intrinsic_quad_swap_diagonal:
3473 result = ac_build_quad_swizzle(&ctx->ac, get_src(ctx, instr->src[0]), 3, 2, 1 ,0);
3474 break;
3475 case nir_intrinsic_quad_swizzle_amd: {
3476 uint32_t mask = nir_intrinsic_swizzle_mask(instr);
3477 result = ac_build_quad_swizzle(&ctx->ac, get_src(ctx, instr->src[0]),
3478 mask & 0x3, (mask >> 2) & 0x3,
3479 (mask >> 4) & 0x3, (mask >> 6) & 0x3);
3480 break;
3481 }
3482 case nir_intrinsic_masked_swizzle_amd: {
3483 uint32_t mask = nir_intrinsic_swizzle_mask(instr);
3484 result = ac_build_ds_swizzle(&ctx->ac, get_src(ctx, instr->src[0]), mask);
3485 break;
3486 }
3487 case nir_intrinsic_write_invocation_amd:
3488 result = ac_build_writelane(&ctx->ac, get_src(ctx, instr->src[0]),
3489 get_src(ctx, instr->src[1]),
3490 get_src(ctx, instr->src[2]));
3491 break;
3492 case nir_intrinsic_mbcnt_amd:
3493 result = ac_build_mbcnt(&ctx->ac, get_src(ctx, instr->src[0]));
3494 break;
3495 default:
3496 fprintf(stderr, "Unknown intrinsic: ");
3497 nir_print_instr(&instr->instr, stderr);
3498 fprintf(stderr, "\n");
3499 break;
3500 }
3501 if (result) {
3502 ctx->ssa_defs[instr->dest.ssa.index] = result;
3503 }
3504 }
3505
3506 static LLVMValueRef get_bindless_index_from_uniform(struct ac_nir_context *ctx,
3507 unsigned base_index,
3508 unsigned constant_index,
3509 LLVMValueRef dynamic_index)
3510 {
3511 LLVMValueRef offset = LLVMConstInt(ctx->ac.i32, base_index * 4, 0);
3512 LLVMValueRef index = LLVMBuildAdd(ctx->ac.builder, dynamic_index,
3513 LLVMConstInt(ctx->ac.i32, constant_index, 0), "");
3514
3515 /* Bindless uniforms are 64bit so multiple index by 8 */
3516 index = LLVMBuildMul(ctx->ac.builder, index, LLVMConstInt(ctx->ac.i32, 8, 0), "");
3517 offset = LLVMBuildAdd(ctx->ac.builder, offset, index, "");
3518
3519 LLVMValueRef ubo_index = ctx->abi->load_ubo(ctx->abi, ctx->ac.i32_0);
3520
3521 LLVMValueRef ret = ac_build_buffer_load(&ctx->ac, ubo_index, 1, NULL, offset,
3522 NULL, 0, 0, true, true);
3523
3524 return LLVMBuildBitCast(ctx->ac.builder, ret, ctx->ac.i32, "");
3525 }
3526
3527 static LLVMValueRef get_sampler_desc(struct ac_nir_context *ctx,
3528 nir_deref_instr *deref_instr,
3529 enum ac_descriptor_type desc_type,
3530 const nir_instr *instr,
3531 bool image, bool write)
3532 {
3533 LLVMValueRef index = NULL;
3534 unsigned constant_index = 0;
3535 unsigned descriptor_set;
3536 unsigned base_index;
3537 bool bindless = false;
3538
3539 if (!deref_instr) {
3540 descriptor_set = 0;
3541 if (image) {
3542 nir_intrinsic_instr *img_instr = nir_instr_as_intrinsic(instr);
3543 base_index = 0;
3544 bindless = true;
3545 index = get_src(ctx, img_instr->src[0]);
3546 } else {
3547 nir_tex_instr *tex_instr = nir_instr_as_tex(instr);
3548 int sampSrcIdx = nir_tex_instr_src_index(tex_instr,
3549 nir_tex_src_sampler_handle);
3550 if (sampSrcIdx != -1) {
3551 base_index = 0;
3552 bindless = true;
3553 index = get_src(ctx, tex_instr->src[sampSrcIdx].src);
3554 } else {
3555 assert(tex_instr && !image);
3556 base_index = tex_instr->sampler_index;
3557 }
3558 }
3559 } else {
3560 while(deref_instr->deref_type != nir_deref_type_var) {
3561 if (deref_instr->deref_type == nir_deref_type_array) {
3562 unsigned array_size = glsl_get_aoa_size(deref_instr->type);
3563 if (!array_size)
3564 array_size = 1;
3565
3566 if (nir_src_is_const(deref_instr->arr.index)) {
3567 constant_index += array_size * nir_src_as_uint(deref_instr->arr.index);
3568 } else {
3569 LLVMValueRef indirect = get_src(ctx, deref_instr->arr.index);
3570
3571 indirect = LLVMBuildMul(ctx->ac.builder, indirect,
3572 LLVMConstInt(ctx->ac.i32, array_size, false), "");
3573
3574 if (!index)
3575 index = indirect;
3576 else
3577 index = LLVMBuildAdd(ctx->ac.builder, index, indirect, "");
3578 }
3579
3580 deref_instr = nir_src_as_deref(deref_instr->parent);
3581 } else if (deref_instr->deref_type == nir_deref_type_struct) {
3582 unsigned sidx = deref_instr->strct.index;
3583 deref_instr = nir_src_as_deref(deref_instr->parent);
3584 constant_index += glsl_get_struct_location_offset(deref_instr->type, sidx);
3585 } else {
3586 unreachable("Unsupported deref type");
3587 }
3588 }
3589 descriptor_set = deref_instr->var->data.descriptor_set;
3590
3591 if (deref_instr->var->data.bindless) {
3592 /* For now just assert on unhandled variable types */
3593 assert(deref_instr->var->data.mode == nir_var_uniform);
3594
3595 base_index = deref_instr->var->data.driver_location;
3596 bindless = true;
3597
3598 index = index ? index : ctx->ac.i32_0;
3599 index = get_bindless_index_from_uniform(ctx, base_index,
3600 constant_index, index);
3601 } else
3602 base_index = deref_instr->var->data.binding;
3603 }
3604
3605 return ctx->abi->load_sampler_desc(ctx->abi,
3606 descriptor_set,
3607 base_index,
3608 constant_index, index,
3609 desc_type, image, write, bindless);
3610 }
3611
3612 /* Disable anisotropic filtering if BASE_LEVEL == LAST_LEVEL.
3613 *
3614 * GFX6-GFX7:
3615 * If BASE_LEVEL == LAST_LEVEL, the shader must disable anisotropic
3616 * filtering manually. The driver sets img7 to a mask clearing
3617 * MAX_ANISO_RATIO if BASE_LEVEL == LAST_LEVEL. The shader must do:
3618 * s_and_b32 samp0, samp0, img7
3619 *
3620 * GFX8:
3621 * The ANISO_OVERRIDE sampler field enables this fix in TA.
3622 */
3623 static LLVMValueRef sici_fix_sampler_aniso(struct ac_nir_context *ctx,
3624 LLVMValueRef res, LLVMValueRef samp)
3625 {
3626 LLVMBuilderRef builder = ctx->ac.builder;
3627 LLVMValueRef img7, samp0;
3628
3629 if (ctx->ac.chip_class >= GFX8)
3630 return samp;
3631
3632 img7 = LLVMBuildExtractElement(builder, res,
3633 LLVMConstInt(ctx->ac.i32, 7, 0), "");
3634 samp0 = LLVMBuildExtractElement(builder, samp,
3635 LLVMConstInt(ctx->ac.i32, 0, 0), "");
3636 samp0 = LLVMBuildAnd(builder, samp0, img7, "");
3637 return LLVMBuildInsertElement(builder, samp, samp0,
3638 LLVMConstInt(ctx->ac.i32, 0, 0), "");
3639 }
3640
3641 static void tex_fetch_ptrs(struct ac_nir_context *ctx,
3642 nir_tex_instr *instr,
3643 LLVMValueRef *res_ptr, LLVMValueRef *samp_ptr,
3644 LLVMValueRef *fmask_ptr)
3645 {
3646 nir_deref_instr *texture_deref_instr = NULL;
3647 nir_deref_instr *sampler_deref_instr = NULL;
3648 int plane = -1;
3649
3650 for (unsigned i = 0; i < instr->num_srcs; i++) {
3651 switch (instr->src[i].src_type) {
3652 case nir_tex_src_texture_deref:
3653 texture_deref_instr = nir_src_as_deref(instr->src[i].src);
3654 break;
3655 case nir_tex_src_sampler_deref:
3656 sampler_deref_instr = nir_src_as_deref(instr->src[i].src);
3657 break;
3658 case nir_tex_src_plane:
3659 plane = nir_src_as_int(instr->src[i].src);
3660 break;
3661 default:
3662 break;
3663 }
3664 }
3665
3666 if (!sampler_deref_instr)
3667 sampler_deref_instr = texture_deref_instr;
3668
3669 enum ac_descriptor_type main_descriptor = instr->sampler_dim == GLSL_SAMPLER_DIM_BUF ? AC_DESC_BUFFER : AC_DESC_IMAGE;
3670
3671 if (plane >= 0) {
3672 assert(instr->op != nir_texop_txf_ms &&
3673 instr->op != nir_texop_samples_identical);
3674 assert(instr->sampler_dim != GLSL_SAMPLER_DIM_BUF);
3675
3676 main_descriptor = AC_DESC_PLANE_0 + plane;
3677 }
3678
3679 *res_ptr = get_sampler_desc(ctx, texture_deref_instr, main_descriptor, &instr->instr, false, false);
3680
3681 if (samp_ptr) {
3682 *samp_ptr = get_sampler_desc(ctx, sampler_deref_instr, AC_DESC_SAMPLER, &instr->instr, false, false);
3683 if (instr->sampler_dim < GLSL_SAMPLER_DIM_RECT)
3684 *samp_ptr = sici_fix_sampler_aniso(ctx, *res_ptr, *samp_ptr);
3685 }
3686 if (fmask_ptr && (instr->op == nir_texop_txf_ms ||
3687 instr->op == nir_texop_samples_identical))
3688 *fmask_ptr = get_sampler_desc(ctx, texture_deref_instr, AC_DESC_FMASK, &instr->instr, false, false);
3689 }
3690
3691 static LLVMValueRef apply_round_slice(struct ac_llvm_context *ctx,
3692 LLVMValueRef coord)
3693 {
3694 coord = ac_to_float(ctx, coord);
3695 coord = ac_build_round(ctx, coord);
3696 coord = ac_to_integer(ctx, coord);
3697 return coord;
3698 }
3699
3700 static void visit_tex(struct ac_nir_context *ctx, nir_tex_instr *instr)
3701 {
3702 LLVMValueRef result = NULL;
3703 struct ac_image_args args = { 0 };
3704 LLVMValueRef fmask_ptr = NULL, sample_index = NULL;
3705 LLVMValueRef ddx = NULL, ddy = NULL;
3706 unsigned offset_src = 0;
3707
3708 tex_fetch_ptrs(ctx, instr, &args.resource, &args.sampler, &fmask_ptr);
3709
3710 for (unsigned i = 0; i < instr->num_srcs; i++) {
3711 switch (instr->src[i].src_type) {
3712 case nir_tex_src_coord: {
3713 LLVMValueRef coord = get_src(ctx, instr->src[i].src);
3714 for (unsigned chan = 0; chan < instr->coord_components; ++chan)
3715 args.coords[chan] = ac_llvm_extract_elem(&ctx->ac, coord, chan);
3716 break;
3717 }
3718 case nir_tex_src_projector:
3719 break;
3720 case nir_tex_src_comparator:
3721 if (instr->is_shadow)
3722 args.compare = get_src(ctx, instr->src[i].src);
3723 break;
3724 case nir_tex_src_offset:
3725 args.offset = get_src(ctx, instr->src[i].src);
3726 offset_src = i;
3727 break;
3728 case nir_tex_src_bias:
3729 if (instr->op == nir_texop_txb)
3730 args.bias = get_src(ctx, instr->src[i].src);
3731 break;
3732 case nir_tex_src_lod: {
3733 if (nir_src_is_const(instr->src[i].src) && nir_src_as_uint(instr->src[i].src) == 0)
3734 args.level_zero = true;
3735 else
3736 args.lod = get_src(ctx, instr->src[i].src);
3737 break;
3738 }
3739 case nir_tex_src_ms_index:
3740 sample_index = get_src(ctx, instr->src[i].src);
3741 break;
3742 case nir_tex_src_ms_mcs:
3743 break;
3744 case nir_tex_src_ddx:
3745 ddx = get_src(ctx, instr->src[i].src);
3746 break;
3747 case nir_tex_src_ddy:
3748 ddy = get_src(ctx, instr->src[i].src);
3749 break;
3750 case nir_tex_src_texture_offset:
3751 case nir_tex_src_sampler_offset:
3752 case nir_tex_src_plane:
3753 default:
3754 break;
3755 }
3756 }
3757
3758 if (instr->op == nir_texop_txs && instr->sampler_dim == GLSL_SAMPLER_DIM_BUF) {
3759 result = get_buffer_size(ctx, args.resource, true);
3760 goto write_result;
3761 }
3762
3763 if (instr->op == nir_texop_texture_samples) {
3764 LLVMValueRef res, samples, is_msaa;
3765 res = LLVMBuildBitCast(ctx->ac.builder, args.resource, ctx->ac.v8i32, "");
3766 samples = LLVMBuildExtractElement(ctx->ac.builder, res,
3767 LLVMConstInt(ctx->ac.i32, 3, false), "");
3768 is_msaa = LLVMBuildLShr(ctx->ac.builder, samples,
3769 LLVMConstInt(ctx->ac.i32, 28, false), "");
3770 is_msaa = LLVMBuildAnd(ctx->ac.builder, is_msaa,
3771 LLVMConstInt(ctx->ac.i32, 0xe, false), "");
3772 is_msaa = LLVMBuildICmp(ctx->ac.builder, LLVMIntEQ, is_msaa,
3773 LLVMConstInt(ctx->ac.i32, 0xe, false), "");
3774
3775 samples = LLVMBuildLShr(ctx->ac.builder, samples,
3776 LLVMConstInt(ctx->ac.i32, 16, false), "");
3777 samples = LLVMBuildAnd(ctx->ac.builder, samples,
3778 LLVMConstInt(ctx->ac.i32, 0xf, false), "");
3779 samples = LLVMBuildShl(ctx->ac.builder, ctx->ac.i32_1,
3780 samples, "");
3781 samples = LLVMBuildSelect(ctx->ac.builder, is_msaa, samples,
3782 ctx->ac.i32_1, "");
3783 result = samples;
3784 goto write_result;
3785 }
3786
3787 if (args.offset && instr->op != nir_texop_txf) {
3788 LLVMValueRef offset[3], pack;
3789 for (unsigned chan = 0; chan < 3; ++chan)
3790 offset[chan] = ctx->ac.i32_0;
3791
3792 unsigned num_components = ac_get_llvm_num_components(args.offset);
3793 for (unsigned chan = 0; chan < num_components; chan++) {
3794 offset[chan] = ac_llvm_extract_elem(&ctx->ac, args.offset, chan);
3795 offset[chan] = LLVMBuildAnd(ctx->ac.builder, offset[chan],
3796 LLVMConstInt(ctx->ac.i32, 0x3f, false), "");
3797 if (chan)
3798 offset[chan] = LLVMBuildShl(ctx->ac.builder, offset[chan],
3799 LLVMConstInt(ctx->ac.i32, chan * 8, false), "");
3800 }
3801 pack = LLVMBuildOr(ctx->ac.builder, offset[0], offset[1], "");
3802 pack = LLVMBuildOr(ctx->ac.builder, pack, offset[2], "");
3803 args.offset = pack;
3804 }
3805
3806 /* TC-compatible HTILE on radeonsi promotes Z16 and Z24 to Z32_FLOAT,
3807 * so the depth comparison value isn't clamped for Z16 and
3808 * Z24 anymore. Do it manually here.
3809 *
3810 * It's unnecessary if the original texture format was
3811 * Z32_FLOAT, but we don't know that here.
3812 */
3813 if (args.compare && ctx->ac.chip_class >= GFX8 && ctx->abi->clamp_shadow_reference)
3814 args.compare = ac_build_clamp(&ctx->ac, ac_to_float(&ctx->ac, args.compare));
3815
3816 /* pack derivatives */
3817 if (ddx || ddy) {
3818 int num_src_deriv_channels, num_dest_deriv_channels;
3819 switch (instr->sampler_dim) {
3820 case GLSL_SAMPLER_DIM_3D:
3821 case GLSL_SAMPLER_DIM_CUBE:
3822 num_src_deriv_channels = 3;
3823 num_dest_deriv_channels = 3;
3824 break;
3825 case GLSL_SAMPLER_DIM_2D:
3826 default:
3827 num_src_deriv_channels = 2;
3828 num_dest_deriv_channels = 2;
3829 break;
3830 case GLSL_SAMPLER_DIM_1D:
3831 num_src_deriv_channels = 1;
3832 if (ctx->ac.chip_class == GFX9) {
3833 num_dest_deriv_channels = 2;
3834 } else {
3835 num_dest_deriv_channels = 1;
3836 }
3837 break;
3838 }
3839
3840 for (unsigned i = 0; i < num_src_deriv_channels; i++) {
3841 args.derivs[i] = ac_to_float(&ctx->ac,
3842 ac_llvm_extract_elem(&ctx->ac, ddx, i));
3843 args.derivs[num_dest_deriv_channels + i] = ac_to_float(&ctx->ac,
3844 ac_llvm_extract_elem(&ctx->ac, ddy, i));
3845 }
3846 for (unsigned i = num_src_deriv_channels; i < num_dest_deriv_channels; i++) {
3847 args.derivs[i] = ctx->ac.f32_0;
3848 args.derivs[num_dest_deriv_channels + i] = ctx->ac.f32_0;
3849 }
3850 }
3851
3852 if (instr->sampler_dim == GLSL_SAMPLER_DIM_CUBE && args.coords[0]) {
3853 for (unsigned chan = 0; chan < instr->coord_components; chan++)
3854 args.coords[chan] = ac_to_float(&ctx->ac, args.coords[chan]);
3855 if (instr->coord_components == 3)
3856 args.coords[3] = LLVMGetUndef(ctx->ac.f32);
3857 ac_prepare_cube_coords(&ctx->ac,
3858 instr->op == nir_texop_txd, instr->is_array,
3859 instr->op == nir_texop_lod, args.coords, args.derivs);
3860 }
3861
3862 /* Texture coordinates fixups */
3863 if (instr->coord_components > 1 &&
3864 instr->sampler_dim == GLSL_SAMPLER_DIM_1D &&
3865 instr->is_array &&
3866 instr->op != nir_texop_txf) {
3867 args.coords[1] = apply_round_slice(&ctx->ac, args.coords[1]);
3868 }
3869
3870 if (instr->coord_components > 2 &&
3871 (instr->sampler_dim == GLSL_SAMPLER_DIM_2D ||
3872 instr->sampler_dim == GLSL_SAMPLER_DIM_MS ||
3873 instr->sampler_dim == GLSL_SAMPLER_DIM_SUBPASS ||
3874 instr->sampler_dim == GLSL_SAMPLER_DIM_SUBPASS_MS) &&
3875 instr->is_array &&
3876 instr->op != nir_texop_txf && instr->op != nir_texop_txf_ms) {
3877 args.coords[2] = apply_round_slice(&ctx->ac, args.coords[2]);
3878 }
3879
3880 if (ctx->ac.chip_class == GFX9 &&
3881 instr->sampler_dim == GLSL_SAMPLER_DIM_1D &&
3882 instr->op != nir_texop_lod) {
3883 LLVMValueRef filler;
3884 if (instr->op == nir_texop_txf)
3885 filler = ctx->ac.i32_0;
3886 else
3887 filler = LLVMConstReal(ctx->ac.f32, 0.5);
3888
3889 if (instr->is_array)
3890 args.coords[2] = args.coords[1];
3891 args.coords[1] = filler;
3892 }
3893
3894 /* Pack sample index */
3895 if (instr->op == nir_texop_txf_ms && sample_index)
3896 args.coords[instr->coord_components] = sample_index;
3897
3898 if (instr->op == nir_texop_samples_identical) {
3899 struct ac_image_args txf_args = { 0 };
3900 memcpy(txf_args.coords, args.coords, sizeof(txf_args.coords));
3901
3902 txf_args.dmask = 0xf;
3903 txf_args.resource = fmask_ptr;
3904 txf_args.dim = instr->is_array ? ac_image_2darray : ac_image_2d;
3905 result = build_tex_intrinsic(ctx, instr, &txf_args);
3906
3907 result = LLVMBuildExtractElement(ctx->ac.builder, result, ctx->ac.i32_0, "");
3908 result = emit_int_cmp(&ctx->ac, LLVMIntEQ, result, ctx->ac.i32_0);
3909 goto write_result;
3910 }
3911
3912 if ((instr->sampler_dim == GLSL_SAMPLER_DIM_SUBPASS_MS ||
3913 instr->sampler_dim == GLSL_SAMPLER_DIM_MS) &&
3914 instr->op != nir_texop_txs) {
3915 unsigned sample_chan = instr->is_array ? 3 : 2;
3916 args.coords[sample_chan] = adjust_sample_index_using_fmask(
3917 &ctx->ac, args.coords[0], args.coords[1],
3918 instr->is_array ? args.coords[2] : NULL,
3919 args.coords[sample_chan], fmask_ptr);
3920 }
3921
3922 if (args.offset && instr->op == nir_texop_txf) {
3923 int num_offsets = instr->src[offset_src].src.ssa->num_components;
3924 num_offsets = MIN2(num_offsets, instr->coord_components);
3925 for (unsigned i = 0; i < num_offsets; ++i) {
3926 args.coords[i] = LLVMBuildAdd(
3927 ctx->ac.builder, args.coords[i],
3928 LLVMConstInt(ctx->ac.i32, nir_src_comp_as_uint(instr->src[offset_src].src, i), false), "");
3929 }
3930 args.offset = NULL;
3931 }
3932
3933 /* DMASK was repurposed for GATHER4. 4 components are always
3934 * returned and DMASK works like a swizzle - it selects
3935 * the component to fetch. The only valid DMASK values are
3936 * 1=red, 2=green, 4=blue, 8=alpha. (e.g. 1 returns
3937 * (red,red,red,red) etc.) The ISA document doesn't mention
3938 * this.
3939 */
3940 args.dmask = 0xf;
3941 if (instr->op == nir_texop_tg4) {
3942 if (instr->is_shadow)
3943 args.dmask = 1;
3944 else
3945 args.dmask = 1 << instr->component;
3946 }
3947
3948 if (instr->sampler_dim != GLSL_SAMPLER_DIM_BUF)
3949 args.dim = get_ac_sampler_dim(&ctx->ac, instr->sampler_dim, instr->is_array);
3950 result = build_tex_intrinsic(ctx, instr, &args);
3951
3952 if (instr->op == nir_texop_query_levels)
3953 result = LLVMBuildExtractElement(ctx->ac.builder, result, LLVMConstInt(ctx->ac.i32, 3, false), "");
3954 else if (instr->is_shadow && instr->is_new_style_shadow &&
3955 instr->op != nir_texop_txs && instr->op != nir_texop_lod &&
3956 instr->op != nir_texop_tg4)
3957 result = LLVMBuildExtractElement(ctx->ac.builder, result, ctx->ac.i32_0, "");
3958 else if (instr->op == nir_texop_txs &&
3959 instr->sampler_dim == GLSL_SAMPLER_DIM_CUBE &&
3960 instr->is_array) {
3961 LLVMValueRef two = LLVMConstInt(ctx->ac.i32, 2, false);
3962 LLVMValueRef six = LLVMConstInt(ctx->ac.i32, 6, false);
3963 LLVMValueRef z = LLVMBuildExtractElement(ctx->ac.builder, result, two, "");
3964 z = LLVMBuildSDiv(ctx->ac.builder, z, six, "");
3965 result = LLVMBuildInsertElement(ctx->ac.builder, result, z, two, "");
3966 } else if (ctx->ac.chip_class == GFX9 &&
3967 instr->op == nir_texop_txs &&
3968 instr->sampler_dim == GLSL_SAMPLER_DIM_1D &&
3969 instr->is_array) {
3970 LLVMValueRef two = LLVMConstInt(ctx->ac.i32, 2, false);
3971 LLVMValueRef layers = LLVMBuildExtractElement(ctx->ac.builder, result, two, "");
3972 result = LLVMBuildInsertElement(ctx->ac.builder, result, layers,
3973 ctx->ac.i32_1, "");
3974 } else if (instr->dest.ssa.num_components != 4)
3975 result = ac_trim_vector(&ctx->ac, result, instr->dest.ssa.num_components);
3976
3977 write_result:
3978 if (result) {
3979 assert(instr->dest.is_ssa);
3980 result = ac_to_integer(&ctx->ac, result);
3981 ctx->ssa_defs[instr->dest.ssa.index] = result;
3982 }
3983 }
3984
3985
3986 static void visit_phi(struct ac_nir_context *ctx, nir_phi_instr *instr)
3987 {
3988 LLVMTypeRef type = get_def_type(ctx, &instr->dest.ssa);
3989 LLVMValueRef result = LLVMBuildPhi(ctx->ac.builder, type, "");
3990
3991 ctx->ssa_defs[instr->dest.ssa.index] = result;
3992 _mesa_hash_table_insert(ctx->phis, instr, result);
3993 }
3994
3995 static void visit_post_phi(struct ac_nir_context *ctx,
3996 nir_phi_instr *instr,
3997 LLVMValueRef llvm_phi)
3998 {
3999 nir_foreach_phi_src(src, instr) {
4000 LLVMBasicBlockRef block = get_block(ctx, src->pred);
4001 LLVMValueRef llvm_src = get_src(ctx, src->src);
4002
4003 LLVMAddIncoming(llvm_phi, &llvm_src, &block, 1);
4004 }
4005 }
4006
4007 static void phi_post_pass(struct ac_nir_context *ctx)
4008 {
4009 hash_table_foreach(ctx->phis, entry) {
4010 visit_post_phi(ctx, (nir_phi_instr*)entry->key,
4011 (LLVMValueRef)entry->data);
4012 }
4013 }
4014
4015
4016 static void visit_ssa_undef(struct ac_nir_context *ctx,
4017 const nir_ssa_undef_instr *instr)
4018 {
4019 unsigned num_components = instr->def.num_components;
4020 LLVMTypeRef type = LLVMIntTypeInContext(ctx->ac.context, instr->def.bit_size);
4021 LLVMValueRef undef;
4022
4023 if (num_components == 1)
4024 undef = LLVMGetUndef(type);
4025 else {
4026 undef = LLVMGetUndef(LLVMVectorType(type, num_components));
4027 }
4028 ctx->ssa_defs[instr->def.index] = undef;
4029 }
4030
4031 static void visit_jump(struct ac_llvm_context *ctx,
4032 const nir_jump_instr *instr)
4033 {
4034 switch (instr->type) {
4035 case nir_jump_break:
4036 ac_build_break(ctx);
4037 break;
4038 case nir_jump_continue:
4039 ac_build_continue(ctx);
4040 break;
4041 default:
4042 fprintf(stderr, "Unknown NIR jump instr: ");
4043 nir_print_instr(&instr->instr, stderr);
4044 fprintf(stderr, "\n");
4045 abort();
4046 }
4047 }
4048
4049 static LLVMTypeRef
4050 glsl_base_to_llvm_type(struct ac_llvm_context *ac,
4051 enum glsl_base_type type)
4052 {
4053 switch (type) {
4054 case GLSL_TYPE_INT:
4055 case GLSL_TYPE_UINT:
4056 case GLSL_TYPE_BOOL:
4057 case GLSL_TYPE_SUBROUTINE:
4058 return ac->i32;
4059 case GLSL_TYPE_INT8:
4060 case GLSL_TYPE_UINT8:
4061 return ac->i8;
4062 case GLSL_TYPE_INT16:
4063 case GLSL_TYPE_UINT16:
4064 return ac->i16;
4065 case GLSL_TYPE_FLOAT:
4066 return ac->f32;
4067 case GLSL_TYPE_FLOAT16:
4068 return ac->f16;
4069 case GLSL_TYPE_INT64:
4070 case GLSL_TYPE_UINT64:
4071 return ac->i64;
4072 case GLSL_TYPE_DOUBLE:
4073 return ac->f64;
4074 default:
4075 unreachable("unknown GLSL type");
4076 }
4077 }
4078
4079 static LLVMTypeRef
4080 glsl_to_llvm_type(struct ac_llvm_context *ac,
4081 const struct glsl_type *type)
4082 {
4083 if (glsl_type_is_scalar(type)) {
4084 return glsl_base_to_llvm_type(ac, glsl_get_base_type(type));
4085 }
4086
4087 if (glsl_type_is_vector(type)) {
4088 return LLVMVectorType(
4089 glsl_base_to_llvm_type(ac, glsl_get_base_type(type)),
4090 glsl_get_vector_elements(type));
4091 }
4092
4093 if (glsl_type_is_matrix(type)) {
4094 return LLVMArrayType(
4095 glsl_to_llvm_type(ac, glsl_get_column_type(type)),
4096 glsl_get_matrix_columns(type));
4097 }
4098
4099 if (glsl_type_is_array(type)) {
4100 return LLVMArrayType(
4101 glsl_to_llvm_type(ac, glsl_get_array_element(type)),
4102 glsl_get_length(type));
4103 }
4104
4105 assert(glsl_type_is_struct_or_ifc(type));
4106
4107 LLVMTypeRef member_types[glsl_get_length(type)];
4108
4109 for (unsigned i = 0; i < glsl_get_length(type); i++) {
4110 member_types[i] =
4111 glsl_to_llvm_type(ac,
4112 glsl_get_struct_field(type, i));
4113 }
4114
4115 return LLVMStructTypeInContext(ac->context, member_types,
4116 glsl_get_length(type), false);
4117 }
4118
4119 static void visit_deref(struct ac_nir_context *ctx,
4120 nir_deref_instr *instr)
4121 {
4122 if (instr->mode != nir_var_mem_shared &&
4123 instr->mode != nir_var_mem_global)
4124 return;
4125
4126 LLVMValueRef result = NULL;
4127 switch(instr->deref_type) {
4128 case nir_deref_type_var: {
4129 struct hash_entry *entry = _mesa_hash_table_search(ctx->vars, instr->var);
4130 result = entry->data;
4131 break;
4132 }
4133 case nir_deref_type_struct:
4134 if (instr->mode == nir_var_mem_global) {
4135 nir_deref_instr *parent = nir_deref_instr_parent(instr);
4136 uint64_t offset = glsl_get_struct_field_offset(parent->type,
4137 instr->strct.index);
4138 result = ac_build_gep_ptr(&ctx->ac, get_src(ctx, instr->parent),
4139 LLVMConstInt(ctx->ac.i32, offset, 0));
4140 } else {
4141 result = ac_build_gep0(&ctx->ac, get_src(ctx, instr->parent),
4142 LLVMConstInt(ctx->ac.i32, instr->strct.index, 0));
4143 }
4144 break;
4145 case nir_deref_type_array:
4146 if (instr->mode == nir_var_mem_global) {
4147 nir_deref_instr *parent = nir_deref_instr_parent(instr);
4148 unsigned stride = glsl_get_explicit_stride(parent->type);
4149
4150 if ((glsl_type_is_matrix(parent->type) &&
4151 glsl_matrix_type_is_row_major(parent->type)) ||
4152 (glsl_type_is_vector(parent->type) && stride == 0))
4153 stride = type_scalar_size_bytes(parent->type);
4154
4155 assert(stride > 0);
4156 LLVMValueRef index = get_src(ctx, instr->arr.index);
4157 if (LLVMTypeOf(index) != ctx->ac.i64)
4158 index = LLVMBuildZExt(ctx->ac.builder, index, ctx->ac.i64, "");
4159
4160 LLVMValueRef offset = LLVMBuildMul(ctx->ac.builder, index, LLVMConstInt(ctx->ac.i64, stride, 0), "");
4161
4162 result = ac_build_gep_ptr(&ctx->ac, get_src(ctx, instr->parent), offset);
4163 } else {
4164 result = ac_build_gep0(&ctx->ac, get_src(ctx, instr->parent),
4165 get_src(ctx, instr->arr.index));
4166 }
4167 break;
4168 case nir_deref_type_ptr_as_array:
4169 if (instr->mode == nir_var_mem_global) {
4170 unsigned stride = nir_deref_instr_ptr_as_array_stride(instr);
4171
4172 LLVMValueRef index = get_src(ctx, instr->arr.index);
4173 if (LLVMTypeOf(index) != ctx->ac.i64)
4174 index = LLVMBuildZExt(ctx->ac.builder, index, ctx->ac.i64, "");
4175
4176 LLVMValueRef offset = LLVMBuildMul(ctx->ac.builder, index, LLVMConstInt(ctx->ac.i64, stride, 0), "");
4177
4178 result = ac_build_gep_ptr(&ctx->ac, get_src(ctx, instr->parent), offset);
4179 } else {
4180 result = ac_build_gep_ptr(&ctx->ac, get_src(ctx, instr->parent),
4181 get_src(ctx, instr->arr.index));
4182 }
4183 break;
4184 case nir_deref_type_cast: {
4185 result = get_src(ctx, instr->parent);
4186
4187 /* We can't use the structs from LLVM because the shader
4188 * specifies its own offsets. */
4189 LLVMTypeRef pointee_type = ctx->ac.i8;
4190 if (instr->mode == nir_var_mem_shared)
4191 pointee_type = glsl_to_llvm_type(&ctx->ac, instr->type);
4192
4193 unsigned address_space;
4194
4195 switch(instr->mode) {
4196 case nir_var_mem_shared:
4197 address_space = AC_ADDR_SPACE_LDS;
4198 break;
4199 case nir_var_mem_global:
4200 address_space = AC_ADDR_SPACE_GLOBAL;
4201 break;
4202 default:
4203 unreachable("Unhandled address space");
4204 }
4205
4206 LLVMTypeRef type = LLVMPointerType(pointee_type, address_space);
4207
4208 if (LLVMTypeOf(result) != type) {
4209 if (LLVMGetTypeKind(LLVMTypeOf(result)) == LLVMVectorTypeKind) {
4210 result = LLVMBuildBitCast(ctx->ac.builder, result,
4211 type, "");
4212 } else {
4213 result = LLVMBuildIntToPtr(ctx->ac.builder, result,
4214 type, "");
4215 }
4216 }
4217 break;
4218 }
4219 default:
4220 unreachable("Unhandled deref_instr deref type");
4221 }
4222
4223 ctx->ssa_defs[instr->dest.ssa.index] = result;
4224 }
4225
4226 static void visit_cf_list(struct ac_nir_context *ctx,
4227 struct exec_list *list);
4228
4229 static void visit_block(struct ac_nir_context *ctx, nir_block *block)
4230 {
4231 LLVMBasicBlockRef llvm_block = LLVMGetInsertBlock(ctx->ac.builder);
4232 nir_foreach_instr(instr, block)
4233 {
4234 switch (instr->type) {
4235 case nir_instr_type_alu:
4236 visit_alu(ctx, nir_instr_as_alu(instr));
4237 break;
4238 case nir_instr_type_load_const:
4239 visit_load_const(ctx, nir_instr_as_load_const(instr));
4240 break;
4241 case nir_instr_type_intrinsic:
4242 visit_intrinsic(ctx, nir_instr_as_intrinsic(instr));
4243 break;
4244 case nir_instr_type_tex:
4245 visit_tex(ctx, nir_instr_as_tex(instr));
4246 break;
4247 case nir_instr_type_phi:
4248 visit_phi(ctx, nir_instr_as_phi(instr));
4249 break;
4250 case nir_instr_type_ssa_undef:
4251 visit_ssa_undef(ctx, nir_instr_as_ssa_undef(instr));
4252 break;
4253 case nir_instr_type_jump:
4254 visit_jump(&ctx->ac, nir_instr_as_jump(instr));
4255 break;
4256 case nir_instr_type_deref:
4257 visit_deref(ctx, nir_instr_as_deref(instr));
4258 break;
4259 default:
4260 fprintf(stderr, "Unknown NIR instr type: ");
4261 nir_print_instr(instr, stderr);
4262 fprintf(stderr, "\n");
4263 abort();
4264 }
4265 }
4266
4267 _mesa_hash_table_insert(ctx->defs, block, llvm_block);
4268 }
4269
4270 static void visit_if(struct ac_nir_context *ctx, nir_if *if_stmt)
4271 {
4272 LLVMValueRef value = get_src(ctx, if_stmt->condition);
4273
4274 nir_block *then_block =
4275 (nir_block *) exec_list_get_head(&if_stmt->then_list);
4276
4277 ac_build_uif(&ctx->ac, value, then_block->index);
4278
4279 visit_cf_list(ctx, &if_stmt->then_list);
4280
4281 if (!exec_list_is_empty(&if_stmt->else_list)) {
4282 nir_block *else_block =
4283 (nir_block *) exec_list_get_head(&if_stmt->else_list);
4284
4285 ac_build_else(&ctx->ac, else_block->index);
4286 visit_cf_list(ctx, &if_stmt->else_list);
4287 }
4288
4289 ac_build_endif(&ctx->ac, then_block->index);
4290 }
4291
4292 static void visit_loop(struct ac_nir_context *ctx, nir_loop *loop)
4293 {
4294 nir_block *first_loop_block =
4295 (nir_block *) exec_list_get_head(&loop->body);
4296
4297 ac_build_bgnloop(&ctx->ac, first_loop_block->index);
4298
4299 visit_cf_list(ctx, &loop->body);
4300
4301 ac_build_endloop(&ctx->ac, first_loop_block->index);
4302 }
4303
4304 static void visit_cf_list(struct ac_nir_context *ctx,
4305 struct exec_list *list)
4306 {
4307 foreach_list_typed(nir_cf_node, node, node, list)
4308 {
4309 switch (node->type) {
4310 case nir_cf_node_block:
4311 visit_block(ctx, nir_cf_node_as_block(node));
4312 break;
4313
4314 case nir_cf_node_if:
4315 visit_if(ctx, nir_cf_node_as_if(node));
4316 break;
4317
4318 case nir_cf_node_loop:
4319 visit_loop(ctx, nir_cf_node_as_loop(node));
4320 break;
4321
4322 default:
4323 assert(0);
4324 }
4325 }
4326 }
4327
4328 void
4329 ac_handle_shader_output_decl(struct ac_llvm_context *ctx,
4330 struct ac_shader_abi *abi,
4331 struct nir_shader *nir,
4332 struct nir_variable *variable,
4333 gl_shader_stage stage)
4334 {
4335 unsigned output_loc = variable->data.driver_location / 4;
4336 unsigned attrib_count = glsl_count_attribute_slots(variable->type, false);
4337
4338 /* tess ctrl has it's own load/store paths for outputs */
4339 if (stage == MESA_SHADER_TESS_CTRL)
4340 return;
4341
4342 if (stage == MESA_SHADER_VERTEX ||
4343 stage == MESA_SHADER_TESS_EVAL ||
4344 stage == MESA_SHADER_GEOMETRY) {
4345 int idx = variable->data.location + variable->data.index;
4346 if (idx == VARYING_SLOT_CLIP_DIST0) {
4347 int length = nir->info.clip_distance_array_size +
4348 nir->info.cull_distance_array_size;
4349
4350 if (length > 4)
4351 attrib_count = 2;
4352 else
4353 attrib_count = 1;
4354 }
4355 }
4356
4357 bool is_16bit = glsl_type_is_16bit(glsl_without_array(variable->type));
4358 LLVMTypeRef type = is_16bit ? ctx->f16 : ctx->f32;
4359 for (unsigned i = 0; i < attrib_count; ++i) {
4360 for (unsigned chan = 0; chan < 4; chan++) {
4361 abi->outputs[ac_llvm_reg_index_soa(output_loc + i, chan)] =
4362 ac_build_alloca_undef(ctx, type, "");
4363 }
4364 }
4365 }
4366
4367 static void
4368 setup_locals(struct ac_nir_context *ctx,
4369 struct nir_function *func)
4370 {
4371 int i, j;
4372 ctx->num_locals = 0;
4373 nir_foreach_variable(variable, &func->impl->locals) {
4374 unsigned attrib_count = glsl_count_attribute_slots(variable->type, false);
4375 variable->data.driver_location = ctx->num_locals * 4;
4376 variable->data.location_frac = 0;
4377 ctx->num_locals += attrib_count;
4378 }
4379 ctx->locals = malloc(4 * ctx->num_locals * sizeof(LLVMValueRef));
4380 if (!ctx->locals)
4381 return;
4382
4383 for (i = 0; i < ctx->num_locals; i++) {
4384 for (j = 0; j < 4; j++) {
4385 ctx->locals[i * 4 + j] =
4386 ac_build_alloca_undef(&ctx->ac, ctx->ac.f32, "temp");
4387 }
4388 }
4389 }
4390
4391 static void
4392 setup_shared(struct ac_nir_context *ctx,
4393 struct nir_shader *nir)
4394 {
4395 nir_foreach_variable(variable, &nir->shared) {
4396 LLVMValueRef shared =
4397 LLVMAddGlobalInAddressSpace(
4398 ctx->ac.module, glsl_to_llvm_type(&ctx->ac, variable->type),
4399 variable->name ? variable->name : "",
4400 AC_ADDR_SPACE_LDS);
4401 _mesa_hash_table_insert(ctx->vars, variable, shared);
4402 }
4403 }
4404
4405 void ac_nir_translate(struct ac_llvm_context *ac, struct ac_shader_abi *abi,
4406 struct nir_shader *nir)
4407 {
4408 struct ac_nir_context ctx = {};
4409 struct nir_function *func;
4410
4411 ctx.ac = *ac;
4412 ctx.abi = abi;
4413
4414 ctx.stage = nir->info.stage;
4415 ctx.info = &nir->info;
4416
4417 ctx.main_function = LLVMGetBasicBlockParent(LLVMGetInsertBlock(ctx.ac.builder));
4418
4419 nir_foreach_variable(variable, &nir->outputs)
4420 ac_handle_shader_output_decl(&ctx.ac, ctx.abi, nir, variable,
4421 ctx.stage);
4422
4423 ctx.defs = _mesa_hash_table_create(NULL, _mesa_hash_pointer,
4424 _mesa_key_pointer_equal);
4425 ctx.phis = _mesa_hash_table_create(NULL, _mesa_hash_pointer,
4426 _mesa_key_pointer_equal);
4427 ctx.vars = _mesa_hash_table_create(NULL, _mesa_hash_pointer,
4428 _mesa_key_pointer_equal);
4429
4430 func = (struct nir_function *)exec_list_get_head(&nir->functions);
4431
4432 nir_index_ssa_defs(func->impl);
4433 ctx.ssa_defs = calloc(func->impl->ssa_alloc, sizeof(LLVMValueRef));
4434
4435 setup_locals(&ctx, func);
4436
4437 if (gl_shader_stage_is_compute(nir->info.stage))
4438 setup_shared(&ctx, nir);
4439
4440 visit_cf_list(&ctx, &func->impl->body);
4441 phi_post_pass(&ctx);
4442
4443 if (!gl_shader_stage_is_compute(nir->info.stage))
4444 ctx.abi->emit_outputs(ctx.abi, AC_LLVM_MAX_OUTPUTS,
4445 ctx.abi->outputs);
4446
4447 free(ctx.locals);
4448 free(ctx.ssa_defs);
4449 ralloc_free(ctx.defs);
4450 ralloc_free(ctx.phis);
4451 ralloc_free(ctx.vars);
4452 }
4453
4454 void
4455 ac_lower_indirect_derefs(struct nir_shader *nir, enum chip_class chip_class)
4456 {
4457 /* While it would be nice not to have this flag, we are constrained
4458 * by the reality that LLVM 9.0 has buggy VGPR indexing on GFX9.
4459 */
4460 bool llvm_has_working_vgpr_indexing = chip_class != GFX9;
4461
4462 /* TODO: Indirect indexing of GS inputs is unimplemented.
4463 *
4464 * TCS and TES load inputs directly from LDS or offchip memory, so
4465 * indirect indexing is trivial.
4466 */
4467 nir_variable_mode indirect_mask = 0;
4468 if (nir->info.stage == MESA_SHADER_GEOMETRY ||
4469 (nir->info.stage != MESA_SHADER_TESS_CTRL &&
4470 nir->info.stage != MESA_SHADER_TESS_EVAL &&
4471 !llvm_has_working_vgpr_indexing)) {
4472 indirect_mask |= nir_var_shader_in;
4473 }
4474 if (!llvm_has_working_vgpr_indexing &&
4475 nir->info.stage != MESA_SHADER_TESS_CTRL)
4476 indirect_mask |= nir_var_shader_out;
4477
4478 /* TODO: We shouldn't need to do this, however LLVM isn't currently
4479 * smart enough to handle indirects without causing excess spilling
4480 * causing the gpu to hang.
4481 *
4482 * See the following thread for more details of the problem:
4483 * https://lists.freedesktop.org/archives/mesa-dev/2017-July/162106.html
4484 */
4485 indirect_mask |= nir_var_function_temp;
4486
4487 nir_lower_indirect_derefs(nir, indirect_mask);
4488 }
4489
4490 static unsigned
4491 get_inst_tessfactor_writemask(nir_intrinsic_instr *intrin)
4492 {
4493 if (intrin->intrinsic != nir_intrinsic_store_deref)
4494 return 0;
4495
4496 nir_variable *var =
4497 nir_deref_instr_get_variable(nir_src_as_deref(intrin->src[0]));
4498
4499 if (var->data.mode != nir_var_shader_out)
4500 return 0;
4501
4502 unsigned writemask = 0;
4503 const int location = var->data.location;
4504 unsigned first_component = var->data.location_frac;
4505 unsigned num_comps = intrin->dest.ssa.num_components;
4506
4507 if (location == VARYING_SLOT_TESS_LEVEL_INNER)
4508 writemask = ((1 << (num_comps + 1)) - 1) << first_component;
4509 else if (location == VARYING_SLOT_TESS_LEVEL_OUTER)
4510 writemask = (((1 << (num_comps + 1)) - 1) << first_component) << 4;
4511
4512 return writemask;
4513 }
4514
4515 static void
4516 scan_tess_ctrl(nir_cf_node *cf_node, unsigned *upper_block_tf_writemask,
4517 unsigned *cond_block_tf_writemask,
4518 bool *tessfactors_are_def_in_all_invocs, bool is_nested_cf)
4519 {
4520 switch (cf_node->type) {
4521 case nir_cf_node_block: {
4522 nir_block *block = nir_cf_node_as_block(cf_node);
4523 nir_foreach_instr(instr, block) {
4524 if (instr->type != nir_instr_type_intrinsic)
4525 continue;
4526
4527 nir_intrinsic_instr *intrin = nir_instr_as_intrinsic(instr);
4528 if (intrin->intrinsic == nir_intrinsic_barrier) {
4529
4530 /* If we find a barrier in nested control flow put this in the
4531 * too hard basket. In GLSL this is not possible but it is in
4532 * SPIR-V.
4533 */
4534 if (is_nested_cf) {
4535 *tessfactors_are_def_in_all_invocs = false;
4536 return;
4537 }
4538
4539 /* The following case must be prevented:
4540 * gl_TessLevelInner = ...;
4541 * barrier();
4542 * if (gl_InvocationID == 1)
4543 * gl_TessLevelInner = ...;
4544 *
4545 * If you consider disjoint code segments separated by barriers, each
4546 * such segment that writes tess factor channels should write the same
4547 * channels in all codepaths within that segment.
4548 */
4549 if (upper_block_tf_writemask || cond_block_tf_writemask) {
4550 /* Accumulate the result: */
4551 *tessfactors_are_def_in_all_invocs &=
4552 !(*cond_block_tf_writemask & ~(*upper_block_tf_writemask));
4553
4554 /* Analyze the next code segment from scratch. */
4555 *upper_block_tf_writemask = 0;
4556 *cond_block_tf_writemask = 0;
4557 }
4558 } else
4559 *upper_block_tf_writemask |= get_inst_tessfactor_writemask(intrin);
4560 }
4561
4562 break;
4563 }
4564 case nir_cf_node_if: {
4565 unsigned then_tessfactor_writemask = 0;
4566 unsigned else_tessfactor_writemask = 0;
4567
4568 nir_if *if_stmt = nir_cf_node_as_if(cf_node);
4569 foreach_list_typed(nir_cf_node, nested_node, node, &if_stmt->then_list) {
4570 scan_tess_ctrl(nested_node, &then_tessfactor_writemask,
4571 cond_block_tf_writemask,
4572 tessfactors_are_def_in_all_invocs, true);
4573 }
4574
4575 foreach_list_typed(nir_cf_node, nested_node, node, &if_stmt->else_list) {
4576 scan_tess_ctrl(nested_node, &else_tessfactor_writemask,
4577 cond_block_tf_writemask,
4578 tessfactors_are_def_in_all_invocs, true);
4579 }
4580
4581 if (then_tessfactor_writemask || else_tessfactor_writemask) {
4582 /* If both statements write the same tess factor channels,
4583 * we can say that the upper block writes them too.
4584 */
4585 *upper_block_tf_writemask |= then_tessfactor_writemask &
4586 else_tessfactor_writemask;
4587 *cond_block_tf_writemask |= then_tessfactor_writemask |
4588 else_tessfactor_writemask;
4589 }
4590
4591 break;
4592 }
4593 case nir_cf_node_loop: {
4594 nir_loop *loop = nir_cf_node_as_loop(cf_node);
4595 foreach_list_typed(nir_cf_node, nested_node, node, &loop->body) {
4596 scan_tess_ctrl(nested_node, cond_block_tf_writemask,
4597 cond_block_tf_writemask,
4598 tessfactors_are_def_in_all_invocs, true);
4599 }
4600
4601 break;
4602 }
4603 default:
4604 unreachable("unknown cf node type");
4605 }
4606 }
4607
4608 bool
4609 ac_are_tessfactors_def_in_all_invocs(const struct nir_shader *nir)
4610 {
4611 assert(nir->info.stage == MESA_SHADER_TESS_CTRL);
4612
4613 /* The pass works as follows:
4614 * If all codepaths write tess factors, we can say that all
4615 * invocations define tess factors.
4616 *
4617 * Each tess factor channel is tracked separately.
4618 */
4619 unsigned main_block_tf_writemask = 0; /* if main block writes tess factors */
4620 unsigned cond_block_tf_writemask = 0; /* if cond block writes tess factors */
4621
4622 /* Initial value = true. Here the pass will accumulate results from
4623 * multiple segments surrounded by barriers. If tess factors aren't
4624 * written at all, it's a shader bug and we don't care if this will be
4625 * true.
4626 */
4627 bool tessfactors_are_def_in_all_invocs = true;
4628
4629 nir_foreach_function(function, nir) {
4630 if (function->impl) {
4631 foreach_list_typed(nir_cf_node, node, node, &function->impl->body) {
4632 scan_tess_ctrl(node, &main_block_tf_writemask,
4633 &cond_block_tf_writemask,
4634 &tessfactors_are_def_in_all_invocs,
4635 false);
4636 }
4637 }
4638 }
4639
4640 /* Accumulate the result for the last code segment separated by a
4641 * barrier.
4642 */
4643 if (main_block_tf_writemask || cond_block_tf_writemask) {
4644 tessfactors_are_def_in_all_invocs &=
4645 !(cond_block_tf_writemask & ~main_block_tf_writemask);
4646 }
4647
4648 return tessfactors_are_def_in_all_invocs;
4649 }