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ac/nir: Fix gather4 integer wa with unnormalized coordinates
[mesa.git] / src / amd / common / ac_nir_to_llvm.c
1 /*
2 * Copyright © 2016 Bas Nieuwenhuizen
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
21 * IN THE SOFTWARE.
22 */
23
24 #include "ac_nir_to_llvm.h"
25 #include "ac_llvm_build.h"
26 #include "ac_llvm_util.h"
27 #include "ac_binary.h"
28 #include "sid.h"
29 #include "nir/nir.h"
30 #include "nir/nir_deref.h"
31 #include "util/bitscan.h"
32 #include "util/u_math.h"
33 #include "ac_shader_abi.h"
34 #include "ac_shader_util.h"
35
36 struct ac_nir_context {
37 struct ac_llvm_context ac;
38 struct ac_shader_abi *abi;
39
40 gl_shader_stage stage;
41 shader_info *info;
42
43 LLVMValueRef *ssa_defs;
44
45 LLVMValueRef scratch;
46
47 struct hash_table *defs;
48 struct hash_table *phis;
49 struct hash_table *vars;
50
51 LLVMValueRef main_function;
52 LLVMBasicBlockRef continue_block;
53 LLVMBasicBlockRef break_block;
54
55 int num_locals;
56 LLVMValueRef *locals;
57 };
58
59 static LLVMValueRef get_sampler_desc(struct ac_nir_context *ctx,
60 nir_deref_instr *deref_instr,
61 enum ac_descriptor_type desc_type,
62 const nir_instr *instr,
63 bool image, bool write);
64
65 static void
66 build_store_values_extended(struct ac_llvm_context *ac,
67 LLVMValueRef *values,
68 unsigned value_count,
69 unsigned value_stride,
70 LLVMValueRef vec)
71 {
72 LLVMBuilderRef builder = ac->builder;
73 unsigned i;
74
75 for (i = 0; i < value_count; i++) {
76 LLVMValueRef ptr = values[i * value_stride];
77 LLVMValueRef index = LLVMConstInt(ac->i32, i, false);
78 LLVMValueRef value = LLVMBuildExtractElement(builder, vec, index, "");
79 LLVMBuildStore(builder, value, ptr);
80 }
81 }
82
83 static enum ac_image_dim
84 get_ac_sampler_dim(const struct ac_llvm_context *ctx, enum glsl_sampler_dim dim,
85 bool is_array)
86 {
87 switch (dim) {
88 case GLSL_SAMPLER_DIM_1D:
89 if (ctx->chip_class == GFX9)
90 return is_array ? ac_image_2darray : ac_image_2d;
91 return is_array ? ac_image_1darray : ac_image_1d;
92 case GLSL_SAMPLER_DIM_2D:
93 case GLSL_SAMPLER_DIM_RECT:
94 case GLSL_SAMPLER_DIM_EXTERNAL:
95 return is_array ? ac_image_2darray : ac_image_2d;
96 case GLSL_SAMPLER_DIM_3D:
97 return ac_image_3d;
98 case GLSL_SAMPLER_DIM_CUBE:
99 return ac_image_cube;
100 case GLSL_SAMPLER_DIM_MS:
101 return is_array ? ac_image_2darraymsaa : ac_image_2dmsaa;
102 case GLSL_SAMPLER_DIM_SUBPASS:
103 return ac_image_2darray;
104 case GLSL_SAMPLER_DIM_SUBPASS_MS:
105 return ac_image_2darraymsaa;
106 default:
107 unreachable("bad sampler dim");
108 }
109 }
110
111 static enum ac_image_dim
112 get_ac_image_dim(const struct ac_llvm_context *ctx, enum glsl_sampler_dim sdim,
113 bool is_array)
114 {
115 enum ac_image_dim dim = get_ac_sampler_dim(ctx, sdim, is_array);
116
117 /* Match the resource type set in the descriptor. */
118 if (dim == ac_image_cube ||
119 (ctx->chip_class <= GFX8 && dim == ac_image_3d))
120 dim = ac_image_2darray;
121 else if (sdim == GLSL_SAMPLER_DIM_2D && !is_array && ctx->chip_class == GFX9) {
122 /* When a single layer of a 3D texture is bound, the shader
123 * will refer to a 2D target, but the descriptor has a 3D type.
124 * Since the HW ignores BASE_ARRAY in this case, we need to
125 * send 3 coordinates. This doesn't hurt when the underlying
126 * texture is non-3D.
127 */
128 dim = ac_image_3d;
129 }
130
131 return dim;
132 }
133
134 static LLVMTypeRef get_def_type(struct ac_nir_context *ctx,
135 const nir_ssa_def *def)
136 {
137 LLVMTypeRef type = LLVMIntTypeInContext(ctx->ac.context, def->bit_size);
138 if (def->num_components > 1) {
139 type = LLVMVectorType(type, def->num_components);
140 }
141 return type;
142 }
143
144 static LLVMValueRef get_src(struct ac_nir_context *nir, nir_src src)
145 {
146 assert(src.is_ssa);
147 return nir->ssa_defs[src.ssa->index];
148 }
149
150 static LLVMValueRef
151 get_memory_ptr(struct ac_nir_context *ctx, nir_src src)
152 {
153 LLVMValueRef ptr = get_src(ctx, src);
154 ptr = LLVMBuildGEP(ctx->ac.builder, ctx->ac.lds, &ptr, 1, "");
155 int addr_space = LLVMGetPointerAddressSpace(LLVMTypeOf(ptr));
156
157 return LLVMBuildBitCast(ctx->ac.builder, ptr,
158 LLVMPointerType(ctx->ac.i32, addr_space), "");
159 }
160
161 static LLVMBasicBlockRef get_block(struct ac_nir_context *nir,
162 const struct nir_block *b)
163 {
164 struct hash_entry *entry = _mesa_hash_table_search(nir->defs, b);
165 return (LLVMBasicBlockRef)entry->data;
166 }
167
168 static LLVMValueRef get_alu_src(struct ac_nir_context *ctx,
169 nir_alu_src src,
170 unsigned num_components)
171 {
172 LLVMValueRef value = get_src(ctx, src.src);
173 bool need_swizzle = false;
174
175 assert(value);
176 unsigned src_components = ac_get_llvm_num_components(value);
177 for (unsigned i = 0; i < num_components; ++i) {
178 assert(src.swizzle[i] < src_components);
179 if (src.swizzle[i] != i)
180 need_swizzle = true;
181 }
182
183 if (need_swizzle || num_components != src_components) {
184 LLVMValueRef masks[] = {
185 LLVMConstInt(ctx->ac.i32, src.swizzle[0], false),
186 LLVMConstInt(ctx->ac.i32, src.swizzle[1], false),
187 LLVMConstInt(ctx->ac.i32, src.swizzle[2], false),
188 LLVMConstInt(ctx->ac.i32, src.swizzle[3], false)};
189
190 if (src_components > 1 && num_components == 1) {
191 value = LLVMBuildExtractElement(ctx->ac.builder, value,
192 masks[0], "");
193 } else if (src_components == 1 && num_components > 1) {
194 LLVMValueRef values[] = {value, value, value, value};
195 value = ac_build_gather_values(&ctx->ac, values, num_components);
196 } else {
197 LLVMValueRef swizzle = LLVMConstVector(masks, num_components);
198 value = LLVMBuildShuffleVector(ctx->ac.builder, value, value,
199 swizzle, "");
200 }
201 }
202 assert(!src.negate);
203 assert(!src.abs);
204 return value;
205 }
206
207 static LLVMValueRef emit_int_cmp(struct ac_llvm_context *ctx,
208 LLVMIntPredicate pred, LLVMValueRef src0,
209 LLVMValueRef src1)
210 {
211 LLVMValueRef result = LLVMBuildICmp(ctx->builder, pred, src0, src1, "");
212 return LLVMBuildSelect(ctx->builder, result,
213 LLVMConstInt(ctx->i32, 0xFFFFFFFF, false),
214 ctx->i32_0, "");
215 }
216
217 static LLVMValueRef emit_float_cmp(struct ac_llvm_context *ctx,
218 LLVMRealPredicate pred, LLVMValueRef src0,
219 LLVMValueRef src1)
220 {
221 LLVMValueRef result;
222 src0 = ac_to_float(ctx, src0);
223 src1 = ac_to_float(ctx, src1);
224 result = LLVMBuildFCmp(ctx->builder, pred, src0, src1, "");
225 return LLVMBuildSelect(ctx->builder, result,
226 LLVMConstInt(ctx->i32, 0xFFFFFFFF, false),
227 ctx->i32_0, "");
228 }
229
230 static LLVMValueRef emit_intrin_1f_param(struct ac_llvm_context *ctx,
231 const char *intrin,
232 LLVMTypeRef result_type,
233 LLVMValueRef src0)
234 {
235 char name[64];
236 LLVMValueRef params[] = {
237 ac_to_float(ctx, src0),
238 };
239
240 ASSERTED const int length = snprintf(name, sizeof(name), "%s.f%d", intrin,
241 ac_get_elem_bits(ctx, result_type));
242 assert(length < sizeof(name));
243 return ac_build_intrinsic(ctx, name, result_type, params, 1, AC_FUNC_ATTR_READNONE);
244 }
245
246 static LLVMValueRef emit_intrin_2f_param(struct ac_llvm_context *ctx,
247 const char *intrin,
248 LLVMTypeRef result_type,
249 LLVMValueRef src0, LLVMValueRef src1)
250 {
251 char name[64];
252 LLVMValueRef params[] = {
253 ac_to_float(ctx, src0),
254 ac_to_float(ctx, src1),
255 };
256
257 ASSERTED const int length = snprintf(name, sizeof(name), "%s.f%d", intrin,
258 ac_get_elem_bits(ctx, result_type));
259 assert(length < sizeof(name));
260 return ac_build_intrinsic(ctx, name, result_type, params, 2, AC_FUNC_ATTR_READNONE);
261 }
262
263 static LLVMValueRef emit_intrin_3f_param(struct ac_llvm_context *ctx,
264 const char *intrin,
265 LLVMTypeRef result_type,
266 LLVMValueRef src0, LLVMValueRef src1, LLVMValueRef src2)
267 {
268 char name[64];
269 LLVMValueRef params[] = {
270 ac_to_float(ctx, src0),
271 ac_to_float(ctx, src1),
272 ac_to_float(ctx, src2),
273 };
274
275 ASSERTED const int length = snprintf(name, sizeof(name), "%s.f%d", intrin,
276 ac_get_elem_bits(ctx, result_type));
277 assert(length < sizeof(name));
278 return ac_build_intrinsic(ctx, name, result_type, params, 3, AC_FUNC_ATTR_READNONE);
279 }
280
281 static LLVMValueRef emit_bcsel(struct ac_llvm_context *ctx,
282 LLVMValueRef src0, LLVMValueRef src1, LLVMValueRef src2)
283 {
284 assert(LLVMGetTypeKind(LLVMTypeOf(src0)) != LLVMVectorTypeKind);
285
286 LLVMValueRef v = LLVMBuildICmp(ctx->builder, LLVMIntNE, src0,
287 ctx->i32_0, "");
288 return LLVMBuildSelect(ctx->builder, v,
289 ac_to_integer_or_pointer(ctx, src1),
290 ac_to_integer_or_pointer(ctx, src2), "");
291 }
292
293 static LLVMValueRef emit_iabs(struct ac_llvm_context *ctx,
294 LLVMValueRef src0)
295 {
296 return ac_build_imax(ctx, src0, LLVMBuildNeg(ctx->builder, src0, ""));
297 }
298
299 static LLVMValueRef emit_uint_carry(struct ac_llvm_context *ctx,
300 const char *intrin,
301 LLVMValueRef src0, LLVMValueRef src1)
302 {
303 LLVMTypeRef ret_type;
304 LLVMTypeRef types[] = { ctx->i32, ctx->i1 };
305 LLVMValueRef res;
306 LLVMValueRef params[] = { src0, src1 };
307 ret_type = LLVMStructTypeInContext(ctx->context, types,
308 2, true);
309
310 res = ac_build_intrinsic(ctx, intrin, ret_type,
311 params, 2, AC_FUNC_ATTR_READNONE);
312
313 res = LLVMBuildExtractValue(ctx->builder, res, 1, "");
314 res = LLVMBuildZExt(ctx->builder, res, ctx->i32, "");
315 return res;
316 }
317
318 static LLVMValueRef emit_b2f(struct ac_llvm_context *ctx,
319 LLVMValueRef src0,
320 unsigned bitsize)
321 {
322 LLVMValueRef result = LLVMBuildAnd(ctx->builder, src0,
323 LLVMBuildBitCast(ctx->builder, LLVMConstReal(ctx->f32, 1.0), ctx->i32, ""),
324 "");
325 result = LLVMBuildBitCast(ctx->builder, result, ctx->f32, "");
326
327 switch (bitsize) {
328 case 16:
329 return LLVMBuildFPTrunc(ctx->builder, result, ctx->f16, "");
330 case 32:
331 return result;
332 case 64:
333 return LLVMBuildFPExt(ctx->builder, result, ctx->f64, "");
334 default:
335 unreachable("Unsupported bit size.");
336 }
337 }
338
339 static LLVMValueRef emit_f2b(struct ac_llvm_context *ctx,
340 LLVMValueRef src0)
341 {
342 src0 = ac_to_float(ctx, src0);
343 LLVMValueRef zero = LLVMConstNull(LLVMTypeOf(src0));
344 return LLVMBuildSExt(ctx->builder,
345 LLVMBuildFCmp(ctx->builder, LLVMRealUNE, src0, zero, ""),
346 ctx->i32, "");
347 }
348
349 static LLVMValueRef emit_b2i(struct ac_llvm_context *ctx,
350 LLVMValueRef src0,
351 unsigned bitsize)
352 {
353 LLVMValueRef result = LLVMBuildAnd(ctx->builder, src0, ctx->i32_1, "");
354
355 switch (bitsize) {
356 case 8:
357 return LLVMBuildTrunc(ctx->builder, result, ctx->i8, "");
358 case 16:
359 return LLVMBuildTrunc(ctx->builder, result, ctx->i16, "");
360 case 32:
361 return result;
362 case 64:
363 return LLVMBuildZExt(ctx->builder, result, ctx->i64, "");
364 default:
365 unreachable("Unsupported bit size.");
366 }
367 }
368
369 static LLVMValueRef emit_i2b(struct ac_llvm_context *ctx,
370 LLVMValueRef src0)
371 {
372 LLVMValueRef zero = LLVMConstNull(LLVMTypeOf(src0));
373 return LLVMBuildSExt(ctx->builder,
374 LLVMBuildICmp(ctx->builder, LLVMIntNE, src0, zero, ""),
375 ctx->i32, "");
376 }
377
378 static LLVMValueRef emit_f2f16(struct ac_llvm_context *ctx,
379 LLVMValueRef src0)
380 {
381 LLVMValueRef result;
382 LLVMValueRef cond = NULL;
383
384 src0 = ac_to_float(ctx, src0);
385 result = LLVMBuildFPTrunc(ctx->builder, src0, ctx->f16, "");
386
387 if (ctx->chip_class >= GFX8) {
388 LLVMValueRef args[2];
389 /* Check if the result is a denormal - and flush to 0 if so. */
390 args[0] = result;
391 args[1] = LLVMConstInt(ctx->i32, N_SUBNORMAL | P_SUBNORMAL, false);
392 cond = ac_build_intrinsic(ctx, "llvm.amdgcn.class.f16", ctx->i1, args, 2, AC_FUNC_ATTR_READNONE);
393 }
394
395 /* need to convert back up to f32 */
396 result = LLVMBuildFPExt(ctx->builder, result, ctx->f32, "");
397
398 if (ctx->chip_class >= GFX8)
399 result = LLVMBuildSelect(ctx->builder, cond, ctx->f32_0, result, "");
400 else {
401 /* for GFX6-GFX7 */
402 /* 0x38800000 is smallest half float value (2^-14) in 32-bit float,
403 * so compare the result and flush to 0 if it's smaller.
404 */
405 LLVMValueRef temp, cond2;
406 temp = emit_intrin_1f_param(ctx, "llvm.fabs", ctx->f32, result);
407 cond = LLVMBuildFCmp(ctx->builder, LLVMRealUGT,
408 LLVMBuildBitCast(ctx->builder, LLVMConstInt(ctx->i32, 0x38800000, false), ctx->f32, ""),
409 temp, "");
410 cond2 = LLVMBuildFCmp(ctx->builder, LLVMRealUNE,
411 temp, ctx->f32_0, "");
412 cond = LLVMBuildAnd(ctx->builder, cond, cond2, "");
413 result = LLVMBuildSelect(ctx->builder, cond, ctx->f32_0, result, "");
414 }
415 return result;
416 }
417
418 static LLVMValueRef emit_umul_high(struct ac_llvm_context *ctx,
419 LLVMValueRef src0, LLVMValueRef src1)
420 {
421 LLVMValueRef dst64, result;
422 src0 = LLVMBuildZExt(ctx->builder, src0, ctx->i64, "");
423 src1 = LLVMBuildZExt(ctx->builder, src1, ctx->i64, "");
424
425 dst64 = LLVMBuildMul(ctx->builder, src0, src1, "");
426 dst64 = LLVMBuildLShr(ctx->builder, dst64, LLVMConstInt(ctx->i64, 32, false), "");
427 result = LLVMBuildTrunc(ctx->builder, dst64, ctx->i32, "");
428 return result;
429 }
430
431 static LLVMValueRef emit_imul_high(struct ac_llvm_context *ctx,
432 LLVMValueRef src0, LLVMValueRef src1)
433 {
434 LLVMValueRef dst64, result;
435 src0 = LLVMBuildSExt(ctx->builder, src0, ctx->i64, "");
436 src1 = LLVMBuildSExt(ctx->builder, src1, ctx->i64, "");
437
438 dst64 = LLVMBuildMul(ctx->builder, src0, src1, "");
439 dst64 = LLVMBuildAShr(ctx->builder, dst64, LLVMConstInt(ctx->i64, 32, false), "");
440 result = LLVMBuildTrunc(ctx->builder, dst64, ctx->i32, "");
441 return result;
442 }
443
444 static LLVMValueRef emit_bfm(struct ac_llvm_context *ctx,
445 LLVMValueRef bits, LLVMValueRef offset)
446 {
447 /* mask = ((1 << bits) - 1) << offset */
448 return LLVMBuildShl(ctx->builder,
449 LLVMBuildSub(ctx->builder,
450 LLVMBuildShl(ctx->builder,
451 ctx->i32_1,
452 bits, ""),
453 ctx->i32_1, ""),
454 offset, "");
455 }
456
457 static LLVMValueRef emit_bitfield_select(struct ac_llvm_context *ctx,
458 LLVMValueRef mask, LLVMValueRef insert,
459 LLVMValueRef base)
460 {
461 /* Calculate:
462 * (mask & insert) | (~mask & base) = base ^ (mask & (insert ^ base))
463 * Use the right-hand side, which the LLVM backend can convert to V_BFI.
464 */
465 return LLVMBuildXor(ctx->builder, base,
466 LLVMBuildAnd(ctx->builder, mask,
467 LLVMBuildXor(ctx->builder, insert, base, ""), ""), "");
468 }
469
470 static LLVMValueRef emit_pack_2x16(struct ac_llvm_context *ctx,
471 LLVMValueRef src0,
472 LLVMValueRef (*pack)(struct ac_llvm_context *ctx,
473 LLVMValueRef args[2]))
474 {
475 LLVMValueRef comp[2];
476
477 src0 = ac_to_float(ctx, src0);
478 comp[0] = LLVMBuildExtractElement(ctx->builder, src0, ctx->i32_0, "");
479 comp[1] = LLVMBuildExtractElement(ctx->builder, src0, ctx->i32_1, "");
480
481 return LLVMBuildBitCast(ctx->builder, pack(ctx, comp), ctx->i32, "");
482 }
483
484 static LLVMValueRef emit_unpack_half_2x16(struct ac_llvm_context *ctx,
485 LLVMValueRef src0)
486 {
487 LLVMValueRef const16 = LLVMConstInt(ctx->i32, 16, false);
488 LLVMValueRef temps[2], val;
489 int i;
490
491 for (i = 0; i < 2; i++) {
492 val = i == 1 ? LLVMBuildLShr(ctx->builder, src0, const16, "") : src0;
493 val = LLVMBuildTrunc(ctx->builder, val, ctx->i16, "");
494 val = LLVMBuildBitCast(ctx->builder, val, ctx->f16, "");
495 temps[i] = LLVMBuildFPExt(ctx->builder, val, ctx->f32, "");
496 }
497 return ac_build_gather_values(ctx, temps, 2);
498 }
499
500 static LLVMValueRef emit_ddxy(struct ac_nir_context *ctx,
501 nir_op op,
502 LLVMValueRef src0)
503 {
504 unsigned mask;
505 int idx;
506 LLVMValueRef result;
507
508 if (op == nir_op_fddx_fine)
509 mask = AC_TID_MASK_LEFT;
510 else if (op == nir_op_fddy_fine)
511 mask = AC_TID_MASK_TOP;
512 else
513 mask = AC_TID_MASK_TOP_LEFT;
514
515 /* for DDX we want to next X pixel, DDY next Y pixel. */
516 if (op == nir_op_fddx_fine ||
517 op == nir_op_fddx_coarse ||
518 op == nir_op_fddx)
519 idx = 1;
520 else
521 idx = 2;
522
523 result = ac_build_ddxy(&ctx->ac, mask, idx, src0);
524 return result;
525 }
526
527 static void visit_alu(struct ac_nir_context *ctx, const nir_alu_instr *instr)
528 {
529 LLVMValueRef src[4], result = NULL;
530 unsigned num_components = instr->dest.dest.ssa.num_components;
531 unsigned src_components;
532 LLVMTypeRef def_type = get_def_type(ctx, &instr->dest.dest.ssa);
533
534 assert(nir_op_infos[instr->op].num_inputs <= ARRAY_SIZE(src));
535 switch (instr->op) {
536 case nir_op_vec2:
537 case nir_op_vec3:
538 case nir_op_vec4:
539 src_components = 1;
540 break;
541 case nir_op_pack_half_2x16:
542 case nir_op_pack_snorm_2x16:
543 case nir_op_pack_unorm_2x16:
544 src_components = 2;
545 break;
546 case nir_op_unpack_half_2x16:
547 src_components = 1;
548 break;
549 case nir_op_cube_face_coord:
550 case nir_op_cube_face_index:
551 src_components = 3;
552 break;
553 default:
554 src_components = num_components;
555 break;
556 }
557 for (unsigned i = 0; i < nir_op_infos[instr->op].num_inputs; i++)
558 src[i] = get_alu_src(ctx, instr->src[i], src_components);
559
560 switch (instr->op) {
561 case nir_op_mov:
562 result = src[0];
563 break;
564 case nir_op_fneg:
565 src[0] = ac_to_float(&ctx->ac, src[0]);
566 result = LLVMBuildFNeg(ctx->ac.builder, src[0], "");
567 break;
568 case nir_op_ineg:
569 result = LLVMBuildNeg(ctx->ac.builder, src[0], "");
570 break;
571 case nir_op_inot:
572 result = LLVMBuildNot(ctx->ac.builder, src[0], "");
573 break;
574 case nir_op_iadd:
575 result = LLVMBuildAdd(ctx->ac.builder, src[0], src[1], "");
576 break;
577 case nir_op_fadd:
578 src[0] = ac_to_float(&ctx->ac, src[0]);
579 src[1] = ac_to_float(&ctx->ac, src[1]);
580 result = LLVMBuildFAdd(ctx->ac.builder, src[0], src[1], "");
581 break;
582 case nir_op_fsub:
583 src[0] = ac_to_float(&ctx->ac, src[0]);
584 src[1] = ac_to_float(&ctx->ac, src[1]);
585 result = LLVMBuildFSub(ctx->ac.builder, src[0], src[1], "");
586 break;
587 case nir_op_isub:
588 result = LLVMBuildSub(ctx->ac.builder, src[0], src[1], "");
589 break;
590 case nir_op_imul:
591 result = LLVMBuildMul(ctx->ac.builder, src[0], src[1], "");
592 break;
593 case nir_op_imod:
594 result = LLVMBuildSRem(ctx->ac.builder, src[0], src[1], "");
595 break;
596 case nir_op_umod:
597 result = LLVMBuildURem(ctx->ac.builder, src[0], src[1], "");
598 break;
599 case nir_op_fmod:
600 src[0] = ac_to_float(&ctx->ac, src[0]);
601 src[1] = ac_to_float(&ctx->ac, src[1]);
602 result = ac_build_fdiv(&ctx->ac, src[0], src[1]);
603 result = emit_intrin_1f_param(&ctx->ac, "llvm.floor",
604 ac_to_float_type(&ctx->ac, def_type), result);
605 result = LLVMBuildFMul(ctx->ac.builder, src[1] , result, "");
606 result = LLVMBuildFSub(ctx->ac.builder, src[0], result, "");
607 break;
608 case nir_op_frem:
609 src[0] = ac_to_float(&ctx->ac, src[0]);
610 src[1] = ac_to_float(&ctx->ac, src[1]);
611 result = LLVMBuildFRem(ctx->ac.builder, src[0], src[1], "");
612 break;
613 case nir_op_irem:
614 result = LLVMBuildSRem(ctx->ac.builder, src[0], src[1], "");
615 break;
616 case nir_op_idiv:
617 result = LLVMBuildSDiv(ctx->ac.builder, src[0], src[1], "");
618 break;
619 case nir_op_udiv:
620 result = LLVMBuildUDiv(ctx->ac.builder, src[0], src[1], "");
621 break;
622 case nir_op_fmul:
623 src[0] = ac_to_float(&ctx->ac, src[0]);
624 src[1] = ac_to_float(&ctx->ac, src[1]);
625 result = LLVMBuildFMul(ctx->ac.builder, src[0], src[1], "");
626 break;
627 case nir_op_frcp:
628 src[0] = ac_to_float(&ctx->ac, src[0]);
629 result = ac_build_fdiv(&ctx->ac, LLVMConstReal(LLVMTypeOf(src[0]), 1.0), src[0]);
630 break;
631 case nir_op_iand:
632 result = LLVMBuildAnd(ctx->ac.builder, src[0], src[1], "");
633 break;
634 case nir_op_ior:
635 result = LLVMBuildOr(ctx->ac.builder, src[0], src[1], "");
636 break;
637 case nir_op_ixor:
638 result = LLVMBuildXor(ctx->ac.builder, src[0], src[1], "");
639 break;
640 case nir_op_ishl:
641 if (ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[1])) < ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[0])))
642 src[1] = LLVMBuildZExt(ctx->ac.builder, src[1],
643 LLVMTypeOf(src[0]), "");
644 else if (ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[1])) > ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[0])))
645 src[1] = LLVMBuildTrunc(ctx->ac.builder, src[1],
646 LLVMTypeOf(src[0]), "");
647 result = LLVMBuildShl(ctx->ac.builder, src[0], src[1], "");
648 break;
649 case nir_op_ishr:
650 if (ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[1])) < ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[0])))
651 src[1] = LLVMBuildZExt(ctx->ac.builder, src[1],
652 LLVMTypeOf(src[0]), "");
653 else if (ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[1])) > ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[0])))
654 src[1] = LLVMBuildTrunc(ctx->ac.builder, src[1],
655 LLVMTypeOf(src[0]), "");
656 result = LLVMBuildAShr(ctx->ac.builder, src[0], src[1], "");
657 break;
658 case nir_op_ushr:
659 if (ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[1])) < ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[0])))
660 src[1] = LLVMBuildZExt(ctx->ac.builder, src[1],
661 LLVMTypeOf(src[0]), "");
662 else if (ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[1])) > ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[0])))
663 src[1] = LLVMBuildTrunc(ctx->ac.builder, src[1],
664 LLVMTypeOf(src[0]), "");
665 result = LLVMBuildLShr(ctx->ac.builder, src[0], src[1], "");
666 break;
667 case nir_op_ilt32:
668 result = emit_int_cmp(&ctx->ac, LLVMIntSLT, src[0], src[1]);
669 break;
670 case nir_op_ine32:
671 result = emit_int_cmp(&ctx->ac, LLVMIntNE, src[0], src[1]);
672 break;
673 case nir_op_ieq32:
674 result = emit_int_cmp(&ctx->ac, LLVMIntEQ, src[0], src[1]);
675 break;
676 case nir_op_ige32:
677 result = emit_int_cmp(&ctx->ac, LLVMIntSGE, src[0], src[1]);
678 break;
679 case nir_op_ult32:
680 result = emit_int_cmp(&ctx->ac, LLVMIntULT, src[0], src[1]);
681 break;
682 case nir_op_uge32:
683 result = emit_int_cmp(&ctx->ac, LLVMIntUGE, src[0], src[1]);
684 break;
685 case nir_op_feq32:
686 result = emit_float_cmp(&ctx->ac, LLVMRealOEQ, src[0], src[1]);
687 break;
688 case nir_op_fne32:
689 result = emit_float_cmp(&ctx->ac, LLVMRealUNE, src[0], src[1]);
690 break;
691 case nir_op_flt32:
692 result = emit_float_cmp(&ctx->ac, LLVMRealOLT, src[0], src[1]);
693 break;
694 case nir_op_fge32:
695 result = emit_float_cmp(&ctx->ac, LLVMRealOGE, src[0], src[1]);
696 break;
697 case nir_op_fabs:
698 result = emit_intrin_1f_param(&ctx->ac, "llvm.fabs",
699 ac_to_float_type(&ctx->ac, def_type), src[0]);
700 break;
701 case nir_op_iabs:
702 result = emit_iabs(&ctx->ac, src[0]);
703 break;
704 case nir_op_imax:
705 result = ac_build_imax(&ctx->ac, src[0], src[1]);
706 break;
707 case nir_op_imin:
708 result = ac_build_imin(&ctx->ac, src[0], src[1]);
709 break;
710 case nir_op_umax:
711 result = ac_build_umax(&ctx->ac, src[0], src[1]);
712 break;
713 case nir_op_umin:
714 result = ac_build_umin(&ctx->ac, src[0], src[1]);
715 break;
716 case nir_op_isign:
717 result = ac_build_isign(&ctx->ac, src[0],
718 instr->dest.dest.ssa.bit_size);
719 break;
720 case nir_op_fsign:
721 src[0] = ac_to_float(&ctx->ac, src[0]);
722 result = ac_build_fsign(&ctx->ac, src[0],
723 instr->dest.dest.ssa.bit_size);
724 break;
725 case nir_op_ffloor:
726 result = emit_intrin_1f_param(&ctx->ac, "llvm.floor",
727 ac_to_float_type(&ctx->ac, def_type), src[0]);
728 break;
729 case nir_op_ftrunc:
730 result = emit_intrin_1f_param(&ctx->ac, "llvm.trunc",
731 ac_to_float_type(&ctx->ac, def_type), src[0]);
732 break;
733 case nir_op_fceil:
734 result = emit_intrin_1f_param(&ctx->ac, "llvm.ceil",
735 ac_to_float_type(&ctx->ac, def_type), src[0]);
736 break;
737 case nir_op_fround_even:
738 result = emit_intrin_1f_param(&ctx->ac, "llvm.rint",
739 ac_to_float_type(&ctx->ac, def_type),src[0]);
740 break;
741 case nir_op_ffract:
742 src[0] = ac_to_float(&ctx->ac, src[0]);
743 result = ac_build_fract(&ctx->ac, src[0],
744 instr->dest.dest.ssa.bit_size);
745 break;
746 case nir_op_fsin:
747 result = emit_intrin_1f_param(&ctx->ac, "llvm.sin",
748 ac_to_float_type(&ctx->ac, def_type), src[0]);
749 break;
750 case nir_op_fcos:
751 result = emit_intrin_1f_param(&ctx->ac, "llvm.cos",
752 ac_to_float_type(&ctx->ac, def_type), src[0]);
753 break;
754 case nir_op_fsqrt:
755 result = emit_intrin_1f_param(&ctx->ac, "llvm.sqrt",
756 ac_to_float_type(&ctx->ac, def_type), src[0]);
757 break;
758 case nir_op_fexp2:
759 result = emit_intrin_1f_param(&ctx->ac, "llvm.exp2",
760 ac_to_float_type(&ctx->ac, def_type), src[0]);
761 break;
762 case nir_op_flog2:
763 result = emit_intrin_1f_param(&ctx->ac, "llvm.log2",
764 ac_to_float_type(&ctx->ac, def_type), src[0]);
765 break;
766 case nir_op_frsq:
767 result = emit_intrin_1f_param(&ctx->ac, "llvm.sqrt",
768 ac_to_float_type(&ctx->ac, def_type), src[0]);
769 result = ac_build_fdiv(&ctx->ac, LLVMConstReal(LLVMTypeOf(result), 1.0), result);
770 break;
771 case nir_op_frexp_exp:
772 src[0] = ac_to_float(&ctx->ac, src[0]);
773 result = ac_build_frexp_exp(&ctx->ac, src[0],
774 ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[0])));
775 if (ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[0])) == 16)
776 result = LLVMBuildSExt(ctx->ac.builder, result,
777 ctx->ac.i32, "");
778 break;
779 case nir_op_frexp_sig:
780 src[0] = ac_to_float(&ctx->ac, src[0]);
781 result = ac_build_frexp_mant(&ctx->ac, src[0],
782 instr->dest.dest.ssa.bit_size);
783 break;
784 case nir_op_fpow:
785 result = emit_intrin_2f_param(&ctx->ac, "llvm.pow",
786 ac_to_float_type(&ctx->ac, def_type), src[0], src[1]);
787 break;
788 case nir_op_fmax:
789 result = emit_intrin_2f_param(&ctx->ac, "llvm.maxnum",
790 ac_to_float_type(&ctx->ac, def_type), src[0], src[1]);
791 if (ctx->ac.chip_class < GFX9 &&
792 instr->dest.dest.ssa.bit_size == 32) {
793 /* Only pre-GFX9 chips do not flush denorms. */
794 result = emit_intrin_1f_param(&ctx->ac, "llvm.canonicalize",
795 ac_to_float_type(&ctx->ac, def_type),
796 result);
797 }
798 break;
799 case nir_op_fmin:
800 result = emit_intrin_2f_param(&ctx->ac, "llvm.minnum",
801 ac_to_float_type(&ctx->ac, def_type), src[0], src[1]);
802 if (ctx->ac.chip_class < GFX9 &&
803 instr->dest.dest.ssa.bit_size == 32) {
804 /* Only pre-GFX9 chips do not flush denorms. */
805 result = emit_intrin_1f_param(&ctx->ac, "llvm.canonicalize",
806 ac_to_float_type(&ctx->ac, def_type),
807 result);
808 }
809 break;
810 case nir_op_ffma:
811 result = emit_intrin_3f_param(&ctx->ac, "llvm.fmuladd",
812 ac_to_float_type(&ctx->ac, def_type), src[0], src[1], src[2]);
813 break;
814 case nir_op_ldexp:
815 src[0] = ac_to_float(&ctx->ac, src[0]);
816 if (ac_get_elem_bits(&ctx->ac, def_type) == 32)
817 result = ac_build_intrinsic(&ctx->ac, "llvm.amdgcn.ldexp.f32", ctx->ac.f32, src, 2, AC_FUNC_ATTR_READNONE);
818 else if (ac_get_elem_bits(&ctx->ac, def_type) == 16)
819 result = ac_build_intrinsic(&ctx->ac, "llvm.amdgcn.ldexp.f16", ctx->ac.f16, src, 2, AC_FUNC_ATTR_READNONE);
820 else
821 result = ac_build_intrinsic(&ctx->ac, "llvm.amdgcn.ldexp.f64", ctx->ac.f64, src, 2, AC_FUNC_ATTR_READNONE);
822 break;
823 case nir_op_bfm:
824 result = emit_bfm(&ctx->ac, src[0], src[1]);
825 break;
826 case nir_op_bitfield_select:
827 result = emit_bitfield_select(&ctx->ac, src[0], src[1], src[2]);
828 break;
829 case nir_op_ubfe:
830 result = ac_build_bfe(&ctx->ac, src[0], src[1], src[2], false);
831 break;
832 case nir_op_ibfe:
833 result = ac_build_bfe(&ctx->ac, src[0], src[1], src[2], true);
834 break;
835 case nir_op_bitfield_reverse:
836 result = ac_build_bitfield_reverse(&ctx->ac, src[0]);
837 break;
838 case nir_op_bit_count:
839 result = ac_build_bit_count(&ctx->ac, src[0]);
840 break;
841 case nir_op_vec2:
842 case nir_op_vec3:
843 case nir_op_vec4:
844 for (unsigned i = 0; i < nir_op_infos[instr->op].num_inputs; i++)
845 src[i] = ac_to_integer(&ctx->ac, src[i]);
846 result = ac_build_gather_values(&ctx->ac, src, num_components);
847 break;
848 case nir_op_f2i8:
849 case nir_op_f2i16:
850 case nir_op_f2i32:
851 case nir_op_f2i64:
852 src[0] = ac_to_float(&ctx->ac, src[0]);
853 result = LLVMBuildFPToSI(ctx->ac.builder, src[0], def_type, "");
854 break;
855 case nir_op_f2u8:
856 case nir_op_f2u16:
857 case nir_op_f2u32:
858 case nir_op_f2u64:
859 src[0] = ac_to_float(&ctx->ac, src[0]);
860 result = LLVMBuildFPToUI(ctx->ac.builder, src[0], def_type, "");
861 break;
862 case nir_op_i2f16:
863 case nir_op_i2f32:
864 case nir_op_i2f64:
865 result = LLVMBuildSIToFP(ctx->ac.builder, src[0], ac_to_float_type(&ctx->ac, def_type), "");
866 break;
867 case nir_op_u2f16:
868 case nir_op_u2f32:
869 case nir_op_u2f64:
870 result = LLVMBuildUIToFP(ctx->ac.builder, src[0], ac_to_float_type(&ctx->ac, def_type), "");
871 break;
872 case nir_op_f2f16_rtz:
873 src[0] = ac_to_float(&ctx->ac, src[0]);
874 if (LLVMTypeOf(src[0]) == ctx->ac.f64)
875 src[0] = LLVMBuildFPTrunc(ctx->ac.builder, src[0], ctx->ac.f32, "");
876 LLVMValueRef param[2] = { src[0], ctx->ac.f32_0 };
877 result = ac_build_cvt_pkrtz_f16(&ctx->ac, param);
878 result = LLVMBuildExtractElement(ctx->ac.builder, result, ctx->ac.i32_0, "");
879 break;
880 case nir_op_f2f16_rtne:
881 case nir_op_f2f16:
882 case nir_op_f2f32:
883 case nir_op_f2f64:
884 src[0] = ac_to_float(&ctx->ac, src[0]);
885 if (ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[0])) < ac_get_elem_bits(&ctx->ac, def_type))
886 result = LLVMBuildFPExt(ctx->ac.builder, src[0], ac_to_float_type(&ctx->ac, def_type), "");
887 else
888 result = LLVMBuildFPTrunc(ctx->ac.builder, src[0], ac_to_float_type(&ctx->ac, def_type), "");
889 break;
890 case nir_op_u2u8:
891 case nir_op_u2u16:
892 case nir_op_u2u32:
893 case nir_op_u2u64:
894 if (ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[0])) < ac_get_elem_bits(&ctx->ac, def_type))
895 result = LLVMBuildZExt(ctx->ac.builder, src[0], def_type, "");
896 else
897 result = LLVMBuildTrunc(ctx->ac.builder, src[0], def_type, "");
898 break;
899 case nir_op_i2i8:
900 case nir_op_i2i16:
901 case nir_op_i2i32:
902 case nir_op_i2i64:
903 if (ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[0])) < ac_get_elem_bits(&ctx->ac, def_type))
904 result = LLVMBuildSExt(ctx->ac.builder, src[0], def_type, "");
905 else
906 result = LLVMBuildTrunc(ctx->ac.builder, src[0], def_type, "");
907 break;
908 case nir_op_b32csel:
909 result = emit_bcsel(&ctx->ac, src[0], src[1], src[2]);
910 break;
911 case nir_op_find_lsb:
912 result = ac_find_lsb(&ctx->ac, ctx->ac.i32, src[0]);
913 break;
914 case nir_op_ufind_msb:
915 result = ac_build_umsb(&ctx->ac, src[0], ctx->ac.i32);
916 break;
917 case nir_op_ifind_msb:
918 result = ac_build_imsb(&ctx->ac, src[0], ctx->ac.i32);
919 break;
920 case nir_op_uadd_carry:
921 result = emit_uint_carry(&ctx->ac, "llvm.uadd.with.overflow.i32", src[0], src[1]);
922 break;
923 case nir_op_usub_borrow:
924 result = emit_uint_carry(&ctx->ac, "llvm.usub.with.overflow.i32", src[0], src[1]);
925 break;
926 case nir_op_b2f16:
927 case nir_op_b2f32:
928 case nir_op_b2f64:
929 result = emit_b2f(&ctx->ac, src[0], instr->dest.dest.ssa.bit_size);
930 break;
931 case nir_op_f2b32:
932 result = emit_f2b(&ctx->ac, src[0]);
933 break;
934 case nir_op_b2i8:
935 case nir_op_b2i16:
936 case nir_op_b2i32:
937 case nir_op_b2i64:
938 result = emit_b2i(&ctx->ac, src[0], instr->dest.dest.ssa.bit_size);
939 break;
940 case nir_op_i2b32:
941 result = emit_i2b(&ctx->ac, src[0]);
942 break;
943 case nir_op_fquantize2f16:
944 result = emit_f2f16(&ctx->ac, src[0]);
945 break;
946 case nir_op_umul_high:
947 result = emit_umul_high(&ctx->ac, src[0], src[1]);
948 break;
949 case nir_op_imul_high:
950 result = emit_imul_high(&ctx->ac, src[0], src[1]);
951 break;
952 case nir_op_pack_half_2x16:
953 result = emit_pack_2x16(&ctx->ac, src[0], ac_build_cvt_pkrtz_f16);
954 break;
955 case nir_op_pack_snorm_2x16:
956 result = emit_pack_2x16(&ctx->ac, src[0], ac_build_cvt_pknorm_i16);
957 break;
958 case nir_op_pack_unorm_2x16:
959 result = emit_pack_2x16(&ctx->ac, src[0], ac_build_cvt_pknorm_u16);
960 break;
961 case nir_op_unpack_half_2x16:
962 result = emit_unpack_half_2x16(&ctx->ac, src[0]);
963 break;
964 case nir_op_fddx:
965 case nir_op_fddy:
966 case nir_op_fddx_fine:
967 case nir_op_fddy_fine:
968 case nir_op_fddx_coarse:
969 case nir_op_fddy_coarse:
970 result = emit_ddxy(ctx, instr->op, src[0]);
971 break;
972
973 case nir_op_unpack_64_2x32_split_x: {
974 assert(ac_get_llvm_num_components(src[0]) == 1);
975 LLVMValueRef tmp = LLVMBuildBitCast(ctx->ac.builder, src[0],
976 ctx->ac.v2i32,
977 "");
978 result = LLVMBuildExtractElement(ctx->ac.builder, tmp,
979 ctx->ac.i32_0, "");
980 break;
981 }
982
983 case nir_op_unpack_64_2x32_split_y: {
984 assert(ac_get_llvm_num_components(src[0]) == 1);
985 LLVMValueRef tmp = LLVMBuildBitCast(ctx->ac.builder, src[0],
986 ctx->ac.v2i32,
987 "");
988 result = LLVMBuildExtractElement(ctx->ac.builder, tmp,
989 ctx->ac.i32_1, "");
990 break;
991 }
992
993 case nir_op_pack_64_2x32_split: {
994 LLVMValueRef tmp = ac_build_gather_values(&ctx->ac, src, 2);
995 result = LLVMBuildBitCast(ctx->ac.builder, tmp, ctx->ac.i64, "");
996 break;
997 }
998
999 case nir_op_pack_32_2x16_split: {
1000 LLVMValueRef tmp = ac_build_gather_values(&ctx->ac, src, 2);
1001 result = LLVMBuildBitCast(ctx->ac.builder, tmp, ctx->ac.i32, "");
1002 break;
1003 }
1004
1005 case nir_op_unpack_32_2x16_split_x: {
1006 LLVMValueRef tmp = LLVMBuildBitCast(ctx->ac.builder, src[0],
1007 ctx->ac.v2i16,
1008 "");
1009 result = LLVMBuildExtractElement(ctx->ac.builder, tmp,
1010 ctx->ac.i32_0, "");
1011 break;
1012 }
1013
1014 case nir_op_unpack_32_2x16_split_y: {
1015 LLVMValueRef tmp = LLVMBuildBitCast(ctx->ac.builder, src[0],
1016 ctx->ac.v2i16,
1017 "");
1018 result = LLVMBuildExtractElement(ctx->ac.builder, tmp,
1019 ctx->ac.i32_1, "");
1020 break;
1021 }
1022
1023 case nir_op_cube_face_coord: {
1024 src[0] = ac_to_float(&ctx->ac, src[0]);
1025 LLVMValueRef results[2];
1026 LLVMValueRef in[3];
1027 for (unsigned chan = 0; chan < 3; chan++)
1028 in[chan] = ac_llvm_extract_elem(&ctx->ac, src[0], chan);
1029 results[0] = ac_build_intrinsic(&ctx->ac, "llvm.amdgcn.cubesc",
1030 ctx->ac.f32, in, 3, AC_FUNC_ATTR_READNONE);
1031 results[1] = ac_build_intrinsic(&ctx->ac, "llvm.amdgcn.cubetc",
1032 ctx->ac.f32, in, 3, AC_FUNC_ATTR_READNONE);
1033 LLVMValueRef ma = ac_build_intrinsic(&ctx->ac, "llvm.amdgcn.cubema",
1034 ctx->ac.f32, in, 3, AC_FUNC_ATTR_READNONE);
1035 results[0] = ac_build_fdiv(&ctx->ac, results[0], ma);
1036 results[1] = ac_build_fdiv(&ctx->ac, results[1], ma);
1037 LLVMValueRef offset = LLVMConstReal(ctx->ac.f32, 0.5);
1038 results[0] = LLVMBuildFAdd(ctx->ac.builder, results[0], offset, "");
1039 results[1] = LLVMBuildFAdd(ctx->ac.builder, results[1], offset, "");
1040 result = ac_build_gather_values(&ctx->ac, results, 2);
1041 break;
1042 }
1043
1044 case nir_op_cube_face_index: {
1045 src[0] = ac_to_float(&ctx->ac, src[0]);
1046 LLVMValueRef in[3];
1047 for (unsigned chan = 0; chan < 3; chan++)
1048 in[chan] = ac_llvm_extract_elem(&ctx->ac, src[0], chan);
1049 result = ac_build_intrinsic(&ctx->ac, "llvm.amdgcn.cubeid",
1050 ctx->ac.f32, in, 3, AC_FUNC_ATTR_READNONE);
1051 break;
1052 }
1053
1054 case nir_op_fmin3:
1055 result = emit_intrin_2f_param(&ctx->ac, "llvm.minnum",
1056 ac_to_float_type(&ctx->ac, def_type), src[0], src[1]);
1057 result = emit_intrin_2f_param(&ctx->ac, "llvm.minnum",
1058 ac_to_float_type(&ctx->ac, def_type), result, src[2]);
1059 break;
1060 case nir_op_umin3:
1061 result = ac_build_umin(&ctx->ac, src[0], src[1]);
1062 result = ac_build_umin(&ctx->ac, result, src[2]);
1063 break;
1064 case nir_op_imin3:
1065 result = ac_build_imin(&ctx->ac, src[0], src[1]);
1066 result = ac_build_imin(&ctx->ac, result, src[2]);
1067 break;
1068 case nir_op_fmax3:
1069 result = emit_intrin_2f_param(&ctx->ac, "llvm.maxnum",
1070 ac_to_float_type(&ctx->ac, def_type), src[0], src[1]);
1071 result = emit_intrin_2f_param(&ctx->ac, "llvm.maxnum",
1072 ac_to_float_type(&ctx->ac, def_type), result, src[2]);
1073 break;
1074 case nir_op_umax3:
1075 result = ac_build_umax(&ctx->ac, src[0], src[1]);
1076 result = ac_build_umax(&ctx->ac, result, src[2]);
1077 break;
1078 case nir_op_imax3:
1079 result = ac_build_imax(&ctx->ac, src[0], src[1]);
1080 result = ac_build_imax(&ctx->ac, result, src[2]);
1081 break;
1082 case nir_op_fmed3: {
1083 src[0] = ac_to_float(&ctx->ac, src[0]);
1084 src[1] = ac_to_float(&ctx->ac, src[1]);
1085 src[2] = ac_to_float(&ctx->ac, src[2]);
1086 result = ac_build_fmed3(&ctx->ac, src[0], src[1], src[2],
1087 instr->dest.dest.ssa.bit_size);
1088 break;
1089 }
1090 case nir_op_imed3: {
1091 LLVMValueRef tmp1 = ac_build_imin(&ctx->ac, src[0], src[1]);
1092 LLVMValueRef tmp2 = ac_build_imax(&ctx->ac, src[0], src[1]);
1093 tmp2 = ac_build_imin(&ctx->ac, tmp2, src[2]);
1094 result = ac_build_imax(&ctx->ac, tmp1, tmp2);
1095 break;
1096 }
1097 case nir_op_umed3: {
1098 LLVMValueRef tmp1 = ac_build_umin(&ctx->ac, src[0], src[1]);
1099 LLVMValueRef tmp2 = ac_build_umax(&ctx->ac, src[0], src[1]);
1100 tmp2 = ac_build_umin(&ctx->ac, tmp2, src[2]);
1101 result = ac_build_umax(&ctx->ac, tmp1, tmp2);
1102 break;
1103 }
1104
1105 default:
1106 fprintf(stderr, "Unknown NIR alu instr: ");
1107 nir_print_instr(&instr->instr, stderr);
1108 fprintf(stderr, "\n");
1109 abort();
1110 }
1111
1112 if (result) {
1113 assert(instr->dest.dest.is_ssa);
1114 result = ac_to_integer_or_pointer(&ctx->ac, result);
1115 ctx->ssa_defs[instr->dest.dest.ssa.index] = result;
1116 }
1117 }
1118
1119 static void visit_load_const(struct ac_nir_context *ctx,
1120 const nir_load_const_instr *instr)
1121 {
1122 LLVMValueRef values[4], value = NULL;
1123 LLVMTypeRef element_type =
1124 LLVMIntTypeInContext(ctx->ac.context, instr->def.bit_size);
1125
1126 for (unsigned i = 0; i < instr->def.num_components; ++i) {
1127 switch (instr->def.bit_size) {
1128 case 8:
1129 values[i] = LLVMConstInt(element_type,
1130 instr->value[i].u8, false);
1131 break;
1132 case 16:
1133 values[i] = LLVMConstInt(element_type,
1134 instr->value[i].u16, false);
1135 break;
1136 case 32:
1137 values[i] = LLVMConstInt(element_type,
1138 instr->value[i].u32, false);
1139 break;
1140 case 64:
1141 values[i] = LLVMConstInt(element_type,
1142 instr->value[i].u64, false);
1143 break;
1144 default:
1145 fprintf(stderr,
1146 "unsupported nir load_const bit_size: %d\n",
1147 instr->def.bit_size);
1148 abort();
1149 }
1150 }
1151 if (instr->def.num_components > 1) {
1152 value = LLVMConstVector(values, instr->def.num_components);
1153 } else
1154 value = values[0];
1155
1156 ctx->ssa_defs[instr->def.index] = value;
1157 }
1158
1159 static LLVMValueRef
1160 get_buffer_size(struct ac_nir_context *ctx, LLVMValueRef descriptor, bool in_elements)
1161 {
1162 LLVMValueRef size =
1163 LLVMBuildExtractElement(ctx->ac.builder, descriptor,
1164 LLVMConstInt(ctx->ac.i32, 2, false), "");
1165
1166 /* GFX8 only */
1167 if (ctx->ac.chip_class == GFX8 && in_elements) {
1168 /* On GFX8, the descriptor contains the size in bytes,
1169 * but TXQ must return the size in elements.
1170 * The stride is always non-zero for resources using TXQ.
1171 */
1172 LLVMValueRef stride =
1173 LLVMBuildExtractElement(ctx->ac.builder, descriptor,
1174 ctx->ac.i32_1, "");
1175 stride = LLVMBuildLShr(ctx->ac.builder, stride,
1176 LLVMConstInt(ctx->ac.i32, 16, false), "");
1177 stride = LLVMBuildAnd(ctx->ac.builder, stride,
1178 LLVMConstInt(ctx->ac.i32, 0x3fff, false), "");
1179
1180 size = LLVMBuildUDiv(ctx->ac.builder, size, stride, "");
1181 }
1182 return size;
1183 }
1184
1185 /* Gather4 should follow the same rules as bilinear filtering, but the hardware
1186 * incorrectly forces nearest filtering if the texture format is integer.
1187 * The only effect it has on Gather4, which always returns 4 texels for
1188 * bilinear filtering, is that the final coordinates are off by 0.5 of
1189 * the texel size.
1190 *
1191 * The workaround is to subtract 0.5 from the unnormalized coordinates,
1192 * or (0.5 / size) from the normalized coordinates.
1193 *
1194 * However, cube textures with 8_8_8_8 data formats require a different
1195 * workaround of overriding the num format to USCALED/SSCALED. This would lose
1196 * precision in 32-bit data formats, so it needs to be applied dynamically at
1197 * runtime. In this case, return an i1 value that indicates whether the
1198 * descriptor was overridden (and hence a fixup of the sampler result is needed).
1199 */
1200 static LLVMValueRef lower_gather4_integer(struct ac_llvm_context *ctx,
1201 nir_variable *var,
1202 struct ac_image_args *args,
1203 const nir_tex_instr *instr)
1204 {
1205 const struct glsl_type *type = glsl_without_array(var->type);
1206 enum glsl_base_type stype = glsl_get_sampler_result_type(type);
1207 LLVMValueRef wa_8888 = NULL;
1208 LLVMValueRef half_texel[2];
1209 LLVMValueRef result;
1210
1211 assert(stype == GLSL_TYPE_INT || stype == GLSL_TYPE_UINT);
1212
1213 if (instr->sampler_dim == GLSL_SAMPLER_DIM_CUBE) {
1214 LLVMValueRef formats;
1215 LLVMValueRef data_format;
1216 LLVMValueRef wa_formats;
1217
1218 formats = LLVMBuildExtractElement(ctx->builder, args->resource, ctx->i32_1, "");
1219
1220 data_format = LLVMBuildLShr(ctx->builder, formats,
1221 LLVMConstInt(ctx->i32, 20, false), "");
1222 data_format = LLVMBuildAnd(ctx->builder, data_format,
1223 LLVMConstInt(ctx->i32, (1u << 6) - 1, false), "");
1224 wa_8888 = LLVMBuildICmp(
1225 ctx->builder, LLVMIntEQ, data_format,
1226 LLVMConstInt(ctx->i32, V_008F14_IMG_DATA_FORMAT_8_8_8_8, false),
1227 "");
1228
1229 uint32_t wa_num_format =
1230 stype == GLSL_TYPE_UINT ?
1231 S_008F14_NUM_FORMAT(V_008F14_IMG_NUM_FORMAT_USCALED) :
1232 S_008F14_NUM_FORMAT(V_008F14_IMG_NUM_FORMAT_SSCALED);
1233 wa_formats = LLVMBuildAnd(ctx->builder, formats,
1234 LLVMConstInt(ctx->i32, C_008F14_NUM_FORMAT, false),
1235 "");
1236 wa_formats = LLVMBuildOr(ctx->builder, wa_formats,
1237 LLVMConstInt(ctx->i32, wa_num_format, false), "");
1238
1239 formats = LLVMBuildSelect(ctx->builder, wa_8888, wa_formats, formats, "");
1240 args->resource = LLVMBuildInsertElement(
1241 ctx->builder, args->resource, formats, ctx->i32_1, "");
1242 }
1243
1244 if (instr->sampler_dim == GLSL_SAMPLER_DIM_RECT) {
1245 assert(!wa_8888);
1246 half_texel[0] = half_texel[1] = LLVMConstReal(ctx->f32, -0.5);
1247 } else {
1248 struct ac_image_args resinfo = {};
1249 LLVMBasicBlockRef bbs[2];
1250
1251 LLVMValueRef unnorm = NULL;
1252 LLVMValueRef default_offset = ctx->f32_0;
1253 if (instr->sampler_dim == GLSL_SAMPLER_DIM_2D &&
1254 !instr->is_array) {
1255 /* In vulkan, whether the sampler uses unnormalized
1256 * coordinates or not is a dynamic property of the
1257 * sampler. Hence, to figure out whether or not we
1258 * need to divide by the texture size, we need to test
1259 * the sampler at runtime. This tests the bit set by
1260 * radv_init_sampler().
1261 */
1262 LLVMValueRef sampler0 =
1263 LLVMBuildExtractElement(ctx->builder, args->sampler, ctx->i32_0, "");
1264 sampler0 = LLVMBuildLShr(ctx->builder, sampler0,
1265 LLVMConstInt(ctx->i32, 15, false), "");
1266 sampler0 = LLVMBuildAnd(ctx->builder, sampler0, ctx->i32_1, "");
1267 unnorm = LLVMBuildICmp(ctx->builder, LLVMIntEQ, sampler0, ctx->i32_1, "");
1268 default_offset = LLVMConstReal(ctx->f32, -0.5);
1269 }
1270
1271 bbs[0] = LLVMGetInsertBlock(ctx->builder);
1272 if (wa_8888 || unnorm) {
1273 assert(!(wa_8888 && unnorm));
1274 LLVMValueRef not_needed = wa_8888 ? wa_8888 : unnorm;
1275 /* Skip the texture size query entirely if we don't need it. */
1276 ac_build_ifcc(ctx, LLVMBuildNot(ctx->builder, not_needed, ""), 2000);
1277 bbs[1] = LLVMGetInsertBlock(ctx->builder);
1278 }
1279
1280 /* Query the texture size. */
1281 resinfo.dim = get_ac_sampler_dim(ctx, instr->sampler_dim, instr->is_array);
1282 resinfo.opcode = ac_image_get_resinfo;
1283 resinfo.dmask = 0xf;
1284 resinfo.lod = ctx->i32_0;
1285 resinfo.resource = args->resource;
1286 resinfo.attributes = AC_FUNC_ATTR_READNONE;
1287 LLVMValueRef size = ac_build_image_opcode(ctx, &resinfo);
1288
1289 /* Compute -0.5 / size. */
1290 for (unsigned c = 0; c < 2; c++) {
1291 half_texel[c] =
1292 LLVMBuildExtractElement(ctx->builder, size,
1293 LLVMConstInt(ctx->i32, c, 0), "");
1294 half_texel[c] = LLVMBuildUIToFP(ctx->builder, half_texel[c], ctx->f32, "");
1295 half_texel[c] = ac_build_fdiv(ctx, ctx->f32_1, half_texel[c]);
1296 half_texel[c] = LLVMBuildFMul(ctx->builder, half_texel[c],
1297 LLVMConstReal(ctx->f32, -0.5), "");
1298 }
1299
1300 if (wa_8888 || unnorm) {
1301 ac_build_endif(ctx, 2000);
1302
1303 for (unsigned c = 0; c < 2; c++) {
1304 LLVMValueRef values[2] = { default_offset, half_texel[c] };
1305 half_texel[c] = ac_build_phi(ctx, ctx->f32, 2,
1306 values, bbs);
1307 }
1308 }
1309 }
1310
1311 for (unsigned c = 0; c < 2; c++) {
1312 LLVMValueRef tmp;
1313 tmp = LLVMBuildBitCast(ctx->builder, args->coords[c], ctx->f32, "");
1314 args->coords[c] = LLVMBuildFAdd(ctx->builder, tmp, half_texel[c], "");
1315 }
1316
1317 args->attributes = AC_FUNC_ATTR_READNONE;
1318 result = ac_build_image_opcode(ctx, args);
1319
1320 if (instr->sampler_dim == GLSL_SAMPLER_DIM_CUBE) {
1321 LLVMValueRef tmp, tmp2;
1322
1323 /* if the cube workaround is in place, f2i the result. */
1324 for (unsigned c = 0; c < 4; c++) {
1325 tmp = LLVMBuildExtractElement(ctx->builder, result, LLVMConstInt(ctx->i32, c, false), "");
1326 if (stype == GLSL_TYPE_UINT)
1327 tmp2 = LLVMBuildFPToUI(ctx->builder, tmp, ctx->i32, "");
1328 else
1329 tmp2 = LLVMBuildFPToSI(ctx->builder, tmp, ctx->i32, "");
1330 tmp = LLVMBuildBitCast(ctx->builder, tmp, ctx->i32, "");
1331 tmp2 = LLVMBuildBitCast(ctx->builder, tmp2, ctx->i32, "");
1332 tmp = LLVMBuildSelect(ctx->builder, wa_8888, tmp2, tmp, "");
1333 tmp = LLVMBuildBitCast(ctx->builder, tmp, ctx->f32, "");
1334 result = LLVMBuildInsertElement(ctx->builder, result, tmp, LLVMConstInt(ctx->i32, c, false), "");
1335 }
1336 }
1337 return result;
1338 }
1339
1340 static nir_deref_instr *get_tex_texture_deref(const nir_tex_instr *instr)
1341 {
1342 nir_deref_instr *texture_deref_instr = NULL;
1343
1344 for (unsigned i = 0; i < instr->num_srcs; i++) {
1345 switch (instr->src[i].src_type) {
1346 case nir_tex_src_texture_deref:
1347 texture_deref_instr = nir_src_as_deref(instr->src[i].src);
1348 break;
1349 default:
1350 break;
1351 }
1352 }
1353 return texture_deref_instr;
1354 }
1355
1356 static LLVMValueRef build_tex_intrinsic(struct ac_nir_context *ctx,
1357 const nir_tex_instr *instr,
1358 struct ac_image_args *args)
1359 {
1360 if (instr->sampler_dim == GLSL_SAMPLER_DIM_BUF) {
1361 unsigned mask = nir_ssa_def_components_read(&instr->dest.ssa);
1362
1363 return ac_build_buffer_load_format(&ctx->ac,
1364 args->resource,
1365 args->coords[0],
1366 ctx->ac.i32_0,
1367 util_last_bit(mask),
1368 0, true);
1369 }
1370
1371 args->opcode = ac_image_sample;
1372
1373 switch (instr->op) {
1374 case nir_texop_txf:
1375 case nir_texop_txf_ms:
1376 case nir_texop_samples_identical:
1377 args->opcode = args->level_zero ||
1378 instr->sampler_dim == GLSL_SAMPLER_DIM_MS ?
1379 ac_image_load : ac_image_load_mip;
1380 args->level_zero = false;
1381 break;
1382 case nir_texop_txs:
1383 case nir_texop_query_levels:
1384 args->opcode = ac_image_get_resinfo;
1385 if (!args->lod)
1386 args->lod = ctx->ac.i32_0;
1387 args->level_zero = false;
1388 break;
1389 case nir_texop_tex:
1390 if (ctx->stage != MESA_SHADER_FRAGMENT) {
1391 assert(!args->lod);
1392 args->level_zero = true;
1393 }
1394 break;
1395 case nir_texop_tg4:
1396 args->opcode = ac_image_gather4;
1397 args->level_zero = true;
1398 break;
1399 case nir_texop_lod:
1400 args->opcode = ac_image_get_lod;
1401 break;
1402 default:
1403 break;
1404 }
1405
1406 if (instr->op == nir_texop_tg4 && ctx->ac.chip_class <= GFX8) {
1407 nir_deref_instr *texture_deref_instr = get_tex_texture_deref(instr);
1408 nir_variable *var = nir_deref_instr_get_variable(texture_deref_instr);
1409 const struct glsl_type *type = glsl_without_array(var->type);
1410 enum glsl_base_type stype = glsl_get_sampler_result_type(type);
1411 if (stype == GLSL_TYPE_UINT || stype == GLSL_TYPE_INT) {
1412 return lower_gather4_integer(&ctx->ac, var, args, instr);
1413 }
1414 }
1415
1416 /* Fixup for GFX9 which allocates 1D textures as 2D. */
1417 if (instr->op == nir_texop_lod && ctx->ac.chip_class == GFX9) {
1418 if ((args->dim == ac_image_2darray ||
1419 args->dim == ac_image_2d) && !args->coords[1]) {
1420 args->coords[1] = ctx->ac.i32_0;
1421 }
1422 }
1423
1424 args->attributes = AC_FUNC_ATTR_READNONE;
1425 bool cs_derivs = ctx->stage == MESA_SHADER_COMPUTE &&
1426 ctx->info->cs.derivative_group != DERIVATIVE_GROUP_NONE;
1427 if (ctx->stage == MESA_SHADER_FRAGMENT || cs_derivs) {
1428 /* Prevent texture instructions with implicit derivatives from being
1429 * sinked into branches. */
1430 switch (instr->op) {
1431 case nir_texop_tex:
1432 case nir_texop_txb:
1433 case nir_texop_lod:
1434 args->attributes |= AC_FUNC_ATTR_CONVERGENT;
1435 break;
1436 default:
1437 break;
1438 }
1439 }
1440
1441 return ac_build_image_opcode(&ctx->ac, args);
1442 }
1443
1444 static LLVMValueRef visit_vulkan_resource_reindex(struct ac_nir_context *ctx,
1445 nir_intrinsic_instr *instr)
1446 {
1447 LLVMValueRef ptr = get_src(ctx, instr->src[0]);
1448 LLVMValueRef index = get_src(ctx, instr->src[1]);
1449
1450 LLVMValueRef result = LLVMBuildGEP(ctx->ac.builder, ptr, &index, 1, "");
1451 LLVMSetMetadata(result, ctx->ac.uniform_md_kind, ctx->ac.empty_md);
1452 return result;
1453 }
1454
1455 static LLVMValueRef visit_load_push_constant(struct ac_nir_context *ctx,
1456 nir_intrinsic_instr *instr)
1457 {
1458 LLVMValueRef ptr, addr;
1459 LLVMValueRef src0 = get_src(ctx, instr->src[0]);
1460 unsigned index = nir_intrinsic_base(instr);
1461
1462 addr = LLVMConstInt(ctx->ac.i32, index, 0);
1463 addr = LLVMBuildAdd(ctx->ac.builder, addr, src0, "");
1464
1465 /* Load constant values from user SGPRS when possible, otherwise
1466 * fallback to the default path that loads directly from memory.
1467 */
1468 if (LLVMIsConstant(src0) &&
1469 instr->dest.ssa.bit_size == 32) {
1470 unsigned count = instr->dest.ssa.num_components;
1471 unsigned offset = index;
1472
1473 offset += LLVMConstIntGetZExtValue(src0);
1474 offset /= 4;
1475
1476 offset -= ctx->abi->base_inline_push_consts;
1477
1478 if (offset + count <= ctx->abi->num_inline_push_consts) {
1479 return ac_build_gather_values(&ctx->ac,
1480 ctx->abi->inline_push_consts + offset,
1481 count);
1482 }
1483 }
1484
1485 ptr = LLVMBuildGEP(ctx->ac.builder, ctx->abi->push_constants, &addr, 1, "");
1486
1487 if (instr->dest.ssa.bit_size == 8) {
1488 unsigned load_dwords = instr->dest.ssa.num_components > 1 ? 2 : 1;
1489 LLVMTypeRef vec_type = LLVMVectorType(LLVMInt8TypeInContext(ctx->ac.context), 4 * load_dwords);
1490 ptr = ac_cast_ptr(&ctx->ac, ptr, vec_type);
1491 LLVMValueRef res = LLVMBuildLoad(ctx->ac.builder, ptr, "");
1492
1493 LLVMValueRef params[3];
1494 if (load_dwords > 1) {
1495 LLVMValueRef res_vec = LLVMBuildBitCast(ctx->ac.builder, res, LLVMVectorType(ctx->ac.i32, 2), "");
1496 params[0] = LLVMBuildExtractElement(ctx->ac.builder, res_vec, LLVMConstInt(ctx->ac.i32, 1, false), "");
1497 params[1] = LLVMBuildExtractElement(ctx->ac.builder, res_vec, LLVMConstInt(ctx->ac.i32, 0, false), "");
1498 } else {
1499 res = LLVMBuildBitCast(ctx->ac.builder, res, ctx->ac.i32, "");
1500 params[0] = ctx->ac.i32_0;
1501 params[1] = res;
1502 }
1503 params[2] = addr;
1504 res = ac_build_intrinsic(&ctx->ac, "llvm.amdgcn.alignbyte", ctx->ac.i32, params, 3, 0);
1505
1506 res = LLVMBuildTrunc(ctx->ac.builder, res, LLVMIntTypeInContext(ctx->ac.context, instr->dest.ssa.num_components * 8), "");
1507 if (instr->dest.ssa.num_components > 1)
1508 res = LLVMBuildBitCast(ctx->ac.builder, res, LLVMVectorType(LLVMInt8TypeInContext(ctx->ac.context), instr->dest.ssa.num_components), "");
1509 return res;
1510 } else if (instr->dest.ssa.bit_size == 16) {
1511 unsigned load_dwords = instr->dest.ssa.num_components / 2 + 1;
1512 LLVMTypeRef vec_type = LLVMVectorType(LLVMInt16TypeInContext(ctx->ac.context), 2 * load_dwords);
1513 ptr = ac_cast_ptr(&ctx->ac, ptr, vec_type);
1514 LLVMValueRef res = LLVMBuildLoad(ctx->ac.builder, ptr, "");
1515 res = LLVMBuildBitCast(ctx->ac.builder, res, vec_type, "");
1516 LLVMValueRef cond = LLVMBuildLShr(ctx->ac.builder, addr, ctx->ac.i32_1, "");
1517 cond = LLVMBuildTrunc(ctx->ac.builder, cond, ctx->ac.i1, "");
1518 LLVMValueRef mask[] = { LLVMConstInt(ctx->ac.i32, 0, false), LLVMConstInt(ctx->ac.i32, 1, false),
1519 LLVMConstInt(ctx->ac.i32, 2, false), LLVMConstInt(ctx->ac.i32, 3, false),
1520 LLVMConstInt(ctx->ac.i32, 4, false)};
1521 LLVMValueRef swizzle_aligned = LLVMConstVector(&mask[0], instr->dest.ssa.num_components);
1522 LLVMValueRef swizzle_unaligned = LLVMConstVector(&mask[1], instr->dest.ssa.num_components);
1523 LLVMValueRef shuffle_aligned = LLVMBuildShuffleVector(ctx->ac.builder, res, res, swizzle_aligned, "");
1524 LLVMValueRef shuffle_unaligned = LLVMBuildShuffleVector(ctx->ac.builder, res, res, swizzle_unaligned, "");
1525 res = LLVMBuildSelect(ctx->ac.builder, cond, shuffle_unaligned, shuffle_aligned, "");
1526 return LLVMBuildBitCast(ctx->ac.builder, res, get_def_type(ctx, &instr->dest.ssa), "");
1527 }
1528
1529 ptr = ac_cast_ptr(&ctx->ac, ptr, get_def_type(ctx, &instr->dest.ssa));
1530
1531 return LLVMBuildLoad(ctx->ac.builder, ptr, "");
1532 }
1533
1534 static LLVMValueRef visit_get_buffer_size(struct ac_nir_context *ctx,
1535 const nir_intrinsic_instr *instr)
1536 {
1537 LLVMValueRef index = get_src(ctx, instr->src[0]);
1538
1539 return get_buffer_size(ctx, ctx->abi->load_ssbo(ctx->abi, index, false), false);
1540 }
1541
1542 static uint32_t widen_mask(uint32_t mask, unsigned multiplier)
1543 {
1544 uint32_t new_mask = 0;
1545 for(unsigned i = 0; i < 32 && (1u << i) <= mask; ++i)
1546 if (mask & (1u << i))
1547 new_mask |= ((1u << multiplier) - 1u) << (i * multiplier);
1548 return new_mask;
1549 }
1550
1551 static LLVMValueRef extract_vector_range(struct ac_llvm_context *ctx, LLVMValueRef src,
1552 unsigned start, unsigned count)
1553 {
1554 LLVMValueRef mask[] = {
1555 ctx->i32_0, ctx->i32_1,
1556 LLVMConstInt(ctx->i32, 2, false), LLVMConstInt(ctx->i32, 3, false) };
1557
1558 unsigned src_elements = ac_get_llvm_num_components(src);
1559
1560 if (count == src_elements) {
1561 assert(start == 0);
1562 return src;
1563 } else if (count == 1) {
1564 assert(start < src_elements);
1565 return LLVMBuildExtractElement(ctx->builder, src, mask[start], "");
1566 } else {
1567 assert(start + count <= src_elements);
1568 assert(count <= 4);
1569 LLVMValueRef swizzle = LLVMConstVector(&mask[start], count);
1570 return LLVMBuildShuffleVector(ctx->builder, src, src, swizzle, "");
1571 }
1572 }
1573
1574 static unsigned get_cache_policy(struct ac_nir_context *ctx,
1575 enum gl_access_qualifier access,
1576 bool may_store_unaligned,
1577 bool writeonly_memory)
1578 {
1579 unsigned cache_policy = 0;
1580
1581 /* GFX6 has a TC L1 bug causing corruption of 8bit/16bit stores. All
1582 * store opcodes not aligned to a dword are affected. The only way to
1583 * get unaligned stores is through shader images.
1584 */
1585 if (((may_store_unaligned && ctx->ac.chip_class == GFX6) ||
1586 /* If this is write-only, don't keep data in L1 to prevent
1587 * evicting L1 cache lines that may be needed by other
1588 * instructions.
1589 */
1590 writeonly_memory ||
1591 access & (ACCESS_COHERENT | ACCESS_VOLATILE))) {
1592 cache_policy |= ac_glc;
1593 }
1594
1595 if (access & ACCESS_STREAM_CACHE_POLICY)
1596 cache_policy |= ac_slc;
1597
1598 return cache_policy;
1599 }
1600
1601 static void visit_store_ssbo(struct ac_nir_context *ctx,
1602 nir_intrinsic_instr *instr)
1603 {
1604 LLVMValueRef src_data = get_src(ctx, instr->src[0]);
1605 int elem_size_bytes = ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src_data)) / 8;
1606 unsigned writemask = nir_intrinsic_write_mask(instr);
1607 enum gl_access_qualifier access = nir_intrinsic_access(instr);
1608 bool writeonly_memory = access & ACCESS_NON_READABLE;
1609 unsigned cache_policy = get_cache_policy(ctx, access, false, writeonly_memory);
1610
1611 LLVMValueRef rsrc = ctx->abi->load_ssbo(ctx->abi,
1612 get_src(ctx, instr->src[1]), true);
1613 LLVMValueRef base_data = src_data;
1614 base_data = ac_trim_vector(&ctx->ac, base_data, instr->num_components);
1615 LLVMValueRef base_offset = get_src(ctx, instr->src[2]);
1616
1617 while (writemask) {
1618 int start, count;
1619 LLVMValueRef data, offset;
1620 LLVMTypeRef data_type;
1621
1622 u_bit_scan_consecutive_range(&writemask, &start, &count);
1623
1624 /* Due to an LLVM limitation with LLVM < 9, split 3-element
1625 * writes into a 2-element and a 1-element write. */
1626 if (count == 3 &&
1627 (elem_size_bytes != 4 || !ac_has_vec3_support(ctx->ac.chip_class, false))) {
1628 writemask |= 1 << (start + 2);
1629 count = 2;
1630 }
1631 int num_bytes = count * elem_size_bytes; /* count in bytes */
1632
1633 /* we can only store 4 DWords at the same time.
1634 * can only happen for 64 Bit vectors. */
1635 if (num_bytes > 16) {
1636 writemask |= ((1u << (count - 2)) - 1u) << (start + 2);
1637 count = 2;
1638 num_bytes = 16;
1639 }
1640
1641 /* check alignment of 16 Bit stores */
1642 if (elem_size_bytes == 2 && num_bytes > 2 && (start % 2) == 1) {
1643 writemask |= ((1u << (count - 1)) - 1u) << (start + 1);
1644 count = 1;
1645 num_bytes = 2;
1646 }
1647 data = extract_vector_range(&ctx->ac, base_data, start, count);
1648
1649 offset = LLVMBuildAdd(ctx->ac.builder, base_offset,
1650 LLVMConstInt(ctx->ac.i32, start * elem_size_bytes, false), "");
1651
1652 if (num_bytes == 1) {
1653 ac_build_tbuffer_store_byte(&ctx->ac, rsrc, data,
1654 offset, ctx->ac.i32_0,
1655 cache_policy);
1656 } else if (num_bytes == 2) {
1657 ac_build_tbuffer_store_short(&ctx->ac, rsrc, data,
1658 offset, ctx->ac.i32_0,
1659 cache_policy);
1660 } else {
1661 int num_channels = num_bytes / 4;
1662
1663 switch (num_bytes) {
1664 case 16: /* v4f32 */
1665 data_type = ctx->ac.v4f32;
1666 break;
1667 case 12: /* v3f32 */
1668 data_type = ctx->ac.v3f32;
1669 break;
1670 case 8: /* v2f32 */
1671 data_type = ctx->ac.v2f32;
1672 break;
1673 case 4: /* f32 */
1674 data_type = ctx->ac.f32;
1675 break;
1676 default:
1677 unreachable("Malformed vector store.");
1678 }
1679 data = LLVMBuildBitCast(ctx->ac.builder, data, data_type, "");
1680
1681 ac_build_buffer_store_dword(&ctx->ac, rsrc, data,
1682 num_channels, offset,
1683 ctx->ac.i32_0, 0,
1684 cache_policy, false);
1685 }
1686 }
1687 }
1688
1689 static LLVMValueRef emit_ssbo_comp_swap_64(struct ac_nir_context *ctx,
1690 LLVMValueRef descriptor,
1691 LLVMValueRef offset,
1692 LLVMValueRef compare,
1693 LLVMValueRef exchange)
1694 {
1695 LLVMBasicBlockRef start_block = NULL, then_block = NULL;
1696 if (ctx->abi->robust_buffer_access) {
1697 LLVMValueRef size = ac_llvm_extract_elem(&ctx->ac, descriptor, 2);
1698
1699 LLVMValueRef cond = LLVMBuildICmp(ctx->ac.builder, LLVMIntULT, offset, size, "");
1700 start_block = LLVMGetInsertBlock(ctx->ac.builder);
1701
1702 ac_build_ifcc(&ctx->ac, cond, -1);
1703
1704 then_block = LLVMGetInsertBlock(ctx->ac.builder);
1705 }
1706
1707 LLVMValueRef ptr_parts[2] = {
1708 ac_llvm_extract_elem(&ctx->ac, descriptor, 0),
1709 LLVMBuildAnd(ctx->ac.builder,
1710 ac_llvm_extract_elem(&ctx->ac, descriptor, 1),
1711 LLVMConstInt(ctx->ac.i32, 65535, 0), "")
1712 };
1713
1714 ptr_parts[1] = LLVMBuildTrunc(ctx->ac.builder, ptr_parts[1], ctx->ac.i16, "");
1715 ptr_parts[1] = LLVMBuildSExt(ctx->ac.builder, ptr_parts[1], ctx->ac.i32, "");
1716
1717 offset = LLVMBuildZExt(ctx->ac.builder, offset, ctx->ac.i64, "");
1718
1719 LLVMValueRef ptr = ac_build_gather_values(&ctx->ac, ptr_parts, 2);
1720 ptr = LLVMBuildBitCast(ctx->ac.builder, ptr, ctx->ac.i64, "");
1721 ptr = LLVMBuildAdd(ctx->ac.builder, ptr, offset, "");
1722 ptr = LLVMBuildIntToPtr(ctx->ac.builder, ptr, LLVMPointerType(ctx->ac.i64, AC_ADDR_SPACE_GLOBAL), "");
1723
1724 LLVMValueRef result = ac_build_atomic_cmp_xchg(&ctx->ac, ptr, compare, exchange, "singlethread-one-as");
1725 result = LLVMBuildExtractValue(ctx->ac.builder, result, 0, "");
1726
1727 if (ctx->abi->robust_buffer_access) {
1728 ac_build_endif(&ctx->ac, -1);
1729
1730 LLVMBasicBlockRef incoming_blocks[2] = {
1731 start_block,
1732 then_block,
1733 };
1734
1735 LLVMValueRef incoming_values[2] = {
1736 LLVMConstInt(ctx->ac.i64, 0, 0),
1737 result,
1738 };
1739 LLVMValueRef ret = LLVMBuildPhi(ctx->ac.builder, ctx->ac.i64, "");
1740 LLVMAddIncoming(ret, incoming_values, incoming_blocks, 2);
1741 return ret;
1742 } else {
1743 return result;
1744 }
1745 }
1746
1747 static LLVMValueRef visit_atomic_ssbo(struct ac_nir_context *ctx,
1748 const nir_intrinsic_instr *instr)
1749 {
1750 LLVMTypeRef return_type = LLVMTypeOf(get_src(ctx, instr->src[2]));
1751 const char *op;
1752 char name[64], type[8];
1753 LLVMValueRef params[6], descriptor;
1754 int arg_count = 0;
1755
1756 switch (instr->intrinsic) {
1757 case nir_intrinsic_ssbo_atomic_add:
1758 op = "add";
1759 break;
1760 case nir_intrinsic_ssbo_atomic_imin:
1761 op = "smin";
1762 break;
1763 case nir_intrinsic_ssbo_atomic_umin:
1764 op = "umin";
1765 break;
1766 case nir_intrinsic_ssbo_atomic_imax:
1767 op = "smax";
1768 break;
1769 case nir_intrinsic_ssbo_atomic_umax:
1770 op = "umax";
1771 break;
1772 case nir_intrinsic_ssbo_atomic_and:
1773 op = "and";
1774 break;
1775 case nir_intrinsic_ssbo_atomic_or:
1776 op = "or";
1777 break;
1778 case nir_intrinsic_ssbo_atomic_xor:
1779 op = "xor";
1780 break;
1781 case nir_intrinsic_ssbo_atomic_exchange:
1782 op = "swap";
1783 break;
1784 case nir_intrinsic_ssbo_atomic_comp_swap:
1785 op = "cmpswap";
1786 break;
1787 default:
1788 abort();
1789 }
1790
1791 descriptor = ctx->abi->load_ssbo(ctx->abi,
1792 get_src(ctx, instr->src[0]),
1793 true);
1794
1795 if (instr->intrinsic == nir_intrinsic_ssbo_atomic_comp_swap &&
1796 return_type == ctx->ac.i64) {
1797 return emit_ssbo_comp_swap_64(ctx, descriptor,
1798 get_src(ctx, instr->src[1]),
1799 get_src(ctx, instr->src[2]),
1800 get_src(ctx, instr->src[3]));
1801 }
1802 if (instr->intrinsic == nir_intrinsic_ssbo_atomic_comp_swap) {
1803 params[arg_count++] = ac_llvm_extract_elem(&ctx->ac, get_src(ctx, instr->src[3]), 0);
1804 }
1805 params[arg_count++] = ac_llvm_extract_elem(&ctx->ac, get_src(ctx, instr->src[2]), 0);
1806 params[arg_count++] = descriptor;
1807
1808 if (HAVE_LLVM >= 0x900) {
1809 /* XXX: The new raw/struct atomic intrinsics are buggy with
1810 * LLVM 8, see r358579.
1811 */
1812 params[arg_count++] = get_src(ctx, instr->src[1]); /* voffset */
1813 params[arg_count++] = ctx->ac.i32_0; /* soffset */
1814 params[arg_count++] = ctx->ac.i32_0; /* slc */
1815
1816 ac_build_type_name_for_intr(return_type, type, sizeof(type));
1817 snprintf(name, sizeof(name),
1818 "llvm.amdgcn.raw.buffer.atomic.%s.%s", op, type);
1819 } else {
1820 params[arg_count++] = ctx->ac.i32_0; /* vindex */
1821 params[arg_count++] = get_src(ctx, instr->src[1]); /* voffset */
1822 params[arg_count++] = ctx->ac.i1false; /* slc */
1823
1824 assert(return_type == ctx->ac.i32);
1825 snprintf(name, sizeof(name),
1826 "llvm.amdgcn.buffer.atomic.%s", op);
1827 }
1828
1829 return ac_build_intrinsic(&ctx->ac, name, return_type, params,
1830 arg_count, 0);
1831 }
1832
1833 static LLVMValueRef visit_load_buffer(struct ac_nir_context *ctx,
1834 const nir_intrinsic_instr *instr)
1835 {
1836 int elem_size_bytes = instr->dest.ssa.bit_size / 8;
1837 int num_components = instr->num_components;
1838 enum gl_access_qualifier access = nir_intrinsic_access(instr);
1839 unsigned cache_policy = get_cache_policy(ctx, access, false, false);
1840
1841 LLVMValueRef offset = get_src(ctx, instr->src[1]);
1842 LLVMValueRef rsrc = ctx->abi->load_ssbo(ctx->abi,
1843 get_src(ctx, instr->src[0]), false);
1844 LLVMValueRef vindex = ctx->ac.i32_0;
1845
1846 LLVMTypeRef def_type = get_def_type(ctx, &instr->dest.ssa);
1847 LLVMTypeRef def_elem_type = num_components > 1 ? LLVMGetElementType(def_type) : def_type;
1848
1849 LLVMValueRef results[4];
1850 for (int i = 0; i < num_components;) {
1851 int num_elems = num_components - i;
1852 if (elem_size_bytes < 4 && nir_intrinsic_align(instr) % 4 != 0)
1853 num_elems = 1;
1854 if (num_elems * elem_size_bytes > 16)
1855 num_elems = 16 / elem_size_bytes;
1856 int load_bytes = num_elems * elem_size_bytes;
1857
1858 LLVMValueRef immoffset = LLVMConstInt(ctx->ac.i32, i * elem_size_bytes, false);
1859
1860 LLVMValueRef ret;
1861
1862 if (load_bytes == 1) {
1863 ret = ac_build_tbuffer_load_byte(&ctx->ac,
1864 rsrc,
1865 offset,
1866 ctx->ac.i32_0,
1867 immoffset,
1868 cache_policy);
1869 } else if (load_bytes == 2) {
1870 ret = ac_build_tbuffer_load_short(&ctx->ac,
1871 rsrc,
1872 offset,
1873 ctx->ac.i32_0,
1874 immoffset,
1875 cache_policy);
1876 } else {
1877 int num_channels = util_next_power_of_two(load_bytes) / 4;
1878 bool can_speculate = access & ACCESS_CAN_REORDER;
1879
1880 ret = ac_build_buffer_load(&ctx->ac, rsrc, num_channels,
1881 vindex, offset, immoffset, 0,
1882 cache_policy, can_speculate, false);
1883 }
1884
1885 LLVMTypeRef byte_vec = LLVMVectorType(ctx->ac.i8, ac_get_type_size(LLVMTypeOf(ret)));
1886 ret = LLVMBuildBitCast(ctx->ac.builder, ret, byte_vec, "");
1887 ret = ac_trim_vector(&ctx->ac, ret, load_bytes);
1888
1889 LLVMTypeRef ret_type = LLVMVectorType(def_elem_type, num_elems);
1890 ret = LLVMBuildBitCast(ctx->ac.builder, ret, ret_type, "");
1891
1892 for (unsigned j = 0; j < num_elems; j++) {
1893 results[i + j] = LLVMBuildExtractElement(ctx->ac.builder, ret, LLVMConstInt(ctx->ac.i32, j, false), "");
1894 }
1895 i += num_elems;
1896 }
1897
1898 return ac_build_gather_values(&ctx->ac, results, num_components);
1899 }
1900
1901 static LLVMValueRef visit_load_ubo_buffer(struct ac_nir_context *ctx,
1902 const nir_intrinsic_instr *instr)
1903 {
1904 LLVMValueRef ret;
1905 LLVMValueRef rsrc = get_src(ctx, instr->src[0]);
1906 LLVMValueRef offset = get_src(ctx, instr->src[1]);
1907 int num_components = instr->num_components;
1908
1909 if (ctx->abi->load_ubo)
1910 rsrc = ctx->abi->load_ubo(ctx->abi, rsrc);
1911
1912 if (instr->dest.ssa.bit_size == 64)
1913 num_components *= 2;
1914
1915 if (instr->dest.ssa.bit_size == 16 || instr->dest.ssa.bit_size == 8) {
1916 unsigned load_bytes = instr->dest.ssa.bit_size / 8;
1917 LLVMValueRef results[num_components];
1918 for (unsigned i = 0; i < num_components; ++i) {
1919 LLVMValueRef immoffset = LLVMConstInt(ctx->ac.i32,
1920 load_bytes * i, 0);
1921
1922 if (load_bytes == 1) {
1923 results[i] = ac_build_tbuffer_load_byte(&ctx->ac,
1924 rsrc,
1925 offset,
1926 ctx->ac.i32_0,
1927 immoffset,
1928 0);
1929 } else {
1930 assert(load_bytes == 2);
1931 results[i] = ac_build_tbuffer_load_short(&ctx->ac,
1932 rsrc,
1933 offset,
1934 ctx->ac.i32_0,
1935 immoffset,
1936 0);
1937 }
1938 }
1939 ret = ac_build_gather_values(&ctx->ac, results, num_components);
1940 } else {
1941 ret = ac_build_buffer_load(&ctx->ac, rsrc, num_components, NULL, offset,
1942 NULL, 0, 0, true, true);
1943
1944 ret = ac_trim_vector(&ctx->ac, ret, num_components);
1945 }
1946
1947 return LLVMBuildBitCast(ctx->ac.builder, ret,
1948 get_def_type(ctx, &instr->dest.ssa), "");
1949 }
1950
1951 static void
1952 get_deref_offset(struct ac_nir_context *ctx, nir_deref_instr *instr,
1953 bool vs_in, unsigned *vertex_index_out,
1954 LLVMValueRef *vertex_index_ref,
1955 unsigned *const_out, LLVMValueRef *indir_out)
1956 {
1957 nir_variable *var = nir_deref_instr_get_variable(instr);
1958 nir_deref_path path;
1959 unsigned idx_lvl = 1;
1960
1961 nir_deref_path_init(&path, instr, NULL);
1962
1963 if (vertex_index_out != NULL || vertex_index_ref != NULL) {
1964 if (vertex_index_ref) {
1965 *vertex_index_ref = get_src(ctx, path.path[idx_lvl]->arr.index);
1966 if (vertex_index_out)
1967 *vertex_index_out = 0;
1968 } else {
1969 *vertex_index_out = nir_src_as_uint(path.path[idx_lvl]->arr.index);
1970 }
1971 ++idx_lvl;
1972 }
1973
1974 uint32_t const_offset = 0;
1975 LLVMValueRef offset = NULL;
1976
1977 if (var->data.compact) {
1978 assert(instr->deref_type == nir_deref_type_array);
1979 const_offset = nir_src_as_uint(instr->arr.index);
1980 goto out;
1981 }
1982
1983 for (; path.path[idx_lvl]; ++idx_lvl) {
1984 const struct glsl_type *parent_type = path.path[idx_lvl - 1]->type;
1985 if (path.path[idx_lvl]->deref_type == nir_deref_type_struct) {
1986 unsigned index = path.path[idx_lvl]->strct.index;
1987
1988 for (unsigned i = 0; i < index; i++) {
1989 const struct glsl_type *ft = glsl_get_struct_field(parent_type, i);
1990 const_offset += glsl_count_attribute_slots(ft, vs_in);
1991 }
1992 } else if(path.path[idx_lvl]->deref_type == nir_deref_type_array) {
1993 unsigned size = glsl_count_attribute_slots(path.path[idx_lvl]->type, vs_in);
1994 if (nir_src_is_const(path.path[idx_lvl]->arr.index)) {
1995 const_offset += size *
1996 nir_src_as_uint(path.path[idx_lvl]->arr.index);
1997 } else {
1998 LLVMValueRef array_off = LLVMBuildMul(ctx->ac.builder, LLVMConstInt(ctx->ac.i32, size, 0),
1999 get_src(ctx, path.path[idx_lvl]->arr.index), "");
2000 if (offset)
2001 offset = LLVMBuildAdd(ctx->ac.builder, offset, array_off, "");
2002 else
2003 offset = array_off;
2004 }
2005 } else
2006 unreachable("Uhandled deref type in get_deref_instr_offset");
2007 }
2008
2009 out:
2010 nir_deref_path_finish(&path);
2011
2012 if (const_offset && offset)
2013 offset = LLVMBuildAdd(ctx->ac.builder, offset,
2014 LLVMConstInt(ctx->ac.i32, const_offset, 0),
2015 "");
2016
2017 *const_out = const_offset;
2018 *indir_out = offset;
2019 }
2020
2021 static LLVMValueRef load_tess_varyings(struct ac_nir_context *ctx,
2022 nir_intrinsic_instr *instr,
2023 bool load_inputs)
2024 {
2025 LLVMValueRef result;
2026 LLVMValueRef vertex_index = NULL;
2027 LLVMValueRef indir_index = NULL;
2028 unsigned const_index = 0;
2029
2030 nir_variable *var = nir_deref_instr_get_variable(nir_instr_as_deref(instr->src[0].ssa->parent_instr));
2031
2032 unsigned location = var->data.location;
2033 unsigned driver_location = var->data.driver_location;
2034 const bool is_patch = var->data.patch;
2035 const bool is_compact = var->data.compact;
2036
2037 get_deref_offset(ctx, nir_instr_as_deref(instr->src[0].ssa->parent_instr),
2038 false, NULL, is_patch ? NULL : &vertex_index,
2039 &const_index, &indir_index);
2040
2041 LLVMTypeRef dest_type = get_def_type(ctx, &instr->dest.ssa);
2042
2043 LLVMTypeRef src_component_type;
2044 if (LLVMGetTypeKind(dest_type) == LLVMVectorTypeKind)
2045 src_component_type = LLVMGetElementType(dest_type);
2046 else
2047 src_component_type = dest_type;
2048
2049 result = ctx->abi->load_tess_varyings(ctx->abi, src_component_type,
2050 vertex_index, indir_index,
2051 const_index, location, driver_location,
2052 var->data.location_frac,
2053 instr->num_components,
2054 is_patch, is_compact, load_inputs);
2055 if (instr->dest.ssa.bit_size == 16) {
2056 result = ac_to_integer(&ctx->ac, result);
2057 result = LLVMBuildTrunc(ctx->ac.builder, result, dest_type, "");
2058 }
2059 return LLVMBuildBitCast(ctx->ac.builder, result, dest_type, "");
2060 }
2061
2062 static unsigned
2063 type_scalar_size_bytes(const struct glsl_type *type)
2064 {
2065 assert(glsl_type_is_vector_or_scalar(type) ||
2066 glsl_type_is_matrix(type));
2067 return glsl_type_is_boolean(type) ? 4 : glsl_get_bit_size(type) / 8;
2068 }
2069
2070 static LLVMValueRef visit_load_var(struct ac_nir_context *ctx,
2071 nir_intrinsic_instr *instr)
2072 {
2073 nir_deref_instr *deref = nir_instr_as_deref(instr->src[0].ssa->parent_instr);
2074 nir_variable *var = nir_deref_instr_get_variable(deref);
2075
2076 LLVMValueRef values[8];
2077 int idx = 0;
2078 int ve = instr->dest.ssa.num_components;
2079 unsigned comp = 0;
2080 LLVMValueRef indir_index;
2081 LLVMValueRef ret;
2082 unsigned const_index;
2083 unsigned stride = 4;
2084 int mode = deref->mode;
2085
2086 if (var) {
2087 bool vs_in = ctx->stage == MESA_SHADER_VERTEX &&
2088 var->data.mode == nir_var_shader_in;
2089 idx = var->data.driver_location;
2090 comp = var->data.location_frac;
2091 mode = var->data.mode;
2092
2093 get_deref_offset(ctx, deref, vs_in, NULL, NULL,
2094 &const_index, &indir_index);
2095
2096 if (var->data.compact) {
2097 stride = 1;
2098 const_index += comp;
2099 comp = 0;
2100 }
2101 }
2102
2103 if (instr->dest.ssa.bit_size == 64 &&
2104 (deref->mode == nir_var_shader_in ||
2105 deref->mode == nir_var_shader_out ||
2106 deref->mode == nir_var_function_temp))
2107 ve *= 2;
2108
2109 switch (mode) {
2110 case nir_var_shader_in:
2111 if (ctx->stage == MESA_SHADER_TESS_CTRL ||
2112 ctx->stage == MESA_SHADER_TESS_EVAL) {
2113 return load_tess_varyings(ctx, instr, true);
2114 }
2115
2116 if (ctx->stage == MESA_SHADER_GEOMETRY) {
2117 LLVMTypeRef type = LLVMIntTypeInContext(ctx->ac.context, instr->dest.ssa.bit_size);
2118 LLVMValueRef indir_index;
2119 unsigned const_index, vertex_index;
2120 get_deref_offset(ctx, deref, false, &vertex_index, NULL,
2121 &const_index, &indir_index);
2122 assert(indir_index == NULL);
2123
2124 return ctx->abi->load_inputs(ctx->abi, var->data.location,
2125 var->data.driver_location,
2126 var->data.location_frac,
2127 instr->num_components, vertex_index, const_index, type);
2128 }
2129
2130 for (unsigned chan = comp; chan < ve + comp; chan++) {
2131 if (indir_index) {
2132 unsigned count = glsl_count_attribute_slots(
2133 var->type,
2134 ctx->stage == MESA_SHADER_VERTEX);
2135 count -= chan / 4;
2136 LLVMValueRef tmp_vec = ac_build_gather_values_extended(
2137 &ctx->ac, ctx->abi->inputs + idx + chan, count,
2138 stride, false, true);
2139
2140 values[chan] = LLVMBuildExtractElement(ctx->ac.builder,
2141 tmp_vec,
2142 indir_index, "");
2143 } else
2144 values[chan] = ctx->abi->inputs[idx + chan + const_index * stride];
2145 }
2146 break;
2147 case nir_var_function_temp:
2148 for (unsigned chan = 0; chan < ve; chan++) {
2149 if (indir_index) {
2150 unsigned count = glsl_count_attribute_slots(
2151 var->type, false);
2152 count -= chan / 4;
2153 LLVMValueRef tmp_vec = ac_build_gather_values_extended(
2154 &ctx->ac, ctx->locals + idx + chan, count,
2155 stride, true, true);
2156
2157 values[chan] = LLVMBuildExtractElement(ctx->ac.builder,
2158 tmp_vec,
2159 indir_index, "");
2160 } else {
2161 values[chan] = LLVMBuildLoad(ctx->ac.builder, ctx->locals[idx + chan + const_index * stride], "");
2162 }
2163 }
2164 break;
2165 case nir_var_mem_shared: {
2166 LLVMValueRef address = get_src(ctx, instr->src[0]);
2167 LLVMValueRef val = LLVMBuildLoad(ctx->ac.builder, address, "");
2168 return LLVMBuildBitCast(ctx->ac.builder, val,
2169 get_def_type(ctx, &instr->dest.ssa),
2170 "");
2171 }
2172 case nir_var_shader_out:
2173 if (ctx->stage == MESA_SHADER_TESS_CTRL) {
2174 return load_tess_varyings(ctx, instr, false);
2175 }
2176
2177 if (ctx->stage == MESA_SHADER_FRAGMENT &&
2178 var->data.fb_fetch_output &&
2179 ctx->abi->emit_fbfetch)
2180 return ctx->abi->emit_fbfetch(ctx->abi);
2181
2182 for (unsigned chan = comp; chan < ve + comp; chan++) {
2183 if (indir_index) {
2184 unsigned count = glsl_count_attribute_slots(
2185 var->type, false);
2186 count -= chan / 4;
2187 LLVMValueRef tmp_vec = ac_build_gather_values_extended(
2188 &ctx->ac, ctx->abi->outputs + idx + chan, count,
2189 stride, true, true);
2190
2191 values[chan] = LLVMBuildExtractElement(ctx->ac.builder,
2192 tmp_vec,
2193 indir_index, "");
2194 } else {
2195 values[chan] = LLVMBuildLoad(ctx->ac.builder,
2196 ctx->abi->outputs[idx + chan + const_index * stride],
2197 "");
2198 }
2199 }
2200 break;
2201 case nir_var_mem_global: {
2202 LLVMValueRef address = get_src(ctx, instr->src[0]);
2203 unsigned explicit_stride = glsl_get_explicit_stride(deref->type);
2204 unsigned natural_stride = type_scalar_size_bytes(deref->type);
2205 unsigned stride = explicit_stride ? explicit_stride : natural_stride;
2206
2207 LLVMTypeRef result_type = get_def_type(ctx, &instr->dest.ssa);
2208 if (stride != natural_stride) {
2209 LLVMTypeRef ptr_type = LLVMPointerType(LLVMGetElementType(result_type),
2210 LLVMGetPointerAddressSpace(LLVMTypeOf(address)));
2211 address = LLVMBuildBitCast(ctx->ac.builder, address, ptr_type , "");
2212
2213 for (unsigned i = 0; i < instr->dest.ssa.num_components; ++i) {
2214 LLVMValueRef offset = LLVMConstInt(ctx->ac.i32, i * stride / natural_stride, 0);
2215 values[i] = LLVMBuildLoad(ctx->ac.builder,
2216 ac_build_gep_ptr(&ctx->ac, address, offset), "");
2217 }
2218 return ac_build_gather_values(&ctx->ac, values, instr->dest.ssa.num_components);
2219 } else {
2220 LLVMTypeRef ptr_type = LLVMPointerType(result_type,
2221 LLVMGetPointerAddressSpace(LLVMTypeOf(address)));
2222 address = LLVMBuildBitCast(ctx->ac.builder, address, ptr_type , "");
2223 LLVMValueRef val = LLVMBuildLoad(ctx->ac.builder, address, "");
2224 return val;
2225 }
2226 }
2227 default:
2228 unreachable("unhandle variable mode");
2229 }
2230 ret = ac_build_varying_gather_values(&ctx->ac, values, ve, comp);
2231 return LLVMBuildBitCast(ctx->ac.builder, ret, get_def_type(ctx, &instr->dest.ssa), "");
2232 }
2233
2234 static void
2235 visit_store_var(struct ac_nir_context *ctx,
2236 nir_intrinsic_instr *instr)
2237 {
2238 nir_deref_instr *deref = nir_instr_as_deref(instr->src[0].ssa->parent_instr);
2239 nir_variable *var = nir_deref_instr_get_variable(deref);
2240
2241 LLVMValueRef temp_ptr, value;
2242 int idx = 0;
2243 unsigned comp = 0;
2244 LLVMValueRef src = ac_to_float(&ctx->ac, get_src(ctx, instr->src[1]));
2245 int writemask = instr->const_index[0];
2246 LLVMValueRef indir_index;
2247 unsigned const_index;
2248
2249 if (var) {
2250 get_deref_offset(ctx, deref, false,
2251 NULL, NULL, &const_index, &indir_index);
2252 idx = var->data.driver_location;
2253 comp = var->data.location_frac;
2254
2255 if (var->data.compact) {
2256 const_index += comp;
2257 comp = 0;
2258 }
2259 }
2260
2261 if (ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src)) == 64 &&
2262 (deref->mode == nir_var_shader_out ||
2263 deref->mode == nir_var_function_temp)) {
2264
2265 src = LLVMBuildBitCast(ctx->ac.builder, src,
2266 LLVMVectorType(ctx->ac.f32, ac_get_llvm_num_components(src) * 2),
2267 "");
2268
2269 writemask = widen_mask(writemask, 2);
2270 }
2271
2272 writemask = writemask << comp;
2273
2274 switch (deref->mode) {
2275 case nir_var_shader_out:
2276
2277 if (ctx->stage == MESA_SHADER_TESS_CTRL) {
2278 LLVMValueRef vertex_index = NULL;
2279 LLVMValueRef indir_index = NULL;
2280 unsigned const_index = 0;
2281 const bool is_patch = var->data.patch;
2282
2283 get_deref_offset(ctx, deref, false, NULL,
2284 is_patch ? NULL : &vertex_index,
2285 &const_index, &indir_index);
2286
2287 ctx->abi->store_tcs_outputs(ctx->abi, var,
2288 vertex_index, indir_index,
2289 const_index, src, writemask);
2290 return;
2291 }
2292
2293 for (unsigned chan = 0; chan < 8; chan++) {
2294 int stride = 4;
2295 if (!(writemask & (1 << chan)))
2296 continue;
2297
2298 value = ac_llvm_extract_elem(&ctx->ac, src, chan - comp);
2299
2300 if (var->data.compact)
2301 stride = 1;
2302 if (indir_index) {
2303 unsigned count = glsl_count_attribute_slots(
2304 var->type, false);
2305 count -= chan / 4;
2306 LLVMValueRef tmp_vec = ac_build_gather_values_extended(
2307 &ctx->ac, ctx->abi->outputs + idx + chan, count,
2308 stride, true, true);
2309
2310 tmp_vec = LLVMBuildInsertElement(ctx->ac.builder, tmp_vec,
2311 value, indir_index, "");
2312 build_store_values_extended(&ctx->ac, ctx->abi->outputs + idx + chan,
2313 count, stride, tmp_vec);
2314
2315 } else {
2316 temp_ptr = ctx->abi->outputs[idx + chan + const_index * stride];
2317
2318 LLVMBuildStore(ctx->ac.builder, value, temp_ptr);
2319 }
2320 }
2321 break;
2322 case nir_var_function_temp:
2323 for (unsigned chan = 0; chan < 8; chan++) {
2324 if (!(writemask & (1 << chan)))
2325 continue;
2326
2327 value = ac_llvm_extract_elem(&ctx->ac, src, chan);
2328 if (indir_index) {
2329 unsigned count = glsl_count_attribute_slots(
2330 var->type, false);
2331 count -= chan / 4;
2332 LLVMValueRef tmp_vec = ac_build_gather_values_extended(
2333 &ctx->ac, ctx->locals + idx + chan, count,
2334 4, true, true);
2335
2336 tmp_vec = LLVMBuildInsertElement(ctx->ac.builder, tmp_vec,
2337 value, indir_index, "");
2338 build_store_values_extended(&ctx->ac, ctx->locals + idx + chan,
2339 count, 4, tmp_vec);
2340 } else {
2341 temp_ptr = ctx->locals[idx + chan + const_index * 4];
2342
2343 LLVMBuildStore(ctx->ac.builder, value, temp_ptr);
2344 }
2345 }
2346 break;
2347
2348 case nir_var_mem_global:
2349 case nir_var_mem_shared: {
2350 int writemask = instr->const_index[0];
2351 LLVMValueRef address = get_src(ctx, instr->src[0]);
2352 LLVMValueRef val = get_src(ctx, instr->src[1]);
2353
2354 unsigned explicit_stride = glsl_get_explicit_stride(deref->type);
2355 unsigned natural_stride = type_scalar_size_bytes(deref->type);
2356 unsigned stride = explicit_stride ? explicit_stride : natural_stride;
2357
2358 LLVMTypeRef ptr_type = LLVMPointerType(LLVMTypeOf(val),
2359 LLVMGetPointerAddressSpace(LLVMTypeOf(address)));
2360 address = LLVMBuildBitCast(ctx->ac.builder, address, ptr_type , "");
2361
2362 if (writemask == (1u << ac_get_llvm_num_components(val)) - 1 &&
2363 stride == natural_stride) {
2364 LLVMTypeRef ptr_type = LLVMPointerType(LLVMTypeOf(val),
2365 LLVMGetPointerAddressSpace(LLVMTypeOf(address)));
2366 address = LLVMBuildBitCast(ctx->ac.builder, address, ptr_type , "");
2367
2368 val = LLVMBuildBitCast(ctx->ac.builder, val,
2369 LLVMGetElementType(LLVMTypeOf(address)), "");
2370 LLVMBuildStore(ctx->ac.builder, val, address);
2371 } else {
2372 LLVMTypeRef ptr_type = LLVMPointerType(LLVMGetElementType(LLVMTypeOf(val)),
2373 LLVMGetPointerAddressSpace(LLVMTypeOf(address)));
2374 address = LLVMBuildBitCast(ctx->ac.builder, address, ptr_type , "");
2375 for (unsigned chan = 0; chan < 4; chan++) {
2376 if (!(writemask & (1 << chan)))
2377 continue;
2378
2379 LLVMValueRef offset = LLVMConstInt(ctx->ac.i32, chan * stride / natural_stride, 0);
2380
2381 LLVMValueRef ptr = ac_build_gep_ptr(&ctx->ac, address, offset);
2382 LLVMValueRef src = ac_llvm_extract_elem(&ctx->ac, val,
2383 chan);
2384 src = LLVMBuildBitCast(ctx->ac.builder, src,
2385 LLVMGetElementType(LLVMTypeOf(ptr)), "");
2386 LLVMBuildStore(ctx->ac.builder, src, ptr);
2387 }
2388 }
2389 break;
2390 }
2391 default:
2392 abort();
2393 break;
2394 }
2395 }
2396
2397 static int image_type_to_components_count(enum glsl_sampler_dim dim, bool array)
2398 {
2399 switch (dim) {
2400 case GLSL_SAMPLER_DIM_BUF:
2401 return 1;
2402 case GLSL_SAMPLER_DIM_1D:
2403 return array ? 2 : 1;
2404 case GLSL_SAMPLER_DIM_2D:
2405 return array ? 3 : 2;
2406 case GLSL_SAMPLER_DIM_MS:
2407 return array ? 4 : 3;
2408 case GLSL_SAMPLER_DIM_3D:
2409 case GLSL_SAMPLER_DIM_CUBE:
2410 return 3;
2411 case GLSL_SAMPLER_DIM_RECT:
2412 case GLSL_SAMPLER_DIM_SUBPASS:
2413 return 2;
2414 case GLSL_SAMPLER_DIM_SUBPASS_MS:
2415 return 3;
2416 default:
2417 break;
2418 }
2419 return 0;
2420 }
2421
2422 static LLVMValueRef adjust_sample_index_using_fmask(struct ac_llvm_context *ctx,
2423 LLVMValueRef coord_x, LLVMValueRef coord_y,
2424 LLVMValueRef coord_z,
2425 LLVMValueRef sample_index,
2426 LLVMValueRef fmask_desc_ptr)
2427 {
2428 unsigned sample_chan = coord_z ? 3 : 2;
2429 LLVMValueRef addr[4] = {coord_x, coord_y, coord_z};
2430 addr[sample_chan] = sample_index;
2431
2432 ac_apply_fmask_to_sample(ctx, fmask_desc_ptr, addr, coord_z != NULL);
2433 return addr[sample_chan];
2434 }
2435
2436 static nir_deref_instr *get_image_deref(const nir_intrinsic_instr *instr)
2437 {
2438 assert(instr->src[0].is_ssa);
2439 return nir_instr_as_deref(instr->src[0].ssa->parent_instr);
2440 }
2441
2442 static LLVMValueRef get_image_descriptor(struct ac_nir_context *ctx,
2443 const nir_intrinsic_instr *instr,
2444 enum ac_descriptor_type desc_type,
2445 bool write)
2446 {
2447 nir_deref_instr *deref_instr =
2448 instr->src[0].ssa->parent_instr->type == nir_instr_type_deref ?
2449 nir_instr_as_deref(instr->src[0].ssa->parent_instr) : NULL;
2450
2451 return get_sampler_desc(ctx, deref_instr, desc_type, &instr->instr, true, write);
2452 }
2453
2454 static void get_image_coords(struct ac_nir_context *ctx,
2455 const nir_intrinsic_instr *instr,
2456 struct ac_image_args *args,
2457 enum glsl_sampler_dim dim,
2458 bool is_array)
2459 {
2460 LLVMValueRef src0 = get_src(ctx, instr->src[1]);
2461 LLVMValueRef masks[] = {
2462 LLVMConstInt(ctx->ac.i32, 0, false), LLVMConstInt(ctx->ac.i32, 1, false),
2463 LLVMConstInt(ctx->ac.i32, 2, false), LLVMConstInt(ctx->ac.i32, 3, false),
2464 };
2465 LLVMValueRef sample_index = ac_llvm_extract_elem(&ctx->ac, get_src(ctx, instr->src[2]), 0);
2466
2467 int count;
2468 ASSERTED bool add_frag_pos = (dim == GLSL_SAMPLER_DIM_SUBPASS ||
2469 dim == GLSL_SAMPLER_DIM_SUBPASS_MS);
2470 bool is_ms = (dim == GLSL_SAMPLER_DIM_MS ||
2471 dim == GLSL_SAMPLER_DIM_SUBPASS_MS);
2472 bool gfx9_1d = ctx->ac.chip_class == GFX9 && dim == GLSL_SAMPLER_DIM_1D;
2473 assert(!add_frag_pos && "Input attachments should be lowered by this point.");
2474 count = image_type_to_components_count(dim, is_array);
2475
2476 if (is_ms && (instr->intrinsic == nir_intrinsic_image_deref_load ||
2477 instr->intrinsic == nir_intrinsic_bindless_image_load)) {
2478 LLVMValueRef fmask_load_address[3];
2479
2480 fmask_load_address[0] = LLVMBuildExtractElement(ctx->ac.builder, src0, masks[0], "");
2481 fmask_load_address[1] = LLVMBuildExtractElement(ctx->ac.builder, src0, masks[1], "");
2482 if (is_array)
2483 fmask_load_address[2] = LLVMBuildExtractElement(ctx->ac.builder, src0, masks[2], "");
2484 else
2485 fmask_load_address[2] = NULL;
2486
2487 sample_index = adjust_sample_index_using_fmask(&ctx->ac,
2488 fmask_load_address[0],
2489 fmask_load_address[1],
2490 fmask_load_address[2],
2491 sample_index,
2492 get_sampler_desc(ctx, nir_instr_as_deref(instr->src[0].ssa->parent_instr),
2493 AC_DESC_FMASK, &instr->instr, true, false));
2494 }
2495 if (count == 1 && !gfx9_1d) {
2496 if (instr->src[1].ssa->num_components)
2497 args->coords[0] = LLVMBuildExtractElement(ctx->ac.builder, src0, masks[0], "");
2498 else
2499 args->coords[0] = src0;
2500 } else {
2501 int chan;
2502 if (is_ms)
2503 count--;
2504 for (chan = 0; chan < count; ++chan) {
2505 args->coords[chan] = ac_llvm_extract_elem(&ctx->ac, src0, chan);
2506 }
2507
2508 if (gfx9_1d) {
2509 if (is_array) {
2510 args->coords[2] = args->coords[1];
2511 args->coords[1] = ctx->ac.i32_0;
2512 } else
2513 args->coords[1] = ctx->ac.i32_0;
2514 count++;
2515 }
2516 if (ctx->ac.chip_class == GFX9 &&
2517 dim == GLSL_SAMPLER_DIM_2D &&
2518 !is_array) {
2519 /* The hw can't bind a slice of a 3D image as a 2D
2520 * image, because it ignores BASE_ARRAY if the target
2521 * is 3D. The workaround is to read BASE_ARRAY and set
2522 * it as the 3rd address operand for all 2D images.
2523 */
2524 LLVMValueRef first_layer, const5, mask;
2525
2526 const5 = LLVMConstInt(ctx->ac.i32, 5, 0);
2527 mask = LLVMConstInt(ctx->ac.i32, S_008F24_BASE_ARRAY(~0), 0);
2528 first_layer = LLVMBuildExtractElement(ctx->ac.builder, args->resource, const5, "");
2529 first_layer = LLVMBuildAnd(ctx->ac.builder, first_layer, mask, "");
2530
2531 args->coords[count] = first_layer;
2532 count++;
2533 }
2534
2535
2536 if (is_ms) {
2537 args->coords[count] = sample_index;
2538 count++;
2539 }
2540 }
2541 }
2542
2543 static LLVMValueRef get_image_buffer_descriptor(struct ac_nir_context *ctx,
2544 const nir_intrinsic_instr *instr,
2545 bool write, bool atomic)
2546 {
2547 LLVMValueRef rsrc = get_image_descriptor(ctx, instr, AC_DESC_BUFFER, write);
2548 if (ctx->ac.chip_class == GFX9 && HAVE_LLVM < 0x900 && atomic) {
2549 LLVMValueRef elem_count = LLVMBuildExtractElement(ctx->ac.builder, rsrc, LLVMConstInt(ctx->ac.i32, 2, 0), "");
2550 LLVMValueRef stride = LLVMBuildExtractElement(ctx->ac.builder, rsrc, LLVMConstInt(ctx->ac.i32, 1, 0), "");
2551 stride = LLVMBuildLShr(ctx->ac.builder, stride, LLVMConstInt(ctx->ac.i32, 16, 0), "");
2552
2553 LLVMValueRef new_elem_count = LLVMBuildSelect(ctx->ac.builder,
2554 LLVMBuildICmp(ctx->ac.builder, LLVMIntUGT, elem_count, stride, ""),
2555 elem_count, stride, "");
2556
2557 rsrc = LLVMBuildInsertElement(ctx->ac.builder, rsrc, new_elem_count,
2558 LLVMConstInt(ctx->ac.i32, 2, 0), "");
2559 }
2560 return rsrc;
2561 }
2562
2563 static LLVMValueRef visit_image_load(struct ac_nir_context *ctx,
2564 const nir_intrinsic_instr *instr,
2565 bool bindless)
2566 {
2567 LLVMValueRef res;
2568
2569 enum glsl_sampler_dim dim;
2570 enum gl_access_qualifier access;
2571 bool is_array;
2572 if (bindless) {
2573 dim = nir_intrinsic_image_dim(instr);
2574 access = nir_intrinsic_access(instr);
2575 is_array = nir_intrinsic_image_array(instr);
2576 } else {
2577 const nir_deref_instr *image_deref = get_image_deref(instr);
2578 const struct glsl_type *type = image_deref->type;
2579 const nir_variable *var = nir_deref_instr_get_variable(image_deref);
2580 dim = glsl_get_sampler_dim(type);
2581 access = var->data.image.access;
2582 is_array = glsl_sampler_type_is_array(type);
2583 }
2584
2585 struct ac_image_args args = {};
2586
2587 args.cache_policy = get_cache_policy(ctx, access, false, false);
2588
2589 if (dim == GLSL_SAMPLER_DIM_BUF) {
2590 unsigned mask = nir_ssa_def_components_read(&instr->dest.ssa);
2591 unsigned num_channels = util_last_bit(mask);
2592 LLVMValueRef rsrc, vindex;
2593
2594 rsrc = get_image_buffer_descriptor(ctx, instr, false, false);
2595 vindex = LLVMBuildExtractElement(ctx->ac.builder, get_src(ctx, instr->src[1]),
2596 ctx->ac.i32_0, "");
2597
2598 bool can_speculate = access & ACCESS_CAN_REORDER;
2599 res = ac_build_buffer_load_format(&ctx->ac, rsrc, vindex,
2600 ctx->ac.i32_0, num_channels,
2601 args.cache_policy,
2602 can_speculate);
2603 res = ac_build_expand_to_vec4(&ctx->ac, res, num_channels);
2604
2605 res = ac_trim_vector(&ctx->ac, res, instr->dest.ssa.num_components);
2606 res = ac_to_integer(&ctx->ac, res);
2607 } else {
2608 args.opcode = ac_image_load;
2609 args.resource = get_image_descriptor(ctx, instr, AC_DESC_IMAGE, false);
2610 get_image_coords(ctx, instr, &args, dim, is_array);
2611 args.dim = get_ac_image_dim(&ctx->ac, dim, is_array);
2612 args.dmask = 15;
2613 args.attributes = AC_FUNC_ATTR_READONLY;
2614
2615 res = ac_build_image_opcode(&ctx->ac, &args);
2616 }
2617 return res;
2618 }
2619
2620 static void visit_image_store(struct ac_nir_context *ctx,
2621 nir_intrinsic_instr *instr,
2622 bool bindless)
2623 {
2624
2625
2626 enum glsl_sampler_dim dim;
2627 enum gl_access_qualifier access;
2628 bool is_array;
2629 if (bindless) {
2630 dim = nir_intrinsic_image_dim(instr);
2631 access = nir_intrinsic_access(instr);
2632 is_array = nir_intrinsic_image_array(instr);
2633 } else {
2634 const nir_deref_instr *image_deref = get_image_deref(instr);
2635 const struct glsl_type *type = image_deref->type;
2636 const nir_variable *var = nir_deref_instr_get_variable(image_deref);
2637 dim = glsl_get_sampler_dim(type);
2638 access = var->data.image.access;
2639 is_array = glsl_sampler_type_is_array(type);
2640 }
2641
2642 bool writeonly_memory = access & ACCESS_NON_READABLE;
2643 struct ac_image_args args = {};
2644
2645 args.cache_policy = get_cache_policy(ctx, access, true, writeonly_memory);
2646
2647 if (dim == GLSL_SAMPLER_DIM_BUF) {
2648 LLVMValueRef rsrc = get_image_buffer_descriptor(ctx, instr, true, false);
2649 LLVMValueRef src = ac_to_float(&ctx->ac, get_src(ctx, instr->src[3]));
2650 unsigned src_channels = ac_get_llvm_num_components(src);
2651 LLVMValueRef vindex;
2652
2653 if (src_channels == 3)
2654 src = ac_build_expand_to_vec4(&ctx->ac, src, 3);
2655
2656 vindex = LLVMBuildExtractElement(ctx->ac.builder,
2657 get_src(ctx, instr->src[1]),
2658 ctx->ac.i32_0, "");
2659
2660 ac_build_buffer_store_format(&ctx->ac, rsrc, src, vindex,
2661 ctx->ac.i32_0, src_channels,
2662 args.cache_policy);
2663 } else {
2664 args.opcode = ac_image_store;
2665 args.data[0] = ac_to_float(&ctx->ac, get_src(ctx, instr->src[3]));
2666 args.resource = get_image_descriptor(ctx, instr, AC_DESC_IMAGE, true);
2667 get_image_coords(ctx, instr, &args, dim, is_array);
2668 args.dim = get_ac_image_dim(&ctx->ac, dim, is_array);
2669 args.dmask = 15;
2670
2671 ac_build_image_opcode(&ctx->ac, &args);
2672 }
2673
2674 }
2675
2676 static LLVMValueRef visit_image_atomic(struct ac_nir_context *ctx,
2677 const nir_intrinsic_instr *instr,
2678 bool bindless)
2679 {
2680 LLVMValueRef params[7];
2681 int param_count = 0;
2682
2683 bool cmpswap = instr->intrinsic == nir_intrinsic_image_deref_atomic_comp_swap ||
2684 instr->intrinsic == nir_intrinsic_bindless_image_atomic_comp_swap;
2685 const char *atomic_name;
2686 char intrinsic_name[64];
2687 enum ac_atomic_op atomic_subop;
2688 ASSERTED int length;
2689
2690 enum glsl_sampler_dim dim;
2691 bool is_array;
2692 if (bindless) {
2693 if (instr->intrinsic == nir_intrinsic_bindless_image_atomic_imin ||
2694 instr->intrinsic == nir_intrinsic_bindless_image_atomic_umin ||
2695 instr->intrinsic == nir_intrinsic_bindless_image_atomic_imax ||
2696 instr->intrinsic == nir_intrinsic_bindless_image_atomic_umax) {
2697 const GLenum format = nir_intrinsic_format(instr);
2698 assert(format == GL_R32UI || format == GL_R32I);
2699 }
2700 dim = nir_intrinsic_image_dim(instr);
2701 is_array = nir_intrinsic_image_array(instr);
2702 } else {
2703 const struct glsl_type *type = get_image_deref(instr)->type;
2704 dim = glsl_get_sampler_dim(type);
2705 is_array = glsl_sampler_type_is_array(type);
2706 }
2707
2708 switch (instr->intrinsic) {
2709 case nir_intrinsic_bindless_image_atomic_add:
2710 case nir_intrinsic_image_deref_atomic_add:
2711 atomic_name = "add";
2712 atomic_subop = ac_atomic_add;
2713 break;
2714 case nir_intrinsic_bindless_image_atomic_imin:
2715 case nir_intrinsic_image_deref_atomic_imin:
2716 atomic_name = "smin";
2717 atomic_subop = ac_atomic_smin;
2718 break;
2719 case nir_intrinsic_bindless_image_atomic_umin:
2720 case nir_intrinsic_image_deref_atomic_umin:
2721 atomic_name = "umin";
2722 atomic_subop = ac_atomic_umin;
2723 break;
2724 case nir_intrinsic_bindless_image_atomic_imax:
2725 case nir_intrinsic_image_deref_atomic_imax:
2726 atomic_name = "smax";
2727 atomic_subop = ac_atomic_smax;
2728 break;
2729 case nir_intrinsic_bindless_image_atomic_umax:
2730 case nir_intrinsic_image_deref_atomic_umax:
2731 atomic_name = "umax";
2732 atomic_subop = ac_atomic_umax;
2733 break;
2734 case nir_intrinsic_bindless_image_atomic_and:
2735 case nir_intrinsic_image_deref_atomic_and:
2736 atomic_name = "and";
2737 atomic_subop = ac_atomic_and;
2738 break;
2739 case nir_intrinsic_bindless_image_atomic_or:
2740 case nir_intrinsic_image_deref_atomic_or:
2741 atomic_name = "or";
2742 atomic_subop = ac_atomic_or;
2743 break;
2744 case nir_intrinsic_bindless_image_atomic_xor:
2745 case nir_intrinsic_image_deref_atomic_xor:
2746 atomic_name = "xor";
2747 atomic_subop = ac_atomic_xor;
2748 break;
2749 case nir_intrinsic_bindless_image_atomic_exchange:
2750 case nir_intrinsic_image_deref_atomic_exchange:
2751 atomic_name = "swap";
2752 atomic_subop = ac_atomic_swap;
2753 break;
2754 case nir_intrinsic_bindless_image_atomic_comp_swap:
2755 case nir_intrinsic_image_deref_atomic_comp_swap:
2756 atomic_name = "cmpswap";
2757 atomic_subop = 0; /* not used */
2758 break;
2759 case nir_intrinsic_bindless_image_atomic_inc_wrap:
2760 case nir_intrinsic_image_deref_atomic_inc_wrap: {
2761 atomic_name = "inc";
2762 atomic_subop = ac_atomic_inc_wrap;
2763 /* ATOMIC_INC instruction does:
2764 * value = (value + 1) % (data + 1)
2765 * but we want:
2766 * value = (value + 1) % data
2767 * So replace 'data' by 'data - 1'.
2768 */
2769 ctx->ssa_defs[instr->src[3].ssa->index] =
2770 LLVMBuildSub(ctx->ac.builder,
2771 ctx->ssa_defs[instr->src[3].ssa->index],
2772 ctx->ac.i32_1, "");
2773 break;
2774 }
2775 case nir_intrinsic_bindless_image_atomic_dec_wrap:
2776 case nir_intrinsic_image_deref_atomic_dec_wrap:
2777 atomic_name = "dec";
2778 atomic_subop = ac_atomic_dec_wrap;
2779 break;
2780 default:
2781 abort();
2782 }
2783
2784 if (cmpswap)
2785 params[param_count++] = get_src(ctx, instr->src[4]);
2786 params[param_count++] = get_src(ctx, instr->src[3]);
2787
2788 if (dim == GLSL_SAMPLER_DIM_BUF) {
2789 params[param_count++] = get_image_buffer_descriptor(ctx, instr, true, true);
2790 params[param_count++] = LLVMBuildExtractElement(ctx->ac.builder, get_src(ctx, instr->src[1]),
2791 ctx->ac.i32_0, ""); /* vindex */
2792 params[param_count++] = ctx->ac.i32_0; /* voffset */
2793 if (HAVE_LLVM >= 0x900) {
2794 /* XXX: The new raw/struct atomic intrinsics are buggy
2795 * with LLVM 8, see r358579.
2796 */
2797 params[param_count++] = ctx->ac.i32_0; /* soffset */
2798 params[param_count++] = ctx->ac.i32_0; /* slc */
2799
2800 length = snprintf(intrinsic_name, sizeof(intrinsic_name),
2801 "llvm.amdgcn.struct.buffer.atomic.%s.i32", atomic_name);
2802 } else {
2803 params[param_count++] = ctx->ac.i1false; /* slc */
2804
2805 length = snprintf(intrinsic_name, sizeof(intrinsic_name),
2806 "llvm.amdgcn.buffer.atomic.%s", atomic_name);
2807 }
2808
2809 assert(length < sizeof(intrinsic_name));
2810 return ac_build_intrinsic(&ctx->ac, intrinsic_name, ctx->ac.i32,
2811 params, param_count, 0);
2812 } else {
2813 struct ac_image_args args = {};
2814 args.opcode = cmpswap ? ac_image_atomic_cmpswap : ac_image_atomic;
2815 args.atomic = atomic_subop;
2816 args.data[0] = params[0];
2817 if (cmpswap)
2818 args.data[1] = params[1];
2819 args.resource = get_image_descriptor(ctx, instr, AC_DESC_IMAGE, true);
2820 get_image_coords(ctx, instr, &args, dim, is_array);
2821 args.dim = get_ac_image_dim(&ctx->ac, dim, is_array);
2822
2823 return ac_build_image_opcode(&ctx->ac, &args);
2824 }
2825 }
2826
2827 static LLVMValueRef visit_image_samples(struct ac_nir_context *ctx,
2828 const nir_intrinsic_instr *instr,
2829 bool bindless)
2830 {
2831 enum glsl_sampler_dim dim;
2832 bool is_array;
2833 if (bindless) {
2834 dim = nir_intrinsic_image_dim(instr);
2835 is_array = nir_intrinsic_image_array(instr);
2836 } else {
2837 const struct glsl_type *type = get_image_deref(instr)->type;
2838 dim = glsl_get_sampler_dim(type);
2839 is_array = glsl_sampler_type_is_array(type);
2840 }
2841
2842 struct ac_image_args args = { 0 };
2843 args.dim = get_ac_sampler_dim(&ctx->ac, dim, is_array);
2844 args.dmask = 0xf;
2845 args.resource = get_image_descriptor(ctx, instr, AC_DESC_IMAGE, false);
2846 args.opcode = ac_image_get_resinfo;
2847 args.lod = ctx->ac.i32_0;
2848 args.attributes = AC_FUNC_ATTR_READNONE;
2849
2850 return ac_build_image_opcode(&ctx->ac, &args);
2851 }
2852
2853 static LLVMValueRef visit_image_size(struct ac_nir_context *ctx,
2854 const nir_intrinsic_instr *instr,
2855 bool bindless)
2856 {
2857 LLVMValueRef res;
2858
2859 enum glsl_sampler_dim dim;
2860 bool is_array;
2861 if (bindless) {
2862 dim = nir_intrinsic_image_dim(instr);
2863 is_array = nir_intrinsic_image_array(instr);
2864 } else {
2865 const struct glsl_type *type = get_image_deref(instr)->type;
2866 dim = glsl_get_sampler_dim(type);
2867 is_array = glsl_sampler_type_is_array(type);
2868 }
2869
2870 if (dim == GLSL_SAMPLER_DIM_BUF)
2871 return get_buffer_size(ctx, get_image_descriptor(ctx, instr, AC_DESC_BUFFER, false), true);
2872
2873 struct ac_image_args args = { 0 };
2874
2875 args.dim = get_ac_image_dim(&ctx->ac, dim, is_array);
2876 args.dmask = 0xf;
2877 args.resource = get_image_descriptor(ctx, instr, AC_DESC_IMAGE, false);
2878 args.opcode = ac_image_get_resinfo;
2879 args.lod = ctx->ac.i32_0;
2880 args.attributes = AC_FUNC_ATTR_READNONE;
2881
2882 res = ac_build_image_opcode(&ctx->ac, &args);
2883
2884 LLVMValueRef two = LLVMConstInt(ctx->ac.i32, 2, false);
2885
2886 if (dim == GLSL_SAMPLER_DIM_CUBE && is_array) {
2887 LLVMValueRef six = LLVMConstInt(ctx->ac.i32, 6, false);
2888 LLVMValueRef z = LLVMBuildExtractElement(ctx->ac.builder, res, two, "");
2889 z = LLVMBuildSDiv(ctx->ac.builder, z, six, "");
2890 res = LLVMBuildInsertElement(ctx->ac.builder, res, z, two, "");
2891 }
2892 if (ctx->ac.chip_class == GFX9 && dim == GLSL_SAMPLER_DIM_1D && is_array) {
2893 LLVMValueRef layers = LLVMBuildExtractElement(ctx->ac.builder, res, two, "");
2894 res = LLVMBuildInsertElement(ctx->ac.builder, res, layers,
2895 ctx->ac.i32_1, "");
2896
2897 }
2898 return res;
2899 }
2900
2901 static void emit_membar(struct ac_llvm_context *ac,
2902 const nir_intrinsic_instr *instr)
2903 {
2904 unsigned wait_flags = 0;
2905
2906 switch (instr->intrinsic) {
2907 case nir_intrinsic_memory_barrier:
2908 case nir_intrinsic_group_memory_barrier:
2909 wait_flags = AC_WAIT_LGKM | AC_WAIT_VLOAD | AC_WAIT_VSTORE;
2910 break;
2911 case nir_intrinsic_memory_barrier_atomic_counter:
2912 case nir_intrinsic_memory_barrier_buffer:
2913 case nir_intrinsic_memory_barrier_image:
2914 wait_flags = AC_WAIT_VLOAD | AC_WAIT_VSTORE;
2915 break;
2916 case nir_intrinsic_memory_barrier_shared:
2917 wait_flags = AC_WAIT_LGKM;
2918 break;
2919 default:
2920 break;
2921 }
2922
2923 ac_build_waitcnt(ac, wait_flags);
2924 }
2925
2926 void ac_emit_barrier(struct ac_llvm_context *ac, gl_shader_stage stage)
2927 {
2928 /* GFX6 only (thanks to a hw bug workaround):
2929 * The real barrier instruction isn’t needed, because an entire patch
2930 * always fits into a single wave.
2931 */
2932 if (ac->chip_class == GFX6 && stage == MESA_SHADER_TESS_CTRL) {
2933 ac_build_waitcnt(ac, AC_WAIT_LGKM | AC_WAIT_VLOAD | AC_WAIT_VSTORE);
2934 return;
2935 }
2936 ac_build_s_barrier(ac);
2937 }
2938
2939 static void emit_discard(struct ac_nir_context *ctx,
2940 const nir_intrinsic_instr *instr)
2941 {
2942 LLVMValueRef cond;
2943
2944 if (instr->intrinsic == nir_intrinsic_discard_if) {
2945 cond = LLVMBuildICmp(ctx->ac.builder, LLVMIntEQ,
2946 get_src(ctx, instr->src[0]),
2947 ctx->ac.i32_0, "");
2948 } else {
2949 assert(instr->intrinsic == nir_intrinsic_discard);
2950 cond = ctx->ac.i1false;
2951 }
2952
2953 ctx->abi->emit_kill(ctx->abi, cond);
2954 }
2955
2956 static LLVMValueRef
2957 visit_load_local_invocation_index(struct ac_nir_context *ctx)
2958 {
2959 LLVMValueRef result;
2960 LLVMValueRef thread_id = ac_get_thread_id(&ctx->ac);
2961 result = LLVMBuildAnd(ctx->ac.builder, ctx->abi->tg_size,
2962 LLVMConstInt(ctx->ac.i32, 0xfc0, false), "");
2963
2964 return LLVMBuildAdd(ctx->ac.builder, result, thread_id, "");
2965 }
2966
2967 static LLVMValueRef
2968 visit_load_subgroup_id(struct ac_nir_context *ctx)
2969 {
2970 if (ctx->stage == MESA_SHADER_COMPUTE) {
2971 LLVMValueRef result;
2972 result = LLVMBuildAnd(ctx->ac.builder, ctx->abi->tg_size,
2973 LLVMConstInt(ctx->ac.i32, 0xfc0, false), "");
2974 return LLVMBuildLShr(ctx->ac.builder, result, LLVMConstInt(ctx->ac.i32, 6, false), "");
2975 } else {
2976 return LLVMConstInt(ctx->ac.i32, 0, false);
2977 }
2978 }
2979
2980 static LLVMValueRef
2981 visit_load_num_subgroups(struct ac_nir_context *ctx)
2982 {
2983 if (ctx->stage == MESA_SHADER_COMPUTE) {
2984 return LLVMBuildAnd(ctx->ac.builder, ctx->abi->tg_size,
2985 LLVMConstInt(ctx->ac.i32, 0x3f, false), "");
2986 } else {
2987 return LLVMConstInt(ctx->ac.i32, 1, false);
2988 }
2989 }
2990
2991 static LLVMValueRef
2992 visit_first_invocation(struct ac_nir_context *ctx)
2993 {
2994 LLVMValueRef active_set = ac_build_ballot(&ctx->ac, ctx->ac.i32_1);
2995 const char *intr = ctx->ac.wave_size == 32 ? "llvm.cttz.i32" : "llvm.cttz.i64";
2996
2997 /* The second argument is whether cttz(0) should be defined, but we do not care. */
2998 LLVMValueRef args[] = {active_set, ctx->ac.i1false};
2999 LLVMValueRef result = ac_build_intrinsic(&ctx->ac, intr,
3000 ctx->ac.iN_wavemask, args, 2,
3001 AC_FUNC_ATTR_NOUNWIND |
3002 AC_FUNC_ATTR_READNONE);
3003
3004 return LLVMBuildTrunc(ctx->ac.builder, result, ctx->ac.i32, "");
3005 }
3006
3007 static LLVMValueRef
3008 visit_load_shared(struct ac_nir_context *ctx,
3009 const nir_intrinsic_instr *instr)
3010 {
3011 LLVMValueRef values[4], derived_ptr, index, ret;
3012
3013 LLVMValueRef ptr = get_memory_ptr(ctx, instr->src[0]);
3014
3015 for (int chan = 0; chan < instr->num_components; chan++) {
3016 index = LLVMConstInt(ctx->ac.i32, chan, 0);
3017 derived_ptr = LLVMBuildGEP(ctx->ac.builder, ptr, &index, 1, "");
3018 values[chan] = LLVMBuildLoad(ctx->ac.builder, derived_ptr, "");
3019 }
3020
3021 ret = ac_build_gather_values(&ctx->ac, values, instr->num_components);
3022 return LLVMBuildBitCast(ctx->ac.builder, ret, get_def_type(ctx, &instr->dest.ssa), "");
3023 }
3024
3025 static void
3026 visit_store_shared(struct ac_nir_context *ctx,
3027 const nir_intrinsic_instr *instr)
3028 {
3029 LLVMValueRef derived_ptr, data,index;
3030 LLVMBuilderRef builder = ctx->ac.builder;
3031
3032 LLVMValueRef ptr = get_memory_ptr(ctx, instr->src[1]);
3033 LLVMValueRef src = get_src(ctx, instr->src[0]);
3034
3035 int writemask = nir_intrinsic_write_mask(instr);
3036 for (int chan = 0; chan < 4; chan++) {
3037 if (!(writemask & (1 << chan))) {
3038 continue;
3039 }
3040 data = ac_llvm_extract_elem(&ctx->ac, src, chan);
3041 index = LLVMConstInt(ctx->ac.i32, chan, 0);
3042 derived_ptr = LLVMBuildGEP(builder, ptr, &index, 1, "");
3043 LLVMBuildStore(builder, data, derived_ptr);
3044 }
3045 }
3046
3047 static LLVMValueRef visit_var_atomic(struct ac_nir_context *ctx,
3048 const nir_intrinsic_instr *instr,
3049 LLVMValueRef ptr, int src_idx)
3050 {
3051 LLVMValueRef result;
3052 LLVMValueRef src = get_src(ctx, instr->src[src_idx]);
3053
3054 const char *sync_scope = HAVE_LLVM >= 0x0900 ? "workgroup-one-as" : "workgroup";
3055
3056 if (instr->intrinsic == nir_intrinsic_shared_atomic_comp_swap ||
3057 instr->intrinsic == nir_intrinsic_deref_atomic_comp_swap) {
3058 LLVMValueRef src1 = get_src(ctx, instr->src[src_idx + 1]);
3059 result = ac_build_atomic_cmp_xchg(&ctx->ac, ptr, src, src1, sync_scope);
3060 result = LLVMBuildExtractValue(ctx->ac.builder, result, 0, "");
3061 } else {
3062 LLVMAtomicRMWBinOp op;
3063 switch (instr->intrinsic) {
3064 case nir_intrinsic_shared_atomic_add:
3065 case nir_intrinsic_deref_atomic_add:
3066 op = LLVMAtomicRMWBinOpAdd;
3067 break;
3068 case nir_intrinsic_shared_atomic_umin:
3069 case nir_intrinsic_deref_atomic_umin:
3070 op = LLVMAtomicRMWBinOpUMin;
3071 break;
3072 case nir_intrinsic_shared_atomic_umax:
3073 case nir_intrinsic_deref_atomic_umax:
3074 op = LLVMAtomicRMWBinOpUMax;
3075 break;
3076 case nir_intrinsic_shared_atomic_imin:
3077 case nir_intrinsic_deref_atomic_imin:
3078 op = LLVMAtomicRMWBinOpMin;
3079 break;
3080 case nir_intrinsic_shared_atomic_imax:
3081 case nir_intrinsic_deref_atomic_imax:
3082 op = LLVMAtomicRMWBinOpMax;
3083 break;
3084 case nir_intrinsic_shared_atomic_and:
3085 case nir_intrinsic_deref_atomic_and:
3086 op = LLVMAtomicRMWBinOpAnd;
3087 break;
3088 case nir_intrinsic_shared_atomic_or:
3089 case nir_intrinsic_deref_atomic_or:
3090 op = LLVMAtomicRMWBinOpOr;
3091 break;
3092 case nir_intrinsic_shared_atomic_xor:
3093 case nir_intrinsic_deref_atomic_xor:
3094 op = LLVMAtomicRMWBinOpXor;
3095 break;
3096 case nir_intrinsic_shared_atomic_exchange:
3097 case nir_intrinsic_deref_atomic_exchange:
3098 op = LLVMAtomicRMWBinOpXchg;
3099 break;
3100 default:
3101 return NULL;
3102 }
3103
3104 result = ac_build_atomic_rmw(&ctx->ac, op, ptr, ac_to_integer(&ctx->ac, src), sync_scope);
3105 }
3106 return result;
3107 }
3108
3109 static LLVMValueRef load_sample_pos(struct ac_nir_context *ctx)
3110 {
3111 LLVMValueRef values[2];
3112 LLVMValueRef pos[2];
3113
3114 pos[0] = ac_to_float(&ctx->ac, ctx->abi->frag_pos[0]);
3115 pos[1] = ac_to_float(&ctx->ac, ctx->abi->frag_pos[1]);
3116
3117 values[0] = ac_build_fract(&ctx->ac, pos[0], 32);
3118 values[1] = ac_build_fract(&ctx->ac, pos[1], 32);
3119 return ac_build_gather_values(&ctx->ac, values, 2);
3120 }
3121
3122 static LLVMValueRef lookup_interp_param(struct ac_nir_context *ctx,
3123 enum glsl_interp_mode interp, unsigned location)
3124 {
3125 switch (interp) {
3126 case INTERP_MODE_FLAT:
3127 default:
3128 return NULL;
3129 case INTERP_MODE_SMOOTH:
3130 case INTERP_MODE_NONE:
3131 if (location == INTERP_CENTER)
3132 return ctx->abi->persp_center;
3133 else if (location == INTERP_CENTROID)
3134 return ctx->abi->persp_centroid;
3135 else if (location == INTERP_SAMPLE)
3136 return ctx->abi->persp_sample;
3137 break;
3138 case INTERP_MODE_NOPERSPECTIVE:
3139 if (location == INTERP_CENTER)
3140 return ctx->abi->linear_center;
3141 else if (location == INTERP_CENTROID)
3142 return ctx->abi->linear_centroid;
3143 else if (location == INTERP_SAMPLE)
3144 return ctx->abi->linear_sample;
3145 break;
3146 }
3147 return NULL;
3148 }
3149
3150 static LLVMValueRef barycentric_center(struct ac_nir_context *ctx,
3151 unsigned mode)
3152 {
3153 LLVMValueRef interp_param = lookup_interp_param(ctx, mode, INTERP_CENTER);
3154 return LLVMBuildBitCast(ctx->ac.builder, interp_param, ctx->ac.v2i32, "");
3155 }
3156
3157 static LLVMValueRef barycentric_offset(struct ac_nir_context *ctx,
3158 unsigned mode,
3159 LLVMValueRef offset)
3160 {
3161 LLVMValueRef interp_param = lookup_interp_param(ctx, mode, INTERP_CENTER);
3162 LLVMValueRef src_c0 = ac_to_float(&ctx->ac, LLVMBuildExtractElement(ctx->ac.builder, offset, ctx->ac.i32_0, ""));
3163 LLVMValueRef src_c1 = ac_to_float(&ctx->ac, LLVMBuildExtractElement(ctx->ac.builder, offset, ctx->ac.i32_1, ""));
3164
3165 LLVMValueRef ij_out[2];
3166 LLVMValueRef ddxy_out = ac_build_ddxy_interp(&ctx->ac, interp_param);
3167
3168 /*
3169 * take the I then J parameters, and the DDX/Y for it, and
3170 * calculate the IJ inputs for the interpolator.
3171 * temp1 = ddx * offset/sample.x + I;
3172 * interp_param.I = ddy * offset/sample.y + temp1;
3173 * temp1 = ddx * offset/sample.x + J;
3174 * interp_param.J = ddy * offset/sample.y + temp1;
3175 */
3176 for (unsigned i = 0; i < 2; i++) {
3177 LLVMValueRef ix_ll = LLVMConstInt(ctx->ac.i32, i, false);
3178 LLVMValueRef iy_ll = LLVMConstInt(ctx->ac.i32, i + 2, false);
3179 LLVMValueRef ddx_el = LLVMBuildExtractElement(ctx->ac.builder,
3180 ddxy_out, ix_ll, "");
3181 LLVMValueRef ddy_el = LLVMBuildExtractElement(ctx->ac.builder,
3182 ddxy_out, iy_ll, "");
3183 LLVMValueRef interp_el = LLVMBuildExtractElement(ctx->ac.builder,
3184 interp_param, ix_ll, "");
3185 LLVMValueRef temp1, temp2;
3186
3187 interp_el = LLVMBuildBitCast(ctx->ac.builder, interp_el,
3188 ctx->ac.f32, "");
3189
3190 temp1 = ac_build_fmad(&ctx->ac, ddx_el, src_c0, interp_el);
3191 temp2 = ac_build_fmad(&ctx->ac, ddy_el, src_c1, temp1);
3192
3193 ij_out[i] = LLVMBuildBitCast(ctx->ac.builder,
3194 temp2, ctx->ac.i32, "");
3195 }
3196 interp_param = ac_build_gather_values(&ctx->ac, ij_out, 2);
3197 return LLVMBuildBitCast(ctx->ac.builder, interp_param, ctx->ac.v2i32, "");
3198 }
3199
3200 static LLVMValueRef barycentric_centroid(struct ac_nir_context *ctx,
3201 unsigned mode)
3202 {
3203 LLVMValueRef interp_param = lookup_interp_param(ctx, mode, INTERP_CENTROID);
3204 return LLVMBuildBitCast(ctx->ac.builder, interp_param, ctx->ac.v2i32, "");
3205 }
3206
3207 static LLVMValueRef barycentric_at_sample(struct ac_nir_context *ctx,
3208 unsigned mode,
3209 LLVMValueRef sample_id)
3210 {
3211 if (ctx->abi->interp_at_sample_force_center)
3212 return barycentric_center(ctx, mode);
3213
3214 LLVMValueRef halfval = LLVMConstReal(ctx->ac.f32, 0.5f);
3215
3216 /* fetch sample ID */
3217 LLVMValueRef sample_pos = ctx->abi->load_sample_position(ctx->abi, sample_id);
3218
3219 LLVMValueRef src_c0 = LLVMBuildExtractElement(ctx->ac.builder, sample_pos, ctx->ac.i32_0, "");
3220 src_c0 = LLVMBuildFSub(ctx->ac.builder, src_c0, halfval, "");
3221 LLVMValueRef src_c1 = LLVMBuildExtractElement(ctx->ac.builder, sample_pos, ctx->ac.i32_1, "");
3222 src_c1 = LLVMBuildFSub(ctx->ac.builder, src_c1, halfval, "");
3223 LLVMValueRef coords[] = { src_c0, src_c1 };
3224 LLVMValueRef offset = ac_build_gather_values(&ctx->ac, coords, 2);
3225
3226 return barycentric_offset(ctx, mode, offset);
3227 }
3228
3229
3230 static LLVMValueRef barycentric_sample(struct ac_nir_context *ctx,
3231 unsigned mode)
3232 {
3233 LLVMValueRef interp_param = lookup_interp_param(ctx, mode, INTERP_SAMPLE);
3234 return LLVMBuildBitCast(ctx->ac.builder, interp_param, ctx->ac.v2i32, "");
3235 }
3236
3237 static LLVMValueRef load_interpolated_input(struct ac_nir_context *ctx,
3238 LLVMValueRef interp_param,
3239 unsigned index, unsigned comp_start,
3240 unsigned num_components,
3241 unsigned bitsize)
3242 {
3243 LLVMValueRef attr_number = LLVMConstInt(ctx->ac.i32, index, false);
3244
3245 interp_param = LLVMBuildBitCast(ctx->ac.builder,
3246 interp_param, ctx->ac.v2f32, "");
3247 LLVMValueRef i = LLVMBuildExtractElement(
3248 ctx->ac.builder, interp_param, ctx->ac.i32_0, "");
3249 LLVMValueRef j = LLVMBuildExtractElement(
3250 ctx->ac.builder, interp_param, ctx->ac.i32_1, "");
3251
3252 LLVMValueRef values[4];
3253 assert(bitsize == 16 || bitsize == 32);
3254 for (unsigned comp = 0; comp < num_components; comp++) {
3255 LLVMValueRef llvm_chan = LLVMConstInt(ctx->ac.i32, comp_start + comp, false);
3256 if (bitsize == 16) {
3257 values[comp] = ac_build_fs_interp_f16(&ctx->ac, llvm_chan, attr_number,
3258 ctx->abi->prim_mask, i, j);
3259 } else {
3260 values[comp] = ac_build_fs_interp(&ctx->ac, llvm_chan, attr_number,
3261 ctx->abi->prim_mask, i, j);
3262 }
3263 }
3264
3265 return ac_to_integer(&ctx->ac, ac_build_gather_values(&ctx->ac, values, num_components));
3266 }
3267
3268 static LLVMValueRef load_flat_input(struct ac_nir_context *ctx,
3269 unsigned index, unsigned comp_start,
3270 unsigned num_components,
3271 unsigned bit_size)
3272 {
3273 LLVMValueRef attr_number = LLVMConstInt(ctx->ac.i32, index, false);
3274
3275 LLVMValueRef values[8];
3276
3277 /* Each component of a 64-bit value takes up two GL-level channels. */
3278 unsigned channels =
3279 bit_size == 64 ? num_components * 2 : num_components;
3280
3281 for (unsigned chan = 0; chan < channels; chan++) {
3282 if (comp_start + chan > 4)
3283 attr_number = LLVMConstInt(ctx->ac.i32, index + 1, false);
3284 LLVMValueRef llvm_chan = LLVMConstInt(ctx->ac.i32, (comp_start + chan) % 4, false);
3285 values[chan] = ac_build_fs_interp_mov(&ctx->ac,
3286 LLVMConstInt(ctx->ac.i32, 2, false),
3287 llvm_chan,
3288 attr_number,
3289 ctx->abi->prim_mask);
3290 values[chan] = LLVMBuildBitCast(ctx->ac.builder, values[chan], ctx->ac.i32, "");
3291 values[chan] = LLVMBuildTruncOrBitCast(ctx->ac.builder, values[chan],
3292 bit_size == 16 ? ctx->ac.i16 : ctx->ac.i32, "");
3293 }
3294
3295 LLVMValueRef result = ac_build_gather_values(&ctx->ac, values, channels);
3296 if (bit_size == 64) {
3297 LLVMTypeRef type = num_components == 1 ? ctx->ac.i64 :
3298 LLVMVectorType(ctx->ac.i64, num_components);
3299 result = LLVMBuildBitCast(ctx->ac.builder, result, type, "");
3300 }
3301 return result;
3302 }
3303
3304 static void visit_intrinsic(struct ac_nir_context *ctx,
3305 nir_intrinsic_instr *instr)
3306 {
3307 LLVMValueRef result = NULL;
3308
3309 switch (instr->intrinsic) {
3310 case nir_intrinsic_ballot:
3311 result = ac_build_ballot(&ctx->ac, get_src(ctx, instr->src[0]));
3312 if (ctx->ac.ballot_mask_bits > ctx->ac.wave_size)
3313 result = LLVMBuildZExt(ctx->ac.builder, result, ctx->ac.iN_ballotmask, "");
3314 break;
3315 case nir_intrinsic_read_invocation:
3316 result = ac_build_readlane(&ctx->ac, get_src(ctx, instr->src[0]),
3317 get_src(ctx, instr->src[1]));
3318 break;
3319 case nir_intrinsic_read_first_invocation:
3320 result = ac_build_readlane(&ctx->ac, get_src(ctx, instr->src[0]), NULL);
3321 break;
3322 case nir_intrinsic_load_subgroup_invocation:
3323 result = ac_get_thread_id(&ctx->ac);
3324 break;
3325 case nir_intrinsic_load_work_group_id: {
3326 LLVMValueRef values[3];
3327
3328 for (int i = 0; i < 3; i++) {
3329 values[i] = ctx->abi->workgroup_ids[i] ?
3330 ctx->abi->workgroup_ids[i] : ctx->ac.i32_0;
3331 }
3332
3333 result = ac_build_gather_values(&ctx->ac, values, 3);
3334 break;
3335 }
3336 case nir_intrinsic_load_base_vertex:
3337 case nir_intrinsic_load_first_vertex:
3338 result = ctx->abi->load_base_vertex(ctx->abi);
3339 break;
3340 case nir_intrinsic_load_local_group_size:
3341 result = ctx->abi->load_local_group_size(ctx->abi);
3342 break;
3343 case nir_intrinsic_load_vertex_id:
3344 result = LLVMBuildAdd(ctx->ac.builder, ctx->abi->vertex_id,
3345 ctx->abi->base_vertex, "");
3346 break;
3347 case nir_intrinsic_load_vertex_id_zero_base: {
3348 result = ctx->abi->vertex_id;
3349 break;
3350 }
3351 case nir_intrinsic_load_local_invocation_id: {
3352 result = ctx->abi->local_invocation_ids;
3353 break;
3354 }
3355 case nir_intrinsic_load_base_instance:
3356 result = ctx->abi->start_instance;
3357 break;
3358 case nir_intrinsic_load_draw_id:
3359 result = ctx->abi->draw_id;
3360 break;
3361 case nir_intrinsic_load_view_index:
3362 result = ctx->abi->view_index;
3363 break;
3364 case nir_intrinsic_load_invocation_id:
3365 if (ctx->stage == MESA_SHADER_TESS_CTRL) {
3366 result = ac_unpack_param(&ctx->ac, ctx->abi->tcs_rel_ids, 8, 5);
3367 } else {
3368 if (ctx->ac.chip_class >= GFX10) {
3369 result = LLVMBuildAnd(ctx->ac.builder,
3370 ctx->abi->gs_invocation_id,
3371 LLVMConstInt(ctx->ac.i32, 127, 0), "");
3372 } else {
3373 result = ctx->abi->gs_invocation_id;
3374 }
3375 }
3376 break;
3377 case nir_intrinsic_load_primitive_id:
3378 if (ctx->stage == MESA_SHADER_GEOMETRY) {
3379 result = ctx->abi->gs_prim_id;
3380 } else if (ctx->stage == MESA_SHADER_TESS_CTRL) {
3381 result = ctx->abi->tcs_patch_id;
3382 } else if (ctx->stage == MESA_SHADER_TESS_EVAL) {
3383 result = ctx->abi->tes_patch_id;
3384 } else
3385 fprintf(stderr, "Unknown primitive id intrinsic: %d", ctx->stage);
3386 break;
3387 case nir_intrinsic_load_sample_id:
3388 result = ac_unpack_param(&ctx->ac, ctx->abi->ancillary, 8, 4);
3389 break;
3390 case nir_intrinsic_load_sample_pos:
3391 result = load_sample_pos(ctx);
3392 break;
3393 case nir_intrinsic_load_sample_mask_in:
3394 result = ctx->abi->load_sample_mask_in(ctx->abi);
3395 break;
3396 case nir_intrinsic_load_frag_coord: {
3397 LLVMValueRef values[4] = {
3398 ctx->abi->frag_pos[0],
3399 ctx->abi->frag_pos[1],
3400 ctx->abi->frag_pos[2],
3401 ac_build_fdiv(&ctx->ac, ctx->ac.f32_1, ctx->abi->frag_pos[3])
3402 };
3403 result = ac_to_integer(&ctx->ac,
3404 ac_build_gather_values(&ctx->ac, values, 4));
3405 break;
3406 }
3407 case nir_intrinsic_load_layer_id:
3408 result = ctx->abi->inputs[ac_llvm_reg_index_soa(VARYING_SLOT_LAYER, 0)];
3409 break;
3410 case nir_intrinsic_load_front_face:
3411 result = ctx->abi->front_face;
3412 break;
3413 case nir_intrinsic_load_helper_invocation:
3414 result = ac_build_load_helper_invocation(&ctx->ac);
3415 break;
3416 case nir_intrinsic_load_color0:
3417 result = ctx->abi->color0;
3418 break;
3419 case nir_intrinsic_load_color1:
3420 result = ctx->abi->color1;
3421 break;
3422 case nir_intrinsic_load_user_data_amd:
3423 assert(LLVMTypeOf(ctx->abi->user_data) == ctx->ac.v4i32);
3424 result = ctx->abi->user_data;
3425 break;
3426 case nir_intrinsic_load_instance_id:
3427 result = ctx->abi->instance_id;
3428 break;
3429 case nir_intrinsic_load_num_work_groups:
3430 result = ctx->abi->num_work_groups;
3431 break;
3432 case nir_intrinsic_load_local_invocation_index:
3433 result = visit_load_local_invocation_index(ctx);
3434 break;
3435 case nir_intrinsic_load_subgroup_id:
3436 result = visit_load_subgroup_id(ctx);
3437 break;
3438 case nir_intrinsic_load_num_subgroups:
3439 result = visit_load_num_subgroups(ctx);
3440 break;
3441 case nir_intrinsic_first_invocation:
3442 result = visit_first_invocation(ctx);
3443 break;
3444 case nir_intrinsic_load_push_constant:
3445 result = visit_load_push_constant(ctx, instr);
3446 break;
3447 case nir_intrinsic_vulkan_resource_index: {
3448 LLVMValueRef index = get_src(ctx, instr->src[0]);
3449 unsigned desc_set = nir_intrinsic_desc_set(instr);
3450 unsigned binding = nir_intrinsic_binding(instr);
3451
3452 result = ctx->abi->load_resource(ctx->abi, index, desc_set,
3453 binding);
3454 break;
3455 }
3456 case nir_intrinsic_vulkan_resource_reindex:
3457 result = visit_vulkan_resource_reindex(ctx, instr);
3458 break;
3459 case nir_intrinsic_store_ssbo:
3460 visit_store_ssbo(ctx, instr);
3461 break;
3462 case nir_intrinsic_load_ssbo:
3463 result = visit_load_buffer(ctx, instr);
3464 break;
3465 case nir_intrinsic_ssbo_atomic_add:
3466 case nir_intrinsic_ssbo_atomic_imin:
3467 case nir_intrinsic_ssbo_atomic_umin:
3468 case nir_intrinsic_ssbo_atomic_imax:
3469 case nir_intrinsic_ssbo_atomic_umax:
3470 case nir_intrinsic_ssbo_atomic_and:
3471 case nir_intrinsic_ssbo_atomic_or:
3472 case nir_intrinsic_ssbo_atomic_xor:
3473 case nir_intrinsic_ssbo_atomic_exchange:
3474 case nir_intrinsic_ssbo_atomic_comp_swap:
3475 result = visit_atomic_ssbo(ctx, instr);
3476 break;
3477 case nir_intrinsic_load_ubo:
3478 result = visit_load_ubo_buffer(ctx, instr);
3479 break;
3480 case nir_intrinsic_get_buffer_size:
3481 result = visit_get_buffer_size(ctx, instr);
3482 break;
3483 case nir_intrinsic_load_deref:
3484 result = visit_load_var(ctx, instr);
3485 break;
3486 case nir_intrinsic_store_deref:
3487 visit_store_var(ctx, instr);
3488 break;
3489 case nir_intrinsic_load_shared:
3490 result = visit_load_shared(ctx, instr);
3491 break;
3492 case nir_intrinsic_store_shared:
3493 visit_store_shared(ctx, instr);
3494 break;
3495 case nir_intrinsic_bindless_image_samples:
3496 result = visit_image_samples(ctx, instr, true);
3497 break;
3498 case nir_intrinsic_image_deref_samples:
3499 result = visit_image_samples(ctx, instr, false);
3500 break;
3501 case nir_intrinsic_bindless_image_load:
3502 result = visit_image_load(ctx, instr, true);
3503 break;
3504 case nir_intrinsic_image_deref_load:
3505 result = visit_image_load(ctx, instr, false);
3506 break;
3507 case nir_intrinsic_bindless_image_store:
3508 visit_image_store(ctx, instr, true);
3509 break;
3510 case nir_intrinsic_image_deref_store:
3511 visit_image_store(ctx, instr, false);
3512 break;
3513 case nir_intrinsic_bindless_image_atomic_add:
3514 case nir_intrinsic_bindless_image_atomic_imin:
3515 case nir_intrinsic_bindless_image_atomic_umin:
3516 case nir_intrinsic_bindless_image_atomic_imax:
3517 case nir_intrinsic_bindless_image_atomic_umax:
3518 case nir_intrinsic_bindless_image_atomic_and:
3519 case nir_intrinsic_bindless_image_atomic_or:
3520 case nir_intrinsic_bindless_image_atomic_xor:
3521 case nir_intrinsic_bindless_image_atomic_exchange:
3522 case nir_intrinsic_bindless_image_atomic_comp_swap:
3523 case nir_intrinsic_bindless_image_atomic_inc_wrap:
3524 case nir_intrinsic_bindless_image_atomic_dec_wrap:
3525 result = visit_image_atomic(ctx, instr, true);
3526 break;
3527 case nir_intrinsic_image_deref_atomic_add:
3528 case nir_intrinsic_image_deref_atomic_imin:
3529 case nir_intrinsic_image_deref_atomic_umin:
3530 case nir_intrinsic_image_deref_atomic_imax:
3531 case nir_intrinsic_image_deref_atomic_umax:
3532 case nir_intrinsic_image_deref_atomic_and:
3533 case nir_intrinsic_image_deref_atomic_or:
3534 case nir_intrinsic_image_deref_atomic_xor:
3535 case nir_intrinsic_image_deref_atomic_exchange:
3536 case nir_intrinsic_image_deref_atomic_comp_swap:
3537 case nir_intrinsic_image_deref_atomic_inc_wrap:
3538 case nir_intrinsic_image_deref_atomic_dec_wrap:
3539 result = visit_image_atomic(ctx, instr, false);
3540 break;
3541 case nir_intrinsic_bindless_image_size:
3542 result = visit_image_size(ctx, instr, true);
3543 break;
3544 case nir_intrinsic_image_deref_size:
3545 result = visit_image_size(ctx, instr, false);
3546 break;
3547 case nir_intrinsic_shader_clock:
3548 result = ac_build_shader_clock(&ctx->ac);
3549 break;
3550 case nir_intrinsic_discard:
3551 case nir_intrinsic_discard_if:
3552 emit_discard(ctx, instr);
3553 break;
3554 case nir_intrinsic_memory_barrier:
3555 case nir_intrinsic_group_memory_barrier:
3556 case nir_intrinsic_memory_barrier_atomic_counter:
3557 case nir_intrinsic_memory_barrier_buffer:
3558 case nir_intrinsic_memory_barrier_image:
3559 case nir_intrinsic_memory_barrier_shared:
3560 emit_membar(&ctx->ac, instr);
3561 break;
3562 case nir_intrinsic_barrier:
3563 ac_emit_barrier(&ctx->ac, ctx->stage);
3564 break;
3565 case nir_intrinsic_shared_atomic_add:
3566 case nir_intrinsic_shared_atomic_imin:
3567 case nir_intrinsic_shared_atomic_umin:
3568 case nir_intrinsic_shared_atomic_imax:
3569 case nir_intrinsic_shared_atomic_umax:
3570 case nir_intrinsic_shared_atomic_and:
3571 case nir_intrinsic_shared_atomic_or:
3572 case nir_intrinsic_shared_atomic_xor:
3573 case nir_intrinsic_shared_atomic_exchange:
3574 case nir_intrinsic_shared_atomic_comp_swap: {
3575 LLVMValueRef ptr = get_memory_ptr(ctx, instr->src[0]);
3576 result = visit_var_atomic(ctx, instr, ptr, 1);
3577 break;
3578 }
3579 case nir_intrinsic_deref_atomic_add:
3580 case nir_intrinsic_deref_atomic_imin:
3581 case nir_intrinsic_deref_atomic_umin:
3582 case nir_intrinsic_deref_atomic_imax:
3583 case nir_intrinsic_deref_atomic_umax:
3584 case nir_intrinsic_deref_atomic_and:
3585 case nir_intrinsic_deref_atomic_or:
3586 case nir_intrinsic_deref_atomic_xor:
3587 case nir_intrinsic_deref_atomic_exchange:
3588 case nir_intrinsic_deref_atomic_comp_swap: {
3589 LLVMValueRef ptr = get_src(ctx, instr->src[0]);
3590 result = visit_var_atomic(ctx, instr, ptr, 1);
3591 break;
3592 }
3593 case nir_intrinsic_load_barycentric_pixel:
3594 result = barycentric_center(ctx, nir_intrinsic_interp_mode(instr));
3595 break;
3596 case nir_intrinsic_load_barycentric_centroid:
3597 result = barycentric_centroid(ctx, nir_intrinsic_interp_mode(instr));
3598 break;
3599 case nir_intrinsic_load_barycentric_sample:
3600 result = barycentric_sample(ctx, nir_intrinsic_interp_mode(instr));
3601 break;
3602 case nir_intrinsic_load_barycentric_at_offset: {
3603 LLVMValueRef offset = ac_to_float(&ctx->ac, get_src(ctx, instr->src[0]));
3604 result = barycentric_offset(ctx, nir_intrinsic_interp_mode(instr), offset);
3605 break;
3606 }
3607 case nir_intrinsic_load_barycentric_at_sample: {
3608 LLVMValueRef sample_id = get_src(ctx, instr->src[0]);
3609 result = barycentric_at_sample(ctx, nir_intrinsic_interp_mode(instr), sample_id);
3610 break;
3611 }
3612 case nir_intrinsic_load_interpolated_input: {
3613 /* We assume any indirect loads have been lowered away */
3614 ASSERTED nir_const_value *offset = nir_src_as_const_value(instr->src[1]);
3615 assert(offset);
3616 assert(offset[0].i32 == 0);
3617
3618 LLVMValueRef interp_param = get_src(ctx, instr->src[0]);
3619 unsigned index = nir_intrinsic_base(instr);
3620 unsigned component = nir_intrinsic_component(instr);
3621 result = load_interpolated_input(ctx, interp_param, index,
3622 component,
3623 instr->dest.ssa.num_components,
3624 instr->dest.ssa.bit_size);
3625 break;
3626 }
3627 case nir_intrinsic_load_input: {
3628 /* We only lower inputs for fragment shaders ATM */
3629 ASSERTED nir_const_value *offset = nir_src_as_const_value(instr->src[0]);
3630 assert(offset);
3631 assert(offset[0].i32 == 0);
3632
3633 unsigned index = nir_intrinsic_base(instr);
3634 unsigned component = nir_intrinsic_component(instr);
3635 result = load_flat_input(ctx, index, component,
3636 instr->dest.ssa.num_components,
3637 instr->dest.ssa.bit_size);
3638 break;
3639 }
3640 case nir_intrinsic_emit_vertex:
3641 ctx->abi->emit_vertex(ctx->abi, nir_intrinsic_stream_id(instr), ctx->abi->outputs);
3642 break;
3643 case nir_intrinsic_end_primitive:
3644 ctx->abi->emit_primitive(ctx->abi, nir_intrinsic_stream_id(instr));
3645 break;
3646 case nir_intrinsic_load_tess_coord:
3647 result = ctx->abi->load_tess_coord(ctx->abi);
3648 break;
3649 case nir_intrinsic_load_tess_level_outer:
3650 result = ctx->abi->load_tess_level(ctx->abi, VARYING_SLOT_TESS_LEVEL_OUTER, false);
3651 break;
3652 case nir_intrinsic_load_tess_level_inner:
3653 result = ctx->abi->load_tess_level(ctx->abi, VARYING_SLOT_TESS_LEVEL_INNER, false);
3654 break;
3655 case nir_intrinsic_load_tess_level_outer_default:
3656 result = ctx->abi->load_tess_level(ctx->abi, VARYING_SLOT_TESS_LEVEL_OUTER, true);
3657 break;
3658 case nir_intrinsic_load_tess_level_inner_default:
3659 result = ctx->abi->load_tess_level(ctx->abi, VARYING_SLOT_TESS_LEVEL_INNER, true);
3660 break;
3661 case nir_intrinsic_load_patch_vertices_in:
3662 result = ctx->abi->load_patch_vertices_in(ctx->abi);
3663 break;
3664 case nir_intrinsic_vote_all: {
3665 LLVMValueRef tmp = ac_build_vote_all(&ctx->ac, get_src(ctx, instr->src[0]));
3666 result = LLVMBuildSExt(ctx->ac.builder, tmp, ctx->ac.i32, "");
3667 break;
3668 }
3669 case nir_intrinsic_vote_any: {
3670 LLVMValueRef tmp = ac_build_vote_any(&ctx->ac, get_src(ctx, instr->src[0]));
3671 result = LLVMBuildSExt(ctx->ac.builder, tmp, ctx->ac.i32, "");
3672 break;
3673 }
3674 case nir_intrinsic_shuffle:
3675 result = ac_build_shuffle(&ctx->ac, get_src(ctx, instr->src[0]),
3676 get_src(ctx, instr->src[1]));
3677 break;
3678 case nir_intrinsic_reduce:
3679 result = ac_build_reduce(&ctx->ac,
3680 get_src(ctx, instr->src[0]),
3681 instr->const_index[0],
3682 instr->const_index[1]);
3683 break;
3684 case nir_intrinsic_inclusive_scan:
3685 result = ac_build_inclusive_scan(&ctx->ac,
3686 get_src(ctx, instr->src[0]),
3687 instr->const_index[0]);
3688 break;
3689 case nir_intrinsic_exclusive_scan:
3690 result = ac_build_exclusive_scan(&ctx->ac,
3691 get_src(ctx, instr->src[0]),
3692 instr->const_index[0]);
3693 break;
3694 case nir_intrinsic_quad_broadcast: {
3695 unsigned lane = nir_src_as_uint(instr->src[1]);
3696 result = ac_build_quad_swizzle(&ctx->ac, get_src(ctx, instr->src[0]),
3697 lane, lane, lane, lane);
3698 break;
3699 }
3700 case nir_intrinsic_quad_swap_horizontal:
3701 result = ac_build_quad_swizzle(&ctx->ac, get_src(ctx, instr->src[0]), 1, 0, 3 ,2);
3702 break;
3703 case nir_intrinsic_quad_swap_vertical:
3704 result = ac_build_quad_swizzle(&ctx->ac, get_src(ctx, instr->src[0]), 2, 3, 0 ,1);
3705 break;
3706 case nir_intrinsic_quad_swap_diagonal:
3707 result = ac_build_quad_swizzle(&ctx->ac, get_src(ctx, instr->src[0]), 3, 2, 1 ,0);
3708 break;
3709 case nir_intrinsic_quad_swizzle_amd: {
3710 uint32_t mask = nir_intrinsic_swizzle_mask(instr);
3711 result = ac_build_quad_swizzle(&ctx->ac, get_src(ctx, instr->src[0]),
3712 mask & 0x3, (mask >> 2) & 0x3,
3713 (mask >> 4) & 0x3, (mask >> 6) & 0x3);
3714 break;
3715 }
3716 case nir_intrinsic_masked_swizzle_amd: {
3717 uint32_t mask = nir_intrinsic_swizzle_mask(instr);
3718 result = ac_build_ds_swizzle(&ctx->ac, get_src(ctx, instr->src[0]), mask);
3719 break;
3720 }
3721 case nir_intrinsic_write_invocation_amd:
3722 result = ac_build_writelane(&ctx->ac, get_src(ctx, instr->src[0]),
3723 get_src(ctx, instr->src[1]),
3724 get_src(ctx, instr->src[2]));
3725 break;
3726 case nir_intrinsic_mbcnt_amd:
3727 result = ac_build_mbcnt(&ctx->ac, get_src(ctx, instr->src[0]));
3728 break;
3729 case nir_intrinsic_load_scratch: {
3730 LLVMValueRef offset = get_src(ctx, instr->src[0]);
3731 LLVMValueRef ptr = ac_build_gep0(&ctx->ac, ctx->scratch,
3732 offset);
3733 LLVMTypeRef comp_type =
3734 LLVMIntTypeInContext(ctx->ac.context, instr->dest.ssa.bit_size);
3735 LLVMTypeRef vec_type =
3736 instr->dest.ssa.num_components == 1 ? comp_type :
3737 LLVMVectorType(comp_type, instr->dest.ssa.num_components);
3738 unsigned addr_space = LLVMGetPointerAddressSpace(LLVMTypeOf(ptr));
3739 ptr = LLVMBuildBitCast(ctx->ac.builder, ptr,
3740 LLVMPointerType(vec_type, addr_space), "");
3741 result = LLVMBuildLoad(ctx->ac.builder, ptr, "");
3742 break;
3743 }
3744 case nir_intrinsic_store_scratch: {
3745 LLVMValueRef offset = get_src(ctx, instr->src[1]);
3746 LLVMValueRef ptr = ac_build_gep0(&ctx->ac, ctx->scratch,
3747 offset);
3748 LLVMTypeRef comp_type =
3749 LLVMIntTypeInContext(ctx->ac.context, instr->src[0].ssa->bit_size);
3750 unsigned addr_space = LLVMGetPointerAddressSpace(LLVMTypeOf(ptr));
3751 ptr = LLVMBuildBitCast(ctx->ac.builder, ptr,
3752 LLVMPointerType(comp_type, addr_space), "");
3753 LLVMValueRef src = get_src(ctx, instr->src[0]);
3754 unsigned wrmask = nir_intrinsic_write_mask(instr);
3755 while (wrmask) {
3756 int start, count;
3757 u_bit_scan_consecutive_range(&wrmask, &start, &count);
3758
3759 LLVMValueRef offset = LLVMConstInt(ctx->ac.i32, start, false);
3760 LLVMValueRef offset_ptr = LLVMBuildGEP(ctx->ac.builder, ptr, &offset, 1, "");
3761 LLVMTypeRef vec_type =
3762 count == 1 ? comp_type : LLVMVectorType(comp_type, count);
3763 offset_ptr = LLVMBuildBitCast(ctx->ac.builder,
3764 offset_ptr,
3765 LLVMPointerType(vec_type, addr_space),
3766 "");
3767 LLVMValueRef offset_src =
3768 ac_extract_components(&ctx->ac, src, start, count);
3769 LLVMBuildStore(ctx->ac.builder, offset_src, offset_ptr);
3770 }
3771 break;
3772 }
3773 default:
3774 fprintf(stderr, "Unknown intrinsic: ");
3775 nir_print_instr(&instr->instr, stderr);
3776 fprintf(stderr, "\n");
3777 break;
3778 }
3779 if (result) {
3780 ctx->ssa_defs[instr->dest.ssa.index] = result;
3781 }
3782 }
3783
3784 static LLVMValueRef get_bindless_index_from_uniform(struct ac_nir_context *ctx,
3785 unsigned base_index,
3786 unsigned constant_index,
3787 LLVMValueRef dynamic_index)
3788 {
3789 LLVMValueRef offset = LLVMConstInt(ctx->ac.i32, base_index * 4, 0);
3790 LLVMValueRef index = LLVMBuildAdd(ctx->ac.builder, dynamic_index,
3791 LLVMConstInt(ctx->ac.i32, constant_index, 0), "");
3792
3793 /* Bindless uniforms are 64bit so multiple index by 8 */
3794 index = LLVMBuildMul(ctx->ac.builder, index, LLVMConstInt(ctx->ac.i32, 8, 0), "");
3795 offset = LLVMBuildAdd(ctx->ac.builder, offset, index, "");
3796
3797 LLVMValueRef ubo_index = ctx->abi->load_ubo(ctx->abi, ctx->ac.i32_0);
3798
3799 LLVMValueRef ret = ac_build_buffer_load(&ctx->ac, ubo_index, 1, NULL, offset,
3800 NULL, 0, 0, true, true);
3801
3802 return LLVMBuildBitCast(ctx->ac.builder, ret, ctx->ac.i32, "");
3803 }
3804
3805 static LLVMValueRef get_sampler_desc(struct ac_nir_context *ctx,
3806 nir_deref_instr *deref_instr,
3807 enum ac_descriptor_type desc_type,
3808 const nir_instr *instr,
3809 bool image, bool write)
3810 {
3811 LLVMValueRef index = NULL;
3812 unsigned constant_index = 0;
3813 unsigned descriptor_set;
3814 unsigned base_index;
3815 bool bindless = false;
3816
3817 if (!deref_instr) {
3818 descriptor_set = 0;
3819 if (image) {
3820 nir_intrinsic_instr *img_instr = nir_instr_as_intrinsic(instr);
3821 base_index = 0;
3822 bindless = true;
3823 index = get_src(ctx, img_instr->src[0]);
3824 } else {
3825 nir_tex_instr *tex_instr = nir_instr_as_tex(instr);
3826 int sampSrcIdx = nir_tex_instr_src_index(tex_instr,
3827 nir_tex_src_sampler_handle);
3828 if (sampSrcIdx != -1) {
3829 base_index = 0;
3830 bindless = true;
3831 index = get_src(ctx, tex_instr->src[sampSrcIdx].src);
3832 } else {
3833 assert(tex_instr && !image);
3834 base_index = tex_instr->sampler_index;
3835 }
3836 }
3837 } else {
3838 while(deref_instr->deref_type != nir_deref_type_var) {
3839 if (deref_instr->deref_type == nir_deref_type_array) {
3840 unsigned array_size = glsl_get_aoa_size(deref_instr->type);
3841 if (!array_size)
3842 array_size = 1;
3843
3844 if (nir_src_is_const(deref_instr->arr.index)) {
3845 constant_index += array_size * nir_src_as_uint(deref_instr->arr.index);
3846 } else {
3847 LLVMValueRef indirect = get_src(ctx, deref_instr->arr.index);
3848
3849 indirect = LLVMBuildMul(ctx->ac.builder, indirect,
3850 LLVMConstInt(ctx->ac.i32, array_size, false), "");
3851
3852 if (!index)
3853 index = indirect;
3854 else
3855 index = LLVMBuildAdd(ctx->ac.builder, index, indirect, "");
3856 }
3857
3858 deref_instr = nir_src_as_deref(deref_instr->parent);
3859 } else if (deref_instr->deref_type == nir_deref_type_struct) {
3860 unsigned sidx = deref_instr->strct.index;
3861 deref_instr = nir_src_as_deref(deref_instr->parent);
3862 constant_index += glsl_get_struct_location_offset(deref_instr->type, sidx);
3863 } else {
3864 unreachable("Unsupported deref type");
3865 }
3866 }
3867 descriptor_set = deref_instr->var->data.descriptor_set;
3868
3869 if (deref_instr->var->data.bindless) {
3870 /* For now just assert on unhandled variable types */
3871 assert(deref_instr->var->data.mode == nir_var_uniform);
3872
3873 base_index = deref_instr->var->data.driver_location;
3874 bindless = true;
3875
3876 index = index ? index : ctx->ac.i32_0;
3877 index = get_bindless_index_from_uniform(ctx, base_index,
3878 constant_index, index);
3879 } else
3880 base_index = deref_instr->var->data.binding;
3881 }
3882
3883 return ctx->abi->load_sampler_desc(ctx->abi,
3884 descriptor_set,
3885 base_index,
3886 constant_index, index,
3887 desc_type, image, write, bindless);
3888 }
3889
3890 /* Disable anisotropic filtering if BASE_LEVEL == LAST_LEVEL.
3891 *
3892 * GFX6-GFX7:
3893 * If BASE_LEVEL == LAST_LEVEL, the shader must disable anisotropic
3894 * filtering manually. The driver sets img7 to a mask clearing
3895 * MAX_ANISO_RATIO if BASE_LEVEL == LAST_LEVEL. The shader must do:
3896 * s_and_b32 samp0, samp0, img7
3897 *
3898 * GFX8:
3899 * The ANISO_OVERRIDE sampler field enables this fix in TA.
3900 */
3901 static LLVMValueRef sici_fix_sampler_aniso(struct ac_nir_context *ctx,
3902 LLVMValueRef res, LLVMValueRef samp)
3903 {
3904 LLVMBuilderRef builder = ctx->ac.builder;
3905 LLVMValueRef img7, samp0;
3906
3907 if (ctx->ac.chip_class >= GFX8)
3908 return samp;
3909
3910 img7 = LLVMBuildExtractElement(builder, res,
3911 LLVMConstInt(ctx->ac.i32, 7, 0), "");
3912 samp0 = LLVMBuildExtractElement(builder, samp,
3913 LLVMConstInt(ctx->ac.i32, 0, 0), "");
3914 samp0 = LLVMBuildAnd(builder, samp0, img7, "");
3915 return LLVMBuildInsertElement(builder, samp, samp0,
3916 LLVMConstInt(ctx->ac.i32, 0, 0), "");
3917 }
3918
3919 static void tex_fetch_ptrs(struct ac_nir_context *ctx,
3920 nir_tex_instr *instr,
3921 LLVMValueRef *res_ptr, LLVMValueRef *samp_ptr,
3922 LLVMValueRef *fmask_ptr)
3923 {
3924 nir_deref_instr *texture_deref_instr = NULL;
3925 nir_deref_instr *sampler_deref_instr = NULL;
3926 int plane = -1;
3927
3928 for (unsigned i = 0; i < instr->num_srcs; i++) {
3929 switch (instr->src[i].src_type) {
3930 case nir_tex_src_texture_deref:
3931 texture_deref_instr = nir_src_as_deref(instr->src[i].src);
3932 break;
3933 case nir_tex_src_sampler_deref:
3934 sampler_deref_instr = nir_src_as_deref(instr->src[i].src);
3935 break;
3936 case nir_tex_src_plane:
3937 plane = nir_src_as_int(instr->src[i].src);
3938 break;
3939 default:
3940 break;
3941 }
3942 }
3943
3944 if (!sampler_deref_instr)
3945 sampler_deref_instr = texture_deref_instr;
3946
3947 enum ac_descriptor_type main_descriptor = instr->sampler_dim == GLSL_SAMPLER_DIM_BUF ? AC_DESC_BUFFER : AC_DESC_IMAGE;
3948
3949 if (plane >= 0) {
3950 assert(instr->op != nir_texop_txf_ms &&
3951 instr->op != nir_texop_samples_identical);
3952 assert(instr->sampler_dim != GLSL_SAMPLER_DIM_BUF);
3953
3954 main_descriptor = AC_DESC_PLANE_0 + plane;
3955 }
3956
3957 *res_ptr = get_sampler_desc(ctx, texture_deref_instr, main_descriptor, &instr->instr, false, false);
3958
3959 if (samp_ptr) {
3960 *samp_ptr = get_sampler_desc(ctx, sampler_deref_instr, AC_DESC_SAMPLER, &instr->instr, false, false);
3961 if (instr->sampler_dim < GLSL_SAMPLER_DIM_RECT)
3962 *samp_ptr = sici_fix_sampler_aniso(ctx, *res_ptr, *samp_ptr);
3963 }
3964 if (fmask_ptr && (instr->op == nir_texop_txf_ms ||
3965 instr->op == nir_texop_samples_identical))
3966 *fmask_ptr = get_sampler_desc(ctx, texture_deref_instr, AC_DESC_FMASK, &instr->instr, false, false);
3967 }
3968
3969 static LLVMValueRef apply_round_slice(struct ac_llvm_context *ctx,
3970 LLVMValueRef coord)
3971 {
3972 coord = ac_to_float(ctx, coord);
3973 coord = ac_build_round(ctx, coord);
3974 coord = ac_to_integer(ctx, coord);
3975 return coord;
3976 }
3977
3978 static void visit_tex(struct ac_nir_context *ctx, nir_tex_instr *instr)
3979 {
3980 LLVMValueRef result = NULL;
3981 struct ac_image_args args = { 0 };
3982 LLVMValueRef fmask_ptr = NULL, sample_index = NULL;
3983 LLVMValueRef ddx = NULL, ddy = NULL;
3984 unsigned offset_src = 0;
3985
3986 tex_fetch_ptrs(ctx, instr, &args.resource, &args.sampler, &fmask_ptr);
3987
3988 for (unsigned i = 0; i < instr->num_srcs; i++) {
3989 switch (instr->src[i].src_type) {
3990 case nir_tex_src_coord: {
3991 LLVMValueRef coord = get_src(ctx, instr->src[i].src);
3992 for (unsigned chan = 0; chan < instr->coord_components; ++chan)
3993 args.coords[chan] = ac_llvm_extract_elem(&ctx->ac, coord, chan);
3994 break;
3995 }
3996 case nir_tex_src_projector:
3997 break;
3998 case nir_tex_src_comparator:
3999 if (instr->is_shadow)
4000 args.compare = get_src(ctx, instr->src[i].src);
4001 break;
4002 case nir_tex_src_offset:
4003 args.offset = get_src(ctx, instr->src[i].src);
4004 offset_src = i;
4005 break;
4006 case nir_tex_src_bias:
4007 if (instr->op == nir_texop_txb)
4008 args.bias = get_src(ctx, instr->src[i].src);
4009 break;
4010 case nir_tex_src_lod: {
4011 if (nir_src_is_const(instr->src[i].src) && nir_src_as_uint(instr->src[i].src) == 0)
4012 args.level_zero = true;
4013 else
4014 args.lod = get_src(ctx, instr->src[i].src);
4015 break;
4016 }
4017 case nir_tex_src_ms_index:
4018 sample_index = get_src(ctx, instr->src[i].src);
4019 break;
4020 case nir_tex_src_ms_mcs:
4021 break;
4022 case nir_tex_src_ddx:
4023 ddx = get_src(ctx, instr->src[i].src);
4024 break;
4025 case nir_tex_src_ddy:
4026 ddy = get_src(ctx, instr->src[i].src);
4027 break;
4028 case nir_tex_src_texture_offset:
4029 case nir_tex_src_sampler_offset:
4030 case nir_tex_src_plane:
4031 default:
4032 break;
4033 }
4034 }
4035
4036 if (instr->op == nir_texop_txs && instr->sampler_dim == GLSL_SAMPLER_DIM_BUF) {
4037 result = get_buffer_size(ctx, args.resource, true);
4038 goto write_result;
4039 }
4040
4041 if (instr->op == nir_texop_texture_samples) {
4042 LLVMValueRef res, samples, is_msaa;
4043 res = LLVMBuildBitCast(ctx->ac.builder, args.resource, ctx->ac.v8i32, "");
4044 samples = LLVMBuildExtractElement(ctx->ac.builder, res,
4045 LLVMConstInt(ctx->ac.i32, 3, false), "");
4046 is_msaa = LLVMBuildLShr(ctx->ac.builder, samples,
4047 LLVMConstInt(ctx->ac.i32, 28, false), "");
4048 is_msaa = LLVMBuildAnd(ctx->ac.builder, is_msaa,
4049 LLVMConstInt(ctx->ac.i32, 0xe, false), "");
4050 is_msaa = LLVMBuildICmp(ctx->ac.builder, LLVMIntEQ, is_msaa,
4051 LLVMConstInt(ctx->ac.i32, 0xe, false), "");
4052
4053 samples = LLVMBuildLShr(ctx->ac.builder, samples,
4054 LLVMConstInt(ctx->ac.i32, 16, false), "");
4055 samples = LLVMBuildAnd(ctx->ac.builder, samples,
4056 LLVMConstInt(ctx->ac.i32, 0xf, false), "");
4057 samples = LLVMBuildShl(ctx->ac.builder, ctx->ac.i32_1,
4058 samples, "");
4059 samples = LLVMBuildSelect(ctx->ac.builder, is_msaa, samples,
4060 ctx->ac.i32_1, "");
4061 result = samples;
4062 goto write_result;
4063 }
4064
4065 if (args.offset && instr->op != nir_texop_txf && instr->op != nir_texop_txf_ms) {
4066 LLVMValueRef offset[3], pack;
4067 for (unsigned chan = 0; chan < 3; ++chan)
4068 offset[chan] = ctx->ac.i32_0;
4069
4070 unsigned num_components = ac_get_llvm_num_components(args.offset);
4071 for (unsigned chan = 0; chan < num_components; chan++) {
4072 offset[chan] = ac_llvm_extract_elem(&ctx->ac, args.offset, chan);
4073 offset[chan] = LLVMBuildAnd(ctx->ac.builder, offset[chan],
4074 LLVMConstInt(ctx->ac.i32, 0x3f, false), "");
4075 if (chan)
4076 offset[chan] = LLVMBuildShl(ctx->ac.builder, offset[chan],
4077 LLVMConstInt(ctx->ac.i32, chan * 8, false), "");
4078 }
4079 pack = LLVMBuildOr(ctx->ac.builder, offset[0], offset[1], "");
4080 pack = LLVMBuildOr(ctx->ac.builder, pack, offset[2], "");
4081 args.offset = pack;
4082 }
4083
4084 /* TC-compatible HTILE on radeonsi promotes Z16 and Z24 to Z32_FLOAT,
4085 * so the depth comparison value isn't clamped for Z16 and
4086 * Z24 anymore. Do it manually here for GFX8-9; GFX10 has an explicitly
4087 * clamped 32-bit float format.
4088 *
4089 * It's unnecessary if the original texture format was
4090 * Z32_FLOAT, but we don't know that here.
4091 */
4092 if (args.compare &&
4093 ctx->ac.chip_class >= GFX8 &&
4094 ctx->ac.chip_class <= GFX9 &&
4095 ctx->abi->clamp_shadow_reference)
4096 args.compare = ac_build_clamp(&ctx->ac, ac_to_float(&ctx->ac, args.compare));
4097
4098 /* pack derivatives */
4099 if (ddx || ddy) {
4100 int num_src_deriv_channels, num_dest_deriv_channels;
4101 switch (instr->sampler_dim) {
4102 case GLSL_SAMPLER_DIM_3D:
4103 case GLSL_SAMPLER_DIM_CUBE:
4104 num_src_deriv_channels = 3;
4105 num_dest_deriv_channels = 3;
4106 break;
4107 case GLSL_SAMPLER_DIM_2D:
4108 default:
4109 num_src_deriv_channels = 2;
4110 num_dest_deriv_channels = 2;
4111 break;
4112 case GLSL_SAMPLER_DIM_1D:
4113 num_src_deriv_channels = 1;
4114 if (ctx->ac.chip_class == GFX9) {
4115 num_dest_deriv_channels = 2;
4116 } else {
4117 num_dest_deriv_channels = 1;
4118 }
4119 break;
4120 }
4121
4122 for (unsigned i = 0; i < num_src_deriv_channels; i++) {
4123 args.derivs[i] = ac_to_float(&ctx->ac,
4124 ac_llvm_extract_elem(&ctx->ac, ddx, i));
4125 args.derivs[num_dest_deriv_channels + i] = ac_to_float(&ctx->ac,
4126 ac_llvm_extract_elem(&ctx->ac, ddy, i));
4127 }
4128 for (unsigned i = num_src_deriv_channels; i < num_dest_deriv_channels; i++) {
4129 args.derivs[i] = ctx->ac.f32_0;
4130 args.derivs[num_dest_deriv_channels + i] = ctx->ac.f32_0;
4131 }
4132 }
4133
4134 if (instr->sampler_dim == GLSL_SAMPLER_DIM_CUBE && args.coords[0]) {
4135 for (unsigned chan = 0; chan < instr->coord_components; chan++)
4136 args.coords[chan] = ac_to_float(&ctx->ac, args.coords[chan]);
4137 if (instr->coord_components == 3)
4138 args.coords[3] = LLVMGetUndef(ctx->ac.f32);
4139 ac_prepare_cube_coords(&ctx->ac,
4140 instr->op == nir_texop_txd, instr->is_array,
4141 instr->op == nir_texop_lod, args.coords, args.derivs);
4142 }
4143
4144 /* Texture coordinates fixups */
4145 if (instr->coord_components > 1 &&
4146 instr->sampler_dim == GLSL_SAMPLER_DIM_1D &&
4147 instr->is_array &&
4148 instr->op != nir_texop_txf) {
4149 args.coords[1] = apply_round_slice(&ctx->ac, args.coords[1]);
4150 }
4151
4152 if (instr->coord_components > 2 &&
4153 (instr->sampler_dim == GLSL_SAMPLER_DIM_2D ||
4154 instr->sampler_dim == GLSL_SAMPLER_DIM_MS ||
4155 instr->sampler_dim == GLSL_SAMPLER_DIM_SUBPASS ||
4156 instr->sampler_dim == GLSL_SAMPLER_DIM_SUBPASS_MS) &&
4157 instr->is_array &&
4158 instr->op != nir_texop_txf && instr->op != nir_texop_txf_ms) {
4159 args.coords[2] = apply_round_slice(&ctx->ac, args.coords[2]);
4160 }
4161
4162 if (ctx->ac.chip_class == GFX9 &&
4163 instr->sampler_dim == GLSL_SAMPLER_DIM_1D &&
4164 instr->op != nir_texop_lod) {
4165 LLVMValueRef filler;
4166 if (instr->op == nir_texop_txf)
4167 filler = ctx->ac.i32_0;
4168 else
4169 filler = LLVMConstReal(ctx->ac.f32, 0.5);
4170
4171 if (instr->is_array)
4172 args.coords[2] = args.coords[1];
4173 args.coords[1] = filler;
4174 }
4175
4176 /* Pack sample index */
4177 if (instr->op == nir_texop_txf_ms && sample_index)
4178 args.coords[instr->coord_components] = sample_index;
4179
4180 if (instr->op == nir_texop_samples_identical) {
4181 struct ac_image_args txf_args = { 0 };
4182 memcpy(txf_args.coords, args.coords, sizeof(txf_args.coords));
4183
4184 txf_args.dmask = 0xf;
4185 txf_args.resource = fmask_ptr;
4186 txf_args.dim = instr->is_array ? ac_image_2darray : ac_image_2d;
4187 result = build_tex_intrinsic(ctx, instr, &txf_args);
4188
4189 result = LLVMBuildExtractElement(ctx->ac.builder, result, ctx->ac.i32_0, "");
4190 result = emit_int_cmp(&ctx->ac, LLVMIntEQ, result, ctx->ac.i32_0);
4191 goto write_result;
4192 }
4193
4194 if ((instr->sampler_dim == GLSL_SAMPLER_DIM_SUBPASS_MS ||
4195 instr->sampler_dim == GLSL_SAMPLER_DIM_MS) &&
4196 instr->op != nir_texop_txs) {
4197 unsigned sample_chan = instr->is_array ? 3 : 2;
4198 args.coords[sample_chan] = adjust_sample_index_using_fmask(
4199 &ctx->ac, args.coords[0], args.coords[1],
4200 instr->is_array ? args.coords[2] : NULL,
4201 args.coords[sample_chan], fmask_ptr);
4202 }
4203
4204 if (args.offset && (instr->op == nir_texop_txf || instr->op == nir_texop_txf_ms)) {
4205 int num_offsets = instr->src[offset_src].src.ssa->num_components;
4206 num_offsets = MIN2(num_offsets, instr->coord_components);
4207 for (unsigned i = 0; i < num_offsets; ++i) {
4208 args.coords[i] = LLVMBuildAdd(
4209 ctx->ac.builder, args.coords[i],
4210 LLVMConstInt(ctx->ac.i32, nir_src_comp_as_uint(instr->src[offset_src].src, i), false), "");
4211 }
4212 args.offset = NULL;
4213 }
4214
4215 /* DMASK was repurposed for GATHER4. 4 components are always
4216 * returned and DMASK works like a swizzle - it selects
4217 * the component to fetch. The only valid DMASK values are
4218 * 1=red, 2=green, 4=blue, 8=alpha. (e.g. 1 returns
4219 * (red,red,red,red) etc.) The ISA document doesn't mention
4220 * this.
4221 */
4222 args.dmask = 0xf;
4223 if (instr->op == nir_texop_tg4) {
4224 if (instr->is_shadow)
4225 args.dmask = 1;
4226 else
4227 args.dmask = 1 << instr->component;
4228 }
4229
4230 if (instr->sampler_dim != GLSL_SAMPLER_DIM_BUF)
4231 args.dim = get_ac_sampler_dim(&ctx->ac, instr->sampler_dim, instr->is_array);
4232 result = build_tex_intrinsic(ctx, instr, &args);
4233
4234 if (instr->op == nir_texop_query_levels)
4235 result = LLVMBuildExtractElement(ctx->ac.builder, result, LLVMConstInt(ctx->ac.i32, 3, false), "");
4236 else if (instr->is_shadow && instr->is_new_style_shadow &&
4237 instr->op != nir_texop_txs && instr->op != nir_texop_lod &&
4238 instr->op != nir_texop_tg4)
4239 result = LLVMBuildExtractElement(ctx->ac.builder, result, ctx->ac.i32_0, "");
4240 else if (instr->op == nir_texop_txs &&
4241 instr->sampler_dim == GLSL_SAMPLER_DIM_CUBE &&
4242 instr->is_array) {
4243 LLVMValueRef two = LLVMConstInt(ctx->ac.i32, 2, false);
4244 LLVMValueRef six = LLVMConstInt(ctx->ac.i32, 6, false);
4245 LLVMValueRef z = LLVMBuildExtractElement(ctx->ac.builder, result, two, "");
4246 z = LLVMBuildSDiv(ctx->ac.builder, z, six, "");
4247 result = LLVMBuildInsertElement(ctx->ac.builder, result, z, two, "");
4248 } else if (ctx->ac.chip_class == GFX9 &&
4249 instr->op == nir_texop_txs &&
4250 instr->sampler_dim == GLSL_SAMPLER_DIM_1D &&
4251 instr->is_array) {
4252 LLVMValueRef two = LLVMConstInt(ctx->ac.i32, 2, false);
4253 LLVMValueRef layers = LLVMBuildExtractElement(ctx->ac.builder, result, two, "");
4254 result = LLVMBuildInsertElement(ctx->ac.builder, result, layers,
4255 ctx->ac.i32_1, "");
4256 } else if (instr->dest.ssa.num_components != 4)
4257 result = ac_trim_vector(&ctx->ac, result, instr->dest.ssa.num_components);
4258
4259 write_result:
4260 if (result) {
4261 assert(instr->dest.is_ssa);
4262 result = ac_to_integer(&ctx->ac, result);
4263 ctx->ssa_defs[instr->dest.ssa.index] = result;
4264 }
4265 }
4266
4267
4268 static void visit_phi(struct ac_nir_context *ctx, nir_phi_instr *instr)
4269 {
4270 LLVMTypeRef type = get_def_type(ctx, &instr->dest.ssa);
4271 LLVMValueRef result = LLVMBuildPhi(ctx->ac.builder, type, "");
4272
4273 ctx->ssa_defs[instr->dest.ssa.index] = result;
4274 _mesa_hash_table_insert(ctx->phis, instr, result);
4275 }
4276
4277 static void visit_post_phi(struct ac_nir_context *ctx,
4278 nir_phi_instr *instr,
4279 LLVMValueRef llvm_phi)
4280 {
4281 nir_foreach_phi_src(src, instr) {
4282 LLVMBasicBlockRef block = get_block(ctx, src->pred);
4283 LLVMValueRef llvm_src = get_src(ctx, src->src);
4284
4285 LLVMAddIncoming(llvm_phi, &llvm_src, &block, 1);
4286 }
4287 }
4288
4289 static void phi_post_pass(struct ac_nir_context *ctx)
4290 {
4291 hash_table_foreach(ctx->phis, entry) {
4292 visit_post_phi(ctx, (nir_phi_instr*)entry->key,
4293 (LLVMValueRef)entry->data);
4294 }
4295 }
4296
4297
4298 static void visit_ssa_undef(struct ac_nir_context *ctx,
4299 const nir_ssa_undef_instr *instr)
4300 {
4301 unsigned num_components = instr->def.num_components;
4302 LLVMTypeRef type = LLVMIntTypeInContext(ctx->ac.context, instr->def.bit_size);
4303 LLVMValueRef undef;
4304
4305 if (num_components == 1)
4306 undef = LLVMGetUndef(type);
4307 else {
4308 undef = LLVMGetUndef(LLVMVectorType(type, num_components));
4309 }
4310 ctx->ssa_defs[instr->def.index] = undef;
4311 }
4312
4313 static void visit_jump(struct ac_llvm_context *ctx,
4314 const nir_jump_instr *instr)
4315 {
4316 switch (instr->type) {
4317 case nir_jump_break:
4318 ac_build_break(ctx);
4319 break;
4320 case nir_jump_continue:
4321 ac_build_continue(ctx);
4322 break;
4323 default:
4324 fprintf(stderr, "Unknown NIR jump instr: ");
4325 nir_print_instr(&instr->instr, stderr);
4326 fprintf(stderr, "\n");
4327 abort();
4328 }
4329 }
4330
4331 static LLVMTypeRef
4332 glsl_base_to_llvm_type(struct ac_llvm_context *ac,
4333 enum glsl_base_type type)
4334 {
4335 switch (type) {
4336 case GLSL_TYPE_INT:
4337 case GLSL_TYPE_UINT:
4338 case GLSL_TYPE_BOOL:
4339 case GLSL_TYPE_SUBROUTINE:
4340 return ac->i32;
4341 case GLSL_TYPE_INT8:
4342 case GLSL_TYPE_UINT8:
4343 return ac->i8;
4344 case GLSL_TYPE_INT16:
4345 case GLSL_TYPE_UINT16:
4346 return ac->i16;
4347 case GLSL_TYPE_FLOAT:
4348 return ac->f32;
4349 case GLSL_TYPE_FLOAT16:
4350 return ac->f16;
4351 case GLSL_TYPE_INT64:
4352 case GLSL_TYPE_UINT64:
4353 return ac->i64;
4354 case GLSL_TYPE_DOUBLE:
4355 return ac->f64;
4356 default:
4357 unreachable("unknown GLSL type");
4358 }
4359 }
4360
4361 static LLVMTypeRef
4362 glsl_to_llvm_type(struct ac_llvm_context *ac,
4363 const struct glsl_type *type)
4364 {
4365 if (glsl_type_is_scalar(type)) {
4366 return glsl_base_to_llvm_type(ac, glsl_get_base_type(type));
4367 }
4368
4369 if (glsl_type_is_vector(type)) {
4370 return LLVMVectorType(
4371 glsl_base_to_llvm_type(ac, glsl_get_base_type(type)),
4372 glsl_get_vector_elements(type));
4373 }
4374
4375 if (glsl_type_is_matrix(type)) {
4376 return LLVMArrayType(
4377 glsl_to_llvm_type(ac, glsl_get_column_type(type)),
4378 glsl_get_matrix_columns(type));
4379 }
4380
4381 if (glsl_type_is_array(type)) {
4382 return LLVMArrayType(
4383 glsl_to_llvm_type(ac, glsl_get_array_element(type)),
4384 glsl_get_length(type));
4385 }
4386
4387 assert(glsl_type_is_struct_or_ifc(type));
4388
4389 LLVMTypeRef member_types[glsl_get_length(type)];
4390
4391 for (unsigned i = 0; i < glsl_get_length(type); i++) {
4392 member_types[i] =
4393 glsl_to_llvm_type(ac,
4394 glsl_get_struct_field(type, i));
4395 }
4396
4397 return LLVMStructTypeInContext(ac->context, member_types,
4398 glsl_get_length(type), false);
4399 }
4400
4401 static void visit_deref(struct ac_nir_context *ctx,
4402 nir_deref_instr *instr)
4403 {
4404 if (instr->mode != nir_var_mem_shared &&
4405 instr->mode != nir_var_mem_global)
4406 return;
4407
4408 LLVMValueRef result = NULL;
4409 switch(instr->deref_type) {
4410 case nir_deref_type_var: {
4411 struct hash_entry *entry = _mesa_hash_table_search(ctx->vars, instr->var);
4412 result = entry->data;
4413 break;
4414 }
4415 case nir_deref_type_struct:
4416 if (instr->mode == nir_var_mem_global) {
4417 nir_deref_instr *parent = nir_deref_instr_parent(instr);
4418 uint64_t offset = glsl_get_struct_field_offset(parent->type,
4419 instr->strct.index);
4420 result = ac_build_gep_ptr(&ctx->ac, get_src(ctx, instr->parent),
4421 LLVMConstInt(ctx->ac.i32, offset, 0));
4422 } else {
4423 result = ac_build_gep0(&ctx->ac, get_src(ctx, instr->parent),
4424 LLVMConstInt(ctx->ac.i32, instr->strct.index, 0));
4425 }
4426 break;
4427 case nir_deref_type_array:
4428 if (instr->mode == nir_var_mem_global) {
4429 nir_deref_instr *parent = nir_deref_instr_parent(instr);
4430 unsigned stride = glsl_get_explicit_stride(parent->type);
4431
4432 if ((glsl_type_is_matrix(parent->type) &&
4433 glsl_matrix_type_is_row_major(parent->type)) ||
4434 (glsl_type_is_vector(parent->type) && stride == 0))
4435 stride = type_scalar_size_bytes(parent->type);
4436
4437 assert(stride > 0);
4438 LLVMValueRef index = get_src(ctx, instr->arr.index);
4439 if (LLVMTypeOf(index) != ctx->ac.i64)
4440 index = LLVMBuildZExt(ctx->ac.builder, index, ctx->ac.i64, "");
4441
4442 LLVMValueRef offset = LLVMBuildMul(ctx->ac.builder, index, LLVMConstInt(ctx->ac.i64, stride, 0), "");
4443
4444 result = ac_build_gep_ptr(&ctx->ac, get_src(ctx, instr->parent), offset);
4445 } else {
4446 result = ac_build_gep0(&ctx->ac, get_src(ctx, instr->parent),
4447 get_src(ctx, instr->arr.index));
4448 }
4449 break;
4450 case nir_deref_type_ptr_as_array:
4451 if (instr->mode == nir_var_mem_global) {
4452 unsigned stride = nir_deref_instr_ptr_as_array_stride(instr);
4453
4454 LLVMValueRef index = get_src(ctx, instr->arr.index);
4455 if (LLVMTypeOf(index) != ctx->ac.i64)
4456 index = LLVMBuildZExt(ctx->ac.builder, index, ctx->ac.i64, "");
4457
4458 LLVMValueRef offset = LLVMBuildMul(ctx->ac.builder, index, LLVMConstInt(ctx->ac.i64, stride, 0), "");
4459
4460 result = ac_build_gep_ptr(&ctx->ac, get_src(ctx, instr->parent), offset);
4461 } else {
4462 result = ac_build_gep_ptr(&ctx->ac, get_src(ctx, instr->parent),
4463 get_src(ctx, instr->arr.index));
4464 }
4465 break;
4466 case nir_deref_type_cast: {
4467 result = get_src(ctx, instr->parent);
4468
4469 /* We can't use the structs from LLVM because the shader
4470 * specifies its own offsets. */
4471 LLVMTypeRef pointee_type = ctx->ac.i8;
4472 if (instr->mode == nir_var_mem_shared)
4473 pointee_type = glsl_to_llvm_type(&ctx->ac, instr->type);
4474
4475 unsigned address_space;
4476
4477 switch(instr->mode) {
4478 case nir_var_mem_shared:
4479 address_space = AC_ADDR_SPACE_LDS;
4480 break;
4481 case nir_var_mem_global:
4482 address_space = AC_ADDR_SPACE_GLOBAL;
4483 break;
4484 default:
4485 unreachable("Unhandled address space");
4486 }
4487
4488 LLVMTypeRef type = LLVMPointerType(pointee_type, address_space);
4489
4490 if (LLVMTypeOf(result) != type) {
4491 if (LLVMGetTypeKind(LLVMTypeOf(result)) == LLVMVectorTypeKind) {
4492 result = LLVMBuildBitCast(ctx->ac.builder, result,
4493 type, "");
4494 } else {
4495 result = LLVMBuildIntToPtr(ctx->ac.builder, result,
4496 type, "");
4497 }
4498 }
4499 break;
4500 }
4501 default:
4502 unreachable("Unhandled deref_instr deref type");
4503 }
4504
4505 ctx->ssa_defs[instr->dest.ssa.index] = result;
4506 }
4507
4508 static void visit_cf_list(struct ac_nir_context *ctx,
4509 struct exec_list *list);
4510
4511 static void visit_block(struct ac_nir_context *ctx, nir_block *block)
4512 {
4513 nir_foreach_instr(instr, block)
4514 {
4515 switch (instr->type) {
4516 case nir_instr_type_alu:
4517 visit_alu(ctx, nir_instr_as_alu(instr));
4518 break;
4519 case nir_instr_type_load_const:
4520 visit_load_const(ctx, nir_instr_as_load_const(instr));
4521 break;
4522 case nir_instr_type_intrinsic:
4523 visit_intrinsic(ctx, nir_instr_as_intrinsic(instr));
4524 break;
4525 case nir_instr_type_tex:
4526 visit_tex(ctx, nir_instr_as_tex(instr));
4527 break;
4528 case nir_instr_type_phi:
4529 visit_phi(ctx, nir_instr_as_phi(instr));
4530 break;
4531 case nir_instr_type_ssa_undef:
4532 visit_ssa_undef(ctx, nir_instr_as_ssa_undef(instr));
4533 break;
4534 case nir_instr_type_jump:
4535 visit_jump(&ctx->ac, nir_instr_as_jump(instr));
4536 break;
4537 case nir_instr_type_deref:
4538 visit_deref(ctx, nir_instr_as_deref(instr));
4539 break;
4540 default:
4541 fprintf(stderr, "Unknown NIR instr type: ");
4542 nir_print_instr(instr, stderr);
4543 fprintf(stderr, "\n");
4544 abort();
4545 }
4546 }
4547
4548 _mesa_hash_table_insert(ctx->defs, block,
4549 LLVMGetInsertBlock(ctx->ac.builder));
4550 }
4551
4552 static void visit_if(struct ac_nir_context *ctx, nir_if *if_stmt)
4553 {
4554 LLVMValueRef value = get_src(ctx, if_stmt->condition);
4555
4556 nir_block *then_block =
4557 (nir_block *) exec_list_get_head(&if_stmt->then_list);
4558
4559 ac_build_uif(&ctx->ac, value, then_block->index);
4560
4561 visit_cf_list(ctx, &if_stmt->then_list);
4562
4563 if (!exec_list_is_empty(&if_stmt->else_list)) {
4564 nir_block *else_block =
4565 (nir_block *) exec_list_get_head(&if_stmt->else_list);
4566
4567 ac_build_else(&ctx->ac, else_block->index);
4568 visit_cf_list(ctx, &if_stmt->else_list);
4569 }
4570
4571 ac_build_endif(&ctx->ac, then_block->index);
4572 }
4573
4574 static void visit_loop(struct ac_nir_context *ctx, nir_loop *loop)
4575 {
4576 nir_block *first_loop_block =
4577 (nir_block *) exec_list_get_head(&loop->body);
4578
4579 ac_build_bgnloop(&ctx->ac, first_loop_block->index);
4580
4581 visit_cf_list(ctx, &loop->body);
4582
4583 ac_build_endloop(&ctx->ac, first_loop_block->index);
4584 }
4585
4586 static void visit_cf_list(struct ac_nir_context *ctx,
4587 struct exec_list *list)
4588 {
4589 foreach_list_typed(nir_cf_node, node, node, list)
4590 {
4591 switch (node->type) {
4592 case nir_cf_node_block:
4593 visit_block(ctx, nir_cf_node_as_block(node));
4594 break;
4595
4596 case nir_cf_node_if:
4597 visit_if(ctx, nir_cf_node_as_if(node));
4598 break;
4599
4600 case nir_cf_node_loop:
4601 visit_loop(ctx, nir_cf_node_as_loop(node));
4602 break;
4603
4604 default:
4605 assert(0);
4606 }
4607 }
4608 }
4609
4610 void
4611 ac_handle_shader_output_decl(struct ac_llvm_context *ctx,
4612 struct ac_shader_abi *abi,
4613 struct nir_shader *nir,
4614 struct nir_variable *variable,
4615 gl_shader_stage stage)
4616 {
4617 unsigned output_loc = variable->data.driver_location / 4;
4618 unsigned attrib_count = glsl_count_attribute_slots(variable->type, false);
4619
4620 /* tess ctrl has it's own load/store paths for outputs */
4621 if (stage == MESA_SHADER_TESS_CTRL)
4622 return;
4623
4624 if (stage == MESA_SHADER_VERTEX ||
4625 stage == MESA_SHADER_TESS_EVAL ||
4626 stage == MESA_SHADER_GEOMETRY) {
4627 int idx = variable->data.location + variable->data.index;
4628 if (idx == VARYING_SLOT_CLIP_DIST0) {
4629 int length = nir->info.clip_distance_array_size +
4630 nir->info.cull_distance_array_size;
4631
4632 if (length > 4)
4633 attrib_count = 2;
4634 else
4635 attrib_count = 1;
4636 }
4637 }
4638
4639 bool is_16bit = glsl_type_is_16bit(glsl_without_array(variable->type));
4640 LLVMTypeRef type = is_16bit ? ctx->f16 : ctx->f32;
4641 for (unsigned i = 0; i < attrib_count; ++i) {
4642 for (unsigned chan = 0; chan < 4; chan++) {
4643 abi->outputs[ac_llvm_reg_index_soa(output_loc + i, chan)] =
4644 ac_build_alloca_undef(ctx, type, "");
4645 }
4646 }
4647 }
4648
4649 static void
4650 setup_locals(struct ac_nir_context *ctx,
4651 struct nir_function *func)
4652 {
4653 int i, j;
4654 ctx->num_locals = 0;
4655 nir_foreach_variable(variable, &func->impl->locals) {
4656 unsigned attrib_count = glsl_count_attribute_slots(variable->type, false);
4657 variable->data.driver_location = ctx->num_locals * 4;
4658 variable->data.location_frac = 0;
4659 ctx->num_locals += attrib_count;
4660 }
4661 ctx->locals = malloc(4 * ctx->num_locals * sizeof(LLVMValueRef));
4662 if (!ctx->locals)
4663 return;
4664
4665 for (i = 0; i < ctx->num_locals; i++) {
4666 for (j = 0; j < 4; j++) {
4667 ctx->locals[i * 4 + j] =
4668 ac_build_alloca_undef(&ctx->ac, ctx->ac.f32, "temp");
4669 }
4670 }
4671 }
4672
4673 static void
4674 setup_scratch(struct ac_nir_context *ctx,
4675 struct nir_shader *shader)
4676 {
4677 if (shader->scratch_size == 0)
4678 return;
4679
4680 ctx->scratch = ac_build_alloca_undef(&ctx->ac,
4681 LLVMArrayType(ctx->ac.i8, shader->scratch_size),
4682 "scratch");
4683 }
4684
4685 static void
4686 setup_shared(struct ac_nir_context *ctx,
4687 struct nir_shader *nir)
4688 {
4689 nir_foreach_variable(variable, &nir->shared) {
4690 LLVMValueRef shared =
4691 LLVMAddGlobalInAddressSpace(
4692 ctx->ac.module, glsl_to_llvm_type(&ctx->ac, variable->type),
4693 variable->name ? variable->name : "",
4694 AC_ADDR_SPACE_LDS);
4695 _mesa_hash_table_insert(ctx->vars, variable, shared);
4696 }
4697 }
4698
4699 void ac_nir_translate(struct ac_llvm_context *ac, struct ac_shader_abi *abi,
4700 struct nir_shader *nir)
4701 {
4702 struct ac_nir_context ctx = {};
4703 struct nir_function *func;
4704
4705 ctx.ac = *ac;
4706 ctx.abi = abi;
4707
4708 ctx.stage = nir->info.stage;
4709 ctx.info = &nir->info;
4710
4711 ctx.main_function = LLVMGetBasicBlockParent(LLVMGetInsertBlock(ctx.ac.builder));
4712
4713 nir_foreach_variable(variable, &nir->outputs)
4714 ac_handle_shader_output_decl(&ctx.ac, ctx.abi, nir, variable,
4715 ctx.stage);
4716
4717 ctx.defs = _mesa_hash_table_create(NULL, _mesa_hash_pointer,
4718 _mesa_key_pointer_equal);
4719 ctx.phis = _mesa_hash_table_create(NULL, _mesa_hash_pointer,
4720 _mesa_key_pointer_equal);
4721 ctx.vars = _mesa_hash_table_create(NULL, _mesa_hash_pointer,
4722 _mesa_key_pointer_equal);
4723
4724 func = (struct nir_function *)exec_list_get_head(&nir->functions);
4725
4726 nir_index_ssa_defs(func->impl);
4727 ctx.ssa_defs = calloc(func->impl->ssa_alloc, sizeof(LLVMValueRef));
4728
4729 setup_locals(&ctx, func);
4730 setup_scratch(&ctx, nir);
4731
4732 if (gl_shader_stage_is_compute(nir->info.stage))
4733 setup_shared(&ctx, nir);
4734
4735 visit_cf_list(&ctx, &func->impl->body);
4736 phi_post_pass(&ctx);
4737
4738 if (!gl_shader_stage_is_compute(nir->info.stage))
4739 ctx.abi->emit_outputs(ctx.abi, AC_LLVM_MAX_OUTPUTS,
4740 ctx.abi->outputs);
4741
4742 free(ctx.locals);
4743 free(ctx.ssa_defs);
4744 ralloc_free(ctx.defs);
4745 ralloc_free(ctx.phis);
4746 ralloc_free(ctx.vars);
4747 }
4748
4749 void
4750 ac_lower_indirect_derefs(struct nir_shader *nir, enum chip_class chip_class)
4751 {
4752 /* Lower large variables to scratch first so that we won't bloat the
4753 * shader by generating large if ladders for them. We later lower
4754 * scratch to alloca's, assuming LLVM won't generate VGPR indexing.
4755 */
4756 NIR_PASS_V(nir, nir_lower_vars_to_scratch,
4757 nir_var_function_temp,
4758 256,
4759 glsl_get_natural_size_align_bytes);
4760
4761 /* While it would be nice not to have this flag, we are constrained
4762 * by the reality that LLVM 9.0 has buggy VGPR indexing on GFX9.
4763 */
4764 bool llvm_has_working_vgpr_indexing = chip_class != GFX9;
4765
4766 /* TODO: Indirect indexing of GS inputs is unimplemented.
4767 *
4768 * TCS and TES load inputs directly from LDS or offchip memory, so
4769 * indirect indexing is trivial.
4770 */
4771 nir_variable_mode indirect_mask = 0;
4772 if (nir->info.stage == MESA_SHADER_GEOMETRY ||
4773 (nir->info.stage != MESA_SHADER_TESS_CTRL &&
4774 nir->info.stage != MESA_SHADER_TESS_EVAL &&
4775 !llvm_has_working_vgpr_indexing)) {
4776 indirect_mask |= nir_var_shader_in;
4777 }
4778 if (!llvm_has_working_vgpr_indexing &&
4779 nir->info.stage != MESA_SHADER_TESS_CTRL)
4780 indirect_mask |= nir_var_shader_out;
4781
4782 /* TODO: We shouldn't need to do this, however LLVM isn't currently
4783 * smart enough to handle indirects without causing excess spilling
4784 * causing the gpu to hang.
4785 *
4786 * See the following thread for more details of the problem:
4787 * https://lists.freedesktop.org/archives/mesa-dev/2017-July/162106.html
4788 */
4789 indirect_mask |= nir_var_function_temp;
4790
4791 nir_lower_indirect_derefs(nir, indirect_mask);
4792 }
4793
4794 static unsigned
4795 get_inst_tessfactor_writemask(nir_intrinsic_instr *intrin)
4796 {
4797 if (intrin->intrinsic != nir_intrinsic_store_deref)
4798 return 0;
4799
4800 nir_variable *var =
4801 nir_deref_instr_get_variable(nir_src_as_deref(intrin->src[0]));
4802
4803 if (var->data.mode != nir_var_shader_out)
4804 return 0;
4805
4806 unsigned writemask = 0;
4807 const int location = var->data.location;
4808 unsigned first_component = var->data.location_frac;
4809 unsigned num_comps = intrin->dest.ssa.num_components;
4810
4811 if (location == VARYING_SLOT_TESS_LEVEL_INNER)
4812 writemask = ((1 << (num_comps + 1)) - 1) << first_component;
4813 else if (location == VARYING_SLOT_TESS_LEVEL_OUTER)
4814 writemask = (((1 << (num_comps + 1)) - 1) << first_component) << 4;
4815
4816 return writemask;
4817 }
4818
4819 static void
4820 scan_tess_ctrl(nir_cf_node *cf_node, unsigned *upper_block_tf_writemask,
4821 unsigned *cond_block_tf_writemask,
4822 bool *tessfactors_are_def_in_all_invocs, bool is_nested_cf)
4823 {
4824 switch (cf_node->type) {
4825 case nir_cf_node_block: {
4826 nir_block *block = nir_cf_node_as_block(cf_node);
4827 nir_foreach_instr(instr, block) {
4828 if (instr->type != nir_instr_type_intrinsic)
4829 continue;
4830
4831 nir_intrinsic_instr *intrin = nir_instr_as_intrinsic(instr);
4832 if (intrin->intrinsic == nir_intrinsic_barrier) {
4833
4834 /* If we find a barrier in nested control flow put this in the
4835 * too hard basket. In GLSL this is not possible but it is in
4836 * SPIR-V.
4837 */
4838 if (is_nested_cf) {
4839 *tessfactors_are_def_in_all_invocs = false;
4840 return;
4841 }
4842
4843 /* The following case must be prevented:
4844 * gl_TessLevelInner = ...;
4845 * barrier();
4846 * if (gl_InvocationID == 1)
4847 * gl_TessLevelInner = ...;
4848 *
4849 * If you consider disjoint code segments separated by barriers, each
4850 * such segment that writes tess factor channels should write the same
4851 * channels in all codepaths within that segment.
4852 */
4853 if (upper_block_tf_writemask || cond_block_tf_writemask) {
4854 /* Accumulate the result: */
4855 *tessfactors_are_def_in_all_invocs &=
4856 !(*cond_block_tf_writemask & ~(*upper_block_tf_writemask));
4857
4858 /* Analyze the next code segment from scratch. */
4859 *upper_block_tf_writemask = 0;
4860 *cond_block_tf_writemask = 0;
4861 }
4862 } else
4863 *upper_block_tf_writemask |= get_inst_tessfactor_writemask(intrin);
4864 }
4865
4866 break;
4867 }
4868 case nir_cf_node_if: {
4869 unsigned then_tessfactor_writemask = 0;
4870 unsigned else_tessfactor_writemask = 0;
4871
4872 nir_if *if_stmt = nir_cf_node_as_if(cf_node);
4873 foreach_list_typed(nir_cf_node, nested_node, node, &if_stmt->then_list) {
4874 scan_tess_ctrl(nested_node, &then_tessfactor_writemask,
4875 cond_block_tf_writemask,
4876 tessfactors_are_def_in_all_invocs, true);
4877 }
4878
4879 foreach_list_typed(nir_cf_node, nested_node, node, &if_stmt->else_list) {
4880 scan_tess_ctrl(nested_node, &else_tessfactor_writemask,
4881 cond_block_tf_writemask,
4882 tessfactors_are_def_in_all_invocs, true);
4883 }
4884
4885 if (then_tessfactor_writemask || else_tessfactor_writemask) {
4886 /* If both statements write the same tess factor channels,
4887 * we can say that the upper block writes them too.
4888 */
4889 *upper_block_tf_writemask |= then_tessfactor_writemask &
4890 else_tessfactor_writemask;
4891 *cond_block_tf_writemask |= then_tessfactor_writemask |
4892 else_tessfactor_writemask;
4893 }
4894
4895 break;
4896 }
4897 case nir_cf_node_loop: {
4898 nir_loop *loop = nir_cf_node_as_loop(cf_node);
4899 foreach_list_typed(nir_cf_node, nested_node, node, &loop->body) {
4900 scan_tess_ctrl(nested_node, cond_block_tf_writemask,
4901 cond_block_tf_writemask,
4902 tessfactors_are_def_in_all_invocs, true);
4903 }
4904
4905 break;
4906 }
4907 default:
4908 unreachable("unknown cf node type");
4909 }
4910 }
4911
4912 bool
4913 ac_are_tessfactors_def_in_all_invocs(const struct nir_shader *nir)
4914 {
4915 assert(nir->info.stage == MESA_SHADER_TESS_CTRL);
4916
4917 /* The pass works as follows:
4918 * If all codepaths write tess factors, we can say that all
4919 * invocations define tess factors.
4920 *
4921 * Each tess factor channel is tracked separately.
4922 */
4923 unsigned main_block_tf_writemask = 0; /* if main block writes tess factors */
4924 unsigned cond_block_tf_writemask = 0; /* if cond block writes tess factors */
4925
4926 /* Initial value = true. Here the pass will accumulate results from
4927 * multiple segments surrounded by barriers. If tess factors aren't
4928 * written at all, it's a shader bug and we don't care if this will be
4929 * true.
4930 */
4931 bool tessfactors_are_def_in_all_invocs = true;
4932
4933 nir_foreach_function(function, nir) {
4934 if (function->impl) {
4935 foreach_list_typed(nir_cf_node, node, node, &function->impl->body) {
4936 scan_tess_ctrl(node, &main_block_tf_writemask,
4937 &cond_block_tf_writemask,
4938 &tessfactors_are_def_in_all_invocs,
4939 false);
4940 }
4941 }
4942 }
4943
4944 /* Accumulate the result for the last code segment separated by a
4945 * barrier.
4946 */
4947 if (main_block_tf_writemask || cond_block_tf_writemask) {
4948 tessfactors_are_def_in_all_invocs &=
4949 !(cond_block_tf_writemask & ~main_block_tf_writemask);
4950 }
4951
4952 return tessfactors_are_def_in_all_invocs;
4953 }