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c0442f2688ccff4c2233cc096126c5ad9c41b197
[mesa.git] / src / amd / common / ac_nir_to_llvm.c
1 /*
2 * Copyright © 2016 Bas Nieuwenhuizen
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
21 * IN THE SOFTWARE.
22 */
23
24 #include "ac_nir_to_llvm.h"
25 #include "ac_llvm_build.h"
26 #include "ac_llvm_util.h"
27 #include "ac_binary.h"
28 #include "sid.h"
29 #include "nir/nir.h"
30 #include "nir/nir_deref.h"
31 #include "util/bitscan.h"
32 #include "util/u_math.h"
33 #include "ac_shader_abi.h"
34 #include "ac_shader_util.h"
35
36 struct ac_nir_context {
37 struct ac_llvm_context ac;
38 struct ac_shader_abi *abi;
39
40 gl_shader_stage stage;
41 shader_info *info;
42
43 LLVMValueRef *ssa_defs;
44
45 struct hash_table *defs;
46 struct hash_table *phis;
47 struct hash_table *vars;
48
49 LLVMValueRef main_function;
50 LLVMBasicBlockRef continue_block;
51 LLVMBasicBlockRef break_block;
52
53 int num_locals;
54 LLVMValueRef *locals;
55 };
56
57 static LLVMValueRef get_sampler_desc(struct ac_nir_context *ctx,
58 nir_deref_instr *deref_instr,
59 enum ac_descriptor_type desc_type,
60 const nir_instr *instr,
61 bool image, bool write);
62
63 static void
64 build_store_values_extended(struct ac_llvm_context *ac,
65 LLVMValueRef *values,
66 unsigned value_count,
67 unsigned value_stride,
68 LLVMValueRef vec)
69 {
70 LLVMBuilderRef builder = ac->builder;
71 unsigned i;
72
73 for (i = 0; i < value_count; i++) {
74 LLVMValueRef ptr = values[i * value_stride];
75 LLVMValueRef index = LLVMConstInt(ac->i32, i, false);
76 LLVMValueRef value = LLVMBuildExtractElement(builder, vec, index, "");
77 LLVMBuildStore(builder, value, ptr);
78 }
79 }
80
81 static enum ac_image_dim
82 get_ac_sampler_dim(const struct ac_llvm_context *ctx, enum glsl_sampler_dim dim,
83 bool is_array)
84 {
85 switch (dim) {
86 case GLSL_SAMPLER_DIM_1D:
87 if (ctx->chip_class == GFX9)
88 return is_array ? ac_image_2darray : ac_image_2d;
89 return is_array ? ac_image_1darray : ac_image_1d;
90 case GLSL_SAMPLER_DIM_2D:
91 case GLSL_SAMPLER_DIM_RECT:
92 case GLSL_SAMPLER_DIM_EXTERNAL:
93 return is_array ? ac_image_2darray : ac_image_2d;
94 case GLSL_SAMPLER_DIM_3D:
95 return ac_image_3d;
96 case GLSL_SAMPLER_DIM_CUBE:
97 return ac_image_cube;
98 case GLSL_SAMPLER_DIM_MS:
99 return is_array ? ac_image_2darraymsaa : ac_image_2dmsaa;
100 case GLSL_SAMPLER_DIM_SUBPASS:
101 return ac_image_2darray;
102 case GLSL_SAMPLER_DIM_SUBPASS_MS:
103 return ac_image_2darraymsaa;
104 default:
105 unreachable("bad sampler dim");
106 }
107 }
108
109 static enum ac_image_dim
110 get_ac_image_dim(const struct ac_llvm_context *ctx, enum glsl_sampler_dim sdim,
111 bool is_array)
112 {
113 enum ac_image_dim dim = get_ac_sampler_dim(ctx, sdim, is_array);
114
115 if (dim == ac_image_cube ||
116 (ctx->chip_class <= GFX8 && dim == ac_image_3d))
117 dim = ac_image_2darray;
118
119 return dim;
120 }
121
122 static LLVMTypeRef get_def_type(struct ac_nir_context *ctx,
123 const nir_ssa_def *def)
124 {
125 LLVMTypeRef type = LLVMIntTypeInContext(ctx->ac.context, def->bit_size);
126 if (def->num_components > 1) {
127 type = LLVMVectorType(type, def->num_components);
128 }
129 return type;
130 }
131
132 static LLVMValueRef get_src(struct ac_nir_context *nir, nir_src src)
133 {
134 assert(src.is_ssa);
135 return nir->ssa_defs[src.ssa->index];
136 }
137
138 static LLVMValueRef
139 get_memory_ptr(struct ac_nir_context *ctx, nir_src src)
140 {
141 LLVMValueRef ptr = get_src(ctx, src);
142 ptr = LLVMBuildGEP(ctx->ac.builder, ctx->ac.lds, &ptr, 1, "");
143 int addr_space = LLVMGetPointerAddressSpace(LLVMTypeOf(ptr));
144
145 return LLVMBuildBitCast(ctx->ac.builder, ptr,
146 LLVMPointerType(ctx->ac.i32, addr_space), "");
147 }
148
149 static LLVMBasicBlockRef get_block(struct ac_nir_context *nir,
150 const struct nir_block *b)
151 {
152 struct hash_entry *entry = _mesa_hash_table_search(nir->defs, b);
153 return (LLVMBasicBlockRef)entry->data;
154 }
155
156 static LLVMValueRef emit_iabs(struct ac_llvm_context *ctx,
157 LLVMValueRef src0)
158 {
159 return ac_build_imax(ctx, src0, LLVMBuildNeg(ctx->builder, src0, ""));
160 }
161
162 static LLVMValueRef get_alu_src(struct ac_nir_context *ctx,
163 nir_alu_src src,
164 unsigned num_components)
165 {
166 LLVMValueRef value = get_src(ctx, src.src);
167 bool need_swizzle = false;
168
169 assert(value);
170 unsigned src_components = ac_get_llvm_num_components(value);
171 for (unsigned i = 0; i < num_components; ++i) {
172 assert(src.swizzle[i] < src_components);
173 if (src.swizzle[i] != i)
174 need_swizzle = true;
175 }
176
177 if (need_swizzle || num_components != src_components) {
178 LLVMValueRef masks[] = {
179 LLVMConstInt(ctx->ac.i32, src.swizzle[0], false),
180 LLVMConstInt(ctx->ac.i32, src.swizzle[1], false),
181 LLVMConstInt(ctx->ac.i32, src.swizzle[2], false),
182 LLVMConstInt(ctx->ac.i32, src.swizzle[3], false)};
183
184 if (src_components > 1 && num_components == 1) {
185 value = LLVMBuildExtractElement(ctx->ac.builder, value,
186 masks[0], "");
187 } else if (src_components == 1 && num_components > 1) {
188 LLVMValueRef values[] = {value, value, value, value};
189 value = ac_build_gather_values(&ctx->ac, values, num_components);
190 } else {
191 LLVMValueRef swizzle = LLVMConstVector(masks, num_components);
192 value = LLVMBuildShuffleVector(ctx->ac.builder, value, value,
193 swizzle, "");
194 }
195 }
196
197 LLVMTypeRef type = LLVMTypeOf(value);
198 if (LLVMGetTypeKind(type) == LLVMVectorTypeKind)
199 type = LLVMGetElementType(type);
200
201 if (src.abs) {
202 if (LLVMGetTypeKind(type) == LLVMIntegerTypeKind) {
203 value = emit_iabs(&ctx->ac, value);
204 } else {
205 char name[128];
206 unsigned fsize = type == ctx->ac.f16 ? 16 :
207 type == ctx->ac.f32 ? 32 : 64;
208
209 if (LLVMGetTypeKind(LLVMTypeOf(value)) == LLVMVectorTypeKind) {
210 snprintf(name, sizeof(name), "llvm.fabs.v%uf%u",
211 LLVMGetVectorSize(LLVMTypeOf(value)), fsize);
212 } else {
213 snprintf(name, sizeof(name), "llvm.fabs.f%u", fsize);
214 }
215
216 value = ac_build_intrinsic(&ctx->ac, name, LLVMTypeOf(value),
217 &value, 1, AC_FUNC_ATTR_READNONE);
218 }
219 }
220
221 if (src.negate) {
222 if (LLVMGetTypeKind(type) == LLVMIntegerTypeKind)
223 value = LLVMBuildNeg(ctx->ac.builder, value, "");
224 else
225 value = LLVMBuildFNeg(ctx->ac.builder, value, "");
226 }
227
228 return value;
229 }
230
231 static LLVMValueRef emit_int_cmp(struct ac_llvm_context *ctx,
232 LLVMIntPredicate pred, LLVMValueRef src0,
233 LLVMValueRef src1)
234 {
235 LLVMValueRef result = LLVMBuildICmp(ctx->builder, pred, src0, src1, "");
236 return LLVMBuildSelect(ctx->builder, result,
237 LLVMConstInt(ctx->i32, 0xFFFFFFFF, false),
238 ctx->i32_0, "");
239 }
240
241 static LLVMValueRef emit_float_cmp(struct ac_llvm_context *ctx,
242 LLVMRealPredicate pred, LLVMValueRef src0,
243 LLVMValueRef src1)
244 {
245 LLVMValueRef result;
246 src0 = ac_to_float(ctx, src0);
247 src1 = ac_to_float(ctx, src1);
248 result = LLVMBuildFCmp(ctx->builder, pred, src0, src1, "");
249 return LLVMBuildSelect(ctx->builder, result,
250 LLVMConstInt(ctx->i32, 0xFFFFFFFF, false),
251 ctx->i32_0, "");
252 }
253
254 static LLVMValueRef emit_intrin_1f_param(struct ac_llvm_context *ctx,
255 const char *intrin,
256 LLVMTypeRef result_type,
257 LLVMValueRef src0)
258 {
259 char name[64];
260 LLVMValueRef params[] = {
261 ac_to_float(ctx, src0),
262 };
263
264 ASSERTED const int length = snprintf(name, sizeof(name), "%s.f%d", intrin,
265 ac_get_elem_bits(ctx, result_type));
266 assert(length < sizeof(name));
267 return ac_build_intrinsic(ctx, name, result_type, params, 1, AC_FUNC_ATTR_READNONE);
268 }
269
270 static LLVMValueRef emit_intrin_2f_param(struct ac_llvm_context *ctx,
271 const char *intrin,
272 LLVMTypeRef result_type,
273 LLVMValueRef src0, LLVMValueRef src1)
274 {
275 char name[64];
276 LLVMValueRef params[] = {
277 ac_to_float(ctx, src0),
278 ac_to_float(ctx, src1),
279 };
280
281 ASSERTED const int length = snprintf(name, sizeof(name), "%s.f%d", intrin,
282 ac_get_elem_bits(ctx, result_type));
283 assert(length < sizeof(name));
284 return ac_build_intrinsic(ctx, name, result_type, params, 2, AC_FUNC_ATTR_READNONE);
285 }
286
287 static LLVMValueRef emit_intrin_3f_param(struct ac_llvm_context *ctx,
288 const char *intrin,
289 LLVMTypeRef result_type,
290 LLVMValueRef src0, LLVMValueRef src1, LLVMValueRef src2)
291 {
292 char name[64];
293 LLVMValueRef params[] = {
294 ac_to_float(ctx, src0),
295 ac_to_float(ctx, src1),
296 ac_to_float(ctx, src2),
297 };
298
299 ASSERTED const int length = snprintf(name, sizeof(name), "%s.f%d", intrin,
300 ac_get_elem_bits(ctx, result_type));
301 assert(length < sizeof(name));
302 return ac_build_intrinsic(ctx, name, result_type, params, 3, AC_FUNC_ATTR_READNONE);
303 }
304
305 static LLVMValueRef emit_bcsel(struct ac_llvm_context *ctx,
306 LLVMValueRef src0, LLVMValueRef src1, LLVMValueRef src2)
307 {
308 assert(LLVMGetTypeKind(LLVMTypeOf(src0)) != LLVMVectorTypeKind);
309
310 LLVMValueRef v = LLVMBuildICmp(ctx->builder, LLVMIntNE, src0,
311 ctx->i32_0, "");
312 return LLVMBuildSelect(ctx->builder, v,
313 ac_to_integer_or_pointer(ctx, src1),
314 ac_to_integer_or_pointer(ctx, src2), "");
315 }
316
317 static LLVMValueRef emit_uint_carry(struct ac_llvm_context *ctx,
318 const char *intrin,
319 LLVMValueRef src0, LLVMValueRef src1)
320 {
321 LLVMTypeRef ret_type;
322 LLVMTypeRef types[] = { ctx->i32, ctx->i1 };
323 LLVMValueRef res;
324 LLVMValueRef params[] = { src0, src1 };
325 ret_type = LLVMStructTypeInContext(ctx->context, types,
326 2, true);
327
328 res = ac_build_intrinsic(ctx, intrin, ret_type,
329 params, 2, AC_FUNC_ATTR_READNONE);
330
331 res = LLVMBuildExtractValue(ctx->builder, res, 1, "");
332 res = LLVMBuildZExt(ctx->builder, res, ctx->i32, "");
333 return res;
334 }
335
336 static LLVMValueRef emit_b2f(struct ac_llvm_context *ctx,
337 LLVMValueRef src0,
338 unsigned bitsize)
339 {
340 LLVMValueRef result = LLVMBuildAnd(ctx->builder, src0,
341 LLVMBuildBitCast(ctx->builder, LLVMConstReal(ctx->f32, 1.0), ctx->i32, ""),
342 "");
343 result = LLVMBuildBitCast(ctx->builder, result, ctx->f32, "");
344
345 switch (bitsize) {
346 case 16:
347 return LLVMBuildFPTrunc(ctx->builder, result, ctx->f16, "");
348 case 32:
349 return result;
350 case 64:
351 return LLVMBuildFPExt(ctx->builder, result, ctx->f64, "");
352 default:
353 unreachable("Unsupported bit size.");
354 }
355 }
356
357 static LLVMValueRef emit_f2b(struct ac_llvm_context *ctx,
358 LLVMValueRef src0)
359 {
360 src0 = ac_to_float(ctx, src0);
361 LLVMValueRef zero = LLVMConstNull(LLVMTypeOf(src0));
362 return LLVMBuildSExt(ctx->builder,
363 LLVMBuildFCmp(ctx->builder, LLVMRealUNE, src0, zero, ""),
364 ctx->i32, "");
365 }
366
367 static LLVMValueRef emit_b2i(struct ac_llvm_context *ctx,
368 LLVMValueRef src0,
369 unsigned bitsize)
370 {
371 LLVMValueRef result = LLVMBuildAnd(ctx->builder, src0, ctx->i32_1, "");
372
373 switch (bitsize) {
374 case 8:
375 return LLVMBuildTrunc(ctx->builder, result, ctx->i8, "");
376 case 16:
377 return LLVMBuildTrunc(ctx->builder, result, ctx->i16, "");
378 case 32:
379 return result;
380 case 64:
381 return LLVMBuildZExt(ctx->builder, result, ctx->i64, "");
382 default:
383 unreachable("Unsupported bit size.");
384 }
385 }
386
387 static LLVMValueRef emit_i2b(struct ac_llvm_context *ctx,
388 LLVMValueRef src0)
389 {
390 LLVMValueRef zero = LLVMConstNull(LLVMTypeOf(src0));
391 return LLVMBuildSExt(ctx->builder,
392 LLVMBuildICmp(ctx->builder, LLVMIntNE, src0, zero, ""),
393 ctx->i32, "");
394 }
395
396 static LLVMValueRef emit_f2f16(struct ac_llvm_context *ctx,
397 LLVMValueRef src0)
398 {
399 LLVMValueRef result;
400 LLVMValueRef cond = NULL;
401
402 src0 = ac_to_float(ctx, src0);
403 result = LLVMBuildFPTrunc(ctx->builder, src0, ctx->f16, "");
404
405 if (ctx->chip_class >= GFX8) {
406 LLVMValueRef args[2];
407 /* Check if the result is a denormal - and flush to 0 if so. */
408 args[0] = result;
409 args[1] = LLVMConstInt(ctx->i32, N_SUBNORMAL | P_SUBNORMAL, false);
410 cond = ac_build_intrinsic(ctx, "llvm.amdgcn.class.f16", ctx->i1, args, 2, AC_FUNC_ATTR_READNONE);
411 }
412
413 /* need to convert back up to f32 */
414 result = LLVMBuildFPExt(ctx->builder, result, ctx->f32, "");
415
416 if (ctx->chip_class >= GFX8)
417 result = LLVMBuildSelect(ctx->builder, cond, ctx->f32_0, result, "");
418 else {
419 /* for GFX6-GFX7 */
420 /* 0x38800000 is smallest half float value (2^-14) in 32-bit float,
421 * so compare the result and flush to 0 if it's smaller.
422 */
423 LLVMValueRef temp, cond2;
424 temp = emit_intrin_1f_param(ctx, "llvm.fabs", ctx->f32, result);
425 cond = LLVMBuildFCmp(ctx->builder, LLVMRealUGT,
426 LLVMBuildBitCast(ctx->builder, LLVMConstInt(ctx->i32, 0x38800000, false), ctx->f32, ""),
427 temp, "");
428 cond2 = LLVMBuildFCmp(ctx->builder, LLVMRealUNE,
429 temp, ctx->f32_0, "");
430 cond = LLVMBuildAnd(ctx->builder, cond, cond2, "");
431 result = LLVMBuildSelect(ctx->builder, cond, ctx->f32_0, result, "");
432 }
433 return result;
434 }
435
436 static LLVMValueRef emit_umul_high(struct ac_llvm_context *ctx,
437 LLVMValueRef src0, LLVMValueRef src1)
438 {
439 LLVMValueRef dst64, result;
440 src0 = LLVMBuildZExt(ctx->builder, src0, ctx->i64, "");
441 src1 = LLVMBuildZExt(ctx->builder, src1, ctx->i64, "");
442
443 dst64 = LLVMBuildMul(ctx->builder, src0, src1, "");
444 dst64 = LLVMBuildLShr(ctx->builder, dst64, LLVMConstInt(ctx->i64, 32, false), "");
445 result = LLVMBuildTrunc(ctx->builder, dst64, ctx->i32, "");
446 return result;
447 }
448
449 static LLVMValueRef emit_imul_high(struct ac_llvm_context *ctx,
450 LLVMValueRef src0, LLVMValueRef src1)
451 {
452 LLVMValueRef dst64, result;
453 src0 = LLVMBuildSExt(ctx->builder, src0, ctx->i64, "");
454 src1 = LLVMBuildSExt(ctx->builder, src1, ctx->i64, "");
455
456 dst64 = LLVMBuildMul(ctx->builder, src0, src1, "");
457 dst64 = LLVMBuildAShr(ctx->builder, dst64, LLVMConstInt(ctx->i64, 32, false), "");
458 result = LLVMBuildTrunc(ctx->builder, dst64, ctx->i32, "");
459 return result;
460 }
461
462 static LLVMValueRef emit_bfm(struct ac_llvm_context *ctx,
463 LLVMValueRef bits, LLVMValueRef offset)
464 {
465 /* mask = ((1 << bits) - 1) << offset */
466 return LLVMBuildShl(ctx->builder,
467 LLVMBuildSub(ctx->builder,
468 LLVMBuildShl(ctx->builder,
469 ctx->i32_1,
470 bits, ""),
471 ctx->i32_1, ""),
472 offset, "");
473 }
474
475 static LLVMValueRef emit_bitfield_select(struct ac_llvm_context *ctx,
476 LLVMValueRef mask, LLVMValueRef insert,
477 LLVMValueRef base)
478 {
479 /* Calculate:
480 * (mask & insert) | (~mask & base) = base ^ (mask & (insert ^ base))
481 * Use the right-hand side, which the LLVM backend can convert to V_BFI.
482 */
483 return LLVMBuildXor(ctx->builder, base,
484 LLVMBuildAnd(ctx->builder, mask,
485 LLVMBuildXor(ctx->builder, insert, base, ""), ""), "");
486 }
487
488 static LLVMValueRef emit_pack_2x16(struct ac_llvm_context *ctx,
489 LLVMValueRef src0,
490 LLVMValueRef (*pack)(struct ac_llvm_context *ctx,
491 LLVMValueRef args[2]))
492 {
493 LLVMValueRef comp[2];
494
495 src0 = ac_to_float(ctx, src0);
496 comp[0] = LLVMBuildExtractElement(ctx->builder, src0, ctx->i32_0, "");
497 comp[1] = LLVMBuildExtractElement(ctx->builder, src0, ctx->i32_1, "");
498
499 return LLVMBuildBitCast(ctx->builder, pack(ctx, comp), ctx->i32, "");
500 }
501
502 static LLVMValueRef emit_unpack_half_2x16(struct ac_llvm_context *ctx,
503 LLVMValueRef src0)
504 {
505 LLVMValueRef const16 = LLVMConstInt(ctx->i32, 16, false);
506 LLVMValueRef temps[2], val;
507 int i;
508
509 for (i = 0; i < 2; i++) {
510 val = i == 1 ? LLVMBuildLShr(ctx->builder, src0, const16, "") : src0;
511 val = LLVMBuildTrunc(ctx->builder, val, ctx->i16, "");
512 val = LLVMBuildBitCast(ctx->builder, val, ctx->f16, "");
513 temps[i] = LLVMBuildFPExt(ctx->builder, val, ctx->f32, "");
514 }
515 return ac_build_gather_values(ctx, temps, 2);
516 }
517
518 static LLVMValueRef emit_ddxy(struct ac_nir_context *ctx,
519 nir_op op,
520 LLVMValueRef src0)
521 {
522 unsigned mask;
523 int idx;
524 LLVMValueRef result;
525
526 if (op == nir_op_fddx_fine)
527 mask = AC_TID_MASK_LEFT;
528 else if (op == nir_op_fddy_fine)
529 mask = AC_TID_MASK_TOP;
530 else
531 mask = AC_TID_MASK_TOP_LEFT;
532
533 /* for DDX we want to next X pixel, DDY next Y pixel. */
534 if (op == nir_op_fddx_fine ||
535 op == nir_op_fddx_coarse ||
536 op == nir_op_fddx)
537 idx = 1;
538 else
539 idx = 2;
540
541 result = ac_build_ddxy(&ctx->ac, mask, idx, src0);
542 return result;
543 }
544
545 static void visit_alu(struct ac_nir_context *ctx, const nir_alu_instr *instr)
546 {
547 LLVMValueRef src[4], result = NULL;
548 unsigned num_components = instr->dest.dest.ssa.num_components;
549 unsigned src_components;
550 LLVMTypeRef def_type = get_def_type(ctx, &instr->dest.dest.ssa);
551
552 assert(nir_op_infos[instr->op].num_inputs <= ARRAY_SIZE(src));
553 switch (instr->op) {
554 case nir_op_vec2:
555 case nir_op_vec3:
556 case nir_op_vec4:
557 src_components = 1;
558 break;
559 case nir_op_pack_half_2x16:
560 case nir_op_pack_snorm_2x16:
561 case nir_op_pack_unorm_2x16:
562 src_components = 2;
563 break;
564 case nir_op_unpack_half_2x16:
565 src_components = 1;
566 break;
567 case nir_op_cube_face_coord:
568 case nir_op_cube_face_index:
569 src_components = 3;
570 break;
571 default:
572 src_components = num_components;
573 break;
574 }
575 for (unsigned i = 0; i < nir_op_infos[instr->op].num_inputs; i++)
576 src[i] = get_alu_src(ctx, instr->src[i], src_components);
577
578 switch (instr->op) {
579 case nir_op_mov:
580 result = src[0];
581 break;
582 case nir_op_fneg:
583 src[0] = ac_to_float(&ctx->ac, src[0]);
584 result = LLVMBuildFNeg(ctx->ac.builder, src[0], "");
585 break;
586 case nir_op_ineg:
587 result = LLVMBuildNeg(ctx->ac.builder, src[0], "");
588 break;
589 case nir_op_inot:
590 result = LLVMBuildNot(ctx->ac.builder, src[0], "");
591 break;
592 case nir_op_iadd:
593 result = LLVMBuildAdd(ctx->ac.builder, src[0], src[1], "");
594 break;
595 case nir_op_fadd:
596 src[0] = ac_to_float(&ctx->ac, src[0]);
597 src[1] = ac_to_float(&ctx->ac, src[1]);
598 result = LLVMBuildFAdd(ctx->ac.builder, src[0], src[1], "");
599 break;
600 case nir_op_fsub:
601 src[0] = ac_to_float(&ctx->ac, src[0]);
602 src[1] = ac_to_float(&ctx->ac, src[1]);
603 result = LLVMBuildFSub(ctx->ac.builder, src[0], src[1], "");
604 break;
605 case nir_op_isub:
606 result = LLVMBuildSub(ctx->ac.builder, src[0], src[1], "");
607 break;
608 case nir_op_imul:
609 result = LLVMBuildMul(ctx->ac.builder, src[0], src[1], "");
610 break;
611 case nir_op_imod:
612 result = LLVMBuildSRem(ctx->ac.builder, src[0], src[1], "");
613 break;
614 case nir_op_umod:
615 result = LLVMBuildURem(ctx->ac.builder, src[0], src[1], "");
616 break;
617 case nir_op_fmod:
618 src[0] = ac_to_float(&ctx->ac, src[0]);
619 src[1] = ac_to_float(&ctx->ac, src[1]);
620 result = ac_build_fdiv(&ctx->ac, src[0], src[1]);
621 result = emit_intrin_1f_param(&ctx->ac, "llvm.floor",
622 ac_to_float_type(&ctx->ac, def_type), result);
623 result = LLVMBuildFMul(ctx->ac.builder, src[1] , result, "");
624 result = LLVMBuildFSub(ctx->ac.builder, src[0], result, "");
625 break;
626 case nir_op_frem:
627 src[0] = ac_to_float(&ctx->ac, src[0]);
628 src[1] = ac_to_float(&ctx->ac, src[1]);
629 result = LLVMBuildFRem(ctx->ac.builder, src[0], src[1], "");
630 break;
631 case nir_op_irem:
632 result = LLVMBuildSRem(ctx->ac.builder, src[0], src[1], "");
633 break;
634 case nir_op_idiv:
635 result = LLVMBuildSDiv(ctx->ac.builder, src[0], src[1], "");
636 break;
637 case nir_op_udiv:
638 result = LLVMBuildUDiv(ctx->ac.builder, src[0], src[1], "");
639 break;
640 case nir_op_fmul:
641 src[0] = ac_to_float(&ctx->ac, src[0]);
642 src[1] = ac_to_float(&ctx->ac, src[1]);
643 result = LLVMBuildFMul(ctx->ac.builder, src[0], src[1], "");
644 break;
645 case nir_op_frcp:
646 src[0] = ac_to_float(&ctx->ac, src[0]);
647 result = ac_build_fdiv(&ctx->ac, LLVMConstReal(LLVMTypeOf(src[0]), 1.0), src[0]);
648 break;
649 case nir_op_iand:
650 result = LLVMBuildAnd(ctx->ac.builder, src[0], src[1], "");
651 break;
652 case nir_op_ior:
653 result = LLVMBuildOr(ctx->ac.builder, src[0], src[1], "");
654 break;
655 case nir_op_ixor:
656 result = LLVMBuildXor(ctx->ac.builder, src[0], src[1], "");
657 break;
658 case nir_op_ishl:
659 if (ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[1])) < ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[0])))
660 src[1] = LLVMBuildZExt(ctx->ac.builder, src[1],
661 LLVMTypeOf(src[0]), "");
662 else if (ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[1])) > ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[0])))
663 src[1] = LLVMBuildTrunc(ctx->ac.builder, src[1],
664 LLVMTypeOf(src[0]), "");
665 result = LLVMBuildShl(ctx->ac.builder, src[0], src[1], "");
666 break;
667 case nir_op_ishr:
668 if (ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[1])) < ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[0])))
669 src[1] = LLVMBuildZExt(ctx->ac.builder, src[1],
670 LLVMTypeOf(src[0]), "");
671 else if (ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[1])) > ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[0])))
672 src[1] = LLVMBuildTrunc(ctx->ac.builder, src[1],
673 LLVMTypeOf(src[0]), "");
674 result = LLVMBuildAShr(ctx->ac.builder, src[0], src[1], "");
675 break;
676 case nir_op_ushr:
677 if (ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[1])) < ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[0])))
678 src[1] = LLVMBuildZExt(ctx->ac.builder, src[1],
679 LLVMTypeOf(src[0]), "");
680 else if (ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[1])) > ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[0])))
681 src[1] = LLVMBuildTrunc(ctx->ac.builder, src[1],
682 LLVMTypeOf(src[0]), "");
683 result = LLVMBuildLShr(ctx->ac.builder, src[0], src[1], "");
684 break;
685 case nir_op_ilt32:
686 result = emit_int_cmp(&ctx->ac, LLVMIntSLT, src[0], src[1]);
687 break;
688 case nir_op_ine32:
689 result = emit_int_cmp(&ctx->ac, LLVMIntNE, src[0], src[1]);
690 break;
691 case nir_op_ieq32:
692 result = emit_int_cmp(&ctx->ac, LLVMIntEQ, src[0], src[1]);
693 break;
694 case nir_op_ige32:
695 result = emit_int_cmp(&ctx->ac, LLVMIntSGE, src[0], src[1]);
696 break;
697 case nir_op_ult32:
698 result = emit_int_cmp(&ctx->ac, LLVMIntULT, src[0], src[1]);
699 break;
700 case nir_op_uge32:
701 result = emit_int_cmp(&ctx->ac, LLVMIntUGE, src[0], src[1]);
702 break;
703 case nir_op_feq32:
704 result = emit_float_cmp(&ctx->ac, LLVMRealOEQ, src[0], src[1]);
705 break;
706 case nir_op_fne32:
707 result = emit_float_cmp(&ctx->ac, LLVMRealUNE, src[0], src[1]);
708 break;
709 case nir_op_flt32:
710 result = emit_float_cmp(&ctx->ac, LLVMRealOLT, src[0], src[1]);
711 break;
712 case nir_op_fge32:
713 result = emit_float_cmp(&ctx->ac, LLVMRealOGE, src[0], src[1]);
714 break;
715 case nir_op_fabs:
716 result = emit_intrin_1f_param(&ctx->ac, "llvm.fabs",
717 ac_to_float_type(&ctx->ac, def_type), src[0]);
718 break;
719 case nir_op_iabs:
720 result = emit_iabs(&ctx->ac, src[0]);
721 break;
722 case nir_op_imax:
723 result = ac_build_imax(&ctx->ac, src[0], src[1]);
724 break;
725 case nir_op_imin:
726 result = ac_build_imin(&ctx->ac, src[0], src[1]);
727 break;
728 case nir_op_umax:
729 result = ac_build_umax(&ctx->ac, src[0], src[1]);
730 break;
731 case nir_op_umin:
732 result = ac_build_umin(&ctx->ac, src[0], src[1]);
733 break;
734 case nir_op_isign:
735 result = ac_build_isign(&ctx->ac, src[0],
736 instr->dest.dest.ssa.bit_size);
737 break;
738 case nir_op_fsign:
739 src[0] = ac_to_float(&ctx->ac, src[0]);
740 result = ac_build_fsign(&ctx->ac, src[0],
741 instr->dest.dest.ssa.bit_size);
742 break;
743 case nir_op_ffloor:
744 result = emit_intrin_1f_param(&ctx->ac, "llvm.floor",
745 ac_to_float_type(&ctx->ac, def_type), src[0]);
746 break;
747 case nir_op_ftrunc:
748 result = emit_intrin_1f_param(&ctx->ac, "llvm.trunc",
749 ac_to_float_type(&ctx->ac, def_type), src[0]);
750 break;
751 case nir_op_fceil:
752 result = emit_intrin_1f_param(&ctx->ac, "llvm.ceil",
753 ac_to_float_type(&ctx->ac, def_type), src[0]);
754 break;
755 case nir_op_fround_even:
756 result = emit_intrin_1f_param(&ctx->ac, "llvm.rint",
757 ac_to_float_type(&ctx->ac, def_type),src[0]);
758 break;
759 case nir_op_ffract:
760 src[0] = ac_to_float(&ctx->ac, src[0]);
761 result = ac_build_fract(&ctx->ac, src[0],
762 instr->dest.dest.ssa.bit_size);
763 break;
764 case nir_op_fsin:
765 result = emit_intrin_1f_param(&ctx->ac, "llvm.sin",
766 ac_to_float_type(&ctx->ac, def_type), src[0]);
767 break;
768 case nir_op_fcos:
769 result = emit_intrin_1f_param(&ctx->ac, "llvm.cos",
770 ac_to_float_type(&ctx->ac, def_type), src[0]);
771 break;
772 case nir_op_fsqrt:
773 result = emit_intrin_1f_param(&ctx->ac, "llvm.sqrt",
774 ac_to_float_type(&ctx->ac, def_type), src[0]);
775 break;
776 case nir_op_fexp2:
777 result = emit_intrin_1f_param(&ctx->ac, "llvm.exp2",
778 ac_to_float_type(&ctx->ac, def_type), src[0]);
779 break;
780 case nir_op_flog2:
781 result = emit_intrin_1f_param(&ctx->ac, "llvm.log2",
782 ac_to_float_type(&ctx->ac, def_type), src[0]);
783 break;
784 case nir_op_frsq:
785 result = emit_intrin_1f_param(&ctx->ac, "llvm.sqrt",
786 ac_to_float_type(&ctx->ac, def_type), src[0]);
787 result = ac_build_fdiv(&ctx->ac, LLVMConstReal(LLVMTypeOf(result), 1.0), result);
788 break;
789 case nir_op_frexp_exp:
790 src[0] = ac_to_float(&ctx->ac, src[0]);
791 result = ac_build_frexp_exp(&ctx->ac, src[0],
792 ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[0])));
793 if (ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[0])) == 16)
794 result = LLVMBuildSExt(ctx->ac.builder, result,
795 ctx->ac.i32, "");
796 break;
797 case nir_op_frexp_sig:
798 src[0] = ac_to_float(&ctx->ac, src[0]);
799 result = ac_build_frexp_mant(&ctx->ac, src[0],
800 instr->dest.dest.ssa.bit_size);
801 break;
802 case nir_op_fpow:
803 result = emit_intrin_2f_param(&ctx->ac, "llvm.pow",
804 ac_to_float_type(&ctx->ac, def_type), src[0], src[1]);
805 break;
806 case nir_op_fmax:
807 result = emit_intrin_2f_param(&ctx->ac, "llvm.maxnum",
808 ac_to_float_type(&ctx->ac, def_type), src[0], src[1]);
809 if (ctx->ac.chip_class < GFX9 &&
810 instr->dest.dest.ssa.bit_size == 32) {
811 /* Only pre-GFX9 chips do not flush denorms. */
812 result = emit_intrin_1f_param(&ctx->ac, "llvm.canonicalize",
813 ac_to_float_type(&ctx->ac, def_type),
814 result);
815 }
816 break;
817 case nir_op_fmin:
818 result = emit_intrin_2f_param(&ctx->ac, "llvm.minnum",
819 ac_to_float_type(&ctx->ac, def_type), src[0], src[1]);
820 if (ctx->ac.chip_class < GFX9 &&
821 instr->dest.dest.ssa.bit_size == 32) {
822 /* Only pre-GFX9 chips do not flush denorms. */
823 result = emit_intrin_1f_param(&ctx->ac, "llvm.canonicalize",
824 ac_to_float_type(&ctx->ac, def_type),
825 result);
826 }
827 break;
828 case nir_op_ffma:
829 result = emit_intrin_3f_param(&ctx->ac, "llvm.fmuladd",
830 ac_to_float_type(&ctx->ac, def_type), src[0], src[1], src[2]);
831 break;
832 case nir_op_ldexp:
833 src[0] = ac_to_float(&ctx->ac, src[0]);
834 if (ac_get_elem_bits(&ctx->ac, def_type) == 32)
835 result = ac_build_intrinsic(&ctx->ac, "llvm.amdgcn.ldexp.f32", ctx->ac.f32, src, 2, AC_FUNC_ATTR_READNONE);
836 else if (ac_get_elem_bits(&ctx->ac, def_type) == 16)
837 result = ac_build_intrinsic(&ctx->ac, "llvm.amdgcn.ldexp.f16", ctx->ac.f16, src, 2, AC_FUNC_ATTR_READNONE);
838 else
839 result = ac_build_intrinsic(&ctx->ac, "llvm.amdgcn.ldexp.f64", ctx->ac.f64, src, 2, AC_FUNC_ATTR_READNONE);
840 break;
841 case nir_op_bfm:
842 result = emit_bfm(&ctx->ac, src[0], src[1]);
843 break;
844 case nir_op_bitfield_select:
845 result = emit_bitfield_select(&ctx->ac, src[0], src[1], src[2]);
846 break;
847 case nir_op_ubfe:
848 result = ac_build_bfe(&ctx->ac, src[0], src[1], src[2], false);
849 break;
850 case nir_op_ibfe:
851 result = ac_build_bfe(&ctx->ac, src[0], src[1], src[2], true);
852 break;
853 case nir_op_bitfield_reverse:
854 result = ac_build_bitfield_reverse(&ctx->ac, src[0]);
855 break;
856 case nir_op_bit_count:
857 result = ac_build_bit_count(&ctx->ac, src[0]);
858 break;
859 case nir_op_vec2:
860 case nir_op_vec3:
861 case nir_op_vec4:
862 for (unsigned i = 0; i < nir_op_infos[instr->op].num_inputs; i++)
863 src[i] = ac_to_integer(&ctx->ac, src[i]);
864 result = ac_build_gather_values(&ctx->ac, src, num_components);
865 break;
866 case nir_op_f2i8:
867 case nir_op_f2i16:
868 case nir_op_f2i32:
869 case nir_op_f2i64:
870 src[0] = ac_to_float(&ctx->ac, src[0]);
871 result = LLVMBuildFPToSI(ctx->ac.builder, src[0], def_type, "");
872 break;
873 case nir_op_f2u8:
874 case nir_op_f2u16:
875 case nir_op_f2u32:
876 case nir_op_f2u64:
877 src[0] = ac_to_float(&ctx->ac, src[0]);
878 result = LLVMBuildFPToUI(ctx->ac.builder, src[0], def_type, "");
879 break;
880 case nir_op_i2f16:
881 case nir_op_i2f32:
882 case nir_op_i2f64:
883 result = LLVMBuildSIToFP(ctx->ac.builder, src[0], ac_to_float_type(&ctx->ac, def_type), "");
884 break;
885 case nir_op_u2f16:
886 case nir_op_u2f32:
887 case nir_op_u2f64:
888 result = LLVMBuildUIToFP(ctx->ac.builder, src[0], ac_to_float_type(&ctx->ac, def_type), "");
889 break;
890 case nir_op_f2f16_rtz:
891 src[0] = ac_to_float(&ctx->ac, src[0]);
892 if (LLVMTypeOf(src[0]) == ctx->ac.f64)
893 src[0] = LLVMBuildFPTrunc(ctx->ac.builder, src[0], ctx->ac.f32, "");
894 LLVMValueRef param[2] = { src[0], ctx->ac.f32_0 };
895 result = ac_build_cvt_pkrtz_f16(&ctx->ac, param);
896 result = LLVMBuildExtractElement(ctx->ac.builder, result, ctx->ac.i32_0, "");
897 break;
898 case nir_op_f2f16_rtne:
899 case nir_op_f2f16:
900 case nir_op_f2f32:
901 case nir_op_f2f64:
902 src[0] = ac_to_float(&ctx->ac, src[0]);
903 if (ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[0])) < ac_get_elem_bits(&ctx->ac, def_type))
904 result = LLVMBuildFPExt(ctx->ac.builder, src[0], ac_to_float_type(&ctx->ac, def_type), "");
905 else
906 result = LLVMBuildFPTrunc(ctx->ac.builder, src[0], ac_to_float_type(&ctx->ac, def_type), "");
907 break;
908 case nir_op_u2u8:
909 case nir_op_u2u16:
910 case nir_op_u2u32:
911 case nir_op_u2u64:
912 if (ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[0])) < ac_get_elem_bits(&ctx->ac, def_type))
913 result = LLVMBuildZExt(ctx->ac.builder, src[0], def_type, "");
914 else
915 result = LLVMBuildTrunc(ctx->ac.builder, src[0], def_type, "");
916 break;
917 case nir_op_i2i8:
918 case nir_op_i2i16:
919 case nir_op_i2i32:
920 case nir_op_i2i64:
921 if (ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[0])) < ac_get_elem_bits(&ctx->ac, def_type))
922 result = LLVMBuildSExt(ctx->ac.builder, src[0], def_type, "");
923 else
924 result = LLVMBuildTrunc(ctx->ac.builder, src[0], def_type, "");
925 break;
926 case nir_op_b32csel:
927 result = emit_bcsel(&ctx->ac, src[0], src[1], src[2]);
928 break;
929 case nir_op_find_lsb:
930 result = ac_find_lsb(&ctx->ac, ctx->ac.i32, src[0]);
931 break;
932 case nir_op_ufind_msb:
933 result = ac_build_umsb(&ctx->ac, src[0], ctx->ac.i32);
934 break;
935 case nir_op_ifind_msb:
936 result = ac_build_imsb(&ctx->ac, src[0], ctx->ac.i32);
937 break;
938 case nir_op_uadd_carry:
939 result = emit_uint_carry(&ctx->ac, "llvm.uadd.with.overflow.i32", src[0], src[1]);
940 break;
941 case nir_op_usub_borrow:
942 result = emit_uint_carry(&ctx->ac, "llvm.usub.with.overflow.i32", src[0], src[1]);
943 break;
944 case nir_op_b2f16:
945 case nir_op_b2f32:
946 case nir_op_b2f64:
947 result = emit_b2f(&ctx->ac, src[0], instr->dest.dest.ssa.bit_size);
948 break;
949 case nir_op_f2b32:
950 result = emit_f2b(&ctx->ac, src[0]);
951 break;
952 case nir_op_b2i8:
953 case nir_op_b2i16:
954 case nir_op_b2i32:
955 case nir_op_b2i64:
956 result = emit_b2i(&ctx->ac, src[0], instr->dest.dest.ssa.bit_size);
957 break;
958 case nir_op_i2b32:
959 result = emit_i2b(&ctx->ac, src[0]);
960 break;
961 case nir_op_fquantize2f16:
962 result = emit_f2f16(&ctx->ac, src[0]);
963 break;
964 case nir_op_umul_high:
965 result = emit_umul_high(&ctx->ac, src[0], src[1]);
966 break;
967 case nir_op_imul_high:
968 result = emit_imul_high(&ctx->ac, src[0], src[1]);
969 break;
970 case nir_op_pack_half_2x16:
971 result = emit_pack_2x16(&ctx->ac, src[0], ac_build_cvt_pkrtz_f16);
972 break;
973 case nir_op_pack_snorm_2x16:
974 result = emit_pack_2x16(&ctx->ac, src[0], ac_build_cvt_pknorm_i16);
975 break;
976 case nir_op_pack_unorm_2x16:
977 result = emit_pack_2x16(&ctx->ac, src[0], ac_build_cvt_pknorm_u16);
978 break;
979 case nir_op_unpack_half_2x16:
980 result = emit_unpack_half_2x16(&ctx->ac, src[0]);
981 break;
982 case nir_op_fddx:
983 case nir_op_fddy:
984 case nir_op_fddx_fine:
985 case nir_op_fddy_fine:
986 case nir_op_fddx_coarse:
987 case nir_op_fddy_coarse:
988 result = emit_ddxy(ctx, instr->op, src[0]);
989 break;
990
991 case nir_op_unpack_64_2x32_split_x: {
992 assert(ac_get_llvm_num_components(src[0]) == 1);
993 LLVMValueRef tmp = LLVMBuildBitCast(ctx->ac.builder, src[0],
994 ctx->ac.v2i32,
995 "");
996 result = LLVMBuildExtractElement(ctx->ac.builder, tmp,
997 ctx->ac.i32_0, "");
998 break;
999 }
1000
1001 case nir_op_unpack_64_2x32_split_y: {
1002 assert(ac_get_llvm_num_components(src[0]) == 1);
1003 LLVMValueRef tmp = LLVMBuildBitCast(ctx->ac.builder, src[0],
1004 ctx->ac.v2i32,
1005 "");
1006 result = LLVMBuildExtractElement(ctx->ac.builder, tmp,
1007 ctx->ac.i32_1, "");
1008 break;
1009 }
1010
1011 case nir_op_pack_64_2x32_split: {
1012 LLVMValueRef tmp = ac_build_gather_values(&ctx->ac, src, 2);
1013 result = LLVMBuildBitCast(ctx->ac.builder, tmp, ctx->ac.i64, "");
1014 break;
1015 }
1016
1017 case nir_op_pack_32_2x16_split: {
1018 LLVMValueRef tmp = ac_build_gather_values(&ctx->ac, src, 2);
1019 result = LLVMBuildBitCast(ctx->ac.builder, tmp, ctx->ac.i32, "");
1020 break;
1021 }
1022
1023 case nir_op_unpack_32_2x16_split_x: {
1024 LLVMValueRef tmp = LLVMBuildBitCast(ctx->ac.builder, src[0],
1025 ctx->ac.v2i16,
1026 "");
1027 result = LLVMBuildExtractElement(ctx->ac.builder, tmp,
1028 ctx->ac.i32_0, "");
1029 break;
1030 }
1031
1032 case nir_op_unpack_32_2x16_split_y: {
1033 LLVMValueRef tmp = LLVMBuildBitCast(ctx->ac.builder, src[0],
1034 ctx->ac.v2i16,
1035 "");
1036 result = LLVMBuildExtractElement(ctx->ac.builder, tmp,
1037 ctx->ac.i32_1, "");
1038 break;
1039 }
1040
1041 case nir_op_cube_face_coord: {
1042 src[0] = ac_to_float(&ctx->ac, src[0]);
1043 LLVMValueRef results[2];
1044 LLVMValueRef in[3];
1045 for (unsigned chan = 0; chan < 3; chan++)
1046 in[chan] = ac_llvm_extract_elem(&ctx->ac, src[0], chan);
1047 results[0] = ac_build_intrinsic(&ctx->ac, "llvm.amdgcn.cubesc",
1048 ctx->ac.f32, in, 3, AC_FUNC_ATTR_READNONE);
1049 results[1] = ac_build_intrinsic(&ctx->ac, "llvm.amdgcn.cubetc",
1050 ctx->ac.f32, in, 3, AC_FUNC_ATTR_READNONE);
1051 LLVMValueRef ma = ac_build_intrinsic(&ctx->ac, "llvm.amdgcn.cubema",
1052 ctx->ac.f32, in, 3, AC_FUNC_ATTR_READNONE);
1053 results[0] = ac_build_fdiv(&ctx->ac, results[0], ma);
1054 results[1] = ac_build_fdiv(&ctx->ac, results[1], ma);
1055 LLVMValueRef offset = LLVMConstReal(ctx->ac.f32, 0.5);
1056 results[0] = LLVMBuildFAdd(ctx->ac.builder, results[0], offset, "");
1057 results[1] = LLVMBuildFAdd(ctx->ac.builder, results[1], offset, "");
1058 result = ac_build_gather_values(&ctx->ac, results, 2);
1059 break;
1060 }
1061
1062 case nir_op_cube_face_index: {
1063 src[0] = ac_to_float(&ctx->ac, src[0]);
1064 LLVMValueRef in[3];
1065 for (unsigned chan = 0; chan < 3; chan++)
1066 in[chan] = ac_llvm_extract_elem(&ctx->ac, src[0], chan);
1067 result = ac_build_intrinsic(&ctx->ac, "llvm.amdgcn.cubeid",
1068 ctx->ac.f32, in, 3, AC_FUNC_ATTR_READNONE);
1069 break;
1070 }
1071
1072 case nir_op_fmin3:
1073 result = emit_intrin_2f_param(&ctx->ac, "llvm.minnum",
1074 ac_to_float_type(&ctx->ac, def_type), src[0], src[1]);
1075 result = emit_intrin_2f_param(&ctx->ac, "llvm.minnum",
1076 ac_to_float_type(&ctx->ac, def_type), result, src[2]);
1077 break;
1078 case nir_op_umin3:
1079 result = ac_build_umin(&ctx->ac, src[0], src[1]);
1080 result = ac_build_umin(&ctx->ac, result, src[2]);
1081 break;
1082 case nir_op_imin3:
1083 result = ac_build_imin(&ctx->ac, src[0], src[1]);
1084 result = ac_build_imin(&ctx->ac, result, src[2]);
1085 break;
1086 case nir_op_fmax3:
1087 result = emit_intrin_2f_param(&ctx->ac, "llvm.maxnum",
1088 ac_to_float_type(&ctx->ac, def_type), src[0], src[1]);
1089 result = emit_intrin_2f_param(&ctx->ac, "llvm.maxnum",
1090 ac_to_float_type(&ctx->ac, def_type), result, src[2]);
1091 break;
1092 case nir_op_umax3:
1093 result = ac_build_umax(&ctx->ac, src[0], src[1]);
1094 result = ac_build_umax(&ctx->ac, result, src[2]);
1095 break;
1096 case nir_op_imax3:
1097 result = ac_build_imax(&ctx->ac, src[0], src[1]);
1098 result = ac_build_imax(&ctx->ac, result, src[2]);
1099 break;
1100 case nir_op_fmed3: {
1101 src[0] = ac_to_float(&ctx->ac, src[0]);
1102 src[1] = ac_to_float(&ctx->ac, src[1]);
1103 src[2] = ac_to_float(&ctx->ac, src[2]);
1104 result = ac_build_fmed3(&ctx->ac, src[0], src[1], src[2],
1105 instr->dest.dest.ssa.bit_size);
1106 break;
1107 }
1108 case nir_op_imed3: {
1109 LLVMValueRef tmp1 = ac_build_imin(&ctx->ac, src[0], src[1]);
1110 LLVMValueRef tmp2 = ac_build_imax(&ctx->ac, src[0], src[1]);
1111 tmp2 = ac_build_imin(&ctx->ac, tmp2, src[2]);
1112 result = ac_build_imax(&ctx->ac, tmp1, tmp2);
1113 break;
1114 }
1115 case nir_op_umed3: {
1116 LLVMValueRef tmp1 = ac_build_umin(&ctx->ac, src[0], src[1]);
1117 LLVMValueRef tmp2 = ac_build_umax(&ctx->ac, src[0], src[1]);
1118 tmp2 = ac_build_umin(&ctx->ac, tmp2, src[2]);
1119 result = ac_build_umax(&ctx->ac, tmp1, tmp2);
1120 break;
1121 }
1122
1123 default:
1124 fprintf(stderr, "Unknown NIR alu instr: ");
1125 nir_print_instr(&instr->instr, stderr);
1126 fprintf(stderr, "\n");
1127 abort();
1128 }
1129
1130 if (result) {
1131 assert(instr->dest.dest.is_ssa);
1132 result = ac_to_integer_or_pointer(&ctx->ac, result);
1133 ctx->ssa_defs[instr->dest.dest.ssa.index] = result;
1134 }
1135 }
1136
1137 static void visit_load_const(struct ac_nir_context *ctx,
1138 const nir_load_const_instr *instr)
1139 {
1140 LLVMValueRef values[4], value = NULL;
1141 LLVMTypeRef element_type =
1142 LLVMIntTypeInContext(ctx->ac.context, instr->def.bit_size);
1143
1144 for (unsigned i = 0; i < instr->def.num_components; ++i) {
1145 switch (instr->def.bit_size) {
1146 case 8:
1147 values[i] = LLVMConstInt(element_type,
1148 instr->value[i].u8, false);
1149 break;
1150 case 16:
1151 values[i] = LLVMConstInt(element_type,
1152 instr->value[i].u16, false);
1153 break;
1154 case 32:
1155 values[i] = LLVMConstInt(element_type,
1156 instr->value[i].u32, false);
1157 break;
1158 case 64:
1159 values[i] = LLVMConstInt(element_type,
1160 instr->value[i].u64, false);
1161 break;
1162 default:
1163 fprintf(stderr,
1164 "unsupported nir load_const bit_size: %d\n",
1165 instr->def.bit_size);
1166 abort();
1167 }
1168 }
1169 if (instr->def.num_components > 1) {
1170 value = LLVMConstVector(values, instr->def.num_components);
1171 } else
1172 value = values[0];
1173
1174 ctx->ssa_defs[instr->def.index] = value;
1175 }
1176
1177 static LLVMValueRef
1178 get_buffer_size(struct ac_nir_context *ctx, LLVMValueRef descriptor, bool in_elements)
1179 {
1180 LLVMValueRef size =
1181 LLVMBuildExtractElement(ctx->ac.builder, descriptor,
1182 LLVMConstInt(ctx->ac.i32, 2, false), "");
1183
1184 /* GFX8 only */
1185 if (ctx->ac.chip_class == GFX8 && in_elements) {
1186 /* On GFX8, the descriptor contains the size in bytes,
1187 * but TXQ must return the size in elements.
1188 * The stride is always non-zero for resources using TXQ.
1189 */
1190 LLVMValueRef stride =
1191 LLVMBuildExtractElement(ctx->ac.builder, descriptor,
1192 ctx->ac.i32_1, "");
1193 stride = LLVMBuildLShr(ctx->ac.builder, stride,
1194 LLVMConstInt(ctx->ac.i32, 16, false), "");
1195 stride = LLVMBuildAnd(ctx->ac.builder, stride,
1196 LLVMConstInt(ctx->ac.i32, 0x3fff, false), "");
1197
1198 size = LLVMBuildUDiv(ctx->ac.builder, size, stride, "");
1199 }
1200 return size;
1201 }
1202
1203 static LLVMValueRef lower_gather4_integer(struct ac_llvm_context *ctx,
1204 nir_variable *var,
1205 struct ac_image_args *args,
1206 const nir_tex_instr *instr)
1207 {
1208 const struct glsl_type *type = glsl_without_array(var->type);
1209 enum glsl_base_type stype = glsl_get_sampler_result_type(type);
1210 LLVMValueRef half_texel[2];
1211 LLVMValueRef compare_cube_wa = NULL;
1212 LLVMValueRef result;
1213
1214 //TODO Rect
1215 {
1216 struct ac_image_args txq_args = { 0 };
1217
1218 txq_args.dim = get_ac_sampler_dim(ctx, instr->sampler_dim, instr->is_array);
1219 txq_args.opcode = ac_image_get_resinfo;
1220 txq_args.dmask = 0xf;
1221 txq_args.lod = ctx->i32_0;
1222 txq_args.resource = args->resource;
1223 txq_args.attributes = AC_FUNC_ATTR_READNONE;
1224 LLVMValueRef size = ac_build_image_opcode(ctx, &txq_args);
1225
1226 for (unsigned c = 0; c < 2; c++) {
1227 half_texel[c] = LLVMBuildExtractElement(ctx->builder, size,
1228 LLVMConstInt(ctx->i32, c, false), "");
1229 half_texel[c] = LLVMBuildUIToFP(ctx->builder, half_texel[c], ctx->f32, "");
1230 half_texel[c] = ac_build_fdiv(ctx, ctx->f32_1, half_texel[c]);
1231 half_texel[c] = LLVMBuildFMul(ctx->builder, half_texel[c],
1232 LLVMConstReal(ctx->f32, -0.5), "");
1233 }
1234 }
1235
1236 LLVMValueRef orig_coords[2] = { args->coords[0], args->coords[1] };
1237
1238 for (unsigned c = 0; c < 2; c++) {
1239 LLVMValueRef tmp;
1240 tmp = LLVMBuildBitCast(ctx->builder, args->coords[c], ctx->f32, "");
1241 args->coords[c] = LLVMBuildFAdd(ctx->builder, tmp, half_texel[c], "");
1242 }
1243
1244 /*
1245 * Apparantly cube has issue with integer types that the workaround doesn't solve,
1246 * so this tests if the format is 8_8_8_8 and an integer type do an alternate
1247 * workaround by sampling using a scaled type and converting.
1248 * This is taken from amdgpu-pro shaders.
1249 */
1250 /* NOTE this produces some ugly code compared to amdgpu-pro,
1251 * LLVM ends up dumping SGPRs into VGPRs to deal with the compare/select,
1252 * and then reads them back. -pro generates two selects,
1253 * one s_cmp for the descriptor rewriting
1254 * one v_cmp for the coordinate and result changes.
1255 */
1256 if (instr->sampler_dim == GLSL_SAMPLER_DIM_CUBE) {
1257 LLVMValueRef tmp, tmp2;
1258
1259 /* workaround 8/8/8/8 uint/sint cube gather bug */
1260 /* first detect it then change to a scaled read and f2i */
1261 tmp = LLVMBuildExtractElement(ctx->builder, args->resource, ctx->i32_1, "");
1262 tmp2 = tmp;
1263
1264 /* extract the DATA_FORMAT */
1265 tmp = ac_build_bfe(ctx, tmp, LLVMConstInt(ctx->i32, 20, false),
1266 LLVMConstInt(ctx->i32, 6, false), false);
1267
1268 /* is the DATA_FORMAT == 8_8_8_8 */
1269 compare_cube_wa = LLVMBuildICmp(ctx->builder, LLVMIntEQ, tmp, LLVMConstInt(ctx->i32, V_008F14_IMG_DATA_FORMAT_8_8_8_8, false), "");
1270
1271 if (stype == GLSL_TYPE_UINT)
1272 /* Create a NUM FORMAT - 0x2 or 0x4 - USCALED or UINT */
1273 tmp = LLVMBuildSelect(ctx->builder, compare_cube_wa, LLVMConstInt(ctx->i32, 0x8000000, false),
1274 LLVMConstInt(ctx->i32, 0x10000000, false), "");
1275 else
1276 /* Create a NUM FORMAT - 0x3 or 0x5 - SSCALED or SINT */
1277 tmp = LLVMBuildSelect(ctx->builder, compare_cube_wa, LLVMConstInt(ctx->i32, 0xc000000, false),
1278 LLVMConstInt(ctx->i32, 0x14000000, false), "");
1279
1280 /* replace the NUM FORMAT in the descriptor */
1281 tmp2 = LLVMBuildAnd(ctx->builder, tmp2, LLVMConstInt(ctx->i32, C_008F14_NUM_FORMAT, false), "");
1282 tmp2 = LLVMBuildOr(ctx->builder, tmp2, tmp, "");
1283
1284 args->resource = LLVMBuildInsertElement(ctx->builder, args->resource, tmp2, ctx->i32_1, "");
1285
1286 /* don't modify the coordinates for this case */
1287 for (unsigned c = 0; c < 2; ++c)
1288 args->coords[c] = LLVMBuildSelect(
1289 ctx->builder, compare_cube_wa,
1290 orig_coords[c], args->coords[c], "");
1291 }
1292
1293 args->attributes = AC_FUNC_ATTR_READNONE;
1294 result = ac_build_image_opcode(ctx, args);
1295
1296 if (instr->sampler_dim == GLSL_SAMPLER_DIM_CUBE) {
1297 LLVMValueRef tmp, tmp2;
1298
1299 /* if the cube workaround is in place, f2i the result. */
1300 for (unsigned c = 0; c < 4; c++) {
1301 tmp = LLVMBuildExtractElement(ctx->builder, result, LLVMConstInt(ctx->i32, c, false), "");
1302 if (stype == GLSL_TYPE_UINT)
1303 tmp2 = LLVMBuildFPToUI(ctx->builder, tmp, ctx->i32, "");
1304 else
1305 tmp2 = LLVMBuildFPToSI(ctx->builder, tmp, ctx->i32, "");
1306 tmp = LLVMBuildBitCast(ctx->builder, tmp, ctx->i32, "");
1307 tmp2 = LLVMBuildBitCast(ctx->builder, tmp2, ctx->i32, "");
1308 tmp = LLVMBuildSelect(ctx->builder, compare_cube_wa, tmp2, tmp, "");
1309 tmp = LLVMBuildBitCast(ctx->builder, tmp, ctx->f32, "");
1310 result = LLVMBuildInsertElement(ctx->builder, result, tmp, LLVMConstInt(ctx->i32, c, false), "");
1311 }
1312 }
1313 return result;
1314 }
1315
1316 static nir_deref_instr *get_tex_texture_deref(const nir_tex_instr *instr)
1317 {
1318 nir_deref_instr *texture_deref_instr = NULL;
1319
1320 for (unsigned i = 0; i < instr->num_srcs; i++) {
1321 switch (instr->src[i].src_type) {
1322 case nir_tex_src_texture_deref:
1323 texture_deref_instr = nir_src_as_deref(instr->src[i].src);
1324 break;
1325 default:
1326 break;
1327 }
1328 }
1329 return texture_deref_instr;
1330 }
1331
1332 static LLVMValueRef build_tex_intrinsic(struct ac_nir_context *ctx,
1333 const nir_tex_instr *instr,
1334 struct ac_image_args *args)
1335 {
1336 if (instr->sampler_dim == GLSL_SAMPLER_DIM_BUF) {
1337 unsigned mask = nir_ssa_def_components_read(&instr->dest.ssa);
1338
1339 if (ctx->abi->gfx9_stride_size_workaround) {
1340 return ac_build_buffer_load_format_gfx9_safe(&ctx->ac,
1341 args->resource,
1342 args->coords[0],
1343 ctx->ac.i32_0,
1344 util_last_bit(mask),
1345 0, true);
1346 } else {
1347 return ac_build_buffer_load_format(&ctx->ac,
1348 args->resource,
1349 args->coords[0],
1350 ctx->ac.i32_0,
1351 util_last_bit(mask),
1352 0, true);
1353 }
1354 }
1355
1356 args->opcode = ac_image_sample;
1357
1358 switch (instr->op) {
1359 case nir_texop_txf:
1360 case nir_texop_txf_ms:
1361 case nir_texop_samples_identical:
1362 args->opcode = args->level_zero ||
1363 instr->sampler_dim == GLSL_SAMPLER_DIM_MS ?
1364 ac_image_load : ac_image_load_mip;
1365 args->level_zero = false;
1366 break;
1367 case nir_texop_txs:
1368 case nir_texop_query_levels:
1369 args->opcode = ac_image_get_resinfo;
1370 if (!args->lod)
1371 args->lod = ctx->ac.i32_0;
1372 args->level_zero = false;
1373 break;
1374 case nir_texop_tex:
1375 if (ctx->stage != MESA_SHADER_FRAGMENT) {
1376 assert(!args->lod);
1377 args->level_zero = true;
1378 }
1379 break;
1380 case nir_texop_tg4:
1381 args->opcode = ac_image_gather4;
1382 args->level_zero = true;
1383 break;
1384 case nir_texop_lod:
1385 args->opcode = ac_image_get_lod;
1386 break;
1387 default:
1388 break;
1389 }
1390
1391 if (instr->op == nir_texop_tg4 && ctx->ac.chip_class <= GFX8) {
1392 nir_deref_instr *texture_deref_instr = get_tex_texture_deref(instr);
1393 nir_variable *var = nir_deref_instr_get_variable(texture_deref_instr);
1394 const struct glsl_type *type = glsl_without_array(var->type);
1395 enum glsl_base_type stype = glsl_get_sampler_result_type(type);
1396 if (stype == GLSL_TYPE_UINT || stype == GLSL_TYPE_INT) {
1397 return lower_gather4_integer(&ctx->ac, var, args, instr);
1398 }
1399 }
1400
1401 /* Fixup for GFX9 which allocates 1D textures as 2D. */
1402 if (instr->op == nir_texop_lod && ctx->ac.chip_class == GFX9) {
1403 if ((args->dim == ac_image_2darray ||
1404 args->dim == ac_image_2d) && !args->coords[1]) {
1405 args->coords[1] = ctx->ac.i32_0;
1406 }
1407 }
1408
1409 args->attributes = AC_FUNC_ATTR_READNONE;
1410 bool cs_derivs = ctx->stage == MESA_SHADER_COMPUTE &&
1411 ctx->info->cs.derivative_group != DERIVATIVE_GROUP_NONE;
1412 if (ctx->stage == MESA_SHADER_FRAGMENT || cs_derivs) {
1413 /* Prevent texture instructions with implicit derivatives from being
1414 * sinked into branches. */
1415 switch (instr->op) {
1416 case nir_texop_tex:
1417 case nir_texop_txb:
1418 case nir_texop_lod:
1419 args->attributes |= AC_FUNC_ATTR_CONVERGENT;
1420 break;
1421 default:
1422 break;
1423 }
1424 }
1425
1426 return ac_build_image_opcode(&ctx->ac, args);
1427 }
1428
1429 static LLVMValueRef visit_vulkan_resource_reindex(struct ac_nir_context *ctx,
1430 nir_intrinsic_instr *instr)
1431 {
1432 LLVMValueRef ptr = get_src(ctx, instr->src[0]);
1433 LLVMValueRef index = get_src(ctx, instr->src[1]);
1434
1435 LLVMValueRef result = LLVMBuildGEP(ctx->ac.builder, ptr, &index, 1, "");
1436 LLVMSetMetadata(result, ctx->ac.uniform_md_kind, ctx->ac.empty_md);
1437 return result;
1438 }
1439
1440 static LLVMValueRef visit_load_push_constant(struct ac_nir_context *ctx,
1441 nir_intrinsic_instr *instr)
1442 {
1443 LLVMValueRef ptr, addr;
1444 LLVMValueRef src0 = get_src(ctx, instr->src[0]);
1445 unsigned index = nir_intrinsic_base(instr);
1446
1447 addr = LLVMConstInt(ctx->ac.i32, index, 0);
1448 addr = LLVMBuildAdd(ctx->ac.builder, addr, src0, "");
1449
1450 /* Load constant values from user SGPRS when possible, otherwise
1451 * fallback to the default path that loads directly from memory.
1452 */
1453 if (LLVMIsConstant(src0) &&
1454 instr->dest.ssa.bit_size == 32) {
1455 unsigned count = instr->dest.ssa.num_components;
1456 unsigned offset = index;
1457
1458 offset += LLVMConstIntGetZExtValue(src0);
1459 offset /= 4;
1460
1461 offset -= ctx->abi->base_inline_push_consts;
1462
1463 if (offset + count <= ctx->abi->num_inline_push_consts) {
1464 return ac_build_gather_values(&ctx->ac,
1465 ctx->abi->inline_push_consts + offset,
1466 count);
1467 }
1468 }
1469
1470 ptr = LLVMBuildGEP(ctx->ac.builder, ctx->abi->push_constants, &addr, 1, "");
1471
1472 if (instr->dest.ssa.bit_size == 8) {
1473 unsigned load_dwords = instr->dest.ssa.num_components > 1 ? 2 : 1;
1474 LLVMTypeRef vec_type = LLVMVectorType(LLVMInt8TypeInContext(ctx->ac.context), 4 * load_dwords);
1475 ptr = ac_cast_ptr(&ctx->ac, ptr, vec_type);
1476 LLVMValueRef res = LLVMBuildLoad(ctx->ac.builder, ptr, "");
1477
1478 LLVMValueRef params[3];
1479 if (load_dwords > 1) {
1480 LLVMValueRef res_vec = LLVMBuildBitCast(ctx->ac.builder, res, LLVMVectorType(ctx->ac.i32, 2), "");
1481 params[0] = LLVMBuildExtractElement(ctx->ac.builder, res_vec, LLVMConstInt(ctx->ac.i32, 1, false), "");
1482 params[1] = LLVMBuildExtractElement(ctx->ac.builder, res_vec, LLVMConstInt(ctx->ac.i32, 0, false), "");
1483 } else {
1484 res = LLVMBuildBitCast(ctx->ac.builder, res, ctx->ac.i32, "");
1485 params[0] = ctx->ac.i32_0;
1486 params[1] = res;
1487 }
1488 params[2] = addr;
1489 res = ac_build_intrinsic(&ctx->ac, "llvm.amdgcn.alignbyte", ctx->ac.i32, params, 3, 0);
1490
1491 res = LLVMBuildTrunc(ctx->ac.builder, res, LLVMIntTypeInContext(ctx->ac.context, instr->dest.ssa.num_components * 8), "");
1492 if (instr->dest.ssa.num_components > 1)
1493 res = LLVMBuildBitCast(ctx->ac.builder, res, LLVMVectorType(LLVMInt8TypeInContext(ctx->ac.context), instr->dest.ssa.num_components), "");
1494 return res;
1495 } else if (instr->dest.ssa.bit_size == 16) {
1496 unsigned load_dwords = instr->dest.ssa.num_components / 2 + 1;
1497 LLVMTypeRef vec_type = LLVMVectorType(LLVMInt16TypeInContext(ctx->ac.context), 2 * load_dwords);
1498 ptr = ac_cast_ptr(&ctx->ac, ptr, vec_type);
1499 LLVMValueRef res = LLVMBuildLoad(ctx->ac.builder, ptr, "");
1500 res = LLVMBuildBitCast(ctx->ac.builder, res, vec_type, "");
1501 LLVMValueRef cond = LLVMBuildLShr(ctx->ac.builder, addr, ctx->ac.i32_1, "");
1502 cond = LLVMBuildTrunc(ctx->ac.builder, cond, ctx->ac.i1, "");
1503 LLVMValueRef mask[] = { LLVMConstInt(ctx->ac.i32, 0, false), LLVMConstInt(ctx->ac.i32, 1, false),
1504 LLVMConstInt(ctx->ac.i32, 2, false), LLVMConstInt(ctx->ac.i32, 3, false),
1505 LLVMConstInt(ctx->ac.i32, 4, false)};
1506 LLVMValueRef swizzle_aligned = LLVMConstVector(&mask[0], instr->dest.ssa.num_components);
1507 LLVMValueRef swizzle_unaligned = LLVMConstVector(&mask[1], instr->dest.ssa.num_components);
1508 LLVMValueRef shuffle_aligned = LLVMBuildShuffleVector(ctx->ac.builder, res, res, swizzle_aligned, "");
1509 LLVMValueRef shuffle_unaligned = LLVMBuildShuffleVector(ctx->ac.builder, res, res, swizzle_unaligned, "");
1510 res = LLVMBuildSelect(ctx->ac.builder, cond, shuffle_unaligned, shuffle_aligned, "");
1511 return LLVMBuildBitCast(ctx->ac.builder, res, get_def_type(ctx, &instr->dest.ssa), "");
1512 }
1513
1514 ptr = ac_cast_ptr(&ctx->ac, ptr, get_def_type(ctx, &instr->dest.ssa));
1515
1516 return LLVMBuildLoad(ctx->ac.builder, ptr, "");
1517 }
1518
1519 static LLVMValueRef visit_get_buffer_size(struct ac_nir_context *ctx,
1520 const nir_intrinsic_instr *instr)
1521 {
1522 LLVMValueRef index = get_src(ctx, instr->src[0]);
1523
1524 return get_buffer_size(ctx, ctx->abi->load_ssbo(ctx->abi, index, false), false);
1525 }
1526
1527 static uint32_t widen_mask(uint32_t mask, unsigned multiplier)
1528 {
1529 uint32_t new_mask = 0;
1530 for(unsigned i = 0; i < 32 && (1u << i) <= mask; ++i)
1531 if (mask & (1u << i))
1532 new_mask |= ((1u << multiplier) - 1u) << (i * multiplier);
1533 return new_mask;
1534 }
1535
1536 static LLVMValueRef extract_vector_range(struct ac_llvm_context *ctx, LLVMValueRef src,
1537 unsigned start, unsigned count)
1538 {
1539 LLVMValueRef mask[] = {
1540 ctx->i32_0, ctx->i32_1,
1541 LLVMConstInt(ctx->i32, 2, false), LLVMConstInt(ctx->i32, 3, false) };
1542
1543 unsigned src_elements = ac_get_llvm_num_components(src);
1544
1545 if (count == src_elements) {
1546 assert(start == 0);
1547 return src;
1548 } else if (count == 1) {
1549 assert(start < src_elements);
1550 return LLVMBuildExtractElement(ctx->builder, src, mask[start], "");
1551 } else {
1552 assert(start + count <= src_elements);
1553 assert(count <= 4);
1554 LLVMValueRef swizzle = LLVMConstVector(&mask[start], count);
1555 return LLVMBuildShuffleVector(ctx->builder, src, src, swizzle, "");
1556 }
1557 }
1558
1559 static unsigned get_cache_policy(struct ac_nir_context *ctx,
1560 enum gl_access_qualifier access,
1561 bool may_store_unaligned,
1562 bool writeonly_memory)
1563 {
1564 unsigned cache_policy = 0;
1565
1566 /* GFX6 has a TC L1 bug causing corruption of 8bit/16bit stores. All
1567 * store opcodes not aligned to a dword are affected. The only way to
1568 * get unaligned stores is through shader images.
1569 */
1570 if (((may_store_unaligned && ctx->ac.chip_class == GFX6) ||
1571 /* If this is write-only, don't keep data in L1 to prevent
1572 * evicting L1 cache lines that may be needed by other
1573 * instructions.
1574 */
1575 writeonly_memory ||
1576 access & (ACCESS_COHERENT | ACCESS_VOLATILE))) {
1577 cache_policy |= ac_glc;
1578 }
1579
1580 return cache_policy;
1581 }
1582
1583 static void visit_store_ssbo(struct ac_nir_context *ctx,
1584 nir_intrinsic_instr *instr)
1585 {
1586 LLVMValueRef src_data = get_src(ctx, instr->src[0]);
1587 int elem_size_bytes = ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src_data)) / 8;
1588 unsigned writemask = nir_intrinsic_write_mask(instr);
1589 enum gl_access_qualifier access = nir_intrinsic_access(instr);
1590 bool writeonly_memory = access & ACCESS_NON_READABLE;
1591 unsigned cache_policy = get_cache_policy(ctx, access, false, writeonly_memory);
1592
1593 LLVMValueRef rsrc = ctx->abi->load_ssbo(ctx->abi,
1594 get_src(ctx, instr->src[1]), true);
1595 LLVMValueRef base_data = src_data;
1596 base_data = ac_trim_vector(&ctx->ac, base_data, instr->num_components);
1597 LLVMValueRef base_offset = get_src(ctx, instr->src[2]);
1598
1599 while (writemask) {
1600 int start, count;
1601 LLVMValueRef data, offset;
1602 LLVMTypeRef data_type;
1603
1604 u_bit_scan_consecutive_range(&writemask, &start, &count);
1605
1606 /* Due to an LLVM limitation with LLVM < 9, split 3-element
1607 * writes into a 2-element and a 1-element write. */
1608 if (count == 3 &&
1609 (elem_size_bytes != 4 || !ac_has_vec3_support(ctx->ac.chip_class, false))) {
1610 writemask |= 1 << (start + 2);
1611 count = 2;
1612 }
1613 int num_bytes = count * elem_size_bytes; /* count in bytes */
1614
1615 /* we can only store 4 DWords at the same time.
1616 * can only happen for 64 Bit vectors. */
1617 if (num_bytes > 16) {
1618 writemask |= ((1u << (count - 2)) - 1u) << (start + 2);
1619 count = 2;
1620 num_bytes = 16;
1621 }
1622
1623 /* check alignment of 16 Bit stores */
1624 if (elem_size_bytes == 2 && num_bytes > 2 && (start % 2) == 1) {
1625 writemask |= ((1u << (count - 1)) - 1u) << (start + 1);
1626 count = 1;
1627 num_bytes = 2;
1628 }
1629 data = extract_vector_range(&ctx->ac, base_data, start, count);
1630
1631 offset = LLVMBuildAdd(ctx->ac.builder, base_offset,
1632 LLVMConstInt(ctx->ac.i32, start * elem_size_bytes, false), "");
1633
1634 if (num_bytes == 1) {
1635 ac_build_tbuffer_store_byte(&ctx->ac, rsrc, data,
1636 offset, ctx->ac.i32_0,
1637 cache_policy);
1638 } else if (num_bytes == 2) {
1639 ac_build_tbuffer_store_short(&ctx->ac, rsrc, data,
1640 offset, ctx->ac.i32_0,
1641 cache_policy);
1642 } else {
1643 int num_channels = num_bytes / 4;
1644
1645 switch (num_bytes) {
1646 case 16: /* v4f32 */
1647 data_type = ctx->ac.v4f32;
1648 break;
1649 case 12: /* v3f32 */
1650 data_type = ctx->ac.v3f32;
1651 break;
1652 case 8: /* v2f32 */
1653 data_type = ctx->ac.v2f32;
1654 break;
1655 case 4: /* f32 */
1656 data_type = ctx->ac.f32;
1657 break;
1658 default:
1659 unreachable("Malformed vector store.");
1660 }
1661 data = LLVMBuildBitCast(ctx->ac.builder, data, data_type, "");
1662
1663 ac_build_buffer_store_dword(&ctx->ac, rsrc, data,
1664 num_channels, offset,
1665 ctx->ac.i32_0, 0,
1666 cache_policy, false);
1667 }
1668 }
1669 }
1670
1671 static LLVMValueRef visit_atomic_ssbo(struct ac_nir_context *ctx,
1672 const nir_intrinsic_instr *instr)
1673 {
1674 LLVMTypeRef return_type = LLVMTypeOf(get_src(ctx, instr->src[2]));
1675 const char *op;
1676 char name[64], type[8];
1677 LLVMValueRef params[6];
1678 int arg_count = 0;
1679
1680 switch (instr->intrinsic) {
1681 case nir_intrinsic_ssbo_atomic_add:
1682 op = "add";
1683 break;
1684 case nir_intrinsic_ssbo_atomic_imin:
1685 op = "smin";
1686 break;
1687 case nir_intrinsic_ssbo_atomic_umin:
1688 op = "umin";
1689 break;
1690 case nir_intrinsic_ssbo_atomic_imax:
1691 op = "smax";
1692 break;
1693 case nir_intrinsic_ssbo_atomic_umax:
1694 op = "umax";
1695 break;
1696 case nir_intrinsic_ssbo_atomic_and:
1697 op = "and";
1698 break;
1699 case nir_intrinsic_ssbo_atomic_or:
1700 op = "or";
1701 break;
1702 case nir_intrinsic_ssbo_atomic_xor:
1703 op = "xor";
1704 break;
1705 case nir_intrinsic_ssbo_atomic_exchange:
1706 op = "swap";
1707 break;
1708 case nir_intrinsic_ssbo_atomic_comp_swap:
1709 op = "cmpswap";
1710 break;
1711 default:
1712 abort();
1713 }
1714
1715 if (instr->intrinsic == nir_intrinsic_ssbo_atomic_comp_swap) {
1716 params[arg_count++] = ac_llvm_extract_elem(&ctx->ac, get_src(ctx, instr->src[3]), 0);
1717 }
1718 params[arg_count++] = ac_llvm_extract_elem(&ctx->ac, get_src(ctx, instr->src[2]), 0);
1719 params[arg_count++] = ctx->abi->load_ssbo(ctx->abi,
1720 get_src(ctx, instr->src[0]),
1721 true);
1722
1723 if (HAVE_LLVM >= 0x900) {
1724 /* XXX: The new raw/struct atomic intrinsics are buggy with
1725 * LLVM 8, see r358579.
1726 */
1727 params[arg_count++] = get_src(ctx, instr->src[1]); /* voffset */
1728 params[arg_count++] = ctx->ac.i32_0; /* soffset */
1729 params[arg_count++] = ctx->ac.i32_0; /* slc */
1730
1731 ac_build_type_name_for_intr(return_type, type, sizeof(type));
1732 snprintf(name, sizeof(name),
1733 "llvm.amdgcn.raw.buffer.atomic.%s.%s", op, type);
1734 } else {
1735 params[arg_count++] = ctx->ac.i32_0; /* vindex */
1736 params[arg_count++] = get_src(ctx, instr->src[1]); /* voffset */
1737 params[arg_count++] = ctx->ac.i1false; /* slc */
1738
1739 assert(return_type == ctx->ac.i32);
1740 snprintf(name, sizeof(name),
1741 "llvm.amdgcn.buffer.atomic.%s", op);
1742 }
1743
1744 return ac_build_intrinsic(&ctx->ac, name, return_type, params,
1745 arg_count, 0);
1746 }
1747
1748 static LLVMValueRef visit_load_buffer(struct ac_nir_context *ctx,
1749 const nir_intrinsic_instr *instr)
1750 {
1751 int elem_size_bytes = instr->dest.ssa.bit_size / 8;
1752 int num_components = instr->num_components;
1753 enum gl_access_qualifier access = nir_intrinsic_access(instr);
1754 unsigned cache_policy = get_cache_policy(ctx, access, false, false);
1755
1756 LLVMValueRef offset = get_src(ctx, instr->src[1]);
1757 LLVMValueRef rsrc = ctx->abi->load_ssbo(ctx->abi,
1758 get_src(ctx, instr->src[0]), false);
1759 LLVMValueRef vindex = ctx->ac.i32_0;
1760
1761 LLVMTypeRef def_type = get_def_type(ctx, &instr->dest.ssa);
1762 LLVMTypeRef def_elem_type = num_components > 1 ? LLVMGetElementType(def_type) : def_type;
1763
1764 LLVMValueRef results[4];
1765 for (int i = 0; i < num_components;) {
1766 int num_elems = num_components - i;
1767 if (elem_size_bytes < 4 && nir_intrinsic_align(instr) % 4 != 0)
1768 num_elems = 1;
1769 if (num_elems * elem_size_bytes > 16)
1770 num_elems = 16 / elem_size_bytes;
1771 int load_bytes = num_elems * elem_size_bytes;
1772
1773 LLVMValueRef immoffset = LLVMConstInt(ctx->ac.i32, i * elem_size_bytes, false);
1774
1775 LLVMValueRef ret;
1776
1777 if (load_bytes == 1) {
1778 ret = ac_build_tbuffer_load_byte(&ctx->ac,
1779 rsrc,
1780 offset,
1781 ctx->ac.i32_0,
1782 immoffset,
1783 cache_policy);
1784 } else if (load_bytes == 2) {
1785 ret = ac_build_tbuffer_load_short(&ctx->ac,
1786 rsrc,
1787 offset,
1788 ctx->ac.i32_0,
1789 immoffset,
1790 cache_policy);
1791 } else {
1792 int num_channels = util_next_power_of_two(load_bytes) / 4;
1793 bool can_speculate = access & ACCESS_CAN_REORDER;
1794
1795 ret = ac_build_buffer_load(&ctx->ac, rsrc, num_channels,
1796 vindex, offset, immoffset, 0,
1797 cache_policy, can_speculate, false);
1798 }
1799
1800 LLVMTypeRef byte_vec = LLVMVectorType(ctx->ac.i8, ac_get_type_size(LLVMTypeOf(ret)));
1801 ret = LLVMBuildBitCast(ctx->ac.builder, ret, byte_vec, "");
1802 ret = ac_trim_vector(&ctx->ac, ret, load_bytes);
1803
1804 LLVMTypeRef ret_type = LLVMVectorType(def_elem_type, num_elems);
1805 ret = LLVMBuildBitCast(ctx->ac.builder, ret, ret_type, "");
1806
1807 for (unsigned j = 0; j < num_elems; j++) {
1808 results[i + j] = LLVMBuildExtractElement(ctx->ac.builder, ret, LLVMConstInt(ctx->ac.i32, j, false), "");
1809 }
1810 i += num_elems;
1811 }
1812
1813 return ac_build_gather_values(&ctx->ac, results, num_components);
1814 }
1815
1816 static LLVMValueRef visit_load_ubo_buffer(struct ac_nir_context *ctx,
1817 const nir_intrinsic_instr *instr)
1818 {
1819 LLVMValueRef ret;
1820 LLVMValueRef rsrc = get_src(ctx, instr->src[0]);
1821 LLVMValueRef offset = get_src(ctx, instr->src[1]);
1822 int num_components = instr->num_components;
1823
1824 if (ctx->abi->load_ubo)
1825 rsrc = ctx->abi->load_ubo(ctx->abi, rsrc);
1826
1827 if (instr->dest.ssa.bit_size == 64)
1828 num_components *= 2;
1829
1830 if (instr->dest.ssa.bit_size == 16 || instr->dest.ssa.bit_size == 8) {
1831 unsigned load_bytes = instr->dest.ssa.bit_size / 8;
1832 LLVMValueRef results[num_components];
1833 for (unsigned i = 0; i < num_components; ++i) {
1834 LLVMValueRef immoffset = LLVMConstInt(ctx->ac.i32,
1835 load_bytes * i, 0);
1836
1837 if (load_bytes == 1) {
1838 results[i] = ac_build_tbuffer_load_byte(&ctx->ac,
1839 rsrc,
1840 offset,
1841 ctx->ac.i32_0,
1842 immoffset,
1843 0);
1844 } else {
1845 assert(load_bytes == 2);
1846 results[i] = ac_build_tbuffer_load_short(&ctx->ac,
1847 rsrc,
1848 offset,
1849 ctx->ac.i32_0,
1850 immoffset,
1851 0);
1852 }
1853 }
1854 ret = ac_build_gather_values(&ctx->ac, results, num_components);
1855 } else {
1856 ret = ac_build_buffer_load(&ctx->ac, rsrc, num_components, NULL, offset,
1857 NULL, 0, 0, true, true);
1858
1859 ret = ac_trim_vector(&ctx->ac, ret, num_components);
1860 }
1861
1862 return LLVMBuildBitCast(ctx->ac.builder, ret,
1863 get_def_type(ctx, &instr->dest.ssa), "");
1864 }
1865
1866 static void
1867 get_deref_offset(struct ac_nir_context *ctx, nir_deref_instr *instr,
1868 bool vs_in, unsigned *vertex_index_out,
1869 LLVMValueRef *vertex_index_ref,
1870 unsigned *const_out, LLVMValueRef *indir_out)
1871 {
1872 nir_variable *var = nir_deref_instr_get_variable(instr);
1873 nir_deref_path path;
1874 unsigned idx_lvl = 1;
1875
1876 nir_deref_path_init(&path, instr, NULL);
1877
1878 if (vertex_index_out != NULL || vertex_index_ref != NULL) {
1879 if (vertex_index_ref) {
1880 *vertex_index_ref = get_src(ctx, path.path[idx_lvl]->arr.index);
1881 if (vertex_index_out)
1882 *vertex_index_out = 0;
1883 } else {
1884 *vertex_index_out = nir_src_as_uint(path.path[idx_lvl]->arr.index);
1885 }
1886 ++idx_lvl;
1887 }
1888
1889 uint32_t const_offset = 0;
1890 LLVMValueRef offset = NULL;
1891
1892 if (var->data.compact) {
1893 assert(instr->deref_type == nir_deref_type_array);
1894 const_offset = nir_src_as_uint(instr->arr.index);
1895 goto out;
1896 }
1897
1898 for (; path.path[idx_lvl]; ++idx_lvl) {
1899 const struct glsl_type *parent_type = path.path[idx_lvl - 1]->type;
1900 if (path.path[idx_lvl]->deref_type == nir_deref_type_struct) {
1901 unsigned index = path.path[idx_lvl]->strct.index;
1902
1903 for (unsigned i = 0; i < index; i++) {
1904 const struct glsl_type *ft = glsl_get_struct_field(parent_type, i);
1905 const_offset += glsl_count_attribute_slots(ft, vs_in);
1906 }
1907 } else if(path.path[idx_lvl]->deref_type == nir_deref_type_array) {
1908 unsigned size = glsl_count_attribute_slots(path.path[idx_lvl]->type, vs_in);
1909 LLVMValueRef array_off = LLVMBuildMul(ctx->ac.builder, LLVMConstInt(ctx->ac.i32, size, 0),
1910 get_src(ctx, path.path[idx_lvl]->arr.index), "");
1911 if (offset)
1912 offset = LLVMBuildAdd(ctx->ac.builder, offset, array_off, "");
1913 else
1914 offset = array_off;
1915 } else
1916 unreachable("Uhandled deref type in get_deref_instr_offset");
1917 }
1918
1919 out:
1920 nir_deref_path_finish(&path);
1921
1922 if (const_offset && offset)
1923 offset = LLVMBuildAdd(ctx->ac.builder, offset,
1924 LLVMConstInt(ctx->ac.i32, const_offset, 0),
1925 "");
1926
1927 *const_out = const_offset;
1928 *indir_out = offset;
1929 }
1930
1931 static LLVMValueRef load_tess_varyings(struct ac_nir_context *ctx,
1932 nir_intrinsic_instr *instr,
1933 bool load_inputs)
1934 {
1935 LLVMValueRef result;
1936 LLVMValueRef vertex_index = NULL;
1937 LLVMValueRef indir_index = NULL;
1938 unsigned const_index = 0;
1939
1940 nir_variable *var = nir_deref_instr_get_variable(nir_instr_as_deref(instr->src[0].ssa->parent_instr));
1941
1942 unsigned location = var->data.location;
1943 unsigned driver_location = var->data.driver_location;
1944 const bool is_patch = var->data.patch;
1945 const bool is_compact = var->data.compact;
1946
1947 get_deref_offset(ctx, nir_instr_as_deref(instr->src[0].ssa->parent_instr),
1948 false, NULL, is_patch ? NULL : &vertex_index,
1949 &const_index, &indir_index);
1950
1951 LLVMTypeRef dest_type = get_def_type(ctx, &instr->dest.ssa);
1952
1953 LLVMTypeRef src_component_type;
1954 if (LLVMGetTypeKind(dest_type) == LLVMVectorTypeKind)
1955 src_component_type = LLVMGetElementType(dest_type);
1956 else
1957 src_component_type = dest_type;
1958
1959 result = ctx->abi->load_tess_varyings(ctx->abi, src_component_type,
1960 vertex_index, indir_index,
1961 const_index, location, driver_location,
1962 var->data.location_frac,
1963 instr->num_components,
1964 is_patch, is_compact, load_inputs);
1965 if (instr->dest.ssa.bit_size == 16) {
1966 result = ac_to_integer(&ctx->ac, result);
1967 result = LLVMBuildTrunc(ctx->ac.builder, result, dest_type, "");
1968 }
1969 return LLVMBuildBitCast(ctx->ac.builder, result, dest_type, "");
1970 }
1971
1972 static unsigned
1973 type_scalar_size_bytes(const struct glsl_type *type)
1974 {
1975 assert(glsl_type_is_vector_or_scalar(type) ||
1976 glsl_type_is_matrix(type));
1977 return glsl_type_is_boolean(type) ? 4 : glsl_get_bit_size(type) / 8;
1978 }
1979
1980 static LLVMValueRef visit_load_var(struct ac_nir_context *ctx,
1981 nir_intrinsic_instr *instr)
1982 {
1983 nir_deref_instr *deref = nir_instr_as_deref(instr->src[0].ssa->parent_instr);
1984 nir_variable *var = nir_deref_instr_get_variable(deref);
1985
1986 LLVMValueRef values[8];
1987 int idx = 0;
1988 int ve = instr->dest.ssa.num_components;
1989 unsigned comp = 0;
1990 LLVMValueRef indir_index;
1991 LLVMValueRef ret;
1992 unsigned const_index;
1993 unsigned stride = 4;
1994 int mode = deref->mode;
1995
1996 if (var) {
1997 bool vs_in = ctx->stage == MESA_SHADER_VERTEX &&
1998 var->data.mode == nir_var_shader_in;
1999 idx = var->data.driver_location;
2000 comp = var->data.location_frac;
2001 mode = var->data.mode;
2002
2003 get_deref_offset(ctx, deref, vs_in, NULL, NULL,
2004 &const_index, &indir_index);
2005
2006 if (var->data.compact) {
2007 stride = 1;
2008 const_index += comp;
2009 comp = 0;
2010 }
2011 }
2012
2013 if (instr->dest.ssa.bit_size == 64 &&
2014 (deref->mode == nir_var_shader_in ||
2015 deref->mode == nir_var_shader_out ||
2016 deref->mode == nir_var_function_temp))
2017 ve *= 2;
2018
2019 switch (mode) {
2020 case nir_var_shader_in:
2021 if (ctx->stage == MESA_SHADER_TESS_CTRL ||
2022 ctx->stage == MESA_SHADER_TESS_EVAL) {
2023 return load_tess_varyings(ctx, instr, true);
2024 }
2025
2026 if (ctx->stage == MESA_SHADER_GEOMETRY) {
2027 LLVMTypeRef type = LLVMIntTypeInContext(ctx->ac.context, instr->dest.ssa.bit_size);
2028 LLVMValueRef indir_index;
2029 unsigned const_index, vertex_index;
2030 get_deref_offset(ctx, deref, false, &vertex_index, NULL,
2031 &const_index, &indir_index);
2032
2033 return ctx->abi->load_inputs(ctx->abi, var->data.location,
2034 var->data.driver_location,
2035 var->data.location_frac,
2036 instr->num_components, vertex_index, const_index, type);
2037 }
2038
2039 for (unsigned chan = comp; chan < ve + comp; chan++) {
2040 if (indir_index) {
2041 unsigned count = glsl_count_attribute_slots(
2042 var->type,
2043 ctx->stage == MESA_SHADER_VERTEX);
2044 count -= chan / 4;
2045 LLVMValueRef tmp_vec = ac_build_gather_values_extended(
2046 &ctx->ac, ctx->abi->inputs + idx + chan, count,
2047 stride, false, true);
2048
2049 values[chan] = LLVMBuildExtractElement(ctx->ac.builder,
2050 tmp_vec,
2051 indir_index, "");
2052 } else
2053 values[chan] = ctx->abi->inputs[idx + chan + const_index * stride];
2054 }
2055 break;
2056 case nir_var_function_temp:
2057 for (unsigned chan = 0; chan < ve; chan++) {
2058 if (indir_index) {
2059 unsigned count = glsl_count_attribute_slots(
2060 var->type, false);
2061 count -= chan / 4;
2062 LLVMValueRef tmp_vec = ac_build_gather_values_extended(
2063 &ctx->ac, ctx->locals + idx + chan, count,
2064 stride, true, true);
2065
2066 values[chan] = LLVMBuildExtractElement(ctx->ac.builder,
2067 tmp_vec,
2068 indir_index, "");
2069 } else {
2070 values[chan] = LLVMBuildLoad(ctx->ac.builder, ctx->locals[idx + chan + const_index * stride], "");
2071 }
2072 }
2073 break;
2074 case nir_var_mem_shared: {
2075 LLVMValueRef address = get_src(ctx, instr->src[0]);
2076 LLVMValueRef val = LLVMBuildLoad(ctx->ac.builder, address, "");
2077 return LLVMBuildBitCast(ctx->ac.builder, val,
2078 get_def_type(ctx, &instr->dest.ssa),
2079 "");
2080 }
2081 case nir_var_shader_out:
2082 if (ctx->stage == MESA_SHADER_TESS_CTRL) {
2083 return load_tess_varyings(ctx, instr, false);
2084 }
2085
2086 if (ctx->stage == MESA_SHADER_FRAGMENT &&
2087 var->data.fb_fetch_output &&
2088 ctx->abi->emit_fbfetch)
2089 return ctx->abi->emit_fbfetch(ctx->abi);
2090
2091 for (unsigned chan = comp; chan < ve + comp; chan++) {
2092 if (indir_index) {
2093 unsigned count = glsl_count_attribute_slots(
2094 var->type, false);
2095 count -= chan / 4;
2096 LLVMValueRef tmp_vec = ac_build_gather_values_extended(
2097 &ctx->ac, ctx->abi->outputs + idx + chan, count,
2098 stride, true, true);
2099
2100 values[chan] = LLVMBuildExtractElement(ctx->ac.builder,
2101 tmp_vec,
2102 indir_index, "");
2103 } else {
2104 values[chan] = LLVMBuildLoad(ctx->ac.builder,
2105 ctx->abi->outputs[idx + chan + const_index * stride],
2106 "");
2107 }
2108 }
2109 break;
2110 case nir_var_mem_global: {
2111 LLVMValueRef address = get_src(ctx, instr->src[0]);
2112 unsigned explicit_stride = glsl_get_explicit_stride(deref->type);
2113 unsigned natural_stride = type_scalar_size_bytes(deref->type);
2114 unsigned stride = explicit_stride ? explicit_stride : natural_stride;
2115
2116 LLVMTypeRef result_type = get_def_type(ctx, &instr->dest.ssa);
2117 if (stride != natural_stride) {
2118 LLVMTypeRef ptr_type = LLVMPointerType(LLVMGetElementType(result_type),
2119 LLVMGetPointerAddressSpace(LLVMTypeOf(address)));
2120 address = LLVMBuildBitCast(ctx->ac.builder, address, ptr_type , "");
2121
2122 for (unsigned i = 0; i < instr->dest.ssa.num_components; ++i) {
2123 LLVMValueRef offset = LLVMConstInt(ctx->ac.i32, i * stride / natural_stride, 0);
2124 values[i] = LLVMBuildLoad(ctx->ac.builder,
2125 ac_build_gep_ptr(&ctx->ac, address, offset), "");
2126 }
2127 return ac_build_gather_values(&ctx->ac, values, instr->dest.ssa.num_components);
2128 } else {
2129 LLVMTypeRef ptr_type = LLVMPointerType(result_type,
2130 LLVMGetPointerAddressSpace(LLVMTypeOf(address)));
2131 address = LLVMBuildBitCast(ctx->ac.builder, address, ptr_type , "");
2132 LLVMValueRef val = LLVMBuildLoad(ctx->ac.builder, address, "");
2133 return val;
2134 }
2135 }
2136 default:
2137 unreachable("unhandle variable mode");
2138 }
2139 ret = ac_build_varying_gather_values(&ctx->ac, values, ve, comp);
2140 return LLVMBuildBitCast(ctx->ac.builder, ret, get_def_type(ctx, &instr->dest.ssa), "");
2141 }
2142
2143 static void
2144 visit_store_var(struct ac_nir_context *ctx,
2145 nir_intrinsic_instr *instr)
2146 {
2147 nir_deref_instr *deref = nir_instr_as_deref(instr->src[0].ssa->parent_instr);
2148 nir_variable *var = nir_deref_instr_get_variable(deref);
2149
2150 LLVMValueRef temp_ptr, value;
2151 int idx = 0;
2152 unsigned comp = 0;
2153 LLVMValueRef src = ac_to_float(&ctx->ac, get_src(ctx, instr->src[1]));
2154 int writemask = instr->const_index[0];
2155 LLVMValueRef indir_index;
2156 unsigned const_index;
2157
2158 if (var) {
2159 get_deref_offset(ctx, deref, false,
2160 NULL, NULL, &const_index, &indir_index);
2161 idx = var->data.driver_location;
2162 comp = var->data.location_frac;
2163
2164 if (var->data.compact) {
2165 const_index += comp;
2166 comp = 0;
2167 }
2168 }
2169
2170 if (ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src)) == 64 &&
2171 (deref->mode == nir_var_shader_out ||
2172 deref->mode == nir_var_function_temp)) {
2173
2174 src = LLVMBuildBitCast(ctx->ac.builder, src,
2175 LLVMVectorType(ctx->ac.f32, ac_get_llvm_num_components(src) * 2),
2176 "");
2177
2178 writemask = widen_mask(writemask, 2);
2179 }
2180
2181 writemask = writemask << comp;
2182
2183 switch (deref->mode) {
2184 case nir_var_shader_out:
2185
2186 if (ctx->stage == MESA_SHADER_TESS_CTRL) {
2187 LLVMValueRef vertex_index = NULL;
2188 LLVMValueRef indir_index = NULL;
2189 unsigned const_index = 0;
2190 const bool is_patch = var->data.patch;
2191
2192 get_deref_offset(ctx, deref, false, NULL,
2193 is_patch ? NULL : &vertex_index,
2194 &const_index, &indir_index);
2195
2196 ctx->abi->store_tcs_outputs(ctx->abi, var,
2197 vertex_index, indir_index,
2198 const_index, src, writemask);
2199 return;
2200 }
2201
2202 for (unsigned chan = 0; chan < 8; chan++) {
2203 int stride = 4;
2204 if (!(writemask & (1 << chan)))
2205 continue;
2206
2207 value = ac_llvm_extract_elem(&ctx->ac, src, chan - comp);
2208
2209 if (var->data.compact)
2210 stride = 1;
2211 if (indir_index) {
2212 unsigned count = glsl_count_attribute_slots(
2213 var->type, false);
2214 count -= chan / 4;
2215 LLVMValueRef tmp_vec = ac_build_gather_values_extended(
2216 &ctx->ac, ctx->abi->outputs + idx + chan, count,
2217 stride, true, true);
2218
2219 tmp_vec = LLVMBuildInsertElement(ctx->ac.builder, tmp_vec,
2220 value, indir_index, "");
2221 build_store_values_extended(&ctx->ac, ctx->abi->outputs + idx + chan,
2222 count, stride, tmp_vec);
2223
2224 } else {
2225 temp_ptr = ctx->abi->outputs[idx + chan + const_index * stride];
2226
2227 LLVMBuildStore(ctx->ac.builder, value, temp_ptr);
2228 }
2229 }
2230 break;
2231 case nir_var_function_temp:
2232 for (unsigned chan = 0; chan < 8; chan++) {
2233 if (!(writemask & (1 << chan)))
2234 continue;
2235
2236 value = ac_llvm_extract_elem(&ctx->ac, src, chan);
2237 if (indir_index) {
2238 unsigned count = glsl_count_attribute_slots(
2239 var->type, false);
2240 count -= chan / 4;
2241 LLVMValueRef tmp_vec = ac_build_gather_values_extended(
2242 &ctx->ac, ctx->locals + idx + chan, count,
2243 4, true, true);
2244
2245 tmp_vec = LLVMBuildInsertElement(ctx->ac.builder, tmp_vec,
2246 value, indir_index, "");
2247 build_store_values_extended(&ctx->ac, ctx->locals + idx + chan,
2248 count, 4, tmp_vec);
2249 } else {
2250 temp_ptr = ctx->locals[idx + chan + const_index * 4];
2251
2252 LLVMBuildStore(ctx->ac.builder, value, temp_ptr);
2253 }
2254 }
2255 break;
2256
2257 case nir_var_mem_global:
2258 case nir_var_mem_shared: {
2259 int writemask = instr->const_index[0];
2260 LLVMValueRef address = get_src(ctx, instr->src[0]);
2261 LLVMValueRef val = get_src(ctx, instr->src[1]);
2262
2263 unsigned explicit_stride = glsl_get_explicit_stride(deref->type);
2264 unsigned natural_stride = type_scalar_size_bytes(deref->type);
2265 unsigned stride = explicit_stride ? explicit_stride : natural_stride;
2266
2267 LLVMTypeRef ptr_type = LLVMPointerType(LLVMTypeOf(val),
2268 LLVMGetPointerAddressSpace(LLVMTypeOf(address)));
2269 address = LLVMBuildBitCast(ctx->ac.builder, address, ptr_type , "");
2270
2271 if (writemask == (1u << ac_get_llvm_num_components(val)) - 1 &&
2272 stride == natural_stride) {
2273 LLVMTypeRef ptr_type = LLVMPointerType(LLVMTypeOf(val),
2274 LLVMGetPointerAddressSpace(LLVMTypeOf(address)));
2275 address = LLVMBuildBitCast(ctx->ac.builder, address, ptr_type , "");
2276
2277 val = LLVMBuildBitCast(ctx->ac.builder, val,
2278 LLVMGetElementType(LLVMTypeOf(address)), "");
2279 LLVMBuildStore(ctx->ac.builder, val, address);
2280 } else {
2281 LLVMTypeRef ptr_type = LLVMPointerType(LLVMGetElementType(LLVMTypeOf(val)),
2282 LLVMGetPointerAddressSpace(LLVMTypeOf(address)));
2283 address = LLVMBuildBitCast(ctx->ac.builder, address, ptr_type , "");
2284 for (unsigned chan = 0; chan < 4; chan++) {
2285 if (!(writemask & (1 << chan)))
2286 continue;
2287
2288 LLVMValueRef offset = LLVMConstInt(ctx->ac.i32, chan * stride / natural_stride, 0);
2289
2290 LLVMValueRef ptr = ac_build_gep_ptr(&ctx->ac, address, offset);
2291 LLVMValueRef src = ac_llvm_extract_elem(&ctx->ac, val,
2292 chan);
2293 src = LLVMBuildBitCast(ctx->ac.builder, src,
2294 LLVMGetElementType(LLVMTypeOf(ptr)), "");
2295 LLVMBuildStore(ctx->ac.builder, src, ptr);
2296 }
2297 }
2298 break;
2299 }
2300 default:
2301 abort();
2302 break;
2303 }
2304 }
2305
2306 static int image_type_to_components_count(enum glsl_sampler_dim dim, bool array)
2307 {
2308 switch (dim) {
2309 case GLSL_SAMPLER_DIM_BUF:
2310 return 1;
2311 case GLSL_SAMPLER_DIM_1D:
2312 return array ? 2 : 1;
2313 case GLSL_SAMPLER_DIM_2D:
2314 return array ? 3 : 2;
2315 case GLSL_SAMPLER_DIM_MS:
2316 return array ? 4 : 3;
2317 case GLSL_SAMPLER_DIM_3D:
2318 case GLSL_SAMPLER_DIM_CUBE:
2319 return 3;
2320 case GLSL_SAMPLER_DIM_RECT:
2321 case GLSL_SAMPLER_DIM_SUBPASS:
2322 return 2;
2323 case GLSL_SAMPLER_DIM_SUBPASS_MS:
2324 return 3;
2325 default:
2326 break;
2327 }
2328 return 0;
2329 }
2330
2331 static LLVMValueRef adjust_sample_index_using_fmask(struct ac_llvm_context *ctx,
2332 LLVMValueRef coord_x, LLVMValueRef coord_y,
2333 LLVMValueRef coord_z,
2334 LLVMValueRef sample_index,
2335 LLVMValueRef fmask_desc_ptr)
2336 {
2337 unsigned sample_chan = coord_z ? 3 : 2;
2338 LLVMValueRef addr[4] = {coord_x, coord_y, coord_z};
2339 addr[sample_chan] = sample_index;
2340
2341 ac_apply_fmask_to_sample(ctx, fmask_desc_ptr, addr, coord_z != NULL);
2342 return addr[sample_chan];
2343 }
2344
2345 static nir_deref_instr *get_image_deref(const nir_intrinsic_instr *instr)
2346 {
2347 assert(instr->src[0].is_ssa);
2348 return nir_instr_as_deref(instr->src[0].ssa->parent_instr);
2349 }
2350
2351 static LLVMValueRef get_image_descriptor(struct ac_nir_context *ctx,
2352 const nir_intrinsic_instr *instr,
2353 enum ac_descriptor_type desc_type,
2354 bool write)
2355 {
2356 nir_deref_instr *deref_instr =
2357 instr->src[0].ssa->parent_instr->type == nir_instr_type_deref ?
2358 nir_instr_as_deref(instr->src[0].ssa->parent_instr) : NULL;
2359
2360 return get_sampler_desc(ctx, deref_instr, desc_type, &instr->instr, true, write);
2361 }
2362
2363 static void get_image_coords(struct ac_nir_context *ctx,
2364 const nir_intrinsic_instr *instr,
2365 struct ac_image_args *args,
2366 enum glsl_sampler_dim dim,
2367 bool is_array)
2368 {
2369 LLVMValueRef src0 = get_src(ctx, instr->src[1]);
2370 LLVMValueRef masks[] = {
2371 LLVMConstInt(ctx->ac.i32, 0, false), LLVMConstInt(ctx->ac.i32, 1, false),
2372 LLVMConstInt(ctx->ac.i32, 2, false), LLVMConstInt(ctx->ac.i32, 3, false),
2373 };
2374 LLVMValueRef sample_index = ac_llvm_extract_elem(&ctx->ac, get_src(ctx, instr->src[2]), 0);
2375
2376 int count;
2377 ASSERTED bool add_frag_pos = (dim == GLSL_SAMPLER_DIM_SUBPASS ||
2378 dim == GLSL_SAMPLER_DIM_SUBPASS_MS);
2379 bool is_ms = (dim == GLSL_SAMPLER_DIM_MS ||
2380 dim == GLSL_SAMPLER_DIM_SUBPASS_MS);
2381 bool gfx9_1d = ctx->ac.chip_class == GFX9 && dim == GLSL_SAMPLER_DIM_1D;
2382 assert(!add_frag_pos && "Input attachments should be lowered by this point.");
2383 count = image_type_to_components_count(dim, is_array);
2384
2385 if (is_ms && (instr->intrinsic == nir_intrinsic_image_deref_load ||
2386 instr->intrinsic == nir_intrinsic_bindless_image_load)) {
2387 LLVMValueRef fmask_load_address[3];
2388
2389 fmask_load_address[0] = LLVMBuildExtractElement(ctx->ac.builder, src0, masks[0], "");
2390 fmask_load_address[1] = LLVMBuildExtractElement(ctx->ac.builder, src0, masks[1], "");
2391 if (is_array)
2392 fmask_load_address[2] = LLVMBuildExtractElement(ctx->ac.builder, src0, masks[2], "");
2393 else
2394 fmask_load_address[2] = NULL;
2395
2396 sample_index = adjust_sample_index_using_fmask(&ctx->ac,
2397 fmask_load_address[0],
2398 fmask_load_address[1],
2399 fmask_load_address[2],
2400 sample_index,
2401 get_sampler_desc(ctx, nir_instr_as_deref(instr->src[0].ssa->parent_instr),
2402 AC_DESC_FMASK, &instr->instr, false, false));
2403 }
2404 if (count == 1 && !gfx9_1d) {
2405 if (instr->src[1].ssa->num_components)
2406 args->coords[0] = LLVMBuildExtractElement(ctx->ac.builder, src0, masks[0], "");
2407 else
2408 args->coords[0] = src0;
2409 } else {
2410 int chan;
2411 if (is_ms)
2412 count--;
2413 for (chan = 0; chan < count; ++chan) {
2414 args->coords[chan] = ac_llvm_extract_elem(&ctx->ac, src0, chan);
2415 }
2416
2417 if (gfx9_1d) {
2418 if (is_array) {
2419 args->coords[2] = args->coords[1];
2420 args->coords[1] = ctx->ac.i32_0;
2421 } else
2422 args->coords[1] = ctx->ac.i32_0;
2423 count++;
2424 }
2425
2426 if (is_ms) {
2427 args->coords[count] = sample_index;
2428 count++;
2429 }
2430 }
2431 }
2432
2433 static LLVMValueRef get_image_buffer_descriptor(struct ac_nir_context *ctx,
2434 const nir_intrinsic_instr *instr,
2435 bool write, bool atomic)
2436 {
2437 LLVMValueRef rsrc = get_image_descriptor(ctx, instr, AC_DESC_BUFFER, write);
2438 if (ctx->abi->gfx9_stride_size_workaround ||
2439 (ctx->abi->gfx9_stride_size_workaround_for_atomic && atomic)) {
2440 LLVMValueRef elem_count = LLVMBuildExtractElement(ctx->ac.builder, rsrc, LLVMConstInt(ctx->ac.i32, 2, 0), "");
2441 LLVMValueRef stride = LLVMBuildExtractElement(ctx->ac.builder, rsrc, LLVMConstInt(ctx->ac.i32, 1, 0), "");
2442 stride = LLVMBuildLShr(ctx->ac.builder, stride, LLVMConstInt(ctx->ac.i32, 16, 0), "");
2443
2444 LLVMValueRef new_elem_count = LLVMBuildSelect(ctx->ac.builder,
2445 LLVMBuildICmp(ctx->ac.builder, LLVMIntUGT, elem_count, stride, ""),
2446 elem_count, stride, "");
2447
2448 rsrc = LLVMBuildInsertElement(ctx->ac.builder, rsrc, new_elem_count,
2449 LLVMConstInt(ctx->ac.i32, 2, 0), "");
2450 }
2451 return rsrc;
2452 }
2453
2454 static LLVMValueRef visit_image_load(struct ac_nir_context *ctx,
2455 const nir_intrinsic_instr *instr,
2456 bool bindless)
2457 {
2458 LLVMValueRef res;
2459
2460 enum glsl_sampler_dim dim;
2461 enum gl_access_qualifier access;
2462 bool is_array;
2463 if (bindless) {
2464 dim = nir_intrinsic_image_dim(instr);
2465 access = nir_intrinsic_access(instr);
2466 is_array = nir_intrinsic_image_array(instr);
2467 } else {
2468 const nir_deref_instr *image_deref = get_image_deref(instr);
2469 const struct glsl_type *type = image_deref->type;
2470 const nir_variable *var = nir_deref_instr_get_variable(image_deref);
2471 dim = glsl_get_sampler_dim(type);
2472 access = var->data.image.access;
2473 is_array = glsl_sampler_type_is_array(type);
2474 }
2475
2476 struct ac_image_args args = {};
2477
2478 args.cache_policy = get_cache_policy(ctx, access, false, false);
2479
2480 if (dim == GLSL_SAMPLER_DIM_BUF) {
2481 unsigned mask = nir_ssa_def_components_read(&instr->dest.ssa);
2482 unsigned num_channels = util_last_bit(mask);
2483 LLVMValueRef rsrc, vindex;
2484
2485 rsrc = get_image_buffer_descriptor(ctx, instr, false, false);
2486 vindex = LLVMBuildExtractElement(ctx->ac.builder, get_src(ctx, instr->src[1]),
2487 ctx->ac.i32_0, "");
2488
2489 bool can_speculate = access & ACCESS_CAN_REORDER;
2490 res = ac_build_buffer_load_format(&ctx->ac, rsrc, vindex,
2491 ctx->ac.i32_0, num_channels,
2492 args.cache_policy,
2493 can_speculate);
2494 res = ac_build_expand_to_vec4(&ctx->ac, res, num_channels);
2495
2496 res = ac_trim_vector(&ctx->ac, res, instr->dest.ssa.num_components);
2497 res = ac_to_integer(&ctx->ac, res);
2498 } else {
2499 args.opcode = ac_image_load;
2500 get_image_coords(ctx, instr, &args, dim, is_array);
2501 args.resource = get_image_descriptor(ctx, instr, AC_DESC_IMAGE, false);
2502 args.dim = get_ac_image_dim(&ctx->ac, dim, is_array);
2503 args.dmask = 15;
2504 args.attributes = AC_FUNC_ATTR_READONLY;
2505
2506 res = ac_build_image_opcode(&ctx->ac, &args);
2507 }
2508 return res;
2509 }
2510
2511 static void visit_image_store(struct ac_nir_context *ctx,
2512 nir_intrinsic_instr *instr,
2513 bool bindless)
2514 {
2515
2516
2517 enum glsl_sampler_dim dim;
2518 enum gl_access_qualifier access;
2519 bool is_array;
2520 if (bindless) {
2521 dim = nir_intrinsic_image_dim(instr);
2522 access = nir_intrinsic_access(instr);
2523 is_array = nir_intrinsic_image_array(instr);
2524 } else {
2525 const nir_deref_instr *image_deref = get_image_deref(instr);
2526 const struct glsl_type *type = image_deref->type;
2527 const nir_variable *var = nir_deref_instr_get_variable(image_deref);
2528 dim = glsl_get_sampler_dim(type);
2529 access = var->data.image.access;
2530 is_array = glsl_sampler_type_is_array(type);
2531 }
2532
2533 bool writeonly_memory = access & ACCESS_NON_READABLE;
2534 struct ac_image_args args = {};
2535
2536 args.cache_policy = get_cache_policy(ctx, access, true, writeonly_memory);
2537
2538 if (dim == GLSL_SAMPLER_DIM_BUF) {
2539 LLVMValueRef rsrc = get_image_buffer_descriptor(ctx, instr, true, false);
2540 LLVMValueRef src = ac_to_float(&ctx->ac, get_src(ctx, instr->src[3]));
2541 unsigned src_channels = ac_get_llvm_num_components(src);
2542 LLVMValueRef vindex;
2543
2544 if (src_channels == 3)
2545 src = ac_build_expand_to_vec4(&ctx->ac, src, 3);
2546
2547 vindex = LLVMBuildExtractElement(ctx->ac.builder,
2548 get_src(ctx, instr->src[1]),
2549 ctx->ac.i32_0, "");
2550
2551 ac_build_buffer_store_format(&ctx->ac, rsrc, src, vindex,
2552 ctx->ac.i32_0, src_channels,
2553 args.cache_policy);
2554 } else {
2555 args.opcode = ac_image_store;
2556 args.data[0] = ac_to_float(&ctx->ac, get_src(ctx, instr->src[3]));
2557 get_image_coords(ctx, instr, &args, dim, is_array);
2558 args.resource = get_image_descriptor(ctx, instr, AC_DESC_IMAGE, true);
2559 args.dim = get_ac_image_dim(&ctx->ac, dim, is_array);
2560 args.dmask = 15;
2561
2562 ac_build_image_opcode(&ctx->ac, &args);
2563 }
2564
2565 }
2566
2567 static LLVMValueRef visit_image_atomic(struct ac_nir_context *ctx,
2568 const nir_intrinsic_instr *instr,
2569 bool bindless)
2570 {
2571 LLVMValueRef params[7];
2572 int param_count = 0;
2573
2574 bool cmpswap = instr->intrinsic == nir_intrinsic_image_deref_atomic_comp_swap ||
2575 instr->intrinsic == nir_intrinsic_bindless_image_atomic_comp_swap;
2576 const char *atomic_name;
2577 char intrinsic_name[64];
2578 enum ac_atomic_op atomic_subop;
2579 ASSERTED int length;
2580
2581 enum glsl_sampler_dim dim;
2582 bool is_unsigned = false;
2583 bool is_array;
2584 if (bindless) {
2585 if (instr->intrinsic == nir_intrinsic_bindless_image_atomic_min ||
2586 instr->intrinsic == nir_intrinsic_bindless_image_atomic_max) {
2587 const GLenum format = nir_intrinsic_format(instr);
2588 assert(format == GL_R32UI || format == GL_R32I);
2589 is_unsigned = format == GL_R32UI;
2590 }
2591 dim = nir_intrinsic_image_dim(instr);
2592 is_array = nir_intrinsic_image_array(instr);
2593 } else {
2594 const struct glsl_type *type = get_image_deref(instr)->type;
2595 is_unsigned = glsl_get_sampler_result_type(type) == GLSL_TYPE_UINT;
2596 dim = glsl_get_sampler_dim(type);
2597 is_array = glsl_sampler_type_is_array(type);
2598 }
2599
2600 switch (instr->intrinsic) {
2601 case nir_intrinsic_bindless_image_atomic_add:
2602 case nir_intrinsic_image_deref_atomic_add:
2603 atomic_name = "add";
2604 atomic_subop = ac_atomic_add;
2605 break;
2606 case nir_intrinsic_bindless_image_atomic_min:
2607 case nir_intrinsic_image_deref_atomic_min:
2608 atomic_name = is_unsigned ? "umin" : "smin";
2609 atomic_subop = is_unsigned ? ac_atomic_umin : ac_atomic_smin;
2610 break;
2611 case nir_intrinsic_bindless_image_atomic_max:
2612 case nir_intrinsic_image_deref_atomic_max:
2613 atomic_name = is_unsigned ? "umax" : "smax";
2614 atomic_subop = is_unsigned ? ac_atomic_umax : ac_atomic_smax;
2615 break;
2616 case nir_intrinsic_bindless_image_atomic_and:
2617 case nir_intrinsic_image_deref_atomic_and:
2618 atomic_name = "and";
2619 atomic_subop = ac_atomic_and;
2620 break;
2621 case nir_intrinsic_bindless_image_atomic_or:
2622 case nir_intrinsic_image_deref_atomic_or:
2623 atomic_name = "or";
2624 atomic_subop = ac_atomic_or;
2625 break;
2626 case nir_intrinsic_bindless_image_atomic_xor:
2627 case nir_intrinsic_image_deref_atomic_xor:
2628 atomic_name = "xor";
2629 atomic_subop = ac_atomic_xor;
2630 break;
2631 case nir_intrinsic_bindless_image_atomic_exchange:
2632 case nir_intrinsic_image_deref_atomic_exchange:
2633 atomic_name = "swap";
2634 atomic_subop = ac_atomic_swap;
2635 break;
2636 case nir_intrinsic_bindless_image_atomic_comp_swap:
2637 case nir_intrinsic_image_deref_atomic_comp_swap:
2638 atomic_name = "cmpswap";
2639 atomic_subop = 0; /* not used */
2640 break;
2641 default:
2642 abort();
2643 }
2644
2645 if (cmpswap)
2646 params[param_count++] = get_src(ctx, instr->src[4]);
2647 params[param_count++] = get_src(ctx, instr->src[3]);
2648
2649 if (dim == GLSL_SAMPLER_DIM_BUF) {
2650 params[param_count++] = get_image_buffer_descriptor(ctx, instr, true, true);
2651 params[param_count++] = LLVMBuildExtractElement(ctx->ac.builder, get_src(ctx, instr->src[1]),
2652 ctx->ac.i32_0, ""); /* vindex */
2653 params[param_count++] = ctx->ac.i32_0; /* voffset */
2654 if (HAVE_LLVM >= 0x900) {
2655 /* XXX: The new raw/struct atomic intrinsics are buggy
2656 * with LLVM 8, see r358579.
2657 */
2658 params[param_count++] = ctx->ac.i32_0; /* soffset */
2659 params[param_count++] = ctx->ac.i32_0; /* slc */
2660
2661 length = snprintf(intrinsic_name, sizeof(intrinsic_name),
2662 "llvm.amdgcn.struct.buffer.atomic.%s.i32", atomic_name);
2663 } else {
2664 params[param_count++] = ctx->ac.i1false; /* slc */
2665
2666 length = snprintf(intrinsic_name, sizeof(intrinsic_name),
2667 "llvm.amdgcn.buffer.atomic.%s", atomic_name);
2668 }
2669
2670 assert(length < sizeof(intrinsic_name));
2671 return ac_build_intrinsic(&ctx->ac, intrinsic_name, ctx->ac.i32,
2672 params, param_count, 0);
2673 } else {
2674 struct ac_image_args args = {};
2675 args.opcode = cmpswap ? ac_image_atomic_cmpswap : ac_image_atomic;
2676 args.atomic = atomic_subop;
2677 args.data[0] = params[0];
2678 if (cmpswap)
2679 args.data[1] = params[1];
2680 get_image_coords(ctx, instr, &args, dim, is_array);
2681 args.resource = get_image_descriptor(ctx, instr, AC_DESC_IMAGE, true);
2682 args.dim = get_ac_image_dim(&ctx->ac, dim, is_array);
2683
2684 return ac_build_image_opcode(&ctx->ac, &args);
2685 }
2686 }
2687
2688 static LLVMValueRef visit_image_samples(struct ac_nir_context *ctx,
2689 const nir_intrinsic_instr *instr,
2690 bool bindless)
2691 {
2692 enum glsl_sampler_dim dim;
2693 bool is_array;
2694 if (bindless) {
2695 dim = nir_intrinsic_image_dim(instr);
2696 is_array = nir_intrinsic_image_array(instr);
2697 } else {
2698 const struct glsl_type *type = get_image_deref(instr)->type;
2699 dim = glsl_get_sampler_dim(type);
2700 is_array = glsl_sampler_type_is_array(type);
2701 }
2702
2703 struct ac_image_args args = { 0 };
2704 args.dim = get_ac_sampler_dim(&ctx->ac, dim, is_array);
2705 args.dmask = 0xf;
2706 args.resource = get_image_descriptor(ctx, instr, AC_DESC_IMAGE, false);
2707 args.opcode = ac_image_get_resinfo;
2708 args.lod = ctx->ac.i32_0;
2709 args.attributes = AC_FUNC_ATTR_READNONE;
2710
2711 return ac_build_image_opcode(&ctx->ac, &args);
2712 }
2713
2714 static LLVMValueRef visit_image_size(struct ac_nir_context *ctx,
2715 const nir_intrinsic_instr *instr,
2716 bool bindless)
2717 {
2718 LLVMValueRef res;
2719
2720 enum glsl_sampler_dim dim;
2721 bool is_array;
2722 if (bindless) {
2723 dim = nir_intrinsic_image_dim(instr);
2724 is_array = nir_intrinsic_image_array(instr);
2725 } else {
2726 const struct glsl_type *type = get_image_deref(instr)->type;
2727 dim = glsl_get_sampler_dim(type);
2728 is_array = glsl_sampler_type_is_array(type);
2729 }
2730
2731 if (dim == GLSL_SAMPLER_DIM_BUF)
2732 return get_buffer_size(ctx, get_image_descriptor(ctx, instr, AC_DESC_BUFFER, false), true);
2733
2734 struct ac_image_args args = { 0 };
2735
2736 args.dim = get_ac_image_dim(&ctx->ac, dim, is_array);
2737 args.dmask = 0xf;
2738 args.resource = get_image_descriptor(ctx, instr, AC_DESC_IMAGE, false);
2739 args.opcode = ac_image_get_resinfo;
2740 args.lod = ctx->ac.i32_0;
2741 args.attributes = AC_FUNC_ATTR_READNONE;
2742
2743 res = ac_build_image_opcode(&ctx->ac, &args);
2744
2745 LLVMValueRef two = LLVMConstInt(ctx->ac.i32, 2, false);
2746
2747 if (dim == GLSL_SAMPLER_DIM_CUBE && is_array) {
2748 LLVMValueRef six = LLVMConstInt(ctx->ac.i32, 6, false);
2749 LLVMValueRef z = LLVMBuildExtractElement(ctx->ac.builder, res, two, "");
2750 z = LLVMBuildSDiv(ctx->ac.builder, z, six, "");
2751 res = LLVMBuildInsertElement(ctx->ac.builder, res, z, two, "");
2752 }
2753 if (ctx->ac.chip_class == GFX9 && dim == GLSL_SAMPLER_DIM_1D && is_array) {
2754 LLVMValueRef layers = LLVMBuildExtractElement(ctx->ac.builder, res, two, "");
2755 res = LLVMBuildInsertElement(ctx->ac.builder, res, layers,
2756 ctx->ac.i32_1, "");
2757
2758 }
2759 return res;
2760 }
2761
2762 static void emit_membar(struct ac_llvm_context *ac,
2763 const nir_intrinsic_instr *instr)
2764 {
2765 unsigned wait_flags = 0;
2766
2767 switch (instr->intrinsic) {
2768 case nir_intrinsic_memory_barrier:
2769 case nir_intrinsic_group_memory_barrier:
2770 wait_flags = AC_WAIT_LGKM | AC_WAIT_VLOAD | AC_WAIT_VSTORE;
2771 break;
2772 case nir_intrinsic_memory_barrier_atomic_counter:
2773 case nir_intrinsic_memory_barrier_buffer:
2774 case nir_intrinsic_memory_barrier_image:
2775 wait_flags = AC_WAIT_VLOAD | AC_WAIT_VSTORE;
2776 break;
2777 case nir_intrinsic_memory_barrier_shared:
2778 wait_flags = AC_WAIT_LGKM;
2779 break;
2780 default:
2781 break;
2782 }
2783
2784 ac_build_waitcnt(ac, wait_flags);
2785 }
2786
2787 void ac_emit_barrier(struct ac_llvm_context *ac, gl_shader_stage stage)
2788 {
2789 /* GFX6 only (thanks to a hw bug workaround):
2790 * The real barrier instruction isn’t needed, because an entire patch
2791 * always fits into a single wave.
2792 */
2793 if (ac->chip_class == GFX6 && stage == MESA_SHADER_TESS_CTRL) {
2794 ac_build_waitcnt(ac, AC_WAIT_LGKM | AC_WAIT_VLOAD | AC_WAIT_VSTORE);
2795 return;
2796 }
2797 ac_build_s_barrier(ac);
2798 }
2799
2800 static void emit_discard(struct ac_nir_context *ctx,
2801 const nir_intrinsic_instr *instr)
2802 {
2803 LLVMValueRef cond;
2804
2805 if (instr->intrinsic == nir_intrinsic_discard_if) {
2806 cond = LLVMBuildICmp(ctx->ac.builder, LLVMIntEQ,
2807 get_src(ctx, instr->src[0]),
2808 ctx->ac.i32_0, "");
2809 } else {
2810 assert(instr->intrinsic == nir_intrinsic_discard);
2811 cond = ctx->ac.i1false;
2812 }
2813
2814 ctx->abi->emit_kill(ctx->abi, cond);
2815 }
2816
2817 static LLVMValueRef
2818 visit_load_local_invocation_index(struct ac_nir_context *ctx)
2819 {
2820 LLVMValueRef result;
2821 LLVMValueRef thread_id = ac_get_thread_id(&ctx->ac);
2822 result = LLVMBuildAnd(ctx->ac.builder, ctx->abi->tg_size,
2823 LLVMConstInt(ctx->ac.i32, 0xfc0, false), "");
2824
2825 return LLVMBuildAdd(ctx->ac.builder, result, thread_id, "");
2826 }
2827
2828 static LLVMValueRef
2829 visit_load_subgroup_id(struct ac_nir_context *ctx)
2830 {
2831 if (ctx->stage == MESA_SHADER_COMPUTE) {
2832 LLVMValueRef result;
2833 result = LLVMBuildAnd(ctx->ac.builder, ctx->abi->tg_size,
2834 LLVMConstInt(ctx->ac.i32, 0xfc0, false), "");
2835 return LLVMBuildLShr(ctx->ac.builder, result, LLVMConstInt(ctx->ac.i32, 6, false), "");
2836 } else {
2837 return LLVMConstInt(ctx->ac.i32, 0, false);
2838 }
2839 }
2840
2841 static LLVMValueRef
2842 visit_load_num_subgroups(struct ac_nir_context *ctx)
2843 {
2844 if (ctx->stage == MESA_SHADER_COMPUTE) {
2845 return LLVMBuildAnd(ctx->ac.builder, ctx->abi->tg_size,
2846 LLVMConstInt(ctx->ac.i32, 0x3f, false), "");
2847 } else {
2848 return LLVMConstInt(ctx->ac.i32, 1, false);
2849 }
2850 }
2851
2852 static LLVMValueRef
2853 visit_first_invocation(struct ac_nir_context *ctx)
2854 {
2855 LLVMValueRef active_set = ac_build_ballot(&ctx->ac, ctx->ac.i32_1);
2856 const char *intr = ctx->ac.wave_size == 32 ? "llvm.cttz.i32" : "llvm.cttz.i64";
2857
2858 /* The second argument is whether cttz(0) should be defined, but we do not care. */
2859 LLVMValueRef args[] = {active_set, ctx->ac.i1false};
2860 LLVMValueRef result = ac_build_intrinsic(&ctx->ac, intr,
2861 ctx->ac.iN_wavemask, args, 2,
2862 AC_FUNC_ATTR_NOUNWIND |
2863 AC_FUNC_ATTR_READNONE);
2864
2865 return LLVMBuildTrunc(ctx->ac.builder, result, ctx->ac.i32, "");
2866 }
2867
2868 static LLVMValueRef
2869 visit_load_shared(struct ac_nir_context *ctx,
2870 const nir_intrinsic_instr *instr)
2871 {
2872 LLVMValueRef values[4], derived_ptr, index, ret;
2873
2874 LLVMValueRef ptr = get_memory_ptr(ctx, instr->src[0]);
2875
2876 for (int chan = 0; chan < instr->num_components; chan++) {
2877 index = LLVMConstInt(ctx->ac.i32, chan, 0);
2878 derived_ptr = LLVMBuildGEP(ctx->ac.builder, ptr, &index, 1, "");
2879 values[chan] = LLVMBuildLoad(ctx->ac.builder, derived_ptr, "");
2880 }
2881
2882 ret = ac_build_gather_values(&ctx->ac, values, instr->num_components);
2883 return LLVMBuildBitCast(ctx->ac.builder, ret, get_def_type(ctx, &instr->dest.ssa), "");
2884 }
2885
2886 static void
2887 visit_store_shared(struct ac_nir_context *ctx,
2888 const nir_intrinsic_instr *instr)
2889 {
2890 LLVMValueRef derived_ptr, data,index;
2891 LLVMBuilderRef builder = ctx->ac.builder;
2892
2893 LLVMValueRef ptr = get_memory_ptr(ctx, instr->src[1]);
2894 LLVMValueRef src = get_src(ctx, instr->src[0]);
2895
2896 int writemask = nir_intrinsic_write_mask(instr);
2897 for (int chan = 0; chan < 4; chan++) {
2898 if (!(writemask & (1 << chan))) {
2899 continue;
2900 }
2901 data = ac_llvm_extract_elem(&ctx->ac, src, chan);
2902 index = LLVMConstInt(ctx->ac.i32, chan, 0);
2903 derived_ptr = LLVMBuildGEP(builder, ptr, &index, 1, "");
2904 LLVMBuildStore(builder, data, derived_ptr);
2905 }
2906 }
2907
2908 static LLVMValueRef visit_var_atomic(struct ac_nir_context *ctx,
2909 const nir_intrinsic_instr *instr,
2910 LLVMValueRef ptr, int src_idx)
2911 {
2912 LLVMValueRef result;
2913 LLVMValueRef src = get_src(ctx, instr->src[src_idx]);
2914
2915 const char *sync_scope = HAVE_LLVM >= 0x0900 ? "workgroup-one-as" : "workgroup";
2916
2917 if (instr->intrinsic == nir_intrinsic_shared_atomic_comp_swap ||
2918 instr->intrinsic == nir_intrinsic_deref_atomic_comp_swap) {
2919 LLVMValueRef src1 = get_src(ctx, instr->src[src_idx + 1]);
2920 result = ac_build_atomic_cmp_xchg(&ctx->ac, ptr, src, src1, sync_scope);
2921 result = LLVMBuildExtractValue(ctx->ac.builder, result, 0, "");
2922 } else {
2923 LLVMAtomicRMWBinOp op;
2924 switch (instr->intrinsic) {
2925 case nir_intrinsic_shared_atomic_add:
2926 case nir_intrinsic_deref_atomic_add:
2927 op = LLVMAtomicRMWBinOpAdd;
2928 break;
2929 case nir_intrinsic_shared_atomic_umin:
2930 case nir_intrinsic_deref_atomic_umin:
2931 op = LLVMAtomicRMWBinOpUMin;
2932 break;
2933 case nir_intrinsic_shared_atomic_umax:
2934 case nir_intrinsic_deref_atomic_umax:
2935 op = LLVMAtomicRMWBinOpUMax;
2936 break;
2937 case nir_intrinsic_shared_atomic_imin:
2938 case nir_intrinsic_deref_atomic_imin:
2939 op = LLVMAtomicRMWBinOpMin;
2940 break;
2941 case nir_intrinsic_shared_atomic_imax:
2942 case nir_intrinsic_deref_atomic_imax:
2943 op = LLVMAtomicRMWBinOpMax;
2944 break;
2945 case nir_intrinsic_shared_atomic_and:
2946 case nir_intrinsic_deref_atomic_and:
2947 op = LLVMAtomicRMWBinOpAnd;
2948 break;
2949 case nir_intrinsic_shared_atomic_or:
2950 case nir_intrinsic_deref_atomic_or:
2951 op = LLVMAtomicRMWBinOpOr;
2952 break;
2953 case nir_intrinsic_shared_atomic_xor:
2954 case nir_intrinsic_deref_atomic_xor:
2955 op = LLVMAtomicRMWBinOpXor;
2956 break;
2957 case nir_intrinsic_shared_atomic_exchange:
2958 case nir_intrinsic_deref_atomic_exchange:
2959 op = LLVMAtomicRMWBinOpXchg;
2960 break;
2961 default:
2962 return NULL;
2963 }
2964
2965 result = ac_build_atomic_rmw(&ctx->ac, op, ptr, ac_to_integer(&ctx->ac, src), sync_scope);
2966 }
2967 return result;
2968 }
2969
2970 static LLVMValueRef load_sample_pos(struct ac_nir_context *ctx)
2971 {
2972 LLVMValueRef values[2];
2973 LLVMValueRef pos[2];
2974
2975 pos[0] = ac_to_float(&ctx->ac, ctx->abi->frag_pos[0]);
2976 pos[1] = ac_to_float(&ctx->ac, ctx->abi->frag_pos[1]);
2977
2978 values[0] = ac_build_fract(&ctx->ac, pos[0], 32);
2979 values[1] = ac_build_fract(&ctx->ac, pos[1], 32);
2980 return ac_build_gather_values(&ctx->ac, values, 2);
2981 }
2982
2983 static LLVMValueRef barycentric_center(struct ac_nir_context *ctx,
2984 unsigned mode)
2985 {
2986 LLVMValueRef interp_param = ctx->abi->lookup_interp_param(ctx->abi, mode, INTERP_CENTER);
2987 return LLVMBuildBitCast(ctx->ac.builder, interp_param, ctx->ac.v2i32, "");
2988 }
2989
2990 static LLVMValueRef barycentric_offset(struct ac_nir_context *ctx,
2991 unsigned mode,
2992 LLVMValueRef offset)
2993 {
2994 LLVMValueRef interp_param = ctx->abi->lookup_interp_param(ctx->abi, mode, INTERP_CENTER);
2995 LLVMValueRef src_c0 = ac_to_float(&ctx->ac, LLVMBuildExtractElement(ctx->ac.builder, offset, ctx->ac.i32_0, ""));
2996 LLVMValueRef src_c1 = ac_to_float(&ctx->ac, LLVMBuildExtractElement(ctx->ac.builder, offset, ctx->ac.i32_1, ""));
2997
2998 LLVMValueRef ij_out[2];
2999 LLVMValueRef ddxy_out = ac_build_ddxy_interp(&ctx->ac, interp_param);
3000
3001 /*
3002 * take the I then J parameters, and the DDX/Y for it, and
3003 * calculate the IJ inputs for the interpolator.
3004 * temp1 = ddx * offset/sample.x + I;
3005 * interp_param.I = ddy * offset/sample.y + temp1;
3006 * temp1 = ddx * offset/sample.x + J;
3007 * interp_param.J = ddy * offset/sample.y + temp1;
3008 */
3009 for (unsigned i = 0; i < 2; i++) {
3010 LLVMValueRef ix_ll = LLVMConstInt(ctx->ac.i32, i, false);
3011 LLVMValueRef iy_ll = LLVMConstInt(ctx->ac.i32, i + 2, false);
3012 LLVMValueRef ddx_el = LLVMBuildExtractElement(ctx->ac.builder,
3013 ddxy_out, ix_ll, "");
3014 LLVMValueRef ddy_el = LLVMBuildExtractElement(ctx->ac.builder,
3015 ddxy_out, iy_ll, "");
3016 LLVMValueRef interp_el = LLVMBuildExtractElement(ctx->ac.builder,
3017 interp_param, ix_ll, "");
3018 LLVMValueRef temp1, temp2;
3019
3020 interp_el = LLVMBuildBitCast(ctx->ac.builder, interp_el,
3021 ctx->ac.f32, "");
3022
3023 temp1 = ac_build_fmad(&ctx->ac, ddx_el, src_c0, interp_el);
3024 temp2 = ac_build_fmad(&ctx->ac, ddy_el, src_c1, temp1);
3025
3026 ij_out[i] = LLVMBuildBitCast(ctx->ac.builder,
3027 temp2, ctx->ac.i32, "");
3028 }
3029 interp_param = ac_build_gather_values(&ctx->ac, ij_out, 2);
3030 return LLVMBuildBitCast(ctx->ac.builder, interp_param, ctx->ac.v2i32, "");
3031 }
3032
3033 static LLVMValueRef barycentric_centroid(struct ac_nir_context *ctx,
3034 unsigned mode)
3035 {
3036 LLVMValueRef interp_param = ctx->abi->lookup_interp_param(ctx->abi, mode, INTERP_CENTROID);
3037 return LLVMBuildBitCast(ctx->ac.builder, interp_param, ctx->ac.v2i32, "");
3038 }
3039
3040 static LLVMValueRef barycentric_at_sample(struct ac_nir_context *ctx,
3041 unsigned mode,
3042 LLVMValueRef sample_id)
3043 {
3044 LLVMValueRef halfval = LLVMConstReal(ctx->ac.f32, 0.5f);
3045
3046 /* fetch sample ID */
3047 LLVMValueRef sample_pos = ctx->abi->load_sample_position(ctx->abi, sample_id);
3048
3049 LLVMValueRef src_c0 = LLVMBuildExtractElement(ctx->ac.builder, sample_pos, ctx->ac.i32_0, "");
3050 src_c0 = LLVMBuildFSub(ctx->ac.builder, src_c0, halfval, "");
3051 LLVMValueRef src_c1 = LLVMBuildExtractElement(ctx->ac.builder, sample_pos, ctx->ac.i32_1, "");
3052 src_c1 = LLVMBuildFSub(ctx->ac.builder, src_c1, halfval, "");
3053 LLVMValueRef coords[] = { src_c0, src_c1 };
3054 LLVMValueRef offset = ac_build_gather_values(&ctx->ac, coords, 2);
3055
3056 return barycentric_offset(ctx, mode, offset);
3057 }
3058
3059
3060 static LLVMValueRef barycentric_sample(struct ac_nir_context *ctx,
3061 unsigned mode)
3062 {
3063 LLVMValueRef interp_param = ctx->abi->lookup_interp_param(ctx->abi, mode, INTERP_SAMPLE);
3064 return LLVMBuildBitCast(ctx->ac.builder, interp_param, ctx->ac.v2i32, "");
3065 }
3066
3067 static LLVMValueRef load_interpolated_input(struct ac_nir_context *ctx,
3068 LLVMValueRef interp_param,
3069 unsigned index, unsigned comp_start,
3070 unsigned num_components,
3071 unsigned bitsize)
3072 {
3073 LLVMValueRef attr_number = LLVMConstInt(ctx->ac.i32, index, false);
3074
3075 interp_param = LLVMBuildBitCast(ctx->ac.builder,
3076 interp_param, ctx->ac.v2f32, "");
3077 LLVMValueRef i = LLVMBuildExtractElement(
3078 ctx->ac.builder, interp_param, ctx->ac.i32_0, "");
3079 LLVMValueRef j = LLVMBuildExtractElement(
3080 ctx->ac.builder, interp_param, ctx->ac.i32_1, "");
3081
3082 LLVMValueRef values[4];
3083 assert(bitsize == 16 || bitsize == 32);
3084 for (unsigned comp = 0; comp < num_components; comp++) {
3085 LLVMValueRef llvm_chan = LLVMConstInt(ctx->ac.i32, comp_start + comp, false);
3086 if (bitsize == 16) {
3087 values[comp] = ac_build_fs_interp_f16(&ctx->ac, llvm_chan, attr_number,
3088 ctx->abi->prim_mask, i, j);
3089 } else {
3090 values[comp] = ac_build_fs_interp(&ctx->ac, llvm_chan, attr_number,
3091 ctx->abi->prim_mask, i, j);
3092 }
3093 }
3094
3095 return ac_to_integer(&ctx->ac, ac_build_gather_values(&ctx->ac, values, num_components));
3096 }
3097
3098 static LLVMValueRef load_flat_input(struct ac_nir_context *ctx,
3099 unsigned index, unsigned comp_start,
3100 unsigned num_components,
3101 unsigned bit_size)
3102 {
3103 LLVMValueRef attr_number = LLVMConstInt(ctx->ac.i32, index, false);
3104
3105 LLVMValueRef values[8];
3106
3107 /* Each component of a 64-bit value takes up two GL-level channels. */
3108 unsigned channels =
3109 bit_size == 64 ? num_components * 2 : num_components;
3110
3111 for (unsigned chan = 0; chan < channels; chan++) {
3112 if (comp_start + chan > 4)
3113 attr_number = LLVMConstInt(ctx->ac.i32, index + 1, false);
3114 LLVMValueRef llvm_chan = LLVMConstInt(ctx->ac.i32, (comp_start + chan) % 4, false);
3115 values[chan] = ac_build_fs_interp_mov(&ctx->ac,
3116 LLVMConstInt(ctx->ac.i32, 2, false),
3117 llvm_chan,
3118 attr_number,
3119 ctx->abi->prim_mask);
3120 values[chan] = LLVMBuildBitCast(ctx->ac.builder, values[chan], ctx->ac.i32, "");
3121 values[chan] = LLVMBuildTruncOrBitCast(ctx->ac.builder, values[chan],
3122 bit_size == 16 ? ctx->ac.i16 : ctx->ac.i32, "");
3123 }
3124
3125 LLVMValueRef result = ac_build_gather_values(&ctx->ac, values, channels);
3126 if (bit_size == 64) {
3127 LLVMTypeRef type = num_components == 1 ? ctx->ac.i64 :
3128 LLVMVectorType(ctx->ac.i64, num_components);
3129 result = LLVMBuildBitCast(ctx->ac.builder, result, type, "");
3130 }
3131 return result;
3132 }
3133
3134 static void visit_intrinsic(struct ac_nir_context *ctx,
3135 nir_intrinsic_instr *instr)
3136 {
3137 LLVMValueRef result = NULL;
3138
3139 switch (instr->intrinsic) {
3140 case nir_intrinsic_ballot:
3141 result = ac_build_ballot(&ctx->ac, get_src(ctx, instr->src[0]));
3142 break;
3143 case nir_intrinsic_read_invocation:
3144 result = ac_build_readlane(&ctx->ac, get_src(ctx, instr->src[0]),
3145 get_src(ctx, instr->src[1]));
3146 break;
3147 case nir_intrinsic_read_first_invocation:
3148 result = ac_build_readlane(&ctx->ac, get_src(ctx, instr->src[0]), NULL);
3149 break;
3150 case nir_intrinsic_load_subgroup_invocation:
3151 result = ac_get_thread_id(&ctx->ac);
3152 break;
3153 case nir_intrinsic_load_work_group_id: {
3154 LLVMValueRef values[3];
3155
3156 for (int i = 0; i < 3; i++) {
3157 values[i] = ctx->abi->workgroup_ids[i] ?
3158 ctx->abi->workgroup_ids[i] : ctx->ac.i32_0;
3159 }
3160
3161 result = ac_build_gather_values(&ctx->ac, values, 3);
3162 break;
3163 }
3164 case nir_intrinsic_load_base_vertex:
3165 case nir_intrinsic_load_first_vertex:
3166 result = ctx->abi->load_base_vertex(ctx->abi);
3167 break;
3168 case nir_intrinsic_load_local_group_size:
3169 result = ctx->abi->load_local_group_size(ctx->abi);
3170 break;
3171 case nir_intrinsic_load_vertex_id:
3172 result = LLVMBuildAdd(ctx->ac.builder, ctx->abi->vertex_id,
3173 ctx->abi->base_vertex, "");
3174 break;
3175 case nir_intrinsic_load_vertex_id_zero_base: {
3176 result = ctx->abi->vertex_id;
3177 break;
3178 }
3179 case nir_intrinsic_load_local_invocation_id: {
3180 result = ctx->abi->local_invocation_ids;
3181 break;
3182 }
3183 case nir_intrinsic_load_base_instance:
3184 result = ctx->abi->start_instance;
3185 break;
3186 case nir_intrinsic_load_draw_id:
3187 result = ctx->abi->draw_id;
3188 break;
3189 case nir_intrinsic_load_view_index:
3190 result = ctx->abi->view_index;
3191 break;
3192 case nir_intrinsic_load_invocation_id:
3193 if (ctx->stage == MESA_SHADER_TESS_CTRL) {
3194 result = ac_unpack_param(&ctx->ac, ctx->abi->tcs_rel_ids, 8, 5);
3195 } else {
3196 if (ctx->ac.chip_class >= GFX10) {
3197 result = LLVMBuildAnd(ctx->ac.builder,
3198 ctx->abi->gs_invocation_id,
3199 LLVMConstInt(ctx->ac.i32, 127, 0), "");
3200 } else {
3201 result = ctx->abi->gs_invocation_id;
3202 }
3203 }
3204 break;
3205 case nir_intrinsic_load_primitive_id:
3206 if (ctx->stage == MESA_SHADER_GEOMETRY) {
3207 result = ctx->abi->gs_prim_id;
3208 } else if (ctx->stage == MESA_SHADER_TESS_CTRL) {
3209 result = ctx->abi->tcs_patch_id;
3210 } else if (ctx->stage == MESA_SHADER_TESS_EVAL) {
3211 result = ctx->abi->tes_patch_id;
3212 } else
3213 fprintf(stderr, "Unknown primitive id intrinsic: %d", ctx->stage);
3214 break;
3215 case nir_intrinsic_load_sample_id:
3216 result = ac_unpack_param(&ctx->ac, ctx->abi->ancillary, 8, 4);
3217 break;
3218 case nir_intrinsic_load_sample_pos:
3219 result = load_sample_pos(ctx);
3220 break;
3221 case nir_intrinsic_load_sample_mask_in:
3222 result = ctx->abi->load_sample_mask_in(ctx->abi);
3223 break;
3224 case nir_intrinsic_load_frag_coord: {
3225 LLVMValueRef values[4] = {
3226 ctx->abi->frag_pos[0],
3227 ctx->abi->frag_pos[1],
3228 ctx->abi->frag_pos[2],
3229 ac_build_fdiv(&ctx->ac, ctx->ac.f32_1, ctx->abi->frag_pos[3])
3230 };
3231 result = ac_to_integer(&ctx->ac,
3232 ac_build_gather_values(&ctx->ac, values, 4));
3233 break;
3234 }
3235 case nir_intrinsic_load_layer_id:
3236 result = ctx->abi->inputs[ac_llvm_reg_index_soa(VARYING_SLOT_LAYER, 0)];
3237 break;
3238 case nir_intrinsic_load_front_face:
3239 result = ctx->abi->front_face;
3240 break;
3241 case nir_intrinsic_load_helper_invocation:
3242 result = ac_build_load_helper_invocation(&ctx->ac);
3243 break;
3244 case nir_intrinsic_load_color0:
3245 result = ctx->abi->color0;
3246 break;
3247 case nir_intrinsic_load_color1:
3248 result = ctx->abi->color1;
3249 break;
3250 case nir_intrinsic_load_instance_id:
3251 result = ctx->abi->instance_id;
3252 break;
3253 case nir_intrinsic_load_num_work_groups:
3254 result = ctx->abi->num_work_groups;
3255 break;
3256 case nir_intrinsic_load_local_invocation_index:
3257 result = visit_load_local_invocation_index(ctx);
3258 break;
3259 case nir_intrinsic_load_subgroup_id:
3260 result = visit_load_subgroup_id(ctx);
3261 break;
3262 case nir_intrinsic_load_num_subgroups:
3263 result = visit_load_num_subgroups(ctx);
3264 break;
3265 case nir_intrinsic_first_invocation:
3266 result = visit_first_invocation(ctx);
3267 break;
3268 case nir_intrinsic_load_push_constant:
3269 result = visit_load_push_constant(ctx, instr);
3270 break;
3271 case nir_intrinsic_vulkan_resource_index: {
3272 LLVMValueRef index = get_src(ctx, instr->src[0]);
3273 unsigned desc_set = nir_intrinsic_desc_set(instr);
3274 unsigned binding = nir_intrinsic_binding(instr);
3275
3276 result = ctx->abi->load_resource(ctx->abi, index, desc_set,
3277 binding);
3278 break;
3279 }
3280 case nir_intrinsic_vulkan_resource_reindex:
3281 result = visit_vulkan_resource_reindex(ctx, instr);
3282 break;
3283 case nir_intrinsic_store_ssbo:
3284 visit_store_ssbo(ctx, instr);
3285 break;
3286 case nir_intrinsic_load_ssbo:
3287 result = visit_load_buffer(ctx, instr);
3288 break;
3289 case nir_intrinsic_ssbo_atomic_add:
3290 case nir_intrinsic_ssbo_atomic_imin:
3291 case nir_intrinsic_ssbo_atomic_umin:
3292 case nir_intrinsic_ssbo_atomic_imax:
3293 case nir_intrinsic_ssbo_atomic_umax:
3294 case nir_intrinsic_ssbo_atomic_and:
3295 case nir_intrinsic_ssbo_atomic_or:
3296 case nir_intrinsic_ssbo_atomic_xor:
3297 case nir_intrinsic_ssbo_atomic_exchange:
3298 case nir_intrinsic_ssbo_atomic_comp_swap:
3299 result = visit_atomic_ssbo(ctx, instr);
3300 break;
3301 case nir_intrinsic_load_ubo:
3302 result = visit_load_ubo_buffer(ctx, instr);
3303 break;
3304 case nir_intrinsic_get_buffer_size:
3305 result = visit_get_buffer_size(ctx, instr);
3306 break;
3307 case nir_intrinsic_load_deref:
3308 result = visit_load_var(ctx, instr);
3309 break;
3310 case nir_intrinsic_store_deref:
3311 visit_store_var(ctx, instr);
3312 break;
3313 case nir_intrinsic_load_shared:
3314 result = visit_load_shared(ctx, instr);
3315 break;
3316 case nir_intrinsic_store_shared:
3317 visit_store_shared(ctx, instr);
3318 break;
3319 case nir_intrinsic_bindless_image_samples:
3320 result = visit_image_samples(ctx, instr, true);
3321 break;
3322 case nir_intrinsic_image_deref_samples:
3323 result = visit_image_samples(ctx, instr, false);
3324 break;
3325 case nir_intrinsic_bindless_image_load:
3326 result = visit_image_load(ctx, instr, true);
3327 break;
3328 case nir_intrinsic_image_deref_load:
3329 result = visit_image_load(ctx, instr, false);
3330 break;
3331 case nir_intrinsic_bindless_image_store:
3332 visit_image_store(ctx, instr, true);
3333 break;
3334 case nir_intrinsic_image_deref_store:
3335 visit_image_store(ctx, instr, false);
3336 break;
3337 case nir_intrinsic_bindless_image_atomic_add:
3338 case nir_intrinsic_bindless_image_atomic_min:
3339 case nir_intrinsic_bindless_image_atomic_max:
3340 case nir_intrinsic_bindless_image_atomic_and:
3341 case nir_intrinsic_bindless_image_atomic_or:
3342 case nir_intrinsic_bindless_image_atomic_xor:
3343 case nir_intrinsic_bindless_image_atomic_exchange:
3344 case nir_intrinsic_bindless_image_atomic_comp_swap:
3345 result = visit_image_atomic(ctx, instr, true);
3346 break;
3347 case nir_intrinsic_image_deref_atomic_add:
3348 case nir_intrinsic_image_deref_atomic_min:
3349 case nir_intrinsic_image_deref_atomic_max:
3350 case nir_intrinsic_image_deref_atomic_and:
3351 case nir_intrinsic_image_deref_atomic_or:
3352 case nir_intrinsic_image_deref_atomic_xor:
3353 case nir_intrinsic_image_deref_atomic_exchange:
3354 case nir_intrinsic_image_deref_atomic_comp_swap:
3355 result = visit_image_atomic(ctx, instr, false);
3356 break;
3357 case nir_intrinsic_bindless_image_size:
3358 result = visit_image_size(ctx, instr, true);
3359 break;
3360 case nir_intrinsic_image_deref_size:
3361 result = visit_image_size(ctx, instr, false);
3362 break;
3363 case nir_intrinsic_shader_clock:
3364 result = ac_build_shader_clock(&ctx->ac);
3365 break;
3366 case nir_intrinsic_discard:
3367 case nir_intrinsic_discard_if:
3368 emit_discard(ctx, instr);
3369 break;
3370 case nir_intrinsic_memory_barrier:
3371 case nir_intrinsic_group_memory_barrier:
3372 case nir_intrinsic_memory_barrier_atomic_counter:
3373 case nir_intrinsic_memory_barrier_buffer:
3374 case nir_intrinsic_memory_barrier_image:
3375 case nir_intrinsic_memory_barrier_shared:
3376 emit_membar(&ctx->ac, instr);
3377 break;
3378 case nir_intrinsic_barrier:
3379 ac_emit_barrier(&ctx->ac, ctx->stage);
3380 break;
3381 case nir_intrinsic_shared_atomic_add:
3382 case nir_intrinsic_shared_atomic_imin:
3383 case nir_intrinsic_shared_atomic_umin:
3384 case nir_intrinsic_shared_atomic_imax:
3385 case nir_intrinsic_shared_atomic_umax:
3386 case nir_intrinsic_shared_atomic_and:
3387 case nir_intrinsic_shared_atomic_or:
3388 case nir_intrinsic_shared_atomic_xor:
3389 case nir_intrinsic_shared_atomic_exchange:
3390 case nir_intrinsic_shared_atomic_comp_swap: {
3391 LLVMValueRef ptr = get_memory_ptr(ctx, instr->src[0]);
3392 result = visit_var_atomic(ctx, instr, ptr, 1);
3393 break;
3394 }
3395 case nir_intrinsic_deref_atomic_add:
3396 case nir_intrinsic_deref_atomic_imin:
3397 case nir_intrinsic_deref_atomic_umin:
3398 case nir_intrinsic_deref_atomic_imax:
3399 case nir_intrinsic_deref_atomic_umax:
3400 case nir_intrinsic_deref_atomic_and:
3401 case nir_intrinsic_deref_atomic_or:
3402 case nir_intrinsic_deref_atomic_xor:
3403 case nir_intrinsic_deref_atomic_exchange:
3404 case nir_intrinsic_deref_atomic_comp_swap: {
3405 LLVMValueRef ptr = get_src(ctx, instr->src[0]);
3406 result = visit_var_atomic(ctx, instr, ptr, 1);
3407 break;
3408 }
3409 case nir_intrinsic_load_barycentric_pixel:
3410 result = barycentric_center(ctx, nir_intrinsic_interp_mode(instr));
3411 break;
3412 case nir_intrinsic_load_barycentric_centroid:
3413 result = barycentric_centroid(ctx, nir_intrinsic_interp_mode(instr));
3414 break;
3415 case nir_intrinsic_load_barycentric_sample:
3416 result = barycentric_sample(ctx, nir_intrinsic_interp_mode(instr));
3417 break;
3418 case nir_intrinsic_load_barycentric_at_offset: {
3419 LLVMValueRef offset = ac_to_float(&ctx->ac, get_src(ctx, instr->src[0]));
3420 result = barycentric_offset(ctx, nir_intrinsic_interp_mode(instr), offset);
3421 break;
3422 }
3423 case nir_intrinsic_load_barycentric_at_sample: {
3424 LLVMValueRef sample_id = get_src(ctx, instr->src[0]);
3425 result = barycentric_at_sample(ctx, nir_intrinsic_interp_mode(instr), sample_id);
3426 break;
3427 }
3428 case nir_intrinsic_load_interpolated_input: {
3429 /* We assume any indirect loads have been lowered away */
3430 ASSERTED nir_const_value *offset = nir_src_as_const_value(instr->src[1]);
3431 assert(offset);
3432 assert(offset[0].i32 == 0);
3433
3434 LLVMValueRef interp_param = get_src(ctx, instr->src[0]);
3435 unsigned index = nir_intrinsic_base(instr);
3436 unsigned component = nir_intrinsic_component(instr);
3437 result = load_interpolated_input(ctx, interp_param, index,
3438 component,
3439 instr->dest.ssa.num_components,
3440 instr->dest.ssa.bit_size);
3441 break;
3442 }
3443 case nir_intrinsic_load_input: {
3444 /* We only lower inputs for fragment shaders ATM */
3445 ASSERTED nir_const_value *offset = nir_src_as_const_value(instr->src[0]);
3446 assert(offset);
3447 assert(offset[0].i32 == 0);
3448
3449 unsigned index = nir_intrinsic_base(instr);
3450 unsigned component = nir_intrinsic_component(instr);
3451 result = load_flat_input(ctx, index, component,
3452 instr->dest.ssa.num_components,
3453 instr->dest.ssa.bit_size);
3454 break;
3455 }
3456 case nir_intrinsic_emit_vertex:
3457 ctx->abi->emit_vertex(ctx->abi, nir_intrinsic_stream_id(instr), ctx->abi->outputs);
3458 break;
3459 case nir_intrinsic_end_primitive:
3460 ctx->abi->emit_primitive(ctx->abi, nir_intrinsic_stream_id(instr));
3461 break;
3462 case nir_intrinsic_load_tess_coord:
3463 result = ctx->abi->load_tess_coord(ctx->abi);
3464 break;
3465 case nir_intrinsic_load_tess_level_outer:
3466 result = ctx->abi->load_tess_level(ctx->abi, VARYING_SLOT_TESS_LEVEL_OUTER);
3467 break;
3468 case nir_intrinsic_load_tess_level_inner:
3469 result = ctx->abi->load_tess_level(ctx->abi, VARYING_SLOT_TESS_LEVEL_INNER);
3470 break;
3471 case nir_intrinsic_load_patch_vertices_in:
3472 result = ctx->abi->load_patch_vertices_in(ctx->abi);
3473 break;
3474 case nir_intrinsic_vote_all: {
3475 LLVMValueRef tmp = ac_build_vote_all(&ctx->ac, get_src(ctx, instr->src[0]));
3476 result = LLVMBuildSExt(ctx->ac.builder, tmp, ctx->ac.i32, "");
3477 break;
3478 }
3479 case nir_intrinsic_vote_any: {
3480 LLVMValueRef tmp = ac_build_vote_any(&ctx->ac, get_src(ctx, instr->src[0]));
3481 result = LLVMBuildSExt(ctx->ac.builder, tmp, ctx->ac.i32, "");
3482 break;
3483 }
3484 case nir_intrinsic_shuffle:
3485 result = ac_build_shuffle(&ctx->ac, get_src(ctx, instr->src[0]),
3486 get_src(ctx, instr->src[1]));
3487 break;
3488 case nir_intrinsic_reduce:
3489 result = ac_build_reduce(&ctx->ac,
3490 get_src(ctx, instr->src[0]),
3491 instr->const_index[0],
3492 instr->const_index[1]);
3493 break;
3494 case nir_intrinsic_inclusive_scan:
3495 result = ac_build_inclusive_scan(&ctx->ac,
3496 get_src(ctx, instr->src[0]),
3497 instr->const_index[0]);
3498 break;
3499 case nir_intrinsic_exclusive_scan:
3500 result = ac_build_exclusive_scan(&ctx->ac,
3501 get_src(ctx, instr->src[0]),
3502 instr->const_index[0]);
3503 break;
3504 case nir_intrinsic_quad_broadcast: {
3505 unsigned lane = nir_src_as_uint(instr->src[1]);
3506 result = ac_build_quad_swizzle(&ctx->ac, get_src(ctx, instr->src[0]),
3507 lane, lane, lane, lane);
3508 break;
3509 }
3510 case nir_intrinsic_quad_swap_horizontal:
3511 result = ac_build_quad_swizzle(&ctx->ac, get_src(ctx, instr->src[0]), 1, 0, 3 ,2);
3512 break;
3513 case nir_intrinsic_quad_swap_vertical:
3514 result = ac_build_quad_swizzle(&ctx->ac, get_src(ctx, instr->src[0]), 2, 3, 0 ,1);
3515 break;
3516 case nir_intrinsic_quad_swap_diagonal:
3517 result = ac_build_quad_swizzle(&ctx->ac, get_src(ctx, instr->src[0]), 3, 2, 1 ,0);
3518 break;
3519 case nir_intrinsic_quad_swizzle_amd: {
3520 uint32_t mask = nir_intrinsic_swizzle_mask(instr);
3521 result = ac_build_quad_swizzle(&ctx->ac, get_src(ctx, instr->src[0]),
3522 mask & 0x3, (mask >> 2) & 0x3,
3523 (mask >> 4) & 0x3, (mask >> 6) & 0x3);
3524 break;
3525 }
3526 case nir_intrinsic_masked_swizzle_amd: {
3527 uint32_t mask = nir_intrinsic_swizzle_mask(instr);
3528 result = ac_build_ds_swizzle(&ctx->ac, get_src(ctx, instr->src[0]), mask);
3529 break;
3530 }
3531 case nir_intrinsic_write_invocation_amd:
3532 result = ac_build_writelane(&ctx->ac, get_src(ctx, instr->src[0]),
3533 get_src(ctx, instr->src[1]),
3534 get_src(ctx, instr->src[2]));
3535 break;
3536 case nir_intrinsic_mbcnt_amd:
3537 result = ac_build_mbcnt(&ctx->ac, get_src(ctx, instr->src[0]));
3538 break;
3539 default:
3540 fprintf(stderr, "Unknown intrinsic: ");
3541 nir_print_instr(&instr->instr, stderr);
3542 fprintf(stderr, "\n");
3543 break;
3544 }
3545 if (result) {
3546 ctx->ssa_defs[instr->dest.ssa.index] = result;
3547 }
3548 }
3549
3550 static LLVMValueRef get_bindless_index_from_uniform(struct ac_nir_context *ctx,
3551 unsigned base_index,
3552 unsigned constant_index,
3553 LLVMValueRef dynamic_index)
3554 {
3555 LLVMValueRef offset = LLVMConstInt(ctx->ac.i32, base_index * 4, 0);
3556 LLVMValueRef index = LLVMBuildAdd(ctx->ac.builder, dynamic_index,
3557 LLVMConstInt(ctx->ac.i32, constant_index, 0), "");
3558
3559 /* Bindless uniforms are 64bit so multiple index by 8 */
3560 index = LLVMBuildMul(ctx->ac.builder, index, LLVMConstInt(ctx->ac.i32, 8, 0), "");
3561 offset = LLVMBuildAdd(ctx->ac.builder, offset, index, "");
3562
3563 LLVMValueRef ubo_index = ctx->abi->load_ubo(ctx->abi, ctx->ac.i32_0);
3564
3565 LLVMValueRef ret = ac_build_buffer_load(&ctx->ac, ubo_index, 1, NULL, offset,
3566 NULL, 0, 0, true, true);
3567
3568 return LLVMBuildBitCast(ctx->ac.builder, ret, ctx->ac.i32, "");
3569 }
3570
3571 static LLVMValueRef get_sampler_desc(struct ac_nir_context *ctx,
3572 nir_deref_instr *deref_instr,
3573 enum ac_descriptor_type desc_type,
3574 const nir_instr *instr,
3575 bool image, bool write)
3576 {
3577 LLVMValueRef index = NULL;
3578 unsigned constant_index = 0;
3579 unsigned descriptor_set;
3580 unsigned base_index;
3581 bool bindless = false;
3582
3583 if (!deref_instr) {
3584 descriptor_set = 0;
3585 if (image) {
3586 nir_intrinsic_instr *img_instr = nir_instr_as_intrinsic(instr);
3587 base_index = 0;
3588 bindless = true;
3589 index = get_src(ctx, img_instr->src[0]);
3590 } else {
3591 nir_tex_instr *tex_instr = nir_instr_as_tex(instr);
3592 int sampSrcIdx = nir_tex_instr_src_index(tex_instr,
3593 nir_tex_src_sampler_handle);
3594 if (sampSrcIdx != -1) {
3595 base_index = 0;
3596 bindless = true;
3597 index = get_src(ctx, tex_instr->src[sampSrcIdx].src);
3598 } else {
3599 assert(tex_instr && !image);
3600 base_index = tex_instr->sampler_index;
3601 }
3602 }
3603 } else {
3604 while(deref_instr->deref_type != nir_deref_type_var) {
3605 if (deref_instr->deref_type == nir_deref_type_array) {
3606 unsigned array_size = glsl_get_aoa_size(deref_instr->type);
3607 if (!array_size)
3608 array_size = 1;
3609
3610 if (nir_src_is_const(deref_instr->arr.index)) {
3611 constant_index += array_size * nir_src_as_uint(deref_instr->arr.index);
3612 } else {
3613 LLVMValueRef indirect = get_src(ctx, deref_instr->arr.index);
3614
3615 indirect = LLVMBuildMul(ctx->ac.builder, indirect,
3616 LLVMConstInt(ctx->ac.i32, array_size, false), "");
3617
3618 if (!index)
3619 index = indirect;
3620 else
3621 index = LLVMBuildAdd(ctx->ac.builder, index, indirect, "");
3622 }
3623
3624 deref_instr = nir_src_as_deref(deref_instr->parent);
3625 } else if (deref_instr->deref_type == nir_deref_type_struct) {
3626 unsigned sidx = deref_instr->strct.index;
3627 deref_instr = nir_src_as_deref(deref_instr->parent);
3628 constant_index += glsl_get_struct_location_offset(deref_instr->type, sidx);
3629 } else {
3630 unreachable("Unsupported deref type");
3631 }
3632 }
3633 descriptor_set = deref_instr->var->data.descriptor_set;
3634
3635 if (deref_instr->var->data.bindless) {
3636 /* For now just assert on unhandled variable types */
3637 assert(deref_instr->var->data.mode == nir_var_uniform);
3638
3639 base_index = deref_instr->var->data.driver_location;
3640 bindless = true;
3641
3642 index = index ? index : ctx->ac.i32_0;
3643 index = get_bindless_index_from_uniform(ctx, base_index,
3644 constant_index, index);
3645 } else
3646 base_index = deref_instr->var->data.binding;
3647 }
3648
3649 return ctx->abi->load_sampler_desc(ctx->abi,
3650 descriptor_set,
3651 base_index,
3652 constant_index, index,
3653 desc_type, image, write, bindless);
3654 }
3655
3656 /* Disable anisotropic filtering if BASE_LEVEL == LAST_LEVEL.
3657 *
3658 * GFX6-GFX7:
3659 * If BASE_LEVEL == LAST_LEVEL, the shader must disable anisotropic
3660 * filtering manually. The driver sets img7 to a mask clearing
3661 * MAX_ANISO_RATIO if BASE_LEVEL == LAST_LEVEL. The shader must do:
3662 * s_and_b32 samp0, samp0, img7
3663 *
3664 * GFX8:
3665 * The ANISO_OVERRIDE sampler field enables this fix in TA.
3666 */
3667 static LLVMValueRef sici_fix_sampler_aniso(struct ac_nir_context *ctx,
3668 LLVMValueRef res, LLVMValueRef samp)
3669 {
3670 LLVMBuilderRef builder = ctx->ac.builder;
3671 LLVMValueRef img7, samp0;
3672
3673 if (ctx->ac.chip_class >= GFX8)
3674 return samp;
3675
3676 img7 = LLVMBuildExtractElement(builder, res,
3677 LLVMConstInt(ctx->ac.i32, 7, 0), "");
3678 samp0 = LLVMBuildExtractElement(builder, samp,
3679 LLVMConstInt(ctx->ac.i32, 0, 0), "");
3680 samp0 = LLVMBuildAnd(builder, samp0, img7, "");
3681 return LLVMBuildInsertElement(builder, samp, samp0,
3682 LLVMConstInt(ctx->ac.i32, 0, 0), "");
3683 }
3684
3685 static void tex_fetch_ptrs(struct ac_nir_context *ctx,
3686 nir_tex_instr *instr,
3687 LLVMValueRef *res_ptr, LLVMValueRef *samp_ptr,
3688 LLVMValueRef *fmask_ptr)
3689 {
3690 nir_deref_instr *texture_deref_instr = NULL;
3691 nir_deref_instr *sampler_deref_instr = NULL;
3692 int plane = -1;
3693
3694 for (unsigned i = 0; i < instr->num_srcs; i++) {
3695 switch (instr->src[i].src_type) {
3696 case nir_tex_src_texture_deref:
3697 texture_deref_instr = nir_src_as_deref(instr->src[i].src);
3698 break;
3699 case nir_tex_src_sampler_deref:
3700 sampler_deref_instr = nir_src_as_deref(instr->src[i].src);
3701 break;
3702 case nir_tex_src_plane:
3703 plane = nir_src_as_int(instr->src[i].src);
3704 break;
3705 default:
3706 break;
3707 }
3708 }
3709
3710 if (!sampler_deref_instr)
3711 sampler_deref_instr = texture_deref_instr;
3712
3713 enum ac_descriptor_type main_descriptor = instr->sampler_dim == GLSL_SAMPLER_DIM_BUF ? AC_DESC_BUFFER : AC_DESC_IMAGE;
3714
3715 if (plane >= 0) {
3716 assert(instr->op != nir_texop_txf_ms &&
3717 instr->op != nir_texop_samples_identical);
3718 assert(instr->sampler_dim != GLSL_SAMPLER_DIM_BUF);
3719
3720 main_descriptor = AC_DESC_PLANE_0 + plane;
3721 }
3722
3723 *res_ptr = get_sampler_desc(ctx, texture_deref_instr, main_descriptor, &instr->instr, false, false);
3724
3725 if (samp_ptr) {
3726 *samp_ptr = get_sampler_desc(ctx, sampler_deref_instr, AC_DESC_SAMPLER, &instr->instr, false, false);
3727 if (instr->sampler_dim < GLSL_SAMPLER_DIM_RECT)
3728 *samp_ptr = sici_fix_sampler_aniso(ctx, *res_ptr, *samp_ptr);
3729 }
3730 if (fmask_ptr && (instr->op == nir_texop_txf_ms ||
3731 instr->op == nir_texop_samples_identical))
3732 *fmask_ptr = get_sampler_desc(ctx, texture_deref_instr, AC_DESC_FMASK, &instr->instr, false, false);
3733 }
3734
3735 static LLVMValueRef apply_round_slice(struct ac_llvm_context *ctx,
3736 LLVMValueRef coord)
3737 {
3738 coord = ac_to_float(ctx, coord);
3739 coord = ac_build_round(ctx, coord);
3740 coord = ac_to_integer(ctx, coord);
3741 return coord;
3742 }
3743
3744 static void visit_tex(struct ac_nir_context *ctx, nir_tex_instr *instr)
3745 {
3746 LLVMValueRef result = NULL;
3747 struct ac_image_args args = { 0 };
3748 LLVMValueRef fmask_ptr = NULL, sample_index = NULL;
3749 LLVMValueRef ddx = NULL, ddy = NULL;
3750 unsigned offset_src = 0;
3751
3752 tex_fetch_ptrs(ctx, instr, &args.resource, &args.sampler, &fmask_ptr);
3753
3754 for (unsigned i = 0; i < instr->num_srcs; i++) {
3755 switch (instr->src[i].src_type) {
3756 case nir_tex_src_coord: {
3757 LLVMValueRef coord = get_src(ctx, instr->src[i].src);
3758 for (unsigned chan = 0; chan < instr->coord_components; ++chan)
3759 args.coords[chan] = ac_llvm_extract_elem(&ctx->ac, coord, chan);
3760 break;
3761 }
3762 case nir_tex_src_projector:
3763 break;
3764 case nir_tex_src_comparator:
3765 if (instr->is_shadow)
3766 args.compare = get_src(ctx, instr->src[i].src);
3767 break;
3768 case nir_tex_src_offset:
3769 args.offset = get_src(ctx, instr->src[i].src);
3770 offset_src = i;
3771 break;
3772 case nir_tex_src_bias:
3773 if (instr->op == nir_texop_txb)
3774 args.bias = get_src(ctx, instr->src[i].src);
3775 break;
3776 case nir_tex_src_lod: {
3777 if (nir_src_is_const(instr->src[i].src) && nir_src_as_uint(instr->src[i].src) == 0)
3778 args.level_zero = true;
3779 else
3780 args.lod = get_src(ctx, instr->src[i].src);
3781 break;
3782 }
3783 case nir_tex_src_ms_index:
3784 sample_index = get_src(ctx, instr->src[i].src);
3785 break;
3786 case nir_tex_src_ms_mcs:
3787 break;
3788 case nir_tex_src_ddx:
3789 ddx = get_src(ctx, instr->src[i].src);
3790 break;
3791 case nir_tex_src_ddy:
3792 ddy = get_src(ctx, instr->src[i].src);
3793 break;
3794 case nir_tex_src_texture_offset:
3795 case nir_tex_src_sampler_offset:
3796 case nir_tex_src_plane:
3797 default:
3798 break;
3799 }
3800 }
3801
3802 if (instr->op == nir_texop_txs && instr->sampler_dim == GLSL_SAMPLER_DIM_BUF) {
3803 result = get_buffer_size(ctx, args.resource, true);
3804 goto write_result;
3805 }
3806
3807 if (instr->op == nir_texop_texture_samples) {
3808 LLVMValueRef res, samples, is_msaa;
3809 res = LLVMBuildBitCast(ctx->ac.builder, args.resource, ctx->ac.v8i32, "");
3810 samples = LLVMBuildExtractElement(ctx->ac.builder, res,
3811 LLVMConstInt(ctx->ac.i32, 3, false), "");
3812 is_msaa = LLVMBuildLShr(ctx->ac.builder, samples,
3813 LLVMConstInt(ctx->ac.i32, 28, false), "");
3814 is_msaa = LLVMBuildAnd(ctx->ac.builder, is_msaa,
3815 LLVMConstInt(ctx->ac.i32, 0xe, false), "");
3816 is_msaa = LLVMBuildICmp(ctx->ac.builder, LLVMIntEQ, is_msaa,
3817 LLVMConstInt(ctx->ac.i32, 0xe, false), "");
3818
3819 samples = LLVMBuildLShr(ctx->ac.builder, samples,
3820 LLVMConstInt(ctx->ac.i32, 16, false), "");
3821 samples = LLVMBuildAnd(ctx->ac.builder, samples,
3822 LLVMConstInt(ctx->ac.i32, 0xf, false), "");
3823 samples = LLVMBuildShl(ctx->ac.builder, ctx->ac.i32_1,
3824 samples, "");
3825 samples = LLVMBuildSelect(ctx->ac.builder, is_msaa, samples,
3826 ctx->ac.i32_1, "");
3827 result = samples;
3828 goto write_result;
3829 }
3830
3831 if (args.offset && instr->op != nir_texop_txf && instr->op != nir_texop_txf_ms) {
3832 LLVMValueRef offset[3], pack;
3833 for (unsigned chan = 0; chan < 3; ++chan)
3834 offset[chan] = ctx->ac.i32_0;
3835
3836 unsigned num_components = ac_get_llvm_num_components(args.offset);
3837 for (unsigned chan = 0; chan < num_components; chan++) {
3838 offset[chan] = ac_llvm_extract_elem(&ctx->ac, args.offset, chan);
3839 offset[chan] = LLVMBuildAnd(ctx->ac.builder, offset[chan],
3840 LLVMConstInt(ctx->ac.i32, 0x3f, false), "");
3841 if (chan)
3842 offset[chan] = LLVMBuildShl(ctx->ac.builder, offset[chan],
3843 LLVMConstInt(ctx->ac.i32, chan * 8, false), "");
3844 }
3845 pack = LLVMBuildOr(ctx->ac.builder, offset[0], offset[1], "");
3846 pack = LLVMBuildOr(ctx->ac.builder, pack, offset[2], "");
3847 args.offset = pack;
3848 }
3849
3850 /* TC-compatible HTILE on radeonsi promotes Z16 and Z24 to Z32_FLOAT,
3851 * so the depth comparison value isn't clamped for Z16 and
3852 * Z24 anymore. Do it manually here for GFX8-9; GFX10 has an explicitly
3853 * clamped 32-bit float format.
3854 *
3855 * It's unnecessary if the original texture format was
3856 * Z32_FLOAT, but we don't know that here.
3857 */
3858 if (args.compare &&
3859 ctx->ac.chip_class >= GFX8 &&
3860 ctx->ac.chip_class <= GFX9 &&
3861 ctx->abi->clamp_shadow_reference)
3862 args.compare = ac_build_clamp(&ctx->ac, ac_to_float(&ctx->ac, args.compare));
3863
3864 /* pack derivatives */
3865 if (ddx || ddy) {
3866 int num_src_deriv_channels, num_dest_deriv_channels;
3867 switch (instr->sampler_dim) {
3868 case GLSL_SAMPLER_DIM_3D:
3869 case GLSL_SAMPLER_DIM_CUBE:
3870 num_src_deriv_channels = 3;
3871 num_dest_deriv_channels = 3;
3872 break;
3873 case GLSL_SAMPLER_DIM_2D:
3874 default:
3875 num_src_deriv_channels = 2;
3876 num_dest_deriv_channels = 2;
3877 break;
3878 case GLSL_SAMPLER_DIM_1D:
3879 num_src_deriv_channels = 1;
3880 if (ctx->ac.chip_class == GFX9) {
3881 num_dest_deriv_channels = 2;
3882 } else {
3883 num_dest_deriv_channels = 1;
3884 }
3885 break;
3886 }
3887
3888 for (unsigned i = 0; i < num_src_deriv_channels; i++) {
3889 args.derivs[i] = ac_to_float(&ctx->ac,
3890 ac_llvm_extract_elem(&ctx->ac, ddx, i));
3891 args.derivs[num_dest_deriv_channels + i] = ac_to_float(&ctx->ac,
3892 ac_llvm_extract_elem(&ctx->ac, ddy, i));
3893 }
3894 for (unsigned i = num_src_deriv_channels; i < num_dest_deriv_channels; i++) {
3895 args.derivs[i] = ctx->ac.f32_0;
3896 args.derivs[num_dest_deriv_channels + i] = ctx->ac.f32_0;
3897 }
3898 }
3899
3900 if (instr->sampler_dim == GLSL_SAMPLER_DIM_CUBE && args.coords[0]) {
3901 for (unsigned chan = 0; chan < instr->coord_components; chan++)
3902 args.coords[chan] = ac_to_float(&ctx->ac, args.coords[chan]);
3903 if (instr->coord_components == 3)
3904 args.coords[3] = LLVMGetUndef(ctx->ac.f32);
3905 ac_prepare_cube_coords(&ctx->ac,
3906 instr->op == nir_texop_txd, instr->is_array,
3907 instr->op == nir_texop_lod, args.coords, args.derivs);
3908 }
3909
3910 /* Texture coordinates fixups */
3911 if (instr->coord_components > 1 &&
3912 instr->sampler_dim == GLSL_SAMPLER_DIM_1D &&
3913 instr->is_array &&
3914 instr->op != nir_texop_txf) {
3915 args.coords[1] = apply_round_slice(&ctx->ac, args.coords[1]);
3916 }
3917
3918 if (instr->coord_components > 2 &&
3919 (instr->sampler_dim == GLSL_SAMPLER_DIM_2D ||
3920 instr->sampler_dim == GLSL_SAMPLER_DIM_MS ||
3921 instr->sampler_dim == GLSL_SAMPLER_DIM_SUBPASS ||
3922 instr->sampler_dim == GLSL_SAMPLER_DIM_SUBPASS_MS) &&
3923 instr->is_array &&
3924 instr->op != nir_texop_txf && instr->op != nir_texop_txf_ms) {
3925 args.coords[2] = apply_round_slice(&ctx->ac, args.coords[2]);
3926 }
3927
3928 if (ctx->ac.chip_class == GFX9 &&
3929 instr->sampler_dim == GLSL_SAMPLER_DIM_1D &&
3930 instr->op != nir_texop_lod) {
3931 LLVMValueRef filler;
3932 if (instr->op == nir_texop_txf)
3933 filler = ctx->ac.i32_0;
3934 else
3935 filler = LLVMConstReal(ctx->ac.f32, 0.5);
3936
3937 if (instr->is_array)
3938 args.coords[2] = args.coords[1];
3939 args.coords[1] = filler;
3940 }
3941
3942 /* Pack sample index */
3943 if (instr->op == nir_texop_txf_ms && sample_index)
3944 args.coords[instr->coord_components] = sample_index;
3945
3946 if (instr->op == nir_texop_samples_identical) {
3947 struct ac_image_args txf_args = { 0 };
3948 memcpy(txf_args.coords, args.coords, sizeof(txf_args.coords));
3949
3950 txf_args.dmask = 0xf;
3951 txf_args.resource = fmask_ptr;
3952 txf_args.dim = instr->is_array ? ac_image_2darray : ac_image_2d;
3953 result = build_tex_intrinsic(ctx, instr, &txf_args);
3954
3955 result = LLVMBuildExtractElement(ctx->ac.builder, result, ctx->ac.i32_0, "");
3956 result = emit_int_cmp(&ctx->ac, LLVMIntEQ, result, ctx->ac.i32_0);
3957 goto write_result;
3958 }
3959
3960 if ((instr->sampler_dim == GLSL_SAMPLER_DIM_SUBPASS_MS ||
3961 instr->sampler_dim == GLSL_SAMPLER_DIM_MS) &&
3962 instr->op != nir_texop_txs) {
3963 unsigned sample_chan = instr->is_array ? 3 : 2;
3964 args.coords[sample_chan] = adjust_sample_index_using_fmask(
3965 &ctx->ac, args.coords[0], args.coords[1],
3966 instr->is_array ? args.coords[2] : NULL,
3967 args.coords[sample_chan], fmask_ptr);
3968 }
3969
3970 if (args.offset && (instr->op == nir_texop_txf || instr->op == nir_texop_txf_ms)) {
3971 int num_offsets = instr->src[offset_src].src.ssa->num_components;
3972 num_offsets = MIN2(num_offsets, instr->coord_components);
3973 for (unsigned i = 0; i < num_offsets; ++i) {
3974 args.coords[i] = LLVMBuildAdd(
3975 ctx->ac.builder, args.coords[i],
3976 LLVMConstInt(ctx->ac.i32, nir_src_comp_as_uint(instr->src[offset_src].src, i), false), "");
3977 }
3978 args.offset = NULL;
3979 }
3980
3981 /* DMASK was repurposed for GATHER4. 4 components are always
3982 * returned and DMASK works like a swizzle - it selects
3983 * the component to fetch. The only valid DMASK values are
3984 * 1=red, 2=green, 4=blue, 8=alpha. (e.g. 1 returns
3985 * (red,red,red,red) etc.) The ISA document doesn't mention
3986 * this.
3987 */
3988 args.dmask = 0xf;
3989 if (instr->op == nir_texop_tg4) {
3990 if (instr->is_shadow)
3991 args.dmask = 1;
3992 else
3993 args.dmask = 1 << instr->component;
3994 }
3995
3996 if (instr->sampler_dim != GLSL_SAMPLER_DIM_BUF)
3997 args.dim = get_ac_sampler_dim(&ctx->ac, instr->sampler_dim, instr->is_array);
3998 result = build_tex_intrinsic(ctx, instr, &args);
3999
4000 if (instr->op == nir_texop_query_levels)
4001 result = LLVMBuildExtractElement(ctx->ac.builder, result, LLVMConstInt(ctx->ac.i32, 3, false), "");
4002 else if (instr->is_shadow && instr->is_new_style_shadow &&
4003 instr->op != nir_texop_txs && instr->op != nir_texop_lod &&
4004 instr->op != nir_texop_tg4)
4005 result = LLVMBuildExtractElement(ctx->ac.builder, result, ctx->ac.i32_0, "");
4006 else if (instr->op == nir_texop_txs &&
4007 instr->sampler_dim == GLSL_SAMPLER_DIM_CUBE &&
4008 instr->is_array) {
4009 LLVMValueRef two = LLVMConstInt(ctx->ac.i32, 2, false);
4010 LLVMValueRef six = LLVMConstInt(ctx->ac.i32, 6, false);
4011 LLVMValueRef z = LLVMBuildExtractElement(ctx->ac.builder, result, two, "");
4012 z = LLVMBuildSDiv(ctx->ac.builder, z, six, "");
4013 result = LLVMBuildInsertElement(ctx->ac.builder, result, z, two, "");
4014 } else if (ctx->ac.chip_class == GFX9 &&
4015 instr->op == nir_texop_txs &&
4016 instr->sampler_dim == GLSL_SAMPLER_DIM_1D &&
4017 instr->is_array) {
4018 LLVMValueRef two = LLVMConstInt(ctx->ac.i32, 2, false);
4019 LLVMValueRef layers = LLVMBuildExtractElement(ctx->ac.builder, result, two, "");
4020 result = LLVMBuildInsertElement(ctx->ac.builder, result, layers,
4021 ctx->ac.i32_1, "");
4022 } else if (instr->dest.ssa.num_components != 4)
4023 result = ac_trim_vector(&ctx->ac, result, instr->dest.ssa.num_components);
4024
4025 write_result:
4026 if (result) {
4027 assert(instr->dest.is_ssa);
4028 result = ac_to_integer(&ctx->ac, result);
4029 ctx->ssa_defs[instr->dest.ssa.index] = result;
4030 }
4031 }
4032
4033
4034 static void visit_phi(struct ac_nir_context *ctx, nir_phi_instr *instr)
4035 {
4036 LLVMTypeRef type = get_def_type(ctx, &instr->dest.ssa);
4037 LLVMValueRef result = LLVMBuildPhi(ctx->ac.builder, type, "");
4038
4039 ctx->ssa_defs[instr->dest.ssa.index] = result;
4040 _mesa_hash_table_insert(ctx->phis, instr, result);
4041 }
4042
4043 static void visit_post_phi(struct ac_nir_context *ctx,
4044 nir_phi_instr *instr,
4045 LLVMValueRef llvm_phi)
4046 {
4047 nir_foreach_phi_src(src, instr) {
4048 LLVMBasicBlockRef block = get_block(ctx, src->pred);
4049 LLVMValueRef llvm_src = get_src(ctx, src->src);
4050
4051 LLVMAddIncoming(llvm_phi, &llvm_src, &block, 1);
4052 }
4053 }
4054
4055 static void phi_post_pass(struct ac_nir_context *ctx)
4056 {
4057 hash_table_foreach(ctx->phis, entry) {
4058 visit_post_phi(ctx, (nir_phi_instr*)entry->key,
4059 (LLVMValueRef)entry->data);
4060 }
4061 }
4062
4063
4064 static void visit_ssa_undef(struct ac_nir_context *ctx,
4065 const nir_ssa_undef_instr *instr)
4066 {
4067 unsigned num_components = instr->def.num_components;
4068 LLVMTypeRef type = LLVMIntTypeInContext(ctx->ac.context, instr->def.bit_size);
4069 LLVMValueRef undef;
4070
4071 if (num_components == 1)
4072 undef = LLVMGetUndef(type);
4073 else {
4074 undef = LLVMGetUndef(LLVMVectorType(type, num_components));
4075 }
4076 ctx->ssa_defs[instr->def.index] = undef;
4077 }
4078
4079 static void visit_jump(struct ac_llvm_context *ctx,
4080 const nir_jump_instr *instr)
4081 {
4082 switch (instr->type) {
4083 case nir_jump_break:
4084 ac_build_break(ctx);
4085 break;
4086 case nir_jump_continue:
4087 ac_build_continue(ctx);
4088 break;
4089 default:
4090 fprintf(stderr, "Unknown NIR jump instr: ");
4091 nir_print_instr(&instr->instr, stderr);
4092 fprintf(stderr, "\n");
4093 abort();
4094 }
4095 }
4096
4097 static LLVMTypeRef
4098 glsl_base_to_llvm_type(struct ac_llvm_context *ac,
4099 enum glsl_base_type type)
4100 {
4101 switch (type) {
4102 case GLSL_TYPE_INT:
4103 case GLSL_TYPE_UINT:
4104 case GLSL_TYPE_BOOL:
4105 case GLSL_TYPE_SUBROUTINE:
4106 return ac->i32;
4107 case GLSL_TYPE_INT8:
4108 case GLSL_TYPE_UINT8:
4109 return ac->i8;
4110 case GLSL_TYPE_INT16:
4111 case GLSL_TYPE_UINT16:
4112 return ac->i16;
4113 case GLSL_TYPE_FLOAT:
4114 return ac->f32;
4115 case GLSL_TYPE_FLOAT16:
4116 return ac->f16;
4117 case GLSL_TYPE_INT64:
4118 case GLSL_TYPE_UINT64:
4119 return ac->i64;
4120 case GLSL_TYPE_DOUBLE:
4121 return ac->f64;
4122 default:
4123 unreachable("unknown GLSL type");
4124 }
4125 }
4126
4127 static LLVMTypeRef
4128 glsl_to_llvm_type(struct ac_llvm_context *ac,
4129 const struct glsl_type *type)
4130 {
4131 if (glsl_type_is_scalar(type)) {
4132 return glsl_base_to_llvm_type(ac, glsl_get_base_type(type));
4133 }
4134
4135 if (glsl_type_is_vector(type)) {
4136 return LLVMVectorType(
4137 glsl_base_to_llvm_type(ac, glsl_get_base_type(type)),
4138 glsl_get_vector_elements(type));
4139 }
4140
4141 if (glsl_type_is_matrix(type)) {
4142 return LLVMArrayType(
4143 glsl_to_llvm_type(ac, glsl_get_column_type(type)),
4144 glsl_get_matrix_columns(type));
4145 }
4146
4147 if (glsl_type_is_array(type)) {
4148 return LLVMArrayType(
4149 glsl_to_llvm_type(ac, glsl_get_array_element(type)),
4150 glsl_get_length(type));
4151 }
4152
4153 assert(glsl_type_is_struct_or_ifc(type));
4154
4155 LLVMTypeRef member_types[glsl_get_length(type)];
4156
4157 for (unsigned i = 0; i < glsl_get_length(type); i++) {
4158 member_types[i] =
4159 glsl_to_llvm_type(ac,
4160 glsl_get_struct_field(type, i));
4161 }
4162
4163 return LLVMStructTypeInContext(ac->context, member_types,
4164 glsl_get_length(type), false);
4165 }
4166
4167 static void visit_deref(struct ac_nir_context *ctx,
4168 nir_deref_instr *instr)
4169 {
4170 if (instr->mode != nir_var_mem_shared &&
4171 instr->mode != nir_var_mem_global)
4172 return;
4173
4174 LLVMValueRef result = NULL;
4175 switch(instr->deref_type) {
4176 case nir_deref_type_var: {
4177 struct hash_entry *entry = _mesa_hash_table_search(ctx->vars, instr->var);
4178 result = entry->data;
4179 break;
4180 }
4181 case nir_deref_type_struct:
4182 if (instr->mode == nir_var_mem_global) {
4183 nir_deref_instr *parent = nir_deref_instr_parent(instr);
4184 uint64_t offset = glsl_get_struct_field_offset(parent->type,
4185 instr->strct.index);
4186 result = ac_build_gep_ptr(&ctx->ac, get_src(ctx, instr->parent),
4187 LLVMConstInt(ctx->ac.i32, offset, 0));
4188 } else {
4189 result = ac_build_gep0(&ctx->ac, get_src(ctx, instr->parent),
4190 LLVMConstInt(ctx->ac.i32, instr->strct.index, 0));
4191 }
4192 break;
4193 case nir_deref_type_array:
4194 if (instr->mode == nir_var_mem_global) {
4195 nir_deref_instr *parent = nir_deref_instr_parent(instr);
4196 unsigned stride = glsl_get_explicit_stride(parent->type);
4197
4198 if ((glsl_type_is_matrix(parent->type) &&
4199 glsl_matrix_type_is_row_major(parent->type)) ||
4200 (glsl_type_is_vector(parent->type) && stride == 0))
4201 stride = type_scalar_size_bytes(parent->type);
4202
4203 assert(stride > 0);
4204 LLVMValueRef index = get_src(ctx, instr->arr.index);
4205 if (LLVMTypeOf(index) != ctx->ac.i64)
4206 index = LLVMBuildZExt(ctx->ac.builder, index, ctx->ac.i64, "");
4207
4208 LLVMValueRef offset = LLVMBuildMul(ctx->ac.builder, index, LLVMConstInt(ctx->ac.i64, stride, 0), "");
4209
4210 result = ac_build_gep_ptr(&ctx->ac, get_src(ctx, instr->parent), offset);
4211 } else {
4212 result = ac_build_gep0(&ctx->ac, get_src(ctx, instr->parent),
4213 get_src(ctx, instr->arr.index));
4214 }
4215 break;
4216 case nir_deref_type_ptr_as_array:
4217 if (instr->mode == nir_var_mem_global) {
4218 unsigned stride = nir_deref_instr_ptr_as_array_stride(instr);
4219
4220 LLVMValueRef index = get_src(ctx, instr->arr.index);
4221 if (LLVMTypeOf(index) != ctx->ac.i64)
4222 index = LLVMBuildZExt(ctx->ac.builder, index, ctx->ac.i64, "");
4223
4224 LLVMValueRef offset = LLVMBuildMul(ctx->ac.builder, index, LLVMConstInt(ctx->ac.i64, stride, 0), "");
4225
4226 result = ac_build_gep_ptr(&ctx->ac, get_src(ctx, instr->parent), offset);
4227 } else {
4228 result = ac_build_gep_ptr(&ctx->ac, get_src(ctx, instr->parent),
4229 get_src(ctx, instr->arr.index));
4230 }
4231 break;
4232 case nir_deref_type_cast: {
4233 result = get_src(ctx, instr->parent);
4234
4235 /* We can't use the structs from LLVM because the shader
4236 * specifies its own offsets. */
4237 LLVMTypeRef pointee_type = ctx->ac.i8;
4238 if (instr->mode == nir_var_mem_shared)
4239 pointee_type = glsl_to_llvm_type(&ctx->ac, instr->type);
4240
4241 unsigned address_space;
4242
4243 switch(instr->mode) {
4244 case nir_var_mem_shared:
4245 address_space = AC_ADDR_SPACE_LDS;
4246 break;
4247 case nir_var_mem_global:
4248 address_space = AC_ADDR_SPACE_GLOBAL;
4249 break;
4250 default:
4251 unreachable("Unhandled address space");
4252 }
4253
4254 LLVMTypeRef type = LLVMPointerType(pointee_type, address_space);
4255
4256 if (LLVMTypeOf(result) != type) {
4257 if (LLVMGetTypeKind(LLVMTypeOf(result)) == LLVMVectorTypeKind) {
4258 result = LLVMBuildBitCast(ctx->ac.builder, result,
4259 type, "");
4260 } else {
4261 result = LLVMBuildIntToPtr(ctx->ac.builder, result,
4262 type, "");
4263 }
4264 }
4265 break;
4266 }
4267 default:
4268 unreachable("Unhandled deref_instr deref type");
4269 }
4270
4271 ctx->ssa_defs[instr->dest.ssa.index] = result;
4272 }
4273
4274 static void visit_cf_list(struct ac_nir_context *ctx,
4275 struct exec_list *list);
4276
4277 static void visit_block(struct ac_nir_context *ctx, nir_block *block)
4278 {
4279 nir_foreach_instr(instr, block)
4280 {
4281 switch (instr->type) {
4282 case nir_instr_type_alu:
4283 visit_alu(ctx, nir_instr_as_alu(instr));
4284 break;
4285 case nir_instr_type_load_const:
4286 visit_load_const(ctx, nir_instr_as_load_const(instr));
4287 break;
4288 case nir_instr_type_intrinsic:
4289 visit_intrinsic(ctx, nir_instr_as_intrinsic(instr));
4290 break;
4291 case nir_instr_type_tex:
4292 visit_tex(ctx, nir_instr_as_tex(instr));
4293 break;
4294 case nir_instr_type_phi:
4295 visit_phi(ctx, nir_instr_as_phi(instr));
4296 break;
4297 case nir_instr_type_ssa_undef:
4298 visit_ssa_undef(ctx, nir_instr_as_ssa_undef(instr));
4299 break;
4300 case nir_instr_type_jump:
4301 visit_jump(&ctx->ac, nir_instr_as_jump(instr));
4302 break;
4303 case nir_instr_type_deref:
4304 visit_deref(ctx, nir_instr_as_deref(instr));
4305 break;
4306 default:
4307 fprintf(stderr, "Unknown NIR instr type: ");
4308 nir_print_instr(instr, stderr);
4309 fprintf(stderr, "\n");
4310 abort();
4311 }
4312 }
4313
4314 _mesa_hash_table_insert(ctx->defs, block,
4315 LLVMGetInsertBlock(ctx->ac.builder));
4316 }
4317
4318 static void visit_if(struct ac_nir_context *ctx, nir_if *if_stmt)
4319 {
4320 LLVMValueRef value = get_src(ctx, if_stmt->condition);
4321
4322 nir_block *then_block =
4323 (nir_block *) exec_list_get_head(&if_stmt->then_list);
4324
4325 ac_build_uif(&ctx->ac, value, then_block->index);
4326
4327 visit_cf_list(ctx, &if_stmt->then_list);
4328
4329 if (!exec_list_is_empty(&if_stmt->else_list)) {
4330 nir_block *else_block =
4331 (nir_block *) exec_list_get_head(&if_stmt->else_list);
4332
4333 ac_build_else(&ctx->ac, else_block->index);
4334 visit_cf_list(ctx, &if_stmt->else_list);
4335 }
4336
4337 ac_build_endif(&ctx->ac, then_block->index);
4338 }
4339
4340 static void visit_loop(struct ac_nir_context *ctx, nir_loop *loop)
4341 {
4342 nir_block *first_loop_block =
4343 (nir_block *) exec_list_get_head(&loop->body);
4344
4345 ac_build_bgnloop(&ctx->ac, first_loop_block->index);
4346
4347 visit_cf_list(ctx, &loop->body);
4348
4349 ac_build_endloop(&ctx->ac, first_loop_block->index);
4350 }
4351
4352 static void visit_cf_list(struct ac_nir_context *ctx,
4353 struct exec_list *list)
4354 {
4355 foreach_list_typed(nir_cf_node, node, node, list)
4356 {
4357 switch (node->type) {
4358 case nir_cf_node_block:
4359 visit_block(ctx, nir_cf_node_as_block(node));
4360 break;
4361
4362 case nir_cf_node_if:
4363 visit_if(ctx, nir_cf_node_as_if(node));
4364 break;
4365
4366 case nir_cf_node_loop:
4367 visit_loop(ctx, nir_cf_node_as_loop(node));
4368 break;
4369
4370 default:
4371 assert(0);
4372 }
4373 }
4374 }
4375
4376 void
4377 ac_handle_shader_output_decl(struct ac_llvm_context *ctx,
4378 struct ac_shader_abi *abi,
4379 struct nir_shader *nir,
4380 struct nir_variable *variable,
4381 gl_shader_stage stage)
4382 {
4383 unsigned output_loc = variable->data.driver_location / 4;
4384 unsigned attrib_count = glsl_count_attribute_slots(variable->type, false);
4385
4386 /* tess ctrl has it's own load/store paths for outputs */
4387 if (stage == MESA_SHADER_TESS_CTRL)
4388 return;
4389
4390 if (stage == MESA_SHADER_VERTEX ||
4391 stage == MESA_SHADER_TESS_EVAL ||
4392 stage == MESA_SHADER_GEOMETRY) {
4393 int idx = variable->data.location + variable->data.index;
4394 if (idx == VARYING_SLOT_CLIP_DIST0) {
4395 int length = nir->info.clip_distance_array_size +
4396 nir->info.cull_distance_array_size;
4397
4398 if (length > 4)
4399 attrib_count = 2;
4400 else
4401 attrib_count = 1;
4402 }
4403 }
4404
4405 bool is_16bit = glsl_type_is_16bit(glsl_without_array(variable->type));
4406 LLVMTypeRef type = is_16bit ? ctx->f16 : ctx->f32;
4407 for (unsigned i = 0; i < attrib_count; ++i) {
4408 for (unsigned chan = 0; chan < 4; chan++) {
4409 abi->outputs[ac_llvm_reg_index_soa(output_loc + i, chan)] =
4410 ac_build_alloca_undef(ctx, type, "");
4411 }
4412 }
4413 }
4414
4415 static void
4416 setup_locals(struct ac_nir_context *ctx,
4417 struct nir_function *func)
4418 {
4419 int i, j;
4420 ctx->num_locals = 0;
4421 nir_foreach_variable(variable, &func->impl->locals) {
4422 unsigned attrib_count = glsl_count_attribute_slots(variable->type, false);
4423 variable->data.driver_location = ctx->num_locals * 4;
4424 variable->data.location_frac = 0;
4425 ctx->num_locals += attrib_count;
4426 }
4427 ctx->locals = malloc(4 * ctx->num_locals * sizeof(LLVMValueRef));
4428 if (!ctx->locals)
4429 return;
4430
4431 for (i = 0; i < ctx->num_locals; i++) {
4432 for (j = 0; j < 4; j++) {
4433 ctx->locals[i * 4 + j] =
4434 ac_build_alloca_undef(&ctx->ac, ctx->ac.f32, "temp");
4435 }
4436 }
4437 }
4438
4439 static void
4440 setup_shared(struct ac_nir_context *ctx,
4441 struct nir_shader *nir)
4442 {
4443 nir_foreach_variable(variable, &nir->shared) {
4444 LLVMValueRef shared =
4445 LLVMAddGlobalInAddressSpace(
4446 ctx->ac.module, glsl_to_llvm_type(&ctx->ac, variable->type),
4447 variable->name ? variable->name : "",
4448 AC_ADDR_SPACE_LDS);
4449 _mesa_hash_table_insert(ctx->vars, variable, shared);
4450 }
4451 }
4452
4453 void ac_nir_translate(struct ac_llvm_context *ac, struct ac_shader_abi *abi,
4454 struct nir_shader *nir)
4455 {
4456 struct ac_nir_context ctx = {};
4457 struct nir_function *func;
4458
4459 ctx.ac = *ac;
4460 ctx.abi = abi;
4461
4462 ctx.stage = nir->info.stage;
4463 ctx.info = &nir->info;
4464
4465 ctx.main_function = LLVMGetBasicBlockParent(LLVMGetInsertBlock(ctx.ac.builder));
4466
4467 nir_foreach_variable(variable, &nir->outputs)
4468 ac_handle_shader_output_decl(&ctx.ac, ctx.abi, nir, variable,
4469 ctx.stage);
4470
4471 ctx.defs = _mesa_hash_table_create(NULL, _mesa_hash_pointer,
4472 _mesa_key_pointer_equal);
4473 ctx.phis = _mesa_hash_table_create(NULL, _mesa_hash_pointer,
4474 _mesa_key_pointer_equal);
4475 ctx.vars = _mesa_hash_table_create(NULL, _mesa_hash_pointer,
4476 _mesa_key_pointer_equal);
4477
4478 func = (struct nir_function *)exec_list_get_head(&nir->functions);
4479
4480 nir_index_ssa_defs(func->impl);
4481 ctx.ssa_defs = calloc(func->impl->ssa_alloc, sizeof(LLVMValueRef));
4482
4483 setup_locals(&ctx, func);
4484
4485 if (gl_shader_stage_is_compute(nir->info.stage))
4486 setup_shared(&ctx, nir);
4487
4488 visit_cf_list(&ctx, &func->impl->body);
4489 phi_post_pass(&ctx);
4490
4491 if (!gl_shader_stage_is_compute(nir->info.stage))
4492 ctx.abi->emit_outputs(ctx.abi, AC_LLVM_MAX_OUTPUTS,
4493 ctx.abi->outputs);
4494
4495 free(ctx.locals);
4496 free(ctx.ssa_defs);
4497 ralloc_free(ctx.defs);
4498 ralloc_free(ctx.phis);
4499 ralloc_free(ctx.vars);
4500 }
4501
4502 void
4503 ac_lower_indirect_derefs(struct nir_shader *nir, enum chip_class chip_class)
4504 {
4505 /* While it would be nice not to have this flag, we are constrained
4506 * by the reality that LLVM 9.0 has buggy VGPR indexing on GFX9.
4507 */
4508 bool llvm_has_working_vgpr_indexing = chip_class != GFX9;
4509
4510 /* TODO: Indirect indexing of GS inputs is unimplemented.
4511 *
4512 * TCS and TES load inputs directly from LDS or offchip memory, so
4513 * indirect indexing is trivial.
4514 */
4515 nir_variable_mode indirect_mask = 0;
4516 if (nir->info.stage == MESA_SHADER_GEOMETRY ||
4517 (nir->info.stage != MESA_SHADER_TESS_CTRL &&
4518 nir->info.stage != MESA_SHADER_TESS_EVAL &&
4519 !llvm_has_working_vgpr_indexing)) {
4520 indirect_mask |= nir_var_shader_in;
4521 }
4522 if (!llvm_has_working_vgpr_indexing &&
4523 nir->info.stage != MESA_SHADER_TESS_CTRL)
4524 indirect_mask |= nir_var_shader_out;
4525
4526 /* TODO: We shouldn't need to do this, however LLVM isn't currently
4527 * smart enough to handle indirects without causing excess spilling
4528 * causing the gpu to hang.
4529 *
4530 * See the following thread for more details of the problem:
4531 * https://lists.freedesktop.org/archives/mesa-dev/2017-July/162106.html
4532 */
4533 indirect_mask |= nir_var_function_temp;
4534
4535 nir_lower_indirect_derefs(nir, indirect_mask);
4536 }
4537
4538 static unsigned
4539 get_inst_tessfactor_writemask(nir_intrinsic_instr *intrin)
4540 {
4541 if (intrin->intrinsic != nir_intrinsic_store_deref)
4542 return 0;
4543
4544 nir_variable *var =
4545 nir_deref_instr_get_variable(nir_src_as_deref(intrin->src[0]));
4546
4547 if (var->data.mode != nir_var_shader_out)
4548 return 0;
4549
4550 unsigned writemask = 0;
4551 const int location = var->data.location;
4552 unsigned first_component = var->data.location_frac;
4553 unsigned num_comps = intrin->dest.ssa.num_components;
4554
4555 if (location == VARYING_SLOT_TESS_LEVEL_INNER)
4556 writemask = ((1 << (num_comps + 1)) - 1) << first_component;
4557 else if (location == VARYING_SLOT_TESS_LEVEL_OUTER)
4558 writemask = (((1 << (num_comps + 1)) - 1) << first_component) << 4;
4559
4560 return writemask;
4561 }
4562
4563 static void
4564 scan_tess_ctrl(nir_cf_node *cf_node, unsigned *upper_block_tf_writemask,
4565 unsigned *cond_block_tf_writemask,
4566 bool *tessfactors_are_def_in_all_invocs, bool is_nested_cf)
4567 {
4568 switch (cf_node->type) {
4569 case nir_cf_node_block: {
4570 nir_block *block = nir_cf_node_as_block(cf_node);
4571 nir_foreach_instr(instr, block) {
4572 if (instr->type != nir_instr_type_intrinsic)
4573 continue;
4574
4575 nir_intrinsic_instr *intrin = nir_instr_as_intrinsic(instr);
4576 if (intrin->intrinsic == nir_intrinsic_barrier) {
4577
4578 /* If we find a barrier in nested control flow put this in the
4579 * too hard basket. In GLSL this is not possible but it is in
4580 * SPIR-V.
4581 */
4582 if (is_nested_cf) {
4583 *tessfactors_are_def_in_all_invocs = false;
4584 return;
4585 }
4586
4587 /* The following case must be prevented:
4588 * gl_TessLevelInner = ...;
4589 * barrier();
4590 * if (gl_InvocationID == 1)
4591 * gl_TessLevelInner = ...;
4592 *
4593 * If you consider disjoint code segments separated by barriers, each
4594 * such segment that writes tess factor channels should write the same
4595 * channels in all codepaths within that segment.
4596 */
4597 if (upper_block_tf_writemask || cond_block_tf_writemask) {
4598 /* Accumulate the result: */
4599 *tessfactors_are_def_in_all_invocs &=
4600 !(*cond_block_tf_writemask & ~(*upper_block_tf_writemask));
4601
4602 /* Analyze the next code segment from scratch. */
4603 *upper_block_tf_writemask = 0;
4604 *cond_block_tf_writemask = 0;
4605 }
4606 } else
4607 *upper_block_tf_writemask |= get_inst_tessfactor_writemask(intrin);
4608 }
4609
4610 break;
4611 }
4612 case nir_cf_node_if: {
4613 unsigned then_tessfactor_writemask = 0;
4614 unsigned else_tessfactor_writemask = 0;
4615
4616 nir_if *if_stmt = nir_cf_node_as_if(cf_node);
4617 foreach_list_typed(nir_cf_node, nested_node, node, &if_stmt->then_list) {
4618 scan_tess_ctrl(nested_node, &then_tessfactor_writemask,
4619 cond_block_tf_writemask,
4620 tessfactors_are_def_in_all_invocs, true);
4621 }
4622
4623 foreach_list_typed(nir_cf_node, nested_node, node, &if_stmt->else_list) {
4624 scan_tess_ctrl(nested_node, &else_tessfactor_writemask,
4625 cond_block_tf_writemask,
4626 tessfactors_are_def_in_all_invocs, true);
4627 }
4628
4629 if (then_tessfactor_writemask || else_tessfactor_writemask) {
4630 /* If both statements write the same tess factor channels,
4631 * we can say that the upper block writes them too.
4632 */
4633 *upper_block_tf_writemask |= then_tessfactor_writemask &
4634 else_tessfactor_writemask;
4635 *cond_block_tf_writemask |= then_tessfactor_writemask |
4636 else_tessfactor_writemask;
4637 }
4638
4639 break;
4640 }
4641 case nir_cf_node_loop: {
4642 nir_loop *loop = nir_cf_node_as_loop(cf_node);
4643 foreach_list_typed(nir_cf_node, nested_node, node, &loop->body) {
4644 scan_tess_ctrl(nested_node, cond_block_tf_writemask,
4645 cond_block_tf_writemask,
4646 tessfactors_are_def_in_all_invocs, true);
4647 }
4648
4649 break;
4650 }
4651 default:
4652 unreachable("unknown cf node type");
4653 }
4654 }
4655
4656 bool
4657 ac_are_tessfactors_def_in_all_invocs(const struct nir_shader *nir)
4658 {
4659 assert(nir->info.stage == MESA_SHADER_TESS_CTRL);
4660
4661 /* The pass works as follows:
4662 * If all codepaths write tess factors, we can say that all
4663 * invocations define tess factors.
4664 *
4665 * Each tess factor channel is tracked separately.
4666 */
4667 unsigned main_block_tf_writemask = 0; /* if main block writes tess factors */
4668 unsigned cond_block_tf_writemask = 0; /* if cond block writes tess factors */
4669
4670 /* Initial value = true. Here the pass will accumulate results from
4671 * multiple segments surrounded by barriers. If tess factors aren't
4672 * written at all, it's a shader bug and we don't care if this will be
4673 * true.
4674 */
4675 bool tessfactors_are_def_in_all_invocs = true;
4676
4677 nir_foreach_function(function, nir) {
4678 if (function->impl) {
4679 foreach_list_typed(nir_cf_node, node, node, &function->impl->body) {
4680 scan_tess_ctrl(node, &main_block_tf_writemask,
4681 &cond_block_tf_writemask,
4682 &tessfactors_are_def_in_all_invocs,
4683 false);
4684 }
4685 }
4686 }
4687
4688 /* Accumulate the result for the last code segment separated by a
4689 * barrier.
4690 */
4691 if (main_block_tf_writemask || cond_block_tf_writemask) {
4692 tessfactors_are_def_in_all_invocs &=
4693 !(cond_block_tf_writemask & ~main_block_tf_writemask);
4694 }
4695
4696 return tessfactors_are_def_in_all_invocs;
4697 }