2 * Copyright © 2016 Bas Nieuwenhuizen
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
24 #include "ac_nir_to_llvm.h"
25 #include "ac_llvm_util.h"
26 #include "ac_binary.h"
29 #include "../vulkan/radv_descriptor_set.h"
30 #include "util/bitscan.h"
31 #include <llvm-c/Transforms/Scalar.h>
33 enum radeon_llvm_calling_convention
{
34 RADEON_LLVM_AMDGPU_VS
= 87,
35 RADEON_LLVM_AMDGPU_GS
= 88,
36 RADEON_LLVM_AMDGPU_PS
= 89,
37 RADEON_LLVM_AMDGPU_CS
= 90,
40 #define CONST_ADDR_SPACE 2
41 #define LOCAL_ADDR_SPACE 3
43 #define RADEON_LLVM_MAX_INPUTS (VARYING_SLOT_VAR31 + 1)
44 #define RADEON_LLVM_MAX_OUTPUTS (VARYING_SLOT_VAR31 + 1)
47 #define SENDMSG_GS_DONE 3
49 #define SENDMSG_GS_OP_NOP (0 << 4)
50 #define SENDMSG_GS_OP_CUT (1 << 4)
51 #define SENDMSG_GS_OP_EMIT (2 << 4)
52 #define SENDMSG_GS_OP_EMIT_CUT (3 << 4)
61 struct nir_to_llvm_context
{
62 struct ac_llvm_context ac
;
63 const struct ac_nir_compiler_options
*options
;
64 struct ac_shader_variant_info
*shader_info
;
66 LLVMContextRef context
;
68 LLVMBuilderRef builder
;
69 LLVMValueRef main_function
;
71 struct hash_table
*defs
;
72 struct hash_table
*phis
;
74 LLVMValueRef descriptor_sets
[AC_UD_MAX_SETS
];
75 LLVMValueRef ring_offsets
;
76 LLVMValueRef push_constants
;
77 LLVMValueRef num_work_groups
;
78 LLVMValueRef workgroup_ids
;
79 LLVMValueRef local_invocation_ids
;
82 LLVMValueRef vertex_buffers
;
83 LLVMValueRef base_vertex
;
84 LLVMValueRef start_instance
;
85 LLVMValueRef vertex_id
;
86 LLVMValueRef rel_auto_id
;
87 LLVMValueRef vs_prim_id
;
88 LLVMValueRef instance_id
;
90 LLVMValueRef es2gs_offset
;
92 LLVMValueRef gsvs_ring_stride
;
93 LLVMValueRef gsvs_num_entries
;
94 LLVMValueRef gs2vs_offset
;
95 LLVMValueRef gs_wave_id
;
96 LLVMValueRef gs_vtx_offset
[6];
97 LLVMValueRef gs_prim_id
, gs_invocation_id
;
99 LLVMValueRef esgs_ring
;
100 LLVMValueRef gsvs_ring
;
102 LLVMValueRef prim_mask
;
103 LLVMValueRef sample_positions
;
104 LLVMValueRef persp_sample
, persp_center
, persp_centroid
;
105 LLVMValueRef linear_sample
, linear_center
, linear_centroid
;
106 LLVMValueRef front_face
;
107 LLVMValueRef ancillary
;
108 LLVMValueRef frag_pos
[4];
110 LLVMBasicBlockRef continue_block
;
111 LLVMBasicBlockRef break_block
;
129 LLVMValueRef i32zero
;
131 LLVMValueRef f32zero
;
133 LLVMValueRef v4f32empty
;
135 unsigned range_md_kind
;
136 unsigned uniform_md_kind
;
137 unsigned invariant_load_md_kind
;
138 LLVMValueRef empty_md
;
139 gl_shader_stage stage
;
142 LLVMValueRef inputs
[RADEON_LLVM_MAX_INPUTS
* 4];
143 LLVMValueRef outputs
[RADEON_LLVM_MAX_OUTPUTS
* 4];
145 LLVMValueRef shared_memory
;
147 uint64_t output_mask
;
149 LLVMValueRef
*locals
;
154 bool has_ds_bpermute
;
156 bool is_gs_copy_shader
;
157 LLVMValueRef gs_next_vertex
;
158 unsigned gs_max_out_vertices
;
162 LLVMValueRef args
[12];
164 LLVMTypeRef dst_type
;
168 static LLVMValueRef
get_sampler_desc(struct nir_to_llvm_context
*ctx
,
169 nir_deref_var
*deref
,
170 enum desc_type desc_type
);
171 static unsigned radeon_llvm_reg_index_soa(unsigned index
, unsigned chan
)
173 return (index
* 4) + chan
;
176 static unsigned shader_io_get_unique_index(gl_varying_slot slot
)
178 if (slot
== VARYING_SLOT_POS
)
180 if (slot
== VARYING_SLOT_PSIZ
)
182 if (slot
== VARYING_SLOT_CLIP_DIST0
)
184 if (slot
== VARYING_SLOT_CLIP_DIST1
)
186 if (slot
>= VARYING_SLOT_VAR0
&& slot
<= VARYING_SLOT_VAR31
)
187 return 4 + (slot
- VARYING_SLOT_VAR0
);
188 unreachable("illegal slot in get unique index\n");
191 static unsigned llvm_get_type_size(LLVMTypeRef type
)
193 LLVMTypeKind kind
= LLVMGetTypeKind(type
);
196 case LLVMIntegerTypeKind
:
197 return LLVMGetIntTypeWidth(type
) / 8;
198 case LLVMFloatTypeKind
:
200 case LLVMPointerTypeKind
:
202 case LLVMVectorTypeKind
:
203 return LLVMGetVectorSize(type
) *
204 llvm_get_type_size(LLVMGetElementType(type
));
211 static void set_llvm_calling_convention(LLVMValueRef func
,
212 gl_shader_stage stage
)
214 enum radeon_llvm_calling_convention calling_conv
;
217 case MESA_SHADER_VERTEX
:
218 case MESA_SHADER_TESS_CTRL
:
219 case MESA_SHADER_TESS_EVAL
:
220 calling_conv
= RADEON_LLVM_AMDGPU_VS
;
222 case MESA_SHADER_GEOMETRY
:
223 calling_conv
= RADEON_LLVM_AMDGPU_GS
;
225 case MESA_SHADER_FRAGMENT
:
226 calling_conv
= RADEON_LLVM_AMDGPU_PS
;
228 case MESA_SHADER_COMPUTE
:
229 calling_conv
= RADEON_LLVM_AMDGPU_CS
;
232 unreachable("Unhandle shader type");
235 LLVMSetFunctionCallConv(func
, calling_conv
);
239 create_llvm_function(LLVMContextRef ctx
, LLVMModuleRef module
,
240 LLVMBuilderRef builder
, LLVMTypeRef
*return_types
,
241 unsigned num_return_elems
, LLVMTypeRef
*param_types
,
242 unsigned param_count
, unsigned array_params_mask
,
243 unsigned sgpr_params
, bool unsafe_math
)
245 LLVMTypeRef main_function_type
, ret_type
;
246 LLVMBasicBlockRef main_function_body
;
248 if (num_return_elems
)
249 ret_type
= LLVMStructTypeInContext(ctx
, return_types
,
250 num_return_elems
, true);
252 ret_type
= LLVMVoidTypeInContext(ctx
);
254 /* Setup the function */
256 LLVMFunctionType(ret_type
, param_types
, param_count
, 0);
257 LLVMValueRef main_function
=
258 LLVMAddFunction(module
, "main", main_function_type
);
260 LLVMAppendBasicBlockInContext(ctx
, main_function
, "main_body");
261 LLVMPositionBuilderAtEnd(builder
, main_function_body
);
263 LLVMSetFunctionCallConv(main_function
, RADEON_LLVM_AMDGPU_CS
);
264 for (unsigned i
= 0; i
< sgpr_params
; ++i
) {
265 if (array_params_mask
& (1 << i
)) {
266 LLVMValueRef P
= LLVMGetParam(main_function
, i
);
267 ac_add_function_attr(main_function
, i
+ 1, AC_FUNC_ATTR_BYVAL
);
268 ac_add_attr_dereferenceable(P
, UINT64_MAX
);
271 ac_add_function_attr(main_function
, i
+ 1, AC_FUNC_ATTR_INREG
);
276 /* These were copied from some LLVM test. */
277 LLVMAddTargetDependentFunctionAttr(main_function
,
278 "less-precise-fpmad",
280 LLVMAddTargetDependentFunctionAttr(main_function
,
283 LLVMAddTargetDependentFunctionAttr(main_function
,
286 LLVMAddTargetDependentFunctionAttr(main_function
,
290 return main_function
;
293 static LLVMTypeRef
const_array(LLVMTypeRef elem_type
, int num_elements
)
295 return LLVMPointerType(LLVMArrayType(elem_type
, num_elements
),
299 static LLVMValueRef
get_shared_memory_ptr(struct nir_to_llvm_context
*ctx
,
307 offset
= LLVMConstInt(ctx
->i32
, idx
, false);
309 ptr
= ctx
->shared_memory
;
310 ptr
= LLVMBuildGEP(ctx
->builder
, ptr
, &offset
, 1, "");
311 addr_space
= LLVMGetPointerAddressSpace(LLVMTypeOf(ptr
));
312 ptr
= LLVMBuildBitCast(ctx
->builder
, ptr
, LLVMPointerType(type
, addr_space
), "");
316 static LLVMValueRef
to_integer(struct nir_to_llvm_context
*ctx
, LLVMValueRef v
)
318 LLVMTypeRef type
= LLVMTypeOf(v
);
319 if (type
== ctx
->f32
) {
320 return LLVMBuildBitCast(ctx
->builder
, v
, ctx
->i32
, "");
321 } else if (LLVMGetTypeKind(type
) == LLVMVectorTypeKind
) {
322 LLVMTypeRef elem_type
= LLVMGetElementType(type
);
323 if (elem_type
== ctx
->f32
) {
324 LLVMTypeRef nt
= LLVMVectorType(ctx
->i32
, LLVMGetVectorSize(type
));
325 return LLVMBuildBitCast(ctx
->builder
, v
, nt
, "");
331 static LLVMValueRef
to_float(struct nir_to_llvm_context
*ctx
, LLVMValueRef v
)
333 LLVMTypeRef type
= LLVMTypeOf(v
);
334 if (type
== ctx
->i32
) {
335 return LLVMBuildBitCast(ctx
->builder
, v
, ctx
->f32
, "");
336 } else if (LLVMGetTypeKind(type
) == LLVMVectorTypeKind
) {
337 LLVMTypeRef elem_type
= LLVMGetElementType(type
);
338 if (elem_type
== ctx
->i32
) {
339 LLVMTypeRef nt
= LLVMVectorType(ctx
->f32
, LLVMGetVectorSize(type
));
340 return LLVMBuildBitCast(ctx
->builder
, v
, nt
, "");
346 static LLVMValueRef
unpack_param(struct nir_to_llvm_context
*ctx
,
347 LLVMValueRef param
, unsigned rshift
,
350 LLVMValueRef value
= param
;
352 value
= LLVMBuildLShr(ctx
->builder
, value
,
353 LLVMConstInt(ctx
->i32
, rshift
, false), "");
355 if (rshift
+ bitwidth
< 32) {
356 unsigned mask
= (1 << bitwidth
) - 1;
357 value
= LLVMBuildAnd(ctx
->builder
, value
,
358 LLVMConstInt(ctx
->i32
, mask
, false), "");
363 static LLVMValueRef
build_gep0(struct nir_to_llvm_context
*ctx
,
364 LLVMValueRef base_ptr
, LLVMValueRef index
)
366 LLVMValueRef indices
[2] = {
370 return LLVMBuildGEP(ctx
->builder
, base_ptr
,
374 static LLVMValueRef
build_indexed_load(struct nir_to_llvm_context
*ctx
,
375 LLVMValueRef base_ptr
, LLVMValueRef index
,
378 LLVMValueRef pointer
;
379 pointer
= build_gep0(ctx
, base_ptr
, index
);
381 LLVMSetMetadata(pointer
, ctx
->uniform_md_kind
, ctx
->empty_md
);
382 return LLVMBuildLoad(ctx
->builder
, pointer
, "");
385 static LLVMValueRef
build_indexed_load_const(struct nir_to_llvm_context
*ctx
,
386 LLVMValueRef base_ptr
, LLVMValueRef index
)
388 LLVMValueRef result
= build_indexed_load(ctx
, base_ptr
, index
, true);
389 LLVMSetMetadata(result
, ctx
->invariant_load_md_kind
, ctx
->empty_md
);
393 static void build_tbuffer_store(struct nir_to_llvm_context
*ctx
,
396 unsigned num_channels
,
398 LLVMValueRef soffset
,
399 unsigned inst_offset
,
408 LLVMValueRef args
[] = {
411 LLVMConstInt(ctx
->i32
, num_channels
, 0),
414 LLVMConstInt(ctx
->i32
, inst_offset
, 0),
415 LLVMConstInt(ctx
->i32
, dfmt
, 0),
416 LLVMConstInt(ctx
->i32
, nfmt
, 0),
417 LLVMConstInt(ctx
->i32
, offen
, 0),
418 LLVMConstInt(ctx
->i32
, idxen
, 0),
419 LLVMConstInt(ctx
->i32
, glc
, 0),
420 LLVMConstInt(ctx
->i32
, slc
, 0),
421 LLVMConstInt(ctx
->i32
, tfe
, 0)
424 /* The intrinsic is overloaded, we need to add a type suffix for overloading to work. */
425 unsigned func
= CLAMP(num_channels
, 1, 3) - 1;
426 const char *types
[] = {"i32", "v2i32", "v4i32"};
428 snprintf(name
, sizeof(name
), "llvm.SI.tbuffer.store.%s", types
[func
]);
430 ac_emit_llvm_intrinsic(&ctx
->ac
, name
, ctx
->voidt
,
431 args
, ARRAY_SIZE(args
), 0);
435 static void set_userdata_location(struct ac_userdata_info
*ud_info
, uint8_t sgpr_idx
, uint8_t num_sgprs
)
437 ud_info
->sgpr_idx
= sgpr_idx
;
438 ud_info
->num_sgprs
= num_sgprs
;
439 ud_info
->indirect
= false;
440 ud_info
->indirect_offset
= 0;
443 static void set_userdata_location_shader(struct nir_to_llvm_context
*ctx
,
444 int idx
, uint8_t sgpr_idx
, uint8_t num_sgprs
)
446 set_userdata_location(&ctx
->shader_info
->user_sgprs_locs
.shader_data
[idx
], sgpr_idx
, num_sgprs
);
450 static void set_userdata_location_indirect(struct ac_userdata_info
*ud_info
, uint8_t sgpr_idx
, uint8_t num_sgprs
,
451 uint32_t indirect_offset
)
453 ud_info
->sgpr_idx
= sgpr_idx
;
454 ud_info
->num_sgprs
= num_sgprs
;
455 ud_info
->indirect
= true;
456 ud_info
->indirect_offset
= indirect_offset
;
460 static void create_function(struct nir_to_llvm_context
*ctx
)
462 LLVMTypeRef arg_types
[23];
463 unsigned arg_idx
= 0;
464 unsigned array_params_mask
= 0;
465 unsigned sgpr_count
= 0, user_sgpr_count
;
467 unsigned num_sets
= ctx
->options
->layout
? ctx
->options
->layout
->num_sets
: 0;
468 unsigned user_sgpr_idx
;
469 bool need_push_constants
;
470 bool need_ring_offsets
= false;
472 /* until we sort out scratch/global buffers always assign ring offsets for gs/vs/es */
473 if (ctx
->stage
== MESA_SHADER_GEOMETRY
||
474 ctx
->stage
== MESA_SHADER_VERTEX
||
475 ctx
->is_gs_copy_shader
)
476 need_ring_offsets
= true;
478 need_push_constants
= true;
479 if (!ctx
->options
->layout
)
480 need_push_constants
= false;
481 else if (!ctx
->options
->layout
->push_constant_size
&&
482 !ctx
->options
->layout
->dynamic_offset_count
)
483 need_push_constants
= false;
485 if (need_ring_offsets
&& !ctx
->options
->supports_spill
) {
486 arg_types
[arg_idx
++] = const_array(ctx
->v16i8
, 8); /* address of rings */
489 /* 1 for each descriptor set */
490 for (unsigned i
= 0; i
< num_sets
; ++i
) {
491 if (ctx
->options
->layout
->set
[i
].layout
->shader_stages
& (1 << ctx
->stage
)) {
492 array_params_mask
|= (1 << arg_idx
);
493 arg_types
[arg_idx
++] = const_array(ctx
->i8
, 1024 * 1024);
497 if (need_push_constants
) {
498 /* 1 for push constants and dynamic descriptors */
499 array_params_mask
|= (1 << arg_idx
);
500 arg_types
[arg_idx
++] = const_array(ctx
->i8
, 1024 * 1024);
503 switch (ctx
->stage
) {
504 case MESA_SHADER_COMPUTE
:
505 arg_types
[arg_idx
++] = LLVMVectorType(ctx
->i32
, 3); /* grid size */
506 user_sgpr_count
= arg_idx
;
507 arg_types
[arg_idx
++] = LLVMVectorType(ctx
->i32
, 3);
508 arg_types
[arg_idx
++] = ctx
->i32
;
509 sgpr_count
= arg_idx
;
511 arg_types
[arg_idx
++] = LLVMVectorType(ctx
->i32
, 3);
513 case MESA_SHADER_VERTEX
:
514 if (!ctx
->is_gs_copy_shader
) {
515 arg_types
[arg_idx
++] = const_array(ctx
->v16i8
, 16); /* vertex buffers */
516 arg_types
[arg_idx
++] = ctx
->i32
; // base vertex
517 arg_types
[arg_idx
++] = ctx
->i32
; // start instance
519 user_sgpr_count
= arg_idx
;
520 if (ctx
->options
->key
.vs
.as_es
)
521 arg_types
[arg_idx
++] = ctx
->i32
; //es2gs offset
522 sgpr_count
= arg_idx
;
523 arg_types
[arg_idx
++] = ctx
->i32
; // vertex id
524 if (!ctx
->is_gs_copy_shader
) {
525 arg_types
[arg_idx
++] = ctx
->i32
; // rel auto id
526 arg_types
[arg_idx
++] = ctx
->i32
; // vs prim id
527 arg_types
[arg_idx
++] = ctx
->i32
; // instance id
530 case MESA_SHADER_GEOMETRY
:
531 arg_types
[arg_idx
++] = ctx
->i32
; // gsvs stride
532 arg_types
[arg_idx
++] = ctx
->i32
; // gsvs num entires
533 user_sgpr_count
= arg_idx
;
534 arg_types
[arg_idx
++] = ctx
->i32
; // gs2vs offset
535 arg_types
[arg_idx
++] = ctx
->i32
; // wave id
536 sgpr_count
= arg_idx
;
537 arg_types
[arg_idx
++] = ctx
->i32
; // vtx0
538 arg_types
[arg_idx
++] = ctx
->i32
; // vtx1
539 arg_types
[arg_idx
++] = ctx
->i32
; // prim id
540 arg_types
[arg_idx
++] = ctx
->i32
; // vtx2
541 arg_types
[arg_idx
++] = ctx
->i32
; // vtx3
542 arg_types
[arg_idx
++] = ctx
->i32
; // vtx4
543 arg_types
[arg_idx
++] = ctx
->i32
; // vtx5
544 arg_types
[arg_idx
++] = ctx
->i32
; // GS instance id
546 case MESA_SHADER_FRAGMENT
:
547 arg_types
[arg_idx
++] = const_array(ctx
->f32
, 32); /* sample positions */
548 user_sgpr_count
= arg_idx
;
549 arg_types
[arg_idx
++] = ctx
->i32
; /* prim mask */
550 sgpr_count
= arg_idx
;
551 arg_types
[arg_idx
++] = ctx
->v2i32
; /* persp sample */
552 arg_types
[arg_idx
++] = ctx
->v2i32
; /* persp center */
553 arg_types
[arg_idx
++] = ctx
->v2i32
; /* persp centroid */
554 arg_types
[arg_idx
++] = ctx
->v3i32
; /* persp pull model */
555 arg_types
[arg_idx
++] = ctx
->v2i32
; /* linear sample */
556 arg_types
[arg_idx
++] = ctx
->v2i32
; /* linear center */
557 arg_types
[arg_idx
++] = ctx
->v2i32
; /* linear centroid */
558 arg_types
[arg_idx
++] = ctx
->f32
; /* line stipple tex */
559 arg_types
[arg_idx
++] = ctx
->f32
; /* pos x float */
560 arg_types
[arg_idx
++] = ctx
->f32
; /* pos y float */
561 arg_types
[arg_idx
++] = ctx
->f32
; /* pos z float */
562 arg_types
[arg_idx
++] = ctx
->f32
; /* pos w float */
563 arg_types
[arg_idx
++] = ctx
->i32
; /* front face */
564 arg_types
[arg_idx
++] = ctx
->i32
; /* ancillary */
565 arg_types
[arg_idx
++] = ctx
->f32
; /* sample coverage */
566 arg_types
[arg_idx
++] = ctx
->i32
; /* fixed pt */
569 unreachable("Shader stage not implemented");
572 ctx
->main_function
= create_llvm_function(
573 ctx
->context
, ctx
->module
, ctx
->builder
, NULL
, 0, arg_types
,
574 arg_idx
, array_params_mask
, sgpr_count
, ctx
->options
->unsafe_math
);
575 set_llvm_calling_convention(ctx
->main_function
, ctx
->stage
);
577 ctx
->shader_info
->num_input_sgprs
= 0;
578 ctx
->shader_info
->num_input_vgprs
= 0;
580 ctx
->shader_info
->num_user_sgprs
= ctx
->options
->supports_spill
? 2 : 0;
581 for (i
= 0; i
< user_sgpr_count
; i
++)
582 ctx
->shader_info
->num_user_sgprs
+= llvm_get_type_size(arg_types
[i
]) / 4;
584 ctx
->shader_info
->num_input_sgprs
= ctx
->shader_info
->num_user_sgprs
;
585 for (; i
< sgpr_count
; i
++)
586 ctx
->shader_info
->num_input_sgprs
+= llvm_get_type_size(arg_types
[i
]) / 4;
588 if (ctx
->stage
!= MESA_SHADER_FRAGMENT
)
589 for (; i
< arg_idx
; ++i
)
590 ctx
->shader_info
->num_input_vgprs
+= llvm_get_type_size(arg_types
[i
]) / 4;
595 if (ctx
->options
->supports_spill
|| need_ring_offsets
) {
596 set_userdata_location_shader(ctx
, AC_UD_SCRATCH_RING_OFFSETS
, user_sgpr_idx
, 2);
598 if (ctx
->options
->supports_spill
) {
599 ctx
->ring_offsets
= ac_emit_llvm_intrinsic(&ctx
->ac
, "llvm.amdgcn.implicit.buffer.ptr",
600 LLVMPointerType(ctx
->i8
, CONST_ADDR_SPACE
),
601 NULL
, 0, AC_FUNC_ATTR_READNONE
);
602 ctx
->ring_offsets
= LLVMBuildBitCast(ctx
->builder
, ctx
->ring_offsets
,
603 const_array(ctx
->v16i8
, 8), "");
605 ctx
->ring_offsets
= LLVMGetParam(ctx
->main_function
, arg_idx
++);
608 for (unsigned i
= 0; i
< num_sets
; ++i
) {
609 if (ctx
->options
->layout
->set
[i
].layout
->shader_stages
& (1 << ctx
->stage
)) {
610 set_userdata_location(&ctx
->shader_info
->user_sgprs_locs
.descriptor_sets
[i
], user_sgpr_idx
, 2);
612 ctx
->descriptor_sets
[i
] =
613 LLVMGetParam(ctx
->main_function
, arg_idx
++);
615 ctx
->descriptor_sets
[i
] = NULL
;
618 if (need_push_constants
) {
619 ctx
->push_constants
= LLVMGetParam(ctx
->main_function
, arg_idx
++);
620 set_userdata_location_shader(ctx
, AC_UD_PUSH_CONSTANTS
, user_sgpr_idx
, 2);
624 switch (ctx
->stage
) {
625 case MESA_SHADER_COMPUTE
:
626 set_userdata_location_shader(ctx
, AC_UD_CS_GRID_SIZE
, user_sgpr_idx
, 3);
628 ctx
->num_work_groups
=
629 LLVMGetParam(ctx
->main_function
, arg_idx
++);
631 LLVMGetParam(ctx
->main_function
, arg_idx
++);
633 LLVMGetParam(ctx
->main_function
, arg_idx
++);
634 ctx
->local_invocation_ids
=
635 LLVMGetParam(ctx
->main_function
, arg_idx
++);
637 case MESA_SHADER_VERTEX
:
638 if (!ctx
->is_gs_copy_shader
) {
639 set_userdata_location_shader(ctx
, AC_UD_VS_VERTEX_BUFFERS
, user_sgpr_idx
, 2);
641 ctx
->vertex_buffers
= LLVMGetParam(ctx
->main_function
, arg_idx
++);
642 set_userdata_location_shader(ctx
, AC_UD_VS_BASE_VERTEX_START_INSTANCE
, user_sgpr_idx
, 2);
644 ctx
->base_vertex
= LLVMGetParam(ctx
->main_function
, arg_idx
++);
645 ctx
->start_instance
= LLVMGetParam(ctx
->main_function
, arg_idx
++);
647 if (ctx
->options
->key
.vs
.as_es
)
648 ctx
->es2gs_offset
= LLVMGetParam(ctx
->main_function
, arg_idx
++);
649 ctx
->vertex_id
= LLVMGetParam(ctx
->main_function
, arg_idx
++);
650 if (!ctx
->is_gs_copy_shader
) {
651 ctx
->rel_auto_id
= LLVMGetParam(ctx
->main_function
, arg_idx
++);
652 ctx
->vs_prim_id
= LLVMGetParam(ctx
->main_function
, arg_idx
++);
653 ctx
->instance_id
= LLVMGetParam(ctx
->main_function
, arg_idx
++);
656 case MESA_SHADER_GEOMETRY
:
657 set_userdata_location_shader(ctx
, AC_UD_GS_VS_RING_STRIDE_ENTRIES
, user_sgpr_idx
, 2);
659 ctx
->gsvs_ring_stride
= LLVMGetParam(ctx
->main_function
, arg_idx
++);
660 ctx
->gsvs_num_entries
= LLVMGetParam(ctx
->main_function
, arg_idx
++);
661 ctx
->gs2vs_offset
= LLVMGetParam(ctx
->main_function
, arg_idx
++);
662 ctx
->gs_wave_id
= LLVMGetParam(ctx
->main_function
, arg_idx
++);
663 ctx
->gs_vtx_offset
[0] = LLVMGetParam(ctx
->main_function
, arg_idx
++);
664 ctx
->gs_vtx_offset
[1] = LLVMGetParam(ctx
->main_function
, arg_idx
++);
665 ctx
->gs_prim_id
= LLVMGetParam(ctx
->main_function
, arg_idx
++);
666 ctx
->gs_vtx_offset
[2] = LLVMGetParam(ctx
->main_function
, arg_idx
++);
667 ctx
->gs_vtx_offset
[3] = LLVMGetParam(ctx
->main_function
, arg_idx
++);
668 ctx
->gs_vtx_offset
[4] = LLVMGetParam(ctx
->main_function
, arg_idx
++);
669 ctx
->gs_vtx_offset
[5] = LLVMGetParam(ctx
->main_function
, arg_idx
++);
670 ctx
->gs_invocation_id
= LLVMGetParam(ctx
->main_function
, arg_idx
++);
672 case MESA_SHADER_FRAGMENT
:
673 set_userdata_location_shader(ctx
, AC_UD_PS_SAMPLE_POS
, user_sgpr_idx
, 2);
675 ctx
->sample_positions
= LLVMGetParam(ctx
->main_function
, arg_idx
++);
676 ctx
->prim_mask
= LLVMGetParam(ctx
->main_function
, arg_idx
++);
677 ctx
->persp_sample
= LLVMGetParam(ctx
->main_function
, arg_idx
++);
678 ctx
->persp_center
= LLVMGetParam(ctx
->main_function
, arg_idx
++);
679 ctx
->persp_centroid
= LLVMGetParam(ctx
->main_function
, arg_idx
++);
681 ctx
->linear_sample
= LLVMGetParam(ctx
->main_function
, arg_idx
++);
682 ctx
->linear_center
= LLVMGetParam(ctx
->main_function
, arg_idx
++);
683 ctx
->linear_centroid
= LLVMGetParam(ctx
->main_function
, arg_idx
++);
684 arg_idx
++; /* line stipple */
685 ctx
->frag_pos
[0] = LLVMGetParam(ctx
->main_function
, arg_idx
++);
686 ctx
->frag_pos
[1] = LLVMGetParam(ctx
->main_function
, arg_idx
++);
687 ctx
->frag_pos
[2] = LLVMGetParam(ctx
->main_function
, arg_idx
++);
688 ctx
->frag_pos
[3] = LLVMGetParam(ctx
->main_function
, arg_idx
++);
689 ctx
->front_face
= LLVMGetParam(ctx
->main_function
, arg_idx
++);
690 ctx
->ancillary
= LLVMGetParam(ctx
->main_function
, arg_idx
++);
693 unreachable("Shader stage not implemented");
697 static void setup_types(struct nir_to_llvm_context
*ctx
)
699 LLVMValueRef args
[4];
701 ctx
->voidt
= LLVMVoidTypeInContext(ctx
->context
);
702 ctx
->i1
= LLVMIntTypeInContext(ctx
->context
, 1);
703 ctx
->i8
= LLVMIntTypeInContext(ctx
->context
, 8);
704 ctx
->i16
= LLVMIntTypeInContext(ctx
->context
, 16);
705 ctx
->i32
= LLVMIntTypeInContext(ctx
->context
, 32);
706 ctx
->i64
= LLVMIntTypeInContext(ctx
->context
, 64);
707 ctx
->v2i32
= LLVMVectorType(ctx
->i32
, 2);
708 ctx
->v3i32
= LLVMVectorType(ctx
->i32
, 3);
709 ctx
->v4i32
= LLVMVectorType(ctx
->i32
, 4);
710 ctx
->v8i32
= LLVMVectorType(ctx
->i32
, 8);
711 ctx
->f32
= LLVMFloatTypeInContext(ctx
->context
);
712 ctx
->f16
= LLVMHalfTypeInContext(ctx
->context
);
713 ctx
->v2f32
= LLVMVectorType(ctx
->f32
, 2);
714 ctx
->v4f32
= LLVMVectorType(ctx
->f32
, 4);
715 ctx
->v16i8
= LLVMVectorType(ctx
->i8
, 16);
717 ctx
->i32zero
= LLVMConstInt(ctx
->i32
, 0, false);
718 ctx
->i32one
= LLVMConstInt(ctx
->i32
, 1, false);
719 ctx
->f32zero
= LLVMConstReal(ctx
->f32
, 0.0);
720 ctx
->f32one
= LLVMConstReal(ctx
->f32
, 1.0);
722 args
[0] = ctx
->f32zero
;
723 args
[1] = ctx
->f32zero
;
724 args
[2] = ctx
->f32zero
;
725 args
[3] = ctx
->f32one
;
726 ctx
->v4f32empty
= LLVMConstVector(args
, 4);
728 ctx
->range_md_kind
= LLVMGetMDKindIDInContext(ctx
->context
,
730 ctx
->invariant_load_md_kind
= LLVMGetMDKindIDInContext(ctx
->context
,
731 "invariant.load", 14);
732 ctx
->uniform_md_kind
=
733 LLVMGetMDKindIDInContext(ctx
->context
, "amdgpu.uniform", 14);
734 ctx
->empty_md
= LLVMMDNodeInContext(ctx
->context
, NULL
, 0);
736 args
[0] = LLVMConstReal(ctx
->f32
, 2.5);
739 static int get_llvm_num_components(LLVMValueRef value
)
741 LLVMTypeRef type
= LLVMTypeOf(value
);
742 unsigned num_components
= LLVMGetTypeKind(type
) == LLVMVectorTypeKind
743 ? LLVMGetVectorSize(type
)
745 return num_components
;
748 static LLVMValueRef
llvm_extract_elem(struct nir_to_llvm_context
*ctx
,
752 int count
= get_llvm_num_components(value
);
754 assert(index
< count
);
758 return LLVMBuildExtractElement(ctx
->builder
, value
,
759 LLVMConstInt(ctx
->i32
, index
, false), "");
762 static LLVMValueRef
trim_vector(struct nir_to_llvm_context
*ctx
,
763 LLVMValueRef value
, unsigned count
)
765 unsigned num_components
= get_llvm_num_components(value
);
766 if (count
== num_components
)
769 LLVMValueRef masks
[] = {
770 LLVMConstInt(ctx
->i32
, 0, false), LLVMConstInt(ctx
->i32
, 1, false),
771 LLVMConstInt(ctx
->i32
, 2, false), LLVMConstInt(ctx
->i32
, 3, false)};
774 return LLVMBuildExtractElement(ctx
->builder
, value
, masks
[0],
777 LLVMValueRef swizzle
= LLVMConstVector(masks
, count
);
778 return LLVMBuildShuffleVector(ctx
->builder
, value
, value
, swizzle
, "");
782 build_store_values_extended(struct nir_to_llvm_context
*ctx
,
783 LLVMValueRef
*values
,
784 unsigned value_count
,
785 unsigned value_stride
,
788 LLVMBuilderRef builder
= ctx
->builder
;
791 if (value_count
== 1) {
792 LLVMBuildStore(builder
, vec
, values
[0]);
796 for (i
= 0; i
< value_count
; i
++) {
797 LLVMValueRef ptr
= values
[i
* value_stride
];
798 LLVMValueRef index
= LLVMConstInt(ctx
->i32
, i
, false);
799 LLVMValueRef value
= LLVMBuildExtractElement(builder
, vec
, index
, "");
800 LLVMBuildStore(builder
, value
, ptr
);
804 static LLVMTypeRef
get_def_type(struct nir_to_llvm_context
*ctx
,
807 LLVMTypeRef type
= LLVMIntTypeInContext(ctx
->context
, def
->bit_size
);
808 if (def
->num_components
> 1) {
809 type
= LLVMVectorType(type
, def
->num_components
);
814 static LLVMValueRef
get_src(struct nir_to_llvm_context
*ctx
, nir_src src
)
817 struct hash_entry
*entry
= _mesa_hash_table_search(ctx
->defs
, src
.ssa
);
818 return (LLVMValueRef
)entry
->data
;
822 static LLVMBasicBlockRef
get_block(struct nir_to_llvm_context
*ctx
,
825 struct hash_entry
*entry
= _mesa_hash_table_search(ctx
->defs
, b
);
826 return (LLVMBasicBlockRef
)entry
->data
;
829 static LLVMValueRef
get_alu_src(struct nir_to_llvm_context
*ctx
,
831 unsigned num_components
)
833 LLVMValueRef value
= get_src(ctx
, src
.src
);
834 bool need_swizzle
= false;
837 LLVMTypeRef type
= LLVMTypeOf(value
);
838 unsigned src_components
= LLVMGetTypeKind(type
) == LLVMVectorTypeKind
839 ? LLVMGetVectorSize(type
)
842 for (unsigned i
= 0; i
< num_components
; ++i
) {
843 assert(src
.swizzle
[i
] < src_components
);
844 if (src
.swizzle
[i
] != i
)
848 if (need_swizzle
|| num_components
!= src_components
) {
849 LLVMValueRef masks
[] = {
850 LLVMConstInt(ctx
->i32
, src
.swizzle
[0], false),
851 LLVMConstInt(ctx
->i32
, src
.swizzle
[1], false),
852 LLVMConstInt(ctx
->i32
, src
.swizzle
[2], false),
853 LLVMConstInt(ctx
->i32
, src
.swizzle
[3], false)};
855 if (src_components
> 1 && num_components
== 1) {
856 value
= LLVMBuildExtractElement(ctx
->builder
, value
,
858 } else if (src_components
== 1 && num_components
> 1) {
859 LLVMValueRef values
[] = {value
, value
, value
, value
};
860 value
= ac_build_gather_values(&ctx
->ac
, values
, num_components
);
862 LLVMValueRef swizzle
= LLVMConstVector(masks
, num_components
);
863 value
= LLVMBuildShuffleVector(ctx
->builder
, value
, value
,
872 static LLVMValueRef
emit_int_cmp(struct nir_to_llvm_context
*ctx
,
873 LLVMIntPredicate pred
, LLVMValueRef src0
,
876 LLVMValueRef result
= LLVMBuildICmp(ctx
->builder
, pred
, src0
, src1
, "");
877 return LLVMBuildSelect(ctx
->builder
, result
,
878 LLVMConstInt(ctx
->i32
, 0xFFFFFFFF, false),
879 LLVMConstInt(ctx
->i32
, 0, false), "");
882 static LLVMValueRef
emit_float_cmp(struct nir_to_llvm_context
*ctx
,
883 LLVMRealPredicate pred
, LLVMValueRef src0
,
887 src0
= to_float(ctx
, src0
);
888 src1
= to_float(ctx
, src1
);
889 result
= LLVMBuildFCmp(ctx
->builder
, pred
, src0
, src1
, "");
890 return LLVMBuildSelect(ctx
->builder
, result
,
891 LLVMConstInt(ctx
->i32
, 0xFFFFFFFF, false),
892 LLVMConstInt(ctx
->i32
, 0, false), "");
895 static LLVMValueRef
emit_intrin_1f_param(struct nir_to_llvm_context
*ctx
,
899 LLVMValueRef params
[] = {
902 return ac_emit_llvm_intrinsic(&ctx
->ac
, intrin
, ctx
->f32
, params
, 1, AC_FUNC_ATTR_READNONE
);
905 static LLVMValueRef
emit_intrin_2f_param(struct nir_to_llvm_context
*ctx
,
907 LLVMValueRef src0
, LLVMValueRef src1
)
909 LLVMValueRef params
[] = {
913 return ac_emit_llvm_intrinsic(&ctx
->ac
, intrin
, ctx
->f32
, params
, 2, AC_FUNC_ATTR_READNONE
);
916 static LLVMValueRef
emit_intrin_3f_param(struct nir_to_llvm_context
*ctx
,
918 LLVMValueRef src0
, LLVMValueRef src1
, LLVMValueRef src2
)
920 LLVMValueRef params
[] = {
925 return ac_emit_llvm_intrinsic(&ctx
->ac
, intrin
, ctx
->f32
, params
, 3, AC_FUNC_ATTR_READNONE
);
928 static LLVMValueRef
emit_bcsel(struct nir_to_llvm_context
*ctx
,
929 LLVMValueRef src0
, LLVMValueRef src1
, LLVMValueRef src2
)
931 LLVMValueRef v
= LLVMBuildICmp(ctx
->builder
, LLVMIntNE
, src0
,
933 return LLVMBuildSelect(ctx
->builder
, v
, src1
, src2
, "");
936 static LLVMValueRef
emit_find_lsb(struct nir_to_llvm_context
*ctx
,
939 LLVMValueRef params
[2] = {
942 /* The value of 1 means that ffs(x=0) = undef, so LLVM won't
943 * add special code to check for x=0. The reason is that
944 * the LLVM behavior for x=0 is different from what we
947 * The hardware already implements the correct behavior.
949 LLVMConstInt(ctx
->i32
, 1, false),
951 return ac_emit_llvm_intrinsic(&ctx
->ac
, "llvm.cttz.i32", ctx
->i32
, params
, 2, AC_FUNC_ATTR_READNONE
);
954 static LLVMValueRef
emit_ifind_msb(struct nir_to_llvm_context
*ctx
,
957 LLVMValueRef msb
= ac_emit_llvm_intrinsic(&ctx
->ac
, "llvm.AMDGPU.flbit.i32",
959 AC_FUNC_ATTR_READNONE
);
961 /* The HW returns the last bit index from MSB, but NIR wants
962 * the index from LSB. Invert it by doing "31 - msb". */
963 msb
= LLVMBuildSub(ctx
->builder
, LLVMConstInt(ctx
->i32
, 31, false),
966 LLVMValueRef all_ones
= LLVMConstInt(ctx
->i32
, -1, true);
967 LLVMValueRef cond
= LLVMBuildOr(ctx
->builder
,
968 LLVMBuildICmp(ctx
->builder
, LLVMIntEQ
,
969 src0
, ctx
->i32zero
, ""),
970 LLVMBuildICmp(ctx
->builder
, LLVMIntEQ
,
971 src0
, all_ones
, ""), "");
973 return LLVMBuildSelect(ctx
->builder
, cond
, all_ones
, msb
, "");
976 static LLVMValueRef
emit_ufind_msb(struct nir_to_llvm_context
*ctx
,
979 LLVMValueRef args
[2] = {
983 LLVMValueRef msb
= ac_emit_llvm_intrinsic(&ctx
->ac
, "llvm.ctlz.i32",
984 ctx
->i32
, args
, ARRAY_SIZE(args
),
985 AC_FUNC_ATTR_READNONE
);
987 /* The HW returns the last bit index from MSB, but NIR wants
988 * the index from LSB. Invert it by doing "31 - msb". */
989 msb
= LLVMBuildSub(ctx
->builder
, LLVMConstInt(ctx
->i32
, 31, false),
992 return LLVMBuildSelect(ctx
->builder
,
993 LLVMBuildICmp(ctx
->builder
, LLVMIntEQ
, src0
,
995 LLVMConstInt(ctx
->i32
, -1, true), msb
, "");
998 static LLVMValueRef
emit_minmax_int(struct nir_to_llvm_context
*ctx
,
999 LLVMIntPredicate pred
,
1000 LLVMValueRef src0
, LLVMValueRef src1
)
1002 return LLVMBuildSelect(ctx
->builder
,
1003 LLVMBuildICmp(ctx
->builder
, pred
, src0
, src1
, ""),
1008 static LLVMValueRef
emit_iabs(struct nir_to_llvm_context
*ctx
,
1011 return emit_minmax_int(ctx
, LLVMIntSGT
, src0
,
1012 LLVMBuildNeg(ctx
->builder
, src0
, ""));
1015 static LLVMValueRef
emit_fsign(struct nir_to_llvm_context
*ctx
,
1018 LLVMValueRef cmp
, val
;
1020 cmp
= LLVMBuildFCmp(ctx
->builder
, LLVMRealOGT
, src0
, ctx
->f32zero
, "");
1021 val
= LLVMBuildSelect(ctx
->builder
, cmp
, ctx
->f32one
, src0
, "");
1022 cmp
= LLVMBuildFCmp(ctx
->builder
, LLVMRealOGE
, val
, ctx
->f32zero
, "");
1023 val
= LLVMBuildSelect(ctx
->builder
, cmp
, val
, LLVMConstReal(ctx
->f32
, -1.0), "");
1027 static LLVMValueRef
emit_isign(struct nir_to_llvm_context
*ctx
,
1030 LLVMValueRef cmp
, val
;
1032 cmp
= LLVMBuildICmp(ctx
->builder
, LLVMIntSGT
, src0
, ctx
->i32zero
, "");
1033 val
= LLVMBuildSelect(ctx
->builder
, cmp
, ctx
->i32one
, src0
, "");
1034 cmp
= LLVMBuildICmp(ctx
->builder
, LLVMIntSGE
, val
, ctx
->i32zero
, "");
1035 val
= LLVMBuildSelect(ctx
->builder
, cmp
, val
, LLVMConstInt(ctx
->i32
, -1, true), "");
1039 static LLVMValueRef
emit_ffract(struct nir_to_llvm_context
*ctx
,
1042 const char *intr
= "llvm.floor.f32";
1043 LLVMValueRef fsrc0
= to_float(ctx
, src0
);
1044 LLVMValueRef params
[] = {
1047 LLVMValueRef floor
= ac_emit_llvm_intrinsic(&ctx
->ac
, intr
,
1048 ctx
->f32
, params
, 1,
1049 AC_FUNC_ATTR_READNONE
);
1050 return LLVMBuildFSub(ctx
->builder
, fsrc0
, floor
, "");
1053 static LLVMValueRef
emit_uint_carry(struct nir_to_llvm_context
*ctx
,
1055 LLVMValueRef src0
, LLVMValueRef src1
)
1057 LLVMTypeRef ret_type
;
1058 LLVMTypeRef types
[] = { ctx
->i32
, ctx
->i1
};
1060 LLVMValueRef params
[] = { src0
, src1
};
1061 ret_type
= LLVMStructTypeInContext(ctx
->context
, types
,
1064 res
= ac_emit_llvm_intrinsic(&ctx
->ac
, intrin
, ret_type
,
1065 params
, 2, AC_FUNC_ATTR_READNONE
);
1067 res
= LLVMBuildExtractValue(ctx
->builder
, res
, 1, "");
1068 res
= LLVMBuildZExt(ctx
->builder
, res
, ctx
->i32
, "");
1072 static LLVMValueRef
emit_b2f(struct nir_to_llvm_context
*ctx
,
1075 return LLVMBuildAnd(ctx
->builder
, src0
, LLVMBuildBitCast(ctx
->builder
, LLVMConstReal(ctx
->f32
, 1.0), ctx
->i32
, ""), "");
1078 static LLVMValueRef
emit_umul_high(struct nir_to_llvm_context
*ctx
,
1079 LLVMValueRef src0
, LLVMValueRef src1
)
1081 LLVMValueRef dst64
, result
;
1082 src0
= LLVMBuildZExt(ctx
->builder
, src0
, ctx
->i64
, "");
1083 src1
= LLVMBuildZExt(ctx
->builder
, src1
, ctx
->i64
, "");
1085 dst64
= LLVMBuildMul(ctx
->builder
, src0
, src1
, "");
1086 dst64
= LLVMBuildLShr(ctx
->builder
, dst64
, LLVMConstInt(ctx
->i64
, 32, false), "");
1087 result
= LLVMBuildTrunc(ctx
->builder
, dst64
, ctx
->i32
, "");
1091 static LLVMValueRef
emit_imul_high(struct nir_to_llvm_context
*ctx
,
1092 LLVMValueRef src0
, LLVMValueRef src1
)
1094 LLVMValueRef dst64
, result
;
1095 src0
= LLVMBuildSExt(ctx
->builder
, src0
, ctx
->i64
, "");
1096 src1
= LLVMBuildSExt(ctx
->builder
, src1
, ctx
->i64
, "");
1098 dst64
= LLVMBuildMul(ctx
->builder
, src0
, src1
, "");
1099 dst64
= LLVMBuildAShr(ctx
->builder
, dst64
, LLVMConstInt(ctx
->i64
, 32, false), "");
1100 result
= LLVMBuildTrunc(ctx
->builder
, dst64
, ctx
->i32
, "");
1104 static LLVMValueRef
emit_bitfield_extract(struct nir_to_llvm_context
*ctx
,
1106 LLVMValueRef srcs
[3])
1108 LLVMValueRef result
;
1109 LLVMValueRef icond
= LLVMBuildICmp(ctx
->builder
, LLVMIntEQ
, srcs
[2], LLVMConstInt(ctx
->i32
, 32, false), "");
1110 result
= ac_emit_llvm_intrinsic(&ctx
->ac
, intrin
, ctx
->i32
, srcs
, 3, AC_FUNC_ATTR_READNONE
);
1112 result
= LLVMBuildSelect(ctx
->builder
, icond
, srcs
[0], result
, "");
1116 static LLVMValueRef
emit_bitfield_insert(struct nir_to_llvm_context
*ctx
,
1117 LLVMValueRef src0
, LLVMValueRef src1
,
1118 LLVMValueRef src2
, LLVMValueRef src3
)
1120 LLVMValueRef bfi_args
[3], result
;
1122 bfi_args
[0] = LLVMBuildShl(ctx
->builder
,
1123 LLVMBuildSub(ctx
->builder
,
1124 LLVMBuildShl(ctx
->builder
,
1129 bfi_args
[1] = LLVMBuildShl(ctx
->builder
, src1
, src2
, "");
1132 LLVMValueRef icond
= LLVMBuildICmp(ctx
->builder
, LLVMIntEQ
, src3
, LLVMConstInt(ctx
->i32
, 32, false), "");
1135 * (arg0 & arg1) | (~arg0 & arg2) = arg2 ^ (arg0 & (arg1 ^ arg2)
1136 * Use the right-hand side, which the LLVM backend can convert to V_BFI.
1138 result
= LLVMBuildXor(ctx
->builder
, bfi_args
[2],
1139 LLVMBuildAnd(ctx
->builder
, bfi_args
[0],
1140 LLVMBuildXor(ctx
->builder
, bfi_args
[1], bfi_args
[2], ""), ""), "");
1142 result
= LLVMBuildSelect(ctx
->builder
, icond
, src1
, result
, "");
1146 static LLVMValueRef
emit_pack_half_2x16(struct nir_to_llvm_context
*ctx
,
1149 LLVMValueRef const16
= LLVMConstInt(ctx
->i32
, 16, false);
1151 LLVMValueRef comp
[2];
1153 src0
= to_float(ctx
, src0
);
1154 comp
[0] = LLVMBuildExtractElement(ctx
->builder
, src0
, ctx
->i32zero
, "");
1155 comp
[1] = LLVMBuildExtractElement(ctx
->builder
, src0
, ctx
->i32one
, "");
1156 for (i
= 0; i
< 2; i
++) {
1157 comp
[i
] = LLVMBuildFPTrunc(ctx
->builder
, comp
[i
], ctx
->f16
, "");
1158 comp
[i
] = LLVMBuildBitCast(ctx
->builder
, comp
[i
], ctx
->i16
, "");
1159 comp
[i
] = LLVMBuildZExt(ctx
->builder
, comp
[i
], ctx
->i32
, "");
1162 comp
[1] = LLVMBuildShl(ctx
->builder
, comp
[1], const16
, "");
1163 comp
[0] = LLVMBuildOr(ctx
->builder
, comp
[0], comp
[1], "");
1168 static LLVMValueRef
emit_unpack_half_2x16(struct nir_to_llvm_context
*ctx
,
1171 LLVMValueRef const16
= LLVMConstInt(ctx
->i32
, 16, false);
1172 LLVMValueRef temps
[2], result
, val
;
1175 for (i
= 0; i
< 2; i
++) {
1176 val
= i
== 1 ? LLVMBuildLShr(ctx
->builder
, src0
, const16
, "") : src0
;
1177 val
= LLVMBuildTrunc(ctx
->builder
, val
, ctx
->i16
, "");
1178 val
= LLVMBuildBitCast(ctx
->builder
, val
, ctx
->f16
, "");
1179 temps
[i
] = LLVMBuildFPExt(ctx
->builder
, val
, ctx
->f32
, "");
1182 result
= LLVMBuildInsertElement(ctx
->builder
, LLVMGetUndef(ctx
->v2f32
), temps
[0],
1184 result
= LLVMBuildInsertElement(ctx
->builder
, result
, temps
[1],
1190 * Set range metadata on an instruction. This can only be used on load and
1191 * call instructions. If you know an instruction can only produce the values
1192 * 0, 1, 2, you would do set_range_metadata(value, 0, 3);
1193 * \p lo is the minimum value inclusive.
1194 * \p hi is the maximum value exclusive.
1196 static void set_range_metadata(struct nir_to_llvm_context
*ctx
,
1197 LLVMValueRef value
, unsigned lo
, unsigned hi
)
1199 LLVMValueRef range_md
, md_args
[2];
1200 LLVMTypeRef type
= LLVMTypeOf(value
);
1201 LLVMContextRef context
= LLVMGetTypeContext(type
);
1203 md_args
[0] = LLVMConstInt(type
, lo
, false);
1204 md_args
[1] = LLVMConstInt(type
, hi
, false);
1205 range_md
= LLVMMDNodeInContext(context
, md_args
, 2);
1206 LLVMSetMetadata(value
, ctx
->range_md_kind
, range_md
);
1209 static LLVMValueRef
get_thread_id(struct nir_to_llvm_context
*ctx
)
1212 LLVMValueRef tid_args
[2];
1213 tid_args
[0] = LLVMConstInt(ctx
->i32
, 0xffffffff, false);
1214 tid_args
[1] = ctx
->i32zero
;
1215 tid_args
[1] = ac_emit_llvm_intrinsic(&ctx
->ac
,
1216 "llvm.amdgcn.mbcnt.lo", ctx
->i32
,
1217 tid_args
, 2, AC_FUNC_ATTR_READNONE
);
1219 tid
= ac_emit_llvm_intrinsic(&ctx
->ac
,
1220 "llvm.amdgcn.mbcnt.hi", ctx
->i32
,
1221 tid_args
, 2, AC_FUNC_ATTR_READNONE
);
1222 set_range_metadata(ctx
, tid
, 0, 64);
1227 * SI implements derivatives using the local data store (LDS)
1228 * All writes to the LDS happen in all executing threads at
1229 * the same time. TID is the Thread ID for the current
1230 * thread and is a value between 0 and 63, representing
1231 * the thread's position in the wavefront.
1233 * For the pixel shader threads are grouped into quads of four pixels.
1234 * The TIDs of the pixels of a quad are:
1242 * So, masking the TID with 0xfffffffc yields the TID of the top left pixel
1243 * of the quad, masking with 0xfffffffd yields the TID of the top pixel of
1244 * the current pixel's column, and masking with 0xfffffffe yields the TID
1245 * of the left pixel of the current pixel's row.
1247 * Adding 1 yields the TID of the pixel to the right of the left pixel, and
1248 * adding 2 yields the TID of the pixel below the top pixel.
1250 /* masks for thread ID. */
1251 #define TID_MASK_TOP_LEFT 0xfffffffc
1252 #define TID_MASK_TOP 0xfffffffd
1253 #define TID_MASK_LEFT 0xfffffffe
1254 static LLVMValueRef
emit_ddxy(struct nir_to_llvm_context
*ctx
,
1258 LLVMValueRef tl
, trbl
, result
;
1259 LLVMValueRef tl_tid
, trbl_tid
;
1260 LLVMValueRef args
[2];
1261 LLVMValueRef thread_id
;
1264 ctx
->has_ddxy
= true;
1266 if (!ctx
->lds
&& !ctx
->has_ds_bpermute
)
1267 ctx
->lds
= LLVMAddGlobalInAddressSpace(ctx
->module
,
1268 LLVMArrayType(ctx
->i32
, 64),
1269 "ddxy_lds", LOCAL_ADDR_SPACE
);
1271 thread_id
= get_thread_id(ctx
);
1272 if (op
== nir_op_fddx_fine
|| op
== nir_op_fddx
)
1273 mask
= TID_MASK_LEFT
;
1274 else if (op
== nir_op_fddy_fine
|| op
== nir_op_fddy
)
1275 mask
= TID_MASK_TOP
;
1277 mask
= TID_MASK_TOP_LEFT
;
1279 tl_tid
= LLVMBuildAnd(ctx
->builder
, thread_id
,
1280 LLVMConstInt(ctx
->i32
, mask
, false), "");
1281 /* for DDX we want to next X pixel, DDY next Y pixel. */
1282 if (op
== nir_op_fddx_fine
||
1283 op
== nir_op_fddx_coarse
||
1289 trbl_tid
= LLVMBuildAdd(ctx
->builder
, tl_tid
,
1290 LLVMConstInt(ctx
->i32
, idx
, false), "");
1292 if (ctx
->has_ds_bpermute
) {
1293 args
[0] = LLVMBuildMul(ctx
->builder
, tl_tid
,
1294 LLVMConstInt(ctx
->i32
, 4, false), "");
1296 tl
= ac_emit_llvm_intrinsic(&ctx
->ac
, "llvm.amdgcn.ds.bpermute",
1298 AC_FUNC_ATTR_READNONE
);
1300 args
[0] = LLVMBuildMul(ctx
->builder
, trbl_tid
,
1301 LLVMConstInt(ctx
->i32
, 4, false), "");
1302 trbl
= ac_emit_llvm_intrinsic(&ctx
->ac
, "llvm.amdgcn.ds.bpermute",
1304 AC_FUNC_ATTR_READNONE
);
1306 LLVMValueRef store_ptr
, load_ptr0
, load_ptr1
;
1308 store_ptr
= build_gep0(ctx
, ctx
->lds
, thread_id
);
1309 load_ptr0
= build_gep0(ctx
, ctx
->lds
, tl_tid
);
1310 load_ptr1
= build_gep0(ctx
, ctx
->lds
, trbl_tid
);
1312 LLVMBuildStore(ctx
->builder
, src0
, store_ptr
);
1313 tl
= LLVMBuildLoad(ctx
->builder
, load_ptr0
, "");
1314 trbl
= LLVMBuildLoad(ctx
->builder
, load_ptr1
, "");
1316 tl
= LLVMBuildBitCast(ctx
->builder
, tl
, ctx
->f32
, "");
1317 trbl
= LLVMBuildBitCast(ctx
->builder
, trbl
, ctx
->f32
, "");
1318 result
= LLVMBuildFSub(ctx
->builder
, trbl
, tl
, "");
1323 * this takes an I,J coordinate pair,
1324 * and works out the X and Y derivatives.
1325 * it returns DDX(I), DDX(J), DDY(I), DDY(J).
1327 static LLVMValueRef
emit_ddxy_interp(
1328 struct nir_to_llvm_context
*ctx
,
1329 LLVMValueRef interp_ij
)
1331 LLVMValueRef result
[4], a
;
1334 for (i
= 0; i
< 2; i
++) {
1335 a
= LLVMBuildExtractElement(ctx
->builder
, interp_ij
,
1336 LLVMConstInt(ctx
->i32
, i
, false), "");
1337 result
[i
] = emit_ddxy(ctx
, nir_op_fddx
, a
);
1338 result
[2+i
] = emit_ddxy(ctx
, nir_op_fddy
, a
);
1340 return ac_build_gather_values(&ctx
->ac
, result
, 4);
1343 static void visit_alu(struct nir_to_llvm_context
*ctx
, nir_alu_instr
*instr
)
1345 LLVMValueRef src
[4], result
= NULL
;
1346 unsigned num_components
= instr
->dest
.dest
.ssa
.num_components
;
1347 unsigned src_components
;
1349 assert(nir_op_infos
[instr
->op
].num_inputs
<= ARRAY_SIZE(src
));
1350 switch (instr
->op
) {
1356 case nir_op_pack_half_2x16
:
1359 case nir_op_unpack_half_2x16
:
1363 src_components
= num_components
;
1366 for (unsigned i
= 0; i
< nir_op_infos
[instr
->op
].num_inputs
; i
++)
1367 src
[i
] = get_alu_src(ctx
, instr
->src
[i
], src_components
);
1369 switch (instr
->op
) {
1375 src
[0] = to_float(ctx
, src
[0]);
1376 result
= LLVMBuildFNeg(ctx
->builder
, src
[0], "");
1379 result
= LLVMBuildNeg(ctx
->builder
, src
[0], "");
1382 result
= LLVMBuildNot(ctx
->builder
, src
[0], "");
1385 result
= LLVMBuildAdd(ctx
->builder
, src
[0], src
[1], "");
1388 src
[0] = to_float(ctx
, src
[0]);
1389 src
[1] = to_float(ctx
, src
[1]);
1390 result
= LLVMBuildFAdd(ctx
->builder
, src
[0], src
[1], "");
1393 src
[0] = to_float(ctx
, src
[0]);
1394 src
[1] = to_float(ctx
, src
[1]);
1395 result
= LLVMBuildFSub(ctx
->builder
, src
[0], src
[1], "");
1398 result
= LLVMBuildSub(ctx
->builder
, src
[0], src
[1], "");
1401 result
= LLVMBuildMul(ctx
->builder
, src
[0], src
[1], "");
1404 result
= LLVMBuildSRem(ctx
->builder
, src
[0], src
[1], "");
1407 result
= LLVMBuildURem(ctx
->builder
, src
[0], src
[1], "");
1410 src
[0] = to_float(ctx
, src
[0]);
1411 src
[1] = to_float(ctx
, src
[1]);
1412 result
= ac_emit_fdiv(&ctx
->ac
, src
[0], src
[1]);
1413 result
= emit_intrin_1f_param(ctx
, "llvm.floor.f32", result
);
1414 result
= LLVMBuildFMul(ctx
->builder
, src
[1] , result
, "");
1415 result
= LLVMBuildFSub(ctx
->builder
, src
[0], result
, "");
1418 src
[0] = to_float(ctx
, src
[0]);
1419 src
[1] = to_float(ctx
, src
[1]);
1420 result
= LLVMBuildFRem(ctx
->builder
, src
[0], src
[1], "");
1423 result
= LLVMBuildSRem(ctx
->builder
, src
[0], src
[1], "");
1426 result
= LLVMBuildSDiv(ctx
->builder
, src
[0], src
[1], "");
1429 result
= LLVMBuildUDiv(ctx
->builder
, src
[0], src
[1], "");
1432 src
[0] = to_float(ctx
, src
[0]);
1433 src
[1] = to_float(ctx
, src
[1]);
1434 result
= LLVMBuildFMul(ctx
->builder
, src
[0], src
[1], "");
1437 src
[0] = to_float(ctx
, src
[0]);
1438 src
[1] = to_float(ctx
, src
[1]);
1439 result
= ac_emit_fdiv(&ctx
->ac
, src
[0], src
[1]);
1442 src
[0] = to_float(ctx
, src
[0]);
1443 result
= ac_emit_fdiv(&ctx
->ac
, ctx
->f32one
, src
[0]);
1446 result
= LLVMBuildAnd(ctx
->builder
, src
[0], src
[1], "");
1449 result
= LLVMBuildOr(ctx
->builder
, src
[0], src
[1], "");
1452 result
= LLVMBuildXor(ctx
->builder
, src
[0], src
[1], "");
1455 result
= LLVMBuildShl(ctx
->builder
, src
[0], src
[1], "");
1458 result
= LLVMBuildAShr(ctx
->builder
, src
[0], src
[1], "");
1461 result
= LLVMBuildLShr(ctx
->builder
, src
[0], src
[1], "");
1464 result
= emit_int_cmp(ctx
, LLVMIntSLT
, src
[0], src
[1]);
1467 result
= emit_int_cmp(ctx
, LLVMIntNE
, src
[0], src
[1]);
1470 result
= emit_int_cmp(ctx
, LLVMIntEQ
, src
[0], src
[1]);
1473 result
= emit_int_cmp(ctx
, LLVMIntSGE
, src
[0], src
[1]);
1476 result
= emit_int_cmp(ctx
, LLVMIntULT
, src
[0], src
[1]);
1479 result
= emit_int_cmp(ctx
, LLVMIntUGE
, src
[0], src
[1]);
1482 result
= emit_float_cmp(ctx
, LLVMRealUEQ
, src
[0], src
[1]);
1485 result
= emit_float_cmp(ctx
, LLVMRealUNE
, src
[0], src
[1]);
1488 result
= emit_float_cmp(ctx
, LLVMRealULT
, src
[0], src
[1]);
1491 result
= emit_float_cmp(ctx
, LLVMRealUGE
, src
[0], src
[1]);
1494 result
= emit_intrin_1f_param(ctx
, "llvm.fabs.f32", src
[0]);
1497 result
= emit_iabs(ctx
, src
[0]);
1500 result
= emit_minmax_int(ctx
, LLVMIntSGT
, src
[0], src
[1]);
1503 result
= emit_minmax_int(ctx
, LLVMIntSLT
, src
[0], src
[1]);
1506 result
= emit_minmax_int(ctx
, LLVMIntUGT
, src
[0], src
[1]);
1509 result
= emit_minmax_int(ctx
, LLVMIntULT
, src
[0], src
[1]);
1512 result
= emit_isign(ctx
, src
[0]);
1515 src
[0] = to_float(ctx
, src
[0]);
1516 result
= emit_fsign(ctx
, src
[0]);
1519 result
= emit_intrin_1f_param(ctx
, "llvm.floor.f32", src
[0]);
1522 result
= emit_intrin_1f_param(ctx
, "llvm.trunc.f32", src
[0]);
1525 result
= emit_intrin_1f_param(ctx
, "llvm.ceil.f32", src
[0]);
1527 case nir_op_fround_even
:
1528 result
= emit_intrin_1f_param(ctx
, "llvm.rint.f32", src
[0]);
1531 result
= emit_ffract(ctx
, src
[0]);
1534 result
= emit_intrin_1f_param(ctx
, "llvm.sin.f32", src
[0]);
1537 result
= emit_intrin_1f_param(ctx
, "llvm.cos.f32", src
[0]);
1540 result
= emit_intrin_1f_param(ctx
, "llvm.sqrt.f32", src
[0]);
1543 result
= emit_intrin_1f_param(ctx
, "llvm.exp2.f32", src
[0]);
1546 result
= emit_intrin_1f_param(ctx
, "llvm.log2.f32", src
[0]);
1549 result
= emit_intrin_1f_param(ctx
, "llvm.sqrt.f32", src
[0]);
1550 result
= ac_emit_fdiv(&ctx
->ac
, ctx
->f32one
, result
);
1553 result
= emit_intrin_2f_param(ctx
, "llvm.pow.f32", src
[0], src
[1]);
1556 result
= emit_intrin_2f_param(ctx
, "llvm.maxnum.f32", src
[0], src
[1]);
1559 result
= emit_intrin_2f_param(ctx
, "llvm.minnum.f32", src
[0], src
[1]);
1562 result
= emit_intrin_3f_param(ctx
, "llvm.fma.f32", src
[0], src
[1], src
[2]);
1564 case nir_op_ibitfield_extract
:
1565 result
= emit_bitfield_extract(ctx
, "llvm.AMDGPU.bfe.i32", src
);
1567 case nir_op_ubitfield_extract
:
1568 result
= emit_bitfield_extract(ctx
, "llvm.AMDGPU.bfe.u32", src
);
1570 case nir_op_bitfield_insert
:
1571 result
= emit_bitfield_insert(ctx
, src
[0], src
[1], src
[2], src
[3]);
1573 case nir_op_bitfield_reverse
:
1574 result
= ac_emit_llvm_intrinsic(&ctx
->ac
, "llvm.bitreverse.i32", ctx
->i32
, src
, 1, AC_FUNC_ATTR_READNONE
);
1576 case nir_op_bit_count
:
1577 result
= ac_emit_llvm_intrinsic(&ctx
->ac
, "llvm.ctpop.i32", ctx
->i32
, src
, 1, AC_FUNC_ATTR_READNONE
);
1582 for (unsigned i
= 0; i
< nir_op_infos
[instr
->op
].num_inputs
; i
++)
1583 src
[i
] = to_integer(ctx
, src
[i
]);
1584 result
= ac_build_gather_values(&ctx
->ac
, src
, num_components
);
1587 src
[0] = to_float(ctx
, src
[0]);
1588 result
= LLVMBuildFPToSI(ctx
->builder
, src
[0], ctx
->i32
, "");
1591 src
[0] = to_float(ctx
, src
[0]);
1592 result
= LLVMBuildFPToUI(ctx
->builder
, src
[0], ctx
->i32
, "");
1595 result
= LLVMBuildSIToFP(ctx
->builder
, src
[0], ctx
->f32
, "");
1598 result
= LLVMBuildUIToFP(ctx
->builder
, src
[0], ctx
->f32
, "");
1601 result
= emit_bcsel(ctx
, src
[0], src
[1], src
[2]);
1603 case nir_op_find_lsb
:
1604 result
= emit_find_lsb(ctx
, src
[0]);
1606 case nir_op_ufind_msb
:
1607 result
= emit_ufind_msb(ctx
, src
[0]);
1609 case nir_op_ifind_msb
:
1610 result
= emit_ifind_msb(ctx
, src
[0]);
1612 case nir_op_uadd_carry
:
1613 result
= emit_uint_carry(ctx
, "llvm.uadd.with.overflow.i32", src
[0], src
[1]);
1615 case nir_op_usub_borrow
:
1616 result
= emit_uint_carry(ctx
, "llvm.usub.with.overflow.i32", src
[0], src
[1]);
1619 result
= emit_b2f(ctx
, src
[0]);
1621 case nir_op_fquantize2f16
:
1622 src
[0] = to_float(ctx
, src
[0]);
1623 result
= LLVMBuildFPTrunc(ctx
->builder
, src
[0], ctx
->f16
, "");
1624 /* need to convert back up to f32 */
1625 result
= LLVMBuildFPExt(ctx
->builder
, result
, ctx
->f32
, "");
1627 case nir_op_umul_high
:
1628 result
= emit_umul_high(ctx
, src
[0], src
[1]);
1630 case nir_op_imul_high
:
1631 result
= emit_imul_high(ctx
, src
[0], src
[1]);
1633 case nir_op_pack_half_2x16
:
1634 result
= emit_pack_half_2x16(ctx
, src
[0]);
1636 case nir_op_unpack_half_2x16
:
1637 result
= emit_unpack_half_2x16(ctx
, src
[0]);
1641 case nir_op_fddx_fine
:
1642 case nir_op_fddy_fine
:
1643 case nir_op_fddx_coarse
:
1644 case nir_op_fddy_coarse
:
1645 result
= emit_ddxy(ctx
, instr
->op
, src
[0]);
1648 fprintf(stderr
, "Unknown NIR alu instr: ");
1649 nir_print_instr(&instr
->instr
, stderr
);
1650 fprintf(stderr
, "\n");
1655 assert(instr
->dest
.dest
.is_ssa
);
1656 result
= to_integer(ctx
, result
);
1657 _mesa_hash_table_insert(ctx
->defs
, &instr
->dest
.dest
.ssa
,
1662 static void visit_load_const(struct nir_to_llvm_context
*ctx
,
1663 nir_load_const_instr
*instr
)
1665 LLVMValueRef values
[4], value
= NULL
;
1666 LLVMTypeRef element_type
=
1667 LLVMIntTypeInContext(ctx
->context
, instr
->def
.bit_size
);
1669 for (unsigned i
= 0; i
< instr
->def
.num_components
; ++i
) {
1670 switch (instr
->def
.bit_size
) {
1672 values
[i
] = LLVMConstInt(element_type
,
1673 instr
->value
.u32
[i
], false);
1676 values
[i
] = LLVMConstInt(element_type
,
1677 instr
->value
.u64
[i
], false);
1681 "unsupported nir load_const bit_size: %d\n",
1682 instr
->def
.bit_size
);
1686 if (instr
->def
.num_components
> 1) {
1687 value
= LLVMConstVector(values
, instr
->def
.num_components
);
1691 _mesa_hash_table_insert(ctx
->defs
, &instr
->def
, value
);
1694 static LLVMValueRef
cast_ptr(struct nir_to_llvm_context
*ctx
, LLVMValueRef ptr
,
1697 int addr_space
= LLVMGetPointerAddressSpace(LLVMTypeOf(ptr
));
1698 return LLVMBuildBitCast(ctx
->builder
, ptr
,
1699 LLVMPointerType(type
, addr_space
), "");
1703 get_buffer_size(struct nir_to_llvm_context
*ctx
, LLVMValueRef descriptor
, bool in_elements
)
1706 LLVMBuildExtractElement(ctx
->builder
, descriptor
,
1707 LLVMConstInt(ctx
->i32
, 2, false), "");
1710 if (ctx
->options
->chip_class
>= VI
&& in_elements
) {
1711 /* On VI, the descriptor contains the size in bytes,
1712 * but TXQ must return the size in elements.
1713 * The stride is always non-zero for resources using TXQ.
1715 LLVMValueRef stride
=
1716 LLVMBuildExtractElement(ctx
->builder
, descriptor
,
1717 LLVMConstInt(ctx
->i32
, 1, false), "");
1718 stride
= LLVMBuildLShr(ctx
->builder
, stride
,
1719 LLVMConstInt(ctx
->i32
, 16, false), "");
1720 stride
= LLVMBuildAnd(ctx
->builder
, stride
,
1721 LLVMConstInt(ctx
->i32
, 0x3fff, false), "");
1723 size
= LLVMBuildUDiv(ctx
->builder
, size
, stride
, "");
1729 * Given the i32 or vNi32 \p type, generate the textual name (e.g. for use with
1732 static void build_int_type_name(
1734 char *buf
, unsigned bufsize
)
1736 assert(bufsize
>= 6);
1738 if (LLVMGetTypeKind(type
) == LLVMVectorTypeKind
)
1739 snprintf(buf
, bufsize
, "v%ui32",
1740 LLVMGetVectorSize(type
));
1745 static LLVMValueRef
radv_lower_gather4_integer(struct nir_to_llvm_context
*ctx
,
1746 struct ac_tex_info
*tinfo
,
1747 nir_tex_instr
*instr
,
1748 const char *intr_name
,
1749 unsigned coord_vgpr_index
)
1751 LLVMValueRef coord
= tinfo
->args
[0];
1752 LLVMValueRef half_texel
[2];
1757 LLVMValueRef txq_args
[10];
1758 int txq_arg_count
= 0;
1760 bool da
= instr
->is_array
|| instr
->sampler_dim
== GLSL_SAMPLER_DIM_CUBE
;
1761 txq_args
[txq_arg_count
++] = LLVMConstInt(ctx
->i32
, 0, false);
1762 txq_args
[txq_arg_count
++] = tinfo
->args
[1];
1763 txq_args
[txq_arg_count
++] = LLVMConstInt(ctx
->i32
, 0xf, 0); /* dmask */
1764 txq_args
[txq_arg_count
++] = LLVMConstInt(ctx
->i32
, 0, 0); /* unorm */
1765 txq_args
[txq_arg_count
++] = LLVMConstInt(ctx
->i32
, 0, 0); /* r128 */
1766 txq_args
[txq_arg_count
++] = LLVMConstInt(ctx
->i32
, da
? 1 : 0, 0);
1767 txq_args
[txq_arg_count
++] = LLVMConstInt(ctx
->i32
, 0, 0); /* glc */
1768 txq_args
[txq_arg_count
++] = LLVMConstInt(ctx
->i32
, 0, 0); /* slc */
1769 txq_args
[txq_arg_count
++] = LLVMConstInt(ctx
->i32
, 0, 0); /* tfe */
1770 txq_args
[txq_arg_count
++] = LLVMConstInt(ctx
->i32
, 0, 0); /* lwe */
1771 size
= ac_emit_llvm_intrinsic(&ctx
->ac
, "llvm.SI.getresinfo.i32", ctx
->v4i32
,
1772 txq_args
, txq_arg_count
,
1773 AC_FUNC_ATTR_READNONE
);
1775 for (c
= 0; c
< 2; c
++) {
1776 half_texel
[c
] = LLVMBuildExtractElement(ctx
->builder
, size
,
1777 LLVMConstInt(ctx
->i32
, c
, false), "");
1778 half_texel
[c
] = LLVMBuildUIToFP(ctx
->builder
, half_texel
[c
], ctx
->f32
, "");
1779 half_texel
[c
] = ac_emit_fdiv(&ctx
->ac
, ctx
->f32one
, half_texel
[c
]);
1780 half_texel
[c
] = LLVMBuildFMul(ctx
->builder
, half_texel
[c
],
1781 LLVMConstReal(ctx
->f32
, -0.5), "");
1785 for (c
= 0; c
< 2; c
++) {
1787 LLVMValueRef index
= LLVMConstInt(ctx
->i32
, coord_vgpr_index
+ c
, 0);
1788 tmp
= LLVMBuildExtractElement(ctx
->builder
, coord
, index
, "");
1789 tmp
= LLVMBuildBitCast(ctx
->builder
, tmp
, ctx
->f32
, "");
1790 tmp
= LLVMBuildFAdd(ctx
->builder
, tmp
, half_texel
[c
], "");
1791 tmp
= LLVMBuildBitCast(ctx
->builder
, tmp
, ctx
->i32
, "");
1792 coord
= LLVMBuildInsertElement(ctx
->builder
, coord
, tmp
, index
, "");
1795 tinfo
->args
[0] = coord
;
1796 return ac_emit_llvm_intrinsic(&ctx
->ac
, intr_name
, tinfo
->dst_type
, tinfo
->args
, tinfo
->arg_count
,
1797 AC_FUNC_ATTR_READNONE
| AC_FUNC_ATTR_NOUNWIND
);
1801 static LLVMValueRef
build_tex_intrinsic(struct nir_to_llvm_context
*ctx
,
1802 nir_tex_instr
*instr
,
1803 struct ac_tex_info
*tinfo
)
1805 const char *name
= "llvm.SI.image.sample";
1806 const char *infix
= "";
1807 char intr_name
[127];
1809 bool is_shadow
= instr
->is_shadow
;
1810 bool has_offset
= tinfo
->has_offset
;
1811 switch (instr
->op
) {
1813 case nir_texop_txf_ms
:
1814 case nir_texop_samples_identical
:
1815 name
= instr
->sampler_dim
== GLSL_SAMPLER_DIM_MS
? "llvm.SI.image.load" :
1816 instr
->sampler_dim
== GLSL_SAMPLER_DIM_BUF
? "llvm.SI.vs.load.input" :
1817 "llvm.SI.image.load.mip";
1828 name
= "llvm.SI.getresinfo";
1830 case nir_texop_query_levels
:
1831 name
= "llvm.SI.getresinfo";
1834 if (ctx
->stage
!= MESA_SHADER_FRAGMENT
)
1841 name
= "llvm.SI.gather4";
1845 name
= "llvm.SI.getlod";
1853 build_int_type_name(LLVMTypeOf(tinfo
->args
[0]), type
, sizeof(type
));
1854 sprintf(intr_name
, "%s%s%s%s.%s", name
, is_shadow
? ".c" : "", infix
,
1855 has_offset
? ".o" : "", type
);
1857 if (instr
->op
== nir_texop_tg4
) {
1858 enum glsl_base_type stype
= glsl_get_sampler_result_type(instr
->texture
->var
->type
);
1859 if (stype
== GLSL_TYPE_UINT
|| stype
== GLSL_TYPE_INT
) {
1860 return radv_lower_gather4_integer(ctx
, tinfo
, instr
, intr_name
,
1861 (int)has_offset
+ (int)is_shadow
);
1864 return ac_emit_llvm_intrinsic(&ctx
->ac
, intr_name
, tinfo
->dst_type
, tinfo
->args
, tinfo
->arg_count
,
1865 AC_FUNC_ATTR_READNONE
| AC_FUNC_ATTR_NOUNWIND
);
1869 static LLVMValueRef
visit_vulkan_resource_index(struct nir_to_llvm_context
*ctx
,
1870 nir_intrinsic_instr
*instr
)
1872 LLVMValueRef index
= get_src(ctx
, instr
->src
[0]);
1873 unsigned desc_set
= nir_intrinsic_desc_set(instr
);
1874 unsigned binding
= nir_intrinsic_binding(instr
);
1875 LLVMValueRef desc_ptr
= ctx
->descriptor_sets
[desc_set
];
1876 struct radv_descriptor_set_layout
*layout
= ctx
->options
->layout
->set
[desc_set
].layout
;
1877 unsigned base_offset
= layout
->binding
[binding
].offset
;
1878 LLVMValueRef offset
, stride
;
1880 if (layout
->binding
[binding
].type
== VK_DESCRIPTOR_TYPE_UNIFORM_BUFFER_DYNAMIC
||
1881 layout
->binding
[binding
].type
== VK_DESCRIPTOR_TYPE_STORAGE_BUFFER_DYNAMIC
) {
1882 desc_ptr
= ctx
->push_constants
;
1883 base_offset
= ctx
->options
->layout
->push_constant_size
;
1884 base_offset
+= 16 * layout
->binding
[binding
].dynamic_offset_offset
;
1885 stride
= LLVMConstInt(ctx
->i32
, 16, false);
1887 stride
= LLVMConstInt(ctx
->i32
, layout
->binding
[binding
].size
, false);
1889 offset
= LLVMConstInt(ctx
->i32
, base_offset
, false);
1890 index
= LLVMBuildMul(ctx
->builder
, index
, stride
, "");
1891 offset
= LLVMBuildAdd(ctx
->builder
, offset
, index
, "");
1893 desc_ptr
= build_gep0(ctx
, desc_ptr
, offset
);
1894 desc_ptr
= cast_ptr(ctx
, desc_ptr
, ctx
->v4i32
);
1895 LLVMSetMetadata(desc_ptr
, ctx
->uniform_md_kind
, ctx
->empty_md
);
1897 return LLVMBuildLoad(ctx
->builder
, desc_ptr
, "");
1900 static LLVMValueRef
visit_load_push_constant(struct nir_to_llvm_context
*ctx
,
1901 nir_intrinsic_instr
*instr
)
1903 LLVMValueRef ptr
, addr
;
1905 addr
= LLVMConstInt(ctx
->i32
, nir_intrinsic_base(instr
), 0);
1906 addr
= LLVMBuildAdd(ctx
->builder
, addr
, get_src(ctx
, instr
->src
[0]), "");
1908 ptr
= build_gep0(ctx
, ctx
->push_constants
, addr
);
1909 ptr
= cast_ptr(ctx
, ptr
, get_def_type(ctx
, &instr
->dest
.ssa
));
1911 return LLVMBuildLoad(ctx
->builder
, ptr
, "");
1914 static LLVMValueRef
visit_get_buffer_size(struct nir_to_llvm_context
*ctx
,
1915 nir_intrinsic_instr
*instr
)
1917 LLVMValueRef desc
= get_src(ctx
, instr
->src
[0]);
1919 return get_buffer_size(ctx
, desc
, false);
1921 static void visit_store_ssbo(struct nir_to_llvm_context
*ctx
,
1922 nir_intrinsic_instr
*instr
)
1924 const char *store_name
;
1925 LLVMTypeRef data_type
= ctx
->f32
;
1926 unsigned writemask
= nir_intrinsic_write_mask(instr
);
1927 LLVMValueRef base_data
, base_offset
;
1928 LLVMValueRef params
[6];
1930 if (ctx
->stage
== MESA_SHADER_FRAGMENT
)
1931 ctx
->shader_info
->fs
.writes_memory
= true;
1933 params
[1] = get_src(ctx
, instr
->src
[1]);
1934 params
[2] = LLVMConstInt(ctx
->i32
, 0, false); /* vindex */
1935 params
[4] = LLVMConstInt(ctx
->i1
, 0, false); /* glc */
1936 params
[5] = LLVMConstInt(ctx
->i1
, 0, false); /* slc */
1938 if (instr
->num_components
> 1)
1939 data_type
= LLVMVectorType(ctx
->f32
, instr
->num_components
);
1941 base_data
= to_float(ctx
, get_src(ctx
, instr
->src
[0]));
1942 base_data
= trim_vector(ctx
, base_data
, instr
->num_components
);
1943 base_data
= LLVMBuildBitCast(ctx
->builder
, base_data
,
1945 base_offset
= get_src(ctx
, instr
->src
[2]); /* voffset */
1949 LLVMValueRef offset
;
1951 u_bit_scan_consecutive_range(&writemask
, &start
, &count
);
1953 /* Due to an LLVM limitation, split 3-element writes
1954 * into a 2-element and a 1-element write. */
1956 writemask
|= 1 << (start
+ 2);
1961 store_name
= "llvm.amdgcn.buffer.store.v4f32";
1963 } else if (count
== 2) {
1964 tmp
= LLVMBuildExtractElement(ctx
->builder
,
1965 base_data
, LLVMConstInt(ctx
->i32
, start
, false), "");
1966 data
= LLVMBuildInsertElement(ctx
->builder
, LLVMGetUndef(ctx
->v2f32
), tmp
,
1969 tmp
= LLVMBuildExtractElement(ctx
->builder
,
1970 base_data
, LLVMConstInt(ctx
->i32
, start
+ 1, false), "");
1971 data
= LLVMBuildInsertElement(ctx
->builder
, data
, tmp
,
1973 store_name
= "llvm.amdgcn.buffer.store.v2f32";
1977 if (get_llvm_num_components(base_data
) > 1)
1978 data
= LLVMBuildExtractElement(ctx
->builder
, base_data
,
1979 LLVMConstInt(ctx
->i32
, start
, false), "");
1982 store_name
= "llvm.amdgcn.buffer.store.f32";
1985 offset
= base_offset
;
1987 offset
= LLVMBuildAdd(ctx
->builder
, offset
, LLVMConstInt(ctx
->i32
, start
* 4, false), "");
1991 ac_emit_llvm_intrinsic(&ctx
->ac
, store_name
,
1992 ctx
->voidt
, params
, 6, 0);
1996 static LLVMValueRef
visit_atomic_ssbo(struct nir_to_llvm_context
*ctx
,
1997 nir_intrinsic_instr
*instr
)
2000 LLVMValueRef params
[6];
2002 if (ctx
->stage
== MESA_SHADER_FRAGMENT
)
2003 ctx
->shader_info
->fs
.writes_memory
= true;
2005 if (instr
->intrinsic
== nir_intrinsic_ssbo_atomic_comp_swap
) {
2006 params
[arg_count
++] = llvm_extract_elem(ctx
, get_src(ctx
, instr
->src
[3]), 0);
2008 params
[arg_count
++] = llvm_extract_elem(ctx
, get_src(ctx
, instr
->src
[2]), 0);
2009 params
[arg_count
++] = get_src(ctx
, instr
->src
[0]);
2010 params
[arg_count
++] = LLVMConstInt(ctx
->i32
, 0, false); /* vindex */
2011 params
[arg_count
++] = get_src(ctx
, instr
->src
[1]); /* voffset */
2012 params
[arg_count
++] = LLVMConstInt(ctx
->i1
, 0, false); /* slc */
2014 switch (instr
->intrinsic
) {
2015 case nir_intrinsic_ssbo_atomic_add
:
2016 name
= "llvm.amdgcn.buffer.atomic.add";
2018 case nir_intrinsic_ssbo_atomic_imin
:
2019 name
= "llvm.amdgcn.buffer.atomic.smin";
2021 case nir_intrinsic_ssbo_atomic_umin
:
2022 name
= "llvm.amdgcn.buffer.atomic.umin";
2024 case nir_intrinsic_ssbo_atomic_imax
:
2025 name
= "llvm.amdgcn.buffer.atomic.smax";
2027 case nir_intrinsic_ssbo_atomic_umax
:
2028 name
= "llvm.amdgcn.buffer.atomic.umax";
2030 case nir_intrinsic_ssbo_atomic_and
:
2031 name
= "llvm.amdgcn.buffer.atomic.and";
2033 case nir_intrinsic_ssbo_atomic_or
:
2034 name
= "llvm.amdgcn.buffer.atomic.or";
2036 case nir_intrinsic_ssbo_atomic_xor
:
2037 name
= "llvm.amdgcn.buffer.atomic.xor";
2039 case nir_intrinsic_ssbo_atomic_exchange
:
2040 name
= "llvm.amdgcn.buffer.atomic.swap";
2042 case nir_intrinsic_ssbo_atomic_comp_swap
:
2043 name
= "llvm.amdgcn.buffer.atomic.cmpswap";
2049 return ac_emit_llvm_intrinsic(&ctx
->ac
, name
, ctx
->i32
, params
, arg_count
, 0);
2052 static LLVMValueRef
visit_load_buffer(struct nir_to_llvm_context
*ctx
,
2053 nir_intrinsic_instr
*instr
)
2055 const char *load_name
;
2056 LLVMTypeRef data_type
= ctx
->f32
;
2057 if (instr
->num_components
== 3)
2058 data_type
= LLVMVectorType(ctx
->f32
, 4);
2059 else if (instr
->num_components
> 1)
2060 data_type
= LLVMVectorType(ctx
->f32
, instr
->num_components
);
2062 if (instr
->num_components
== 4 || instr
->num_components
== 3)
2063 load_name
= "llvm.amdgcn.buffer.load.v4f32";
2064 else if (instr
->num_components
== 2)
2065 load_name
= "llvm.amdgcn.buffer.load.v2f32";
2066 else if (instr
->num_components
== 1)
2067 load_name
= "llvm.amdgcn.buffer.load.f32";
2071 LLVMValueRef params
[] = {
2072 get_src(ctx
, instr
->src
[0]),
2073 LLVMConstInt(ctx
->i32
, 0, false),
2074 get_src(ctx
, instr
->src
[1]),
2075 LLVMConstInt(ctx
->i1
, 0, false),
2076 LLVMConstInt(ctx
->i1
, 0, false),
2080 ac_emit_llvm_intrinsic(&ctx
->ac
, load_name
, data_type
, params
, 5, 0);
2082 if (instr
->num_components
== 3)
2083 ret
= trim_vector(ctx
, ret
, 3);
2085 return LLVMBuildBitCast(ctx
->builder
, ret
,
2086 get_def_type(ctx
, &instr
->dest
.ssa
), "");
2089 static LLVMValueRef
visit_load_ubo_buffer(struct nir_to_llvm_context
*ctx
,
2090 nir_intrinsic_instr
*instr
)
2092 LLVMValueRef results
[4], ret
;
2093 LLVMValueRef rsrc
= get_src(ctx
, instr
->src
[0]);
2094 LLVMValueRef offset
= get_src(ctx
, instr
->src
[1]);
2096 rsrc
= LLVMBuildBitCast(ctx
->builder
, rsrc
, LLVMVectorType(ctx
->i8
, 16), "");
2098 for (unsigned i
= 0; i
< instr
->num_components
; ++i
) {
2099 LLVMValueRef params
[] = {
2101 LLVMBuildAdd(ctx
->builder
, LLVMConstInt(ctx
->i32
, 4 * i
, 0),
2104 results
[i
] = ac_emit_llvm_intrinsic(&ctx
->ac
, "llvm.SI.load.const", ctx
->f32
,
2105 params
, 2, AC_FUNC_ATTR_READNONE
);
2109 ret
= ac_build_gather_values(&ctx
->ac
, results
, instr
->num_components
);
2110 return LLVMBuildBitCast(ctx
->builder
, ret
,
2111 get_def_type(ctx
, &instr
->dest
.ssa
), "");
2115 radv_get_deref_offset(struct nir_to_llvm_context
*ctx
, nir_deref
*tail
,
2116 bool vs_in
, unsigned *vertex_index_out
,
2117 unsigned *const_out
, LLVMValueRef
*indir_out
)
2119 unsigned const_offset
= 0;
2120 LLVMValueRef offset
= NULL
;
2122 if (vertex_index_out
!= NULL
) {
2124 nir_deref_array
*deref_array
= nir_deref_as_array(tail
);
2125 *vertex_index_out
= deref_array
->base_offset
;
2128 while (tail
->child
!= NULL
) {
2129 const struct glsl_type
*parent_type
= tail
->type
;
2132 if (tail
->deref_type
== nir_deref_type_array
) {
2133 nir_deref_array
*deref_array
= nir_deref_as_array(tail
);
2134 LLVMValueRef index
, stride
, local_offset
;
2135 unsigned size
= glsl_count_attribute_slots(tail
->type
, vs_in
);
2137 const_offset
+= size
* deref_array
->base_offset
;
2138 if (deref_array
->deref_array_type
== nir_deref_array_type_direct
)
2141 assert(deref_array
->deref_array_type
== nir_deref_array_type_indirect
);
2142 index
= get_src(ctx
, deref_array
->indirect
);
2143 stride
= LLVMConstInt(ctx
->i32
, size
, 0);
2144 local_offset
= LLVMBuildMul(ctx
->builder
, stride
, index
, "");
2147 offset
= LLVMBuildAdd(ctx
->builder
, offset
, local_offset
, "");
2149 offset
= local_offset
;
2150 } else if (tail
->deref_type
== nir_deref_type_struct
) {
2151 nir_deref_struct
*deref_struct
= nir_deref_as_struct(tail
);
2153 for (unsigned i
= 0; i
< deref_struct
->index
; i
++) {
2154 const struct glsl_type
*ft
= glsl_get_struct_field(parent_type
, i
);
2155 const_offset
+= glsl_count_attribute_slots(ft
, vs_in
);
2158 unreachable("unsupported deref type");
2162 if (const_offset
&& offset
)
2163 offset
= LLVMBuildAdd(ctx
->builder
, offset
,
2164 LLVMConstInt(ctx
->i32
, const_offset
, 0),
2167 *const_out
= const_offset
;
2168 *indir_out
= offset
;
2172 load_gs_input(struct nir_to_llvm_context
*ctx
,
2173 nir_intrinsic_instr
*instr
)
2175 LLVMValueRef indir_index
, vtx_offset
;
2176 unsigned const_index
;
2177 LLVMValueRef args
[9];
2178 unsigned param
, vtx_offset_param
;
2179 LLVMValueRef value
[4], result
;
2180 unsigned vertex_index
;
2181 radv_get_deref_offset(ctx
, &instr
->variables
[0]->deref
,
2182 false, &vertex_index
,
2183 &const_index
, &indir_index
);
2184 vtx_offset_param
= vertex_index
;
2185 assert(vtx_offset_param
< 6);
2186 vtx_offset
= LLVMBuildMul(ctx
->builder
, ctx
->gs_vtx_offset
[vtx_offset_param
],
2187 LLVMConstInt(ctx
->i32
, 4, false), "");
2189 for (unsigned i
= 0; i
< instr
->num_components
; i
++) {
2190 param
= shader_io_get_unique_index(instr
->variables
[0]->var
->data
.location
);
2191 args
[0] = ctx
->esgs_ring
;
2192 args
[1] = vtx_offset
;
2193 args
[2] = LLVMConstInt(ctx
->i32
, (param
* 4 + i
) * 256, false);
2194 args
[3] = ctx
->i32zero
;
2195 args
[4] = ctx
->i32one
; /* OFFEN */
2196 args
[5] = ctx
->i32zero
; /* IDXEN */
2197 args
[6] = ctx
->i32one
; /* GLC */
2198 args
[7] = ctx
->i32zero
; /* SLC */
2199 args
[8] = ctx
->i32zero
; /* TFE */
2201 value
[i
] = ac_emit_llvm_intrinsic(&ctx
->ac
, "llvm.SI.buffer.load.dword.i32.i32",
2202 ctx
->i32
, args
, 9, AC_FUNC_ATTR_READONLY
);
2204 result
= ac_build_gather_values(&ctx
->ac
, value
, instr
->num_components
);
2209 static LLVMValueRef
visit_load_var(struct nir_to_llvm_context
*ctx
,
2210 nir_intrinsic_instr
*instr
)
2212 LLVMValueRef values
[4];
2213 int idx
= instr
->variables
[0]->var
->data
.driver_location
;
2214 int ve
= instr
->dest
.ssa
.num_components
;
2215 LLVMValueRef indir_index
;
2216 unsigned const_index
;
2217 switch (instr
->variables
[0]->var
->data
.mode
) {
2218 case nir_var_shader_in
:
2219 if (ctx
->stage
== MESA_SHADER_GEOMETRY
) {
2220 return load_gs_input(ctx
, instr
);
2222 radv_get_deref_offset(ctx
, &instr
->variables
[0]->deref
,
2223 ctx
->stage
== MESA_SHADER_VERTEX
, NULL
,
2224 &const_index
, &indir_index
);
2225 for (unsigned chan
= 0; chan
< ve
; chan
++) {
2227 unsigned count
= glsl_count_attribute_slots(
2228 instr
->variables
[0]->var
->type
,
2229 ctx
->stage
== MESA_SHADER_VERTEX
);
2230 LLVMValueRef tmp_vec
= ac_build_gather_values_extended(
2231 &ctx
->ac
, ctx
->inputs
+ idx
+ chan
, count
,
2234 values
[chan
] = LLVMBuildExtractElement(ctx
->builder
,
2238 values
[chan
] = ctx
->inputs
[idx
+ chan
+ const_index
* 4];
2240 return to_integer(ctx
, ac_build_gather_values(&ctx
->ac
, values
, ve
));
2243 radv_get_deref_offset(ctx
, &instr
->variables
[0]->deref
, false,
2244 NULL
, &const_index
, &indir_index
);
2245 for (unsigned chan
= 0; chan
< ve
; chan
++) {
2247 unsigned count
= glsl_count_attribute_slots(
2248 instr
->variables
[0]->var
->type
, false);
2249 LLVMValueRef tmp_vec
= ac_build_gather_values_extended(
2250 &ctx
->ac
, ctx
->locals
+ idx
+ chan
, count
,
2253 values
[chan
] = LLVMBuildExtractElement(ctx
->builder
,
2257 values
[chan
] = LLVMBuildLoad(ctx
->builder
, ctx
->locals
[idx
+ chan
+ const_index
* 4], "");
2260 return to_integer(ctx
, ac_build_gather_values(&ctx
->ac
, values
, ve
));
2261 case nir_var_shader_out
:
2262 radv_get_deref_offset(ctx
, &instr
->variables
[0]->deref
, false,
2263 NULL
, &const_index
, &indir_index
);
2264 for (unsigned chan
= 0; chan
< ve
; chan
++) {
2266 unsigned count
= glsl_count_attribute_slots(
2267 instr
->variables
[0]->var
->type
, false);
2268 LLVMValueRef tmp_vec
= ac_build_gather_values_extended(
2269 &ctx
->ac
, ctx
->outputs
+ idx
+ chan
, count
,
2272 values
[chan
] = LLVMBuildExtractElement(ctx
->builder
,
2276 values
[chan
] = LLVMBuildLoad(ctx
->builder
,
2277 ctx
->outputs
[idx
+ chan
+ const_index
* 4],
2281 return to_integer(ctx
, ac_build_gather_values(&ctx
->ac
, values
, ve
));
2282 case nir_var_shared
: {
2283 radv_get_deref_offset(ctx
, &instr
->variables
[0]->deref
, false,
2284 NULL
, &const_index
, &indir_index
);
2285 LLVMValueRef ptr
= get_shared_memory_ptr(ctx
, idx
, ctx
->i32
);
2286 LLVMValueRef derived_ptr
;
2288 for (unsigned chan
= 0; chan
< ve
; chan
++) {
2289 LLVMValueRef index
= LLVMConstInt(ctx
->i32
, chan
, false);
2291 index
= LLVMBuildAdd(ctx
->builder
, index
, indir_index
, "");
2292 derived_ptr
= LLVMBuildGEP(ctx
->builder
, ptr
, &index
, 1, "");
2293 values
[chan
] = LLVMBuildLoad(ctx
->builder
, derived_ptr
, "");
2295 return to_integer(ctx
, ac_build_gather_values(&ctx
->ac
, values
, ve
));
2304 visit_store_var(struct nir_to_llvm_context
*ctx
,
2305 nir_intrinsic_instr
*instr
)
2307 LLVMValueRef temp_ptr
, value
;
2308 int idx
= instr
->variables
[0]->var
->data
.driver_location
;
2309 LLVMValueRef src
= to_float(ctx
, get_src(ctx
, instr
->src
[0]));
2310 int writemask
= instr
->const_index
[0];
2311 LLVMValueRef indir_index
;
2312 unsigned const_index
;
2313 switch (instr
->variables
[0]->var
->data
.mode
) {
2314 case nir_var_shader_out
:
2315 radv_get_deref_offset(ctx
, &instr
->variables
[0]->deref
, false,
2316 NULL
, &const_index
, &indir_index
);
2317 for (unsigned chan
= 0; chan
< 4; chan
++) {
2319 if (!(writemask
& (1 << chan
)))
2321 if (get_llvm_num_components(src
) == 1)
2324 value
= LLVMBuildExtractElement(ctx
->builder
, src
,
2325 LLVMConstInt(ctx
->i32
,
2329 if (instr
->variables
[0]->var
->data
.location
== VARYING_SLOT_CLIP_DIST0
||
2330 instr
->variables
[0]->var
->data
.location
== VARYING_SLOT_CULL_DIST0
)
2333 unsigned count
= glsl_count_attribute_slots(
2334 instr
->variables
[0]->var
->type
, false);
2335 LLVMValueRef tmp_vec
= ac_build_gather_values_extended(
2336 &ctx
->ac
, ctx
->outputs
+ idx
+ chan
, count
,
2339 if (get_llvm_num_components(tmp_vec
) > 1) {
2340 tmp_vec
= LLVMBuildInsertElement(ctx
->builder
, tmp_vec
,
2341 value
, indir_index
, "");
2344 build_store_values_extended(ctx
, ctx
->outputs
+ idx
+ chan
,
2345 count
, stride
, tmp_vec
);
2348 temp_ptr
= ctx
->outputs
[idx
+ chan
+ const_index
* stride
];
2350 LLVMBuildStore(ctx
->builder
, value
, temp_ptr
);
2355 radv_get_deref_offset(ctx
, &instr
->variables
[0]->deref
, false,
2356 NULL
, &const_index
, &indir_index
);
2357 for (unsigned chan
= 0; chan
< 4; chan
++) {
2358 if (!(writemask
& (1 << chan
)))
2361 if (get_llvm_num_components(src
) == 1)
2364 value
= LLVMBuildExtractElement(ctx
->builder
, src
,
2365 LLVMConstInt(ctx
->i32
, chan
, false), "");
2367 unsigned count
= glsl_count_attribute_slots(
2368 instr
->variables
[0]->var
->type
, false);
2369 LLVMValueRef tmp_vec
= ac_build_gather_values_extended(
2370 &ctx
->ac
, ctx
->locals
+ idx
+ chan
, count
,
2373 tmp_vec
= LLVMBuildInsertElement(ctx
->builder
, tmp_vec
,
2374 value
, indir_index
, "");
2375 build_store_values_extended(ctx
, ctx
->locals
+ idx
+ chan
,
2378 temp_ptr
= ctx
->locals
[idx
+ chan
+ const_index
* 4];
2380 LLVMBuildStore(ctx
->builder
, value
, temp_ptr
);
2384 case nir_var_shared
: {
2386 radv_get_deref_offset(ctx
, &instr
->variables
[0]->deref
, false,
2387 NULL
, &const_index
, &indir_index
);
2389 ptr
= get_shared_memory_ptr(ctx
, idx
, ctx
->i32
);
2390 LLVMValueRef derived_ptr
;
2392 for (unsigned chan
= 0; chan
< 4; chan
++) {
2393 if (!(writemask
& (1 << chan
)))
2396 LLVMValueRef index
= LLVMConstInt(ctx
->i32
, chan
, false);
2398 if (get_llvm_num_components(src
) == 1)
2401 value
= LLVMBuildExtractElement(ctx
->builder
, src
,
2402 LLVMConstInt(ctx
->i32
,
2407 index
= LLVMBuildAdd(ctx
->builder
, index
, indir_index
, "");
2409 derived_ptr
= LLVMBuildGEP(ctx
->builder
, ptr
, &index
, 1, "");
2410 LLVMBuildStore(ctx
->builder
,
2411 to_integer(ctx
, value
), derived_ptr
);
2420 static int image_type_to_components_count(enum glsl_sampler_dim dim
, bool array
)
2423 case GLSL_SAMPLER_DIM_BUF
:
2425 case GLSL_SAMPLER_DIM_1D
:
2426 return array
? 2 : 1;
2427 case GLSL_SAMPLER_DIM_2D
:
2428 return array
? 3 : 2;
2429 case GLSL_SAMPLER_DIM_MS
:
2430 return array
? 4 : 3;
2431 case GLSL_SAMPLER_DIM_3D
:
2432 case GLSL_SAMPLER_DIM_CUBE
:
2434 case GLSL_SAMPLER_DIM_RECT
:
2435 case GLSL_SAMPLER_DIM_SUBPASS
:
2437 case GLSL_SAMPLER_DIM_SUBPASS_MS
:
2445 static LLVMValueRef
get_image_coords(struct nir_to_llvm_context
*ctx
,
2446 nir_intrinsic_instr
*instr
)
2448 const struct glsl_type
*type
= instr
->variables
[0]->var
->type
;
2449 if(instr
->variables
[0]->deref
.child
)
2450 type
= instr
->variables
[0]->deref
.child
->type
;
2452 LLVMValueRef src0
= get_src(ctx
, instr
->src
[0]);
2453 LLVMValueRef coords
[4];
2454 LLVMValueRef masks
[] = {
2455 LLVMConstInt(ctx
->i32
, 0, false), LLVMConstInt(ctx
->i32
, 1, false),
2456 LLVMConstInt(ctx
->i32
, 2, false), LLVMConstInt(ctx
->i32
, 3, false),
2460 enum glsl_sampler_dim dim
= glsl_get_sampler_dim(type
);
2461 bool add_frag_pos
= (dim
== GLSL_SAMPLER_DIM_SUBPASS
||
2462 dim
== GLSL_SAMPLER_DIM_SUBPASS_MS
);
2463 bool is_ms
= (dim
== GLSL_SAMPLER_DIM_MS
||
2464 dim
== GLSL_SAMPLER_DIM_SUBPASS_MS
);
2466 count
= image_type_to_components_count(dim
,
2467 glsl_sampler_type_is_array(type
));
2470 if (instr
->src
[0].ssa
->num_components
)
2471 res
= LLVMBuildExtractElement(ctx
->builder
, src0
, masks
[0], "");
2478 for (chan
= 0; chan
< count
; ++chan
) {
2479 coords
[chan
] = LLVMBuildExtractElement(ctx
->builder
, src0
, masks
[chan
], "");
2483 for (chan
= 0; chan
< count
; ++chan
)
2484 coords
[chan
] = LLVMBuildAdd(ctx
->builder
, coords
[chan
], LLVMBuildFPToUI(ctx
->builder
, ctx
->frag_pos
[chan
], ctx
->i32
, ""), "");
2487 coords
[count
] = llvm_extract_elem(ctx
, get_src(ctx
, instr
->src
[1]), 0);
2492 coords
[3] = LLVMGetUndef(ctx
->i32
);
2495 res
= ac_build_gather_values(&ctx
->ac
, coords
, count
);
2500 static void build_type_name_for_intr(
2502 char *buf
, unsigned bufsize
)
2504 LLVMTypeRef elem_type
= type
;
2506 assert(bufsize
>= 8);
2508 if (LLVMGetTypeKind(type
) == LLVMVectorTypeKind
) {
2509 int ret
= snprintf(buf
, bufsize
, "v%u",
2510 LLVMGetVectorSize(type
));
2512 char *type_name
= LLVMPrintTypeToString(type
);
2513 fprintf(stderr
, "Error building type name for: %s\n",
2517 elem_type
= LLVMGetElementType(type
);
2521 switch (LLVMGetTypeKind(elem_type
)) {
2523 case LLVMIntegerTypeKind
:
2524 snprintf(buf
, bufsize
, "i%d", LLVMGetIntTypeWidth(elem_type
));
2526 case LLVMFloatTypeKind
:
2527 snprintf(buf
, bufsize
, "f32");
2529 case LLVMDoubleTypeKind
:
2530 snprintf(buf
, bufsize
, "f64");
2535 static void get_image_intr_name(const char *base_name
,
2536 LLVMTypeRef data_type
,
2537 LLVMTypeRef coords_type
,
2538 LLVMTypeRef rsrc_type
,
2539 char *out_name
, unsigned out_len
)
2541 char coords_type_name
[8];
2543 build_type_name_for_intr(coords_type
, coords_type_name
,
2544 sizeof(coords_type_name
));
2546 if (HAVE_LLVM
<= 0x0309) {
2547 snprintf(out_name
, out_len
, "%s.%s", base_name
, coords_type_name
);
2549 char data_type_name
[8];
2550 char rsrc_type_name
[8];
2552 build_type_name_for_intr(data_type
, data_type_name
,
2553 sizeof(data_type_name
));
2554 build_type_name_for_intr(rsrc_type
, rsrc_type_name
,
2555 sizeof(rsrc_type_name
));
2556 snprintf(out_name
, out_len
, "%s.%s.%s.%s", base_name
,
2557 data_type_name
, coords_type_name
, rsrc_type_name
);
2561 static LLVMValueRef
visit_image_load(struct nir_to_llvm_context
*ctx
,
2562 nir_intrinsic_instr
*instr
)
2564 LLVMValueRef params
[7];
2566 char intrinsic_name
[64];
2567 const nir_variable
*var
= instr
->variables
[0]->var
;
2568 const struct glsl_type
*type
= var
->type
;
2569 if(instr
->variables
[0]->deref
.child
)
2570 type
= instr
->variables
[0]->deref
.child
->type
;
2572 type
= glsl_without_array(type
);
2573 if (glsl_get_sampler_dim(type
) == GLSL_SAMPLER_DIM_BUF
) {
2574 params
[0] = get_sampler_desc(ctx
, instr
->variables
[0], DESC_BUFFER
);
2575 params
[1] = LLVMBuildExtractElement(ctx
->builder
, get_src(ctx
, instr
->src
[0]),
2576 LLVMConstInt(ctx
->i32
, 0, false), ""); /* vindex */
2577 params
[2] = LLVMConstInt(ctx
->i32
, 0, false); /* voffset */
2578 params
[3] = LLVMConstInt(ctx
->i1
, 0, false); /* glc */
2579 params
[4] = LLVMConstInt(ctx
->i1
, 0, false); /* slc */
2580 res
= ac_emit_llvm_intrinsic(&ctx
->ac
, "llvm.amdgcn.buffer.load.format.v4f32", ctx
->v4f32
,
2583 res
= trim_vector(ctx
, res
, instr
->dest
.ssa
.num_components
);
2584 res
= to_integer(ctx
, res
);
2586 bool is_da
= glsl_sampler_type_is_array(type
) ||
2587 glsl_get_sampler_dim(type
) == GLSL_SAMPLER_DIM_CUBE
;
2588 LLVMValueRef da
= is_da
? ctx
->i32one
: ctx
->i32zero
;
2589 LLVMValueRef glc
= LLVMConstInt(ctx
->i1
, 0, false);
2590 LLVMValueRef slc
= LLVMConstInt(ctx
->i1
, 0, false);
2592 params
[0] = get_image_coords(ctx
, instr
);
2593 params
[1] = get_sampler_desc(ctx
, instr
->variables
[0], DESC_IMAGE
);
2594 params
[2] = LLVMConstInt(ctx
->i32
, 15, false); /* dmask */
2595 if (HAVE_LLVM
<= 0x0309) {
2596 params
[3] = LLVMConstInt(ctx
->i1
, 0, false); /* r128 */
2601 LLVMValueRef lwe
= LLVMConstInt(ctx
->i1
, 0, false);
2608 get_image_intr_name("llvm.amdgcn.image.load",
2609 ctx
->v4f32
, /* vdata */
2610 LLVMTypeOf(params
[0]), /* coords */
2611 LLVMTypeOf(params
[1]), /* rsrc */
2612 intrinsic_name
, sizeof(intrinsic_name
));
2614 res
= ac_emit_llvm_intrinsic(&ctx
->ac
, intrinsic_name
, ctx
->v4f32
,
2615 params
, 7, AC_FUNC_ATTR_READONLY
);
2617 return to_integer(ctx
, res
);
2620 static void visit_image_store(struct nir_to_llvm_context
*ctx
,
2621 nir_intrinsic_instr
*instr
)
2623 LLVMValueRef params
[8];
2624 char intrinsic_name
[64];
2625 const nir_variable
*var
= instr
->variables
[0]->var
;
2626 LLVMValueRef i1false
= LLVMConstInt(ctx
->i1
, 0, 0);
2627 LLVMValueRef i1true
= LLVMConstInt(ctx
->i1
, 1, 0);
2628 const struct glsl_type
*type
= glsl_without_array(var
->type
);
2630 if (ctx
->stage
== MESA_SHADER_FRAGMENT
)
2631 ctx
->shader_info
->fs
.writes_memory
= true;
2633 if (glsl_get_sampler_dim(type
) == GLSL_SAMPLER_DIM_BUF
) {
2634 params
[0] = to_float(ctx
, get_src(ctx
, instr
->src
[2])); /* data */
2635 params
[1] = get_sampler_desc(ctx
, instr
->variables
[0], DESC_BUFFER
);
2636 params
[2] = LLVMBuildExtractElement(ctx
->builder
, get_src(ctx
, instr
->src
[0]),
2637 LLVMConstInt(ctx
->i32
, 0, false), ""); /* vindex */
2638 params
[3] = LLVMConstInt(ctx
->i32
, 0, false); /* voffset */
2639 params
[4] = i1false
; /* glc */
2640 params
[5] = i1false
; /* slc */
2641 ac_emit_llvm_intrinsic(&ctx
->ac
, "llvm.amdgcn.buffer.store.format.v4f32", ctx
->voidt
,
2644 bool is_da
= glsl_sampler_type_is_array(type
) ||
2645 glsl_get_sampler_dim(type
) == GLSL_SAMPLER_DIM_CUBE
;
2646 LLVMValueRef da
= is_da
? i1true
: i1false
;
2647 LLVMValueRef glc
= i1false
;
2648 LLVMValueRef slc
= i1false
;
2650 params
[0] = to_float(ctx
, get_src(ctx
, instr
->src
[2]));
2651 params
[1] = get_image_coords(ctx
, instr
); /* coords */
2652 params
[2] = get_sampler_desc(ctx
, instr
->variables
[0], DESC_IMAGE
);
2653 params
[3] = LLVMConstInt(ctx
->i32
, 15, false); /* dmask */
2654 if (HAVE_LLVM
<= 0x0309) {
2655 params
[4] = i1false
; /* r128 */
2660 LLVMValueRef lwe
= i1false
;
2667 get_image_intr_name("llvm.amdgcn.image.store",
2668 LLVMTypeOf(params
[0]), /* vdata */
2669 LLVMTypeOf(params
[1]), /* coords */
2670 LLVMTypeOf(params
[2]), /* rsrc */
2671 intrinsic_name
, sizeof(intrinsic_name
));
2673 ac_emit_llvm_intrinsic(&ctx
->ac
, intrinsic_name
, ctx
->voidt
,
2679 static LLVMValueRef
visit_image_atomic(struct nir_to_llvm_context
*ctx
,
2680 nir_intrinsic_instr
*instr
)
2682 LLVMValueRef params
[6];
2683 int param_count
= 0;
2684 const nir_variable
*var
= instr
->variables
[0]->var
;
2685 LLVMValueRef i1false
= LLVMConstInt(ctx
->i1
, 0, 0);
2686 LLVMValueRef i1true
= LLVMConstInt(ctx
->i1
, 1, 0);
2687 const char *base_name
= "llvm.amdgcn.image.atomic";
2688 const char *atomic_name
;
2689 LLVMValueRef coords
;
2690 char intrinsic_name
[32], coords_type
[8];
2691 const struct glsl_type
*type
= glsl_without_array(var
->type
);
2693 if (ctx
->stage
== MESA_SHADER_FRAGMENT
)
2694 ctx
->shader_info
->fs
.writes_memory
= true;
2696 params
[param_count
++] = get_src(ctx
, instr
->src
[2]);
2697 if (instr
->intrinsic
== nir_intrinsic_image_atomic_comp_swap
)
2698 params
[param_count
++] = get_src(ctx
, instr
->src
[3]);
2700 if (glsl_get_sampler_dim(type
) == GLSL_SAMPLER_DIM_BUF
) {
2701 params
[param_count
++] = get_sampler_desc(ctx
, instr
->variables
[0], DESC_BUFFER
);
2702 coords
= params
[param_count
++] = LLVMBuildExtractElement(ctx
->builder
, get_src(ctx
, instr
->src
[0]),
2703 LLVMConstInt(ctx
->i32
, 0, false), ""); /* vindex */
2704 params
[param_count
++] = ctx
->i32zero
; /* voffset */
2705 params
[param_count
++] = i1false
; /* glc */
2706 params
[param_count
++] = i1false
; /* slc */
2708 bool da
= glsl_sampler_type_is_array(type
) ||
2709 glsl_get_sampler_dim(type
) == GLSL_SAMPLER_DIM_CUBE
;
2711 coords
= params
[param_count
++] = get_image_coords(ctx
, instr
);
2712 params
[param_count
++] = get_sampler_desc(ctx
, instr
->variables
[0], DESC_IMAGE
);
2713 params
[param_count
++] = i1false
; /* r128 */
2714 params
[param_count
++] = da
? i1true
: i1false
; /* da */
2715 params
[param_count
++] = i1false
; /* slc */
2718 switch (instr
->intrinsic
) {
2719 case nir_intrinsic_image_atomic_add
:
2720 atomic_name
= "add";
2722 case nir_intrinsic_image_atomic_min
:
2723 atomic_name
= "smin";
2725 case nir_intrinsic_image_atomic_max
:
2726 atomic_name
= "smax";
2728 case nir_intrinsic_image_atomic_and
:
2729 atomic_name
= "and";
2731 case nir_intrinsic_image_atomic_or
:
2734 case nir_intrinsic_image_atomic_xor
:
2735 atomic_name
= "xor";
2737 case nir_intrinsic_image_atomic_exchange
:
2738 atomic_name
= "swap";
2740 case nir_intrinsic_image_atomic_comp_swap
:
2741 atomic_name
= "cmpswap";
2746 build_int_type_name(LLVMTypeOf(coords
),
2747 coords_type
, sizeof(coords_type
));
2749 snprintf(intrinsic_name
, sizeof(intrinsic_name
),
2750 "%s.%s.%s", base_name
, atomic_name
, coords_type
);
2751 return ac_emit_llvm_intrinsic(&ctx
->ac
, intrinsic_name
, ctx
->i32
, params
, param_count
, 0);
2754 static LLVMValueRef
visit_image_size(struct nir_to_llvm_context
*ctx
,
2755 nir_intrinsic_instr
*instr
)
2758 LLVMValueRef params
[10];
2759 const nir_variable
*var
= instr
->variables
[0]->var
;
2760 const struct glsl_type
*type
= instr
->variables
[0]->var
->type
;
2761 bool da
= glsl_sampler_type_is_array(var
->type
) ||
2762 glsl_get_sampler_dim(var
->type
) == GLSL_SAMPLER_DIM_CUBE
;
2763 if(instr
->variables
[0]->deref
.child
)
2764 type
= instr
->variables
[0]->deref
.child
->type
;
2766 if (glsl_get_sampler_dim(type
) == GLSL_SAMPLER_DIM_BUF
)
2767 return get_buffer_size(ctx
, get_sampler_desc(ctx
, instr
->variables
[0], DESC_BUFFER
), true);
2768 params
[0] = ctx
->i32zero
;
2769 params
[1] = get_sampler_desc(ctx
, instr
->variables
[0], DESC_IMAGE
);
2770 params
[2] = LLVMConstInt(ctx
->i32
, 15, false);
2771 params
[3] = ctx
->i32zero
;
2772 params
[4] = ctx
->i32zero
;
2773 params
[5] = da
? ctx
->i32one
: ctx
->i32zero
;
2774 params
[6] = ctx
->i32zero
;
2775 params
[7] = ctx
->i32zero
;
2776 params
[8] = ctx
->i32zero
;
2777 params
[9] = ctx
->i32zero
;
2779 res
= ac_emit_llvm_intrinsic(&ctx
->ac
, "llvm.SI.getresinfo.i32", ctx
->v4i32
,
2780 params
, 10, AC_FUNC_ATTR_READNONE
);
2782 if (glsl_get_sampler_dim(type
) == GLSL_SAMPLER_DIM_CUBE
&&
2783 glsl_sampler_type_is_array(type
)) {
2784 LLVMValueRef two
= LLVMConstInt(ctx
->i32
, 2, false);
2785 LLVMValueRef six
= LLVMConstInt(ctx
->i32
, 6, false);
2786 LLVMValueRef z
= LLVMBuildExtractElement(ctx
->builder
, res
, two
, "");
2787 z
= LLVMBuildSDiv(ctx
->builder
, z
, six
, "");
2788 res
= LLVMBuildInsertElement(ctx
->builder
, res
, z
, two
, "");
2793 static void emit_waitcnt(struct nir_to_llvm_context
*ctx
)
2795 LLVMValueRef args
[1] = {
2796 LLVMConstInt(ctx
->i32
, 0xf70, false),
2798 ac_emit_llvm_intrinsic(&ctx
->ac
, "llvm.amdgcn.s.waitcnt",
2799 ctx
->voidt
, args
, 1, 0);
2802 static void emit_barrier(struct nir_to_llvm_context
*ctx
)
2805 ac_emit_llvm_intrinsic(&ctx
->ac
, "llvm.amdgcn.s.barrier",
2806 ctx
->voidt
, NULL
, 0, 0);
2809 static void emit_discard_if(struct nir_to_llvm_context
*ctx
,
2810 nir_intrinsic_instr
*instr
)
2813 ctx
->shader_info
->fs
.can_discard
= true;
2815 cond
= LLVMBuildICmp(ctx
->builder
, LLVMIntNE
,
2816 get_src(ctx
, instr
->src
[0]),
2819 cond
= LLVMBuildSelect(ctx
->builder
, cond
,
2820 LLVMConstReal(ctx
->f32
, -1.0f
),
2822 ac_emit_llvm_intrinsic(&ctx
->ac
, "llvm.AMDGPU.kill",
2828 visit_load_local_invocation_index(struct nir_to_llvm_context
*ctx
)
2830 LLVMValueRef result
;
2831 LLVMValueRef thread_id
= get_thread_id(ctx
);
2832 result
= LLVMBuildAnd(ctx
->builder
, ctx
->tg_size
,
2833 LLVMConstInt(ctx
->i32
, 0xfc0, false), "");
2835 return LLVMBuildAdd(ctx
->builder
, result
, thread_id
, "");
2838 static LLVMValueRef
visit_var_atomic(struct nir_to_llvm_context
*ctx
,
2839 nir_intrinsic_instr
*instr
)
2841 LLVMValueRef ptr
, result
;
2842 int idx
= instr
->variables
[0]->var
->data
.driver_location
;
2843 LLVMValueRef src
= get_src(ctx
, instr
->src
[0]);
2844 ptr
= get_shared_memory_ptr(ctx
, idx
, ctx
->i32
);
2846 if (instr
->intrinsic
== nir_intrinsic_var_atomic_comp_swap
) {
2847 LLVMValueRef src1
= get_src(ctx
, instr
->src
[1]);
2848 result
= LLVMBuildAtomicCmpXchg(ctx
->builder
,
2850 LLVMAtomicOrderingSequentiallyConsistent
,
2851 LLVMAtomicOrderingSequentiallyConsistent
,
2854 LLVMAtomicRMWBinOp op
;
2855 switch (instr
->intrinsic
) {
2856 case nir_intrinsic_var_atomic_add
:
2857 op
= LLVMAtomicRMWBinOpAdd
;
2859 case nir_intrinsic_var_atomic_umin
:
2860 op
= LLVMAtomicRMWBinOpUMin
;
2862 case nir_intrinsic_var_atomic_umax
:
2863 op
= LLVMAtomicRMWBinOpUMax
;
2865 case nir_intrinsic_var_atomic_imin
:
2866 op
= LLVMAtomicRMWBinOpMin
;
2868 case nir_intrinsic_var_atomic_imax
:
2869 op
= LLVMAtomicRMWBinOpMax
;
2871 case nir_intrinsic_var_atomic_and
:
2872 op
= LLVMAtomicRMWBinOpAnd
;
2874 case nir_intrinsic_var_atomic_or
:
2875 op
= LLVMAtomicRMWBinOpOr
;
2877 case nir_intrinsic_var_atomic_xor
:
2878 op
= LLVMAtomicRMWBinOpXor
;
2880 case nir_intrinsic_var_atomic_exchange
:
2881 op
= LLVMAtomicRMWBinOpXchg
;
2887 result
= LLVMBuildAtomicRMW(ctx
->builder
, op
, ptr
, to_integer(ctx
, src
),
2888 LLVMAtomicOrderingSequentiallyConsistent
,
2894 #define INTERP_CENTER 0
2895 #define INTERP_CENTROID 1
2896 #define INTERP_SAMPLE 2
2898 static LLVMValueRef
lookup_interp_param(struct nir_to_llvm_context
*ctx
,
2899 enum glsl_interp_mode interp
, unsigned location
)
2902 case INTERP_MODE_FLAT
:
2905 case INTERP_MODE_SMOOTH
:
2906 case INTERP_MODE_NONE
:
2907 if (location
== INTERP_CENTER
)
2908 return ctx
->persp_center
;
2909 else if (location
== INTERP_CENTROID
)
2910 return ctx
->persp_centroid
;
2911 else if (location
== INTERP_SAMPLE
)
2912 return ctx
->persp_sample
;
2914 case INTERP_MODE_NOPERSPECTIVE
:
2915 if (location
== INTERP_CENTER
)
2916 return ctx
->linear_center
;
2917 else if (location
== INTERP_CENTROID
)
2918 return ctx
->linear_centroid
;
2919 else if (location
== INTERP_SAMPLE
)
2920 return ctx
->linear_sample
;
2926 static LLVMValueRef
load_sample_position(struct nir_to_llvm_context
*ctx
,
2927 LLVMValueRef sample_id
)
2929 /* offset = sample_id * 8 (8 = 2 floats containing samplepos.xy) */
2930 LLVMValueRef offset0
= LLVMBuildMul(ctx
->builder
, sample_id
, LLVMConstInt(ctx
->i32
, 8, false), "");
2931 LLVMValueRef offset1
= LLVMBuildAdd(ctx
->builder
, offset0
, LLVMConstInt(ctx
->i32
, 4, false), "");
2932 LLVMValueRef result
[2];
2934 result
[0] = build_indexed_load_const(ctx
, ctx
->sample_positions
, offset0
);
2935 result
[1] = build_indexed_load_const(ctx
, ctx
->sample_positions
, offset1
);
2937 return ac_build_gather_values(&ctx
->ac
, result
, 2);
2940 static LLVMValueRef
load_sample_pos(struct nir_to_llvm_context
*ctx
)
2942 LLVMValueRef values
[2];
2944 values
[0] = emit_ffract(ctx
, ctx
->frag_pos
[0]);
2945 values
[1] = emit_ffract(ctx
, ctx
->frag_pos
[1]);
2946 return ac_build_gather_values(&ctx
->ac
, values
, 2);
2949 static LLVMValueRef
visit_interp(struct nir_to_llvm_context
*ctx
,
2950 nir_intrinsic_instr
*instr
)
2952 LLVMValueRef result
[2];
2953 LLVMValueRef interp_param
, attr_number
;
2956 LLVMValueRef src_c0
, src_c1
;
2957 const char *intr_name
;
2959 int input_index
= instr
->variables
[0]->var
->data
.location
- VARYING_SLOT_VAR0
;
2960 switch (instr
->intrinsic
) {
2961 case nir_intrinsic_interp_var_at_centroid
:
2962 location
= INTERP_CENTROID
;
2964 case nir_intrinsic_interp_var_at_sample
:
2965 case nir_intrinsic_interp_var_at_offset
:
2966 location
= INTERP_SAMPLE
;
2967 src0
= get_src(ctx
, instr
->src
[0]);
2973 if (instr
->intrinsic
== nir_intrinsic_interp_var_at_offset
) {
2974 src_c0
= to_float(ctx
, LLVMBuildExtractElement(ctx
->builder
, src0
, ctx
->i32zero
, ""));
2975 src_c1
= to_float(ctx
, LLVMBuildExtractElement(ctx
->builder
, src0
, ctx
->i32one
, ""));
2976 } else if (instr
->intrinsic
== nir_intrinsic_interp_var_at_sample
) {
2977 LLVMValueRef sample_position
;
2978 LLVMValueRef halfval
= LLVMConstReal(ctx
->f32
, 0.5f
);
2980 /* fetch sample ID */
2981 sample_position
= load_sample_position(ctx
, src0
);
2983 src_c0
= LLVMBuildExtractElement(ctx
->builder
, sample_position
, ctx
->i32zero
, "");
2984 src_c0
= LLVMBuildFSub(ctx
->builder
, src_c0
, halfval
, "");
2985 src_c1
= LLVMBuildExtractElement(ctx
->builder
, sample_position
, ctx
->i32one
, "");
2986 src_c1
= LLVMBuildFSub(ctx
->builder
, src_c1
, halfval
, "");
2988 interp_param
= lookup_interp_param(ctx
, instr
->variables
[0]->var
->data
.interpolation
, location
);
2989 attr_number
= LLVMConstInt(ctx
->i32
, input_index
, false);
2991 if (location
== INTERP_SAMPLE
) {
2992 LLVMValueRef ij_out
[2];
2993 LLVMValueRef ddxy_out
= emit_ddxy_interp(ctx
, interp_param
);
2996 * take the I then J parameters, and the DDX/Y for it, and
2997 * calculate the IJ inputs for the interpolator.
2998 * temp1 = ddx * offset/sample.x + I;
2999 * interp_param.I = ddy * offset/sample.y + temp1;
3000 * temp1 = ddx * offset/sample.x + J;
3001 * interp_param.J = ddy * offset/sample.y + temp1;
3003 for (unsigned i
= 0; i
< 2; i
++) {
3004 LLVMValueRef ix_ll
= LLVMConstInt(ctx
->i32
, i
, false);
3005 LLVMValueRef iy_ll
= LLVMConstInt(ctx
->i32
, i
+ 2, false);
3006 LLVMValueRef ddx_el
= LLVMBuildExtractElement(ctx
->builder
,
3007 ddxy_out
, ix_ll
, "");
3008 LLVMValueRef ddy_el
= LLVMBuildExtractElement(ctx
->builder
,
3009 ddxy_out
, iy_ll
, "");
3010 LLVMValueRef interp_el
= LLVMBuildExtractElement(ctx
->builder
,
3011 interp_param
, ix_ll
, "");
3012 LLVMValueRef temp1
, temp2
;
3014 interp_el
= LLVMBuildBitCast(ctx
->builder
, interp_el
,
3017 temp1
= LLVMBuildFMul(ctx
->builder
, ddx_el
, src_c0
, "");
3018 temp1
= LLVMBuildFAdd(ctx
->builder
, temp1
, interp_el
, "");
3020 temp2
= LLVMBuildFMul(ctx
->builder
, ddy_el
, src_c1
, "");
3021 temp2
= LLVMBuildFAdd(ctx
->builder
, temp2
, temp1
, "");
3023 ij_out
[i
] = LLVMBuildBitCast(ctx
->builder
,
3024 temp2
, ctx
->i32
, "");
3026 interp_param
= ac_build_gather_values(&ctx
->ac
, ij_out
, 2);
3029 intr_name
= interp_param
? "llvm.SI.fs.interp" : "llvm.SI.fs.constant";
3030 for (chan
= 0; chan
< 2; chan
++) {
3031 LLVMValueRef args
[4];
3032 LLVMValueRef llvm_chan
= LLVMConstInt(ctx
->i32
, chan
, false);
3034 args
[0] = llvm_chan
;
3035 args
[1] = attr_number
;
3036 args
[2] = ctx
->prim_mask
;
3037 args
[3] = interp_param
;
3038 result
[chan
] = ac_emit_llvm_intrinsic(&ctx
->ac
, intr_name
,
3039 ctx
->f32
, args
, args
[3] ? 4 : 3,
3040 AC_FUNC_ATTR_READNONE
);
3042 return ac_build_gather_values(&ctx
->ac
, result
, 2);
3046 visit_emit_vertex(struct nir_to_llvm_context
*ctx
,
3047 nir_intrinsic_instr
*instr
)
3049 LLVMValueRef gs_next_vertex
;
3050 LLVMValueRef can_emit
, kill
;
3051 LLVMValueRef args
[2];
3054 assert(instr
->const_index
[0] == 0);
3055 /* Write vertex attribute values to GSVS ring */
3056 gs_next_vertex
= LLVMBuildLoad(ctx
->builder
,
3057 ctx
->gs_next_vertex
,
3060 /* If this thread has already emitted the declared maximum number of
3061 * vertices, kill it: excessive vertex emissions are not supposed to
3062 * have any effect, and GS threads have no externally observable
3063 * effects other than emitting vertices.
3065 can_emit
= LLVMBuildICmp(ctx
->builder
, LLVMIntULT
, gs_next_vertex
,
3066 LLVMConstInt(ctx
->i32
, ctx
->gs_max_out_vertices
, false), "");
3068 kill
= LLVMBuildSelect(ctx
->builder
, can_emit
,
3069 LLVMConstReal(ctx
->f32
, 1.0f
),
3070 LLVMConstReal(ctx
->f32
, -1.0f
), "");
3071 ac_emit_llvm_intrinsic(&ctx
->ac
, "llvm.AMDGPU.kill",
3072 ctx
->voidt
, &kill
, 1, 0);
3074 /* loop num outputs */
3076 for (unsigned i
= 0; i
< RADEON_LLVM_MAX_OUTPUTS
; ++i
) {
3077 LLVMValueRef
*out_ptr
= &ctx
->outputs
[i
* 4];
3078 if (!(ctx
->output_mask
& (1ull << i
)))
3081 for (unsigned j
= 0; j
< 4; j
++) {
3082 LLVMValueRef out_val
= LLVMBuildLoad(ctx
->builder
,
3084 LLVMValueRef voffset
= LLVMConstInt(ctx
->i32
, (idx
* 4 + j
) * ctx
->gs_max_out_vertices
, false);
3085 voffset
= LLVMBuildAdd(ctx
->builder
, voffset
, gs_next_vertex
, "");
3086 voffset
= LLVMBuildMul(ctx
->builder
, voffset
, LLVMConstInt(ctx
->i32
, 4, false), "");
3088 out_val
= LLVMBuildBitCast(ctx
->builder
, out_val
, ctx
->i32
, "");
3090 build_tbuffer_store(ctx
, ctx
->gsvs_ring
,
3092 voffset
, ctx
->gs2vs_offset
, 0,
3093 V_008F0C_BUF_DATA_FORMAT_32
,
3094 V_008F0C_BUF_NUM_FORMAT_UINT
,
3100 gs_next_vertex
= LLVMBuildAdd(ctx
->builder
, gs_next_vertex
,
3102 LLVMBuildStore(ctx
->builder
, gs_next_vertex
, ctx
->gs_next_vertex
);
3103 args
[0] = LLVMConstInt(ctx
->i32
, SENDMSG_GS_OP_EMIT
| SENDMSG_GS
| (0 << 8), false);
3104 args
[1] = ctx
->gs_wave_id
;
3105 ac_emit_llvm_intrinsic(&ctx
->ac
, "llvm.SI.sendmsg",
3106 ctx
->voidt
, args
, 2, 0);
3110 visit_end_primitive(struct nir_to_llvm_context
*ctx
,
3111 nir_intrinsic_instr
*instr
)
3113 LLVMValueRef args
[2];
3115 assert(instr
->const_index
[0] == 0);
3116 args
[0] = LLVMConstInt(ctx
->i32
, SENDMSG_GS_OP_CUT
| SENDMSG_GS
| (0 << 8), false);
3117 args
[1] = ctx
->gs_wave_id
;
3119 ac_emit_llvm_intrinsic(&ctx
->ac
, "llvm.SI.sendmsg", ctx
->voidt
,
3123 static void visit_intrinsic(struct nir_to_llvm_context
*ctx
,
3124 nir_intrinsic_instr
*instr
)
3126 LLVMValueRef result
= NULL
;
3128 switch (instr
->intrinsic
) {
3129 case nir_intrinsic_load_work_group_id
: {
3130 result
= ctx
->workgroup_ids
;
3133 case nir_intrinsic_load_base_vertex
: {
3134 result
= ctx
->base_vertex
;
3137 case nir_intrinsic_load_vertex_id_zero_base
: {
3138 result
= ctx
->vertex_id
;
3141 case nir_intrinsic_load_local_invocation_id
: {
3142 result
= ctx
->local_invocation_ids
;
3145 case nir_intrinsic_load_base_instance
:
3146 result
= ctx
->start_instance
;
3148 case nir_intrinsic_load_invocation_id
:
3149 result
= ctx
->gs_invocation_id
;
3151 case nir_intrinsic_load_primitive_id
:
3152 if (ctx
->stage
== MESA_SHADER_GEOMETRY
)
3153 result
= ctx
->gs_prim_id
;
3155 fprintf(stderr
, "Unknown primitive id intrinsic: %d", ctx
->stage
);
3157 case nir_intrinsic_load_sample_id
:
3158 ctx
->shader_info
->fs
.force_persample
= true;
3159 result
= unpack_param(ctx
, ctx
->ancillary
, 8, 4);
3161 case nir_intrinsic_load_sample_pos
:
3162 ctx
->shader_info
->fs
.force_persample
= true;
3163 result
= load_sample_pos(ctx
);
3165 case nir_intrinsic_load_front_face
:
3166 result
= ctx
->front_face
;
3168 case nir_intrinsic_load_instance_id
:
3169 result
= ctx
->instance_id
;
3170 ctx
->shader_info
->vs
.vgpr_comp_cnt
= MAX2(3,
3171 ctx
->shader_info
->vs
.vgpr_comp_cnt
);
3173 case nir_intrinsic_load_num_work_groups
:
3174 result
= ctx
->num_work_groups
;
3176 case nir_intrinsic_load_local_invocation_index
:
3177 result
= visit_load_local_invocation_index(ctx
);
3179 case nir_intrinsic_load_push_constant
:
3180 result
= visit_load_push_constant(ctx
, instr
);
3182 case nir_intrinsic_vulkan_resource_index
:
3183 result
= visit_vulkan_resource_index(ctx
, instr
);
3185 case nir_intrinsic_store_ssbo
:
3186 visit_store_ssbo(ctx
, instr
);
3188 case nir_intrinsic_load_ssbo
:
3189 result
= visit_load_buffer(ctx
, instr
);
3191 case nir_intrinsic_ssbo_atomic_add
:
3192 case nir_intrinsic_ssbo_atomic_imin
:
3193 case nir_intrinsic_ssbo_atomic_umin
:
3194 case nir_intrinsic_ssbo_atomic_imax
:
3195 case nir_intrinsic_ssbo_atomic_umax
:
3196 case nir_intrinsic_ssbo_atomic_and
:
3197 case nir_intrinsic_ssbo_atomic_or
:
3198 case nir_intrinsic_ssbo_atomic_xor
:
3199 case nir_intrinsic_ssbo_atomic_exchange
:
3200 case nir_intrinsic_ssbo_atomic_comp_swap
:
3201 result
= visit_atomic_ssbo(ctx
, instr
);
3203 case nir_intrinsic_load_ubo
:
3204 result
= visit_load_ubo_buffer(ctx
, instr
);
3206 case nir_intrinsic_get_buffer_size
:
3207 result
= visit_get_buffer_size(ctx
, instr
);
3209 case nir_intrinsic_load_var
:
3210 result
= visit_load_var(ctx
, instr
);
3212 case nir_intrinsic_store_var
:
3213 visit_store_var(ctx
, instr
);
3215 case nir_intrinsic_image_load
:
3216 result
= visit_image_load(ctx
, instr
);
3218 case nir_intrinsic_image_store
:
3219 visit_image_store(ctx
, instr
);
3221 case nir_intrinsic_image_atomic_add
:
3222 case nir_intrinsic_image_atomic_min
:
3223 case nir_intrinsic_image_atomic_max
:
3224 case nir_intrinsic_image_atomic_and
:
3225 case nir_intrinsic_image_atomic_or
:
3226 case nir_intrinsic_image_atomic_xor
:
3227 case nir_intrinsic_image_atomic_exchange
:
3228 case nir_intrinsic_image_atomic_comp_swap
:
3229 result
= visit_image_atomic(ctx
, instr
);
3231 case nir_intrinsic_image_size
:
3232 result
= visit_image_size(ctx
, instr
);
3234 case nir_intrinsic_discard
:
3235 ctx
->shader_info
->fs
.can_discard
= true;
3236 ac_emit_llvm_intrinsic(&ctx
->ac
, "llvm.AMDGPU.kilp",
3240 case nir_intrinsic_discard_if
:
3241 emit_discard_if(ctx
, instr
);
3243 case nir_intrinsic_memory_barrier
:
3246 case nir_intrinsic_barrier
:
3249 case nir_intrinsic_var_atomic_add
:
3250 case nir_intrinsic_var_atomic_imin
:
3251 case nir_intrinsic_var_atomic_umin
:
3252 case nir_intrinsic_var_atomic_imax
:
3253 case nir_intrinsic_var_atomic_umax
:
3254 case nir_intrinsic_var_atomic_and
:
3255 case nir_intrinsic_var_atomic_or
:
3256 case nir_intrinsic_var_atomic_xor
:
3257 case nir_intrinsic_var_atomic_exchange
:
3258 case nir_intrinsic_var_atomic_comp_swap
:
3259 result
= visit_var_atomic(ctx
, instr
);
3261 case nir_intrinsic_interp_var_at_centroid
:
3262 case nir_intrinsic_interp_var_at_sample
:
3263 case nir_intrinsic_interp_var_at_offset
:
3264 result
= visit_interp(ctx
, instr
);
3266 case nir_intrinsic_emit_vertex
:
3267 visit_emit_vertex(ctx
, instr
);
3269 case nir_intrinsic_end_primitive
:
3270 visit_end_primitive(ctx
, instr
);
3273 fprintf(stderr
, "Unknown intrinsic: ");
3274 nir_print_instr(&instr
->instr
, stderr
);
3275 fprintf(stderr
, "\n");
3279 _mesa_hash_table_insert(ctx
->defs
, &instr
->dest
.ssa
, result
);
3283 static LLVMValueRef
get_sampler_desc(struct nir_to_llvm_context
*ctx
,
3284 nir_deref_var
*deref
,
3285 enum desc_type desc_type
)
3287 unsigned desc_set
= deref
->var
->data
.descriptor_set
;
3288 LLVMValueRef list
= ctx
->descriptor_sets
[desc_set
];
3289 struct radv_descriptor_set_layout
*layout
= ctx
->options
->layout
->set
[desc_set
].layout
;
3290 struct radv_descriptor_set_binding_layout
*binding
= layout
->binding
+ deref
->var
->data
.binding
;
3291 unsigned offset
= binding
->offset
;
3292 unsigned stride
= binding
->size
;
3294 LLVMBuilderRef builder
= ctx
->builder
;
3296 LLVMValueRef index
= NULL
;
3298 assert(deref
->var
->data
.binding
< layout
->binding_count
);
3300 switch (desc_type
) {
3312 if (binding
->type
== VK_DESCRIPTOR_TYPE_COMBINED_IMAGE_SAMPLER
)
3322 unreachable("invalid desc_type\n");
3325 if (deref
->deref
.child
) {
3326 nir_deref_array
*child
= (nir_deref_array
*)deref
->deref
.child
;
3328 assert(child
->deref_array_type
!= nir_deref_array_type_wildcard
);
3329 offset
+= child
->base_offset
* stride
;
3330 if (child
->deref_array_type
== nir_deref_array_type_indirect
) {
3331 index
= get_src(ctx
, child
->indirect
);
3335 assert(stride
% type_size
== 0);
3338 index
= ctx
->i32zero
;
3340 index
= LLVMBuildMul(builder
, index
, LLVMConstInt(ctx
->i32
, stride
/ type_size
, 0), "");
3342 list
= build_gep0(ctx
, list
, LLVMConstInt(ctx
->i32
, offset
, 0));
3343 list
= LLVMBuildPointerCast(builder
, list
, const_array(type
, 0), "");
3345 return build_indexed_load_const(ctx
, list
, index
);
3348 static void set_tex_fetch_args(struct nir_to_llvm_context
*ctx
,
3349 struct ac_tex_info
*tinfo
,
3350 nir_tex_instr
*instr
,
3352 LLVMValueRef res_ptr
, LLVMValueRef samp_ptr
,
3353 LLVMValueRef
*param
, unsigned count
,
3357 unsigned is_rect
= 0;
3358 bool da
= instr
->is_array
|| instr
->sampler_dim
== GLSL_SAMPLER_DIM_CUBE
;
3360 if (op
== nir_texop_lod
)
3362 /* Pad to power of two vector */
3363 while (count
< util_next_power_of_two(count
))
3364 param
[count
++] = LLVMGetUndef(ctx
->i32
);
3367 tinfo
->args
[0] = ac_build_gather_values(&ctx
->ac
, param
, count
);
3369 tinfo
->args
[0] = param
[0];
3371 tinfo
->args
[1] = res_ptr
;
3374 if (op
== nir_texop_txf
||
3375 op
== nir_texop_txf_ms
||
3376 op
== nir_texop_query_levels
||
3377 op
== nir_texop_texture_samples
||
3378 op
== nir_texop_txs
)
3379 tinfo
->dst_type
= ctx
->v4i32
;
3381 tinfo
->dst_type
= ctx
->v4f32
;
3382 tinfo
->args
[num_args
++] = samp_ptr
;
3385 if (instr
->sampler_dim
== GLSL_SAMPLER_DIM_BUF
&& op
== nir_texop_txf
) {
3386 tinfo
->args
[0] = res_ptr
;
3387 tinfo
->args
[1] = LLVMConstInt(ctx
->i32
, 0, false);
3388 tinfo
->args
[2] = param
[0];
3389 tinfo
->arg_count
= 3;
3393 tinfo
->args
[num_args
++] = LLVMConstInt(ctx
->i32
, dmask
, 0);
3394 tinfo
->args
[num_args
++] = LLVMConstInt(ctx
->i32
, is_rect
, 0); /* unorm */
3395 tinfo
->args
[num_args
++] = LLVMConstInt(ctx
->i32
, 0, 0); /* r128 */
3396 tinfo
->args
[num_args
++] = LLVMConstInt(ctx
->i32
, da
? 1 : 0, 0);
3397 tinfo
->args
[num_args
++] = LLVMConstInt(ctx
->i32
, 0, 0); /* glc */
3398 tinfo
->args
[num_args
++] = LLVMConstInt(ctx
->i32
, 0, 0); /* slc */
3399 tinfo
->args
[num_args
++] = LLVMConstInt(ctx
->i32
, 0, 0); /* tfe */
3400 tinfo
->args
[num_args
++] = LLVMConstInt(ctx
->i32
, 0, 0); /* lwe */
3402 tinfo
->arg_count
= num_args
;
3405 /* Disable anisotropic filtering if BASE_LEVEL == LAST_LEVEL.
3408 * If BASE_LEVEL == LAST_LEVEL, the shader must disable anisotropic
3409 * filtering manually. The driver sets img7 to a mask clearing
3410 * MAX_ANISO_RATIO if BASE_LEVEL == LAST_LEVEL. The shader must do:
3411 * s_and_b32 samp0, samp0, img7
3414 * The ANISO_OVERRIDE sampler field enables this fix in TA.
3416 static LLVMValueRef
sici_fix_sampler_aniso(struct nir_to_llvm_context
*ctx
,
3417 LLVMValueRef res
, LLVMValueRef samp
)
3419 LLVMBuilderRef builder
= ctx
->builder
;
3420 LLVMValueRef img7
, samp0
;
3422 if (ctx
->options
->chip_class
>= VI
)
3425 img7
= LLVMBuildExtractElement(builder
, res
,
3426 LLVMConstInt(ctx
->i32
, 7, 0), "");
3427 samp0
= LLVMBuildExtractElement(builder
, samp
,
3428 LLVMConstInt(ctx
->i32
, 0, 0), "");
3429 samp0
= LLVMBuildAnd(builder
, samp0
, img7
, "");
3430 return LLVMBuildInsertElement(builder
, samp
, samp0
,
3431 LLVMConstInt(ctx
->i32
, 0, 0), "");
3434 static void tex_fetch_ptrs(struct nir_to_llvm_context
*ctx
,
3435 nir_tex_instr
*instr
,
3436 LLVMValueRef
*res_ptr
, LLVMValueRef
*samp_ptr
,
3437 LLVMValueRef
*fmask_ptr
)
3439 if (instr
->sampler_dim
== GLSL_SAMPLER_DIM_BUF
)
3440 *res_ptr
= get_sampler_desc(ctx
, instr
->texture
, DESC_BUFFER
);
3442 *res_ptr
= get_sampler_desc(ctx
, instr
->texture
, DESC_IMAGE
);
3445 *samp_ptr
= get_sampler_desc(ctx
, instr
->sampler
, DESC_SAMPLER
);
3447 *samp_ptr
= get_sampler_desc(ctx
, instr
->texture
, DESC_SAMPLER
);
3448 if (instr
->sampler_dim
< GLSL_SAMPLER_DIM_RECT
)
3449 *samp_ptr
= sici_fix_sampler_aniso(ctx
, *res_ptr
, *samp_ptr
);
3451 if (fmask_ptr
&& !instr
->sampler
&& (instr
->op
== nir_texop_txf_ms
||
3452 instr
->op
== nir_texop_samples_identical
))
3453 *fmask_ptr
= get_sampler_desc(ctx
, instr
->texture
, DESC_FMASK
);
3456 static void visit_tex(struct nir_to_llvm_context
*ctx
, nir_tex_instr
*instr
)
3458 LLVMValueRef result
= NULL
;
3459 struct ac_tex_info tinfo
= { 0 };
3460 unsigned dmask
= 0xf;
3461 LLVMValueRef address
[16];
3462 LLVMValueRef coords
[5];
3463 LLVMValueRef coord
= NULL
, lod
= NULL
, comparator
= NULL
;
3464 LLVMValueRef bias
= NULL
, offsets
= NULL
;
3465 LLVMValueRef res_ptr
, samp_ptr
, fmask_ptr
= NULL
, sample_index
= NULL
;
3466 LLVMValueRef ddx
= NULL
, ddy
= NULL
;
3467 LLVMValueRef derivs
[6];
3468 unsigned chan
, count
= 0;
3469 unsigned const_src
= 0, num_deriv_comp
= 0;
3471 tex_fetch_ptrs(ctx
, instr
, &res_ptr
, &samp_ptr
, &fmask_ptr
);
3473 for (unsigned i
= 0; i
< instr
->num_srcs
; i
++) {
3474 switch (instr
->src
[i
].src_type
) {
3475 case nir_tex_src_coord
:
3476 coord
= get_src(ctx
, instr
->src
[i
].src
);
3478 case nir_tex_src_projector
:
3480 case nir_tex_src_comparator
:
3481 comparator
= get_src(ctx
, instr
->src
[i
].src
);
3483 case nir_tex_src_offset
:
3484 offsets
= get_src(ctx
, instr
->src
[i
].src
);
3487 case nir_tex_src_bias
:
3488 bias
= get_src(ctx
, instr
->src
[i
].src
);
3490 case nir_tex_src_lod
:
3491 lod
= get_src(ctx
, instr
->src
[i
].src
);
3493 case nir_tex_src_ms_index
:
3494 sample_index
= get_src(ctx
, instr
->src
[i
].src
);
3496 case nir_tex_src_ms_mcs
:
3498 case nir_tex_src_ddx
:
3499 ddx
= get_src(ctx
, instr
->src
[i
].src
);
3500 num_deriv_comp
= instr
->src
[i
].src
.ssa
->num_components
;
3502 case nir_tex_src_ddy
:
3503 ddy
= get_src(ctx
, instr
->src
[i
].src
);
3505 case nir_tex_src_texture_offset
:
3506 case nir_tex_src_sampler_offset
:
3507 case nir_tex_src_plane
:
3513 if (instr
->op
== nir_texop_txs
&& instr
->sampler_dim
== GLSL_SAMPLER_DIM_BUF
) {
3514 result
= get_buffer_size(ctx
, res_ptr
, false);
3518 if (instr
->op
== nir_texop_texture_samples
) {
3519 LLVMValueRef res
, samples
, is_msaa
;
3520 res
= LLVMBuildBitCast(ctx
->builder
, res_ptr
, ctx
->v8i32
, "");
3521 samples
= LLVMBuildExtractElement(ctx
->builder
, res
,
3522 LLVMConstInt(ctx
->i32
, 3, false), "");
3523 is_msaa
= LLVMBuildLShr(ctx
->builder
, samples
,
3524 LLVMConstInt(ctx
->i32
, 28, false), "");
3525 is_msaa
= LLVMBuildAnd(ctx
->builder
, is_msaa
,
3526 LLVMConstInt(ctx
->i32
, 0xe, false), "");
3527 is_msaa
= LLVMBuildICmp(ctx
->builder
, LLVMIntEQ
, is_msaa
,
3528 LLVMConstInt(ctx
->i32
, 0xe, false), "");
3530 samples
= LLVMBuildLShr(ctx
->builder
, samples
,
3531 LLVMConstInt(ctx
->i32
, 16, false), "");
3532 samples
= LLVMBuildAnd(ctx
->builder
, samples
,
3533 LLVMConstInt(ctx
->i32
, 0xf, false), "");
3534 samples
= LLVMBuildShl(ctx
->builder
, ctx
->i32one
,
3536 samples
= LLVMBuildSelect(ctx
->builder
, is_msaa
, samples
,
3543 for (chan
= 0; chan
< instr
->coord_components
; chan
++)
3544 coords
[chan
] = llvm_extract_elem(ctx
, coord
, chan
);
3546 if (offsets
&& instr
->op
!= nir_texop_txf
) {
3547 LLVMValueRef offset
[3], pack
;
3548 for (chan
= 0; chan
< 3; ++chan
)
3549 offset
[chan
] = ctx
->i32zero
;
3551 tinfo
.has_offset
= true;
3552 for (chan
= 0; chan
< get_llvm_num_components(offsets
); chan
++) {
3553 offset
[chan
] = llvm_extract_elem(ctx
, offsets
, chan
);
3554 offset
[chan
] = LLVMBuildAnd(ctx
->builder
, offset
[chan
],
3555 LLVMConstInt(ctx
->i32
, 0x3f, false), "");
3557 offset
[chan
] = LLVMBuildShl(ctx
->builder
, offset
[chan
],
3558 LLVMConstInt(ctx
->i32
, chan
* 8, false), "");
3560 pack
= LLVMBuildOr(ctx
->builder
, offset
[0], offset
[1], "");
3561 pack
= LLVMBuildOr(ctx
->builder
, pack
, offset
[2], "");
3562 address
[count
++] = pack
;
3565 /* pack LOD bias value */
3566 if (instr
->op
== nir_texop_txb
&& bias
) {
3567 address
[count
++] = bias
;
3570 /* Pack depth comparison value */
3571 if (instr
->is_shadow
&& comparator
) {
3572 address
[count
++] = llvm_extract_elem(ctx
, comparator
, 0);
3575 /* pack derivatives */
3577 switch (instr
->sampler_dim
) {
3578 case GLSL_SAMPLER_DIM_3D
:
3579 case GLSL_SAMPLER_DIM_CUBE
:
3582 case GLSL_SAMPLER_DIM_2D
:
3586 case GLSL_SAMPLER_DIM_1D
:
3591 for (unsigned i
= 0; i
< num_deriv_comp
; i
++) {
3592 derivs
[i
* 2] = to_float(ctx
, llvm_extract_elem(ctx
, ddx
, i
));
3593 derivs
[i
* 2 + 1] = to_float(ctx
, llvm_extract_elem(ctx
, ddy
, i
));
3597 if (instr
->sampler_dim
== GLSL_SAMPLER_DIM_CUBE
&& coord
) {
3598 for (chan
= 0; chan
< instr
->coord_components
; chan
++)
3599 coords
[chan
] = to_float(ctx
, coords
[chan
]);
3600 if (instr
->coord_components
== 3)
3601 coords
[3] = LLVMGetUndef(ctx
->f32
);
3602 ac_prepare_cube_coords(&ctx
->ac
,
3603 instr
->op
== nir_texop_txd
, instr
->is_array
,
3610 for (unsigned i
= 0; i
< num_deriv_comp
* 2; i
++)
3611 address
[count
++] = derivs
[i
];
3614 /* Pack texture coordinates */
3616 address
[count
++] = coords
[0];
3617 if (instr
->coord_components
> 1)
3618 address
[count
++] = coords
[1];
3619 if (instr
->coord_components
> 2) {
3620 /* This seems like a bit of a hack - but it passes Vulkan CTS with it */
3621 if (instr
->sampler_dim
!= GLSL_SAMPLER_DIM_3D
&& instr
->op
!= nir_texop_txf
) {
3622 coords
[2] = to_float(ctx
, coords
[2]);
3623 coords
[2] = ac_emit_llvm_intrinsic(&ctx
->ac
, "llvm.rint.f32", ctx
->f32
, &coords
[2],
3625 coords
[2] = to_integer(ctx
, coords
[2]);
3627 address
[count
++] = coords
[2];
3632 if ((instr
->op
== nir_texop_txl
|| instr
->op
== nir_texop_txf
) && lod
) {
3633 address
[count
++] = lod
;
3634 } else if (instr
->op
== nir_texop_txf_ms
&& sample_index
) {
3635 address
[count
++] = sample_index
;
3636 } else if(instr
->op
== nir_texop_txs
) {
3639 address
[count
++] = lod
;
3641 address
[count
++] = ctx
->i32zero
;
3644 for (chan
= 0; chan
< count
; chan
++) {
3645 address
[chan
] = LLVMBuildBitCast(ctx
->builder
,
3646 address
[chan
], ctx
->i32
, "");
3649 if (instr
->op
== nir_texop_samples_identical
) {
3650 LLVMValueRef txf_address
[4];
3651 struct ac_tex_info txf_info
= { 0 };
3652 unsigned txf_count
= count
;
3653 memcpy(txf_address
, address
, sizeof(txf_address
));
3655 if (!instr
->is_array
)
3656 txf_address
[2] = ctx
->i32zero
;
3657 txf_address
[3] = ctx
->i32zero
;
3659 set_tex_fetch_args(ctx
, &txf_info
, instr
, nir_texop_txf
,
3661 txf_address
, txf_count
, 0xf);
3663 result
= build_tex_intrinsic(ctx
, instr
, &txf_info
);
3665 result
= LLVMBuildExtractElement(ctx
->builder
, result
, ctx
->i32zero
, "");
3666 result
= emit_int_cmp(ctx
, LLVMIntEQ
, result
, ctx
->i32zero
);
3670 /* Adjust the sample index according to FMASK.
3672 * For uncompressed MSAA surfaces, FMASK should return 0x76543210,
3673 * which is the identity mapping. Each nibble says which physical sample
3674 * should be fetched to get that sample.
3676 * For example, 0x11111100 means there are only 2 samples stored and
3677 * the second sample covers 3/4 of the pixel. When reading samples 0
3678 * and 1, return physical sample 0 (determined by the first two 0s
3679 * in FMASK), otherwise return physical sample 1.
3681 * The sample index should be adjusted as follows:
3682 * sample_index = (fmask >> (sample_index * 4)) & 0xF;
3684 if (instr
->sampler_dim
== GLSL_SAMPLER_DIM_MS
) {
3685 LLVMValueRef txf_address
[4];
3686 struct ac_tex_info txf_info
= { 0 };
3687 unsigned txf_count
= count
;
3688 memcpy(txf_address
, address
, sizeof(txf_address
));
3690 if (!instr
->is_array
)
3691 txf_address
[2] = ctx
->i32zero
;
3692 txf_address
[3] = ctx
->i32zero
;
3694 set_tex_fetch_args(ctx
, &txf_info
, instr
, nir_texop_txf
,
3696 txf_address
, txf_count
, 0xf);
3698 result
= build_tex_intrinsic(ctx
, instr
, &txf_info
);
3699 LLVMValueRef four
= LLVMConstInt(ctx
->i32
, 4, false);
3700 LLVMValueRef F
= LLVMConstInt(ctx
->i32
, 0xf, false);
3702 LLVMValueRef fmask
= LLVMBuildExtractElement(ctx
->builder
,
3706 unsigned sample_chan
= instr
->is_array
? 3 : 2;
3708 LLVMValueRef sample_index4
=
3709 LLVMBuildMul(ctx
->builder
, address
[sample_chan
], four
, "");
3710 LLVMValueRef shifted_fmask
=
3711 LLVMBuildLShr(ctx
->builder
, fmask
, sample_index4
, "");
3712 LLVMValueRef final_sample
=
3713 LLVMBuildAnd(ctx
->builder
, shifted_fmask
, F
, "");
3715 /* Don't rewrite the sample index if WORD1.DATA_FORMAT of the FMASK
3716 * resource descriptor is 0 (invalid),
3718 LLVMValueRef fmask_desc
=
3719 LLVMBuildBitCast(ctx
->builder
, fmask_ptr
,
3722 LLVMValueRef fmask_word1
=
3723 LLVMBuildExtractElement(ctx
->builder
, fmask_desc
,
3726 LLVMValueRef word1_is_nonzero
=
3727 LLVMBuildICmp(ctx
->builder
, LLVMIntNE
,
3728 fmask_word1
, ctx
->i32zero
, "");
3730 /* Replace the MSAA sample index. */
3731 address
[sample_chan
] =
3732 LLVMBuildSelect(ctx
->builder
, word1_is_nonzero
,
3733 final_sample
, address
[sample_chan
], "");
3736 if (offsets
&& instr
->op
== nir_texop_txf
) {
3737 nir_const_value
*const_offset
=
3738 nir_src_as_const_value(instr
->src
[const_src
].src
);
3739 int num_offsets
= instr
->src
[const_src
].src
.ssa
->num_components
;
3740 assert(const_offset
);
3741 num_offsets
= MIN2(num_offsets
, instr
->coord_components
);
3742 if (num_offsets
> 2)
3743 address
[2] = LLVMBuildAdd(ctx
->builder
,
3744 address
[2], LLVMConstInt(ctx
->i32
, const_offset
->i32
[2], false), "");
3745 if (num_offsets
> 1)
3746 address
[1] = LLVMBuildAdd(ctx
->builder
,
3747 address
[1], LLVMConstInt(ctx
->i32
, const_offset
->i32
[1], false), "");
3748 address
[0] = LLVMBuildAdd(ctx
->builder
,
3749 address
[0], LLVMConstInt(ctx
->i32
, const_offset
->i32
[0], false), "");
3753 /* TODO TG4 support */
3754 if (instr
->op
== nir_texop_tg4
) {
3755 if (instr
->is_shadow
)
3758 dmask
= 1 << instr
->component
;
3760 set_tex_fetch_args(ctx
, &tinfo
, instr
, instr
->op
,
3761 res_ptr
, samp_ptr
, address
, count
, dmask
);
3763 result
= build_tex_intrinsic(ctx
, instr
, &tinfo
);
3765 if (instr
->op
== nir_texop_query_levels
)
3766 result
= LLVMBuildExtractElement(ctx
->builder
, result
, LLVMConstInt(ctx
->i32
, 3, false), "");
3767 else if (instr
->is_shadow
&& instr
->op
!= nir_texop_txs
&& instr
->op
!= nir_texop_lod
&& instr
->op
!= nir_texop_tg4
)
3768 result
= LLVMBuildExtractElement(ctx
->builder
, result
, ctx
->i32zero
, "");
3769 else if (instr
->op
== nir_texop_txs
&&
3770 instr
->sampler_dim
== GLSL_SAMPLER_DIM_CUBE
&&
3772 LLVMValueRef two
= LLVMConstInt(ctx
->i32
, 2, false);
3773 LLVMValueRef six
= LLVMConstInt(ctx
->i32
, 6, false);
3774 LLVMValueRef z
= LLVMBuildExtractElement(ctx
->builder
, result
, two
, "");
3775 z
= LLVMBuildSDiv(ctx
->builder
, z
, six
, "");
3776 result
= LLVMBuildInsertElement(ctx
->builder
, result
, z
, two
, "");
3777 } else if (instr
->dest
.ssa
.num_components
!= 4)
3778 result
= trim_vector(ctx
, result
, instr
->dest
.ssa
.num_components
);
3782 assert(instr
->dest
.is_ssa
);
3783 result
= to_integer(ctx
, result
);
3784 _mesa_hash_table_insert(ctx
->defs
, &instr
->dest
.ssa
, result
);
3789 static void visit_phi(struct nir_to_llvm_context
*ctx
, nir_phi_instr
*instr
)
3791 LLVMTypeRef type
= get_def_type(ctx
, &instr
->dest
.ssa
);
3792 LLVMValueRef result
= LLVMBuildPhi(ctx
->builder
, type
, "");
3794 _mesa_hash_table_insert(ctx
->defs
, &instr
->dest
.ssa
, result
);
3795 _mesa_hash_table_insert(ctx
->phis
, instr
, result
);
3798 static void visit_post_phi(struct nir_to_llvm_context
*ctx
,
3799 nir_phi_instr
*instr
,
3800 LLVMValueRef llvm_phi
)
3802 nir_foreach_phi_src(src
, instr
) {
3803 LLVMBasicBlockRef block
= get_block(ctx
, src
->pred
);
3804 LLVMValueRef llvm_src
= get_src(ctx
, src
->src
);
3806 LLVMAddIncoming(llvm_phi
, &llvm_src
, &block
, 1);
3810 static void phi_post_pass(struct nir_to_llvm_context
*ctx
)
3812 struct hash_entry
*entry
;
3813 hash_table_foreach(ctx
->phis
, entry
) {
3814 visit_post_phi(ctx
, (nir_phi_instr
*)entry
->key
,
3815 (LLVMValueRef
)entry
->data
);
3820 static void visit_ssa_undef(struct nir_to_llvm_context
*ctx
,
3821 nir_ssa_undef_instr
*instr
)
3823 unsigned num_components
= instr
->def
.num_components
;
3826 if (num_components
== 1)
3827 undef
= LLVMGetUndef(ctx
->i32
);
3829 undef
= LLVMGetUndef(LLVMVectorType(ctx
->i32
, num_components
));
3831 _mesa_hash_table_insert(ctx
->defs
, &instr
->def
, undef
);
3834 static void visit_jump(struct nir_to_llvm_context
*ctx
,
3835 nir_jump_instr
*instr
)
3837 switch (instr
->type
) {
3838 case nir_jump_break
:
3839 LLVMBuildBr(ctx
->builder
, ctx
->break_block
);
3840 LLVMClearInsertionPosition(ctx
->builder
);
3842 case nir_jump_continue
:
3843 LLVMBuildBr(ctx
->builder
, ctx
->continue_block
);
3844 LLVMClearInsertionPosition(ctx
->builder
);
3847 fprintf(stderr
, "Unknown NIR jump instr: ");
3848 nir_print_instr(&instr
->instr
, stderr
);
3849 fprintf(stderr
, "\n");
3854 static void visit_cf_list(struct nir_to_llvm_context
*ctx
,
3855 struct exec_list
*list
);
3857 static void visit_block(struct nir_to_llvm_context
*ctx
, nir_block
*block
)
3859 LLVMBasicBlockRef llvm_block
= LLVMGetInsertBlock(ctx
->builder
);
3860 nir_foreach_instr(instr
, block
)
3862 switch (instr
->type
) {
3863 case nir_instr_type_alu
:
3864 visit_alu(ctx
, nir_instr_as_alu(instr
));
3866 case nir_instr_type_load_const
:
3867 visit_load_const(ctx
, nir_instr_as_load_const(instr
));
3869 case nir_instr_type_intrinsic
:
3870 visit_intrinsic(ctx
, nir_instr_as_intrinsic(instr
));
3872 case nir_instr_type_tex
:
3873 visit_tex(ctx
, nir_instr_as_tex(instr
));
3875 case nir_instr_type_phi
:
3876 visit_phi(ctx
, nir_instr_as_phi(instr
));
3878 case nir_instr_type_ssa_undef
:
3879 visit_ssa_undef(ctx
, nir_instr_as_ssa_undef(instr
));
3881 case nir_instr_type_jump
:
3882 visit_jump(ctx
, nir_instr_as_jump(instr
));
3885 fprintf(stderr
, "Unknown NIR instr type: ");
3886 nir_print_instr(instr
, stderr
);
3887 fprintf(stderr
, "\n");
3892 _mesa_hash_table_insert(ctx
->defs
, block
, llvm_block
);
3895 static void visit_if(struct nir_to_llvm_context
*ctx
, nir_if
*if_stmt
)
3897 LLVMValueRef value
= get_src(ctx
, if_stmt
->condition
);
3899 LLVMBasicBlockRef merge_block
=
3900 LLVMAppendBasicBlockInContext(ctx
->context
, ctx
->main_function
, "");
3901 LLVMBasicBlockRef if_block
=
3902 LLVMAppendBasicBlockInContext(ctx
->context
, ctx
->main_function
, "");
3903 LLVMBasicBlockRef else_block
= merge_block
;
3904 if (!exec_list_is_empty(&if_stmt
->else_list
))
3905 else_block
= LLVMAppendBasicBlockInContext(
3906 ctx
->context
, ctx
->main_function
, "");
3908 LLVMValueRef cond
= LLVMBuildICmp(ctx
->builder
, LLVMIntNE
, value
,
3909 LLVMConstInt(ctx
->i32
, 0, false), "");
3910 LLVMBuildCondBr(ctx
->builder
, cond
, if_block
, else_block
);
3912 LLVMPositionBuilderAtEnd(ctx
->builder
, if_block
);
3913 visit_cf_list(ctx
, &if_stmt
->then_list
);
3914 if (LLVMGetInsertBlock(ctx
->builder
))
3915 LLVMBuildBr(ctx
->builder
, merge_block
);
3917 if (!exec_list_is_empty(&if_stmt
->else_list
)) {
3918 LLVMPositionBuilderAtEnd(ctx
->builder
, else_block
);
3919 visit_cf_list(ctx
, &if_stmt
->else_list
);
3920 if (LLVMGetInsertBlock(ctx
->builder
))
3921 LLVMBuildBr(ctx
->builder
, merge_block
);
3924 LLVMPositionBuilderAtEnd(ctx
->builder
, merge_block
);
3927 static void visit_loop(struct nir_to_llvm_context
*ctx
, nir_loop
*loop
)
3929 LLVMBasicBlockRef continue_parent
= ctx
->continue_block
;
3930 LLVMBasicBlockRef break_parent
= ctx
->break_block
;
3932 ctx
->continue_block
=
3933 LLVMAppendBasicBlockInContext(ctx
->context
, ctx
->main_function
, "");
3935 LLVMAppendBasicBlockInContext(ctx
->context
, ctx
->main_function
, "");
3937 LLVMBuildBr(ctx
->builder
, ctx
->continue_block
);
3938 LLVMPositionBuilderAtEnd(ctx
->builder
, ctx
->continue_block
);
3939 visit_cf_list(ctx
, &loop
->body
);
3941 if (LLVMGetInsertBlock(ctx
->builder
))
3942 LLVMBuildBr(ctx
->builder
, ctx
->continue_block
);
3943 LLVMPositionBuilderAtEnd(ctx
->builder
, ctx
->break_block
);
3945 ctx
->continue_block
= continue_parent
;
3946 ctx
->break_block
= break_parent
;
3949 static void visit_cf_list(struct nir_to_llvm_context
*ctx
,
3950 struct exec_list
*list
)
3952 foreach_list_typed(nir_cf_node
, node
, node
, list
)
3954 switch (node
->type
) {
3955 case nir_cf_node_block
:
3956 visit_block(ctx
, nir_cf_node_as_block(node
));
3959 case nir_cf_node_if
:
3960 visit_if(ctx
, nir_cf_node_as_if(node
));
3963 case nir_cf_node_loop
:
3964 visit_loop(ctx
, nir_cf_node_as_loop(node
));
3974 handle_vs_input_decl(struct nir_to_llvm_context
*ctx
,
3975 struct nir_variable
*variable
)
3977 LLVMValueRef t_list_ptr
= ctx
->vertex_buffers
;
3978 LLVMValueRef t_offset
;
3979 LLVMValueRef t_list
;
3980 LLVMValueRef args
[3];
3982 LLVMValueRef buffer_index
;
3983 int index
= variable
->data
.location
- VERT_ATTRIB_GENERIC0
;
3984 int idx
= variable
->data
.location
;
3985 unsigned attrib_count
= glsl_count_attribute_slots(variable
->type
, true);
3987 variable
->data
.driver_location
= idx
* 4;
3989 if (ctx
->options
->key
.vs
.instance_rate_inputs
& (1u << index
)) {
3990 buffer_index
= LLVMBuildAdd(ctx
->builder
, ctx
->instance_id
,
3991 ctx
->start_instance
, "");
3992 ctx
->shader_info
->vs
.vgpr_comp_cnt
= MAX2(3,
3993 ctx
->shader_info
->vs
.vgpr_comp_cnt
);
3995 buffer_index
= LLVMBuildAdd(ctx
->builder
, ctx
->vertex_id
,
3996 ctx
->base_vertex
, "");
3998 for (unsigned i
= 0; i
< attrib_count
; ++i
, ++idx
) {
3999 t_offset
= LLVMConstInt(ctx
->i32
, index
+ i
, false);
4001 t_list
= build_indexed_load_const(ctx
, t_list_ptr
, t_offset
);
4003 args
[1] = LLVMConstInt(ctx
->i32
, 0, false);
4004 args
[2] = buffer_index
;
4005 input
= ac_emit_llvm_intrinsic(&ctx
->ac
,
4006 "llvm.SI.vs.load.input", ctx
->v4f32
, args
, 3,
4007 AC_FUNC_ATTR_READNONE
| AC_FUNC_ATTR_NOUNWIND
);
4009 for (unsigned chan
= 0; chan
< 4; chan
++) {
4010 LLVMValueRef llvm_chan
= LLVMConstInt(ctx
->i32
, chan
, false);
4011 ctx
->inputs
[radeon_llvm_reg_index_soa(idx
, chan
)] =
4012 to_integer(ctx
, LLVMBuildExtractElement(ctx
->builder
,
4013 input
, llvm_chan
, ""));
4019 static void interp_fs_input(struct nir_to_llvm_context
*ctx
,
4021 LLVMValueRef interp_param
,
4022 LLVMValueRef prim_mask
,
4023 LLVMValueRef result
[4])
4025 const char *intr_name
;
4026 LLVMValueRef attr_number
;
4029 attr_number
= LLVMConstInt(ctx
->i32
, attr
, false);
4031 /* fs.constant returns the param from the middle vertex, so it's not
4032 * really useful for flat shading. It's meant to be used for custom
4033 * interpolation (but the intrinsic can't fetch from the other two
4036 * Luckily, it doesn't matter, because we rely on the FLAT_SHADE state
4037 * to do the right thing. The only reason we use fs.constant is that
4038 * fs.interp cannot be used on integers, because they can be equal
4041 intr_name
= interp_param
? "llvm.SI.fs.interp" : "llvm.SI.fs.constant";
4043 for (chan
= 0; chan
< 4; chan
++) {
4044 LLVMValueRef args
[4];
4045 LLVMValueRef llvm_chan
= LLVMConstInt(ctx
->i32
, chan
, false);
4047 args
[0] = llvm_chan
;
4048 args
[1] = attr_number
;
4049 args
[2] = prim_mask
;
4050 args
[3] = interp_param
;
4051 result
[chan
] = ac_emit_llvm_intrinsic(&ctx
->ac
, intr_name
,
4052 ctx
->f32
, args
, args
[3] ? 4 : 3,
4053 AC_FUNC_ATTR_READNONE
| AC_FUNC_ATTR_NOUNWIND
);
4058 handle_fs_input_decl(struct nir_to_llvm_context
*ctx
,
4059 struct nir_variable
*variable
)
4061 int idx
= variable
->data
.location
;
4062 unsigned attrib_count
= glsl_count_attribute_slots(variable
->type
, false);
4063 LLVMValueRef interp
;
4065 variable
->data
.driver_location
= idx
* 4;
4066 ctx
->input_mask
|= ((1ull << attrib_count
) - 1) << variable
->data
.location
;
4068 if (glsl_get_base_type(glsl_without_array(variable
->type
)) == GLSL_TYPE_FLOAT
) {
4069 unsigned interp_type
;
4070 if (variable
->data
.sample
) {
4071 interp_type
= INTERP_SAMPLE
;
4072 ctx
->shader_info
->fs
.force_persample
= true;
4073 } else if (variable
->data
.centroid
)
4074 interp_type
= INTERP_CENTROID
;
4076 interp_type
= INTERP_CENTER
;
4078 interp
= lookup_interp_param(ctx
, variable
->data
.interpolation
, interp_type
);
4082 for (unsigned i
= 0; i
< attrib_count
; ++i
)
4083 ctx
->inputs
[radeon_llvm_reg_index_soa(idx
+ i
, 0)] = interp
;
4088 handle_shader_input_decl(struct nir_to_llvm_context
*ctx
,
4089 struct nir_variable
*variable
)
4091 switch (ctx
->stage
) {
4092 case MESA_SHADER_VERTEX
:
4093 handle_vs_input_decl(ctx
, variable
);
4095 case MESA_SHADER_FRAGMENT
:
4096 handle_fs_input_decl(ctx
, variable
);
4105 handle_fs_inputs_pre(struct nir_to_llvm_context
*ctx
,
4106 struct nir_shader
*nir
)
4109 for (unsigned i
= 0; i
< RADEON_LLVM_MAX_INPUTS
; ++i
) {
4110 LLVMValueRef interp_param
;
4111 LLVMValueRef
*inputs
= ctx
->inputs
+radeon_llvm_reg_index_soa(i
, 0);
4113 if (!(ctx
->input_mask
& (1ull << i
)))
4116 if (i
>= VARYING_SLOT_VAR0
|| i
== VARYING_SLOT_PNTC
) {
4117 interp_param
= *inputs
;
4118 interp_fs_input(ctx
, index
, interp_param
, ctx
->prim_mask
,
4122 ctx
->shader_info
->fs
.flat_shaded_mask
|= 1u << index
;
4124 } else if (i
== VARYING_SLOT_POS
) {
4125 for(int i
= 0; i
< 3; ++i
)
4126 inputs
[i
] = ctx
->frag_pos
[i
];
4128 inputs
[3] = ac_emit_fdiv(&ctx
->ac
, ctx
->f32one
, ctx
->frag_pos
[3]);
4131 ctx
->shader_info
->fs
.num_interp
= index
;
4132 if (ctx
->input_mask
& (1 << VARYING_SLOT_PNTC
))
4133 ctx
->shader_info
->fs
.has_pcoord
= true;
4134 ctx
->shader_info
->fs
.input_mask
= ctx
->input_mask
>> VARYING_SLOT_VAR0
;
4138 ac_build_alloca(struct nir_to_llvm_context
*ctx
,
4142 LLVMBuilderRef builder
= ctx
->builder
;
4143 LLVMBasicBlockRef current_block
= LLVMGetInsertBlock(builder
);
4144 LLVMValueRef function
= LLVMGetBasicBlockParent(current_block
);
4145 LLVMBasicBlockRef first_block
= LLVMGetEntryBasicBlock(function
);
4146 LLVMValueRef first_instr
= LLVMGetFirstInstruction(first_block
);
4147 LLVMBuilderRef first_builder
= LLVMCreateBuilderInContext(ctx
->context
);
4151 LLVMPositionBuilderBefore(first_builder
, first_instr
);
4153 LLVMPositionBuilderAtEnd(first_builder
, first_block
);
4156 res
= LLVMBuildAlloca(first_builder
, type
, name
);
4157 LLVMBuildStore(builder
, LLVMConstNull(type
), res
);
4159 LLVMDisposeBuilder(first_builder
);
4164 static LLVMValueRef
si_build_alloca_undef(struct nir_to_llvm_context
*ctx
,
4168 LLVMValueRef ptr
= ac_build_alloca(ctx
, type
, name
);
4169 LLVMBuildStore(ctx
->builder
, LLVMGetUndef(type
), ptr
);
4174 handle_shader_output_decl(struct nir_to_llvm_context
*ctx
,
4175 struct nir_variable
*variable
)
4177 int idx
= variable
->data
.location
+ variable
->data
.index
;
4178 unsigned attrib_count
= glsl_count_attribute_slots(variable
->type
, false);
4180 variable
->data
.driver_location
= idx
* 4;
4182 if (ctx
->stage
== MESA_SHADER_VERTEX
) {
4184 if (idx
== VARYING_SLOT_CLIP_DIST0
||
4185 idx
== VARYING_SLOT_CULL_DIST0
) {
4186 int length
= glsl_get_length(variable
->type
);
4187 if (idx
== VARYING_SLOT_CLIP_DIST0
) {
4188 ctx
->shader_info
->vs
.clip_dist_mask
= (1 << length
) - 1;
4189 ctx
->num_clips
= length
;
4190 } else if (idx
== VARYING_SLOT_CULL_DIST0
) {
4191 ctx
->shader_info
->vs
.cull_dist_mask
= (1 << length
) - 1;
4192 ctx
->num_culls
= length
;
4201 for (unsigned i
= 0; i
< attrib_count
; ++i
) {
4202 for (unsigned chan
= 0; chan
< 4; chan
++) {
4203 ctx
->outputs
[radeon_llvm_reg_index_soa(idx
+ i
, chan
)] =
4204 si_build_alloca_undef(ctx
, ctx
->f32
, "");
4207 ctx
->output_mask
|= ((1ull << attrib_count
) - 1) << idx
;
4211 setup_locals(struct nir_to_llvm_context
*ctx
,
4212 struct nir_function
*func
)
4215 ctx
->num_locals
= 0;
4216 nir_foreach_variable(variable
, &func
->impl
->locals
) {
4217 unsigned attrib_count
= glsl_count_attribute_slots(variable
->type
, false);
4218 variable
->data
.driver_location
= ctx
->num_locals
* 4;
4219 ctx
->num_locals
+= attrib_count
;
4221 ctx
->locals
= malloc(4 * ctx
->num_locals
* sizeof(LLVMValueRef
));
4225 for (i
= 0; i
< ctx
->num_locals
; i
++) {
4226 for (j
= 0; j
< 4; j
++) {
4227 ctx
->locals
[i
* 4 + j
] =
4228 si_build_alloca_undef(ctx
, ctx
->f32
, "temp");
4234 emit_float_saturate(struct nir_to_llvm_context
*ctx
, LLVMValueRef v
, float lo
, float hi
)
4236 v
= to_float(ctx
, v
);
4237 v
= emit_intrin_2f_param(ctx
, "llvm.maxnum.f32", v
, LLVMConstReal(ctx
->f32
, lo
));
4238 return emit_intrin_2f_param(ctx
, "llvm.minnum.f32", v
, LLVMConstReal(ctx
->f32
, hi
));
4242 static LLVMValueRef
emit_pack_int16(struct nir_to_llvm_context
*ctx
,
4243 LLVMValueRef src0
, LLVMValueRef src1
)
4245 LLVMValueRef const16
= LLVMConstInt(ctx
->i32
, 16, false);
4246 LLVMValueRef comp
[2];
4248 comp
[0] = LLVMBuildAnd(ctx
->builder
, src0
, LLVMConstInt(ctx
-> i32
, 65535, 0), "");
4249 comp
[1] = LLVMBuildAnd(ctx
->builder
, src1
, LLVMConstInt(ctx
-> i32
, 65535, 0), "");
4250 comp
[1] = LLVMBuildShl(ctx
->builder
, comp
[1], const16
, "");
4251 return LLVMBuildOr(ctx
->builder
, comp
[0], comp
[1], "");
4254 /* Initialize arguments for the shader export intrinsic */
4256 si_llvm_init_export_args(struct nir_to_llvm_context
*ctx
,
4257 LLVMValueRef
*values
,
4261 /* Default is 0xf. Adjusted below depending on the format. */
4262 args
[0] = LLVMConstInt(ctx
->i32
, target
!= V_008DFC_SQ_EXP_NULL
? 0xf : 0, false);
4263 /* Specify whether the EXEC mask represents the valid mask */
4264 args
[1] = LLVMConstInt(ctx
->i32
, 0, false);
4266 /* Specify whether this is the last export */
4267 args
[2] = LLVMConstInt(ctx
->i32
, 0, false);
4268 /* Specify the target we are exporting */
4269 args
[3] = LLVMConstInt(ctx
->i32
, target
, false);
4271 args
[4] = LLVMConstInt(ctx
->i32
, 0, false); /* COMPR flag */
4272 args
[5] = LLVMGetUndef(ctx
->f32
);
4273 args
[6] = LLVMGetUndef(ctx
->f32
);
4274 args
[7] = LLVMGetUndef(ctx
->f32
);
4275 args
[8] = LLVMGetUndef(ctx
->f32
);
4280 if (ctx
->stage
== MESA_SHADER_FRAGMENT
&& target
>= V_008DFC_SQ_EXP_MRT
) {
4281 LLVMValueRef val
[4];
4282 unsigned index
= target
- V_008DFC_SQ_EXP_MRT
;
4283 unsigned col_format
= (ctx
->options
->key
.fs
.col_format
>> (4 * index
)) & 0xf;
4284 bool is_int8
= (ctx
->options
->key
.fs
.is_int8
>> index
) & 1;
4286 switch(col_format
) {
4287 case V_028714_SPI_SHADER_ZERO
:
4288 args
[0] = LLVMConstInt(ctx
->i32
, 0x0, 0);
4289 args
[3] = LLVMConstInt(ctx
->i32
, V_008DFC_SQ_EXP_NULL
, 0);
4292 case V_028714_SPI_SHADER_32_R
:
4293 args
[0] = LLVMConstInt(ctx
->i32
, 0x1, 0);
4294 args
[5] = values
[0];
4297 case V_028714_SPI_SHADER_32_GR
:
4298 args
[0] = LLVMConstInt(ctx
->i32
, 0x3, 0);
4299 args
[5] = values
[0];
4300 args
[6] = values
[1];
4303 case V_028714_SPI_SHADER_32_AR
:
4304 args
[0] = LLVMConstInt(ctx
->i32
, 0x9, 0);
4305 args
[5] = values
[0];
4306 args
[8] = values
[3];
4309 case V_028714_SPI_SHADER_FP16_ABGR
:
4310 args
[4] = ctx
->i32one
;
4312 for (unsigned chan
= 0; chan
< 2; chan
++) {
4313 LLVMValueRef pack_args
[2] = {
4315 values
[2 * chan
+ 1]
4317 LLVMValueRef packed
;
4319 packed
= ac_emit_llvm_intrinsic(&ctx
->ac
, "llvm.SI.packf16",
4320 ctx
->i32
, pack_args
, 2,
4321 AC_FUNC_ATTR_READNONE
);
4322 args
[chan
+ 5] = packed
;
4326 case V_028714_SPI_SHADER_UNORM16_ABGR
:
4327 for (unsigned chan
= 0; chan
< 4; chan
++) {
4328 val
[chan
] = emit_float_saturate(ctx
, values
[chan
], 0, 1);
4329 val
[chan
] = LLVMBuildFMul(ctx
->builder
, val
[chan
],
4330 LLVMConstReal(ctx
->f32
, 65535), "");
4331 val
[chan
] = LLVMBuildFAdd(ctx
->builder
, val
[chan
],
4332 LLVMConstReal(ctx
->f32
, 0.5), "");
4333 val
[chan
] = LLVMBuildFPToUI(ctx
->builder
, val
[chan
],
4337 args
[4] = ctx
->i32one
;
4338 args
[5] = emit_pack_int16(ctx
, val
[0], val
[1]);
4339 args
[6] = emit_pack_int16(ctx
, val
[2], val
[3]);
4342 case V_028714_SPI_SHADER_SNORM16_ABGR
:
4343 for (unsigned chan
= 0; chan
< 4; chan
++) {
4344 val
[chan
] = emit_float_saturate(ctx
, values
[chan
], -1, 1);
4345 val
[chan
] = LLVMBuildFMul(ctx
->builder
, val
[chan
],
4346 LLVMConstReal(ctx
->f32
, 32767), "");
4348 /* If positive, add 0.5, else add -0.5. */
4349 val
[chan
] = LLVMBuildFAdd(ctx
->builder
, val
[chan
],
4350 LLVMBuildSelect(ctx
->builder
,
4351 LLVMBuildFCmp(ctx
->builder
, LLVMRealOGE
,
4352 val
[chan
], ctx
->f32zero
, ""),
4353 LLVMConstReal(ctx
->f32
, 0.5),
4354 LLVMConstReal(ctx
->f32
, -0.5), ""), "");
4355 val
[chan
] = LLVMBuildFPToSI(ctx
->builder
, val
[chan
], ctx
->i32
, "");
4358 args
[4] = ctx
->i32one
;
4359 args
[5] = emit_pack_int16(ctx
, val
[0], val
[1]);
4360 args
[6] = emit_pack_int16(ctx
, val
[2], val
[3]);
4363 case V_028714_SPI_SHADER_UINT16_ABGR
: {
4364 LLVMValueRef max
= LLVMConstInt(ctx
->i32
, is_int8
? 255 : 65535, 0);
4366 for (unsigned chan
= 0; chan
< 4; chan
++) {
4367 val
[chan
] = to_integer(ctx
, values
[chan
]);
4368 val
[chan
] = emit_minmax_int(ctx
, LLVMIntULT
, val
[chan
], max
);
4371 args
[4] = ctx
->i32one
;
4372 args
[5] = emit_pack_int16(ctx
, val
[0], val
[1]);
4373 args
[6] = emit_pack_int16(ctx
, val
[2], val
[3]);
4377 case V_028714_SPI_SHADER_SINT16_ABGR
: {
4378 LLVMValueRef max
= LLVMConstInt(ctx
->i32
, is_int8
? 127 : 32767, 0);
4379 LLVMValueRef min
= LLVMConstInt(ctx
->i32
, is_int8
? -128 : -32768, 0);
4382 for (unsigned chan
= 0; chan
< 4; chan
++) {
4383 val
[chan
] = to_integer(ctx
, values
[chan
]);
4384 val
[chan
] = emit_minmax_int(ctx
, LLVMIntSLT
, val
[chan
], max
);
4385 val
[chan
] = emit_minmax_int(ctx
, LLVMIntSGT
, val
[chan
], min
);
4388 args
[4] = ctx
->i32one
;
4389 args
[5] = emit_pack_int16(ctx
, val
[0], val
[1]);
4390 args
[6] = emit_pack_int16(ctx
, val
[2], val
[3]);
4395 case V_028714_SPI_SHADER_32_ABGR
:
4396 memcpy(&args
[5], values
, sizeof(values
[0]) * 4);
4400 memcpy(&args
[5], values
, sizeof(values
[0]) * 4);
4402 for (unsigned i
= 5; i
< 9; ++i
)
4403 args
[i
] = to_float(ctx
, args
[i
]);
4407 handle_vs_outputs_post(struct nir_to_llvm_context
*ctx
)
4409 uint32_t param_count
= 0;
4411 unsigned pos_idx
, num_pos_exports
= 0;
4412 LLVMValueRef args
[9];
4413 LLVMValueRef pos_args
[4][9] = { { 0 } };
4414 LLVMValueRef psize_value
= NULL
, layer_value
= NULL
, viewport_index_value
= NULL
;
4416 const uint64_t clip_mask
= ctx
->output_mask
& ((1ull << VARYING_SLOT_CLIP_DIST0
) |
4417 (1ull << VARYING_SLOT_CLIP_DIST1
) |
4418 (1ull << VARYING_SLOT_CULL_DIST0
) |
4419 (1ull << VARYING_SLOT_CULL_DIST1
));
4422 LLVMValueRef slots
[8];
4425 if (ctx
->shader_info
->vs
.cull_dist_mask
)
4426 ctx
->shader_info
->vs
.cull_dist_mask
<<= ctx
->num_clips
;
4428 i
= VARYING_SLOT_CLIP_DIST0
;
4429 for (j
= 0; j
< ctx
->num_clips
; j
++)
4430 slots
[j
] = to_float(ctx
, LLVMBuildLoad(ctx
->builder
,
4431 ctx
->outputs
[radeon_llvm_reg_index_soa(i
, j
)], ""));
4432 i
= VARYING_SLOT_CULL_DIST0
;
4433 for (j
= 0; j
< ctx
->num_culls
; j
++)
4434 slots
[ctx
->num_clips
+ j
] = to_float(ctx
, LLVMBuildLoad(ctx
->builder
,
4435 ctx
->outputs
[radeon_llvm_reg_index_soa(i
, j
)], ""));
4437 for (i
= ctx
->num_clips
+ ctx
->num_culls
; i
< 8; i
++)
4438 slots
[i
] = LLVMGetUndef(ctx
->f32
);
4440 if (ctx
->num_clips
+ ctx
->num_culls
> 4) {
4441 target
= V_008DFC_SQ_EXP_POS
+ 3;
4442 si_llvm_init_export_args(ctx
, &slots
[4], target
, args
);
4443 memcpy(pos_args
[target
- V_008DFC_SQ_EXP_POS
],
4444 args
, sizeof(args
));
4447 target
= V_008DFC_SQ_EXP_POS
+ 2;
4448 si_llvm_init_export_args(ctx
, &slots
[0], target
, args
);
4449 memcpy(pos_args
[target
- V_008DFC_SQ_EXP_POS
],
4450 args
, sizeof(args
));
4454 for (unsigned i
= 0; i
< RADEON_LLVM_MAX_OUTPUTS
; ++i
) {
4455 LLVMValueRef values
[4];
4456 if (!(ctx
->output_mask
& (1ull << i
)))
4459 for (unsigned j
= 0; j
< 4; j
++)
4460 values
[j
] = to_float(ctx
, LLVMBuildLoad(ctx
->builder
,
4461 ctx
->outputs
[radeon_llvm_reg_index_soa(i
, j
)], ""));
4463 if (i
== VARYING_SLOT_POS
) {
4464 target
= V_008DFC_SQ_EXP_POS
;
4465 } else if (i
== VARYING_SLOT_CLIP_DIST0
||
4466 i
== VARYING_SLOT_CLIP_DIST1
||
4467 i
== VARYING_SLOT_CULL_DIST0
||
4468 i
== VARYING_SLOT_CULL_DIST1
) {
4470 } else if (i
== VARYING_SLOT_PSIZ
) {
4471 ctx
->shader_info
->vs
.writes_pointsize
= true;
4472 psize_value
= values
[0];
4474 } else if (i
== VARYING_SLOT_LAYER
) {
4475 ctx
->shader_info
->vs
.writes_layer
= true;
4476 layer_value
= values
[0];
4478 } else if (i
== VARYING_SLOT_VIEWPORT
) {
4479 ctx
->shader_info
->vs
.writes_viewport_index
= true;
4480 viewport_index_value
= values
[0];
4482 } else if (i
>= VARYING_SLOT_VAR0
) {
4483 ctx
->shader_info
->vs
.export_mask
|= 1u << (i
- VARYING_SLOT_VAR0
);
4484 target
= V_008DFC_SQ_EXP_PARAM
+ param_count
;
4488 si_llvm_init_export_args(ctx
, values
, target
, args
);
4490 if (target
>= V_008DFC_SQ_EXP_POS
&&
4491 target
<= (V_008DFC_SQ_EXP_POS
+ 3)) {
4492 memcpy(pos_args
[target
- V_008DFC_SQ_EXP_POS
],
4493 args
, sizeof(args
));
4495 ac_emit_llvm_intrinsic(&ctx
->ac
,
4502 /* We need to add the position output manually if it's missing. */
4503 if (!pos_args
[0][0]) {
4504 pos_args
[0][0] = LLVMConstInt(ctx
->i32
, 0xf, false);
4505 pos_args
[0][1] = ctx
->i32zero
; /* EXEC mask */
4506 pos_args
[0][2] = ctx
->i32zero
; /* last export? */
4507 pos_args
[0][3] = LLVMConstInt(ctx
->i32
, V_008DFC_SQ_EXP_POS
, false);
4508 pos_args
[0][4] = ctx
->i32zero
; /* COMPR flag */
4509 pos_args
[0][5] = ctx
->f32zero
; /* X */
4510 pos_args
[0][6] = ctx
->f32zero
; /* Y */
4511 pos_args
[0][7] = ctx
->f32zero
; /* Z */
4512 pos_args
[0][8] = ctx
->f32one
; /* W */
4515 uint32_t mask
= ((ctx
->shader_info
->vs
.writes_pointsize
== true ? 1 : 0) |
4516 (ctx
->shader_info
->vs
.writes_layer
== true ? 4 : 0) |
4517 (ctx
->shader_info
->vs
.writes_viewport_index
== true ? 8 : 0));
4519 pos_args
[1][0] = LLVMConstInt(ctx
->i32
, mask
, false); /* writemask */
4520 pos_args
[1][1] = ctx
->i32zero
; /* EXEC mask */
4521 pos_args
[1][2] = ctx
->i32zero
; /* last export? */
4522 pos_args
[1][3] = LLVMConstInt(ctx
->i32
, V_008DFC_SQ_EXP_POS
+ 1, false);
4523 pos_args
[1][4] = ctx
->i32zero
; /* COMPR flag */
4524 pos_args
[1][5] = ctx
->f32zero
; /* X */
4525 pos_args
[1][6] = ctx
->f32zero
; /* Y */
4526 pos_args
[1][7] = ctx
->f32zero
; /* Z */
4527 pos_args
[1][8] = ctx
->f32zero
; /* W */
4529 if (ctx
->shader_info
->vs
.writes_pointsize
== true)
4530 pos_args
[1][5] = psize_value
;
4531 if (ctx
->shader_info
->vs
.writes_layer
== true)
4532 pos_args
[1][7] = layer_value
;
4533 if (ctx
->shader_info
->vs
.writes_viewport_index
== true)
4534 pos_args
[1][8] = viewport_index_value
;
4536 for (i
= 0; i
< 4; i
++) {
4542 for (i
= 0; i
< 4; i
++) {
4543 if (!pos_args
[i
][0])
4546 /* Specify the target we are exporting */
4547 pos_args
[i
][3] = LLVMConstInt(ctx
->i32
, V_008DFC_SQ_EXP_POS
+ pos_idx
++, false);
4548 if (pos_idx
== num_pos_exports
)
4549 pos_args
[i
][2] = ctx
->i32one
;
4550 ac_emit_llvm_intrinsic(&ctx
->ac
,
4556 ctx
->shader_info
->vs
.pos_exports
= num_pos_exports
;
4557 ctx
->shader_info
->vs
.param_exports
= param_count
;
4561 handle_es_outputs_post(struct nir_to_llvm_context
*ctx
)
4564 uint64_t max_output_written
= 0;
4565 for (unsigned i
= 0; i
< RADEON_LLVM_MAX_OUTPUTS
; ++i
) {
4566 LLVMValueRef
*out_ptr
= &ctx
->outputs
[i
* 4];
4568 if (!(ctx
->output_mask
& (1ull << i
)))
4571 param_index
= shader_io_get_unique_index(i
);
4573 if (param_index
> max_output_written
)
4574 max_output_written
= param_index
;
4576 for (j
= 0; j
< 4; j
++) {
4577 LLVMValueRef out_val
= LLVMBuildLoad(ctx
->builder
, out_ptr
[j
], "");
4578 out_val
= LLVMBuildBitCast(ctx
->builder
, out_val
, ctx
->i32
, "");
4580 build_tbuffer_store(ctx
,
4583 LLVMGetUndef(ctx
->i32
), ctx
->es2gs_offset
,
4584 (4 * param_index
+ j
) * 4,
4585 V_008F0C_BUF_DATA_FORMAT_32
,
4586 V_008F0C_BUF_NUM_FORMAT_UINT
,
4590 ctx
->shader_info
->vs
.esgs_itemsize
= (max_output_written
+ 1) * 16;
4594 si_export_mrt_color(struct nir_to_llvm_context
*ctx
,
4595 LLVMValueRef
*color
, unsigned param
, bool is_last
)
4597 LLVMValueRef args
[9];
4599 si_llvm_init_export_args(ctx
, color
, param
,
4603 args
[1] = ctx
->i32one
; /* whether the EXEC mask is valid */
4604 args
[2] = ctx
->i32one
; /* DONE bit */
4605 } else if (args
[0] == ctx
->i32zero
)
4606 return; /* unnecessary NULL export */
4608 ac_emit_llvm_intrinsic(&ctx
->ac
, "llvm.SI.export",
4609 ctx
->voidt
, args
, 9, 0);
4613 si_export_mrt_z(struct nir_to_llvm_context
*ctx
,
4614 LLVMValueRef depth
, LLVMValueRef stencil
,
4615 LLVMValueRef samplemask
)
4617 LLVMValueRef args
[9];
4619 args
[1] = ctx
->i32one
; /* whether the EXEC mask is valid */
4620 args
[2] = ctx
->i32one
; /* DONE bit */
4621 /* Specify the target we are exporting */
4622 args
[3] = LLVMConstInt(ctx
->i32
, V_008DFC_SQ_EXP_MRTZ
, false);
4624 args
[4] = ctx
->i32zero
; /* COMP flag */
4625 args
[5] = LLVMGetUndef(ctx
->f32
); /* R, depth */
4626 args
[6] = LLVMGetUndef(ctx
->f32
); /* G, stencil test val[0:7], stencil op val[8:15] */
4627 args
[7] = LLVMGetUndef(ctx
->f32
); /* B, sample mask */
4628 args
[8] = LLVMGetUndef(ctx
->f32
); /* A, alpha to mask */
4641 args
[7] = samplemask
;
4645 /* SI (except OLAND) has a bug that it only looks
4646 * at the X writemask component. */
4647 if (ctx
->options
->chip_class
== SI
&&
4648 ctx
->options
->family
!= CHIP_OLAND
)
4651 args
[0] = LLVMConstInt(ctx
->i32
, mask
, false);
4652 ac_emit_llvm_intrinsic(&ctx
->ac
, "llvm.SI.export",
4653 ctx
->voidt
, args
, 9, 0);
4657 handle_fs_outputs_post(struct nir_to_llvm_context
*ctx
)
4660 LLVMValueRef depth
= NULL
, stencil
= NULL
, samplemask
= NULL
;
4662 for (unsigned i
= 0; i
< RADEON_LLVM_MAX_OUTPUTS
; ++i
) {
4663 LLVMValueRef values
[4];
4665 if (!(ctx
->output_mask
& (1ull << i
)))
4668 if (i
== FRAG_RESULT_DEPTH
) {
4669 ctx
->shader_info
->fs
.writes_z
= true;
4670 depth
= to_float(ctx
, LLVMBuildLoad(ctx
->builder
,
4671 ctx
->outputs
[radeon_llvm_reg_index_soa(i
, 0)], ""));
4672 } else if (i
== FRAG_RESULT_STENCIL
) {
4673 ctx
->shader_info
->fs
.writes_stencil
= true;
4674 stencil
= to_float(ctx
, LLVMBuildLoad(ctx
->builder
,
4675 ctx
->outputs
[radeon_llvm_reg_index_soa(i
, 0)], ""));
4678 for (unsigned j
= 0; j
< 4; j
++)
4679 values
[j
] = to_float(ctx
, LLVMBuildLoad(ctx
->builder
,
4680 ctx
->outputs
[radeon_llvm_reg_index_soa(i
, j
)], ""));
4682 if (!ctx
->shader_info
->fs
.writes_z
&& !ctx
->shader_info
->fs
.writes_stencil
)
4683 last
= ctx
->output_mask
<= ((1ull << (i
+ 1)) - 1);
4685 si_export_mrt_color(ctx
, values
, V_008DFC_SQ_EXP_MRT
+ index
, last
);
4690 if (depth
|| stencil
)
4691 si_export_mrt_z(ctx
, depth
, stencil
, samplemask
);
4693 si_export_mrt_color(ctx
, NULL
, V_008DFC_SQ_EXP_NULL
, true);
4695 ctx
->shader_info
->fs
.output_mask
= index
? ((1ull << index
) - 1) : 0;
4699 emit_gs_epilogue(struct nir_to_llvm_context
*ctx
)
4701 LLVMValueRef args
[2];
4703 args
[0] = LLVMConstInt(ctx
->i32
, SENDMSG_GS_OP_NOP
| SENDMSG_GS_DONE
, false);
4704 args
[1] = ctx
->gs_wave_id
;
4705 ac_emit_llvm_intrinsic(&ctx
->ac
, "llvm.SI.sendmsg",
4706 ctx
->voidt
, args
, 2, 0);
4710 handle_shader_outputs_post(struct nir_to_llvm_context
*ctx
)
4712 switch (ctx
->stage
) {
4713 case MESA_SHADER_VERTEX
:
4714 if (ctx
->options
->key
.vs
.as_es
)
4715 handle_es_outputs_post(ctx
);
4717 handle_vs_outputs_post(ctx
);
4719 case MESA_SHADER_FRAGMENT
:
4720 handle_fs_outputs_post(ctx
);
4722 case MESA_SHADER_GEOMETRY
:
4723 emit_gs_epilogue(ctx
);
4731 handle_shared_compute_var(struct nir_to_llvm_context
*ctx
,
4732 struct nir_variable
*variable
, uint32_t *offset
, int idx
)
4734 unsigned size
= glsl_count_attribute_slots(variable
->type
, false);
4735 variable
->data
.driver_location
= *offset
;
4739 static void ac_llvm_finalize_module(struct nir_to_llvm_context
* ctx
)
4741 LLVMPassManagerRef passmgr
;
4742 /* Create the pass manager */
4743 passmgr
= LLVMCreateFunctionPassManagerForModule(
4746 /* This pass should eliminate all the load and store instructions */
4747 LLVMAddPromoteMemoryToRegisterPass(passmgr
);
4749 /* Add some optimization passes */
4750 LLVMAddScalarReplAggregatesPass(passmgr
);
4751 LLVMAddLICMPass(passmgr
);
4752 LLVMAddAggressiveDCEPass(passmgr
);
4753 LLVMAddCFGSimplificationPass(passmgr
);
4754 LLVMAddInstructionCombiningPass(passmgr
);
4757 LLVMInitializeFunctionPassManager(passmgr
);
4758 LLVMRunFunctionPassManager(passmgr
, ctx
->main_function
);
4759 LLVMFinalizeFunctionPassManager(passmgr
);
4761 LLVMDisposeBuilder(ctx
->builder
);
4762 LLVMDisposePassManager(passmgr
);
4766 ac_setup_rings(struct nir_to_llvm_context
*ctx
)
4768 if (ctx
->stage
== MESA_SHADER_VERTEX
&& ctx
->options
->key
.vs
.as_es
) {
4769 ctx
->esgs_ring
= build_indexed_load_const(ctx
, ctx
->ring_offsets
, ctx
->i32one
);
4772 if (ctx
->is_gs_copy_shader
) {
4773 ctx
->gsvs_ring
= build_indexed_load_const(ctx
, ctx
->ring_offsets
, LLVMConstInt(ctx
->i32
, 3, false));
4775 if (ctx
->stage
== MESA_SHADER_GEOMETRY
) {
4777 ctx
->esgs_ring
= build_indexed_load_const(ctx
, ctx
->ring_offsets
, LLVMConstInt(ctx
->i32
, 2, false));
4778 ctx
->gsvs_ring
= build_indexed_load_const(ctx
, ctx
->ring_offsets
, LLVMConstInt(ctx
->i32
, 4, false));
4780 ctx
->gsvs_ring
= LLVMBuildBitCast(ctx
->builder
, ctx
->gsvs_ring
, ctx
->v4i32
, "");
4782 ctx
->gsvs_ring
= LLVMBuildInsertElement(ctx
->builder
, ctx
->gsvs_ring
, ctx
->gsvs_num_entries
, LLVMConstInt(ctx
->i32
, 2, false), "");
4783 tmp
= LLVMBuildExtractElement(ctx
->builder
, ctx
->gsvs_ring
, ctx
->i32one
, "");
4784 tmp
= LLVMBuildOr(ctx
->builder
, tmp
, ctx
->gsvs_ring_stride
, "");
4785 ctx
->gsvs_ring
= LLVMBuildInsertElement(ctx
->builder
, ctx
->gsvs_ring
, tmp
, ctx
->i32one
, "");
4787 ctx
->gsvs_ring
= LLVMBuildBitCast(ctx
->builder
, ctx
->gsvs_ring
, ctx
->v16i8
, "");
4792 LLVMModuleRef
ac_translate_nir_to_llvm(LLVMTargetMachineRef tm
,
4793 struct nir_shader
*nir
,
4794 struct ac_shader_variant_info
*shader_info
,
4795 const struct ac_nir_compiler_options
*options
)
4797 struct nir_to_llvm_context ctx
= {0};
4798 struct nir_function
*func
;
4800 ctx
.options
= options
;
4801 ctx
.shader_info
= shader_info
;
4802 ctx
.context
= LLVMContextCreate();
4803 ctx
.module
= LLVMModuleCreateWithNameInContext("shader", ctx
.context
);
4805 ac_llvm_context_init(&ctx
.ac
, ctx
.context
);
4806 ctx
.ac
.module
= ctx
.module
;
4808 ctx
.has_ds_bpermute
= ctx
.options
->chip_class
>= VI
;
4810 memset(shader_info
, 0, sizeof(*shader_info
));
4812 LLVMSetTarget(ctx
.module
, options
->supports_spill
? "amdgcn-mesa-mesa3d" : "amdgcn--");
4815 ctx
.builder
= LLVMCreateBuilderInContext(ctx
.context
);
4816 ctx
.ac
.builder
= ctx
.builder
;
4817 ctx
.stage
= nir
->stage
;
4819 for (i
= 0; i
< AC_UD_MAX_SETS
; i
++)
4820 shader_info
->user_sgprs_locs
.descriptor_sets
[i
].sgpr_idx
= -1;
4821 for (i
= 0; i
< AC_UD_MAX_UD
; i
++)
4822 shader_info
->user_sgprs_locs
.shader_data
[i
].sgpr_idx
= -1;
4824 create_function(&ctx
);
4826 if (nir
->stage
== MESA_SHADER_COMPUTE
) {
4828 nir_foreach_variable(variable
, &nir
->shared
)
4832 uint32_t shared_size
= 0;
4834 LLVMTypeRef i8p
= LLVMPointerType(ctx
.i8
, LOCAL_ADDR_SPACE
);
4835 nir_foreach_variable(variable
, &nir
->shared
) {
4836 handle_shared_compute_var(&ctx
, variable
, &shared_size
, idx
);
4841 var
= LLVMAddGlobalInAddressSpace(ctx
.module
,
4842 LLVMArrayType(ctx
.i8
, shared_size
),
4845 LLVMSetAlignment(var
, 4);
4846 ctx
.shared_memory
= LLVMBuildBitCast(ctx
.builder
, var
, i8p
, "");
4848 } else if (nir
->stage
== MESA_SHADER_GEOMETRY
) {
4849 ctx
.gs_next_vertex
= ac_build_alloca(&ctx
, ctx
.i32
, "gs_next_vertex");
4851 ctx
.gs_max_out_vertices
= nir
->info
->gs
.vertices_out
;
4854 ac_setup_rings(&ctx
);
4856 nir_foreach_variable(variable
, &nir
->inputs
)
4857 handle_shader_input_decl(&ctx
, variable
);
4859 if (nir
->stage
== MESA_SHADER_FRAGMENT
)
4860 handle_fs_inputs_pre(&ctx
, nir
);
4862 nir_foreach_variable(variable
, &nir
->outputs
)
4863 handle_shader_output_decl(&ctx
, variable
);
4865 ctx
.defs
= _mesa_hash_table_create(NULL
, _mesa_hash_pointer
,
4866 _mesa_key_pointer_equal
);
4867 ctx
.phis
= _mesa_hash_table_create(NULL
, _mesa_hash_pointer
,
4868 _mesa_key_pointer_equal
);
4870 func
= (struct nir_function
*)exec_list_get_head(&nir
->functions
);
4872 setup_locals(&ctx
, func
);
4874 visit_cf_list(&ctx
, &func
->impl
->body
);
4875 phi_post_pass(&ctx
);
4877 handle_shader_outputs_post(&ctx
);
4878 LLVMBuildRetVoid(ctx
.builder
);
4880 ac_llvm_finalize_module(&ctx
);
4882 ralloc_free(ctx
.defs
);
4883 ralloc_free(ctx
.phis
);
4885 if (nir
->stage
== MESA_SHADER_GEOMETRY
) {
4886 shader_info
->gs
.gsvs_vertex_size
= util_bitcount64(ctx
.output_mask
) * 16;
4887 shader_info
->gs
.max_gsvs_emit_size
= shader_info
->gs
.gsvs_vertex_size
*
4888 nir
->info
->gs
.vertices_out
;
4893 static void ac_diagnostic_handler(LLVMDiagnosticInfoRef di
, void *context
)
4895 unsigned *retval
= (unsigned *)context
;
4896 LLVMDiagnosticSeverity severity
= LLVMGetDiagInfoSeverity(di
);
4897 char *description
= LLVMGetDiagInfoDescription(di
);
4899 if (severity
== LLVMDSError
) {
4901 fprintf(stderr
, "LLVM triggered Diagnostic Handler: %s\n",
4905 LLVMDisposeMessage(description
);
4908 static unsigned ac_llvm_compile(LLVMModuleRef M
,
4909 struct ac_shader_binary
*binary
,
4910 LLVMTargetMachineRef tm
)
4912 unsigned retval
= 0;
4914 LLVMContextRef llvm_ctx
;
4915 LLVMMemoryBufferRef out_buffer
;
4916 unsigned buffer_size
;
4917 const char *buffer_data
;
4920 /* Setup Diagnostic Handler*/
4921 llvm_ctx
= LLVMGetModuleContext(M
);
4923 LLVMContextSetDiagnosticHandler(llvm_ctx
, ac_diagnostic_handler
,
4927 mem_err
= LLVMTargetMachineEmitToMemoryBuffer(tm
, M
, LLVMObjectFile
,
4930 /* Process Errors/Warnings */
4932 fprintf(stderr
, "%s: %s", __FUNCTION__
, err
);
4938 /* Extract Shader Code*/
4939 buffer_size
= LLVMGetBufferSize(out_buffer
);
4940 buffer_data
= LLVMGetBufferStart(out_buffer
);
4942 ac_elf_read(buffer_data
, buffer_size
, binary
);
4945 LLVMDisposeMemoryBuffer(out_buffer
);
4951 static void ac_compile_llvm_module(LLVMTargetMachineRef tm
,
4952 LLVMModuleRef llvm_module
,
4953 struct ac_shader_binary
*binary
,
4954 struct ac_shader_config
*config
,
4955 struct ac_shader_variant_info
*shader_info
,
4956 gl_shader_stage stage
,
4957 bool dump_shader
, bool supports_spill
)
4960 ac_dump_module(llvm_module
);
4962 memset(binary
, 0, sizeof(*binary
));
4963 int v
= ac_llvm_compile(llvm_module
, binary
, tm
);
4965 fprintf(stderr
, "compile failed\n");
4969 fprintf(stderr
, "disasm:\n%s\n", binary
->disasm_string
);
4971 ac_shader_binary_read_config(binary
, config
, 0, supports_spill
);
4973 LLVMContextRef ctx
= LLVMGetModuleContext(llvm_module
);
4974 LLVMDisposeModule(llvm_module
);
4975 LLVMContextDispose(ctx
);
4977 if (stage
== MESA_SHADER_FRAGMENT
) {
4978 shader_info
->num_input_vgprs
= 0;
4979 if (G_0286CC_PERSP_SAMPLE_ENA(config
->spi_ps_input_addr
))
4980 shader_info
->num_input_vgprs
+= 2;
4981 if (G_0286CC_PERSP_CENTER_ENA(config
->spi_ps_input_addr
))
4982 shader_info
->num_input_vgprs
+= 2;
4983 if (G_0286CC_PERSP_CENTROID_ENA(config
->spi_ps_input_addr
))
4984 shader_info
->num_input_vgprs
+= 2;
4985 if (G_0286CC_PERSP_PULL_MODEL_ENA(config
->spi_ps_input_addr
))
4986 shader_info
->num_input_vgprs
+= 3;
4987 if (G_0286CC_LINEAR_SAMPLE_ENA(config
->spi_ps_input_addr
))
4988 shader_info
->num_input_vgprs
+= 2;
4989 if (G_0286CC_LINEAR_CENTER_ENA(config
->spi_ps_input_addr
))
4990 shader_info
->num_input_vgprs
+= 2;
4991 if (G_0286CC_LINEAR_CENTROID_ENA(config
->spi_ps_input_addr
))
4992 shader_info
->num_input_vgprs
+= 2;
4993 if (G_0286CC_LINE_STIPPLE_TEX_ENA(config
->spi_ps_input_addr
))
4994 shader_info
->num_input_vgprs
+= 1;
4995 if (G_0286CC_POS_X_FLOAT_ENA(config
->spi_ps_input_addr
))
4996 shader_info
->num_input_vgprs
+= 1;
4997 if (G_0286CC_POS_Y_FLOAT_ENA(config
->spi_ps_input_addr
))
4998 shader_info
->num_input_vgprs
+= 1;
4999 if (G_0286CC_POS_Z_FLOAT_ENA(config
->spi_ps_input_addr
))
5000 shader_info
->num_input_vgprs
+= 1;
5001 if (G_0286CC_POS_W_FLOAT_ENA(config
->spi_ps_input_addr
))
5002 shader_info
->num_input_vgprs
+= 1;
5003 if (G_0286CC_FRONT_FACE_ENA(config
->spi_ps_input_addr
))
5004 shader_info
->num_input_vgprs
+= 1;
5005 if (G_0286CC_ANCILLARY_ENA(config
->spi_ps_input_addr
))
5006 shader_info
->num_input_vgprs
+= 1;
5007 if (G_0286CC_SAMPLE_COVERAGE_ENA(config
->spi_ps_input_addr
))
5008 shader_info
->num_input_vgprs
+= 1;
5009 if (G_0286CC_POS_FIXED_PT_ENA(config
->spi_ps_input_addr
))
5010 shader_info
->num_input_vgprs
+= 1;
5012 config
->num_vgprs
= MAX2(config
->num_vgprs
, shader_info
->num_input_vgprs
);
5014 /* +3 for scratch wave offset and VCC */
5015 config
->num_sgprs
= MAX2(config
->num_sgprs
,
5016 shader_info
->num_input_sgprs
+ 3);
5019 void ac_compile_nir_shader(LLVMTargetMachineRef tm
,
5020 struct ac_shader_binary
*binary
,
5021 struct ac_shader_config
*config
,
5022 struct ac_shader_variant_info
*shader_info
,
5023 struct nir_shader
*nir
,
5024 const struct ac_nir_compiler_options
*options
,
5028 LLVMModuleRef llvm_module
= ac_translate_nir_to_llvm(tm
, nir
, shader_info
,
5031 ac_compile_llvm_module(tm
, llvm_module
, binary
, config
, shader_info
, nir
->stage
, dump_shader
, options
->supports_spill
);
5032 switch (nir
->stage
) {
5033 case MESA_SHADER_COMPUTE
:
5034 for (int i
= 0; i
< 3; ++i
)
5035 shader_info
->cs
.block_size
[i
] = nir
->info
->cs
.local_size
[i
];
5037 case MESA_SHADER_FRAGMENT
:
5038 shader_info
->fs
.early_fragment_test
= nir
->info
->fs
.early_fragment_tests
;
5040 case MESA_SHADER_GEOMETRY
:
5041 shader_info
->gs
.vertices_in
= nir
->info
->gs
.vertices_in
;
5042 shader_info
->gs
.vertices_out
= nir
->info
->gs
.vertices_out
;
5043 shader_info
->gs
.output_prim
= nir
->info
->gs
.output_primitive
;
5044 shader_info
->gs
.invocations
= nir
->info
->gs
.invocations
;
5046 case MESA_SHADER_VERTEX
:
5047 shader_info
->vs
.as_es
= options
->key
.vs
.as_es
;
5055 ac_gs_copy_shader_emit(struct nir_to_llvm_context
*ctx
)
5057 LLVMValueRef args
[9];
5058 args
[0] = ctx
->gsvs_ring
;
5059 args
[1] = LLVMBuildMul(ctx
->builder
, ctx
->vertex_id
, LLVMConstInt(ctx
->i32
, 4, false), "");
5060 args
[3] = ctx
->i32zero
;
5061 args
[4] = ctx
->i32one
; /* OFFEN */
5062 args
[5] = ctx
->i32zero
; /* IDXEN */
5063 args
[6] = ctx
->i32one
; /* GLC */
5064 args
[7] = ctx
->i32one
; /* SLC */
5065 args
[8] = ctx
->i32zero
; /* TFE */
5068 for (unsigned i
= 0; i
< RADEON_LLVM_MAX_OUTPUTS
; ++i
) {
5069 if (!(ctx
->output_mask
& (1ull << i
)))
5072 for (unsigned j
= 0; j
< 4; j
++) {
5074 args
[2] = LLVMConstInt(ctx
->i32
,
5076 ctx
->gs_max_out_vertices
* 16 * 4, false);
5078 value
= ac_emit_llvm_intrinsic(&ctx
->ac
,
5079 "llvm.SI.buffer.load.dword.i32.i32",
5081 AC_FUNC_ATTR_READONLY
);
5083 LLVMBuildStore(ctx
->builder
,
5084 to_float(ctx
, value
), ctx
->outputs
[radeon_llvm_reg_index_soa(i
, j
)]);
5088 handle_vs_outputs_post(ctx
);
5091 void ac_create_gs_copy_shader(LLVMTargetMachineRef tm
,
5092 struct nir_shader
*geom_shader
,
5093 struct ac_shader_binary
*binary
,
5094 struct ac_shader_config
*config
,
5095 struct ac_shader_variant_info
*shader_info
,
5096 const struct ac_nir_compiler_options
*options
,
5099 struct nir_to_llvm_context ctx
= {0};
5100 ctx
.context
= LLVMContextCreate();
5101 ctx
.module
= LLVMModuleCreateWithNameInContext("shader", ctx
.context
);
5102 ctx
.options
= options
;
5103 ctx
.shader_info
= shader_info
;
5105 ac_llvm_context_init(&ctx
.ac
, ctx
.context
);
5106 ctx
.ac
.module
= ctx
.module
;
5108 ctx
.is_gs_copy_shader
= true;
5109 LLVMSetTarget(ctx
.module
, "amdgcn--");
5112 ctx
.builder
= LLVMCreateBuilderInContext(ctx
.context
);
5113 ctx
.ac
.builder
= ctx
.builder
;
5114 ctx
.stage
= MESA_SHADER_VERTEX
;
5116 create_function(&ctx
);
5118 ctx
.gs_max_out_vertices
= geom_shader
->info
->gs
.vertices_out
;
5119 ac_setup_rings(&ctx
);
5121 nir_foreach_variable(variable
, &geom_shader
->outputs
)
5122 handle_shader_output_decl(&ctx
, variable
);
5124 ac_gs_copy_shader_emit(&ctx
);
5126 LLVMBuildRetVoid(ctx
.builder
);
5128 ac_llvm_finalize_module(&ctx
);
5130 ac_compile_llvm_module(tm
, ctx
.module
, binary
, config
, shader_info
,
5132 dump_shader
, options
->supports_spill
);