2 * Copyright © 2016 Bas Nieuwenhuizen
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
24 #include "ac_nir_to_llvm.h"
25 #include "ac_llvm_build.h"
26 #include "ac_llvm_util.h"
27 #include "ac_binary.h"
30 #include "../vulkan/radv_descriptor_set.h"
31 #include "util/bitscan.h"
32 #include <llvm-c/Transforms/Scalar.h>
34 enum radeon_llvm_calling_convention
{
35 RADEON_LLVM_AMDGPU_VS
= 87,
36 RADEON_LLVM_AMDGPU_GS
= 88,
37 RADEON_LLVM_AMDGPU_PS
= 89,
38 RADEON_LLVM_AMDGPU_CS
= 90,
41 #define CONST_ADDR_SPACE 2
42 #define LOCAL_ADDR_SPACE 3
44 #define RADEON_LLVM_MAX_INPUTS (VARYING_SLOT_VAR31 + 1)
45 #define RADEON_LLVM_MAX_OUTPUTS (VARYING_SLOT_VAR31 + 1)
54 struct nir_to_llvm_context
{
55 struct ac_llvm_context ac
;
56 const struct ac_nir_compiler_options
*options
;
57 struct ac_shader_variant_info
*shader_info
;
59 LLVMContextRef context
;
61 LLVMBuilderRef builder
;
62 LLVMValueRef main_function
;
64 struct hash_table
*defs
;
65 struct hash_table
*phis
;
67 LLVMValueRef descriptor_sets
[AC_UD_MAX_SETS
];
68 LLVMValueRef ring_offsets
;
69 LLVMValueRef push_constants
;
70 LLVMValueRef num_work_groups
;
71 LLVMValueRef workgroup_ids
;
72 LLVMValueRef local_invocation_ids
;
75 LLVMValueRef vertex_buffers
;
76 LLVMValueRef base_vertex
;
77 LLVMValueRef start_instance
;
78 LLVMValueRef draw_index
;
79 LLVMValueRef vertex_id
;
80 LLVMValueRef rel_auto_id
;
81 LLVMValueRef vs_prim_id
;
82 LLVMValueRef instance_id
;
83 LLVMValueRef ls_out_layout
;
84 LLVMValueRef es2gs_offset
;
86 LLVMValueRef tcs_offchip_layout
;
87 LLVMValueRef tcs_out_offsets
;
88 LLVMValueRef tcs_out_layout
;
89 LLVMValueRef tcs_in_layout
;
91 LLVMValueRef tess_factor_offset
;
92 LLVMValueRef tcs_patch_id
;
93 LLVMValueRef tcs_rel_ids
;
94 LLVMValueRef tes_rel_patch_id
;
95 LLVMValueRef tes_patch_id
;
99 LLVMValueRef gsvs_ring_stride
;
100 LLVMValueRef gsvs_num_entries
;
101 LLVMValueRef gs2vs_offset
;
102 LLVMValueRef gs_wave_id
;
103 LLVMValueRef gs_vtx_offset
[6];
104 LLVMValueRef gs_prim_id
, gs_invocation_id
;
106 LLVMValueRef esgs_ring
;
107 LLVMValueRef gsvs_ring
;
108 LLVMValueRef hs_ring_tess_offchip
;
109 LLVMValueRef hs_ring_tess_factor
;
111 LLVMValueRef prim_mask
;
112 LLVMValueRef sample_pos_offset
;
113 LLVMValueRef persp_sample
, persp_center
, persp_centroid
;
114 LLVMValueRef linear_sample
, linear_center
, linear_centroid
;
115 LLVMValueRef front_face
;
116 LLVMValueRef ancillary
;
117 LLVMValueRef sample_coverage
;
118 LLVMValueRef frag_pos
[4];
120 LLVMBasicBlockRef continue_block
;
121 LLVMBasicBlockRef break_block
;
141 LLVMValueRef i1false
;
142 LLVMValueRef i32zero
;
144 LLVMValueRef f32zero
;
146 LLVMValueRef v4f32empty
;
148 unsigned uniform_md_kind
;
149 LLVMValueRef empty_md
;
150 gl_shader_stage stage
;
153 LLVMValueRef inputs
[RADEON_LLVM_MAX_INPUTS
* 4];
154 LLVMValueRef outputs
[RADEON_LLVM_MAX_OUTPUTS
* 4];
156 LLVMValueRef shared_memory
;
158 uint64_t output_mask
;
160 LLVMValueRef
*locals
;
162 uint8_t num_output_clips
;
163 uint8_t num_output_culls
;
165 bool has_ds_bpermute
;
167 bool is_gs_copy_shader
;
168 LLVMValueRef gs_next_vertex
;
169 unsigned gs_max_out_vertices
;
171 unsigned tes_primitive_mode
;
172 uint64_t tess_outputs_written
;
173 uint64_t tess_patch_outputs_written
;
176 static LLVMValueRef
get_sampler_desc(struct nir_to_llvm_context
*ctx
,
177 nir_deref_var
*deref
,
178 enum desc_type desc_type
);
179 static unsigned radeon_llvm_reg_index_soa(unsigned index
, unsigned chan
)
181 return (index
* 4) + chan
;
184 static unsigned shader_io_get_unique_index(gl_varying_slot slot
)
186 /* handle patch indices separate */
187 if (slot
== VARYING_SLOT_TESS_LEVEL_OUTER
)
189 if (slot
== VARYING_SLOT_TESS_LEVEL_INNER
)
191 if (slot
>= VARYING_SLOT_PATCH0
&& slot
<= VARYING_SLOT_TESS_MAX
)
192 return 2 + (slot
- VARYING_SLOT_PATCH0
);
194 if (slot
== VARYING_SLOT_POS
)
196 if (slot
== VARYING_SLOT_PSIZ
)
198 if (slot
== VARYING_SLOT_CLIP_DIST0
)
200 /* 3 is reserved for clip dist as well */
201 if (slot
>= VARYING_SLOT_VAR0
&& slot
<= VARYING_SLOT_VAR31
)
202 return 4 + (slot
- VARYING_SLOT_VAR0
);
203 unreachable("illegal slot in get unique index\n");
206 static unsigned llvm_get_type_size(LLVMTypeRef type
)
208 LLVMTypeKind kind
= LLVMGetTypeKind(type
);
211 case LLVMIntegerTypeKind
:
212 return LLVMGetIntTypeWidth(type
) / 8;
213 case LLVMFloatTypeKind
:
215 case LLVMPointerTypeKind
:
217 case LLVMVectorTypeKind
:
218 return LLVMGetVectorSize(type
) *
219 llvm_get_type_size(LLVMGetElementType(type
));
226 static void set_llvm_calling_convention(LLVMValueRef func
,
227 gl_shader_stage stage
)
229 enum radeon_llvm_calling_convention calling_conv
;
232 case MESA_SHADER_VERTEX
:
233 case MESA_SHADER_TESS_CTRL
:
234 case MESA_SHADER_TESS_EVAL
:
235 calling_conv
= RADEON_LLVM_AMDGPU_VS
;
237 case MESA_SHADER_GEOMETRY
:
238 calling_conv
= RADEON_LLVM_AMDGPU_GS
;
240 case MESA_SHADER_FRAGMENT
:
241 calling_conv
= RADEON_LLVM_AMDGPU_PS
;
243 case MESA_SHADER_COMPUTE
:
244 calling_conv
= RADEON_LLVM_AMDGPU_CS
;
247 unreachable("Unhandle shader type");
250 LLVMSetFunctionCallConv(func
, calling_conv
);
254 create_llvm_function(LLVMContextRef ctx
, LLVMModuleRef module
,
255 LLVMBuilderRef builder
, LLVMTypeRef
*return_types
,
256 unsigned num_return_elems
, LLVMTypeRef
*param_types
,
257 unsigned param_count
, unsigned array_params_mask
,
258 unsigned sgpr_params
, bool unsafe_math
)
260 LLVMTypeRef main_function_type
, ret_type
;
261 LLVMBasicBlockRef main_function_body
;
263 if (num_return_elems
)
264 ret_type
= LLVMStructTypeInContext(ctx
, return_types
,
265 num_return_elems
, true);
267 ret_type
= LLVMVoidTypeInContext(ctx
);
269 /* Setup the function */
271 LLVMFunctionType(ret_type
, param_types
, param_count
, 0);
272 LLVMValueRef main_function
=
273 LLVMAddFunction(module
, "main", main_function_type
);
275 LLVMAppendBasicBlockInContext(ctx
, main_function
, "main_body");
276 LLVMPositionBuilderAtEnd(builder
, main_function_body
);
278 LLVMSetFunctionCallConv(main_function
, RADEON_LLVM_AMDGPU_CS
);
279 for (unsigned i
= 0; i
< sgpr_params
; ++i
) {
280 if (array_params_mask
& (1 << i
)) {
281 LLVMValueRef P
= LLVMGetParam(main_function
, i
);
282 ac_add_function_attr(ctx
, main_function
, i
+ 1, AC_FUNC_ATTR_BYVAL
);
283 ac_add_attr_dereferenceable(P
, UINT64_MAX
);
286 ac_add_function_attr(ctx
, main_function
, i
+ 1, AC_FUNC_ATTR_INREG
);
291 /* These were copied from some LLVM test. */
292 LLVMAddTargetDependentFunctionAttr(main_function
,
293 "less-precise-fpmad",
295 LLVMAddTargetDependentFunctionAttr(main_function
,
298 LLVMAddTargetDependentFunctionAttr(main_function
,
301 LLVMAddTargetDependentFunctionAttr(main_function
,
305 return main_function
;
308 static LLVMTypeRef
const_array(LLVMTypeRef elem_type
, int num_elements
)
310 return LLVMPointerType(LLVMArrayType(elem_type
, num_elements
),
314 static LLVMValueRef
get_shared_memory_ptr(struct nir_to_llvm_context
*ctx
,
322 offset
= LLVMConstInt(ctx
->i32
, idx
* 16, false);
324 ptr
= ctx
->shared_memory
;
325 ptr
= LLVMBuildGEP(ctx
->builder
, ptr
, &offset
, 1, "");
326 addr_space
= LLVMGetPointerAddressSpace(LLVMTypeOf(ptr
));
327 ptr
= LLVMBuildBitCast(ctx
->builder
, ptr
, LLVMPointerType(type
, addr_space
), "");
331 static LLVMTypeRef
to_integer_type_scalar(struct nir_to_llvm_context
*ctx
, LLVMTypeRef t
)
333 if (t
== ctx
->f16
|| t
== ctx
->i16
)
335 else if (t
== ctx
->f32
|| t
== ctx
->i32
)
337 else if (t
== ctx
->f64
|| t
== ctx
->i64
)
340 unreachable("Unhandled integer size");
343 static LLVMTypeRef
to_integer_type(struct nir_to_llvm_context
*ctx
, LLVMTypeRef t
)
345 if (LLVMGetTypeKind(t
) == LLVMVectorTypeKind
) {
346 LLVMTypeRef elem_type
= LLVMGetElementType(t
);
347 return LLVMVectorType(to_integer_type_scalar(ctx
, elem_type
),
348 LLVMGetVectorSize(t
));
350 return to_integer_type_scalar(ctx
, t
);
353 static LLVMValueRef
to_integer(struct nir_to_llvm_context
*ctx
, LLVMValueRef v
)
355 LLVMTypeRef type
= LLVMTypeOf(v
);
356 return LLVMBuildBitCast(ctx
->builder
, v
, to_integer_type(ctx
, type
), "");
359 static LLVMTypeRef
to_float_type_scalar(struct nir_to_llvm_context
*ctx
, LLVMTypeRef t
)
361 if (t
== ctx
->i16
|| t
== ctx
->f16
)
363 else if (t
== ctx
->i32
|| t
== ctx
->f32
)
365 else if (t
== ctx
->i64
|| t
== ctx
->f64
)
368 unreachable("Unhandled float size");
371 static LLVMTypeRef
to_float_type(struct nir_to_llvm_context
*ctx
, LLVMTypeRef t
)
373 if (LLVMGetTypeKind(t
) == LLVMVectorTypeKind
) {
374 LLVMTypeRef elem_type
= LLVMGetElementType(t
);
375 return LLVMVectorType(to_float_type_scalar(ctx
, elem_type
),
376 LLVMGetVectorSize(t
));
378 return to_float_type_scalar(ctx
, t
);
381 static LLVMValueRef
to_float(struct nir_to_llvm_context
*ctx
, LLVMValueRef v
)
383 LLVMTypeRef type
= LLVMTypeOf(v
);
384 return LLVMBuildBitCast(ctx
->builder
, v
, to_float_type(ctx
, type
), "");
387 static int get_elem_bits(struct nir_to_llvm_context
*ctx
, LLVMTypeRef type
)
389 if (LLVMGetTypeKind(type
) == LLVMVectorTypeKind
)
390 type
= LLVMGetElementType(type
);
392 if (LLVMGetTypeKind(type
) == LLVMIntegerTypeKind
)
393 return LLVMGetIntTypeWidth(type
);
395 if (type
== ctx
->f16
)
397 if (type
== ctx
->f32
)
399 if (type
== ctx
->f64
)
402 unreachable("Unhandled type kind in get_elem_bits");
405 static LLVMValueRef
unpack_param(struct nir_to_llvm_context
*ctx
,
406 LLVMValueRef param
, unsigned rshift
,
409 LLVMValueRef value
= param
;
411 value
= LLVMBuildLShr(ctx
->builder
, value
,
412 LLVMConstInt(ctx
->i32
, rshift
, false), "");
414 if (rshift
+ bitwidth
< 32) {
415 unsigned mask
= (1 << bitwidth
) - 1;
416 value
= LLVMBuildAnd(ctx
->builder
, value
,
417 LLVMConstInt(ctx
->i32
, mask
, false), "");
422 static LLVMValueRef
get_rel_patch_id(struct nir_to_llvm_context
*ctx
)
424 switch (ctx
->stage
) {
425 case MESA_SHADER_TESS_CTRL
:
426 return unpack_param(ctx
, ctx
->tcs_rel_ids
, 0, 8);
427 case MESA_SHADER_TESS_EVAL
:
428 return ctx
->tes_rel_patch_id
;
431 unreachable("Illegal stage");
435 /* Tessellation shaders pass outputs to the next shader using LDS.
437 * LS outputs = TCS inputs
438 * TCS outputs = TES inputs
441 * - TCS inputs for patch 0
442 * - TCS inputs for patch 1
443 * - TCS inputs for patch 2 = get_tcs_in_current_patch_offset (if RelPatchID==2)
445 * - TCS outputs for patch 0 = get_tcs_out_patch0_offset
446 * - Per-patch TCS outputs for patch 0 = get_tcs_out_patch0_patch_data_offset
447 * - TCS outputs for patch 1
448 * - Per-patch TCS outputs for patch 1
449 * - TCS outputs for patch 2 = get_tcs_out_current_patch_offset (if RelPatchID==2)
450 * - Per-patch TCS outputs for patch 2 = get_tcs_out_current_patch_data_offset (if RelPatchID==2)
453 * All three shaders VS(LS), TCS, TES share the same LDS space.
456 get_tcs_in_patch_stride(struct nir_to_llvm_context
*ctx
)
458 if (ctx
->stage
== MESA_SHADER_VERTEX
)
459 return unpack_param(ctx
, ctx
->ls_out_layout
, 0, 13);
460 else if (ctx
->stage
== MESA_SHADER_TESS_CTRL
)
461 return unpack_param(ctx
, ctx
->tcs_in_layout
, 0, 13);
469 get_tcs_out_patch_stride(struct nir_to_llvm_context
*ctx
)
471 return unpack_param(ctx
, ctx
->tcs_out_layout
, 0, 13);
475 get_tcs_out_patch0_offset(struct nir_to_llvm_context
*ctx
)
477 return LLVMBuildMul(ctx
->builder
,
478 unpack_param(ctx
, ctx
->tcs_out_offsets
, 0, 16),
479 LLVMConstInt(ctx
->i32
, 4, false), "");
483 get_tcs_out_patch0_patch_data_offset(struct nir_to_llvm_context
*ctx
)
485 return LLVMBuildMul(ctx
->builder
,
486 unpack_param(ctx
, ctx
->tcs_out_offsets
, 16, 16),
487 LLVMConstInt(ctx
->i32
, 4, false), "");
491 get_tcs_in_current_patch_offset(struct nir_to_llvm_context
*ctx
)
493 LLVMValueRef patch_stride
= get_tcs_in_patch_stride(ctx
);
494 LLVMValueRef rel_patch_id
= get_rel_patch_id(ctx
);
496 return LLVMBuildMul(ctx
->builder
, patch_stride
, rel_patch_id
, "");
500 get_tcs_out_current_patch_offset(struct nir_to_llvm_context
*ctx
)
502 LLVMValueRef patch0_offset
= get_tcs_out_patch0_offset(ctx
);
503 LLVMValueRef patch_stride
= get_tcs_out_patch_stride(ctx
);
504 LLVMValueRef rel_patch_id
= get_rel_patch_id(ctx
);
506 return LLVMBuildAdd(ctx
->builder
, patch0_offset
,
507 LLVMBuildMul(ctx
->builder
, patch_stride
,
513 get_tcs_out_current_patch_data_offset(struct nir_to_llvm_context
*ctx
)
515 LLVMValueRef patch0_patch_data_offset
=
516 get_tcs_out_patch0_patch_data_offset(ctx
);
517 LLVMValueRef patch_stride
= get_tcs_out_patch_stride(ctx
);
518 LLVMValueRef rel_patch_id
= get_rel_patch_id(ctx
);
520 return LLVMBuildAdd(ctx
->builder
, patch0_patch_data_offset
,
521 LLVMBuildMul(ctx
->builder
, patch_stride
,
526 static void set_userdata_location(struct ac_userdata_info
*ud_info
, uint8_t sgpr_idx
, uint8_t num_sgprs
)
528 ud_info
->sgpr_idx
= sgpr_idx
;
529 ud_info
->num_sgprs
= num_sgprs
;
530 ud_info
->indirect
= false;
531 ud_info
->indirect_offset
= 0;
534 static void set_userdata_location_shader(struct nir_to_llvm_context
*ctx
,
535 int idx
, uint8_t sgpr_idx
, uint8_t num_sgprs
)
537 set_userdata_location(&ctx
->shader_info
->user_sgprs_locs
.shader_data
[idx
], sgpr_idx
, num_sgprs
);
541 static void set_userdata_location_indirect(struct ac_userdata_info
*ud_info
, uint8_t sgpr_idx
, uint8_t num_sgprs
,
542 uint32_t indirect_offset
)
544 ud_info
->sgpr_idx
= sgpr_idx
;
545 ud_info
->num_sgprs
= num_sgprs
;
546 ud_info
->indirect
= true;
547 ud_info
->indirect_offset
= indirect_offset
;
551 static void declare_tess_lds(struct nir_to_llvm_context
*ctx
)
553 unsigned lds_size
= ctx
->options
->chip_class
>= CIK
? 65536 : 32768;
554 ctx
->lds
= LLVMBuildIntToPtr(ctx
->builder
, ctx
->i32zero
,
555 LLVMPointerType(LLVMArrayType(ctx
->i32
, lds_size
/ 4), LOCAL_ADDR_SPACE
),
559 static void create_function(struct nir_to_llvm_context
*ctx
)
561 LLVMTypeRef arg_types
[23];
562 unsigned arg_idx
= 0;
563 unsigned array_params_mask
= 0;
564 unsigned sgpr_count
= 0, user_sgpr_count
;
566 unsigned num_sets
= ctx
->options
->layout
? ctx
->options
->layout
->num_sets
: 0;
567 unsigned user_sgpr_idx
;
568 bool need_push_constants
;
569 bool need_ring_offsets
= false;
571 /* until we sort out scratch/global buffers always assign ring offsets for gs/vs/es */
572 if (ctx
->stage
== MESA_SHADER_GEOMETRY
||
573 ctx
->stage
== MESA_SHADER_VERTEX
||
574 ctx
->stage
== MESA_SHADER_TESS_CTRL
||
575 ctx
->stage
== MESA_SHADER_TESS_EVAL
||
576 ctx
->stage
== MESA_SHADER_FRAGMENT
||
577 ctx
->is_gs_copy_shader
)
578 need_ring_offsets
= true;
580 need_push_constants
= true;
581 if (!ctx
->options
->layout
)
582 need_push_constants
= false;
583 else if (!ctx
->options
->layout
->push_constant_size
&&
584 !ctx
->options
->layout
->dynamic_offset_count
)
585 need_push_constants
= false;
587 if (need_ring_offsets
&& !ctx
->options
->supports_spill
) {
588 arg_types
[arg_idx
++] = const_array(ctx
->v16i8
, 16); /* address of rings */
591 /* 1 for each descriptor set */
592 for (unsigned i
= 0; i
< num_sets
; ++i
) {
593 if (ctx
->options
->layout
->set
[i
].layout
->shader_stages
& (1 << ctx
->stage
)) {
594 array_params_mask
|= (1 << arg_idx
);
595 arg_types
[arg_idx
++] = const_array(ctx
->i8
, 1024 * 1024);
599 if (need_push_constants
) {
600 /* 1 for push constants and dynamic descriptors */
601 array_params_mask
|= (1 << arg_idx
);
602 arg_types
[arg_idx
++] = const_array(ctx
->i8
, 1024 * 1024);
605 switch (ctx
->stage
) {
606 case MESA_SHADER_COMPUTE
:
607 arg_types
[arg_idx
++] = LLVMVectorType(ctx
->i32
, 3); /* grid size */
608 user_sgpr_count
= arg_idx
;
609 arg_types
[arg_idx
++] = LLVMVectorType(ctx
->i32
, 3);
610 arg_types
[arg_idx
++] = ctx
->i32
;
611 sgpr_count
= arg_idx
;
613 arg_types
[arg_idx
++] = LLVMVectorType(ctx
->i32
, 3);
615 case MESA_SHADER_VERTEX
:
616 if (!ctx
->is_gs_copy_shader
) {
617 arg_types
[arg_idx
++] = const_array(ctx
->v16i8
, 16); /* vertex buffers */
618 arg_types
[arg_idx
++] = ctx
->i32
; // base vertex
619 arg_types
[arg_idx
++] = ctx
->i32
; // start instance
620 arg_types
[arg_idx
++] = ctx
->i32
; // draw index
622 user_sgpr_count
= arg_idx
;
623 if (ctx
->options
->key
.vs
.as_es
)
624 arg_types
[arg_idx
++] = ctx
->i32
; //es2gs offset
625 else if (ctx
->options
->key
.vs
.as_ls
) {
626 arg_types
[arg_idx
++] = ctx
->i32
; //ls out layout
629 sgpr_count
= arg_idx
;
630 arg_types
[arg_idx
++] = ctx
->i32
; // vertex id
631 if (!ctx
->is_gs_copy_shader
) {
632 arg_types
[arg_idx
++] = ctx
->i32
; // rel auto id
633 arg_types
[arg_idx
++] = ctx
->i32
; // vs prim id
634 arg_types
[arg_idx
++] = ctx
->i32
; // instance id
637 case MESA_SHADER_TESS_CTRL
:
638 arg_types
[arg_idx
++] = ctx
->i32
; // tcs offchip layout
639 arg_types
[arg_idx
++] = ctx
->i32
; // tcs out offsets
640 arg_types
[arg_idx
++] = ctx
->i32
; // tcs out layout
641 arg_types
[arg_idx
++] = ctx
->i32
; // tcs in layout
642 user_sgpr_count
= arg_idx
;
643 arg_types
[arg_idx
++] = ctx
->i32
; // param oc lds
644 arg_types
[arg_idx
++] = ctx
->i32
; // tess factor offset
645 sgpr_count
= arg_idx
;
646 arg_types
[arg_idx
++] = ctx
->i32
; // patch id
647 arg_types
[arg_idx
++] = ctx
->i32
; // rel ids;
649 case MESA_SHADER_TESS_EVAL
:
650 arg_types
[arg_idx
++] = ctx
->i32
; // tcs offchip layout
651 user_sgpr_count
= arg_idx
;
652 if (ctx
->options
->key
.tes
.as_es
) {
653 arg_types
[arg_idx
++] = ctx
->i32
; // OC LDS
654 arg_types
[arg_idx
++] = ctx
->i32
; //
655 arg_types
[arg_idx
++] = ctx
->i32
; // es2gs offset
657 arg_types
[arg_idx
++] = ctx
->i32
; //
658 arg_types
[arg_idx
++] = ctx
->i32
; // OC LDS
660 sgpr_count
= arg_idx
;
661 arg_types
[arg_idx
++] = ctx
->f32
; // tes_u
662 arg_types
[arg_idx
++] = ctx
->f32
; // tes_v
663 arg_types
[arg_idx
++] = ctx
->i32
; // tes rel patch id
664 arg_types
[arg_idx
++] = ctx
->i32
; // tes patch id
666 case MESA_SHADER_GEOMETRY
:
667 arg_types
[arg_idx
++] = ctx
->i32
; // gsvs stride
668 arg_types
[arg_idx
++] = ctx
->i32
; // gsvs num entires
669 user_sgpr_count
= arg_idx
;
670 arg_types
[arg_idx
++] = ctx
->i32
; // gs2vs offset
671 arg_types
[arg_idx
++] = ctx
->i32
; // wave id
672 sgpr_count
= arg_idx
;
673 arg_types
[arg_idx
++] = ctx
->i32
; // vtx0
674 arg_types
[arg_idx
++] = ctx
->i32
; // vtx1
675 arg_types
[arg_idx
++] = ctx
->i32
; // prim id
676 arg_types
[arg_idx
++] = ctx
->i32
; // vtx2
677 arg_types
[arg_idx
++] = ctx
->i32
; // vtx3
678 arg_types
[arg_idx
++] = ctx
->i32
; // vtx4
679 arg_types
[arg_idx
++] = ctx
->i32
; // vtx5
680 arg_types
[arg_idx
++] = ctx
->i32
; // GS instance id
682 case MESA_SHADER_FRAGMENT
:
683 arg_types
[arg_idx
++] = ctx
->i32
; /* sample position offset */
684 user_sgpr_count
= arg_idx
;
685 arg_types
[arg_idx
++] = ctx
->i32
; /* prim mask */
686 sgpr_count
= arg_idx
;
687 arg_types
[arg_idx
++] = ctx
->v2i32
; /* persp sample */
688 arg_types
[arg_idx
++] = ctx
->v2i32
; /* persp center */
689 arg_types
[arg_idx
++] = ctx
->v2i32
; /* persp centroid */
690 arg_types
[arg_idx
++] = ctx
->v3i32
; /* persp pull model */
691 arg_types
[arg_idx
++] = ctx
->v2i32
; /* linear sample */
692 arg_types
[arg_idx
++] = ctx
->v2i32
; /* linear center */
693 arg_types
[arg_idx
++] = ctx
->v2i32
; /* linear centroid */
694 arg_types
[arg_idx
++] = ctx
->f32
; /* line stipple tex */
695 arg_types
[arg_idx
++] = ctx
->f32
; /* pos x float */
696 arg_types
[arg_idx
++] = ctx
->f32
; /* pos y float */
697 arg_types
[arg_idx
++] = ctx
->f32
; /* pos z float */
698 arg_types
[arg_idx
++] = ctx
->f32
; /* pos w float */
699 arg_types
[arg_idx
++] = ctx
->i32
; /* front face */
700 arg_types
[arg_idx
++] = ctx
->i32
; /* ancillary */
701 arg_types
[arg_idx
++] = ctx
->i32
; /* sample coverage */
702 arg_types
[arg_idx
++] = ctx
->i32
; /* fixed pt */
705 unreachable("Shader stage not implemented");
708 ctx
->main_function
= create_llvm_function(
709 ctx
->context
, ctx
->module
, ctx
->builder
, NULL
, 0, arg_types
,
710 arg_idx
, array_params_mask
, sgpr_count
, ctx
->options
->unsafe_math
);
711 set_llvm_calling_convention(ctx
->main_function
, ctx
->stage
);
713 ctx
->shader_info
->num_input_sgprs
= 0;
714 ctx
->shader_info
->num_input_vgprs
= 0;
716 ctx
->shader_info
->num_user_sgprs
= ctx
->options
->supports_spill
? 2 : 0;
717 for (i
= 0; i
< user_sgpr_count
; i
++)
718 ctx
->shader_info
->num_user_sgprs
+= llvm_get_type_size(arg_types
[i
]) / 4;
720 ctx
->shader_info
->num_input_sgprs
= ctx
->shader_info
->num_user_sgprs
;
721 for (; i
< sgpr_count
; i
++)
722 ctx
->shader_info
->num_input_sgprs
+= llvm_get_type_size(arg_types
[i
]) / 4;
724 if (ctx
->stage
!= MESA_SHADER_FRAGMENT
)
725 for (; i
< arg_idx
; ++i
)
726 ctx
->shader_info
->num_input_vgprs
+= llvm_get_type_size(arg_types
[i
]) / 4;
731 if (ctx
->options
->supports_spill
|| need_ring_offsets
) {
732 set_userdata_location_shader(ctx
, AC_UD_SCRATCH_RING_OFFSETS
, user_sgpr_idx
, 2);
734 if (ctx
->options
->supports_spill
) {
735 ctx
->ring_offsets
= ac_build_intrinsic(&ctx
->ac
, "llvm.amdgcn.implicit.buffer.ptr",
736 LLVMPointerType(ctx
->i8
, CONST_ADDR_SPACE
),
737 NULL
, 0, AC_FUNC_ATTR_READNONE
);
738 ctx
->ring_offsets
= LLVMBuildBitCast(ctx
->builder
, ctx
->ring_offsets
,
739 const_array(ctx
->v16i8
, 16), "");
741 ctx
->ring_offsets
= LLVMGetParam(ctx
->main_function
, arg_idx
++);
744 for (unsigned i
= 0; i
< num_sets
; ++i
) {
745 if (ctx
->options
->layout
->set
[i
].layout
->shader_stages
& (1 << ctx
->stage
)) {
746 set_userdata_location(&ctx
->shader_info
->user_sgprs_locs
.descriptor_sets
[i
], user_sgpr_idx
, 2);
748 ctx
->descriptor_sets
[i
] =
749 LLVMGetParam(ctx
->main_function
, arg_idx
++);
751 ctx
->descriptor_sets
[i
] = NULL
;
754 if (need_push_constants
) {
755 ctx
->push_constants
= LLVMGetParam(ctx
->main_function
, arg_idx
++);
756 set_userdata_location_shader(ctx
, AC_UD_PUSH_CONSTANTS
, user_sgpr_idx
, 2);
760 switch (ctx
->stage
) {
761 case MESA_SHADER_COMPUTE
:
762 set_userdata_location_shader(ctx
, AC_UD_CS_GRID_SIZE
, user_sgpr_idx
, 3);
764 ctx
->num_work_groups
=
765 LLVMGetParam(ctx
->main_function
, arg_idx
++);
767 LLVMGetParam(ctx
->main_function
, arg_idx
++);
769 LLVMGetParam(ctx
->main_function
, arg_idx
++);
770 ctx
->local_invocation_ids
=
771 LLVMGetParam(ctx
->main_function
, arg_idx
++);
773 case MESA_SHADER_VERTEX
:
774 if (!ctx
->is_gs_copy_shader
) {
775 set_userdata_location_shader(ctx
, AC_UD_VS_VERTEX_BUFFERS
, user_sgpr_idx
, 2);
777 ctx
->vertex_buffers
= LLVMGetParam(ctx
->main_function
, arg_idx
++);
778 set_userdata_location_shader(ctx
, AC_UD_VS_BASE_VERTEX_START_INSTANCE
, user_sgpr_idx
, 3);
780 ctx
->base_vertex
= LLVMGetParam(ctx
->main_function
, arg_idx
++);
781 ctx
->start_instance
= LLVMGetParam(ctx
->main_function
, arg_idx
++);
782 ctx
->draw_index
= LLVMGetParam(ctx
->main_function
, arg_idx
++);
784 if (ctx
->options
->key
.vs
.as_es
)
785 ctx
->es2gs_offset
= LLVMGetParam(ctx
->main_function
, arg_idx
++);
786 else if (ctx
->options
->key
.vs
.as_ls
) {
787 set_userdata_location_shader(ctx
, AC_UD_VS_LS_TCS_IN_LAYOUT
, user_sgpr_idx
, 1);
789 ctx
->ls_out_layout
= LLVMGetParam(ctx
->main_function
, arg_idx
++);
791 ctx
->vertex_id
= LLVMGetParam(ctx
->main_function
, arg_idx
++);
792 if (!ctx
->is_gs_copy_shader
) {
793 ctx
->rel_auto_id
= LLVMGetParam(ctx
->main_function
, arg_idx
++);
794 ctx
->vs_prim_id
= LLVMGetParam(ctx
->main_function
, arg_idx
++);
795 ctx
->instance_id
= LLVMGetParam(ctx
->main_function
, arg_idx
++);
797 if (ctx
->options
->key
.vs
.as_ls
)
798 declare_tess_lds(ctx
);
800 case MESA_SHADER_TESS_CTRL
:
801 set_userdata_location_shader(ctx
, AC_UD_TCS_OFFCHIP_LAYOUT
, user_sgpr_idx
, 4);
803 ctx
->tcs_offchip_layout
= LLVMGetParam(ctx
->main_function
, arg_idx
++);
804 ctx
->tcs_out_offsets
= LLVMGetParam(ctx
->main_function
, arg_idx
++);
805 ctx
->tcs_out_layout
= LLVMGetParam(ctx
->main_function
, arg_idx
++);
806 ctx
->tcs_in_layout
= LLVMGetParam(ctx
->main_function
, arg_idx
++);
807 ctx
->oc_lds
= LLVMGetParam(ctx
->main_function
, arg_idx
++);
808 ctx
->tess_factor_offset
= LLVMGetParam(ctx
->main_function
, arg_idx
++);
809 ctx
->tcs_patch_id
= LLVMGetParam(ctx
->main_function
, arg_idx
++);
810 ctx
->tcs_rel_ids
= LLVMGetParam(ctx
->main_function
, arg_idx
++);
812 declare_tess_lds(ctx
);
814 case MESA_SHADER_TESS_EVAL
:
815 set_userdata_location_shader(ctx
, AC_UD_TES_OFFCHIP_LAYOUT
, user_sgpr_idx
, 1);
817 ctx
->tcs_offchip_layout
= LLVMGetParam(ctx
->main_function
, arg_idx
++);
818 if (ctx
->options
->key
.tes
.as_es
) {
819 ctx
->oc_lds
= LLVMGetParam(ctx
->main_function
, arg_idx
++);
821 ctx
->es2gs_offset
= LLVMGetParam(ctx
->main_function
, arg_idx
++);
824 ctx
->oc_lds
= LLVMGetParam(ctx
->main_function
, arg_idx
++);
826 ctx
->tes_u
= LLVMGetParam(ctx
->main_function
, arg_idx
++);
827 ctx
->tes_v
= LLVMGetParam(ctx
->main_function
, arg_idx
++);
828 ctx
->tes_rel_patch_id
= LLVMGetParam(ctx
->main_function
, arg_idx
++);
829 ctx
->tes_patch_id
= LLVMGetParam(ctx
->main_function
, arg_idx
++);
831 case MESA_SHADER_GEOMETRY
:
832 set_userdata_location_shader(ctx
, AC_UD_GS_VS_RING_STRIDE_ENTRIES
, user_sgpr_idx
, 2);
834 ctx
->gsvs_ring_stride
= LLVMGetParam(ctx
->main_function
, arg_idx
++);
835 ctx
->gsvs_num_entries
= LLVMGetParam(ctx
->main_function
, arg_idx
++);
836 ctx
->gs2vs_offset
= LLVMGetParam(ctx
->main_function
, arg_idx
++);
837 ctx
->gs_wave_id
= LLVMGetParam(ctx
->main_function
, arg_idx
++);
838 ctx
->gs_vtx_offset
[0] = LLVMGetParam(ctx
->main_function
, arg_idx
++);
839 ctx
->gs_vtx_offset
[1] = LLVMGetParam(ctx
->main_function
, arg_idx
++);
840 ctx
->gs_prim_id
= LLVMGetParam(ctx
->main_function
, arg_idx
++);
841 ctx
->gs_vtx_offset
[2] = LLVMGetParam(ctx
->main_function
, arg_idx
++);
842 ctx
->gs_vtx_offset
[3] = LLVMGetParam(ctx
->main_function
, arg_idx
++);
843 ctx
->gs_vtx_offset
[4] = LLVMGetParam(ctx
->main_function
, arg_idx
++);
844 ctx
->gs_vtx_offset
[5] = LLVMGetParam(ctx
->main_function
, arg_idx
++);
845 ctx
->gs_invocation_id
= LLVMGetParam(ctx
->main_function
, arg_idx
++);
847 case MESA_SHADER_FRAGMENT
:
848 set_userdata_location_shader(ctx
, AC_UD_PS_SAMPLE_POS_OFFSET
, user_sgpr_idx
, 1);
850 ctx
->sample_pos_offset
= LLVMGetParam(ctx
->main_function
, arg_idx
++);
851 ctx
->prim_mask
= LLVMGetParam(ctx
->main_function
, arg_idx
++);
852 ctx
->persp_sample
= LLVMGetParam(ctx
->main_function
, arg_idx
++);
853 ctx
->persp_center
= LLVMGetParam(ctx
->main_function
, arg_idx
++);
854 ctx
->persp_centroid
= LLVMGetParam(ctx
->main_function
, arg_idx
++);
856 ctx
->linear_sample
= LLVMGetParam(ctx
->main_function
, arg_idx
++);
857 ctx
->linear_center
= LLVMGetParam(ctx
->main_function
, arg_idx
++);
858 ctx
->linear_centroid
= LLVMGetParam(ctx
->main_function
, arg_idx
++);
859 arg_idx
++; /* line stipple */
860 ctx
->frag_pos
[0] = LLVMGetParam(ctx
->main_function
, arg_idx
++);
861 ctx
->frag_pos
[1] = LLVMGetParam(ctx
->main_function
, arg_idx
++);
862 ctx
->frag_pos
[2] = LLVMGetParam(ctx
->main_function
, arg_idx
++);
863 ctx
->frag_pos
[3] = LLVMGetParam(ctx
->main_function
, arg_idx
++);
864 ctx
->front_face
= LLVMGetParam(ctx
->main_function
, arg_idx
++);
865 ctx
->ancillary
= LLVMGetParam(ctx
->main_function
, arg_idx
++);
866 ctx
->sample_coverage
= LLVMGetParam(ctx
->main_function
, arg_idx
++);
869 unreachable("Shader stage not implemented");
873 static void setup_types(struct nir_to_llvm_context
*ctx
)
875 LLVMValueRef args
[4];
877 ctx
->voidt
= LLVMVoidTypeInContext(ctx
->context
);
878 ctx
->i1
= LLVMIntTypeInContext(ctx
->context
, 1);
879 ctx
->i8
= LLVMIntTypeInContext(ctx
->context
, 8);
880 ctx
->i16
= LLVMIntTypeInContext(ctx
->context
, 16);
881 ctx
->i32
= LLVMIntTypeInContext(ctx
->context
, 32);
882 ctx
->i64
= LLVMIntTypeInContext(ctx
->context
, 64);
883 ctx
->v2i32
= LLVMVectorType(ctx
->i32
, 2);
884 ctx
->v3i32
= LLVMVectorType(ctx
->i32
, 3);
885 ctx
->v4i32
= LLVMVectorType(ctx
->i32
, 4);
886 ctx
->v8i32
= LLVMVectorType(ctx
->i32
, 8);
887 ctx
->f32
= LLVMFloatTypeInContext(ctx
->context
);
888 ctx
->f16
= LLVMHalfTypeInContext(ctx
->context
);
889 ctx
->f64
= LLVMDoubleTypeInContext(ctx
->context
);
890 ctx
->v2f32
= LLVMVectorType(ctx
->f32
, 2);
891 ctx
->v4f32
= LLVMVectorType(ctx
->f32
, 4);
892 ctx
->v16i8
= LLVMVectorType(ctx
->i8
, 16);
894 ctx
->i1false
= LLVMConstInt(ctx
->i1
, 0, false);
895 ctx
->i1true
= LLVMConstInt(ctx
->i1
, 1, false);
896 ctx
->i32zero
= LLVMConstInt(ctx
->i32
, 0, false);
897 ctx
->i32one
= LLVMConstInt(ctx
->i32
, 1, false);
898 ctx
->f32zero
= LLVMConstReal(ctx
->f32
, 0.0);
899 ctx
->f32one
= LLVMConstReal(ctx
->f32
, 1.0);
901 args
[0] = ctx
->f32zero
;
902 args
[1] = ctx
->f32zero
;
903 args
[2] = ctx
->f32zero
;
904 args
[3] = ctx
->f32one
;
905 ctx
->v4f32empty
= LLVMConstVector(args
, 4);
907 ctx
->uniform_md_kind
=
908 LLVMGetMDKindIDInContext(ctx
->context
, "amdgpu.uniform", 14);
909 ctx
->empty_md
= LLVMMDNodeInContext(ctx
->context
, NULL
, 0);
911 args
[0] = LLVMConstReal(ctx
->f32
, 2.5);
914 static int get_llvm_num_components(LLVMValueRef value
)
916 LLVMTypeRef type
= LLVMTypeOf(value
);
917 unsigned num_components
= LLVMGetTypeKind(type
) == LLVMVectorTypeKind
918 ? LLVMGetVectorSize(type
)
920 return num_components
;
923 static LLVMValueRef
llvm_extract_elem(struct nir_to_llvm_context
*ctx
,
927 int count
= get_llvm_num_components(value
);
929 assert(index
< count
);
933 return LLVMBuildExtractElement(ctx
->builder
, value
,
934 LLVMConstInt(ctx
->i32
, index
, false), "");
937 static LLVMValueRef
trim_vector(struct nir_to_llvm_context
*ctx
,
938 LLVMValueRef value
, unsigned count
)
940 unsigned num_components
= get_llvm_num_components(value
);
941 if (count
== num_components
)
944 LLVMValueRef masks
[] = {
945 LLVMConstInt(ctx
->i32
, 0, false), LLVMConstInt(ctx
->i32
, 1, false),
946 LLVMConstInt(ctx
->i32
, 2, false), LLVMConstInt(ctx
->i32
, 3, false)};
949 return LLVMBuildExtractElement(ctx
->builder
, value
, masks
[0],
952 LLVMValueRef swizzle
= LLVMConstVector(masks
, count
);
953 return LLVMBuildShuffleVector(ctx
->builder
, value
, value
, swizzle
, "");
957 build_store_values_extended(struct nir_to_llvm_context
*ctx
,
958 LLVMValueRef
*values
,
959 unsigned value_count
,
960 unsigned value_stride
,
963 LLVMBuilderRef builder
= ctx
->builder
;
966 if (value_count
== 1) {
967 LLVMBuildStore(builder
, vec
, values
[0]);
971 for (i
= 0; i
< value_count
; i
++) {
972 LLVMValueRef ptr
= values
[i
* value_stride
];
973 LLVMValueRef index
= LLVMConstInt(ctx
->i32
, i
, false);
974 LLVMValueRef value
= LLVMBuildExtractElement(builder
, vec
, index
, "");
975 LLVMBuildStore(builder
, value
, ptr
);
979 static LLVMTypeRef
get_def_type(struct nir_to_llvm_context
*ctx
,
982 LLVMTypeRef type
= LLVMIntTypeInContext(ctx
->context
, def
->bit_size
);
983 if (def
->num_components
> 1) {
984 type
= LLVMVectorType(type
, def
->num_components
);
989 static LLVMValueRef
get_src(struct nir_to_llvm_context
*ctx
, nir_src src
)
992 struct hash_entry
*entry
= _mesa_hash_table_search(ctx
->defs
, src
.ssa
);
993 return (LLVMValueRef
)entry
->data
;
997 static LLVMBasicBlockRef
get_block(struct nir_to_llvm_context
*ctx
,
1000 struct hash_entry
*entry
= _mesa_hash_table_search(ctx
->defs
, b
);
1001 return (LLVMBasicBlockRef
)entry
->data
;
1004 static LLVMValueRef
get_alu_src(struct nir_to_llvm_context
*ctx
,
1006 unsigned num_components
)
1008 LLVMValueRef value
= get_src(ctx
, src
.src
);
1009 bool need_swizzle
= false;
1012 LLVMTypeRef type
= LLVMTypeOf(value
);
1013 unsigned src_components
= LLVMGetTypeKind(type
) == LLVMVectorTypeKind
1014 ? LLVMGetVectorSize(type
)
1017 for (unsigned i
= 0; i
< num_components
; ++i
) {
1018 assert(src
.swizzle
[i
] < src_components
);
1019 if (src
.swizzle
[i
] != i
)
1020 need_swizzle
= true;
1023 if (need_swizzle
|| num_components
!= src_components
) {
1024 LLVMValueRef masks
[] = {
1025 LLVMConstInt(ctx
->i32
, src
.swizzle
[0], false),
1026 LLVMConstInt(ctx
->i32
, src
.swizzle
[1], false),
1027 LLVMConstInt(ctx
->i32
, src
.swizzle
[2], false),
1028 LLVMConstInt(ctx
->i32
, src
.swizzle
[3], false)};
1030 if (src_components
> 1 && num_components
== 1) {
1031 value
= LLVMBuildExtractElement(ctx
->builder
, value
,
1033 } else if (src_components
== 1 && num_components
> 1) {
1034 LLVMValueRef values
[] = {value
, value
, value
, value
};
1035 value
= ac_build_gather_values(&ctx
->ac
, values
, num_components
);
1037 LLVMValueRef swizzle
= LLVMConstVector(masks
, num_components
);
1038 value
= LLVMBuildShuffleVector(ctx
->builder
, value
, value
,
1042 assert(!src
.negate
);
1047 static LLVMValueRef
emit_int_cmp(struct nir_to_llvm_context
*ctx
,
1048 LLVMIntPredicate pred
, LLVMValueRef src0
,
1051 LLVMValueRef result
= LLVMBuildICmp(ctx
->builder
, pred
, src0
, src1
, "");
1052 return LLVMBuildSelect(ctx
->builder
, result
,
1053 LLVMConstInt(ctx
->i32
, 0xFFFFFFFF, false),
1054 LLVMConstInt(ctx
->i32
, 0, false), "");
1057 static LLVMValueRef
emit_float_cmp(struct nir_to_llvm_context
*ctx
,
1058 LLVMRealPredicate pred
, LLVMValueRef src0
,
1061 LLVMValueRef result
;
1062 src0
= to_float(ctx
, src0
);
1063 src1
= to_float(ctx
, src1
);
1064 result
= LLVMBuildFCmp(ctx
->builder
, pred
, src0
, src1
, "");
1065 return LLVMBuildSelect(ctx
->builder
, result
,
1066 LLVMConstInt(ctx
->i32
, 0xFFFFFFFF, false),
1067 LLVMConstInt(ctx
->i32
, 0, false), "");
1070 static LLVMValueRef
emit_intrin_1f_param(struct nir_to_llvm_context
*ctx
,
1072 LLVMTypeRef result_type
,
1076 LLVMValueRef params
[] = {
1077 to_float(ctx
, src0
),
1080 sprintf(name
, "%s.f%d", intrin
, get_elem_bits(ctx
, result_type
));
1081 return ac_build_intrinsic(&ctx
->ac
, name
, result_type
, params
, 1, AC_FUNC_ATTR_READNONE
);
1084 static LLVMValueRef
emit_intrin_2f_param(struct nir_to_llvm_context
*ctx
,
1086 LLVMTypeRef result_type
,
1087 LLVMValueRef src0
, LLVMValueRef src1
)
1090 LLVMValueRef params
[] = {
1091 to_float(ctx
, src0
),
1092 to_float(ctx
, src1
),
1095 sprintf(name
, "%s.f%d", intrin
, get_elem_bits(ctx
, result_type
));
1096 return ac_build_intrinsic(&ctx
->ac
, name
, result_type
, params
, 2, AC_FUNC_ATTR_READNONE
);
1099 static LLVMValueRef
emit_intrin_3f_param(struct nir_to_llvm_context
*ctx
,
1101 LLVMTypeRef result_type
,
1102 LLVMValueRef src0
, LLVMValueRef src1
, LLVMValueRef src2
)
1105 LLVMValueRef params
[] = {
1106 to_float(ctx
, src0
),
1107 to_float(ctx
, src1
),
1108 to_float(ctx
, src2
),
1111 sprintf(name
, "%s.f%d", intrin
, get_elem_bits(ctx
, result_type
));
1112 return ac_build_intrinsic(&ctx
->ac
, name
, result_type
, params
, 3, AC_FUNC_ATTR_READNONE
);
1115 static LLVMValueRef
emit_bcsel(struct nir_to_llvm_context
*ctx
,
1116 LLVMValueRef src0
, LLVMValueRef src1
, LLVMValueRef src2
)
1118 LLVMValueRef v
= LLVMBuildICmp(ctx
->builder
, LLVMIntNE
, src0
,
1120 return LLVMBuildSelect(ctx
->builder
, v
, src1
, src2
, "");
1123 static LLVMValueRef
emit_find_lsb(struct nir_to_llvm_context
*ctx
,
1126 LLVMValueRef params
[2] = {
1129 /* The value of 1 means that ffs(x=0) = undef, so LLVM won't
1130 * add special code to check for x=0. The reason is that
1131 * the LLVM behavior for x=0 is different from what we
1134 * The hardware already implements the correct behavior.
1136 LLVMConstInt(ctx
->i32
, 1, false),
1138 return ac_build_intrinsic(&ctx
->ac
, "llvm.cttz.i32", ctx
->i32
, params
, 2, AC_FUNC_ATTR_READNONE
);
1141 static LLVMValueRef
emit_ifind_msb(struct nir_to_llvm_context
*ctx
,
1144 return ac_build_imsb(&ctx
->ac
, src0
, ctx
->i32
);
1147 static LLVMValueRef
emit_ufind_msb(struct nir_to_llvm_context
*ctx
,
1150 return ac_build_umsb(&ctx
->ac
, src0
, ctx
->i32
);
1153 static LLVMValueRef
emit_minmax_int(struct nir_to_llvm_context
*ctx
,
1154 LLVMIntPredicate pred
,
1155 LLVMValueRef src0
, LLVMValueRef src1
)
1157 return LLVMBuildSelect(ctx
->builder
,
1158 LLVMBuildICmp(ctx
->builder
, pred
, src0
, src1
, ""),
1163 static LLVMValueRef
emit_iabs(struct nir_to_llvm_context
*ctx
,
1166 return emit_minmax_int(ctx
, LLVMIntSGT
, src0
,
1167 LLVMBuildNeg(ctx
->builder
, src0
, ""));
1170 static LLVMValueRef
emit_fsign(struct nir_to_llvm_context
*ctx
,
1173 LLVMValueRef cmp
, val
;
1175 cmp
= LLVMBuildFCmp(ctx
->builder
, LLVMRealOGT
, src0
, ctx
->f32zero
, "");
1176 val
= LLVMBuildSelect(ctx
->builder
, cmp
, ctx
->f32one
, src0
, "");
1177 cmp
= LLVMBuildFCmp(ctx
->builder
, LLVMRealOGE
, val
, ctx
->f32zero
, "");
1178 val
= LLVMBuildSelect(ctx
->builder
, cmp
, val
, LLVMConstReal(ctx
->f32
, -1.0), "");
1182 static LLVMValueRef
emit_isign(struct nir_to_llvm_context
*ctx
,
1185 LLVMValueRef cmp
, val
;
1187 cmp
= LLVMBuildICmp(ctx
->builder
, LLVMIntSGT
, src0
, ctx
->i32zero
, "");
1188 val
= LLVMBuildSelect(ctx
->builder
, cmp
, ctx
->i32one
, src0
, "");
1189 cmp
= LLVMBuildICmp(ctx
->builder
, LLVMIntSGE
, val
, ctx
->i32zero
, "");
1190 val
= LLVMBuildSelect(ctx
->builder
, cmp
, val
, LLVMConstInt(ctx
->i32
, -1, true), "");
1194 static LLVMValueRef
emit_ffract(struct nir_to_llvm_context
*ctx
,
1197 const char *intr
= "llvm.floor.f32";
1198 LLVMValueRef fsrc0
= to_float(ctx
, src0
);
1199 LLVMValueRef params
[] = {
1202 LLVMValueRef floor
= ac_build_intrinsic(&ctx
->ac
, intr
,
1203 ctx
->f32
, params
, 1,
1204 AC_FUNC_ATTR_READNONE
);
1205 return LLVMBuildFSub(ctx
->builder
, fsrc0
, floor
, "");
1208 static LLVMValueRef
emit_uint_carry(struct nir_to_llvm_context
*ctx
,
1210 LLVMValueRef src0
, LLVMValueRef src1
)
1212 LLVMTypeRef ret_type
;
1213 LLVMTypeRef types
[] = { ctx
->i32
, ctx
->i1
};
1215 LLVMValueRef params
[] = { src0
, src1
};
1216 ret_type
= LLVMStructTypeInContext(ctx
->context
, types
,
1219 res
= ac_build_intrinsic(&ctx
->ac
, intrin
, ret_type
,
1220 params
, 2, AC_FUNC_ATTR_READNONE
);
1222 res
= LLVMBuildExtractValue(ctx
->builder
, res
, 1, "");
1223 res
= LLVMBuildZExt(ctx
->builder
, res
, ctx
->i32
, "");
1227 static LLVMValueRef
emit_b2f(struct nir_to_llvm_context
*ctx
,
1230 return LLVMBuildAnd(ctx
->builder
, src0
, LLVMBuildBitCast(ctx
->builder
, LLVMConstReal(ctx
->f32
, 1.0), ctx
->i32
, ""), "");
1233 static LLVMValueRef
emit_umul_high(struct nir_to_llvm_context
*ctx
,
1234 LLVMValueRef src0
, LLVMValueRef src1
)
1236 LLVMValueRef dst64
, result
;
1237 src0
= LLVMBuildZExt(ctx
->builder
, src0
, ctx
->i64
, "");
1238 src1
= LLVMBuildZExt(ctx
->builder
, src1
, ctx
->i64
, "");
1240 dst64
= LLVMBuildMul(ctx
->builder
, src0
, src1
, "");
1241 dst64
= LLVMBuildLShr(ctx
->builder
, dst64
, LLVMConstInt(ctx
->i64
, 32, false), "");
1242 result
= LLVMBuildTrunc(ctx
->builder
, dst64
, ctx
->i32
, "");
1246 static LLVMValueRef
emit_imul_high(struct nir_to_llvm_context
*ctx
,
1247 LLVMValueRef src0
, LLVMValueRef src1
)
1249 LLVMValueRef dst64
, result
;
1250 src0
= LLVMBuildSExt(ctx
->builder
, src0
, ctx
->i64
, "");
1251 src1
= LLVMBuildSExt(ctx
->builder
, src1
, ctx
->i64
, "");
1253 dst64
= LLVMBuildMul(ctx
->builder
, src0
, src1
, "");
1254 dst64
= LLVMBuildAShr(ctx
->builder
, dst64
, LLVMConstInt(ctx
->i64
, 32, false), "");
1255 result
= LLVMBuildTrunc(ctx
->builder
, dst64
, ctx
->i32
, "");
1259 static LLVMValueRef
emit_bitfield_extract(struct nir_to_llvm_context
*ctx
,
1261 LLVMValueRef srcs
[3])
1263 LLVMValueRef result
;
1264 LLVMValueRef icond
= LLVMBuildICmp(ctx
->builder
, LLVMIntEQ
, srcs
[2], LLVMConstInt(ctx
->i32
, 32, false), "");
1266 result
= ac_build_bfe(&ctx
->ac
, srcs
[0], srcs
[1], srcs
[2], is_signed
);
1267 result
= LLVMBuildSelect(ctx
->builder
, icond
, srcs
[0], result
, "");
1271 static LLVMValueRef
emit_bitfield_insert(struct nir_to_llvm_context
*ctx
,
1272 LLVMValueRef src0
, LLVMValueRef src1
,
1273 LLVMValueRef src2
, LLVMValueRef src3
)
1275 LLVMValueRef bfi_args
[3], result
;
1277 bfi_args
[0] = LLVMBuildShl(ctx
->builder
,
1278 LLVMBuildSub(ctx
->builder
,
1279 LLVMBuildShl(ctx
->builder
,
1284 bfi_args
[1] = LLVMBuildShl(ctx
->builder
, src1
, src2
, "");
1287 LLVMValueRef icond
= LLVMBuildICmp(ctx
->builder
, LLVMIntEQ
, src3
, LLVMConstInt(ctx
->i32
, 32, false), "");
1290 * (arg0 & arg1) | (~arg0 & arg2) = arg2 ^ (arg0 & (arg1 ^ arg2)
1291 * Use the right-hand side, which the LLVM backend can convert to V_BFI.
1293 result
= LLVMBuildXor(ctx
->builder
, bfi_args
[2],
1294 LLVMBuildAnd(ctx
->builder
, bfi_args
[0],
1295 LLVMBuildXor(ctx
->builder
, bfi_args
[1], bfi_args
[2], ""), ""), "");
1297 result
= LLVMBuildSelect(ctx
->builder
, icond
, src1
, result
, "");
1301 static LLVMValueRef
emit_pack_half_2x16(struct nir_to_llvm_context
*ctx
,
1304 LLVMValueRef const16
= LLVMConstInt(ctx
->i32
, 16, false);
1306 LLVMValueRef comp
[2];
1308 src0
= to_float(ctx
, src0
);
1309 comp
[0] = LLVMBuildExtractElement(ctx
->builder
, src0
, ctx
->i32zero
, "");
1310 comp
[1] = LLVMBuildExtractElement(ctx
->builder
, src0
, ctx
->i32one
, "");
1311 for (i
= 0; i
< 2; i
++) {
1312 comp
[i
] = LLVMBuildFPTrunc(ctx
->builder
, comp
[i
], ctx
->f16
, "");
1313 comp
[i
] = LLVMBuildBitCast(ctx
->builder
, comp
[i
], ctx
->i16
, "");
1314 comp
[i
] = LLVMBuildZExt(ctx
->builder
, comp
[i
], ctx
->i32
, "");
1317 comp
[1] = LLVMBuildShl(ctx
->builder
, comp
[1], const16
, "");
1318 comp
[0] = LLVMBuildOr(ctx
->builder
, comp
[0], comp
[1], "");
1323 static LLVMValueRef
emit_unpack_half_2x16(struct nir_to_llvm_context
*ctx
,
1326 LLVMValueRef const16
= LLVMConstInt(ctx
->i32
, 16, false);
1327 LLVMValueRef temps
[2], result
, val
;
1330 for (i
= 0; i
< 2; i
++) {
1331 val
= i
== 1 ? LLVMBuildLShr(ctx
->builder
, src0
, const16
, "") : src0
;
1332 val
= LLVMBuildTrunc(ctx
->builder
, val
, ctx
->i16
, "");
1333 val
= LLVMBuildBitCast(ctx
->builder
, val
, ctx
->f16
, "");
1334 temps
[i
] = LLVMBuildFPExt(ctx
->builder
, val
, ctx
->f32
, "");
1337 result
= LLVMBuildInsertElement(ctx
->builder
, LLVMGetUndef(ctx
->v2f32
), temps
[0],
1339 result
= LLVMBuildInsertElement(ctx
->builder
, result
, temps
[1],
1344 static LLVMValueRef
emit_ddxy(struct nir_to_llvm_context
*ctx
,
1350 LLVMValueRef result
;
1351 ctx
->has_ddxy
= true;
1353 if (!ctx
->lds
&& !ctx
->has_ds_bpermute
)
1354 ctx
->lds
= LLVMAddGlobalInAddressSpace(ctx
->module
,
1355 LLVMArrayType(ctx
->i32
, 64),
1356 "ddxy_lds", LOCAL_ADDR_SPACE
);
1358 if (op
== nir_op_fddx_fine
|| op
== nir_op_fddx
)
1359 mask
= AC_TID_MASK_LEFT
;
1360 else if (op
== nir_op_fddy_fine
|| op
== nir_op_fddy
)
1361 mask
= AC_TID_MASK_TOP
;
1363 mask
= AC_TID_MASK_TOP_LEFT
;
1365 /* for DDX we want to next X pixel, DDY next Y pixel. */
1366 if (op
== nir_op_fddx_fine
||
1367 op
== nir_op_fddx_coarse
||
1373 result
= ac_build_ddxy(&ctx
->ac
, ctx
->has_ds_bpermute
,
1374 mask
, idx
, ctx
->lds
,
1380 * this takes an I,J coordinate pair,
1381 * and works out the X and Y derivatives.
1382 * it returns DDX(I), DDX(J), DDY(I), DDY(J).
1384 static LLVMValueRef
emit_ddxy_interp(
1385 struct nir_to_llvm_context
*ctx
,
1386 LLVMValueRef interp_ij
)
1388 LLVMValueRef result
[4], a
;
1391 for (i
= 0; i
< 2; i
++) {
1392 a
= LLVMBuildExtractElement(ctx
->builder
, interp_ij
,
1393 LLVMConstInt(ctx
->i32
, i
, false), "");
1394 result
[i
] = emit_ddxy(ctx
, nir_op_fddx
, a
);
1395 result
[2+i
] = emit_ddxy(ctx
, nir_op_fddy
, a
);
1397 return ac_build_gather_values(&ctx
->ac
, result
, 4);
1400 static void visit_alu(struct nir_to_llvm_context
*ctx
, nir_alu_instr
*instr
)
1402 LLVMValueRef src
[4], result
= NULL
;
1403 unsigned num_components
= instr
->dest
.dest
.ssa
.num_components
;
1404 unsigned src_components
;
1405 LLVMTypeRef def_type
= get_def_type(ctx
, &instr
->dest
.dest
.ssa
);
1407 assert(nir_op_infos
[instr
->op
].num_inputs
<= ARRAY_SIZE(src
));
1408 switch (instr
->op
) {
1414 case nir_op_pack_half_2x16
:
1417 case nir_op_unpack_half_2x16
:
1421 src_components
= num_components
;
1424 for (unsigned i
= 0; i
< nir_op_infos
[instr
->op
].num_inputs
; i
++)
1425 src
[i
] = get_alu_src(ctx
, instr
->src
[i
], src_components
);
1427 switch (instr
->op
) {
1433 src
[0] = to_float(ctx
, src
[0]);
1434 result
= LLVMBuildFNeg(ctx
->builder
, src
[0], "");
1437 result
= LLVMBuildNeg(ctx
->builder
, src
[0], "");
1440 result
= LLVMBuildNot(ctx
->builder
, src
[0], "");
1443 result
= LLVMBuildAdd(ctx
->builder
, src
[0], src
[1], "");
1446 src
[0] = to_float(ctx
, src
[0]);
1447 src
[1] = to_float(ctx
, src
[1]);
1448 result
= LLVMBuildFAdd(ctx
->builder
, src
[0], src
[1], "");
1451 src
[0] = to_float(ctx
, src
[0]);
1452 src
[1] = to_float(ctx
, src
[1]);
1453 result
= LLVMBuildFSub(ctx
->builder
, src
[0], src
[1], "");
1456 result
= LLVMBuildSub(ctx
->builder
, src
[0], src
[1], "");
1459 result
= LLVMBuildMul(ctx
->builder
, src
[0], src
[1], "");
1462 result
= LLVMBuildSRem(ctx
->builder
, src
[0], src
[1], "");
1465 result
= LLVMBuildURem(ctx
->builder
, src
[0], src
[1], "");
1468 src
[0] = to_float(ctx
, src
[0]);
1469 src
[1] = to_float(ctx
, src
[1]);
1470 result
= ac_build_fdiv(&ctx
->ac
, src
[0], src
[1]);
1471 result
= emit_intrin_1f_param(ctx
, "llvm.floor",
1472 to_float_type(ctx
, def_type
), result
);
1473 result
= LLVMBuildFMul(ctx
->builder
, src
[1] , result
, "");
1474 result
= LLVMBuildFSub(ctx
->builder
, src
[0], result
, "");
1477 src
[0] = to_float(ctx
, src
[0]);
1478 src
[1] = to_float(ctx
, src
[1]);
1479 result
= LLVMBuildFRem(ctx
->builder
, src
[0], src
[1], "");
1482 result
= LLVMBuildSRem(ctx
->builder
, src
[0], src
[1], "");
1485 result
= LLVMBuildSDiv(ctx
->builder
, src
[0], src
[1], "");
1488 result
= LLVMBuildUDiv(ctx
->builder
, src
[0], src
[1], "");
1491 src
[0] = to_float(ctx
, src
[0]);
1492 src
[1] = to_float(ctx
, src
[1]);
1493 result
= LLVMBuildFMul(ctx
->builder
, src
[0], src
[1], "");
1496 src
[0] = to_float(ctx
, src
[0]);
1497 src
[1] = to_float(ctx
, src
[1]);
1498 result
= ac_build_fdiv(&ctx
->ac
, src
[0], src
[1]);
1501 src
[0] = to_float(ctx
, src
[0]);
1502 result
= ac_build_fdiv(&ctx
->ac
, ctx
->f32one
, src
[0]);
1505 result
= LLVMBuildAnd(ctx
->builder
, src
[0], src
[1], "");
1508 result
= LLVMBuildOr(ctx
->builder
, src
[0], src
[1], "");
1511 result
= LLVMBuildXor(ctx
->builder
, src
[0], src
[1], "");
1514 result
= LLVMBuildShl(ctx
->builder
, src
[0], src
[1], "");
1517 result
= LLVMBuildAShr(ctx
->builder
, src
[0], src
[1], "");
1520 result
= LLVMBuildLShr(ctx
->builder
, src
[0], src
[1], "");
1523 result
= emit_int_cmp(ctx
, LLVMIntSLT
, src
[0], src
[1]);
1526 result
= emit_int_cmp(ctx
, LLVMIntNE
, src
[0], src
[1]);
1529 result
= emit_int_cmp(ctx
, LLVMIntEQ
, src
[0], src
[1]);
1532 result
= emit_int_cmp(ctx
, LLVMIntSGE
, src
[0], src
[1]);
1535 result
= emit_int_cmp(ctx
, LLVMIntULT
, src
[0], src
[1]);
1538 result
= emit_int_cmp(ctx
, LLVMIntUGE
, src
[0], src
[1]);
1541 result
= emit_float_cmp(ctx
, LLVMRealUEQ
, src
[0], src
[1]);
1544 result
= emit_float_cmp(ctx
, LLVMRealUNE
, src
[0], src
[1]);
1547 result
= emit_float_cmp(ctx
, LLVMRealULT
, src
[0], src
[1]);
1550 result
= emit_float_cmp(ctx
, LLVMRealUGE
, src
[0], src
[1]);
1553 result
= emit_intrin_1f_param(ctx
, "llvm.fabs",
1554 to_float_type(ctx
, def_type
), src
[0]);
1557 result
= emit_iabs(ctx
, src
[0]);
1560 result
= emit_minmax_int(ctx
, LLVMIntSGT
, src
[0], src
[1]);
1563 result
= emit_minmax_int(ctx
, LLVMIntSLT
, src
[0], src
[1]);
1566 result
= emit_minmax_int(ctx
, LLVMIntUGT
, src
[0], src
[1]);
1569 result
= emit_minmax_int(ctx
, LLVMIntULT
, src
[0], src
[1]);
1572 result
= emit_isign(ctx
, src
[0]);
1575 src
[0] = to_float(ctx
, src
[0]);
1576 result
= emit_fsign(ctx
, src
[0]);
1579 result
= emit_intrin_1f_param(ctx
, "llvm.floor",
1580 to_float_type(ctx
, def_type
), src
[0]);
1583 result
= emit_intrin_1f_param(ctx
, "llvm.trunc",
1584 to_float_type(ctx
, def_type
), src
[0]);
1587 result
= emit_intrin_1f_param(ctx
, "llvm.ceil",
1588 to_float_type(ctx
, def_type
), src
[0]);
1590 case nir_op_fround_even
:
1591 result
= emit_intrin_1f_param(ctx
, "llvm.rint",
1592 to_float_type(ctx
, def_type
),src
[0]);
1595 result
= emit_ffract(ctx
, src
[0]);
1598 result
= emit_intrin_1f_param(ctx
, "llvm.sin",
1599 to_float_type(ctx
, def_type
), src
[0]);
1602 result
= emit_intrin_1f_param(ctx
, "llvm.cos",
1603 to_float_type(ctx
, def_type
), src
[0]);
1606 result
= emit_intrin_1f_param(ctx
, "llvm.sqrt",
1607 to_float_type(ctx
, def_type
), src
[0]);
1610 result
= emit_intrin_1f_param(ctx
, "llvm.exp2",
1611 to_float_type(ctx
, def_type
), src
[0]);
1614 result
= emit_intrin_1f_param(ctx
, "llvm.log2",
1615 to_float_type(ctx
, def_type
), src
[0]);
1618 result
= emit_intrin_1f_param(ctx
, "llvm.sqrt",
1619 to_float_type(ctx
, def_type
), src
[0]);
1620 result
= ac_build_fdiv(&ctx
->ac
, ctx
->f32one
, result
);
1623 result
= emit_intrin_2f_param(ctx
, "llvm.pow",
1624 to_float_type(ctx
, def_type
), src
[0], src
[1]);
1627 result
= emit_intrin_2f_param(ctx
, "llvm.maxnum",
1628 to_float_type(ctx
, def_type
), src
[0], src
[1]);
1631 result
= emit_intrin_2f_param(ctx
, "llvm.minnum",
1632 to_float_type(ctx
, def_type
), src
[0], src
[1]);
1635 result
= emit_intrin_3f_param(ctx
, "llvm.fma",
1636 to_float_type(ctx
, def_type
), src
[0], src
[1], src
[2]);
1638 case nir_op_ibitfield_extract
:
1639 result
= emit_bitfield_extract(ctx
, true, src
);
1641 case nir_op_ubitfield_extract
:
1642 result
= emit_bitfield_extract(ctx
, false, src
);
1644 case nir_op_bitfield_insert
:
1645 result
= emit_bitfield_insert(ctx
, src
[0], src
[1], src
[2], src
[3]);
1647 case nir_op_bitfield_reverse
:
1648 result
= ac_build_intrinsic(&ctx
->ac
, "llvm.bitreverse.i32", ctx
->i32
, src
, 1, AC_FUNC_ATTR_READNONE
);
1650 case nir_op_bit_count
:
1651 result
= ac_build_intrinsic(&ctx
->ac
, "llvm.ctpop.i32", ctx
->i32
, src
, 1, AC_FUNC_ATTR_READNONE
);
1656 for (unsigned i
= 0; i
< nir_op_infos
[instr
->op
].num_inputs
; i
++)
1657 src
[i
] = to_integer(ctx
, src
[i
]);
1658 result
= ac_build_gather_values(&ctx
->ac
, src
, num_components
);
1662 src
[0] = to_float(ctx
, src
[0]);
1663 result
= LLVMBuildFPToSI(ctx
->builder
, src
[0], def_type
, "");
1667 src
[0] = to_float(ctx
, src
[0]);
1668 result
= LLVMBuildFPToUI(ctx
->builder
, src
[0], def_type
, "");
1672 result
= LLVMBuildSIToFP(ctx
->builder
, src
[0], to_float_type(ctx
, def_type
), "");
1676 result
= LLVMBuildUIToFP(ctx
->builder
, src
[0], to_float_type(ctx
, def_type
), "");
1679 result
= LLVMBuildFPExt(ctx
->builder
, src
[0], to_float_type(ctx
, def_type
), "");
1682 result
= LLVMBuildFPTrunc(ctx
->builder
, src
[0], to_float_type(ctx
, def_type
), "");
1686 if (get_elem_bits(ctx
, LLVMTypeOf(src
[0])) < get_elem_bits(ctx
, def_type
))
1687 result
= LLVMBuildZExt(ctx
->builder
, src
[0], def_type
, "");
1689 result
= LLVMBuildTrunc(ctx
->builder
, src
[0], def_type
, "");
1693 if (get_elem_bits(ctx
, LLVMTypeOf(src
[0])) < get_elem_bits(ctx
, def_type
))
1694 result
= LLVMBuildSExt(ctx
->builder
, src
[0], def_type
, "");
1696 result
= LLVMBuildTrunc(ctx
->builder
, src
[0], def_type
, "");
1699 result
= emit_bcsel(ctx
, src
[0], src
[1], src
[2]);
1701 case nir_op_find_lsb
:
1702 result
= emit_find_lsb(ctx
, src
[0]);
1704 case nir_op_ufind_msb
:
1705 result
= emit_ufind_msb(ctx
, src
[0]);
1707 case nir_op_ifind_msb
:
1708 result
= emit_ifind_msb(ctx
, src
[0]);
1710 case nir_op_uadd_carry
:
1711 result
= emit_uint_carry(ctx
, "llvm.uadd.with.overflow.i32", src
[0], src
[1]);
1713 case nir_op_usub_borrow
:
1714 result
= emit_uint_carry(ctx
, "llvm.usub.with.overflow.i32", src
[0], src
[1]);
1717 result
= emit_b2f(ctx
, src
[0]);
1719 case nir_op_fquantize2f16
:
1720 src
[0] = to_float(ctx
, src
[0]);
1721 result
= LLVMBuildFPTrunc(ctx
->builder
, src
[0], ctx
->f16
, "");
1722 /* need to convert back up to f32 */
1723 result
= LLVMBuildFPExt(ctx
->builder
, result
, ctx
->f32
, "");
1725 case nir_op_umul_high
:
1726 result
= emit_umul_high(ctx
, src
[0], src
[1]);
1728 case nir_op_imul_high
:
1729 result
= emit_imul_high(ctx
, src
[0], src
[1]);
1731 case nir_op_pack_half_2x16
:
1732 result
= emit_pack_half_2x16(ctx
, src
[0]);
1734 case nir_op_unpack_half_2x16
:
1735 result
= emit_unpack_half_2x16(ctx
, src
[0]);
1739 case nir_op_fddx_fine
:
1740 case nir_op_fddy_fine
:
1741 case nir_op_fddx_coarse
:
1742 case nir_op_fddy_coarse
:
1743 result
= emit_ddxy(ctx
, instr
->op
, src
[0]);
1746 fprintf(stderr
, "Unknown NIR alu instr: ");
1747 nir_print_instr(&instr
->instr
, stderr
);
1748 fprintf(stderr
, "\n");
1753 assert(instr
->dest
.dest
.is_ssa
);
1754 result
= to_integer(ctx
, result
);
1755 _mesa_hash_table_insert(ctx
->defs
, &instr
->dest
.dest
.ssa
,
1760 static void visit_load_const(struct nir_to_llvm_context
*ctx
,
1761 nir_load_const_instr
*instr
)
1763 LLVMValueRef values
[4], value
= NULL
;
1764 LLVMTypeRef element_type
=
1765 LLVMIntTypeInContext(ctx
->context
, instr
->def
.bit_size
);
1767 for (unsigned i
= 0; i
< instr
->def
.num_components
; ++i
) {
1768 switch (instr
->def
.bit_size
) {
1770 values
[i
] = LLVMConstInt(element_type
,
1771 instr
->value
.u32
[i
], false);
1774 values
[i
] = LLVMConstInt(element_type
,
1775 instr
->value
.u64
[i
], false);
1779 "unsupported nir load_const bit_size: %d\n",
1780 instr
->def
.bit_size
);
1784 if (instr
->def
.num_components
> 1) {
1785 value
= LLVMConstVector(values
, instr
->def
.num_components
);
1789 _mesa_hash_table_insert(ctx
->defs
, &instr
->def
, value
);
1792 static LLVMValueRef
cast_ptr(struct nir_to_llvm_context
*ctx
, LLVMValueRef ptr
,
1795 int addr_space
= LLVMGetPointerAddressSpace(LLVMTypeOf(ptr
));
1796 return LLVMBuildBitCast(ctx
->builder
, ptr
,
1797 LLVMPointerType(type
, addr_space
), "");
1801 get_buffer_size(struct nir_to_llvm_context
*ctx
, LLVMValueRef descriptor
, bool in_elements
)
1804 LLVMBuildExtractElement(ctx
->builder
, descriptor
,
1805 LLVMConstInt(ctx
->i32
, 2, false), "");
1808 if (ctx
->options
->chip_class
>= VI
&& in_elements
) {
1809 /* On VI, the descriptor contains the size in bytes,
1810 * but TXQ must return the size in elements.
1811 * The stride is always non-zero for resources using TXQ.
1813 LLVMValueRef stride
=
1814 LLVMBuildExtractElement(ctx
->builder
, descriptor
,
1815 LLVMConstInt(ctx
->i32
, 1, false), "");
1816 stride
= LLVMBuildLShr(ctx
->builder
, stride
,
1817 LLVMConstInt(ctx
->i32
, 16, false), "");
1818 stride
= LLVMBuildAnd(ctx
->builder
, stride
,
1819 LLVMConstInt(ctx
->i32
, 0x3fff, false), "");
1821 size
= LLVMBuildUDiv(ctx
->builder
, size
, stride
, "");
1827 * Given the i32 or vNi32 \p type, generate the textual name (e.g. for use with
1830 static void build_int_type_name(
1832 char *buf
, unsigned bufsize
)
1834 assert(bufsize
>= 6);
1836 if (LLVMGetTypeKind(type
) == LLVMVectorTypeKind
)
1837 snprintf(buf
, bufsize
, "v%ui32",
1838 LLVMGetVectorSize(type
));
1843 static LLVMValueRef
radv_lower_gather4_integer(struct nir_to_llvm_context
*ctx
,
1844 struct ac_image_args
*args
,
1845 nir_tex_instr
*instr
)
1847 enum glsl_base_type stype
= glsl_get_sampler_result_type(instr
->texture
->var
->type
);
1848 LLVMValueRef coord
= args
->addr
;
1849 LLVMValueRef half_texel
[2];
1850 LLVMValueRef compare_cube_wa
;
1851 LLVMValueRef result
;
1853 unsigned coord_vgpr_index
= (unsigned)args
->offset
+ (unsigned)args
->compare
;
1857 struct ac_image_args txq_args
= { 0 };
1859 txq_args
.da
= instr
->is_array
|| instr
->sampler_dim
== GLSL_SAMPLER_DIM_CUBE
;
1860 txq_args
.opcode
= ac_image_get_resinfo
;
1861 txq_args
.dmask
= 0xf;
1862 txq_args
.addr
= ctx
->i32zero
;
1863 txq_args
.resource
= args
->resource
;
1864 LLVMValueRef size
= ac_build_image_opcode(&ctx
->ac
, &txq_args
);
1866 for (c
= 0; c
< 2; c
++) {
1867 half_texel
[c
] = LLVMBuildExtractElement(ctx
->builder
, size
,
1868 LLVMConstInt(ctx
->i32
, c
, false), "");
1869 half_texel
[c
] = LLVMBuildUIToFP(ctx
->builder
, half_texel
[c
], ctx
->f32
, "");
1870 half_texel
[c
] = ac_build_fdiv(&ctx
->ac
, ctx
->f32one
, half_texel
[c
]);
1871 half_texel
[c
] = LLVMBuildFMul(ctx
->builder
, half_texel
[c
],
1872 LLVMConstReal(ctx
->f32
, -0.5), "");
1876 LLVMValueRef orig_coords
= args
->addr
;
1878 for (c
= 0; c
< 2; c
++) {
1880 LLVMValueRef index
= LLVMConstInt(ctx
->i32
, coord_vgpr_index
+ c
, 0);
1881 tmp
= LLVMBuildExtractElement(ctx
->builder
, coord
, index
, "");
1882 tmp
= LLVMBuildBitCast(ctx
->builder
, tmp
, ctx
->f32
, "");
1883 tmp
= LLVMBuildFAdd(ctx
->builder
, tmp
, half_texel
[c
], "");
1884 tmp
= LLVMBuildBitCast(ctx
->builder
, tmp
, ctx
->i32
, "");
1885 coord
= LLVMBuildInsertElement(ctx
->builder
, coord
, tmp
, index
, "");
1890 * Apparantly cube has issue with integer types that the workaround doesn't solve,
1891 * so this tests if the format is 8_8_8_8 and an integer type do an alternate
1892 * workaround by sampling using a scaled type and converting.
1893 * This is taken from amdgpu-pro shaders.
1895 /* NOTE this produces some ugly code compared to amdgpu-pro,
1896 * LLVM ends up dumping SGPRs into VGPRs to deal with the compare/select,
1897 * and then reads them back. -pro generates two selects,
1898 * one s_cmp for the descriptor rewriting
1899 * one v_cmp for the coordinate and result changes.
1901 if (instr
->sampler_dim
== GLSL_SAMPLER_DIM_CUBE
) {
1902 LLVMValueRef tmp
, tmp2
;
1904 /* workaround 8/8/8/8 uint/sint cube gather bug */
1905 /* first detect it then change to a scaled read and f2i */
1906 tmp
= LLVMBuildExtractElement(ctx
->builder
, args
->resource
, ctx
->i32one
, "");
1909 /* extract the DATA_FORMAT */
1910 tmp
= ac_build_bfe(&ctx
->ac
, tmp
, LLVMConstInt(ctx
->i32
, 20, false),
1911 LLVMConstInt(ctx
->i32
, 6, false), false);
1913 /* is the DATA_FORMAT == 8_8_8_8 */
1914 compare_cube_wa
= LLVMBuildICmp(ctx
->builder
, LLVMIntEQ
, tmp
, LLVMConstInt(ctx
->i32
, V_008F14_IMG_DATA_FORMAT_8_8_8_8
, false), "");
1916 if (stype
== GLSL_TYPE_UINT
)
1917 /* Create a NUM FORMAT - 0x2 or 0x4 - USCALED or UINT */
1918 tmp
= LLVMBuildSelect(ctx
->builder
, compare_cube_wa
, LLVMConstInt(ctx
->i32
, 0x8000000, false),
1919 LLVMConstInt(ctx
->i32
, 0x10000000, false), "");
1921 /* Create a NUM FORMAT - 0x3 or 0x5 - SSCALED or SINT */
1922 tmp
= LLVMBuildSelect(ctx
->builder
, compare_cube_wa
, LLVMConstInt(ctx
->i32
, 0xc000000, false),
1923 LLVMConstInt(ctx
->i32
, 0x14000000, false), "");
1925 /* replace the NUM FORMAT in the descriptor */
1926 tmp2
= LLVMBuildAnd(ctx
->builder
, tmp2
, LLVMConstInt(ctx
->i32
, C_008F14_NUM_FORMAT_GFX6
, false), "");
1927 tmp2
= LLVMBuildOr(ctx
->builder
, tmp2
, tmp
, "");
1929 args
->resource
= LLVMBuildInsertElement(ctx
->builder
, args
->resource
, tmp2
, ctx
->i32one
, "");
1931 /* don't modify the coordinates for this case */
1932 coord
= LLVMBuildSelect(ctx
->builder
, compare_cube_wa
, orig_coords
, coord
, "");
1935 result
= ac_build_image_opcode(&ctx
->ac
, args
);
1937 if (instr
->sampler_dim
== GLSL_SAMPLER_DIM_CUBE
) {
1938 LLVMValueRef tmp
, tmp2
;
1940 /* if the cube workaround is in place, f2i the result. */
1941 for (c
= 0; c
< 4; c
++) {
1942 tmp
= LLVMBuildExtractElement(ctx
->builder
, result
, LLVMConstInt(ctx
->i32
, c
, false), "");
1943 if (stype
== GLSL_TYPE_UINT
)
1944 tmp2
= LLVMBuildFPToUI(ctx
->builder
, tmp
, ctx
->i32
, "");
1946 tmp2
= LLVMBuildFPToSI(ctx
->builder
, tmp
, ctx
->i32
, "");
1947 tmp
= LLVMBuildBitCast(ctx
->builder
, tmp
, ctx
->i32
, "");
1948 tmp2
= LLVMBuildBitCast(ctx
->builder
, tmp2
, ctx
->i32
, "");
1949 tmp
= LLVMBuildSelect(ctx
->builder
, compare_cube_wa
, tmp2
, tmp
, "");
1950 tmp
= LLVMBuildBitCast(ctx
->builder
, tmp
, ctx
->f32
, "");
1951 result
= LLVMBuildInsertElement(ctx
->builder
, result
, tmp
, LLVMConstInt(ctx
->i32
, c
, false), "");
1957 static LLVMValueRef
build_tex_intrinsic(struct nir_to_llvm_context
*ctx
,
1958 nir_tex_instr
*instr
,
1959 struct ac_image_args
*args
)
1961 if (instr
->sampler_dim
== GLSL_SAMPLER_DIM_BUF
) {
1962 return ac_build_buffer_load_format(&ctx
->ac
,
1965 LLVMConstInt(ctx
->i32
, 0, false),
1969 args
->opcode
= ac_image_sample
;
1970 args
->compare
= instr
->is_shadow
;
1972 switch (instr
->op
) {
1974 case nir_texop_txf_ms
:
1975 case nir_texop_samples_identical
:
1976 args
->opcode
= instr
->sampler_dim
== GLSL_SAMPLER_DIM_MS
? ac_image_load
: ac_image_load_mip
;
1977 args
->compare
= false;
1978 args
->offset
= false;
1987 case nir_texop_query_levels
:
1988 args
->opcode
= ac_image_get_resinfo
;
1991 if (ctx
->stage
!= MESA_SHADER_FRAGMENT
)
1992 args
->level_zero
= true;
1998 args
->opcode
= ac_image_gather4
;
1999 args
->level_zero
= true;
2002 args
->opcode
= ac_image_get_lod
;
2003 args
->compare
= false;
2004 args
->offset
= false;
2010 if (instr
->op
== nir_texop_tg4
) {
2011 enum glsl_base_type stype
= glsl_get_sampler_result_type(instr
->texture
->var
->type
);
2012 if (stype
== GLSL_TYPE_UINT
|| stype
== GLSL_TYPE_INT
) {
2013 return radv_lower_gather4_integer(ctx
, args
, instr
);
2016 return ac_build_image_opcode(&ctx
->ac
, args
);
2019 static LLVMValueRef
visit_vulkan_resource_index(struct nir_to_llvm_context
*ctx
,
2020 nir_intrinsic_instr
*instr
)
2022 LLVMValueRef index
= get_src(ctx
, instr
->src
[0]);
2023 unsigned desc_set
= nir_intrinsic_desc_set(instr
);
2024 unsigned binding
= nir_intrinsic_binding(instr
);
2025 LLVMValueRef desc_ptr
= ctx
->descriptor_sets
[desc_set
];
2026 struct radv_pipeline_layout
*pipeline_layout
= ctx
->options
->layout
;
2027 struct radv_descriptor_set_layout
*layout
= pipeline_layout
->set
[desc_set
].layout
;
2028 unsigned base_offset
= layout
->binding
[binding
].offset
;
2029 LLVMValueRef offset
, stride
;
2031 if (layout
->binding
[binding
].type
== VK_DESCRIPTOR_TYPE_UNIFORM_BUFFER_DYNAMIC
||
2032 layout
->binding
[binding
].type
== VK_DESCRIPTOR_TYPE_STORAGE_BUFFER_DYNAMIC
) {
2033 unsigned idx
= pipeline_layout
->set
[desc_set
].dynamic_offset_start
+
2034 layout
->binding
[binding
].dynamic_offset_offset
;
2035 desc_ptr
= ctx
->push_constants
;
2036 base_offset
= pipeline_layout
->push_constant_size
+ 16 * idx
;
2037 stride
= LLVMConstInt(ctx
->i32
, 16, false);
2039 stride
= LLVMConstInt(ctx
->i32
, layout
->binding
[binding
].size
, false);
2041 offset
= LLVMConstInt(ctx
->i32
, base_offset
, false);
2042 index
= LLVMBuildMul(ctx
->builder
, index
, stride
, "");
2043 offset
= LLVMBuildAdd(ctx
->builder
, offset
, index
, "");
2045 desc_ptr
= ac_build_gep0(&ctx
->ac
, desc_ptr
, offset
);
2046 desc_ptr
= cast_ptr(ctx
, desc_ptr
, ctx
->v4i32
);
2047 LLVMSetMetadata(desc_ptr
, ctx
->uniform_md_kind
, ctx
->empty_md
);
2049 return LLVMBuildLoad(ctx
->builder
, desc_ptr
, "");
2052 static LLVMValueRef
visit_load_push_constant(struct nir_to_llvm_context
*ctx
,
2053 nir_intrinsic_instr
*instr
)
2055 LLVMValueRef ptr
, addr
;
2057 addr
= LLVMConstInt(ctx
->i32
, nir_intrinsic_base(instr
), 0);
2058 addr
= LLVMBuildAdd(ctx
->builder
, addr
, get_src(ctx
, instr
->src
[0]), "");
2060 ptr
= ac_build_gep0(&ctx
->ac
, ctx
->push_constants
, addr
);
2061 ptr
= cast_ptr(ctx
, ptr
, get_def_type(ctx
, &instr
->dest
.ssa
));
2063 return LLVMBuildLoad(ctx
->builder
, ptr
, "");
2066 static LLVMValueRef
visit_get_buffer_size(struct nir_to_llvm_context
*ctx
,
2067 nir_intrinsic_instr
*instr
)
2069 LLVMValueRef desc
= get_src(ctx
, instr
->src
[0]);
2071 return get_buffer_size(ctx
, desc
, false);
2073 static void visit_store_ssbo(struct nir_to_llvm_context
*ctx
,
2074 nir_intrinsic_instr
*instr
)
2076 const char *store_name
;
2077 LLVMValueRef src_data
= get_src(ctx
, instr
->src
[0]);
2078 LLVMTypeRef data_type
= ctx
->f32
;
2079 int elem_size_mult
= get_elem_bits(ctx
, LLVMTypeOf(src_data
)) / 32;
2080 int components_32bit
= elem_size_mult
* instr
->num_components
;
2081 unsigned writemask
= nir_intrinsic_write_mask(instr
);
2082 LLVMValueRef base_data
, base_offset
;
2083 LLVMValueRef params
[6];
2085 if (ctx
->stage
== MESA_SHADER_FRAGMENT
)
2086 ctx
->shader_info
->fs
.writes_memory
= true;
2088 params
[1] = get_src(ctx
, instr
->src
[1]);
2089 params
[2] = LLVMConstInt(ctx
->i32
, 0, false); /* vindex */
2090 params
[4] = ctx
->i1false
; /* glc */
2091 params
[5] = ctx
->i1false
; /* slc */
2093 if (components_32bit
> 1)
2094 data_type
= LLVMVectorType(ctx
->f32
, components_32bit
);
2096 base_data
= to_float(ctx
, src_data
);
2097 base_data
= trim_vector(ctx
, base_data
, instr
->num_components
);
2098 base_data
= LLVMBuildBitCast(ctx
->builder
, base_data
,
2100 base_offset
= get_src(ctx
, instr
->src
[2]); /* voffset */
2104 LLVMValueRef offset
;
2106 u_bit_scan_consecutive_range(&writemask
, &start
, &count
);
2108 /* Due to an LLVM limitation, split 3-element writes
2109 * into a 2-element and a 1-element write. */
2111 writemask
|= 1 << (start
+ 2);
2115 start
*= elem_size_mult
;
2116 count
*= elem_size_mult
;
2119 writemask
|= ((1u << (count
- 4)) - 1u) << (start
+ 4);
2124 store_name
= "llvm.amdgcn.buffer.store.v4f32";
2126 } else if (count
== 2) {
2127 tmp
= LLVMBuildExtractElement(ctx
->builder
,
2128 base_data
, LLVMConstInt(ctx
->i32
, start
, false), "");
2129 data
= LLVMBuildInsertElement(ctx
->builder
, LLVMGetUndef(ctx
->v2f32
), tmp
,
2132 tmp
= LLVMBuildExtractElement(ctx
->builder
,
2133 base_data
, LLVMConstInt(ctx
->i32
, start
+ 1, false), "");
2134 data
= LLVMBuildInsertElement(ctx
->builder
, data
, tmp
,
2136 store_name
= "llvm.amdgcn.buffer.store.v2f32";
2140 if (get_llvm_num_components(base_data
) > 1)
2141 data
= LLVMBuildExtractElement(ctx
->builder
, base_data
,
2142 LLVMConstInt(ctx
->i32
, start
, false), "");
2145 store_name
= "llvm.amdgcn.buffer.store.f32";
2148 offset
= base_offset
;
2150 offset
= LLVMBuildAdd(ctx
->builder
, offset
, LLVMConstInt(ctx
->i32
, start
* 4, false), "");
2154 ac_build_intrinsic(&ctx
->ac
, store_name
,
2155 ctx
->voidt
, params
, 6, 0);
2159 static LLVMValueRef
visit_atomic_ssbo(struct nir_to_llvm_context
*ctx
,
2160 nir_intrinsic_instr
*instr
)
2163 LLVMValueRef params
[6];
2165 if (ctx
->stage
== MESA_SHADER_FRAGMENT
)
2166 ctx
->shader_info
->fs
.writes_memory
= true;
2168 if (instr
->intrinsic
== nir_intrinsic_ssbo_atomic_comp_swap
) {
2169 params
[arg_count
++] = llvm_extract_elem(ctx
, get_src(ctx
, instr
->src
[3]), 0);
2171 params
[arg_count
++] = llvm_extract_elem(ctx
, get_src(ctx
, instr
->src
[2]), 0);
2172 params
[arg_count
++] = get_src(ctx
, instr
->src
[0]);
2173 params
[arg_count
++] = LLVMConstInt(ctx
->i32
, 0, false); /* vindex */
2174 params
[arg_count
++] = get_src(ctx
, instr
->src
[1]); /* voffset */
2175 params
[arg_count
++] = ctx
->i1false
; /* slc */
2177 switch (instr
->intrinsic
) {
2178 case nir_intrinsic_ssbo_atomic_add
:
2179 name
= "llvm.amdgcn.buffer.atomic.add";
2181 case nir_intrinsic_ssbo_atomic_imin
:
2182 name
= "llvm.amdgcn.buffer.atomic.smin";
2184 case nir_intrinsic_ssbo_atomic_umin
:
2185 name
= "llvm.amdgcn.buffer.atomic.umin";
2187 case nir_intrinsic_ssbo_atomic_imax
:
2188 name
= "llvm.amdgcn.buffer.atomic.smax";
2190 case nir_intrinsic_ssbo_atomic_umax
:
2191 name
= "llvm.amdgcn.buffer.atomic.umax";
2193 case nir_intrinsic_ssbo_atomic_and
:
2194 name
= "llvm.amdgcn.buffer.atomic.and";
2196 case nir_intrinsic_ssbo_atomic_or
:
2197 name
= "llvm.amdgcn.buffer.atomic.or";
2199 case nir_intrinsic_ssbo_atomic_xor
:
2200 name
= "llvm.amdgcn.buffer.atomic.xor";
2202 case nir_intrinsic_ssbo_atomic_exchange
:
2203 name
= "llvm.amdgcn.buffer.atomic.swap";
2205 case nir_intrinsic_ssbo_atomic_comp_swap
:
2206 name
= "llvm.amdgcn.buffer.atomic.cmpswap";
2212 return ac_build_intrinsic(&ctx
->ac
, name
, ctx
->i32
, params
, arg_count
, 0);
2215 static LLVMValueRef
visit_load_buffer(struct nir_to_llvm_context
*ctx
,
2216 nir_intrinsic_instr
*instr
)
2218 LLVMValueRef results
[2];
2219 int load_components
;
2220 int num_components
= instr
->num_components
;
2221 if (instr
->dest
.ssa
.bit_size
== 64)
2222 num_components
*= 2;
2224 for (int i
= 0; i
< num_components
; i
+= load_components
) {
2225 load_components
= MIN2(num_components
- i
, 4);
2226 const char *load_name
;
2227 LLVMTypeRef data_type
= ctx
->f32
;
2228 LLVMValueRef offset
= LLVMConstInt(ctx
->i32
, i
* 4, false);
2229 offset
= LLVMBuildAdd(ctx
->builder
, get_src(ctx
, instr
->src
[1]), offset
, "");
2231 if (load_components
== 3)
2232 data_type
= LLVMVectorType(ctx
->f32
, 4);
2233 else if (load_components
> 1)
2234 data_type
= LLVMVectorType(ctx
->f32
, load_components
);
2236 if (load_components
>= 3)
2237 load_name
= "llvm.amdgcn.buffer.load.v4f32";
2238 else if (load_components
== 2)
2239 load_name
= "llvm.amdgcn.buffer.load.v2f32";
2240 else if (load_components
== 1)
2241 load_name
= "llvm.amdgcn.buffer.load.f32";
2243 unreachable("unhandled number of components");
2245 LLVMValueRef params
[] = {
2246 get_src(ctx
, instr
->src
[0]),
2247 LLVMConstInt(ctx
->i32
, 0, false),
2253 results
[i
] = ac_build_intrinsic(&ctx
->ac
, load_name
, data_type
, params
, 5, 0);
2257 LLVMValueRef ret
= results
[0];
2258 if (num_components
> 4 || num_components
== 3) {
2259 LLVMValueRef masks
[] = {
2260 LLVMConstInt(ctx
->i32
, 0, false), LLVMConstInt(ctx
->i32
, 1, false),
2261 LLVMConstInt(ctx
->i32
, 2, false), LLVMConstInt(ctx
->i32
, 3, false),
2262 LLVMConstInt(ctx
->i32
, 4, false), LLVMConstInt(ctx
->i32
, 5, false),
2263 LLVMConstInt(ctx
->i32
, 6, false), LLVMConstInt(ctx
->i32
, 7, false)
2266 LLVMValueRef swizzle
= LLVMConstVector(masks
, num_components
);
2267 ret
= LLVMBuildShuffleVector(ctx
->builder
, results
[0],
2268 results
[num_components
> 4 ? 1 : 0], swizzle
, "");
2271 return LLVMBuildBitCast(ctx
->builder
, ret
,
2272 get_def_type(ctx
, &instr
->dest
.ssa
), "");
2275 static LLVMValueRef
visit_load_ubo_buffer(struct nir_to_llvm_context
*ctx
,
2276 nir_intrinsic_instr
*instr
)
2278 LLVMValueRef results
[8], ret
;
2279 LLVMValueRef rsrc
= get_src(ctx
, instr
->src
[0]);
2280 LLVMValueRef offset
= get_src(ctx
, instr
->src
[1]);
2281 int num_components
= instr
->num_components
;
2283 rsrc
= LLVMBuildBitCast(ctx
->builder
, rsrc
, LLVMVectorType(ctx
->i8
, 16), "");
2285 if (instr
->dest
.ssa
.bit_size
== 64)
2286 num_components
*= 2;
2288 for (unsigned i
= 0; i
< num_components
; ++i
) {
2289 LLVMValueRef params
[] = {
2291 LLVMBuildAdd(ctx
->builder
, LLVMConstInt(ctx
->i32
, 4 * i
, 0),
2294 results
[i
] = ac_build_intrinsic(&ctx
->ac
, "llvm.SI.load.const", ctx
->f32
,
2296 AC_FUNC_ATTR_READNONE
|
2297 AC_FUNC_ATTR_LEGACY
);
2301 ret
= ac_build_gather_values(&ctx
->ac
, results
, instr
->num_components
);
2302 return LLVMBuildBitCast(ctx
->builder
, ret
,
2303 get_def_type(ctx
, &instr
->dest
.ssa
), "");
2307 radv_get_deref_offset(struct nir_to_llvm_context
*ctx
, nir_deref_var
*deref
,
2308 bool vs_in
, unsigned *vertex_index_out
,
2309 LLVMValueRef
*vertex_index_ref
,
2310 unsigned *const_out
, LLVMValueRef
*indir_out
)
2312 unsigned const_offset
= 0;
2313 nir_deref
*tail
= &deref
->deref
;
2314 LLVMValueRef offset
= NULL
;
2316 if (vertex_index_out
!= NULL
|| vertex_index_ref
!= NULL
) {
2318 nir_deref_array
*deref_array
= nir_deref_as_array(tail
);
2319 if (vertex_index_out
)
2320 *vertex_index_out
= deref_array
->base_offset
;
2322 if (vertex_index_ref
) {
2323 LLVMValueRef vtx
= LLVMConstInt(ctx
->i32
, deref_array
->base_offset
, false);
2324 if (deref_array
->deref_array_type
== nir_deref_array_type_indirect
) {
2325 vtx
= LLVMBuildAdd(ctx
->builder
, vtx
, get_src(ctx
, deref_array
->indirect
), "");
2327 *vertex_index_ref
= vtx
;
2331 if (deref
->var
->data
.compact
) {
2332 assert(tail
->child
->deref_type
== nir_deref_type_array
);
2333 assert(glsl_type_is_scalar(glsl_without_array(deref
->var
->type
)));
2334 nir_deref_array
*deref_array
= nir_deref_as_array(tail
->child
);
2335 /* We always lower indirect dereferences for "compact" array vars. */
2336 assert(deref_array
->deref_array_type
== nir_deref_array_type_direct
);
2338 const_offset
= deref_array
->base_offset
;
2342 while (tail
->child
!= NULL
) {
2343 const struct glsl_type
*parent_type
= tail
->type
;
2346 if (tail
->deref_type
== nir_deref_type_array
) {
2347 nir_deref_array
*deref_array
= nir_deref_as_array(tail
);
2348 LLVMValueRef index
, stride
, local_offset
;
2349 unsigned size
= glsl_count_attribute_slots(tail
->type
, vs_in
);
2351 const_offset
+= size
* deref_array
->base_offset
;
2352 if (deref_array
->deref_array_type
== nir_deref_array_type_direct
)
2355 assert(deref_array
->deref_array_type
== nir_deref_array_type_indirect
);
2356 index
= get_src(ctx
, deref_array
->indirect
);
2357 stride
= LLVMConstInt(ctx
->i32
, size
, 0);
2358 local_offset
= LLVMBuildMul(ctx
->builder
, stride
, index
, "");
2361 offset
= LLVMBuildAdd(ctx
->builder
, offset
, local_offset
, "");
2363 offset
= local_offset
;
2364 } else if (tail
->deref_type
== nir_deref_type_struct
) {
2365 nir_deref_struct
*deref_struct
= nir_deref_as_struct(tail
);
2367 for (unsigned i
= 0; i
< deref_struct
->index
; i
++) {
2368 const struct glsl_type
*ft
= glsl_get_struct_field(parent_type
, i
);
2369 const_offset
+= glsl_count_attribute_slots(ft
, vs_in
);
2372 unreachable("unsupported deref type");
2376 if (const_offset
&& offset
)
2377 offset
= LLVMBuildAdd(ctx
->builder
, offset
,
2378 LLVMConstInt(ctx
->i32
, const_offset
, 0),
2381 *const_out
= const_offset
;
2382 *indir_out
= offset
;
2386 lds_load(struct nir_to_llvm_context
*ctx
,
2387 LLVMValueRef dw_addr
)
2390 value
= ac_build_indexed_load(&ctx
->ac
, ctx
->lds
, dw_addr
, false);
2395 lds_store(struct nir_to_llvm_context
*ctx
,
2396 LLVMValueRef dw_addr
, LLVMValueRef value
)
2398 value
= LLVMBuildBitCast(ctx
->builder
, value
, ctx
->i32
, "");
2399 ac_build_indexed_store(&ctx
->ac
, ctx
->lds
,
2403 /* The offchip buffer layout for TCS->TES is
2405 * - attribute 0 of patch 0 vertex 0
2406 * - attribute 0 of patch 0 vertex 1
2407 * - attribute 0 of patch 0 vertex 2
2409 * - attribute 0 of patch 1 vertex 0
2410 * - attribute 0 of patch 1 vertex 1
2412 * - attribute 1 of patch 0 vertex 0
2413 * - attribute 1 of patch 0 vertex 1
2415 * - per patch attribute 0 of patch 0
2416 * - per patch attribute 0 of patch 1
2419 * Note that every attribute has 4 components.
2421 static LLVMValueRef
get_tcs_tes_buffer_address(struct nir_to_llvm_context
*ctx
,
2422 LLVMValueRef vertex_index
,
2423 LLVMValueRef param_index
)
2425 LLVMValueRef base_addr
, vertices_per_patch
, num_patches
, total_vertices
;
2426 LLVMValueRef param_stride
, constant16
;
2427 LLVMValueRef rel_patch_id
= get_rel_patch_id(ctx
);
2429 vertices_per_patch
= unpack_param(ctx
, ctx
->tcs_offchip_layout
, 9, 6);
2430 num_patches
= unpack_param(ctx
, ctx
->tcs_offchip_layout
, 0, 9);
2431 total_vertices
= LLVMBuildMul(ctx
->builder
, vertices_per_patch
,
2434 constant16
= LLVMConstInt(ctx
->i32
, 16, false);
2436 base_addr
= LLVMBuildMul(ctx
->builder
, rel_patch_id
,
2437 vertices_per_patch
, "");
2439 base_addr
= LLVMBuildAdd(ctx
->builder
, base_addr
,
2442 param_stride
= total_vertices
;
2444 base_addr
= rel_patch_id
;
2445 param_stride
= num_patches
;
2448 base_addr
= LLVMBuildAdd(ctx
->builder
, base_addr
,
2449 LLVMBuildMul(ctx
->builder
, param_index
,
2450 param_stride
, ""), "");
2452 base_addr
= LLVMBuildMul(ctx
->builder
, base_addr
, constant16
, "");
2454 if (!vertex_index
) {
2455 LLVMValueRef patch_data_offset
=
2456 unpack_param(ctx
, ctx
->tcs_offchip_layout
, 16, 16);
2458 base_addr
= LLVMBuildAdd(ctx
->builder
, base_addr
,
2459 patch_data_offset
, "");
2464 static LLVMValueRef
get_tcs_tes_buffer_address_params(struct nir_to_llvm_context
*ctx
,
2466 unsigned const_index
,
2468 LLVMValueRef vertex_index
,
2469 LLVMValueRef indir_index
)
2471 LLVMValueRef param_index
;
2474 param_index
= LLVMBuildAdd(ctx
->builder
, LLVMConstInt(ctx
->i32
, param
, false),
2477 if (const_index
&& !is_compact
)
2478 param
+= const_index
;
2479 param_index
= LLVMConstInt(ctx
->i32
, param
, false);
2481 return get_tcs_tes_buffer_address(ctx
, vertex_index
, param_index
);
2485 mark_tess_output(struct nir_to_llvm_context
*ctx
,
2486 bool is_patch
, uint32_t param
)
2490 ctx
->tess_patch_outputs_written
|= (1ull << param
);
2492 ctx
->tess_outputs_written
|= (1ull << param
);
2496 get_dw_address(struct nir_to_llvm_context
*ctx
,
2497 LLVMValueRef dw_addr
,
2499 unsigned const_index
,
2500 bool compact_const_index
,
2501 LLVMValueRef vertex_index
,
2502 LLVMValueRef stride
,
2503 LLVMValueRef indir_index
)
2508 dw_addr
= LLVMBuildAdd(ctx
->builder
, dw_addr
,
2509 LLVMBuildMul(ctx
->builder
,
2515 dw_addr
= LLVMBuildAdd(ctx
->builder
, dw_addr
,
2516 LLVMBuildMul(ctx
->builder
, indir_index
,
2517 LLVMConstInt(ctx
->i32
, 4, false), ""), "");
2518 else if (const_index
&& !compact_const_index
)
2519 dw_addr
= LLVMBuildAdd(ctx
->builder
, dw_addr
,
2520 LLVMConstInt(ctx
->i32
, const_index
, false), "");
2522 dw_addr
= LLVMBuildAdd(ctx
->builder
, dw_addr
,
2523 LLVMConstInt(ctx
->i32
, param
* 4, false), "");
2525 if (const_index
&& compact_const_index
)
2526 dw_addr
= LLVMBuildAdd(ctx
->builder
, dw_addr
,
2527 LLVMConstInt(ctx
->i32
, const_index
, false), "");
2532 load_tcs_input(struct nir_to_llvm_context
*ctx
,
2533 nir_intrinsic_instr
*instr
)
2535 LLVMValueRef dw_addr
, stride
;
2536 unsigned const_index
;
2537 LLVMValueRef vertex_index
;
2538 LLVMValueRef indir_index
;
2540 LLVMValueRef value
[4], result
;
2541 const bool per_vertex
= nir_is_per_vertex_io(instr
->variables
[0]->var
, ctx
->stage
);
2542 const bool is_compact
= instr
->variables
[0]->var
->data
.compact
;
2543 param
= shader_io_get_unique_index(instr
->variables
[0]->var
->data
.location
);
2544 radv_get_deref_offset(ctx
, instr
->variables
[0],
2545 false, NULL
, per_vertex
? &vertex_index
: NULL
,
2546 &const_index
, &indir_index
);
2548 stride
= unpack_param(ctx
, ctx
->tcs_in_layout
, 13, 8);
2549 dw_addr
= get_tcs_in_current_patch_offset(ctx
);
2550 dw_addr
= get_dw_address(ctx
, dw_addr
, param
, const_index
, is_compact
, vertex_index
, stride
,
2553 for (unsigned i
= 0; i
< instr
->num_components
; i
++) {
2554 value
[i
] = lds_load(ctx
, dw_addr
);
2555 dw_addr
= LLVMBuildAdd(ctx
->builder
, dw_addr
,
2558 result
= ac_build_gather_values(&ctx
->ac
, value
, instr
->num_components
);
2559 result
= LLVMBuildBitCast(ctx
->builder
, result
, get_def_type(ctx
, &instr
->dest
.ssa
), "");
2564 load_tcs_output(struct nir_to_llvm_context
*ctx
,
2565 nir_intrinsic_instr
*instr
)
2567 LLVMValueRef dw_addr
, stride
;
2568 LLVMValueRef value
[4], result
;
2569 LLVMValueRef vertex_index
= NULL
;
2570 LLVMValueRef indir_index
= NULL
;
2571 unsigned const_index
= 0;
2573 const bool per_vertex
= nir_is_per_vertex_io(instr
->variables
[0]->var
, ctx
->stage
);
2574 const bool is_compact
= instr
->variables
[0]->var
->data
.compact
;
2575 param
= shader_io_get_unique_index(instr
->variables
[0]->var
->data
.location
);
2576 radv_get_deref_offset(ctx
, instr
->variables
[0],
2577 false, NULL
, per_vertex
? &vertex_index
: NULL
,
2578 &const_index
, &indir_index
);
2580 if (!instr
->variables
[0]->var
->data
.patch
) {
2581 stride
= unpack_param(ctx
, ctx
->tcs_out_layout
, 13, 8);
2582 dw_addr
= get_tcs_out_current_patch_offset(ctx
);
2584 dw_addr
= get_tcs_out_current_patch_data_offset(ctx
);
2587 dw_addr
= get_dw_address(ctx
, dw_addr
, param
, const_index
, is_compact
, vertex_index
, stride
,
2590 for (unsigned i
= 0; i
< instr
->num_components
; i
++) {
2591 value
[i
] = lds_load(ctx
, dw_addr
);
2592 dw_addr
= LLVMBuildAdd(ctx
->builder
, dw_addr
,
2595 result
= ac_build_gather_values(&ctx
->ac
, value
, instr
->num_components
);
2596 result
= LLVMBuildBitCast(ctx
->builder
, result
, get_def_type(ctx
, &instr
->dest
.ssa
), "");
2601 store_tcs_output(struct nir_to_llvm_context
*ctx
,
2602 nir_intrinsic_instr
*instr
,
2606 LLVMValueRef stride
, dw_addr
;
2607 LLVMValueRef buf_addr
= NULL
;
2608 LLVMValueRef vertex_index
= NULL
;
2609 LLVMValueRef indir_index
= NULL
;
2610 unsigned const_index
= 0;
2612 const bool per_vertex
= nir_is_per_vertex_io(instr
->variables
[0]->var
, ctx
->stage
);
2613 const bool is_compact
= instr
->variables
[0]->var
->data
.compact
;
2615 radv_get_deref_offset(ctx
, instr
->variables
[0],
2616 false, NULL
, per_vertex
? &vertex_index
: NULL
,
2617 &const_index
, &indir_index
);
2619 param
= shader_io_get_unique_index(instr
->variables
[0]->var
->data
.location
);
2620 if (instr
->variables
[0]->var
->data
.location
== VARYING_SLOT_CLIP_DIST0
&&
2621 is_compact
&& const_index
> 3) {
2626 if (!instr
->variables
[0]->var
->data
.patch
) {
2627 stride
= unpack_param(ctx
, ctx
->tcs_out_layout
, 13, 8);
2628 dw_addr
= get_tcs_out_current_patch_offset(ctx
);
2630 dw_addr
= get_tcs_out_current_patch_data_offset(ctx
);
2633 mark_tess_output(ctx
, instr
->variables
[0]->var
->data
.patch
, param
);
2635 dw_addr
= get_dw_address(ctx
, dw_addr
, param
, const_index
, is_compact
, vertex_index
, stride
,
2637 buf_addr
= get_tcs_tes_buffer_address_params(ctx
, param
, const_index
, is_compact
,
2638 vertex_index
, indir_index
);
2640 unsigned base
= is_compact
? const_index
: 0;
2641 for (unsigned chan
= 0; chan
< 8; chan
++) {
2642 bool is_tess_factor
= false;
2643 if (!(writemask
& (1 << chan
)))
2645 LLVMValueRef value
= llvm_extract_elem(ctx
, src
, chan
);
2647 lds_store(ctx
, dw_addr
, value
);
2649 if (instr
->variables
[0]->var
->data
.location
== VARYING_SLOT_TESS_LEVEL_INNER
||
2650 instr
->variables
[0]->var
->data
.location
== VARYING_SLOT_TESS_LEVEL_OUTER
)
2651 is_tess_factor
= true;
2653 if (!is_tess_factor
&& writemask
!= 0xF)
2654 ac_build_buffer_store_dword(&ctx
->ac
, ctx
->hs_ring_tess_offchip
, value
, 1,
2655 buf_addr
, ctx
->oc_lds
,
2656 4 * (base
+ chan
), 1, 0, true, false);
2658 dw_addr
= LLVMBuildAdd(ctx
->builder
, dw_addr
,
2662 if (writemask
== 0xF) {
2663 ac_build_buffer_store_dword(&ctx
->ac
, ctx
->hs_ring_tess_offchip
, src
, 4,
2664 buf_addr
, ctx
->oc_lds
,
2665 (base
* 4), 1, 0, true, false);
2670 load_tes_input(struct nir_to_llvm_context
*ctx
,
2671 nir_intrinsic_instr
*instr
)
2673 LLVMValueRef buf_addr
;
2674 LLVMValueRef result
;
2675 LLVMValueRef vertex_index
= NULL
;
2676 LLVMValueRef indir_index
= NULL
;
2677 unsigned const_index
= 0;
2679 const bool per_vertex
= nir_is_per_vertex_io(instr
->variables
[0]->var
, ctx
->stage
);
2680 const bool is_compact
= instr
->variables
[0]->var
->data
.compact
;
2682 radv_get_deref_offset(ctx
, instr
->variables
[0],
2683 false, NULL
, per_vertex
? &vertex_index
: NULL
,
2684 &const_index
, &indir_index
);
2685 param
= shader_io_get_unique_index(instr
->variables
[0]->var
->data
.location
);
2686 if (instr
->variables
[0]->var
->data
.location
== VARYING_SLOT_CLIP_DIST0
&&
2687 is_compact
&& const_index
> 3) {
2691 buf_addr
= get_tcs_tes_buffer_address_params(ctx
, param
, const_index
,
2692 is_compact
, vertex_index
, indir_index
);
2694 result
= ac_build_buffer_load(&ctx
->ac
, ctx
->hs_ring_tess_offchip
, instr
->num_components
, NULL
,
2695 buf_addr
, ctx
->oc_lds
, is_compact
? (4 * const_index
) : 0, 1, 0, true);
2696 result
= trim_vector(ctx
, result
, instr
->num_components
);
2697 result
= LLVMBuildBitCast(ctx
->builder
, result
, get_def_type(ctx
, &instr
->dest
.ssa
), "");
2702 load_gs_input(struct nir_to_llvm_context
*ctx
,
2703 nir_intrinsic_instr
*instr
)
2705 LLVMValueRef indir_index
, vtx_offset
;
2706 unsigned const_index
;
2707 LLVMValueRef args
[9];
2708 unsigned param
, vtx_offset_param
;
2709 LLVMValueRef value
[4], result
;
2710 unsigned vertex_index
;
2711 radv_get_deref_offset(ctx
, instr
->variables
[0],
2712 false, &vertex_index
, NULL
,
2713 &const_index
, &indir_index
);
2714 vtx_offset_param
= vertex_index
;
2715 assert(vtx_offset_param
< 6);
2716 vtx_offset
= LLVMBuildMul(ctx
->builder
, ctx
->gs_vtx_offset
[vtx_offset_param
],
2717 LLVMConstInt(ctx
->i32
, 4, false), "");
2719 param
= shader_io_get_unique_index(instr
->variables
[0]->var
->data
.location
);
2720 for (unsigned i
= 0; i
< instr
->num_components
; i
++) {
2722 args
[0] = ctx
->esgs_ring
;
2723 args
[1] = vtx_offset
;
2724 args
[2] = LLVMConstInt(ctx
->i32
, (param
* 4 + i
+ const_index
) * 256, false);
2725 args
[3] = ctx
->i32zero
;
2726 args
[4] = ctx
->i32one
; /* OFFEN */
2727 args
[5] = ctx
->i32zero
; /* IDXEN */
2728 args
[6] = ctx
->i32one
; /* GLC */
2729 args
[7] = ctx
->i32zero
; /* SLC */
2730 args
[8] = ctx
->i32zero
; /* TFE */
2732 value
[i
] = ac_build_intrinsic(&ctx
->ac
, "llvm.SI.buffer.load.dword.i32.i32",
2734 AC_FUNC_ATTR_READONLY
|
2735 AC_FUNC_ATTR_LEGACY
);
2737 result
= ac_build_gather_values(&ctx
->ac
, value
, instr
->num_components
);
2742 static LLVMValueRef
visit_load_var(struct nir_to_llvm_context
*ctx
,
2743 nir_intrinsic_instr
*instr
)
2745 LLVMValueRef values
[8];
2746 int idx
= instr
->variables
[0]->var
->data
.driver_location
;
2747 int ve
= instr
->dest
.ssa
.num_components
;
2748 LLVMValueRef indir_index
;
2750 unsigned const_index
;
2751 bool vs_in
= ctx
->stage
== MESA_SHADER_VERTEX
&&
2752 instr
->variables
[0]->var
->data
.mode
== nir_var_shader_in
;
2753 radv_get_deref_offset(ctx
, instr
->variables
[0], vs_in
, NULL
, NULL
,
2754 &const_index
, &indir_index
);
2756 if (instr
->dest
.ssa
.bit_size
== 64)
2759 switch (instr
->variables
[0]->var
->data
.mode
) {
2760 case nir_var_shader_in
:
2761 if (ctx
->stage
== MESA_SHADER_TESS_CTRL
)
2762 return load_tcs_input(ctx
, instr
);
2763 if (ctx
->stage
== MESA_SHADER_TESS_EVAL
)
2764 return load_tes_input(ctx
, instr
);
2765 if (ctx
->stage
== MESA_SHADER_GEOMETRY
) {
2766 return load_gs_input(ctx
, instr
);
2768 for (unsigned chan
= 0; chan
< ve
; chan
++) {
2770 unsigned count
= glsl_count_attribute_slots(
2771 instr
->variables
[0]->var
->type
,
2772 ctx
->stage
== MESA_SHADER_VERTEX
);
2774 LLVMValueRef tmp_vec
= ac_build_gather_values_extended(
2775 &ctx
->ac
, ctx
->inputs
+ idx
+ chan
, count
,
2778 values
[chan
] = LLVMBuildExtractElement(ctx
->builder
,
2782 values
[chan
] = ctx
->inputs
[idx
+ chan
+ const_index
* 4];
2786 for (unsigned chan
= 0; chan
< ve
; chan
++) {
2788 unsigned count
= glsl_count_attribute_slots(
2789 instr
->variables
[0]->var
->type
, false);
2791 LLVMValueRef tmp_vec
= ac_build_gather_values_extended(
2792 &ctx
->ac
, ctx
->locals
+ idx
+ chan
, count
,
2795 values
[chan
] = LLVMBuildExtractElement(ctx
->builder
,
2799 values
[chan
] = LLVMBuildLoad(ctx
->builder
, ctx
->locals
[idx
+ chan
+ const_index
* 4], "");
2803 case nir_var_shader_out
:
2804 if (ctx
->stage
== MESA_SHADER_TESS_CTRL
)
2805 return load_tcs_output(ctx
, instr
);
2806 for (unsigned chan
= 0; chan
< ve
; chan
++) {
2808 unsigned count
= glsl_count_attribute_slots(
2809 instr
->variables
[0]->var
->type
, false);
2811 LLVMValueRef tmp_vec
= ac_build_gather_values_extended(
2812 &ctx
->ac
, ctx
->outputs
+ idx
+ chan
, count
,
2815 values
[chan
] = LLVMBuildExtractElement(ctx
->builder
,
2819 values
[chan
] = LLVMBuildLoad(ctx
->builder
,
2820 ctx
->outputs
[idx
+ chan
+ const_index
* 4],
2825 case nir_var_shared
: {
2826 LLVMValueRef ptr
= get_shared_memory_ptr(ctx
, idx
, ctx
->i32
);
2827 LLVMValueRef derived_ptr
;
2830 indir_index
= LLVMBuildMul(ctx
->builder
, indir_index
, LLVMConstInt(ctx
->i32
, 4, false), "");
2832 for (unsigned chan
= 0; chan
< ve
; chan
++) {
2833 LLVMValueRef index
= LLVMConstInt(ctx
->i32
, chan
, false);
2835 index
= LLVMBuildAdd(ctx
->builder
, index
, indir_index
, "");
2836 derived_ptr
= LLVMBuildGEP(ctx
->builder
, ptr
, &index
, 1, "");
2838 values
[chan
] = LLVMBuildLoad(ctx
->builder
, derived_ptr
, "");
2843 unreachable("unhandle variable mode");
2845 ret
= ac_build_gather_values(&ctx
->ac
, values
, ve
);
2846 return LLVMBuildBitCast(ctx
->builder
, ret
, get_def_type(ctx
, &instr
->dest
.ssa
), "");
2850 visit_store_var(struct nir_to_llvm_context
*ctx
,
2851 nir_intrinsic_instr
*instr
)
2853 LLVMValueRef temp_ptr
, value
;
2854 int idx
= instr
->variables
[0]->var
->data
.driver_location
;
2855 LLVMValueRef src
= to_float(ctx
, get_src(ctx
, instr
->src
[0]));
2856 int writemask
= instr
->const_index
[0];
2857 LLVMValueRef indir_index
;
2858 unsigned const_index
;
2859 radv_get_deref_offset(ctx
, instr
->variables
[0], false,
2860 NULL
, NULL
, &const_index
, &indir_index
);
2862 if (get_elem_bits(ctx
, LLVMTypeOf(src
)) == 64) {
2863 int old_writemask
= writemask
;
2865 src
= LLVMBuildBitCast(ctx
->builder
, src
,
2866 LLVMVectorType(ctx
->f32
, get_llvm_num_components(src
) * 2),
2870 for (unsigned chan
= 0; chan
< 4; chan
++) {
2871 if (old_writemask
& (1 << chan
))
2872 writemask
|= 3u << (2 * chan
);
2876 switch (instr
->variables
[0]->var
->data
.mode
) {
2877 case nir_var_shader_out
:
2879 if (ctx
->stage
== MESA_SHADER_TESS_CTRL
) {
2880 store_tcs_output(ctx
, instr
, src
, writemask
);
2884 for (unsigned chan
= 0; chan
< 8; chan
++) {
2886 if (!(writemask
& (1 << chan
)))
2889 value
= llvm_extract_elem(ctx
, src
, chan
);
2891 if (instr
->variables
[0]->var
->data
.compact
)
2894 unsigned count
= glsl_count_attribute_slots(
2895 instr
->variables
[0]->var
->type
, false);
2897 LLVMValueRef tmp_vec
= ac_build_gather_values_extended(
2898 &ctx
->ac
, ctx
->outputs
+ idx
+ chan
, count
,
2901 if (get_llvm_num_components(tmp_vec
) > 1) {
2902 tmp_vec
= LLVMBuildInsertElement(ctx
->builder
, tmp_vec
,
2903 value
, indir_index
, "");
2906 build_store_values_extended(ctx
, ctx
->outputs
+ idx
+ chan
,
2907 count
, stride
, tmp_vec
);
2910 temp_ptr
= ctx
->outputs
[idx
+ chan
+ const_index
* stride
];
2912 LLVMBuildStore(ctx
->builder
, value
, temp_ptr
);
2917 for (unsigned chan
= 0; chan
< 8; chan
++) {
2918 if (!(writemask
& (1 << chan
)))
2921 value
= llvm_extract_elem(ctx
, src
, chan
);
2923 unsigned count
= glsl_count_attribute_slots(
2924 instr
->variables
[0]->var
->type
, false);
2926 LLVMValueRef tmp_vec
= ac_build_gather_values_extended(
2927 &ctx
->ac
, ctx
->locals
+ idx
+ chan
, count
,
2930 tmp_vec
= LLVMBuildInsertElement(ctx
->builder
, tmp_vec
,
2931 value
, indir_index
, "");
2932 build_store_values_extended(ctx
, ctx
->locals
+ idx
+ chan
,
2935 temp_ptr
= ctx
->locals
[idx
+ chan
+ const_index
* 4];
2937 LLVMBuildStore(ctx
->builder
, value
, temp_ptr
);
2941 case nir_var_shared
: {
2942 LLVMValueRef ptr
= get_shared_memory_ptr(ctx
, idx
, ctx
->i32
);
2945 indir_index
= LLVMBuildMul(ctx
->builder
, indir_index
, LLVMConstInt(ctx
->i32
, 4, false), "");
2947 for (unsigned chan
= 0; chan
< 8; chan
++) {
2948 if (!(writemask
& (1 << chan
)))
2950 LLVMValueRef index
= LLVMConstInt(ctx
->i32
, chan
, false);
2951 LLVMValueRef derived_ptr
;
2954 index
= LLVMBuildAdd(ctx
->builder
, index
, indir_index
, "");
2956 value
= llvm_extract_elem(ctx
, src
, chan
);
2957 derived_ptr
= LLVMBuildGEP(ctx
->builder
, ptr
, &index
, 1, "");
2958 LLVMBuildStore(ctx
->builder
,
2959 to_integer(ctx
, value
), derived_ptr
);
2968 static int image_type_to_components_count(enum glsl_sampler_dim dim
, bool array
)
2971 case GLSL_SAMPLER_DIM_BUF
:
2973 case GLSL_SAMPLER_DIM_1D
:
2974 return array
? 2 : 1;
2975 case GLSL_SAMPLER_DIM_2D
:
2976 return array
? 3 : 2;
2977 case GLSL_SAMPLER_DIM_MS
:
2978 return array
? 4 : 3;
2979 case GLSL_SAMPLER_DIM_3D
:
2980 case GLSL_SAMPLER_DIM_CUBE
:
2982 case GLSL_SAMPLER_DIM_RECT
:
2983 case GLSL_SAMPLER_DIM_SUBPASS
:
2985 case GLSL_SAMPLER_DIM_SUBPASS_MS
:
2995 /* Adjust the sample index according to FMASK.
2997 * For uncompressed MSAA surfaces, FMASK should return 0x76543210,
2998 * which is the identity mapping. Each nibble says which physical sample
2999 * should be fetched to get that sample.
3001 * For example, 0x11111100 means there are only 2 samples stored and
3002 * the second sample covers 3/4 of the pixel. When reading samples 0
3003 * and 1, return physical sample 0 (determined by the first two 0s
3004 * in FMASK), otherwise return physical sample 1.
3006 * The sample index should be adjusted as follows:
3007 * sample_index = (fmask >> (sample_index * 4)) & 0xF;
3009 static LLVMValueRef
adjust_sample_index_using_fmask(struct nir_to_llvm_context
*ctx
,
3010 LLVMValueRef coord_x
, LLVMValueRef coord_y
,
3011 LLVMValueRef coord_z
,
3012 LLVMValueRef sample_index
,
3013 LLVMValueRef fmask_desc_ptr
)
3015 LLVMValueRef fmask_load_address
[4];
3018 fmask_load_address
[0] = coord_x
;
3019 fmask_load_address
[1] = coord_y
;
3021 fmask_load_address
[2] = coord_z
;
3022 fmask_load_address
[3] = LLVMGetUndef(ctx
->i32
);
3025 struct ac_image_args args
= {0};
3027 args
.opcode
= ac_image_load
;
3028 args
.da
= coord_z
? true : false;
3029 args
.resource
= fmask_desc_ptr
;
3031 args
.addr
= ac_build_gather_values(&ctx
->ac
, fmask_load_address
, coord_z
? 4 : 2);
3033 res
= ac_build_image_opcode(&ctx
->ac
, &args
);
3035 res
= to_integer(ctx
, res
);
3036 LLVMValueRef four
= LLVMConstInt(ctx
->i32
, 4, false);
3037 LLVMValueRef F
= LLVMConstInt(ctx
->i32
, 0xf, false);
3039 LLVMValueRef fmask
= LLVMBuildExtractElement(ctx
->builder
,
3043 LLVMValueRef sample_index4
=
3044 LLVMBuildMul(ctx
->builder
, sample_index
, four
, "");
3045 LLVMValueRef shifted_fmask
=
3046 LLVMBuildLShr(ctx
->builder
, fmask
, sample_index4
, "");
3047 LLVMValueRef final_sample
=
3048 LLVMBuildAnd(ctx
->builder
, shifted_fmask
, F
, "");
3050 /* Don't rewrite the sample index if WORD1.DATA_FORMAT of the FMASK
3051 * resource descriptor is 0 (invalid),
3053 LLVMValueRef fmask_desc
=
3054 LLVMBuildBitCast(ctx
->builder
, fmask_desc_ptr
,
3057 LLVMValueRef fmask_word1
=
3058 LLVMBuildExtractElement(ctx
->builder
, fmask_desc
,
3061 LLVMValueRef word1_is_nonzero
=
3062 LLVMBuildICmp(ctx
->builder
, LLVMIntNE
,
3063 fmask_word1
, ctx
->i32zero
, "");
3065 /* Replace the MSAA sample index. */
3067 LLVMBuildSelect(ctx
->builder
, word1_is_nonzero
,
3068 final_sample
, sample_index
, "");
3069 return sample_index
;
3072 static LLVMValueRef
get_image_coords(struct nir_to_llvm_context
*ctx
,
3073 nir_intrinsic_instr
*instr
)
3075 const struct glsl_type
*type
= instr
->variables
[0]->var
->type
;
3076 if(instr
->variables
[0]->deref
.child
)
3077 type
= instr
->variables
[0]->deref
.child
->type
;
3079 LLVMValueRef src0
= get_src(ctx
, instr
->src
[0]);
3080 LLVMValueRef coords
[4];
3081 LLVMValueRef masks
[] = {
3082 LLVMConstInt(ctx
->i32
, 0, false), LLVMConstInt(ctx
->i32
, 1, false),
3083 LLVMConstInt(ctx
->i32
, 2, false), LLVMConstInt(ctx
->i32
, 3, false),
3086 LLVMValueRef sample_index
= llvm_extract_elem(ctx
, get_src(ctx
, instr
->src
[1]), 0);
3089 enum glsl_sampler_dim dim
= glsl_get_sampler_dim(type
);
3090 bool add_frag_pos
= (dim
== GLSL_SAMPLER_DIM_SUBPASS
||
3091 dim
== GLSL_SAMPLER_DIM_SUBPASS_MS
);
3092 bool is_ms
= (dim
== GLSL_SAMPLER_DIM_MS
||
3093 dim
== GLSL_SAMPLER_DIM_SUBPASS_MS
);
3095 count
= image_type_to_components_count(dim
,
3096 glsl_sampler_type_is_array(type
));
3099 LLVMValueRef fmask_load_address
[3];
3102 fmask_load_address
[0] = LLVMBuildExtractElement(ctx
->builder
, src0
, masks
[0], "");
3103 fmask_load_address
[1] = LLVMBuildExtractElement(ctx
->builder
, src0
, masks
[1], "");
3104 if (glsl_sampler_type_is_array(type
))
3105 fmask_load_address
[2] = LLVMBuildExtractElement(ctx
->builder
, src0
, masks
[2], "");
3107 fmask_load_address
[2] = NULL
;
3109 for (chan
= 0; chan
< 2; ++chan
)
3110 fmask_load_address
[chan
] = LLVMBuildAdd(ctx
->builder
, fmask_load_address
[chan
], LLVMBuildFPToUI(ctx
->builder
, ctx
->frag_pos
[chan
], ctx
->i32
, ""), "");
3112 sample_index
= adjust_sample_index_using_fmask(ctx
,
3113 fmask_load_address
[0],
3114 fmask_load_address
[1],
3115 fmask_load_address
[2],
3117 get_sampler_desc(ctx
, instr
->variables
[0], DESC_FMASK
));
3120 if (instr
->src
[0].ssa
->num_components
)
3121 res
= LLVMBuildExtractElement(ctx
->builder
, src0
, masks
[0], "");
3128 for (chan
= 0; chan
< count
; ++chan
) {
3129 coords
[chan
] = LLVMBuildExtractElement(ctx
->builder
, src0
, masks
[chan
], "");
3133 for (chan
= 0; chan
< count
; ++chan
)
3134 coords
[chan
] = LLVMBuildAdd(ctx
->builder
, coords
[chan
], LLVMBuildFPToUI(ctx
->builder
, ctx
->frag_pos
[chan
], ctx
->i32
, ""), "");
3137 coords
[count
] = sample_index
;
3142 coords
[3] = LLVMGetUndef(ctx
->i32
);
3145 res
= ac_build_gather_values(&ctx
->ac
, coords
, count
);
3150 static LLVMValueRef
visit_image_load(struct nir_to_llvm_context
*ctx
,
3151 nir_intrinsic_instr
*instr
)
3153 LLVMValueRef params
[7];
3155 char intrinsic_name
[64];
3156 const nir_variable
*var
= instr
->variables
[0]->var
;
3157 const struct glsl_type
*type
= var
->type
;
3158 if(instr
->variables
[0]->deref
.child
)
3159 type
= instr
->variables
[0]->deref
.child
->type
;
3161 type
= glsl_without_array(type
);
3162 if (glsl_get_sampler_dim(type
) == GLSL_SAMPLER_DIM_BUF
) {
3163 params
[0] = get_sampler_desc(ctx
, instr
->variables
[0], DESC_BUFFER
);
3164 params
[1] = LLVMBuildExtractElement(ctx
->builder
, get_src(ctx
, instr
->src
[0]),
3165 LLVMConstInt(ctx
->i32
, 0, false), ""); /* vindex */
3166 params
[2] = LLVMConstInt(ctx
->i32
, 0, false); /* voffset */
3167 params
[3] = ctx
->i1false
; /* glc */
3168 params
[4] = ctx
->i1false
; /* slc */
3169 res
= ac_build_intrinsic(&ctx
->ac
, "llvm.amdgcn.buffer.load.format.v4f32", ctx
->v4f32
,
3172 res
= trim_vector(ctx
, res
, instr
->dest
.ssa
.num_components
);
3173 res
= to_integer(ctx
, res
);
3175 bool is_da
= glsl_sampler_type_is_array(type
) ||
3176 glsl_get_sampler_dim(type
) == GLSL_SAMPLER_DIM_CUBE
;
3177 LLVMValueRef da
= is_da
? ctx
->i1true
: ctx
->i1false
;
3178 LLVMValueRef glc
= ctx
->i1false
;
3179 LLVMValueRef slc
= ctx
->i1false
;
3181 params
[0] = get_image_coords(ctx
, instr
);
3182 params
[1] = get_sampler_desc(ctx
, instr
->variables
[0], DESC_IMAGE
);
3183 params
[2] = LLVMConstInt(ctx
->i32
, 15, false); /* dmask */
3184 if (HAVE_LLVM
<= 0x0309) {
3185 params
[3] = ctx
->i1false
; /* r128 */
3190 LLVMValueRef lwe
= ctx
->i1false
;
3197 ac_get_image_intr_name("llvm.amdgcn.image.load",
3198 ctx
->v4f32
, /* vdata */
3199 LLVMTypeOf(params
[0]), /* coords */
3200 LLVMTypeOf(params
[1]), /* rsrc */
3201 intrinsic_name
, sizeof(intrinsic_name
));
3203 res
= ac_build_intrinsic(&ctx
->ac
, intrinsic_name
, ctx
->v4f32
,
3204 params
, 7, AC_FUNC_ATTR_READONLY
);
3206 return to_integer(ctx
, res
);
3209 static void visit_image_store(struct nir_to_llvm_context
*ctx
,
3210 nir_intrinsic_instr
*instr
)
3212 LLVMValueRef params
[8];
3213 char intrinsic_name
[64];
3214 const nir_variable
*var
= instr
->variables
[0]->var
;
3215 const struct glsl_type
*type
= glsl_without_array(var
->type
);
3217 if (ctx
->stage
== MESA_SHADER_FRAGMENT
)
3218 ctx
->shader_info
->fs
.writes_memory
= true;
3220 if (glsl_get_sampler_dim(type
) == GLSL_SAMPLER_DIM_BUF
) {
3221 params
[0] = to_float(ctx
, get_src(ctx
, instr
->src
[2])); /* data */
3222 params
[1] = get_sampler_desc(ctx
, instr
->variables
[0], DESC_BUFFER
);
3223 params
[2] = LLVMBuildExtractElement(ctx
->builder
, get_src(ctx
, instr
->src
[0]),
3224 LLVMConstInt(ctx
->i32
, 0, false), ""); /* vindex */
3225 params
[3] = LLVMConstInt(ctx
->i32
, 0, false); /* voffset */
3226 params
[4] = ctx
->i1false
; /* glc */
3227 params
[5] = ctx
->i1false
; /* slc */
3228 ac_build_intrinsic(&ctx
->ac
, "llvm.amdgcn.buffer.store.format.v4f32", ctx
->voidt
,
3231 bool is_da
= glsl_sampler_type_is_array(type
) ||
3232 glsl_get_sampler_dim(type
) == GLSL_SAMPLER_DIM_CUBE
;
3233 LLVMValueRef da
= is_da
? ctx
->i1true
: ctx
->i1false
;
3234 LLVMValueRef glc
= ctx
->i1false
;
3235 LLVMValueRef slc
= ctx
->i1false
;
3237 params
[0] = to_float(ctx
, get_src(ctx
, instr
->src
[2]));
3238 params
[1] = get_image_coords(ctx
, instr
); /* coords */
3239 params
[2] = get_sampler_desc(ctx
, instr
->variables
[0], DESC_IMAGE
);
3240 params
[3] = LLVMConstInt(ctx
->i32
, 15, false); /* dmask */
3241 if (HAVE_LLVM
<= 0x0309) {
3242 params
[4] = ctx
->i1false
; /* r128 */
3247 LLVMValueRef lwe
= ctx
->i1false
;
3254 ac_get_image_intr_name("llvm.amdgcn.image.store",
3255 LLVMTypeOf(params
[0]), /* vdata */
3256 LLVMTypeOf(params
[1]), /* coords */
3257 LLVMTypeOf(params
[2]), /* rsrc */
3258 intrinsic_name
, sizeof(intrinsic_name
));
3260 ac_build_intrinsic(&ctx
->ac
, intrinsic_name
, ctx
->voidt
,
3266 static LLVMValueRef
visit_image_atomic(struct nir_to_llvm_context
*ctx
,
3267 nir_intrinsic_instr
*instr
)
3269 LLVMValueRef params
[6];
3270 int param_count
= 0;
3271 const nir_variable
*var
= instr
->variables
[0]->var
;
3273 const char *base_name
= "llvm.amdgcn.image.atomic";
3274 const char *atomic_name
;
3275 LLVMValueRef coords
;
3276 char intrinsic_name
[32], coords_type
[8];
3277 const struct glsl_type
*type
= glsl_without_array(var
->type
);
3279 if (ctx
->stage
== MESA_SHADER_FRAGMENT
)
3280 ctx
->shader_info
->fs
.writes_memory
= true;
3282 params
[param_count
++] = get_src(ctx
, instr
->src
[2]);
3283 if (instr
->intrinsic
== nir_intrinsic_image_atomic_comp_swap
)
3284 params
[param_count
++] = get_src(ctx
, instr
->src
[3]);
3286 if (glsl_get_sampler_dim(type
) == GLSL_SAMPLER_DIM_BUF
) {
3287 params
[param_count
++] = get_sampler_desc(ctx
, instr
->variables
[0], DESC_BUFFER
);
3288 coords
= params
[param_count
++] = LLVMBuildExtractElement(ctx
->builder
, get_src(ctx
, instr
->src
[0]),
3289 LLVMConstInt(ctx
->i32
, 0, false), ""); /* vindex */
3290 params
[param_count
++] = ctx
->i32zero
; /* voffset */
3291 params
[param_count
++] = ctx
->i1false
; /* glc */
3292 params
[param_count
++] = ctx
->i1false
; /* slc */
3294 bool da
= glsl_sampler_type_is_array(type
) ||
3295 glsl_get_sampler_dim(type
) == GLSL_SAMPLER_DIM_CUBE
;
3297 coords
= params
[param_count
++] = get_image_coords(ctx
, instr
);
3298 params
[param_count
++] = get_sampler_desc(ctx
, instr
->variables
[0], DESC_IMAGE
);
3299 params
[param_count
++] = ctx
->i1false
; /* r128 */
3300 params
[param_count
++] = da
? ctx
->i1true
: ctx
->i1false
; /* da */
3301 params
[param_count
++] = ctx
->i1false
; /* slc */
3304 switch (instr
->intrinsic
) {
3305 case nir_intrinsic_image_atomic_add
:
3306 atomic_name
= "add";
3308 case nir_intrinsic_image_atomic_min
:
3309 atomic_name
= "smin";
3311 case nir_intrinsic_image_atomic_max
:
3312 atomic_name
= "smax";
3314 case nir_intrinsic_image_atomic_and
:
3315 atomic_name
= "and";
3317 case nir_intrinsic_image_atomic_or
:
3320 case nir_intrinsic_image_atomic_xor
:
3321 atomic_name
= "xor";
3323 case nir_intrinsic_image_atomic_exchange
:
3324 atomic_name
= "swap";
3326 case nir_intrinsic_image_atomic_comp_swap
:
3327 atomic_name
= "cmpswap";
3332 build_int_type_name(LLVMTypeOf(coords
),
3333 coords_type
, sizeof(coords_type
));
3335 snprintf(intrinsic_name
, sizeof(intrinsic_name
),
3336 "%s.%s.%s", base_name
, atomic_name
, coords_type
);
3337 return ac_build_intrinsic(&ctx
->ac
, intrinsic_name
, ctx
->i32
, params
, param_count
, 0);
3340 static LLVMValueRef
visit_image_size(struct nir_to_llvm_context
*ctx
,
3341 nir_intrinsic_instr
*instr
)
3344 const nir_variable
*var
= instr
->variables
[0]->var
;
3345 const struct glsl_type
*type
= instr
->variables
[0]->var
->type
;
3346 bool da
= glsl_sampler_type_is_array(var
->type
) ||
3347 glsl_get_sampler_dim(var
->type
) == GLSL_SAMPLER_DIM_CUBE
;
3348 if(instr
->variables
[0]->deref
.child
)
3349 type
= instr
->variables
[0]->deref
.child
->type
;
3351 if (glsl_get_sampler_dim(type
) == GLSL_SAMPLER_DIM_BUF
)
3352 return get_buffer_size(ctx
, get_sampler_desc(ctx
, instr
->variables
[0], DESC_BUFFER
), true);
3354 struct ac_image_args args
= { 0 };
3358 args
.resource
= get_sampler_desc(ctx
, instr
->variables
[0], DESC_IMAGE
);
3359 args
.opcode
= ac_image_get_resinfo
;
3360 args
.addr
= ctx
->i32zero
;
3362 res
= ac_build_image_opcode(&ctx
->ac
, &args
);
3364 if (glsl_get_sampler_dim(type
) == GLSL_SAMPLER_DIM_CUBE
&&
3365 glsl_sampler_type_is_array(type
)) {
3366 LLVMValueRef two
= LLVMConstInt(ctx
->i32
, 2, false);
3367 LLVMValueRef six
= LLVMConstInt(ctx
->i32
, 6, false);
3368 LLVMValueRef z
= LLVMBuildExtractElement(ctx
->builder
, res
, two
, "");
3369 z
= LLVMBuildSDiv(ctx
->builder
, z
, six
, "");
3370 res
= LLVMBuildInsertElement(ctx
->builder
, res
, z
, two
, "");
3375 #define NOOP_WAITCNT 0xf7f
3376 #define LGKM_CNT 0x07f
3377 #define VM_CNT 0xf70
3379 static void emit_waitcnt(struct nir_to_llvm_context
*ctx
,
3382 LLVMValueRef args
[1] = {
3383 LLVMConstInt(ctx
->i32
, simm16
, false),
3385 ac_build_intrinsic(&ctx
->ac
, "llvm.amdgcn.s.waitcnt",
3386 ctx
->voidt
, args
, 1, 0);
3389 static void emit_barrier(struct nir_to_llvm_context
*ctx
)
3391 /* SI only (thanks to a hw bug workaround):
3392 * The real barrier instruction isn’t needed, because an entire patch
3393 * always fits into a single wave.
3395 if (ctx
->options
->chip_class
== SI
&&
3396 ctx
->stage
== MESA_SHADER_TESS_CTRL
) {
3397 emit_waitcnt(ctx
, LGKM_CNT
& VM_CNT
);
3400 ac_build_intrinsic(&ctx
->ac
, "llvm.amdgcn.s.barrier",
3401 ctx
->voidt
, NULL
, 0, AC_FUNC_ATTR_CONVERGENT
);
3404 static void emit_discard_if(struct nir_to_llvm_context
*ctx
,
3405 nir_intrinsic_instr
*instr
)
3408 ctx
->shader_info
->fs
.can_discard
= true;
3410 cond
= LLVMBuildICmp(ctx
->builder
, LLVMIntNE
,
3411 get_src(ctx
, instr
->src
[0]),
3414 cond
= LLVMBuildSelect(ctx
->builder
, cond
,
3415 LLVMConstReal(ctx
->f32
, -1.0f
),
3417 ac_build_kill(&ctx
->ac
, cond
);
3421 visit_load_local_invocation_index(struct nir_to_llvm_context
*ctx
)
3423 LLVMValueRef result
;
3424 LLVMValueRef thread_id
= ac_get_thread_id(&ctx
->ac
);
3425 result
= LLVMBuildAnd(ctx
->builder
, ctx
->tg_size
,
3426 LLVMConstInt(ctx
->i32
, 0xfc0, false), "");
3428 return LLVMBuildAdd(ctx
->builder
, result
, thread_id
, "");
3431 static LLVMValueRef
visit_var_atomic(struct nir_to_llvm_context
*ctx
,
3432 nir_intrinsic_instr
*instr
)
3434 LLVMValueRef ptr
, result
;
3435 int idx
= instr
->variables
[0]->var
->data
.driver_location
;
3436 LLVMValueRef src
= get_src(ctx
, instr
->src
[0]);
3437 ptr
= get_shared_memory_ptr(ctx
, idx
, ctx
->i32
);
3439 if (instr
->intrinsic
== nir_intrinsic_var_atomic_comp_swap
) {
3440 LLVMValueRef src1
= get_src(ctx
, instr
->src
[1]);
3441 result
= LLVMBuildAtomicCmpXchg(ctx
->builder
,
3443 LLVMAtomicOrderingSequentiallyConsistent
,
3444 LLVMAtomicOrderingSequentiallyConsistent
,
3447 LLVMAtomicRMWBinOp op
;
3448 switch (instr
->intrinsic
) {
3449 case nir_intrinsic_var_atomic_add
:
3450 op
= LLVMAtomicRMWBinOpAdd
;
3452 case nir_intrinsic_var_atomic_umin
:
3453 op
= LLVMAtomicRMWBinOpUMin
;
3455 case nir_intrinsic_var_atomic_umax
:
3456 op
= LLVMAtomicRMWBinOpUMax
;
3458 case nir_intrinsic_var_atomic_imin
:
3459 op
= LLVMAtomicRMWBinOpMin
;
3461 case nir_intrinsic_var_atomic_imax
:
3462 op
= LLVMAtomicRMWBinOpMax
;
3464 case nir_intrinsic_var_atomic_and
:
3465 op
= LLVMAtomicRMWBinOpAnd
;
3467 case nir_intrinsic_var_atomic_or
:
3468 op
= LLVMAtomicRMWBinOpOr
;
3470 case nir_intrinsic_var_atomic_xor
:
3471 op
= LLVMAtomicRMWBinOpXor
;
3473 case nir_intrinsic_var_atomic_exchange
:
3474 op
= LLVMAtomicRMWBinOpXchg
;
3480 result
= LLVMBuildAtomicRMW(ctx
->builder
, op
, ptr
, to_integer(ctx
, src
),
3481 LLVMAtomicOrderingSequentiallyConsistent
,
3487 #define INTERP_CENTER 0
3488 #define INTERP_CENTROID 1
3489 #define INTERP_SAMPLE 2
3491 static LLVMValueRef
lookup_interp_param(struct nir_to_llvm_context
*ctx
,
3492 enum glsl_interp_mode interp
, unsigned location
)
3495 case INTERP_MODE_FLAT
:
3498 case INTERP_MODE_SMOOTH
:
3499 case INTERP_MODE_NONE
:
3500 if (location
== INTERP_CENTER
)
3501 return ctx
->persp_center
;
3502 else if (location
== INTERP_CENTROID
)
3503 return ctx
->persp_centroid
;
3504 else if (location
== INTERP_SAMPLE
)
3505 return ctx
->persp_sample
;
3507 case INTERP_MODE_NOPERSPECTIVE
:
3508 if (location
== INTERP_CENTER
)
3509 return ctx
->linear_center
;
3510 else if (location
== INTERP_CENTROID
)
3511 return ctx
->linear_centroid
;
3512 else if (location
== INTERP_SAMPLE
)
3513 return ctx
->linear_sample
;
3519 static LLVMValueRef
load_sample_position(struct nir_to_llvm_context
*ctx
,
3520 LLVMValueRef sample_id
)
3522 LLVMValueRef result
;
3523 LLVMValueRef ptr
= ac_build_gep0(&ctx
->ac
, ctx
->ring_offsets
, LLVMConstInt(ctx
->i32
, RING_PS_SAMPLE_POSITIONS
, false));
3525 ptr
= LLVMBuildBitCast(ctx
->builder
, ptr
,
3526 const_array(ctx
->v2f32
, 64), "");
3528 sample_id
= LLVMBuildAdd(ctx
->builder
, sample_id
, ctx
->sample_pos_offset
, "");
3529 result
= ac_build_indexed_load(&ctx
->ac
, ptr
, sample_id
, false);
3531 ctx
->shader_info
->fs
.uses_sample_positions
= true;
3535 static LLVMValueRef
load_sample_pos(struct nir_to_llvm_context
*ctx
)
3537 LLVMValueRef values
[2];
3539 values
[0] = emit_ffract(ctx
, ctx
->frag_pos
[0]);
3540 values
[1] = emit_ffract(ctx
, ctx
->frag_pos
[1]);
3541 return ac_build_gather_values(&ctx
->ac
, values
, 2);
3544 static LLVMValueRef
visit_interp(struct nir_to_llvm_context
*ctx
,
3545 nir_intrinsic_instr
*instr
)
3547 LLVMValueRef result
[2];
3548 LLVMValueRef interp_param
, attr_number
;
3551 LLVMValueRef src_c0
, src_c1
;
3553 int input_index
= instr
->variables
[0]->var
->data
.location
- VARYING_SLOT_VAR0
;
3554 switch (instr
->intrinsic
) {
3555 case nir_intrinsic_interp_var_at_centroid
:
3556 location
= INTERP_CENTROID
;
3558 case nir_intrinsic_interp_var_at_sample
:
3559 location
= INTERP_SAMPLE
;
3560 src0
= get_src(ctx
, instr
->src
[0]);
3562 case nir_intrinsic_interp_var_at_offset
:
3563 location
= INTERP_CENTER
;
3564 src0
= get_src(ctx
, instr
->src
[0]);
3569 if (instr
->intrinsic
== nir_intrinsic_interp_var_at_offset
) {
3570 src_c0
= to_float(ctx
, LLVMBuildExtractElement(ctx
->builder
, src0
, ctx
->i32zero
, ""));
3571 src_c1
= to_float(ctx
, LLVMBuildExtractElement(ctx
->builder
, src0
, ctx
->i32one
, ""));
3572 } else if (instr
->intrinsic
== nir_intrinsic_interp_var_at_sample
) {
3573 LLVMValueRef sample_position
;
3574 LLVMValueRef halfval
= LLVMConstReal(ctx
->f32
, 0.5f
);
3576 /* fetch sample ID */
3577 sample_position
= load_sample_position(ctx
, src0
);
3579 src_c0
= LLVMBuildExtractElement(ctx
->builder
, sample_position
, ctx
->i32zero
, "");
3580 src_c0
= LLVMBuildFSub(ctx
->builder
, src_c0
, halfval
, "");
3581 src_c1
= LLVMBuildExtractElement(ctx
->builder
, sample_position
, ctx
->i32one
, "");
3582 src_c1
= LLVMBuildFSub(ctx
->builder
, src_c1
, halfval
, "");
3584 interp_param
= lookup_interp_param(ctx
, instr
->variables
[0]->var
->data
.interpolation
, location
);
3585 attr_number
= LLVMConstInt(ctx
->i32
, input_index
, false);
3587 if (location
== INTERP_SAMPLE
|| location
== INTERP_CENTER
) {
3588 LLVMValueRef ij_out
[2];
3589 LLVMValueRef ddxy_out
= emit_ddxy_interp(ctx
, interp_param
);
3592 * take the I then J parameters, and the DDX/Y for it, and
3593 * calculate the IJ inputs for the interpolator.
3594 * temp1 = ddx * offset/sample.x + I;
3595 * interp_param.I = ddy * offset/sample.y + temp1;
3596 * temp1 = ddx * offset/sample.x + J;
3597 * interp_param.J = ddy * offset/sample.y + temp1;
3599 for (unsigned i
= 0; i
< 2; i
++) {
3600 LLVMValueRef ix_ll
= LLVMConstInt(ctx
->i32
, i
, false);
3601 LLVMValueRef iy_ll
= LLVMConstInt(ctx
->i32
, i
+ 2, false);
3602 LLVMValueRef ddx_el
= LLVMBuildExtractElement(ctx
->builder
,
3603 ddxy_out
, ix_ll
, "");
3604 LLVMValueRef ddy_el
= LLVMBuildExtractElement(ctx
->builder
,
3605 ddxy_out
, iy_ll
, "");
3606 LLVMValueRef interp_el
= LLVMBuildExtractElement(ctx
->builder
,
3607 interp_param
, ix_ll
, "");
3608 LLVMValueRef temp1
, temp2
;
3610 interp_el
= LLVMBuildBitCast(ctx
->builder
, interp_el
,
3613 temp1
= LLVMBuildFMul(ctx
->builder
, ddx_el
, src_c0
, "");
3614 temp1
= LLVMBuildFAdd(ctx
->builder
, temp1
, interp_el
, "");
3616 temp2
= LLVMBuildFMul(ctx
->builder
, ddy_el
, src_c1
, "");
3617 temp2
= LLVMBuildFAdd(ctx
->builder
, temp2
, temp1
, "");
3619 ij_out
[i
] = LLVMBuildBitCast(ctx
->builder
,
3620 temp2
, ctx
->i32
, "");
3622 interp_param
= ac_build_gather_values(&ctx
->ac
, ij_out
, 2);
3626 for (chan
= 0; chan
< 2; chan
++) {
3627 LLVMValueRef llvm_chan
= LLVMConstInt(ctx
->i32
, chan
, false);
3630 interp_param
= LLVMBuildBitCast(ctx
->builder
,
3631 interp_param
, LLVMVectorType(ctx
->f32
, 2), "");
3632 LLVMValueRef i
= LLVMBuildExtractElement(
3633 ctx
->builder
, interp_param
, ctx
->i32zero
, "");
3634 LLVMValueRef j
= LLVMBuildExtractElement(
3635 ctx
->builder
, interp_param
, ctx
->i32one
, "");
3637 result
[chan
] = ac_build_fs_interp(&ctx
->ac
,
3638 llvm_chan
, attr_number
,
3639 ctx
->prim_mask
, i
, j
);
3641 result
[chan
] = ac_build_fs_interp_mov(&ctx
->ac
,
3642 LLVMConstInt(ctx
->i32
, 2, false),
3643 llvm_chan
, attr_number
,
3647 return ac_build_gather_values(&ctx
->ac
, result
, 2);
3651 visit_emit_vertex(struct nir_to_llvm_context
*ctx
,
3652 nir_intrinsic_instr
*instr
)
3654 LLVMValueRef gs_next_vertex
;
3655 LLVMValueRef can_emit
, kill
;
3658 assert(instr
->const_index
[0] == 0);
3659 /* Write vertex attribute values to GSVS ring */
3660 gs_next_vertex
= LLVMBuildLoad(ctx
->builder
,
3661 ctx
->gs_next_vertex
,
3664 /* If this thread has already emitted the declared maximum number of
3665 * vertices, kill it: excessive vertex emissions are not supposed to
3666 * have any effect, and GS threads have no externally observable
3667 * effects other than emitting vertices.
3669 can_emit
= LLVMBuildICmp(ctx
->builder
, LLVMIntULT
, gs_next_vertex
,
3670 LLVMConstInt(ctx
->i32
, ctx
->gs_max_out_vertices
, false), "");
3672 kill
= LLVMBuildSelect(ctx
->builder
, can_emit
,
3673 LLVMConstReal(ctx
->f32
, 1.0f
),
3674 LLVMConstReal(ctx
->f32
, -1.0f
), "");
3675 ac_build_kill(&ctx
->ac
, kill
);
3677 /* loop num outputs */
3679 for (unsigned i
= 0; i
< RADEON_LLVM_MAX_OUTPUTS
; ++i
) {
3680 LLVMValueRef
*out_ptr
= &ctx
->outputs
[i
* 4];
3685 if (!(ctx
->output_mask
& (1ull << i
)))
3688 if (i
== VARYING_SLOT_CLIP_DIST0
) {
3689 /* pack clip and cull into a single set of slots */
3690 length
= ctx
->num_output_clips
+ ctx
->num_output_culls
;
3694 for (unsigned j
= 0; j
< length
; j
++) {
3695 LLVMValueRef out_val
= LLVMBuildLoad(ctx
->builder
,
3697 LLVMValueRef voffset
= LLVMConstInt(ctx
->i32
, (slot
* 4 + j
) * ctx
->gs_max_out_vertices
, false);
3698 voffset
= LLVMBuildAdd(ctx
->builder
, voffset
, gs_next_vertex
, "");
3699 voffset
= LLVMBuildMul(ctx
->builder
, voffset
, LLVMConstInt(ctx
->i32
, 4, false), "");
3701 out_val
= LLVMBuildBitCast(ctx
->builder
, out_val
, ctx
->i32
, "");
3703 ac_build_buffer_store_dword(&ctx
->ac
, ctx
->gsvs_ring
,
3705 voffset
, ctx
->gs2vs_offset
, 0,
3711 gs_next_vertex
= LLVMBuildAdd(ctx
->builder
, gs_next_vertex
,
3713 LLVMBuildStore(ctx
->builder
, gs_next_vertex
, ctx
->gs_next_vertex
);
3715 ac_build_sendmsg(&ctx
->ac
, AC_SENDMSG_GS_OP_EMIT
| AC_SENDMSG_GS
| (0 << 8), ctx
->gs_wave_id
);
3719 visit_end_primitive(struct nir_to_llvm_context
*ctx
,
3720 nir_intrinsic_instr
*instr
)
3722 ac_build_sendmsg(&ctx
->ac
, AC_SENDMSG_GS_OP_CUT
| AC_SENDMSG_GS
| (0 << 8), ctx
->gs_wave_id
);
3726 visit_load_tess_coord(struct nir_to_llvm_context
*ctx
,
3727 nir_intrinsic_instr
*instr
)
3729 LLVMValueRef coord
[4] = {
3736 if (ctx
->tes_primitive_mode
== GL_TRIANGLES
)
3737 coord
[2] = LLVMBuildFSub(ctx
->builder
, ctx
->f32one
,
3738 LLVMBuildFAdd(ctx
->builder
, coord
[0], coord
[1], ""), "");
3740 LLVMValueRef result
= ac_build_gather_values(&ctx
->ac
, coord
, instr
->num_components
);
3741 return LLVMBuildBitCast(ctx
->builder
, result
,
3742 get_def_type(ctx
, &instr
->dest
.ssa
), "");
3745 static void visit_intrinsic(struct nir_to_llvm_context
*ctx
,
3746 nir_intrinsic_instr
*instr
)
3748 LLVMValueRef result
= NULL
;
3750 switch (instr
->intrinsic
) {
3751 case nir_intrinsic_load_work_group_id
: {
3752 result
= ctx
->workgroup_ids
;
3755 case nir_intrinsic_load_base_vertex
: {
3756 result
= ctx
->base_vertex
;
3759 case nir_intrinsic_load_vertex_id_zero_base
: {
3760 result
= ctx
->vertex_id
;
3763 case nir_intrinsic_load_local_invocation_id
: {
3764 result
= ctx
->local_invocation_ids
;
3767 case nir_intrinsic_load_base_instance
:
3768 result
= ctx
->start_instance
;
3770 case nir_intrinsic_load_draw_id
:
3771 result
= ctx
->draw_index
;
3773 case nir_intrinsic_load_invocation_id
:
3774 if (ctx
->stage
== MESA_SHADER_TESS_CTRL
)
3775 result
= unpack_param(ctx
, ctx
->tcs_rel_ids
, 8, 5);
3777 result
= ctx
->gs_invocation_id
;
3779 case nir_intrinsic_load_primitive_id
:
3780 if (ctx
->stage
== MESA_SHADER_GEOMETRY
)
3781 result
= ctx
->gs_prim_id
;
3782 else if (ctx
->stage
== MESA_SHADER_TESS_CTRL
)
3783 result
= ctx
->tcs_patch_id
;
3784 else if (ctx
->stage
== MESA_SHADER_TESS_EVAL
)
3785 result
= ctx
->tes_patch_id
;
3787 fprintf(stderr
, "Unknown primitive id intrinsic: %d", ctx
->stage
);
3789 case nir_intrinsic_load_sample_id
:
3790 ctx
->shader_info
->fs
.force_persample
= true;
3791 result
= unpack_param(ctx
, ctx
->ancillary
, 8, 4);
3793 case nir_intrinsic_load_sample_pos
:
3794 ctx
->shader_info
->fs
.force_persample
= true;
3795 result
= load_sample_pos(ctx
);
3797 case nir_intrinsic_load_sample_mask_in
:
3798 result
= ctx
->sample_coverage
;
3800 case nir_intrinsic_load_front_face
:
3801 result
= ctx
->front_face
;
3803 case nir_intrinsic_load_instance_id
:
3804 result
= ctx
->instance_id
;
3805 ctx
->shader_info
->vs
.vgpr_comp_cnt
= MAX2(3,
3806 ctx
->shader_info
->vs
.vgpr_comp_cnt
);
3808 case nir_intrinsic_load_num_work_groups
:
3809 result
= ctx
->num_work_groups
;
3811 case nir_intrinsic_load_local_invocation_index
:
3812 result
= visit_load_local_invocation_index(ctx
);
3814 case nir_intrinsic_load_push_constant
:
3815 result
= visit_load_push_constant(ctx
, instr
);
3817 case nir_intrinsic_vulkan_resource_index
:
3818 result
= visit_vulkan_resource_index(ctx
, instr
);
3820 case nir_intrinsic_store_ssbo
:
3821 visit_store_ssbo(ctx
, instr
);
3823 case nir_intrinsic_load_ssbo
:
3824 result
= visit_load_buffer(ctx
, instr
);
3826 case nir_intrinsic_ssbo_atomic_add
:
3827 case nir_intrinsic_ssbo_atomic_imin
:
3828 case nir_intrinsic_ssbo_atomic_umin
:
3829 case nir_intrinsic_ssbo_atomic_imax
:
3830 case nir_intrinsic_ssbo_atomic_umax
:
3831 case nir_intrinsic_ssbo_atomic_and
:
3832 case nir_intrinsic_ssbo_atomic_or
:
3833 case nir_intrinsic_ssbo_atomic_xor
:
3834 case nir_intrinsic_ssbo_atomic_exchange
:
3835 case nir_intrinsic_ssbo_atomic_comp_swap
:
3836 result
= visit_atomic_ssbo(ctx
, instr
);
3838 case nir_intrinsic_load_ubo
:
3839 result
= visit_load_ubo_buffer(ctx
, instr
);
3841 case nir_intrinsic_get_buffer_size
:
3842 result
= visit_get_buffer_size(ctx
, instr
);
3844 case nir_intrinsic_load_var
:
3845 result
= visit_load_var(ctx
, instr
);
3847 case nir_intrinsic_store_var
:
3848 visit_store_var(ctx
, instr
);
3850 case nir_intrinsic_image_load
:
3851 result
= visit_image_load(ctx
, instr
);
3853 case nir_intrinsic_image_store
:
3854 visit_image_store(ctx
, instr
);
3856 case nir_intrinsic_image_atomic_add
:
3857 case nir_intrinsic_image_atomic_min
:
3858 case nir_intrinsic_image_atomic_max
:
3859 case nir_intrinsic_image_atomic_and
:
3860 case nir_intrinsic_image_atomic_or
:
3861 case nir_intrinsic_image_atomic_xor
:
3862 case nir_intrinsic_image_atomic_exchange
:
3863 case nir_intrinsic_image_atomic_comp_swap
:
3864 result
= visit_image_atomic(ctx
, instr
);
3866 case nir_intrinsic_image_size
:
3867 result
= visit_image_size(ctx
, instr
);
3869 case nir_intrinsic_discard
:
3870 ctx
->shader_info
->fs
.can_discard
= true;
3871 ac_build_intrinsic(&ctx
->ac
, "llvm.AMDGPU.kilp",
3873 NULL
, 0, AC_FUNC_ATTR_LEGACY
);
3875 case nir_intrinsic_discard_if
:
3876 emit_discard_if(ctx
, instr
);
3878 case nir_intrinsic_memory_barrier
:
3879 emit_waitcnt(ctx
, VM_CNT
);
3881 case nir_intrinsic_barrier
:
3884 case nir_intrinsic_var_atomic_add
:
3885 case nir_intrinsic_var_atomic_imin
:
3886 case nir_intrinsic_var_atomic_umin
:
3887 case nir_intrinsic_var_atomic_imax
:
3888 case nir_intrinsic_var_atomic_umax
:
3889 case nir_intrinsic_var_atomic_and
:
3890 case nir_intrinsic_var_atomic_or
:
3891 case nir_intrinsic_var_atomic_xor
:
3892 case nir_intrinsic_var_atomic_exchange
:
3893 case nir_intrinsic_var_atomic_comp_swap
:
3894 result
= visit_var_atomic(ctx
, instr
);
3896 case nir_intrinsic_interp_var_at_centroid
:
3897 case nir_intrinsic_interp_var_at_sample
:
3898 case nir_intrinsic_interp_var_at_offset
:
3899 result
= visit_interp(ctx
, instr
);
3901 case nir_intrinsic_emit_vertex
:
3902 visit_emit_vertex(ctx
, instr
);
3904 case nir_intrinsic_end_primitive
:
3905 visit_end_primitive(ctx
, instr
);
3907 case nir_intrinsic_load_tess_coord
:
3908 result
= visit_load_tess_coord(ctx
, instr
);
3910 case nir_intrinsic_load_patch_vertices_in
:
3911 result
= LLVMConstInt(ctx
->i32
, ctx
->options
->key
.tcs
.input_vertices
, false);
3914 fprintf(stderr
, "Unknown intrinsic: ");
3915 nir_print_instr(&instr
->instr
, stderr
);
3916 fprintf(stderr
, "\n");
3920 _mesa_hash_table_insert(ctx
->defs
, &instr
->dest
.ssa
, result
);
3924 static LLVMValueRef
get_sampler_desc(struct nir_to_llvm_context
*ctx
,
3925 nir_deref_var
*deref
,
3926 enum desc_type desc_type
)
3928 unsigned desc_set
= deref
->var
->data
.descriptor_set
;
3929 LLVMValueRef list
= ctx
->descriptor_sets
[desc_set
];
3930 struct radv_descriptor_set_layout
*layout
= ctx
->options
->layout
->set
[desc_set
].layout
;
3931 struct radv_descriptor_set_binding_layout
*binding
= layout
->binding
+ deref
->var
->data
.binding
;
3932 unsigned offset
= binding
->offset
;
3933 unsigned stride
= binding
->size
;
3935 LLVMBuilderRef builder
= ctx
->builder
;
3937 LLVMValueRef index
= NULL
;
3938 unsigned constant_index
= 0;
3940 assert(deref
->var
->data
.binding
< layout
->binding_count
);
3942 switch (desc_type
) {
3954 if (binding
->type
== VK_DESCRIPTOR_TYPE_COMBINED_IMAGE_SAMPLER
)
3964 unreachable("invalid desc_type\n");
3967 if (deref
->deref
.child
) {
3968 nir_deref_array
*child
= (nir_deref_array
*)deref
->deref
.child
;
3970 assert(child
->deref_array_type
!= nir_deref_array_type_wildcard
);
3971 offset
+= child
->base_offset
* stride
;
3972 if (child
->deref_array_type
== nir_deref_array_type_indirect
) {
3973 index
= get_src(ctx
, child
->indirect
);
3976 constant_index
= child
->base_offset
;
3978 if (desc_type
== DESC_SAMPLER
&& binding
->immutable_samplers
&&
3979 (!index
|| binding
->immutable_samplers_equal
)) {
3980 if (binding
->immutable_samplers_equal
)
3983 LLVMValueRef constants
[] = {
3984 LLVMConstInt(ctx
->i32
, binding
->immutable_samplers
[constant_index
* 4 + 0], 0),
3985 LLVMConstInt(ctx
->i32
, binding
->immutable_samplers
[constant_index
* 4 + 1], 0),
3986 LLVMConstInt(ctx
->i32
, binding
->immutable_samplers
[constant_index
* 4 + 2], 0),
3987 LLVMConstInt(ctx
->i32
, binding
->immutable_samplers
[constant_index
* 4 + 3], 0),
3989 return ac_build_gather_values(&ctx
->ac
, constants
, 4);
3992 assert(stride
% type_size
== 0);
3995 index
= ctx
->i32zero
;
3997 index
= LLVMBuildMul(builder
, index
, LLVMConstInt(ctx
->i32
, stride
/ type_size
, 0), "");
3999 list
= ac_build_gep0(&ctx
->ac
, list
, LLVMConstInt(ctx
->i32
, offset
, 0));
4000 list
= LLVMBuildPointerCast(builder
, list
, const_array(type
, 0), "");
4002 return ac_build_indexed_load_const(&ctx
->ac
, list
, index
);
4005 static void set_tex_fetch_args(struct nir_to_llvm_context
*ctx
,
4006 struct ac_image_args
*args
,
4007 nir_tex_instr
*instr
,
4009 LLVMValueRef res_ptr
, LLVMValueRef samp_ptr
,
4010 LLVMValueRef
*param
, unsigned count
,
4013 unsigned is_rect
= 0;
4014 bool da
= instr
->is_array
|| instr
->sampler_dim
== GLSL_SAMPLER_DIM_CUBE
;
4016 if (op
== nir_texop_lod
)
4018 /* Pad to power of two vector */
4019 while (count
< util_next_power_of_two(count
))
4020 param
[count
++] = LLVMGetUndef(ctx
->i32
);
4023 args
->addr
= ac_build_gather_values(&ctx
->ac
, param
, count
);
4025 args
->addr
= param
[0];
4027 args
->resource
= res_ptr
;
4028 args
->sampler
= samp_ptr
;
4030 if (instr
->sampler_dim
== GLSL_SAMPLER_DIM_BUF
&& op
== nir_texop_txf
) {
4031 args
->addr
= param
[0];
4035 args
->dmask
= dmask
;
4036 args
->unorm
= is_rect
;
4040 /* Disable anisotropic filtering if BASE_LEVEL == LAST_LEVEL.
4043 * If BASE_LEVEL == LAST_LEVEL, the shader must disable anisotropic
4044 * filtering manually. The driver sets img7 to a mask clearing
4045 * MAX_ANISO_RATIO if BASE_LEVEL == LAST_LEVEL. The shader must do:
4046 * s_and_b32 samp0, samp0, img7
4049 * The ANISO_OVERRIDE sampler field enables this fix in TA.
4051 static LLVMValueRef
sici_fix_sampler_aniso(struct nir_to_llvm_context
*ctx
,
4052 LLVMValueRef res
, LLVMValueRef samp
)
4054 LLVMBuilderRef builder
= ctx
->builder
;
4055 LLVMValueRef img7
, samp0
;
4057 if (ctx
->options
->chip_class
>= VI
)
4060 img7
= LLVMBuildExtractElement(builder
, res
,
4061 LLVMConstInt(ctx
->i32
, 7, 0), "");
4062 samp0
= LLVMBuildExtractElement(builder
, samp
,
4063 LLVMConstInt(ctx
->i32
, 0, 0), "");
4064 samp0
= LLVMBuildAnd(builder
, samp0
, img7
, "");
4065 return LLVMBuildInsertElement(builder
, samp
, samp0
,
4066 LLVMConstInt(ctx
->i32
, 0, 0), "");
4069 static void tex_fetch_ptrs(struct nir_to_llvm_context
*ctx
,
4070 nir_tex_instr
*instr
,
4071 LLVMValueRef
*res_ptr
, LLVMValueRef
*samp_ptr
,
4072 LLVMValueRef
*fmask_ptr
)
4074 if (instr
->sampler_dim
== GLSL_SAMPLER_DIM_BUF
)
4075 *res_ptr
= get_sampler_desc(ctx
, instr
->texture
, DESC_BUFFER
);
4077 *res_ptr
= get_sampler_desc(ctx
, instr
->texture
, DESC_IMAGE
);
4080 *samp_ptr
= get_sampler_desc(ctx
, instr
->sampler
, DESC_SAMPLER
);
4082 *samp_ptr
= get_sampler_desc(ctx
, instr
->texture
, DESC_SAMPLER
);
4083 if (instr
->sampler_dim
< GLSL_SAMPLER_DIM_RECT
)
4084 *samp_ptr
= sici_fix_sampler_aniso(ctx
, *res_ptr
, *samp_ptr
);
4086 if (fmask_ptr
&& !instr
->sampler
&& (instr
->op
== nir_texop_txf_ms
||
4087 instr
->op
== nir_texop_samples_identical
))
4088 *fmask_ptr
= get_sampler_desc(ctx
, instr
->texture
, DESC_FMASK
);
4091 static LLVMValueRef
apply_round_slice(struct nir_to_llvm_context
*ctx
,
4094 coord
= to_float(ctx
, coord
);
4095 coord
= ac_build_intrinsic(&ctx
->ac
, "llvm.rint.f32", ctx
->f32
, &coord
, 1, 0);
4096 coord
= to_integer(ctx
, coord
);
4100 static void visit_tex(struct nir_to_llvm_context
*ctx
, nir_tex_instr
*instr
)
4102 LLVMValueRef result
= NULL
;
4103 struct ac_image_args args
= { 0 };
4104 unsigned dmask
= 0xf;
4105 LLVMValueRef address
[16];
4106 LLVMValueRef coords
[5];
4107 LLVMValueRef coord
= NULL
, lod
= NULL
, comparator
= NULL
;
4108 LLVMValueRef bias
= NULL
, offsets
= NULL
;
4109 LLVMValueRef res_ptr
, samp_ptr
, fmask_ptr
= NULL
, sample_index
= NULL
;
4110 LLVMValueRef ddx
= NULL
, ddy
= NULL
;
4111 LLVMValueRef derivs
[6];
4112 unsigned chan
, count
= 0;
4113 unsigned const_src
= 0, num_deriv_comp
= 0;
4115 tex_fetch_ptrs(ctx
, instr
, &res_ptr
, &samp_ptr
, &fmask_ptr
);
4117 for (unsigned i
= 0; i
< instr
->num_srcs
; i
++) {
4118 switch (instr
->src
[i
].src_type
) {
4119 case nir_tex_src_coord
:
4120 coord
= get_src(ctx
, instr
->src
[i
].src
);
4122 case nir_tex_src_projector
:
4124 case nir_tex_src_comparator
:
4125 comparator
= get_src(ctx
, instr
->src
[i
].src
);
4127 case nir_tex_src_offset
:
4128 offsets
= get_src(ctx
, instr
->src
[i
].src
);
4131 case nir_tex_src_bias
:
4132 bias
= get_src(ctx
, instr
->src
[i
].src
);
4134 case nir_tex_src_lod
:
4135 lod
= get_src(ctx
, instr
->src
[i
].src
);
4137 case nir_tex_src_ms_index
:
4138 sample_index
= get_src(ctx
, instr
->src
[i
].src
);
4140 case nir_tex_src_ms_mcs
:
4142 case nir_tex_src_ddx
:
4143 ddx
= get_src(ctx
, instr
->src
[i
].src
);
4144 num_deriv_comp
= instr
->src
[i
].src
.ssa
->num_components
;
4146 case nir_tex_src_ddy
:
4147 ddy
= get_src(ctx
, instr
->src
[i
].src
);
4149 case nir_tex_src_texture_offset
:
4150 case nir_tex_src_sampler_offset
:
4151 case nir_tex_src_plane
:
4157 if (instr
->op
== nir_texop_txs
&& instr
->sampler_dim
== GLSL_SAMPLER_DIM_BUF
) {
4158 result
= get_buffer_size(ctx
, res_ptr
, true);
4162 if (instr
->op
== nir_texop_texture_samples
) {
4163 LLVMValueRef res
, samples
, is_msaa
;
4164 res
= LLVMBuildBitCast(ctx
->builder
, res_ptr
, ctx
->v8i32
, "");
4165 samples
= LLVMBuildExtractElement(ctx
->builder
, res
,
4166 LLVMConstInt(ctx
->i32
, 3, false), "");
4167 is_msaa
= LLVMBuildLShr(ctx
->builder
, samples
,
4168 LLVMConstInt(ctx
->i32
, 28, false), "");
4169 is_msaa
= LLVMBuildAnd(ctx
->builder
, is_msaa
,
4170 LLVMConstInt(ctx
->i32
, 0xe, false), "");
4171 is_msaa
= LLVMBuildICmp(ctx
->builder
, LLVMIntEQ
, is_msaa
,
4172 LLVMConstInt(ctx
->i32
, 0xe, false), "");
4174 samples
= LLVMBuildLShr(ctx
->builder
, samples
,
4175 LLVMConstInt(ctx
->i32
, 16, false), "");
4176 samples
= LLVMBuildAnd(ctx
->builder
, samples
,
4177 LLVMConstInt(ctx
->i32
, 0xf, false), "");
4178 samples
= LLVMBuildShl(ctx
->builder
, ctx
->i32one
,
4180 samples
= LLVMBuildSelect(ctx
->builder
, is_msaa
, samples
,
4187 for (chan
= 0; chan
< instr
->coord_components
; chan
++)
4188 coords
[chan
] = llvm_extract_elem(ctx
, coord
, chan
);
4190 if (offsets
&& instr
->op
!= nir_texop_txf
) {
4191 LLVMValueRef offset
[3], pack
;
4192 for (chan
= 0; chan
< 3; ++chan
)
4193 offset
[chan
] = ctx
->i32zero
;
4196 for (chan
= 0; chan
< get_llvm_num_components(offsets
); chan
++) {
4197 offset
[chan
] = llvm_extract_elem(ctx
, offsets
, chan
);
4198 offset
[chan
] = LLVMBuildAnd(ctx
->builder
, offset
[chan
],
4199 LLVMConstInt(ctx
->i32
, 0x3f, false), "");
4201 offset
[chan
] = LLVMBuildShl(ctx
->builder
, offset
[chan
],
4202 LLVMConstInt(ctx
->i32
, chan
* 8, false), "");
4204 pack
= LLVMBuildOr(ctx
->builder
, offset
[0], offset
[1], "");
4205 pack
= LLVMBuildOr(ctx
->builder
, pack
, offset
[2], "");
4206 address
[count
++] = pack
;
4209 /* pack LOD bias value */
4210 if (instr
->op
== nir_texop_txb
&& bias
) {
4211 address
[count
++] = bias
;
4214 /* Pack depth comparison value */
4215 if (instr
->is_shadow
&& comparator
) {
4216 address
[count
++] = llvm_extract_elem(ctx
, comparator
, 0);
4219 /* pack derivatives */
4221 switch (instr
->sampler_dim
) {
4222 case GLSL_SAMPLER_DIM_3D
:
4223 case GLSL_SAMPLER_DIM_CUBE
:
4226 case GLSL_SAMPLER_DIM_2D
:
4230 case GLSL_SAMPLER_DIM_1D
:
4235 for (unsigned i
= 0; i
< num_deriv_comp
; i
++) {
4236 derivs
[i
] = to_float(ctx
, llvm_extract_elem(ctx
, ddx
, i
));
4237 derivs
[num_deriv_comp
+ i
] = to_float(ctx
, llvm_extract_elem(ctx
, ddy
, i
));
4241 if (instr
->sampler_dim
== GLSL_SAMPLER_DIM_CUBE
&& coord
) {
4242 if (instr
->is_array
&& instr
->op
!= nir_texop_lod
)
4243 coords
[3] = apply_round_slice(ctx
, coords
[3]);
4244 for (chan
= 0; chan
< instr
->coord_components
; chan
++)
4245 coords
[chan
] = to_float(ctx
, coords
[chan
]);
4246 if (instr
->coord_components
== 3)
4247 coords
[3] = LLVMGetUndef(ctx
->f32
);
4248 ac_prepare_cube_coords(&ctx
->ac
,
4249 instr
->op
== nir_texop_txd
, instr
->is_array
,
4256 for (unsigned i
= 0; i
< num_deriv_comp
* 2; i
++)
4257 address
[count
++] = derivs
[i
];
4260 /* Pack texture coordinates */
4262 address
[count
++] = coords
[0];
4263 if (instr
->coord_components
> 1) {
4264 if (instr
->sampler_dim
== GLSL_SAMPLER_DIM_1D
&& instr
->is_array
&& instr
->op
!= nir_texop_txf
) {
4265 coords
[1] = apply_round_slice(ctx
, coords
[1]);
4267 address
[count
++] = coords
[1];
4269 if (instr
->coord_components
> 2) {
4270 /* This seems like a bit of a hack - but it passes Vulkan CTS with it */
4271 if (instr
->sampler_dim
!= GLSL_SAMPLER_DIM_3D
&&
4272 instr
->sampler_dim
!= GLSL_SAMPLER_DIM_CUBE
&&
4273 instr
->op
!= nir_texop_txf
) {
4274 coords
[2] = apply_round_slice(ctx
, coords
[2]);
4276 address
[count
++] = coords
[2];
4281 if ((instr
->op
== nir_texop_txl
|| instr
->op
== nir_texop_txf
) && lod
) {
4282 address
[count
++] = lod
;
4283 } else if (instr
->op
== nir_texop_txf_ms
&& sample_index
) {
4284 address
[count
++] = sample_index
;
4285 } else if(instr
->op
== nir_texop_txs
) {
4288 address
[count
++] = lod
;
4290 address
[count
++] = ctx
->i32zero
;
4293 for (chan
= 0; chan
< count
; chan
++) {
4294 address
[chan
] = LLVMBuildBitCast(ctx
->builder
,
4295 address
[chan
], ctx
->i32
, "");
4298 if (instr
->op
== nir_texop_samples_identical
) {
4299 LLVMValueRef txf_address
[4];
4300 struct ac_image_args txf_args
= { 0 };
4301 unsigned txf_count
= count
;
4302 memcpy(txf_address
, address
, sizeof(txf_address
));
4304 if (!instr
->is_array
)
4305 txf_address
[2] = ctx
->i32zero
;
4306 txf_address
[3] = ctx
->i32zero
;
4308 set_tex_fetch_args(ctx
, &txf_args
, instr
, nir_texop_txf
,
4310 txf_address
, txf_count
, 0xf);
4312 result
= build_tex_intrinsic(ctx
, instr
, &txf_args
);
4314 result
= LLVMBuildExtractElement(ctx
->builder
, result
, ctx
->i32zero
, "");
4315 result
= emit_int_cmp(ctx
, LLVMIntEQ
, result
, ctx
->i32zero
);
4319 if (instr
->sampler_dim
== GLSL_SAMPLER_DIM_MS
&&
4320 instr
->op
!= nir_texop_txs
) {
4321 unsigned sample_chan
= instr
->is_array
? 3 : 2;
4322 address
[sample_chan
] = adjust_sample_index_using_fmask(ctx
,
4325 instr
->is_array
? address
[2] : NULL
,
4326 address
[sample_chan
],
4330 if (offsets
&& instr
->op
== nir_texop_txf
) {
4331 nir_const_value
*const_offset
=
4332 nir_src_as_const_value(instr
->src
[const_src
].src
);
4333 int num_offsets
= instr
->src
[const_src
].src
.ssa
->num_components
;
4334 assert(const_offset
);
4335 num_offsets
= MIN2(num_offsets
, instr
->coord_components
);
4336 if (num_offsets
> 2)
4337 address
[2] = LLVMBuildAdd(ctx
->builder
,
4338 address
[2], LLVMConstInt(ctx
->i32
, const_offset
->i32
[2], false), "");
4339 if (num_offsets
> 1)
4340 address
[1] = LLVMBuildAdd(ctx
->builder
,
4341 address
[1], LLVMConstInt(ctx
->i32
, const_offset
->i32
[1], false), "");
4342 address
[0] = LLVMBuildAdd(ctx
->builder
,
4343 address
[0], LLVMConstInt(ctx
->i32
, const_offset
->i32
[0], false), "");
4347 /* TODO TG4 support */
4348 if (instr
->op
== nir_texop_tg4
) {
4349 if (instr
->is_shadow
)
4352 dmask
= 1 << instr
->component
;
4354 set_tex_fetch_args(ctx
, &args
, instr
, instr
->op
,
4355 res_ptr
, samp_ptr
, address
, count
, dmask
);
4357 result
= build_tex_intrinsic(ctx
, instr
, &args
);
4359 if (instr
->op
== nir_texop_query_levels
)
4360 result
= LLVMBuildExtractElement(ctx
->builder
, result
, LLVMConstInt(ctx
->i32
, 3, false), "");
4361 else if (instr
->is_shadow
&& instr
->op
!= nir_texop_txs
&& instr
->op
!= nir_texop_lod
&& instr
->op
!= nir_texop_tg4
)
4362 result
= LLVMBuildExtractElement(ctx
->builder
, result
, ctx
->i32zero
, "");
4363 else if (instr
->op
== nir_texop_txs
&&
4364 instr
->sampler_dim
== GLSL_SAMPLER_DIM_CUBE
&&
4366 LLVMValueRef two
= LLVMConstInt(ctx
->i32
, 2, false);
4367 LLVMValueRef six
= LLVMConstInt(ctx
->i32
, 6, false);
4368 LLVMValueRef z
= LLVMBuildExtractElement(ctx
->builder
, result
, two
, "");
4369 z
= LLVMBuildSDiv(ctx
->builder
, z
, six
, "");
4370 result
= LLVMBuildInsertElement(ctx
->builder
, result
, z
, two
, "");
4371 } else if (instr
->dest
.ssa
.num_components
!= 4)
4372 result
= trim_vector(ctx
, result
, instr
->dest
.ssa
.num_components
);
4376 assert(instr
->dest
.is_ssa
);
4377 result
= to_integer(ctx
, result
);
4378 _mesa_hash_table_insert(ctx
->defs
, &instr
->dest
.ssa
, result
);
4383 static void visit_phi(struct nir_to_llvm_context
*ctx
, nir_phi_instr
*instr
)
4385 LLVMTypeRef type
= get_def_type(ctx
, &instr
->dest
.ssa
);
4386 LLVMValueRef result
= LLVMBuildPhi(ctx
->builder
, type
, "");
4388 _mesa_hash_table_insert(ctx
->defs
, &instr
->dest
.ssa
, result
);
4389 _mesa_hash_table_insert(ctx
->phis
, instr
, result
);
4392 static void visit_post_phi(struct nir_to_llvm_context
*ctx
,
4393 nir_phi_instr
*instr
,
4394 LLVMValueRef llvm_phi
)
4396 nir_foreach_phi_src(src
, instr
) {
4397 LLVMBasicBlockRef block
= get_block(ctx
, src
->pred
);
4398 LLVMValueRef llvm_src
= get_src(ctx
, src
->src
);
4400 LLVMAddIncoming(llvm_phi
, &llvm_src
, &block
, 1);
4404 static void phi_post_pass(struct nir_to_llvm_context
*ctx
)
4406 struct hash_entry
*entry
;
4407 hash_table_foreach(ctx
->phis
, entry
) {
4408 visit_post_phi(ctx
, (nir_phi_instr
*)entry
->key
,
4409 (LLVMValueRef
)entry
->data
);
4414 static void visit_ssa_undef(struct nir_to_llvm_context
*ctx
,
4415 nir_ssa_undef_instr
*instr
)
4417 unsigned num_components
= instr
->def
.num_components
;
4420 if (num_components
== 1)
4421 undef
= LLVMGetUndef(ctx
->i32
);
4423 undef
= LLVMGetUndef(LLVMVectorType(ctx
->i32
, num_components
));
4425 _mesa_hash_table_insert(ctx
->defs
, &instr
->def
, undef
);
4428 static void visit_jump(struct nir_to_llvm_context
*ctx
,
4429 nir_jump_instr
*instr
)
4431 switch (instr
->type
) {
4432 case nir_jump_break
:
4433 LLVMBuildBr(ctx
->builder
, ctx
->break_block
);
4434 LLVMClearInsertionPosition(ctx
->builder
);
4436 case nir_jump_continue
:
4437 LLVMBuildBr(ctx
->builder
, ctx
->continue_block
);
4438 LLVMClearInsertionPosition(ctx
->builder
);
4441 fprintf(stderr
, "Unknown NIR jump instr: ");
4442 nir_print_instr(&instr
->instr
, stderr
);
4443 fprintf(stderr
, "\n");
4448 static void visit_cf_list(struct nir_to_llvm_context
*ctx
,
4449 struct exec_list
*list
);
4451 static void visit_block(struct nir_to_llvm_context
*ctx
, nir_block
*block
)
4453 LLVMBasicBlockRef llvm_block
= LLVMGetInsertBlock(ctx
->builder
);
4454 nir_foreach_instr(instr
, block
)
4456 switch (instr
->type
) {
4457 case nir_instr_type_alu
:
4458 visit_alu(ctx
, nir_instr_as_alu(instr
));
4460 case nir_instr_type_load_const
:
4461 visit_load_const(ctx
, nir_instr_as_load_const(instr
));
4463 case nir_instr_type_intrinsic
:
4464 visit_intrinsic(ctx
, nir_instr_as_intrinsic(instr
));
4466 case nir_instr_type_tex
:
4467 visit_tex(ctx
, nir_instr_as_tex(instr
));
4469 case nir_instr_type_phi
:
4470 visit_phi(ctx
, nir_instr_as_phi(instr
));
4472 case nir_instr_type_ssa_undef
:
4473 visit_ssa_undef(ctx
, nir_instr_as_ssa_undef(instr
));
4475 case nir_instr_type_jump
:
4476 visit_jump(ctx
, nir_instr_as_jump(instr
));
4479 fprintf(stderr
, "Unknown NIR instr type: ");
4480 nir_print_instr(instr
, stderr
);
4481 fprintf(stderr
, "\n");
4486 _mesa_hash_table_insert(ctx
->defs
, block
, llvm_block
);
4489 static void visit_if(struct nir_to_llvm_context
*ctx
, nir_if
*if_stmt
)
4491 LLVMValueRef value
= get_src(ctx
, if_stmt
->condition
);
4493 LLVMBasicBlockRef merge_block
=
4494 LLVMAppendBasicBlockInContext(ctx
->context
, ctx
->main_function
, "");
4495 LLVMBasicBlockRef if_block
=
4496 LLVMAppendBasicBlockInContext(ctx
->context
, ctx
->main_function
, "");
4497 LLVMBasicBlockRef else_block
= merge_block
;
4498 if (!exec_list_is_empty(&if_stmt
->else_list
))
4499 else_block
= LLVMAppendBasicBlockInContext(
4500 ctx
->context
, ctx
->main_function
, "");
4502 LLVMValueRef cond
= LLVMBuildICmp(ctx
->builder
, LLVMIntNE
, value
,
4503 LLVMConstInt(ctx
->i32
, 0, false), "");
4504 LLVMBuildCondBr(ctx
->builder
, cond
, if_block
, else_block
);
4506 LLVMPositionBuilderAtEnd(ctx
->builder
, if_block
);
4507 visit_cf_list(ctx
, &if_stmt
->then_list
);
4508 if (LLVMGetInsertBlock(ctx
->builder
))
4509 LLVMBuildBr(ctx
->builder
, merge_block
);
4511 if (!exec_list_is_empty(&if_stmt
->else_list
)) {
4512 LLVMPositionBuilderAtEnd(ctx
->builder
, else_block
);
4513 visit_cf_list(ctx
, &if_stmt
->else_list
);
4514 if (LLVMGetInsertBlock(ctx
->builder
))
4515 LLVMBuildBr(ctx
->builder
, merge_block
);
4518 LLVMPositionBuilderAtEnd(ctx
->builder
, merge_block
);
4521 static void visit_loop(struct nir_to_llvm_context
*ctx
, nir_loop
*loop
)
4523 LLVMBasicBlockRef continue_parent
= ctx
->continue_block
;
4524 LLVMBasicBlockRef break_parent
= ctx
->break_block
;
4526 ctx
->continue_block
=
4527 LLVMAppendBasicBlockInContext(ctx
->context
, ctx
->main_function
, "");
4529 LLVMAppendBasicBlockInContext(ctx
->context
, ctx
->main_function
, "");
4531 LLVMBuildBr(ctx
->builder
, ctx
->continue_block
);
4532 LLVMPositionBuilderAtEnd(ctx
->builder
, ctx
->continue_block
);
4533 visit_cf_list(ctx
, &loop
->body
);
4535 if (LLVMGetInsertBlock(ctx
->builder
))
4536 LLVMBuildBr(ctx
->builder
, ctx
->continue_block
);
4537 LLVMPositionBuilderAtEnd(ctx
->builder
, ctx
->break_block
);
4539 ctx
->continue_block
= continue_parent
;
4540 ctx
->break_block
= break_parent
;
4543 static void visit_cf_list(struct nir_to_llvm_context
*ctx
,
4544 struct exec_list
*list
)
4546 foreach_list_typed(nir_cf_node
, node
, node
, list
)
4548 switch (node
->type
) {
4549 case nir_cf_node_block
:
4550 visit_block(ctx
, nir_cf_node_as_block(node
));
4553 case nir_cf_node_if
:
4554 visit_if(ctx
, nir_cf_node_as_if(node
));
4557 case nir_cf_node_loop
:
4558 visit_loop(ctx
, nir_cf_node_as_loop(node
));
4568 handle_vs_input_decl(struct nir_to_llvm_context
*ctx
,
4569 struct nir_variable
*variable
)
4571 LLVMValueRef t_list_ptr
= ctx
->vertex_buffers
;
4572 LLVMValueRef t_offset
;
4573 LLVMValueRef t_list
;
4575 LLVMValueRef buffer_index
;
4576 int index
= variable
->data
.location
- VERT_ATTRIB_GENERIC0
;
4577 int idx
= variable
->data
.location
;
4578 unsigned attrib_count
= glsl_count_attribute_slots(variable
->type
, true);
4580 variable
->data
.driver_location
= idx
* 4;
4582 if (ctx
->options
->key
.vs
.instance_rate_inputs
& (1u << index
)) {
4583 buffer_index
= LLVMBuildAdd(ctx
->builder
, ctx
->instance_id
,
4584 ctx
->start_instance
, "");
4585 ctx
->shader_info
->vs
.vgpr_comp_cnt
= MAX2(3,
4586 ctx
->shader_info
->vs
.vgpr_comp_cnt
);
4588 buffer_index
= LLVMBuildAdd(ctx
->builder
, ctx
->vertex_id
,
4589 ctx
->base_vertex
, "");
4591 for (unsigned i
= 0; i
< attrib_count
; ++i
, ++idx
) {
4592 t_offset
= LLVMConstInt(ctx
->i32
, index
+ i
, false);
4594 t_list
= ac_build_indexed_load_const(&ctx
->ac
, t_list_ptr
, t_offset
);
4596 input
= ac_build_buffer_load_format(&ctx
->ac
, t_list
,
4598 LLVMConstInt(ctx
->i32
, 0, false),
4601 for (unsigned chan
= 0; chan
< 4; chan
++) {
4602 LLVMValueRef llvm_chan
= LLVMConstInt(ctx
->i32
, chan
, false);
4603 ctx
->inputs
[radeon_llvm_reg_index_soa(idx
, chan
)] =
4604 to_integer(ctx
, LLVMBuildExtractElement(ctx
->builder
,
4605 input
, llvm_chan
, ""));
4610 static void interp_fs_input(struct nir_to_llvm_context
*ctx
,
4612 LLVMValueRef interp_param
,
4613 LLVMValueRef prim_mask
,
4614 LLVMValueRef result
[4])
4616 LLVMValueRef attr_number
;
4619 bool interp
= interp_param
!= NULL
;
4621 attr_number
= LLVMConstInt(ctx
->i32
, attr
, false);
4623 /* fs.constant returns the param from the middle vertex, so it's not
4624 * really useful for flat shading. It's meant to be used for custom
4625 * interpolation (but the intrinsic can't fetch from the other two
4628 * Luckily, it doesn't matter, because we rely on the FLAT_SHADE state
4629 * to do the right thing. The only reason we use fs.constant is that
4630 * fs.interp cannot be used on integers, because they can be equal
4634 interp_param
= LLVMBuildBitCast(ctx
->builder
, interp_param
,
4635 LLVMVectorType(ctx
->f32
, 2), "");
4637 i
= LLVMBuildExtractElement(ctx
->builder
, interp_param
,
4639 j
= LLVMBuildExtractElement(ctx
->builder
, interp_param
,
4643 for (chan
= 0; chan
< 4; chan
++) {
4644 LLVMValueRef llvm_chan
= LLVMConstInt(ctx
->i32
, chan
, false);
4647 result
[chan
] = ac_build_fs_interp(&ctx
->ac
,
4652 result
[chan
] = ac_build_fs_interp_mov(&ctx
->ac
,
4653 LLVMConstInt(ctx
->i32
, 2, false),
4662 handle_fs_input_decl(struct nir_to_llvm_context
*ctx
,
4663 struct nir_variable
*variable
)
4665 int idx
= variable
->data
.location
;
4666 unsigned attrib_count
= glsl_count_attribute_slots(variable
->type
, false);
4667 LLVMValueRef interp
;
4669 variable
->data
.driver_location
= idx
* 4;
4670 ctx
->input_mask
|= ((1ull << attrib_count
) - 1) << variable
->data
.location
;
4672 if (glsl_get_base_type(glsl_without_array(variable
->type
)) == GLSL_TYPE_FLOAT
) {
4673 unsigned interp_type
;
4674 if (variable
->data
.sample
) {
4675 interp_type
= INTERP_SAMPLE
;
4676 ctx
->shader_info
->fs
.force_persample
= true;
4677 } else if (variable
->data
.centroid
)
4678 interp_type
= INTERP_CENTROID
;
4680 interp_type
= INTERP_CENTER
;
4682 interp
= lookup_interp_param(ctx
, variable
->data
.interpolation
, interp_type
);
4686 for (unsigned i
= 0; i
< attrib_count
; ++i
)
4687 ctx
->inputs
[radeon_llvm_reg_index_soa(idx
+ i
, 0)] = interp
;
4692 handle_shader_input_decl(struct nir_to_llvm_context
*ctx
,
4693 struct nir_variable
*variable
)
4695 switch (ctx
->stage
) {
4696 case MESA_SHADER_VERTEX
:
4697 handle_vs_input_decl(ctx
, variable
);
4699 case MESA_SHADER_FRAGMENT
:
4700 handle_fs_input_decl(ctx
, variable
);
4709 handle_fs_inputs_pre(struct nir_to_llvm_context
*ctx
,
4710 struct nir_shader
*nir
)
4713 for (unsigned i
= 0; i
< RADEON_LLVM_MAX_INPUTS
; ++i
) {
4714 LLVMValueRef interp_param
;
4715 LLVMValueRef
*inputs
= ctx
->inputs
+radeon_llvm_reg_index_soa(i
, 0);
4717 if (!(ctx
->input_mask
& (1ull << i
)))
4720 if (i
>= VARYING_SLOT_VAR0
|| i
== VARYING_SLOT_PNTC
||
4721 i
== VARYING_SLOT_PRIMITIVE_ID
|| i
== VARYING_SLOT_LAYER
) {
4722 interp_param
= *inputs
;
4723 interp_fs_input(ctx
, index
, interp_param
, ctx
->prim_mask
,
4727 ctx
->shader_info
->fs
.flat_shaded_mask
|= 1u << index
;
4729 } else if (i
== VARYING_SLOT_POS
) {
4730 for(int i
= 0; i
< 3; ++i
)
4731 inputs
[i
] = ctx
->frag_pos
[i
];
4733 inputs
[3] = ac_build_fdiv(&ctx
->ac
, ctx
->f32one
, ctx
->frag_pos
[3]);
4736 ctx
->shader_info
->fs
.num_interp
= index
;
4737 if (ctx
->input_mask
& (1 << VARYING_SLOT_PNTC
))
4738 ctx
->shader_info
->fs
.has_pcoord
= true;
4739 if (ctx
->input_mask
& (1 << VARYING_SLOT_PRIMITIVE_ID
))
4740 ctx
->shader_info
->fs
.prim_id_input
= true;
4741 if (ctx
->input_mask
& (1 << VARYING_SLOT_LAYER
))
4742 ctx
->shader_info
->fs
.layer_input
= true;
4743 ctx
->shader_info
->fs
.input_mask
= ctx
->input_mask
>> VARYING_SLOT_VAR0
;
4747 ac_build_alloca(struct nir_to_llvm_context
*ctx
,
4751 LLVMBuilderRef builder
= ctx
->builder
;
4752 LLVMBasicBlockRef current_block
= LLVMGetInsertBlock(builder
);
4753 LLVMValueRef function
= LLVMGetBasicBlockParent(current_block
);
4754 LLVMBasicBlockRef first_block
= LLVMGetEntryBasicBlock(function
);
4755 LLVMValueRef first_instr
= LLVMGetFirstInstruction(first_block
);
4756 LLVMBuilderRef first_builder
= LLVMCreateBuilderInContext(ctx
->context
);
4760 LLVMPositionBuilderBefore(first_builder
, first_instr
);
4762 LLVMPositionBuilderAtEnd(first_builder
, first_block
);
4765 res
= LLVMBuildAlloca(first_builder
, type
, name
);
4766 LLVMBuildStore(builder
, LLVMConstNull(type
), res
);
4768 LLVMDisposeBuilder(first_builder
);
4773 static LLVMValueRef
si_build_alloca_undef(struct nir_to_llvm_context
*ctx
,
4777 LLVMValueRef ptr
= ac_build_alloca(ctx
, type
, name
);
4778 LLVMBuildStore(ctx
->builder
, LLVMGetUndef(type
), ptr
);
4783 handle_shader_output_decl(struct nir_to_llvm_context
*ctx
,
4784 struct nir_variable
*variable
)
4786 int idx
= variable
->data
.location
+ variable
->data
.index
;
4787 unsigned attrib_count
= glsl_count_attribute_slots(variable
->type
, false);
4788 uint64_t mask_attribs
;
4789 variable
->data
.driver_location
= idx
* 4;
4791 /* tess ctrl has it's own load/store paths for outputs */
4792 if (ctx
->stage
== MESA_SHADER_TESS_CTRL
)
4795 mask_attribs
= ((1ull << attrib_count
) - 1) << idx
;
4796 if (ctx
->stage
== MESA_SHADER_VERTEX
||
4797 ctx
->stage
== MESA_SHADER_TESS_EVAL
||
4798 ctx
->stage
== MESA_SHADER_GEOMETRY
) {
4799 if (idx
== VARYING_SLOT_CLIP_DIST0
) {
4800 int length
= ctx
->num_output_clips
+ ctx
->num_output_culls
;
4801 if (ctx
->stage
== MESA_SHADER_VERTEX
) {
4802 ctx
->shader_info
->vs
.outinfo
.clip_dist_mask
= (1 << ctx
->num_output_clips
) - 1;
4803 ctx
->shader_info
->vs
.outinfo
.cull_dist_mask
= (1 << ctx
->num_output_culls
) - 1;
4805 if (ctx
->stage
== MESA_SHADER_TESS_EVAL
) {
4806 ctx
->shader_info
->tes
.outinfo
.clip_dist_mask
= (1 << ctx
->num_output_clips
) - 1;
4807 ctx
->shader_info
->tes
.outinfo
.cull_dist_mask
= (1 << ctx
->num_output_culls
) - 1;
4814 mask_attribs
= 1ull << idx
;
4818 for (unsigned i
= 0; i
< attrib_count
; ++i
) {
4819 for (unsigned chan
= 0; chan
< 4; chan
++) {
4820 ctx
->outputs
[radeon_llvm_reg_index_soa(idx
+ i
, chan
)] =
4821 si_build_alloca_undef(ctx
, ctx
->f32
, "");
4824 ctx
->output_mask
|= mask_attribs
;
4828 setup_locals(struct nir_to_llvm_context
*ctx
,
4829 struct nir_function
*func
)
4832 ctx
->num_locals
= 0;
4833 nir_foreach_variable(variable
, &func
->impl
->locals
) {
4834 unsigned attrib_count
= glsl_count_attribute_slots(variable
->type
, false);
4835 variable
->data
.driver_location
= ctx
->num_locals
* 4;
4836 ctx
->num_locals
+= attrib_count
;
4838 ctx
->locals
= malloc(4 * ctx
->num_locals
* sizeof(LLVMValueRef
));
4842 for (i
= 0; i
< ctx
->num_locals
; i
++) {
4843 for (j
= 0; j
< 4; j
++) {
4844 ctx
->locals
[i
* 4 + j
] =
4845 si_build_alloca_undef(ctx
, ctx
->f32
, "temp");
4851 emit_float_saturate(struct nir_to_llvm_context
*ctx
, LLVMValueRef v
, float lo
, float hi
)
4853 v
= to_float(ctx
, v
);
4854 v
= emit_intrin_2f_param(ctx
, "llvm.maxnum.f32", ctx
->f32
, v
, LLVMConstReal(ctx
->f32
, lo
));
4855 return emit_intrin_2f_param(ctx
, "llvm.minnum.f32", ctx
->f32
, v
, LLVMConstReal(ctx
->f32
, hi
));
4859 static LLVMValueRef
emit_pack_int16(struct nir_to_llvm_context
*ctx
,
4860 LLVMValueRef src0
, LLVMValueRef src1
)
4862 LLVMValueRef const16
= LLVMConstInt(ctx
->i32
, 16, false);
4863 LLVMValueRef comp
[2];
4865 comp
[0] = LLVMBuildAnd(ctx
->builder
, src0
, LLVMConstInt(ctx
-> i32
, 65535, 0), "");
4866 comp
[1] = LLVMBuildAnd(ctx
->builder
, src1
, LLVMConstInt(ctx
-> i32
, 65535, 0), "");
4867 comp
[1] = LLVMBuildShl(ctx
->builder
, comp
[1], const16
, "");
4868 return LLVMBuildOr(ctx
->builder
, comp
[0], comp
[1], "");
4871 /* Initialize arguments for the shader export intrinsic */
4873 si_llvm_init_export_args(struct nir_to_llvm_context
*ctx
,
4874 LLVMValueRef
*values
,
4876 struct ac_export_args
*args
)
4878 /* Default is 0xf. Adjusted below depending on the format. */
4879 args
->enabled_channels
= 0xf;
4881 /* Specify whether the EXEC mask represents the valid mask */
4882 args
->valid_mask
= 0;
4884 /* Specify whether this is the last export */
4887 /* Specify the target we are exporting */
4888 args
->target
= target
;
4890 args
->compr
= false;
4891 args
->out
[0] = LLVMGetUndef(ctx
->f32
);
4892 args
->out
[1] = LLVMGetUndef(ctx
->f32
);
4893 args
->out
[2] = LLVMGetUndef(ctx
->f32
);
4894 args
->out
[3] = LLVMGetUndef(ctx
->f32
);
4899 if (ctx
->stage
== MESA_SHADER_FRAGMENT
&& target
>= V_008DFC_SQ_EXP_MRT
) {
4900 LLVMValueRef val
[4];
4901 unsigned index
= target
- V_008DFC_SQ_EXP_MRT
;
4902 unsigned col_format
= (ctx
->options
->key
.fs
.col_format
>> (4 * index
)) & 0xf;
4903 bool is_int8
= (ctx
->options
->key
.fs
.is_int8
>> index
) & 1;
4905 switch(col_format
) {
4906 case V_028714_SPI_SHADER_ZERO
:
4907 args
->enabled_channels
= 0; /* writemask */
4908 args
->target
= V_008DFC_SQ_EXP_NULL
;
4911 case V_028714_SPI_SHADER_32_R
:
4912 args
->enabled_channels
= 1;
4913 args
->out
[0] = values
[0];
4916 case V_028714_SPI_SHADER_32_GR
:
4917 args
->enabled_channels
= 0x3;
4918 args
->out
[0] = values
[0];
4919 args
->out
[1] = values
[1];
4922 case V_028714_SPI_SHADER_32_AR
:
4923 args
->enabled_channels
= 0x9;
4924 args
->out
[0] = values
[0];
4925 args
->out
[3] = values
[3];
4928 case V_028714_SPI_SHADER_FP16_ABGR
:
4931 for (unsigned chan
= 0; chan
< 2; chan
++) {
4932 LLVMValueRef pack_args
[2] = {
4934 values
[2 * chan
+ 1]
4936 LLVMValueRef packed
;
4938 packed
= ac_build_cvt_pkrtz_f16(&ctx
->ac
, pack_args
);
4939 args
->out
[chan
] = packed
;
4943 case V_028714_SPI_SHADER_UNORM16_ABGR
:
4944 for (unsigned chan
= 0; chan
< 4; chan
++) {
4945 val
[chan
] = ac_build_clamp(&ctx
->ac
, values
[chan
]);
4946 val
[chan
] = LLVMBuildFMul(ctx
->builder
, val
[chan
],
4947 LLVMConstReal(ctx
->f32
, 65535), "");
4948 val
[chan
] = LLVMBuildFAdd(ctx
->builder
, val
[chan
],
4949 LLVMConstReal(ctx
->f32
, 0.5), "");
4950 val
[chan
] = LLVMBuildFPToUI(ctx
->builder
, val
[chan
],
4955 args
->out
[0] = emit_pack_int16(ctx
, val
[0], val
[1]);
4956 args
->out
[1] = emit_pack_int16(ctx
, val
[2], val
[3]);
4959 case V_028714_SPI_SHADER_SNORM16_ABGR
:
4960 for (unsigned chan
= 0; chan
< 4; chan
++) {
4961 val
[chan
] = emit_float_saturate(ctx
, values
[chan
], -1, 1);
4962 val
[chan
] = LLVMBuildFMul(ctx
->builder
, val
[chan
],
4963 LLVMConstReal(ctx
->f32
, 32767), "");
4965 /* If positive, add 0.5, else add -0.5. */
4966 val
[chan
] = LLVMBuildFAdd(ctx
->builder
, val
[chan
],
4967 LLVMBuildSelect(ctx
->builder
,
4968 LLVMBuildFCmp(ctx
->builder
, LLVMRealOGE
,
4969 val
[chan
], ctx
->f32zero
, ""),
4970 LLVMConstReal(ctx
->f32
, 0.5),
4971 LLVMConstReal(ctx
->f32
, -0.5), ""), "");
4972 val
[chan
] = LLVMBuildFPToSI(ctx
->builder
, val
[chan
], ctx
->i32
, "");
4976 args
->out
[0] = emit_pack_int16(ctx
, val
[0], val
[1]);
4977 args
->out
[1] = emit_pack_int16(ctx
, val
[2], val
[3]);
4980 case V_028714_SPI_SHADER_UINT16_ABGR
: {
4981 LLVMValueRef max
= LLVMConstInt(ctx
->i32
, is_int8
? 255 : 65535, 0);
4983 for (unsigned chan
= 0; chan
< 4; chan
++) {
4984 val
[chan
] = to_integer(ctx
, values
[chan
]);
4985 val
[chan
] = emit_minmax_int(ctx
, LLVMIntULT
, val
[chan
], max
);
4989 args
->out
[0] = emit_pack_int16(ctx
, val
[0], val
[1]);
4990 args
->out
[1] = emit_pack_int16(ctx
, val
[2], val
[3]);
4994 case V_028714_SPI_SHADER_SINT16_ABGR
: {
4995 LLVMValueRef max
= LLVMConstInt(ctx
->i32
, is_int8
? 127 : 32767, 0);
4996 LLVMValueRef min
= LLVMConstInt(ctx
->i32
, is_int8
? -128 : -32768, 0);
4999 for (unsigned chan
= 0; chan
< 4; chan
++) {
5000 val
[chan
] = to_integer(ctx
, values
[chan
]);
5001 val
[chan
] = emit_minmax_int(ctx
, LLVMIntSLT
, val
[chan
], max
);
5002 val
[chan
] = emit_minmax_int(ctx
, LLVMIntSGT
, val
[chan
], min
);
5006 args
->out
[0] = emit_pack_int16(ctx
, val
[0], val
[1]);
5007 args
->out
[1] = emit_pack_int16(ctx
, val
[2], val
[3]);
5012 case V_028714_SPI_SHADER_32_ABGR
:
5013 memcpy(&args
->out
[0], values
, sizeof(values
[0]) * 4);
5017 memcpy(&args
->out
[0], values
, sizeof(values
[0]) * 4);
5019 for (unsigned i
= 0; i
< 4; ++i
)
5020 args
->out
[i
] = to_float(ctx
, args
->out
[i
]);
5024 handle_vs_outputs_post(struct nir_to_llvm_context
*ctx
,
5025 struct ac_vs_output_info
*outinfo
)
5027 uint32_t param_count
= 0;
5029 unsigned pos_idx
, num_pos_exports
= 0;
5030 struct ac_export_args args
, pos_args
[4] = {};
5031 LLVMValueRef psize_value
= NULL
, layer_value
= NULL
, viewport_index_value
= NULL
;
5034 outinfo
->prim_id_output
= 0xffffffff;
5035 outinfo
->layer_output
= 0xffffffff;
5036 if (ctx
->output_mask
& (1ull << VARYING_SLOT_CLIP_DIST0
)) {
5037 LLVMValueRef slots
[8];
5040 if (outinfo
->cull_dist_mask
)
5041 outinfo
->cull_dist_mask
<<= ctx
->num_output_clips
;
5043 i
= VARYING_SLOT_CLIP_DIST0
;
5044 for (j
= 0; j
< ctx
->num_output_clips
+ ctx
->num_output_culls
; j
++)
5045 slots
[j
] = to_float(ctx
, LLVMBuildLoad(ctx
->builder
,
5046 ctx
->outputs
[radeon_llvm_reg_index_soa(i
, j
)], ""));
5048 for (i
= ctx
->num_output_clips
+ ctx
->num_output_culls
; i
< 8; i
++)
5049 slots
[i
] = LLVMGetUndef(ctx
->f32
);
5051 if (ctx
->num_output_clips
+ ctx
->num_output_culls
> 4) {
5052 target
= V_008DFC_SQ_EXP_POS
+ 3;
5053 si_llvm_init_export_args(ctx
, &slots
[4], target
, &args
);
5054 memcpy(&pos_args
[target
- V_008DFC_SQ_EXP_POS
],
5055 &args
, sizeof(args
));
5058 target
= V_008DFC_SQ_EXP_POS
+ 2;
5059 si_llvm_init_export_args(ctx
, &slots
[0], target
, &args
);
5060 memcpy(&pos_args
[target
- V_008DFC_SQ_EXP_POS
],
5061 &args
, sizeof(args
));
5065 for (unsigned i
= 0; i
< RADEON_LLVM_MAX_OUTPUTS
; ++i
) {
5066 LLVMValueRef values
[4];
5067 if (!(ctx
->output_mask
& (1ull << i
)))
5070 for (unsigned j
= 0; j
< 4; j
++)
5071 values
[j
] = to_float(ctx
, LLVMBuildLoad(ctx
->builder
,
5072 ctx
->outputs
[radeon_llvm_reg_index_soa(i
, j
)], ""));
5074 if (i
== VARYING_SLOT_POS
) {
5075 target
= V_008DFC_SQ_EXP_POS
;
5076 } else if (i
== VARYING_SLOT_CLIP_DIST0
) {
5078 } else if (i
== VARYING_SLOT_PSIZ
) {
5079 outinfo
->writes_pointsize
= true;
5080 psize_value
= values
[0];
5082 } else if (i
== VARYING_SLOT_LAYER
) {
5083 outinfo
->writes_layer
= true;
5084 layer_value
= values
[0];
5085 outinfo
->layer_output
= param_count
;
5086 target
= V_008DFC_SQ_EXP_PARAM
+ param_count
;
5088 } else if (i
== VARYING_SLOT_VIEWPORT
) {
5089 outinfo
->writes_viewport_index
= true;
5090 viewport_index_value
= values
[0];
5092 } else if (i
== VARYING_SLOT_PRIMITIVE_ID
) {
5093 outinfo
->prim_id_output
= param_count
;
5094 target
= V_008DFC_SQ_EXP_PARAM
+ param_count
;
5096 } else if (i
>= VARYING_SLOT_VAR0
) {
5097 outinfo
->export_mask
|= 1u << (i
- VARYING_SLOT_VAR0
);
5098 target
= V_008DFC_SQ_EXP_PARAM
+ param_count
;
5102 si_llvm_init_export_args(ctx
, values
, target
, &args
);
5104 if (target
>= V_008DFC_SQ_EXP_POS
&&
5105 target
<= (V_008DFC_SQ_EXP_POS
+ 3)) {
5106 memcpy(&pos_args
[target
- V_008DFC_SQ_EXP_POS
],
5107 &args
, sizeof(args
));
5109 ac_build_export(&ctx
->ac
, &args
);
5113 /* We need to add the position output manually if it's missing. */
5114 if (!pos_args
[0].out
[0]) {
5115 pos_args
[0].enabled_channels
= 0xf;
5116 pos_args
[0].valid_mask
= 0;
5117 pos_args
[0].done
= 0;
5118 pos_args
[0].target
= V_008DFC_SQ_EXP_POS
;
5119 pos_args
[0].compr
= 0;
5120 pos_args
[0].out
[0] = ctx
->f32zero
; /* X */
5121 pos_args
[0].out
[1] = ctx
->f32zero
; /* Y */
5122 pos_args
[0].out
[2] = ctx
->f32zero
; /* Z */
5123 pos_args
[0].out
[3] = ctx
->f32one
; /* W */
5126 uint32_t mask
= ((outinfo
->writes_pointsize
== true ? 1 : 0) |
5127 (outinfo
->writes_layer
== true ? 4 : 0) |
5128 (outinfo
->writes_viewport_index
== true ? 8 : 0));
5130 pos_args
[1].enabled_channels
= mask
;
5131 pos_args
[1].valid_mask
= 0;
5132 pos_args
[1].done
= 0;
5133 pos_args
[1].target
= V_008DFC_SQ_EXP_POS
+ 1;
5134 pos_args
[1].compr
= 0;
5135 pos_args
[1].out
[0] = ctx
->f32zero
; /* X */
5136 pos_args
[1].out
[1] = ctx
->f32zero
; /* Y */
5137 pos_args
[1].out
[2] = ctx
->f32zero
; /* Z */
5138 pos_args
[1].out
[3] = ctx
->f32zero
; /* W */
5140 if (outinfo
->writes_pointsize
== true)
5141 pos_args
[1].out
[0] = psize_value
;
5142 if (outinfo
->writes_layer
== true)
5143 pos_args
[1].out
[2] = layer_value
;
5144 if (outinfo
->writes_viewport_index
== true)
5145 pos_args
[1].out
[3] = viewport_index_value
;
5147 for (i
= 0; i
< 4; i
++) {
5148 if (pos_args
[i
].out
[0])
5153 for (i
= 0; i
< 4; i
++) {
5154 if (!pos_args
[i
].out
[0])
5157 /* Specify the target we are exporting */
5158 pos_args
[i
].target
= V_008DFC_SQ_EXP_POS
+ pos_idx
++;
5159 if (pos_idx
== num_pos_exports
)
5160 pos_args
[i
].done
= 1;
5161 ac_build_export(&ctx
->ac
, &pos_args
[i
]);
5164 outinfo
->pos_exports
= num_pos_exports
;
5165 outinfo
->param_exports
= param_count
;
5169 handle_es_outputs_post(struct nir_to_llvm_context
*ctx
,
5170 struct ac_es_output_info
*outinfo
)
5173 uint64_t max_output_written
= 0;
5174 for (unsigned i
= 0; i
< RADEON_LLVM_MAX_OUTPUTS
; ++i
) {
5175 LLVMValueRef
*out_ptr
= &ctx
->outputs
[i
* 4];
5179 if (!(ctx
->output_mask
& (1ull << i
)))
5182 if (i
== VARYING_SLOT_CLIP_DIST0
)
5183 length
= ctx
->num_output_clips
+ ctx
->num_output_culls
;
5185 param_index
= shader_io_get_unique_index(i
);
5187 max_output_written
= MAX2(param_index
+ (length
> 4), max_output_written
);
5189 for (j
= 0; j
< length
; j
++) {
5190 LLVMValueRef out_val
= LLVMBuildLoad(ctx
->builder
, out_ptr
[j
], "");
5191 out_val
= LLVMBuildBitCast(ctx
->builder
, out_val
, ctx
->i32
, "");
5193 ac_build_buffer_store_dword(&ctx
->ac
,
5196 NULL
, ctx
->es2gs_offset
,
5197 (4 * param_index
+ j
) * 4,
5201 outinfo
->esgs_itemsize
= (max_output_written
+ 1) * 16;
5205 handle_ls_outputs_post(struct nir_to_llvm_context
*ctx
)
5207 LLVMValueRef vertex_id
= ctx
->rel_auto_id
;
5208 LLVMValueRef vertex_dw_stride
= unpack_param(ctx
, ctx
->ls_out_layout
, 13, 8);
5209 LLVMValueRef base_dw_addr
= LLVMBuildMul(ctx
->builder
, vertex_id
,
5210 vertex_dw_stride
, "");
5212 for (unsigned i
= 0; i
< RADEON_LLVM_MAX_OUTPUTS
; ++i
) {
5213 LLVMValueRef
*out_ptr
= &ctx
->outputs
[i
* 4];
5216 if (!(ctx
->output_mask
& (1ull << i
)))
5219 if (i
== VARYING_SLOT_CLIP_DIST0
)
5220 length
= ctx
->num_output_clips
+ ctx
->num_output_culls
;
5221 int param
= shader_io_get_unique_index(i
);
5222 mark_tess_output(ctx
, false, param
);
5224 mark_tess_output(ctx
, false, param
+ 1);
5225 LLVMValueRef dw_addr
= LLVMBuildAdd(ctx
->builder
, base_dw_addr
,
5226 LLVMConstInt(ctx
->i32
, param
* 4, false),
5228 for (unsigned j
= 0; j
< length
; j
++) {
5229 lds_store(ctx
, dw_addr
,
5230 LLVMBuildLoad(ctx
->builder
, out_ptr
[j
], ""));
5231 dw_addr
= LLVMBuildAdd(ctx
->builder
, dw_addr
, ctx
->i32one
, "");
5236 struct ac_build_if_state
5238 struct nir_to_llvm_context
*ctx
;
5239 LLVMValueRef condition
;
5240 LLVMBasicBlockRef entry_block
;
5241 LLVMBasicBlockRef true_block
;
5242 LLVMBasicBlockRef false_block
;
5243 LLVMBasicBlockRef merge_block
;
5246 static LLVMBasicBlockRef
5247 ac_build_insert_new_block(struct nir_to_llvm_context
*ctx
, const char *name
)
5249 LLVMBasicBlockRef current_block
;
5250 LLVMBasicBlockRef next_block
;
5251 LLVMBasicBlockRef new_block
;
5253 /* get current basic block */
5254 current_block
= LLVMGetInsertBlock(ctx
->builder
);
5256 /* chqeck if there's another block after this one */
5257 next_block
= LLVMGetNextBasicBlock(current_block
);
5259 /* insert the new block before the next block */
5260 new_block
= LLVMInsertBasicBlockInContext(ctx
->context
, next_block
, name
);
5263 /* append new block after current block */
5264 LLVMValueRef function
= LLVMGetBasicBlockParent(current_block
);
5265 new_block
= LLVMAppendBasicBlockInContext(ctx
->context
, function
, name
);
5271 ac_nir_build_if(struct ac_build_if_state
*ifthen
,
5272 struct nir_to_llvm_context
*ctx
,
5273 LLVMValueRef condition
)
5275 LLVMBasicBlockRef block
= LLVMGetInsertBlock(ctx
->builder
);
5277 memset(ifthen
, 0, sizeof *ifthen
);
5279 ifthen
->condition
= condition
;
5280 ifthen
->entry_block
= block
;
5282 /* create endif/merge basic block for the phi functions */
5283 ifthen
->merge_block
= ac_build_insert_new_block(ctx
, "endif-block");
5285 /* create/insert true_block before merge_block */
5286 ifthen
->true_block
=
5287 LLVMInsertBasicBlockInContext(ctx
->context
,
5288 ifthen
->merge_block
,
5291 /* successive code goes into the true block */
5292 LLVMPositionBuilderAtEnd(ctx
->builder
, ifthen
->true_block
);
5296 * End a conditional.
5299 ac_nir_build_endif(struct ac_build_if_state
*ifthen
)
5301 LLVMBuilderRef builder
= ifthen
->ctx
->builder
;
5303 /* Insert branch to the merge block from current block */
5304 LLVMBuildBr(builder
, ifthen
->merge_block
);
5307 * Now patch in the various branch instructions.
5310 /* Insert the conditional branch instruction at the end of entry_block */
5311 LLVMPositionBuilderAtEnd(builder
, ifthen
->entry_block
);
5312 if (ifthen
->false_block
) {
5313 /* we have an else clause */
5314 LLVMBuildCondBr(builder
, ifthen
->condition
,
5315 ifthen
->true_block
, ifthen
->false_block
);
5318 /* no else clause */
5319 LLVMBuildCondBr(builder
, ifthen
->condition
,
5320 ifthen
->true_block
, ifthen
->merge_block
);
5323 /* Resume building code at end of the ifthen->merge_block */
5324 LLVMPositionBuilderAtEnd(builder
, ifthen
->merge_block
);
5328 write_tess_factors(struct nir_to_llvm_context
*ctx
)
5330 unsigned stride
, outer_comps
, inner_comps
;
5331 struct ac_build_if_state if_ctx
, inner_if_ctx
;
5332 LLVMValueRef invocation_id
= unpack_param(ctx
, ctx
->tcs_rel_ids
, 8, 5);
5333 LLVMValueRef rel_patch_id
= unpack_param(ctx
, ctx
->tcs_rel_ids
, 0, 8);
5334 unsigned tess_inner_index
, tess_outer_index
;
5335 LLVMValueRef lds_base
, lds_inner
, lds_outer
, byteoffset
, buffer
;
5336 LLVMValueRef out
[6], vec0
, vec1
, tf_base
, inner
[4], outer
[4];
5340 switch (ctx
->options
->key
.tcs
.primitive_mode
) {
5360 ac_nir_build_if(&if_ctx
, ctx
,
5361 LLVMBuildICmp(ctx
->builder
, LLVMIntEQ
,
5362 invocation_id
, ctx
->i32zero
, ""));
5364 tess_inner_index
= shader_io_get_unique_index(VARYING_SLOT_TESS_LEVEL_INNER
);
5365 tess_outer_index
= shader_io_get_unique_index(VARYING_SLOT_TESS_LEVEL_OUTER
);
5367 mark_tess_output(ctx
, true, tess_inner_index
);
5368 mark_tess_output(ctx
, true, tess_outer_index
);
5369 lds_base
= get_tcs_out_current_patch_data_offset(ctx
);
5370 lds_inner
= LLVMBuildAdd(ctx
->builder
, lds_base
,
5371 LLVMConstInt(ctx
->i32
, tess_inner_index
* 4, false), "");
5372 lds_outer
= LLVMBuildAdd(ctx
->builder
, lds_base
,
5373 LLVMConstInt(ctx
->i32
, tess_outer_index
* 4, false), "");
5375 for (i
= 0; i
< 4; i
++) {
5376 inner
[i
] = LLVMGetUndef(ctx
->i32
);
5377 outer
[i
] = LLVMGetUndef(ctx
->i32
);
5381 if (ctx
->options
->key
.tcs
.primitive_mode
== GL_ISOLINES
) {
5382 outer
[0] = out
[1] = lds_load(ctx
, lds_outer
);
5383 lds_outer
= LLVMBuildAdd(ctx
->builder
, lds_outer
,
5384 LLVMConstInt(ctx
->i32
, 1, false), "");
5385 outer
[1] = out
[0] = lds_load(ctx
, lds_outer
);
5387 for (i
= 0; i
< outer_comps
; i
++) {
5389 lds_load(ctx
, lds_outer
);
5390 lds_outer
= LLVMBuildAdd(ctx
->builder
, lds_outer
,
5391 LLVMConstInt(ctx
->i32
, 1, false), "");
5393 for (i
= 0; i
< inner_comps
; i
++) {
5394 inner
[i
] = out
[outer_comps
+i
] =
5395 lds_load(ctx
, lds_inner
);
5396 lds_inner
= LLVMBuildAdd(ctx
->builder
, lds_inner
,
5397 LLVMConstInt(ctx
->i32
, 1, false), "");
5401 /* Convert the outputs to vectors for stores. */
5402 vec0
= ac_build_gather_values(&ctx
->ac
, out
, MIN2(stride
, 4));
5406 vec1
= ac_build_gather_values(&ctx
->ac
, out
+ 4, stride
- 4);
5409 buffer
= ctx
->hs_ring_tess_factor
;
5410 tf_base
= ctx
->tess_factor_offset
;
5411 byteoffset
= LLVMBuildMul(ctx
->builder
, rel_patch_id
,
5412 LLVMConstInt(ctx
->i32
, 4 * stride
, false), "");
5414 ac_nir_build_if(&inner_if_ctx
, ctx
,
5415 LLVMBuildICmp(ctx
->builder
, LLVMIntEQ
,
5416 rel_patch_id
, ctx
->i32zero
, ""));
5418 /* Store the dynamic HS control word. */
5419 ac_build_buffer_store_dword(&ctx
->ac
, buffer
,
5420 LLVMConstInt(ctx
->i32
, 0x80000000, false),
5421 1, ctx
->i32zero
, tf_base
,
5422 0, 1, 0, true, false);
5423 ac_nir_build_endif(&inner_if_ctx
);
5425 /* Store the tessellation factors. */
5426 ac_build_buffer_store_dword(&ctx
->ac
, buffer
, vec0
,
5427 MIN2(stride
, 4), byteoffset
, tf_base
,
5428 4, 1, 0, true, false);
5430 ac_build_buffer_store_dword(&ctx
->ac
, buffer
, vec1
,
5431 stride
- 4, byteoffset
, tf_base
,
5432 20, 1, 0, true, false);
5434 //TODO store to offchip for TES to read - only if TES reads them
5436 LLVMValueRef inner_vec
, outer_vec
, tf_outer_offset
;
5437 LLVMValueRef tf_inner_offset
;
5438 unsigned param_outer
, param_inner
;
5440 param_outer
= shader_io_get_unique_index(VARYING_SLOT_TESS_LEVEL_OUTER
);
5441 tf_outer_offset
= get_tcs_tes_buffer_address(ctx
, NULL
,
5442 LLVMConstInt(ctx
->i32
, param_outer
, 0));
5444 outer_vec
= ac_build_gather_values(&ctx
->ac
, outer
,
5445 util_next_power_of_two(outer_comps
));
5447 ac_build_buffer_store_dword(&ctx
->ac
, ctx
->hs_ring_tess_offchip
, outer_vec
,
5448 outer_comps
, tf_outer_offset
,
5449 ctx
->oc_lds
, 0, 1, 0, true, false);
5451 param_inner
= shader_io_get_unique_index(VARYING_SLOT_TESS_LEVEL_INNER
);
5452 tf_inner_offset
= get_tcs_tes_buffer_address(ctx
, NULL
,
5453 LLVMConstInt(ctx
->i32
, param_inner
, 0));
5455 inner_vec
= inner_comps
== 1 ? inner
[0] :
5456 ac_build_gather_values(&ctx
->ac
, inner
, inner_comps
);
5457 ac_build_buffer_store_dword(&ctx
->ac
, ctx
->hs_ring_tess_offchip
, inner_vec
,
5458 inner_comps
, tf_inner_offset
,
5459 ctx
->oc_lds
, 0, 1, 0, true, false);
5462 ac_nir_build_endif(&if_ctx
);
5466 handle_tcs_outputs_post(struct nir_to_llvm_context
*ctx
)
5468 write_tess_factors(ctx
);
5472 si_export_mrt_color(struct nir_to_llvm_context
*ctx
,
5473 LLVMValueRef
*color
, unsigned param
, bool is_last
)
5476 struct ac_export_args args
;
5479 si_llvm_init_export_args(ctx
, color
, param
,
5483 args
.valid_mask
= 1; /* whether the EXEC mask is valid */
5484 args
.done
= 1; /* DONE bit */
5485 } else if (!args
.enabled_channels
)
5486 return; /* unnecessary NULL export */
5488 ac_build_export(&ctx
->ac
, &args
);
5492 si_export_mrt_z(struct nir_to_llvm_context
*ctx
,
5493 LLVMValueRef depth
, LLVMValueRef stencil
,
5494 LLVMValueRef samplemask
)
5496 struct ac_export_args args
;
5498 args
.enabled_channels
= 0;
5499 args
.valid_mask
= 1;
5501 args
.target
= V_008DFC_SQ_EXP_MRTZ
;
5504 args
.out
[0] = LLVMGetUndef(ctx
->f32
); /* R, depth */
5505 args
.out
[1] = LLVMGetUndef(ctx
->f32
); /* G, stencil test val[0:7], stencil op val[8:15] */
5506 args
.out
[2] = LLVMGetUndef(ctx
->f32
); /* B, sample mask */
5507 args
.out
[3] = LLVMGetUndef(ctx
->f32
); /* A, alpha to mask */
5510 args
.out
[0] = depth
;
5511 args
.enabled_channels
|= 0x1;
5515 args
.out
[1] = stencil
;
5516 args
.enabled_channels
|= 0x2;
5520 args
.out
[2] = samplemask
;
5521 args
.enabled_channels
|= 0x4;
5524 /* SI (except OLAND) has a bug that it only looks
5525 * at the X writemask component. */
5526 if (ctx
->options
->chip_class
== SI
&&
5527 ctx
->options
->family
!= CHIP_OLAND
)
5528 args
.enabled_channels
|= 0x1;
5530 ac_build_export(&ctx
->ac
, &args
);
5534 handle_fs_outputs_post(struct nir_to_llvm_context
*ctx
)
5537 LLVMValueRef depth
= NULL
, stencil
= NULL
, samplemask
= NULL
;
5539 for (unsigned i
= 0; i
< RADEON_LLVM_MAX_OUTPUTS
; ++i
) {
5540 LLVMValueRef values
[4];
5542 if (!(ctx
->output_mask
& (1ull << i
)))
5545 if (i
== FRAG_RESULT_DEPTH
) {
5546 ctx
->shader_info
->fs
.writes_z
= true;
5547 depth
= to_float(ctx
, LLVMBuildLoad(ctx
->builder
,
5548 ctx
->outputs
[radeon_llvm_reg_index_soa(i
, 0)], ""));
5549 } else if (i
== FRAG_RESULT_STENCIL
) {
5550 ctx
->shader_info
->fs
.writes_stencil
= true;
5551 stencil
= to_float(ctx
, LLVMBuildLoad(ctx
->builder
,
5552 ctx
->outputs
[radeon_llvm_reg_index_soa(i
, 0)], ""));
5553 } else if (i
== FRAG_RESULT_SAMPLE_MASK
) {
5554 ctx
->shader_info
->fs
.writes_sample_mask
= true;
5555 samplemask
= to_float(ctx
, LLVMBuildLoad(ctx
->builder
,
5556 ctx
->outputs
[radeon_llvm_reg_index_soa(i
, 0)], ""));
5559 for (unsigned j
= 0; j
< 4; j
++)
5560 values
[j
] = to_float(ctx
, LLVMBuildLoad(ctx
->builder
,
5561 ctx
->outputs
[radeon_llvm_reg_index_soa(i
, j
)], ""));
5563 if (!ctx
->shader_info
->fs
.writes_z
&& !ctx
->shader_info
->fs
.writes_stencil
&& !ctx
->shader_info
->fs
.writes_sample_mask
)
5564 last
= ctx
->output_mask
<= ((1ull << (i
+ 1)) - 1);
5566 si_export_mrt_color(ctx
, values
, V_008DFC_SQ_EXP_MRT
+ index
, last
);
5571 if (depth
|| stencil
|| samplemask
)
5572 si_export_mrt_z(ctx
, depth
, stencil
, samplemask
);
5574 si_export_mrt_color(ctx
, NULL
, V_008DFC_SQ_EXP_NULL
, true);
5576 ctx
->shader_info
->fs
.output_mask
= index
? ((1ull << index
) - 1) : 0;
5580 emit_gs_epilogue(struct nir_to_llvm_context
*ctx
)
5582 ac_build_sendmsg(&ctx
->ac
, AC_SENDMSG_GS_OP_NOP
| AC_SENDMSG_GS_DONE
, ctx
->gs_wave_id
);
5586 handle_shader_outputs_post(struct nir_to_llvm_context
*ctx
)
5588 switch (ctx
->stage
) {
5589 case MESA_SHADER_VERTEX
:
5590 if (ctx
->options
->key
.vs
.as_ls
)
5591 handle_ls_outputs_post(ctx
);
5592 else if (ctx
->options
->key
.vs
.as_es
)
5593 handle_es_outputs_post(ctx
, &ctx
->shader_info
->vs
.es_info
);
5595 handle_vs_outputs_post(ctx
, &ctx
->shader_info
->vs
.outinfo
);
5597 case MESA_SHADER_FRAGMENT
:
5598 handle_fs_outputs_post(ctx
);
5600 case MESA_SHADER_GEOMETRY
:
5601 emit_gs_epilogue(ctx
);
5603 case MESA_SHADER_TESS_CTRL
:
5604 handle_tcs_outputs_post(ctx
);
5606 case MESA_SHADER_TESS_EVAL
:
5607 if (ctx
->options
->key
.tes
.as_es
)
5608 handle_es_outputs_post(ctx
, &ctx
->shader_info
->tes
.es_info
);
5610 handle_vs_outputs_post(ctx
, &ctx
->shader_info
->tes
.outinfo
);
5618 handle_shared_compute_var(struct nir_to_llvm_context
*ctx
,
5619 struct nir_variable
*variable
, uint32_t *offset
, int idx
)
5621 unsigned size
= glsl_count_attribute_slots(variable
->type
, false);
5622 variable
->data
.driver_location
= *offset
;
5626 static void ac_llvm_finalize_module(struct nir_to_llvm_context
* ctx
)
5628 LLVMPassManagerRef passmgr
;
5629 /* Create the pass manager */
5630 passmgr
= LLVMCreateFunctionPassManagerForModule(
5633 /* This pass should eliminate all the load and store instructions */
5634 LLVMAddPromoteMemoryToRegisterPass(passmgr
);
5636 /* Add some optimization passes */
5637 LLVMAddScalarReplAggregatesPass(passmgr
);
5638 LLVMAddLICMPass(passmgr
);
5639 LLVMAddAggressiveDCEPass(passmgr
);
5640 LLVMAddCFGSimplificationPass(passmgr
);
5641 LLVMAddInstructionCombiningPass(passmgr
);
5644 LLVMInitializeFunctionPassManager(passmgr
);
5645 LLVMRunFunctionPassManager(passmgr
, ctx
->main_function
);
5646 LLVMFinalizeFunctionPassManager(passmgr
);
5648 LLVMDisposeBuilder(ctx
->builder
);
5649 LLVMDisposePassManager(passmgr
);
5653 ac_setup_rings(struct nir_to_llvm_context
*ctx
)
5655 if ((ctx
->stage
== MESA_SHADER_VERTEX
&& ctx
->options
->key
.vs
.as_es
) ||
5656 (ctx
->stage
== MESA_SHADER_TESS_EVAL
&& ctx
->options
->key
.tes
.as_es
)) {
5657 ctx
->esgs_ring
= ac_build_indexed_load_const(&ctx
->ac
, ctx
->ring_offsets
, LLVMConstInt(ctx
->i32
, RING_ESGS_VS
, false));
5660 if (ctx
->is_gs_copy_shader
) {
5661 ctx
->gsvs_ring
= ac_build_indexed_load_const(&ctx
->ac
, ctx
->ring_offsets
, LLVMConstInt(ctx
->i32
, RING_GSVS_VS
, false));
5663 if (ctx
->stage
== MESA_SHADER_GEOMETRY
) {
5665 ctx
->esgs_ring
= ac_build_indexed_load_const(&ctx
->ac
, ctx
->ring_offsets
, LLVMConstInt(ctx
->i32
, RING_ESGS_GS
, false));
5666 ctx
->gsvs_ring
= ac_build_indexed_load_const(&ctx
->ac
, ctx
->ring_offsets
, LLVMConstInt(ctx
->i32
, RING_GSVS_GS
, false));
5668 ctx
->gsvs_ring
= LLVMBuildBitCast(ctx
->builder
, ctx
->gsvs_ring
, ctx
->v4i32
, "");
5670 ctx
->gsvs_ring
= LLVMBuildInsertElement(ctx
->builder
, ctx
->gsvs_ring
, ctx
->gsvs_num_entries
, LLVMConstInt(ctx
->i32
, 2, false), "");
5671 tmp
= LLVMBuildExtractElement(ctx
->builder
, ctx
->gsvs_ring
, ctx
->i32one
, "");
5672 tmp
= LLVMBuildOr(ctx
->builder
, tmp
, ctx
->gsvs_ring_stride
, "");
5673 ctx
->gsvs_ring
= LLVMBuildInsertElement(ctx
->builder
, ctx
->gsvs_ring
, tmp
, ctx
->i32one
, "");
5675 ctx
->gsvs_ring
= LLVMBuildBitCast(ctx
->builder
, ctx
->gsvs_ring
, ctx
->v16i8
, "");
5678 if (ctx
->stage
== MESA_SHADER_TESS_CTRL
||
5679 ctx
->stage
== MESA_SHADER_TESS_EVAL
) {
5680 ctx
->hs_ring_tess_offchip
= ac_build_indexed_load_const(&ctx
->ac
, ctx
->ring_offsets
, LLVMConstInt(ctx
->i32
, RING_HS_TESS_OFFCHIP
, false));
5681 ctx
->hs_ring_tess_factor
= ac_build_indexed_load_const(&ctx
->ac
, ctx
->ring_offsets
, LLVMConstInt(ctx
->i32
, RING_HS_TESS_FACTOR
, false));
5686 LLVMModuleRef
ac_translate_nir_to_llvm(LLVMTargetMachineRef tm
,
5687 struct nir_shader
*nir
,
5688 struct ac_shader_variant_info
*shader_info
,
5689 const struct ac_nir_compiler_options
*options
)
5691 struct nir_to_llvm_context ctx
= {0};
5692 struct nir_function
*func
;
5694 ctx
.options
= options
;
5695 ctx
.shader_info
= shader_info
;
5696 ctx
.context
= LLVMContextCreate();
5697 ctx
.module
= LLVMModuleCreateWithNameInContext("shader", ctx
.context
);
5699 ac_llvm_context_init(&ctx
.ac
, ctx
.context
);
5700 ctx
.ac
.module
= ctx
.module
;
5702 ctx
.has_ds_bpermute
= ctx
.options
->chip_class
>= VI
;
5704 memset(shader_info
, 0, sizeof(*shader_info
));
5706 LLVMSetTarget(ctx
.module
, options
->supports_spill
? "amdgcn-mesa-mesa3d" : "amdgcn--");
5708 LLVMTargetDataRef data_layout
= LLVMCreateTargetDataLayout(tm
);
5709 char *data_layout_str
= LLVMCopyStringRepOfTargetData(data_layout
);
5710 LLVMSetDataLayout(ctx
.module
, data_layout_str
);
5711 LLVMDisposeTargetData(data_layout
);
5712 LLVMDisposeMessage(data_layout_str
);
5716 ctx
.builder
= LLVMCreateBuilderInContext(ctx
.context
);
5717 ctx
.ac
.builder
= ctx
.builder
;
5718 ctx
.stage
= nir
->stage
;
5720 for (i
= 0; i
< AC_UD_MAX_SETS
; i
++)
5721 shader_info
->user_sgprs_locs
.descriptor_sets
[i
].sgpr_idx
= -1;
5722 for (i
= 0; i
< AC_UD_MAX_UD
; i
++)
5723 shader_info
->user_sgprs_locs
.shader_data
[i
].sgpr_idx
= -1;
5725 create_function(&ctx
);
5727 if (nir
->stage
== MESA_SHADER_COMPUTE
) {
5729 nir_foreach_variable(variable
, &nir
->shared
)
5733 uint32_t shared_size
= 0;
5735 LLVMTypeRef i8p
= LLVMPointerType(ctx
.i8
, LOCAL_ADDR_SPACE
);
5736 nir_foreach_variable(variable
, &nir
->shared
) {
5737 handle_shared_compute_var(&ctx
, variable
, &shared_size
, idx
);
5742 var
= LLVMAddGlobalInAddressSpace(ctx
.module
,
5743 LLVMArrayType(ctx
.i8
, shared_size
),
5746 LLVMSetAlignment(var
, 4);
5747 ctx
.shared_memory
= LLVMBuildBitCast(ctx
.builder
, var
, i8p
, "");
5749 } else if (nir
->stage
== MESA_SHADER_GEOMETRY
) {
5750 ctx
.gs_next_vertex
= ac_build_alloca(&ctx
, ctx
.i32
, "gs_next_vertex");
5752 ctx
.gs_max_out_vertices
= nir
->info
->gs
.vertices_out
;
5753 } else if (nir
->stage
== MESA_SHADER_TESS_EVAL
) {
5754 ctx
.tes_primitive_mode
= nir
->info
->tess
.primitive_mode
;
5757 ac_setup_rings(&ctx
);
5759 nir_foreach_variable(variable
, &nir
->inputs
)
5760 handle_shader_input_decl(&ctx
, variable
);
5762 if (nir
->stage
== MESA_SHADER_FRAGMENT
)
5763 handle_fs_inputs_pre(&ctx
, nir
);
5765 ctx
.num_output_clips
= nir
->info
->clip_distance_array_size
;
5766 ctx
.num_output_culls
= nir
->info
->cull_distance_array_size
;
5768 nir_foreach_variable(variable
, &nir
->outputs
)
5769 handle_shader_output_decl(&ctx
, variable
);
5771 ctx
.defs
= _mesa_hash_table_create(NULL
, _mesa_hash_pointer
,
5772 _mesa_key_pointer_equal
);
5773 ctx
.phis
= _mesa_hash_table_create(NULL
, _mesa_hash_pointer
,
5774 _mesa_key_pointer_equal
);
5776 func
= (struct nir_function
*)exec_list_get_head(&nir
->functions
);
5778 setup_locals(&ctx
, func
);
5780 visit_cf_list(&ctx
, &func
->impl
->body
);
5781 phi_post_pass(&ctx
);
5783 handle_shader_outputs_post(&ctx
);
5784 LLVMBuildRetVoid(ctx
.builder
);
5786 ac_llvm_finalize_module(&ctx
);
5788 ralloc_free(ctx
.defs
);
5789 ralloc_free(ctx
.phis
);
5791 if (nir
->stage
== MESA_SHADER_GEOMETRY
) {
5792 unsigned addclip
= ctx
.num_output_clips
+ ctx
.num_output_culls
> 4;
5793 shader_info
->gs
.gsvs_vertex_size
= (util_bitcount64(ctx
.output_mask
) + addclip
) * 16;
5794 shader_info
->gs
.max_gsvs_emit_size
= shader_info
->gs
.gsvs_vertex_size
*
5795 nir
->info
->gs
.vertices_out
;
5796 } else if (nir
->stage
== MESA_SHADER_TESS_CTRL
) {
5797 shader_info
->tcs
.outputs_written
= ctx
.tess_outputs_written
;
5798 shader_info
->tcs
.patch_outputs_written
= ctx
.tess_patch_outputs_written
;
5799 } else if (nir
->stage
== MESA_SHADER_VERTEX
&& ctx
.options
->key
.vs
.as_ls
) {
5800 shader_info
->vs
.outputs_written
= ctx
.tess_outputs_written
;
5806 static void ac_diagnostic_handler(LLVMDiagnosticInfoRef di
, void *context
)
5808 unsigned *retval
= (unsigned *)context
;
5809 LLVMDiagnosticSeverity severity
= LLVMGetDiagInfoSeverity(di
);
5810 char *description
= LLVMGetDiagInfoDescription(di
);
5812 if (severity
== LLVMDSError
) {
5814 fprintf(stderr
, "LLVM triggered Diagnostic Handler: %s\n",
5818 LLVMDisposeMessage(description
);
5821 static unsigned ac_llvm_compile(LLVMModuleRef M
,
5822 struct ac_shader_binary
*binary
,
5823 LLVMTargetMachineRef tm
)
5825 unsigned retval
= 0;
5827 LLVMContextRef llvm_ctx
;
5828 LLVMMemoryBufferRef out_buffer
;
5829 unsigned buffer_size
;
5830 const char *buffer_data
;
5833 /* Setup Diagnostic Handler*/
5834 llvm_ctx
= LLVMGetModuleContext(M
);
5836 LLVMContextSetDiagnosticHandler(llvm_ctx
, ac_diagnostic_handler
,
5840 mem_err
= LLVMTargetMachineEmitToMemoryBuffer(tm
, M
, LLVMObjectFile
,
5843 /* Process Errors/Warnings */
5845 fprintf(stderr
, "%s: %s", __FUNCTION__
, err
);
5851 /* Extract Shader Code*/
5852 buffer_size
= LLVMGetBufferSize(out_buffer
);
5853 buffer_data
= LLVMGetBufferStart(out_buffer
);
5855 ac_elf_read(buffer_data
, buffer_size
, binary
);
5858 LLVMDisposeMemoryBuffer(out_buffer
);
5864 static void ac_compile_llvm_module(LLVMTargetMachineRef tm
,
5865 LLVMModuleRef llvm_module
,
5866 struct ac_shader_binary
*binary
,
5867 struct ac_shader_config
*config
,
5868 struct ac_shader_variant_info
*shader_info
,
5869 gl_shader_stage stage
,
5870 bool dump_shader
, bool supports_spill
)
5873 ac_dump_module(llvm_module
);
5875 memset(binary
, 0, sizeof(*binary
));
5876 int v
= ac_llvm_compile(llvm_module
, binary
, tm
);
5878 fprintf(stderr
, "compile failed\n");
5882 fprintf(stderr
, "disasm:\n%s\n", binary
->disasm_string
);
5884 ac_shader_binary_read_config(binary
, config
, 0, supports_spill
);
5886 LLVMContextRef ctx
= LLVMGetModuleContext(llvm_module
);
5887 LLVMDisposeModule(llvm_module
);
5888 LLVMContextDispose(ctx
);
5890 if (stage
== MESA_SHADER_FRAGMENT
) {
5891 shader_info
->num_input_vgprs
= 0;
5892 if (G_0286CC_PERSP_SAMPLE_ENA(config
->spi_ps_input_addr
))
5893 shader_info
->num_input_vgprs
+= 2;
5894 if (G_0286CC_PERSP_CENTER_ENA(config
->spi_ps_input_addr
))
5895 shader_info
->num_input_vgprs
+= 2;
5896 if (G_0286CC_PERSP_CENTROID_ENA(config
->spi_ps_input_addr
))
5897 shader_info
->num_input_vgprs
+= 2;
5898 if (G_0286CC_PERSP_PULL_MODEL_ENA(config
->spi_ps_input_addr
))
5899 shader_info
->num_input_vgprs
+= 3;
5900 if (G_0286CC_LINEAR_SAMPLE_ENA(config
->spi_ps_input_addr
))
5901 shader_info
->num_input_vgprs
+= 2;
5902 if (G_0286CC_LINEAR_CENTER_ENA(config
->spi_ps_input_addr
))
5903 shader_info
->num_input_vgprs
+= 2;
5904 if (G_0286CC_LINEAR_CENTROID_ENA(config
->spi_ps_input_addr
))
5905 shader_info
->num_input_vgprs
+= 2;
5906 if (G_0286CC_LINE_STIPPLE_TEX_ENA(config
->spi_ps_input_addr
))
5907 shader_info
->num_input_vgprs
+= 1;
5908 if (G_0286CC_POS_X_FLOAT_ENA(config
->spi_ps_input_addr
))
5909 shader_info
->num_input_vgprs
+= 1;
5910 if (G_0286CC_POS_Y_FLOAT_ENA(config
->spi_ps_input_addr
))
5911 shader_info
->num_input_vgprs
+= 1;
5912 if (G_0286CC_POS_Z_FLOAT_ENA(config
->spi_ps_input_addr
))
5913 shader_info
->num_input_vgprs
+= 1;
5914 if (G_0286CC_POS_W_FLOAT_ENA(config
->spi_ps_input_addr
))
5915 shader_info
->num_input_vgprs
+= 1;
5916 if (G_0286CC_FRONT_FACE_ENA(config
->spi_ps_input_addr
))
5917 shader_info
->num_input_vgprs
+= 1;
5918 if (G_0286CC_ANCILLARY_ENA(config
->spi_ps_input_addr
))
5919 shader_info
->num_input_vgprs
+= 1;
5920 if (G_0286CC_SAMPLE_COVERAGE_ENA(config
->spi_ps_input_addr
))
5921 shader_info
->num_input_vgprs
+= 1;
5922 if (G_0286CC_POS_FIXED_PT_ENA(config
->spi_ps_input_addr
))
5923 shader_info
->num_input_vgprs
+= 1;
5925 config
->num_vgprs
= MAX2(config
->num_vgprs
, shader_info
->num_input_vgprs
);
5927 /* +3 for scratch wave offset and VCC */
5928 config
->num_sgprs
= MAX2(config
->num_sgprs
,
5929 shader_info
->num_input_sgprs
+ 3);
5932 void ac_compile_nir_shader(LLVMTargetMachineRef tm
,
5933 struct ac_shader_binary
*binary
,
5934 struct ac_shader_config
*config
,
5935 struct ac_shader_variant_info
*shader_info
,
5936 struct nir_shader
*nir
,
5937 const struct ac_nir_compiler_options
*options
,
5941 LLVMModuleRef llvm_module
= ac_translate_nir_to_llvm(tm
, nir
, shader_info
,
5944 ac_compile_llvm_module(tm
, llvm_module
, binary
, config
, shader_info
, nir
->stage
, dump_shader
, options
->supports_spill
);
5945 switch (nir
->stage
) {
5946 case MESA_SHADER_COMPUTE
:
5947 for (int i
= 0; i
< 3; ++i
)
5948 shader_info
->cs
.block_size
[i
] = nir
->info
->cs
.local_size
[i
];
5950 case MESA_SHADER_FRAGMENT
:
5951 shader_info
->fs
.early_fragment_test
= nir
->info
->fs
.early_fragment_tests
;
5953 case MESA_SHADER_GEOMETRY
:
5954 shader_info
->gs
.vertices_in
= nir
->info
->gs
.vertices_in
;
5955 shader_info
->gs
.vertices_out
= nir
->info
->gs
.vertices_out
;
5956 shader_info
->gs
.output_prim
= nir
->info
->gs
.output_primitive
;
5957 shader_info
->gs
.invocations
= nir
->info
->gs
.invocations
;
5959 case MESA_SHADER_TESS_EVAL
:
5960 shader_info
->tes
.primitive_mode
= nir
->info
->tess
.primitive_mode
;
5961 shader_info
->tes
.spacing
= nir
->info
->tess
.spacing
;
5962 shader_info
->tes
.ccw
= nir
->info
->tess
.ccw
;
5963 shader_info
->tes
.point_mode
= nir
->info
->tess
.point_mode
;
5964 shader_info
->tes
.as_es
= options
->key
.tes
.as_es
;
5966 case MESA_SHADER_TESS_CTRL
:
5967 shader_info
->tcs
.tcs_vertices_out
= nir
->info
->tess
.tcs_vertices_out
;
5969 case MESA_SHADER_VERTEX
:
5970 shader_info
->vs
.as_es
= options
->key
.vs
.as_es
;
5971 shader_info
->vs
.as_ls
= options
->key
.vs
.as_ls
;
5972 /* in LS mode we need at least 1, invocation id needs 3, handled elsewhere */
5973 if (options
->key
.vs
.as_ls
)
5974 shader_info
->vs
.vgpr_comp_cnt
= MAX2(1, shader_info
->vs
.vgpr_comp_cnt
);
5982 ac_gs_copy_shader_emit(struct nir_to_llvm_context
*ctx
)
5984 LLVMValueRef args
[9];
5985 args
[0] = ctx
->gsvs_ring
;
5986 args
[1] = LLVMBuildMul(ctx
->builder
, ctx
->vertex_id
, LLVMConstInt(ctx
->i32
, 4, false), "");
5987 args
[3] = ctx
->i32zero
;
5988 args
[4] = ctx
->i32one
; /* OFFEN */
5989 args
[5] = ctx
->i32zero
; /* IDXEN */
5990 args
[6] = ctx
->i32one
; /* GLC */
5991 args
[7] = ctx
->i32one
; /* SLC */
5992 args
[8] = ctx
->i32zero
; /* TFE */
5996 for (unsigned i
= 0; i
< RADEON_LLVM_MAX_OUTPUTS
; ++i
) {
6000 if (!(ctx
->output_mask
& (1ull << i
)))
6003 if (i
== VARYING_SLOT_CLIP_DIST0
) {
6004 /* unpack clip and cull from a single set of slots */
6005 length
= ctx
->num_output_clips
+ ctx
->num_output_culls
;
6010 for (unsigned j
= 0; j
< length
; j
++) {
6012 args
[2] = LLVMConstInt(ctx
->i32
,
6014 ctx
->gs_max_out_vertices
* 16 * 4, false);
6016 value
= ac_build_intrinsic(&ctx
->ac
,
6017 "llvm.SI.buffer.load.dword.i32.i32",
6019 AC_FUNC_ATTR_READONLY
|
6020 AC_FUNC_ATTR_LEGACY
);
6022 LLVMBuildStore(ctx
->builder
,
6023 to_float(ctx
, value
), ctx
->outputs
[radeon_llvm_reg_index_soa(i
, j
)]);
6027 handle_vs_outputs_post(ctx
, &ctx
->shader_info
->vs
.outinfo
);
6030 void ac_create_gs_copy_shader(LLVMTargetMachineRef tm
,
6031 struct nir_shader
*geom_shader
,
6032 struct ac_shader_binary
*binary
,
6033 struct ac_shader_config
*config
,
6034 struct ac_shader_variant_info
*shader_info
,
6035 const struct ac_nir_compiler_options
*options
,
6038 struct nir_to_llvm_context ctx
= {0};
6039 ctx
.context
= LLVMContextCreate();
6040 ctx
.module
= LLVMModuleCreateWithNameInContext("shader", ctx
.context
);
6041 ctx
.options
= options
;
6042 ctx
.shader_info
= shader_info
;
6044 ac_llvm_context_init(&ctx
.ac
, ctx
.context
);
6045 ctx
.ac
.module
= ctx
.module
;
6047 ctx
.is_gs_copy_shader
= true;
6048 LLVMSetTarget(ctx
.module
, "amdgcn--");
6051 ctx
.builder
= LLVMCreateBuilderInContext(ctx
.context
);
6052 ctx
.ac
.builder
= ctx
.builder
;
6053 ctx
.stage
= MESA_SHADER_VERTEX
;
6055 create_function(&ctx
);
6057 ctx
.gs_max_out_vertices
= geom_shader
->info
->gs
.vertices_out
;
6058 ac_setup_rings(&ctx
);
6060 ctx
.num_output_clips
= geom_shader
->info
->clip_distance_array_size
;
6061 ctx
.num_output_culls
= geom_shader
->info
->cull_distance_array_size
;
6063 nir_foreach_variable(variable
, &geom_shader
->outputs
)
6064 handle_shader_output_decl(&ctx
, variable
);
6066 ac_gs_copy_shader_emit(&ctx
);
6068 LLVMBuildRetVoid(ctx
.builder
);
6070 ac_llvm_finalize_module(&ctx
);
6072 ac_compile_llvm_module(tm
, ctx
.module
, binary
, config
, shader_info
,
6074 dump_shader
, options
->supports_spill
);